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hwdrv_apci3120.h
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1 
2 /* hwdrv_apci3120.h */
3 
4 /*
5  * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
6  *
7  * ADDI-DATA GmbH
8  * Dieselstrasse 3
9  * D-77833 Ottersweier
10  * Tel: +19(0)7223/9493-0
11  * Fax: +49(0)7223/9493-92
12  * http://www.addi-data.com
14  *
15  * This program is free software; you can redistribute it and/or modify it
16  * under the terms of the GNU General Public License as published by the Free
17  * Software Foundation; either version 2 of the License, or (at your option)
18  * any later version.
19  */
20 
21 /* comedi related defines */
22 
23 /* ANALOG INPUT RANGE */
24 static const struct comedi_lrange range_apci3120_ai = { 8, {
25  BIP_RANGE(10),
26  BIP_RANGE(5),
27  BIP_RANGE(2),
28  BIP_RANGE(1),
29  UNI_RANGE(10),
30  UNI_RANGE(5),
31  UNI_RANGE(2),
32  UNI_RANGE(1)
33  }
34 };
35 
36 /* ANALOG OUTPUT RANGE */
37 static const struct comedi_lrange range_apci3120_ao = { 2, {
38  BIP_RANGE(10),
39  UNI_RANGE(10)
40  }
41 };
42 
43 #define APCI3120_BIPOLAR_RANGES 4 /* used for test on mixture of BIP/UNI ranges */
44 
45 #define APCI3120_BOARD_VENDOR_ID 0x10E8
46 #define APCI3120_ADDRESS_RANGE 16
47 
48 #define APCI3120_DISABLE 0
49 #define APCI3120_ENABLE 1
50 
51 #define APCI3120_START 1
52 #define APCI3120_STOP 0
53 
54 #define APCI3120_EOC_MODE 1
55 #define APCI3120_EOS_MODE 2
56 #define APCI3120_DMA_MODE 3
57 
58 /* DIGITAL INPUT-OUTPUT DEFINE */
59 
60 #define APCI3120_DIGITAL_OUTPUT 0x0D
61 #define APCI3120_RD_STATUS 0x02
62 #define APCI3120_RD_FIFO 0x00
63 
64 /* digital output insn_write ON /OFF selection */
65 #define APCI3120_SET4DIGITALOUTPUTON 1
66 #define APCI3120_SET4DIGITALOUTPUTOFF 0
67 
68 /* analog output SELECT BIT */
69 #define APCI3120_ANALOG_OP_CHANNEL_1 0x0000
70 #define APCI3120_ANALOG_OP_CHANNEL_2 0x4000
71 #define APCI3120_ANALOG_OP_CHANNEL_3 0x8000
72 #define APCI3120_ANALOG_OP_CHANNEL_4 0xC000
73 #define APCI3120_ANALOG_OP_CHANNEL_5 0x0000
74 #define APCI3120_ANALOG_OP_CHANNEL_6 0x4000
75 #define APCI3120_ANALOG_OP_CHANNEL_7 0x8000
76 #define APCI3120_ANALOG_OP_CHANNEL_8 0xC000
77 
78 /* Enable external trigger bit in nWrAddress */
79 #define APCI3120_ENABLE_EXT_TRIGGER 0x8000
80 
81 /* ANALOG OUTPUT AND INPUT DEFINE */
82 #define APCI3120_UNIPOLAR 0x80 /* $$ RAM sequence polarity BIT */
83 #define APCI3120_BIPOLAR 0x00 /* $$ RAM sequence polarity BIT */
84 #define APCI3120_ANALOG_OUTPUT_1 0x08 /* (ADDRESS ) */
85 #define APCI3120_ANALOG_OUTPUT_2 0x0A /* (ADDRESS ) */
86 #define APCI3120_1_GAIN 0x00 /* $$ RAM sequence Gain Bits for gain 1 */
87 #define APCI3120_2_GAIN 0x10 /* $$ RAM sequence Gain Bits for gain 2 */
88 #define APCI3120_5_GAIN 0x20 /* $$ RAM sequence Gain Bits for gain 5 */
89 #define APCI3120_10_GAIN 0x30 /* $$ RAM sequence Gain Bits for gain 10 */
90 #define APCI3120_SEQ_RAM_ADDRESS 0x06 /* $$ EARLIER NAMED APCI3120_FIFO_ADDRESS */
91 #define APCI3120_RESET_FIFO 0x0C /* (ADDRESS) */
92 #define APCI3120_TIMER_0_MODE_2 0x01 /* $$ Bits for timer mode */
93 #define APCI3120_TIMER_0_MODE_4 0x2
94 #define APCI3120_SELECT_TIMER_0_WORD 0x00
95 #define APCI3120_ENABLE_TIMER0 0x1000 /* $$Gatebit 0 in nWrAddress */
96 #define APCI3120_CLEAR_PR 0xF0FF
97 #define APCI3120_CLEAR_PA 0xFFF0
98 #define APCI3120_CLEAR_PA_PR (APCI3120_CLEAR_PR & APCI3120_CLEAR_PA)
99 
100 /* nWrMode_Select */
101 #define APCI3120_ENABLE_SCAN 0x8 /* $$ bit in nWrMode_Select */
102 #define APCI3120_DISABLE_SCAN (~APCI3120_ENABLE_SCAN)
103 #define APCI3120_ENABLE_EOS_INT 0x2 /* $$ bit in nWrMode_Select */
104 
105 #define APCI3120_DISABLE_EOS_INT (~APCI3120_ENABLE_EOS_INT)
106 #define APCI3120_ENABLE_EOC_INT 0x1
107 #define APCI3120_DISABLE_EOC_INT (~APCI3120_ENABLE_EOC_INT)
108 #define APCI3120_DISABLE_ALL_INTERRUPT_WITHOUT_TIMER (APCI3120_DISABLE_EOS_INT & APCI3120_DISABLE_EOC_INT)
109 #define APCI3120_DISABLE_ALL_INTERRUPT (APCI3120_DISABLE_TIMER_INT & APCI3120_DISABLE_EOS_INT & APCI3120_DISABLE_EOC_INT)
110 
111 /* status register bits */
112 #define APCI3120_EOC 0x8000
113 #define APCI3120_EOS 0x2000
114 
115 /* software trigger dummy register */
116 #define APCI3120_START_CONVERSION 0x02 /* (ADDRESS) */
117 
118 /* TIMER DEFINE */
119 #define APCI3120_QUARTZ_A 70
120 #define APCI3120_QUARTZ_B 50
121 #define APCI3120_TIMER 1
122 #define APCI3120_WATCHDOG 2
123 #define APCI3120_TIMER_DISABLE 0
124 #define APCI3120_TIMER_ENABLE 1
125 #define APCI3120_ENABLE_TIMER2 0x4000 /* $$ gatebit 2 in nWrAddress */
126 #define APCI3120_DISABLE_TIMER2 (~APCI3120_ENABLE_TIMER2)
127 #define APCI3120_ENABLE_TIMER_INT 0x04 /* $$ ENAIRQ_FC_Bit in nWrModeSelect */
128 #define APCI3120_DISABLE_TIMER_INT (~APCI3120_ENABLE_TIMER_INT)
129 #define APCI3120_WRITE_MODE_SELECT 0x0E /* (ADDRESS) */
130 #define APCI3120_SELECT_TIMER_0_WORD 0x00
131 #define APCI3120_SELECT_TIMER_1_WORD 0x01
132 #define APCI3120_TIMER_1_MODE_2 0x4
133 
134 /* $$ BIT FOR MODE IN nCsTimerCtr1 */
135 #define APCI3120_TIMER_2_MODE_0 0x0
136 #define APCI3120_TIMER_2_MODE_2 0x10
137 #define APCI3120_TIMER_2_MODE_5 0x30
138 
139 /* $$ BIT FOR MODE IN nCsTimerCtr0 */
140 #define APCI3120_SELECT_TIMER_2_LOW_WORD 0x02
141 #define APCI3120_SELECT_TIMER_2_HIGH_WORD 0x03
142 
143 #define APCI3120_TIMER_CRT0 0x0D /* (ADDRESS for cCsTimerCtr0) */
144 #define APCI3120_TIMER_CRT1 0x0C /* (ADDRESS for cCsTimerCtr1) */
145 
146 #define APCI3120_TIMER_VALUE 0x04 /* ADDRESS for nCsTimerWert */
147 #define APCI3120_TIMER_STATUS_REGISTER 0x0D /* ADDRESS for delete timer 2 interrupt */
148 #define APCI3120_RD_STATUS 0x02 /* ADDRESS */
149 #define APCI3120_WR_ADDRESS 0x00 /* ADDRESS */
150 #define APCI3120_ENABLE_WATCHDOG 0x20 /* $$BIT in nWrMode_Select */
151 #define APCI3120_DISABLE_WATCHDOG (~APCI3120_ENABLE_WATCHDOG)
152 #define APCI3120_ENABLE_TIMER_COUNTER 0x10 /* $$BIT in nWrMode_Select */
153 #define APCI3120_DISABLE_TIMER_COUNTER (~APCI3120_ENABLE_TIMER_COUNTER)
154 #define APCI3120_FC_TIMER 0x1000 /* bit in status register */
155 #define APCI3120_ENABLE_TIMER0 0x1000
156 #define APCI3120_ENABLE_TIMER1 0x2000
157 #define APCI3120_ENABLE_TIMER2 0x4000
158 #define APCI3120_DISABLE_TIMER0 (~APCI3120_ENABLE_TIMER0)
159 #define APCI3120_DISABLE_TIMER1 (~APCI3120_ENABLE_TIMER1)
160 #define APCI3120_DISABLE_TIMER2 (~APCI3120_ENABLE_TIMER2)
161 
162 #define APCI3120_TIMER2_SELECT_EOS 0xC0 /* ADDED on 20-6 */
163 #define APCI3120_COUNTER 3 /* on 20-6 */
164 #define APCI3120_DISABLE_ALL_TIMER (APCI3120_DISABLE_TIMER0 & APCI3120_DISABLE_TIMER1 & APCI3120_DISABLE_TIMER2) /* on 20-6 */
165 
166 #define MAX_ANALOGINPUT_CHANNELS 32
167 
169 
170  unsigned char b_Type; /* EOC or EOS */
171  unsigned char b_InterruptFlag; /* Interrupt use or not */
172  unsigned int ui_ConvertTiming; /* Selection of the conversion time */
173  unsigned char b_NbrOfChannel; /* Number of channel to read */
174  unsigned int ui_ChannelList[MAX_ANALOGINPUT_CHANNELS]; /* Number of the channel to be read */
175  unsigned int ui_RangeList[MAX_ANALOGINPUT_CHANNELS]; /* Gain of each channel */
176 
177 };
178 
179 
180 /* Function Declaration For APCI-3120 */
181 
182 /* Internal functions */
184  int n_chan, unsigned int *chanlist, char check);
188 int i_APCI3120_Reset(struct comedi_device *dev);
190  struct comedi_subdevice *s);
191 /* Interrupt functions */
192 void v_APCI3120_Interrupt(int irq, void *d);
193 /* UPDATE-0.7.57->0.7.68 void v_APCI3120_InterruptDmaMoveBlock16bit(struct comedi_device *dev,struct comedi_subdevice *s,short *dma,short *data,int n); */
195  struct comedi_subdevice *s,
196  short *dma_buffer,
197  unsigned int num_samples);
199 void v_APCI3120_InterruptDma(int irq, void *d);
200 
201 /* TIMER */
202 
204  struct comedi_insn *insn, unsigned int *data);
206  struct comedi_insn *insn, unsigned int *data);
208  struct comedi_insn *insn, unsigned int *data);
209 
210 /*
211 * DI for di read
212 */
213 
215  struct comedi_insn *insn, unsigned int *data);
217  struct comedi_insn *insn, unsigned int *data);
218 
219 /* DO */
220 /* int i_APCI3120_WriteDigitalOutput(struct comedi_device *dev,
221  * unsigned char data);
222  */
224  struct comedi_subdevice *s, struct comedi_insn *insn,
225  unsigned int *data);
227  struct comedi_insn *insn, unsigned int *data);
229  struct comedi_insn *insn, unsigned int *data);
230 
231 /* AO */
232 /* int i_APCI3120_Write1AnalogValue(struct comedi_device *dev,UINT ui_Range,
233  * UINT ui_Channel,UINT data );
234  */
235 
237  struct comedi_insn *insn, unsigned int *data);
238 
239 /* AI HArdware layer */
240 
242  struct comedi_insn *insn, unsigned int *data);
244  struct comedi_insn *insn, unsigned int *data);
246  struct comedi_cmd *cmd);
248 /* int i_APCI3120_CancelAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s); */