i740_reg.h File Reference

Go to the source code of this file.

Macros
#define	SRX   VGA_SEQ_I
#define	GRX   VGA_GFX_I
#define	ARX   VGA_ATT_IW
#define	XRX   0x3D6
#define	MRX   0x3D2
#define	DACMASK   0x3C6
#define	DACSTATE   0x3C7
#define	DACRX   0x3C7
#define	DACWX   0x3C8
#define	DACDATA   0x3C9
#define	START_ADDR_HI   0x0C
#define	START_ADDR_LO   0x0D
#define	VERT_SYNC_END   0x11
#define	EXT_VERT_TOTAL   0x30
#define	EXT_VERT_DISPLAY   0x31
#define	EXT_VERT_SYNC_START   0x32
#define	EXT_VERT_BLANK_START   0x33
#define	EXT_HORIZ_TOTAL   0x35
#define	EXT_HORIZ_BLANK   0x39
#define	EXT_START_ADDR   0x40
#define	EXT_START_ADDR_ENABLE   0x80
#define	EXT_OFFSET   0x41
#define	EXT_START_ADDR_HI   0x42
#define	INTERLACE_CNTL   0x70
#define	INTERLACE_ENABLE   0x80
#define	INTERLACE_DISABLE   0x00
#define	MSR_R   0x3CC
#define	MSR_W   0x3C2
#define	IO_ADDR_SELECT   0x01
#define	MDA_BASE   0x3B0
#define	CGA_BASE   0x3D0
#define	IO_CTNL   0x09
#define	EXTENDED_ATTR_CNTL   0x02
#define	EXTENDED_CRTC_CNTL   0x01
#define	ADDRESS_MAPPING   0x0A
#define	PACKED_MODE_ENABLE   0x04
#define	LINEAR_MODE_ENABLE   0x02
#define	PAGE_MAPPING_ENABLE   0x01
#define	BITBLT_CNTL   0x20
#define	COLEXP_MODE   0x30
#define	COLEXP_8BPP   0x00
#define	COLEXP_16BPP   0x10
#define	COLEXP_24BPP   0x20
#define	COLEXP_RESERVED   0x30
#define	CHIP_RESET   0x02
#define	BITBLT_STATUS   0x01
#define	DISPLAY_CNTL   0x40
#define	VGA_WRAP_MODE   0x02
#define	VGA_WRAP_AT_256KB   0x00
#define	VGA_NO_WRAP   0x02
#define	GUI_MODE   0x01
#define	STANDARD_VGA_MODE   0x00
#define	HIRES_MODE   0x01
#define	DRAM_ROW_TYPE   0x50
#define	DRAM_ROW_0   0x07
#define	DRAM_ROW_0_SDRAM   0x00
#define	DRAM_ROW_0_EMPTY   0x07
#define	DRAM_ROW_1   0x38
#define	DRAM_ROW_1_SDRAM   0x00
#define	DRAM_ROW_1_EMPTY   0x38
#define	DRAM_ROW_CNTL_LO   0x51
#define	DRAM_CAS_LATENCY   0x10
#define	DRAM_RAS_TIMING   0x08
#define	DRAM_RAS_PRECHARGE   0x04
#define	DRAM_ROW_CNTL_HI   0x52
#define	DRAM_EXT_CNTL   0x53
#define	DRAM_REFRESH_RATE   0x03
#define	DRAM_REFRESH_DISABLE   0x00
#define	DRAM_REFRESH_60HZ   0x01
#define	DRAM_REFRESH_FAST_TEST   0x02
#define	DRAM_REFRESH_RESERVED   0x03
#define	DRAM_TIMING   0x54
#define	DRAM_ROW_BNDRY_0   0x55
#define	DRAM_ROW_BNDRY_1   0x56
#define	DPMS_SYNC_SELECT   0x61
#define	VSYNC_CNTL   0x08
#define	VSYNC_ON   0x00
#define	VSYNC_OFF   0x08
#define	HSYNC_CNTL   0x02
#define	HSYNC_ON   0x00
#define	HSYNC_OFF   0x02
#define	PIXPIPE_CONFIG_0   0x80
#define	DAC_8_BIT   0x80
#define	DAC_6_BIT   0x00
#define	HW_CURSOR_ENABLE   0x10
#define	EXTENDED_PALETTE   0x01
#define	PIXPIPE_CONFIG_1   0x81
#define	DISPLAY_COLOR_MODE   0x0F
#define	DISPLAY_VGA_MODE   0x00
#define	DISPLAY_8BPP_MODE   0x02
#define	DISPLAY_15BPP_MODE   0x04
#define	DISPLAY_16BPP_MODE   0x05
#define	DISPLAY_24BPP_MODE   0x06
#define	DISPLAY_32BPP_MODE   0x07
#define	PIXPIPE_CONFIG_2   0x82
#define	DISPLAY_GAMMA_ENABLE   0x08
#define	DISPLAY_GAMMA_DISABLE   0x00
#define	OVERLAY_GAMMA_ENABLE   0x04
#define	OVERLAY_GAMMA_DISABLE   0x00
#define	CURSOR_CONTROL   0xA0
#define	CURSOR_ORIGIN_SCREEN   0x00
#define	CURSOR_ORIGIN_DISPLAY   0x10
#define	CURSOR_MODE   0x07
#define	CURSOR_MODE_DISABLE   0x00
#define	CURSOR_MODE_32_4C_AX   0x01
#define	CURSOR_MODE_128_2C   0x02
#define	CURSOR_MODE_128_1C   0x03
#define	CURSOR_MODE_64_3C   0x04
#define	CURSOR_MODE_64_4C_AX   0x05
#define	CURSOR_MODE_64_4C   0x06
#define	CURSOR_MODE_RESERVED   0x07
#define	CURSOR_BASEADDR_LO   0xA2
#define	CURSOR_BASEADDR_HI   0xA3
#define	CURSOR_X_LO   0xA4
#define	CURSOR_X_HI   0xA5
#define	CURSOR_X_POS   0x00
#define	CURSOR_X_NEG   0x80
#define	CURSOR_Y_LO   0xA6
#define	CURSOR_Y_HI   0xA7
#define	CURSOR_Y_POS   0x00
#define	CURSOR_Y_NEG   0x80
#define	VCLK2_VCO_M   0xC8
#define	VCLK2_VCO_N   0xC9
#define	VCLK2_VCO_MN_MSBS   0xCA
#define	VCO_N_MSBS   0x30
#define	VCO_M_MSBS   0x03
#define	VCLK2_VCO_DIV_SEL   0xCB
#define	POST_DIV_SELECT   0x70
#define	POST_DIV_1   0x00
#define	POST_DIV_2   0x10
#define	POST_DIV_4   0x20
#define	POST_DIV_8   0x30
#define	POST_DIV_16   0x40
#define	POST_DIV_32   0x50
#define	VCO_LOOP_DIV_BY_4M   0x00
#define	VCO_LOOP_DIV_BY_16M   0x04
#define	REF_CLK_DIV_BY_5   0x02
#define	REF_DIV_4   0x00
#define	REF_DIV_1   0x01
#define	PLL_CNTL   0xCE
#define	PLL_MEMCLK_SEL   0x03
#define	PLL_MEMCLK__66667KHZ   0x00
#define	PLL_MEMCLK__75000KHZ   0x01
#define	PLL_MEMCLK__88889KHZ   0x02
#define	PLL_MEMCLK_100000KHZ   0x03
#define	ACQ_CNTL_1   0x02
#define	ACQ_CNTL_2   0x03
#define	FRAME_CAP_MODE   0x01
#define	CONT_CAP_MODE   0x00
#define	SINGLE_CAP_MODE   0x01
#define	ACQ_CNTL_3   0x04
#define	COL_KEY_CNTL_1   0x3C
#define	BLANK_DISP_OVERLAY   0x20
#define	LP_FIFO   0x1000
#define	HP_FIFO   0x2000
#define	INSTPNT   0x3040
#define	LP_FIFO_COUNT   0x3040
#define	HP_FIFO_COUNT   0x3041
#define	CLIENT   0xE0000000
#define	CLIENT_2D   0x60000000
#define	COMPARS   0x3038
#define	TWO_D_INST_DISABLE   0x08
#define	THREE_D_INST_DISABLE   0x04
#define	STATE_VAR_UPDATE_DISABLE   0x02
#define	PAL_STIP_DISABLE   0x01
#define	IER   0x3030
#define	IIR   0x3032
#define	IMR   0x3034
#define	ISR   0x3036
#define	VMIINTB_EVENT   0x2000
#define	GPIO4_INT   0x1000
#define	DISP_FLIP_EVENT   0x0800
#define	DVD_PORT_DMA   0x0400
#define	DISP_VBLANK   0x0200
#define	FIFO_EMPTY_DMA_DONE   0x0100
#define	INST_PARSER_ERROR   0x0080
#define	USER_DEFINED   0x0040
#define	BREAKPOINT   0x0020
#define	DISP_HORIZ_COUNT   0x0010
#define	DISP_VSYNC   0x0008
#define	CAPTURE_HORIZ_COUNT   0x0004
#define	CAPTURE_VSYNC   0x0002
#define	THREE_D_PIPE_FLUSHED   0x0001
#define	FWATER_BLC   0x00006000
#define	LMI_BURST_LENGTH   0x7F000000
#define	LMI_FIFO_WATERMARK   0x003F0000
#define	AGP_BURST_LENGTH   0x00007F00
#define	AGP_FIFO_WATERMARK   0x0000003F
#define	SRC_DST_PITCH   0x00040000
#define	DST_PITCH   0x1FFF0000
#define	SRC_PITCH   0x00001FFF
#define	COLEXP_BG_COLOR   0x00040004
#define	COLEXP_FG_COLOR   0x00040008
#define	MONO_SRC_CNTL   0x0004000C
#define	MONO_USE_COLEXP   0x00000000
#define	MONO_USE_SRCEXP   0x08000000
#define	MONO_DATA_ALIGN   0x07000000
#define	MONO_BIT_ALIGN   0x01000000
#define	MONO_BYTE_ALIGN   0x02000000
#define	MONO_WORD_ALIGN   0x03000000
#define	MONO_DWORD_ALIGN   0x04000000
#define	MONO_QWORD_ALIGN   0x05000000
#define	MONO_SRC_INIT_DSCRD   0x003F0000
#define	MONO_SRC_RIGHT_CLIP   0x00003F00
#define	MONO_SRC_LEFT_CLIP   0x0000003F
#define	BITBLT_CONTROL   0x00040010
#define	BLTR_STATUS   0x80000000
#define	DYN_DEPTH   0x03000000
#define	DYN_DEPTH_8BPP   0x00000000
#define	DYN_DEPTH_16BPP   0x01000000
#define	DYN_DEPTH_24BPP   0x02000000
#define	DYN_DEPTH_32BPP   0x03000000 /* Unimplemented on the i740 */
#define	DYN_DEPTH_ENABLE   0x00800000
#define	PAT_VERT_ALIGN   0x00700000
#define	SOLID_PAT_SELECT   0x00080000
#define	PAT_IS_IN_COLOR   0x00000000
#define	PAT_IS_MONO   0x00040000
#define	MONO_PAT_TRANSP   0x00020000
#define	COLOR_TRANSP_ROP   0x00000000
#define	COLOR_TRANSP_DST   0x00008000
#define	COLOR_TRANSP_EQ   0x00000000
#define	COLOR_TRANSP_NOT_EQ   0x00010000
#define	COLOR_TRANSP_ENABLE   0x00004000
#define	MONO_SRC_TRANSP   0x00002000
#define	SRC_IS_IN_COLOR   0x00000000
#define	SRC_IS_MONO   0x00001000
#define	SRC_USE_SRC_ADDR   0x00000000
#define	SRC_USE_BLTDATA   0x00000400
#define	BLT_TOP_TO_BOT   0x00000000
#define	BLT_BOT_TO_TOP   0x00000200
#define	BLT_LEFT_TO_RIGHT   0x00000000
#define	BLT_RIGHT_TO_LEFT   0x00000100
#define	BLT_ROP   0x000000FF
#define	BLT_PAT_ADDR   0x00040014
#define	BLT_SRC_ADDR   0x00040018
#define	BLT_DST_ADDR   0x0004001C
#define	BLT_DST_H_W   0x00040020
#define	BLT_DST_HEIGHT   0x1FFF0000
#define	BLT_DST_WIDTH   0x00001FFF
#define	SRCEXP_BG_COLOR   0x00040024
#define	SRCEXP_FG_COLOR   0x00040028
#define	BLTDATA   0x00050000

Macro Definition Documentation

#define ACQ_CNTL_1   0x02

Definition at line 201 of file i740_reg.h.

#define ACQ_CNTL_2   0x03

Definition at line 202 of file i740_reg.h.

#define ACQ_CNTL_3   0x04

Definition at line 206 of file i740_reg.h.

#define ADDRESS_MAPPING   0x0A

Definition at line 78 of file i740_reg.h.

#define AGP_BURST_LENGTH   0x00007F00

Definition at line 252 of file i740_reg.h.

#define AGP_FIFO_WATERMARK   0x0000003F

Definition at line 253 of file i740_reg.h.

#define ARX   VGA_ATT_IW

Definition at line 36 of file i740_reg.h.

#define BITBLT_CNTL   0x20

Definition at line 83 of file i740_reg.h.

#define BITBLT_CONTROL   0x00040010

Definition at line 273 of file i740_reg.h.

#define BITBLT_STATUS   0x01

Definition at line 90 of file i740_reg.h.

#define BLANK_DISP_OVERLAY   0x20

Definition at line 208 of file i740_reg.h.

#define BLT_BOT_TO_TOP   0x00000200

Definition at line 297 of file i740_reg.h.

#define BLT_DST_ADDR   0x0004001C

Definition at line 303 of file i740_reg.h.

#define BLT_DST_H_W   0x00040020

Definition at line 304 of file i740_reg.h.

#define BLT_DST_HEIGHT   0x1FFF0000

Definition at line 305 of file i740_reg.h.

#define BLT_DST_WIDTH   0x00001FFF

Definition at line 306 of file i740_reg.h.

#define BLT_LEFT_TO_RIGHT   0x00000000

Definition at line 298 of file i740_reg.h.

#define BLT_PAT_ADDR   0x00040014

Definition at line 301 of file i740_reg.h.

#define BLT_RIGHT_TO_LEFT   0x00000100

Definition at line 299 of file i740_reg.h.

#define BLT_ROP   0x000000FF

Definition at line 300 of file i740_reg.h.

#define BLT_SRC_ADDR   0x00040018

Definition at line 302 of file i740_reg.h.

#define BLT_TOP_TO_BOT   0x00000000

Definition at line 296 of file i740_reg.h.

#define BLTDATA   0x00050000

Definition at line 309 of file i740_reg.h.

#define BLTR_STATUS   0x80000000

Definition at line 274 of file i740_reg.h.

#define BREAKPOINT   0x0020

Definition at line 241 of file i740_reg.h.

#define CAPTURE_HORIZ_COUNT   0x0004

Definition at line 244 of file i740_reg.h.

#define CAPTURE_VSYNC   0x0002

Definition at line 245 of file i740_reg.h.

#define CGA_BASE   0x3D0

Definition at line 71 of file i740_reg.h.

#define CHIP_RESET   0x02

Definition at line 89 of file i740_reg.h.

#define CLIENT   0xE0000000

Definition at line 218 of file i740_reg.h.

#define CLIENT_2D   0x60000000

Definition at line 219 of file i740_reg.h.

#define COL_KEY_CNTL_1   0x3C

Definition at line 207 of file i740_reg.h.

#define COLEXP_16BPP   0x10

Definition at line 86 of file i740_reg.h.

#define COLEXP_24BPP   0x20

Definition at line 87 of file i740_reg.h.

#define COLEXP_8BPP   0x00

Definition at line 85 of file i740_reg.h.

#define COLEXP_BG_COLOR   0x00040004

Definition at line 259 of file i740_reg.h.

#define COLEXP_FG_COLOR   0x00040008

Definition at line 260 of file i740_reg.h.

#define COLEXP_MODE   0x30

Definition at line 84 of file i740_reg.h.

#define COLEXP_RESERVED   0x30

Definition at line 88 of file i740_reg.h.

#define COLOR_TRANSP_DST   0x00008000

Definition at line 287 of file i740_reg.h.

#define COLOR_TRANSP_ENABLE   0x00004000

Definition at line 290 of file i740_reg.h.

#define COLOR_TRANSP_EQ   0x00000000

Definition at line 288 of file i740_reg.h.

#define COLOR_TRANSP_NOT_EQ   0x00010000

Definition at line 289 of file i740_reg.h.

#define COLOR_TRANSP_ROP   0x00000000

Definition at line 286 of file i740_reg.h.

#define COMPARS   0x3038

Definition at line 222 of file i740_reg.h.

#define CONT_CAP_MODE   0x00

Definition at line 204 of file i740_reg.h.

#define CURSOR_BASEADDR_HI   0xA3

Definition at line 164 of file i740_reg.h.

#define CURSOR_BASEADDR_LO   0xA2

Definition at line 163 of file i740_reg.h.

#define CURSOR_CONTROL   0xA0

Definition at line 151 of file i740_reg.h.

#define CURSOR_MODE   0x07

Definition at line 154 of file i740_reg.h.

#define CURSOR_MODE_128_1C   0x03

Definition at line 158 of file i740_reg.h.

#define CURSOR_MODE_128_2C   0x02

Definition at line 157 of file i740_reg.h.

#define CURSOR_MODE_32_4C_AX   0x01

Definition at line 156 of file i740_reg.h.

#define CURSOR_MODE_64_3C   0x04

Definition at line 159 of file i740_reg.h.

#define CURSOR_MODE_64_4C   0x06

Definition at line 161 of file i740_reg.h.

#define CURSOR_MODE_64_4C_AX   0x05

Definition at line 160 of file i740_reg.h.

#define CURSOR_MODE_DISABLE   0x00

Definition at line 155 of file i740_reg.h.

#define CURSOR_MODE_RESERVED   0x07

Definition at line 162 of file i740_reg.h.

#define CURSOR_ORIGIN_DISPLAY   0x10

Definition at line 153 of file i740_reg.h.

#define CURSOR_ORIGIN_SCREEN   0x00

Definition at line 152 of file i740_reg.h.

#define CURSOR_X_HI   0xA5

Definition at line 166 of file i740_reg.h.

#define CURSOR_X_LO   0xA4

Definition at line 165 of file i740_reg.h.

#define CURSOR_X_NEG   0x80

Definition at line 168 of file i740_reg.h.

#define CURSOR_X_POS   0x00

Definition at line 167 of file i740_reg.h.

#define CURSOR_Y_HI   0xA7

Definition at line 170 of file i740_reg.h.

#define CURSOR_Y_LO   0xA6

Definition at line 169 of file i740_reg.h.

#define CURSOR_Y_NEG   0x80

Definition at line 172 of file i740_reg.h.

#define CURSOR_Y_POS   0x00

Definition at line 171 of file i740_reg.h.

#define DAC_6_BIT   0x00

Definition at line 132 of file i740_reg.h.

#define DAC_8_BIT   0x80

Definition at line 131 of file i740_reg.h.

#define DACDATA   0x3C9

Definition at line 45 of file i740_reg.h.

#define DACMASK   0x3C6

Definition at line 41 of file i740_reg.h.

#define DACRX   0x3C7

Definition at line 43 of file i740_reg.h.

#define DACSTATE   0x3C7

Definition at line 42 of file i740_reg.h.

#define DACWX   0x3C8

Definition at line 44 of file i740_reg.h.

#define DISP_FLIP_EVENT   0x0800

Definition at line 235 of file i740_reg.h.

#define DISP_HORIZ_COUNT   0x0010

Definition at line 242 of file i740_reg.h.

#define DISP_VBLANK   0x0200

Definition at line 237 of file i740_reg.h.

#define DISP_VSYNC   0x0008

Definition at line 243 of file i740_reg.h.

#define DISPLAY_15BPP_MODE   0x04

Definition at line 140 of file i740_reg.h.

#define DISPLAY_16BPP_MODE   0x05

Definition at line 141 of file i740_reg.h.

#define DISPLAY_24BPP_MODE   0x06

Definition at line 142 of file i740_reg.h.

#define DISPLAY_32BPP_MODE   0x07

Definition at line 143 of file i740_reg.h.

#define DISPLAY_8BPP_MODE   0x02

Definition at line 139 of file i740_reg.h.

#define DISPLAY_CNTL   0x40

Definition at line 92 of file i740_reg.h.

#define DISPLAY_COLOR_MODE   0x0F

Definition at line 137 of file i740_reg.h.

#define DISPLAY_GAMMA_DISABLE   0x00

Definition at line 147 of file i740_reg.h.

#define DISPLAY_GAMMA_ENABLE   0x08

Definition at line 146 of file i740_reg.h.

#define DISPLAY_VGA_MODE   0x00

Definition at line 138 of file i740_reg.h.

#define DPMS_SYNC_SELECT   0x61

Definition at line 122 of file i740_reg.h.

#define DRAM_CAS_LATENCY   0x10

Definition at line 108 of file i740_reg.h.

#define DRAM_EXT_CNTL   0x53

Definition at line 112 of file i740_reg.h.

#define DRAM_RAS_PRECHARGE   0x04

Definition at line 110 of file i740_reg.h.

#define DRAM_RAS_TIMING   0x08

Definition at line 109 of file i740_reg.h.

#define DRAM_REFRESH_60HZ   0x01

Definition at line 115 of file i740_reg.h.

#define DRAM_REFRESH_DISABLE   0x00

Definition at line 114 of file i740_reg.h.

#define DRAM_REFRESH_FAST_TEST   0x02

Definition at line 116 of file i740_reg.h.

#define DRAM_REFRESH_RATE   0x03

Definition at line 113 of file i740_reg.h.

#define DRAM_REFRESH_RESERVED   0x03

Definition at line 117 of file i740_reg.h.

#define DRAM_ROW_0   0x07

Definition at line 101 of file i740_reg.h.

#define DRAM_ROW_0_EMPTY   0x07

Definition at line 103 of file i740_reg.h.

#define DRAM_ROW_0_SDRAM   0x00

Definition at line 102 of file i740_reg.h.

#define DRAM_ROW_1   0x38

Definition at line 104 of file i740_reg.h.

#define DRAM_ROW_1_EMPTY   0x38

Definition at line 106 of file i740_reg.h.

#define DRAM_ROW_1_SDRAM   0x00

Definition at line 105 of file i740_reg.h.

#define DRAM_ROW_BNDRY_0   0x55

Definition at line 119 of file i740_reg.h.

#define DRAM_ROW_BNDRY_1   0x56

Definition at line 120 of file i740_reg.h.

#define DRAM_ROW_CNTL_HI   0x52

Definition at line 111 of file i740_reg.h.

#define DRAM_ROW_CNTL_LO   0x51

Definition at line 107 of file i740_reg.h.

#define DRAM_ROW_TYPE   0x50

Definition at line 100 of file i740_reg.h.

#define DRAM_TIMING   0x54

Definition at line 118 of file i740_reg.h.

#define DST_PITCH   0x1FFF0000

Definition at line 257 of file i740_reg.h.

#define DVD_PORT_DMA   0x0400

Definition at line 236 of file i740_reg.h.

#define DYN_DEPTH   0x03000000

Definition at line 275 of file i740_reg.h.

#define DYN_DEPTH_16BPP   0x01000000

Definition at line 277 of file i740_reg.h.

#define DYN_DEPTH_24BPP   0x02000000

Definition at line 278 of file i740_reg.h.

#define DYN_DEPTH_32BPP   0x03000000 /* Unimplemented on the i740 */

Definition at line 279 of file i740_reg.h.

#define DYN_DEPTH_8BPP   0x00000000

Definition at line 276 of file i740_reg.h.

#define DYN_DEPTH_ENABLE   0x00800000

Definition at line 280 of file i740_reg.h.

#define EXT_HORIZ_BLANK   0x39

Definition at line 56 of file i740_reg.h.

#define EXT_HORIZ_TOTAL   0x35

Definition at line 55 of file i740_reg.h.

#define EXT_OFFSET   0x41

Definition at line 59 of file i740_reg.h.

#define EXT_START_ADDR   0x40

Definition at line 57 of file i740_reg.h.

#define EXT_START_ADDR_ENABLE   0x80

Definition at line 58 of file i740_reg.h.

#define EXT_START_ADDR_HI   0x42

Definition at line 60 of file i740_reg.h.

#define EXT_VERT_BLANK_START   0x33

Definition at line 54 of file i740_reg.h.

#define EXT_VERT_DISPLAY   0x31

Definition at line 52 of file i740_reg.h.

#define EXT_VERT_SYNC_START   0x32

Definition at line 53 of file i740_reg.h.

#define EXT_VERT_TOTAL   0x30

Definition at line 51 of file i740_reg.h.

#define EXTENDED_ATTR_CNTL   0x02

Definition at line 75 of file i740_reg.h.

#define EXTENDED_CRTC_CNTL   0x01

Definition at line 76 of file i740_reg.h.

#define EXTENDED_PALETTE   0x01

Definition at line 134 of file i740_reg.h.

#define FIFO_EMPTY_DMA_DONE   0x0100

Definition at line 238 of file i740_reg.h.

#define FRAME_CAP_MODE   0x01

Definition at line 203 of file i740_reg.h.

#define FWATER_BLC   0x00006000

Definition at line 249 of file i740_reg.h.

#define GPIO4_INT   0x1000

Definition at line 234 of file i740_reg.h.

#define GRX   VGA_GFX_I

Definition at line 35 of file i740_reg.h.

#define GUI_MODE   0x01

Definition at line 96 of file i740_reg.h.

#define HIRES_MODE   0x01

Definition at line 98 of file i740_reg.h.

#define HP_FIFO   0x2000

Definition at line 212 of file i740_reg.h.

#define HP_FIFO_COUNT   0x3041

Definition at line 215 of file i740_reg.h.

#define HSYNC_CNTL   0x02

Definition at line 126 of file i740_reg.h.

#define HSYNC_OFF   0x02

Definition at line 128 of file i740_reg.h.

#define HSYNC_ON   0x00

Definition at line 127 of file i740_reg.h.

#define HW_CURSOR_ENABLE   0x10

Definition at line 133 of file i740_reg.h.

#define IER   0x3030

Definition at line 229 of file i740_reg.h.

#define IIR   0x3032

Definition at line 230 of file i740_reg.h.

#define IMR   0x3034

Definition at line 231 of file i740_reg.h.

#define INST_PARSER_ERROR   0x0080

Definition at line 239 of file i740_reg.h.

#define INSTPNT   0x3040

Definition at line 213 of file i740_reg.h.

#define INTERLACE_CNTL   0x70

Definition at line 61 of file i740_reg.h.

#define INTERLACE_DISABLE   0x00

Definition at line 63 of file i740_reg.h.

#define INTERLACE_ENABLE   0x80

Definition at line 62 of file i740_reg.h.

#define IO_ADDR_SELECT   0x01

Definition at line 68 of file i740_reg.h.

#define IO_CTNL   0x09

Definition at line 74 of file i740_reg.h.

#define ISR   0x3036

Definition at line 232 of file i740_reg.h.

#define LINEAR_MODE_ENABLE   0x02

Definition at line 80 of file i740_reg.h.

#define LMI_BURST_LENGTH   0x7F000000

Definition at line 250 of file i740_reg.h.

#define LMI_FIFO_WATERMARK   0x003F0000

Definition at line 251 of file i740_reg.h.

#define LP_FIFO   0x1000

Definition at line 211 of file i740_reg.h.

#define LP_FIFO_COUNT   0x3040

Definition at line 214 of file i740_reg.h.

#define MDA_BASE   0x3B0

Definition at line 70 of file i740_reg.h.

#define MONO_BIT_ALIGN   0x01000000

Definition at line 265 of file i740_reg.h.

#define MONO_BYTE_ALIGN   0x02000000

Definition at line 266 of file i740_reg.h.

#define MONO_DATA_ALIGN   0x07000000

Definition at line 264 of file i740_reg.h.

#define MONO_DWORD_ALIGN   0x04000000

Definition at line 268 of file i740_reg.h.

#define MONO_PAT_TRANSP   0x00020000

Definition at line 285 of file i740_reg.h.

#define MONO_QWORD_ALIGN   0x05000000

Definition at line 269 of file i740_reg.h.

#define MONO_SRC_CNTL   0x0004000C

Definition at line 261 of file i740_reg.h.

#define MONO_SRC_INIT_DSCRD   0x003F0000

Definition at line 270 of file i740_reg.h.

#define MONO_SRC_LEFT_CLIP   0x0000003F

Definition at line 272 of file i740_reg.h.

#define MONO_SRC_RIGHT_CLIP   0x00003F00

Definition at line 271 of file i740_reg.h.

#define MONO_SRC_TRANSP   0x00002000

Definition at line 291 of file i740_reg.h.

#define MONO_USE_COLEXP   0x00000000

Definition at line 262 of file i740_reg.h.

#define MONO_USE_SRCEXP   0x08000000

Definition at line 263 of file i740_reg.h.

#define MONO_WORD_ALIGN   0x03000000

Definition at line 267 of file i740_reg.h.

#define MRX   0x3D2

Definition at line 38 of file i740_reg.h.

#define MSR_R   0x3CC

Definition at line 66 of file i740_reg.h.

#define MSR_W   0x3C2

Definition at line 67 of file i740_reg.h.

#define OVERLAY_GAMMA_DISABLE   0x00

Definition at line 149 of file i740_reg.h.

#define OVERLAY_GAMMA_ENABLE   0x04

Definition at line 148 of file i740_reg.h.

#define PACKED_MODE_ENABLE   0x04

Definition at line 79 of file i740_reg.h.

#define PAGE_MAPPING_ENABLE   0x01

Definition at line 81 of file i740_reg.h.

#define PAL_STIP_DISABLE   0x01

Definition at line 226 of file i740_reg.h.

#define PAT_IS_IN_COLOR   0x00000000

Definition at line 283 of file i740_reg.h.

#define PAT_IS_MONO   0x00040000

Definition at line 284 of file i740_reg.h.

#define PAT_VERT_ALIGN   0x00700000

Definition at line 281 of file i740_reg.h.

#define PIXPIPE_CONFIG_0   0x80

Definition at line 130 of file i740_reg.h.

#define PIXPIPE_CONFIG_1   0x81

Definition at line 136 of file i740_reg.h.

#define PIXPIPE_CONFIG_2   0x82

Definition at line 145 of file i740_reg.h.

#define PLL_CNTL   0xCE

Definition at line 193 of file i740_reg.h.

#define PLL_MEMCLK_100000KHZ   0x03

Definition at line 198 of file i740_reg.h.

#define PLL_MEMCLK__66667KHZ   0x00

Definition at line 195 of file i740_reg.h.

#define PLL_MEMCLK__75000KHZ   0x01

Definition at line 196 of file i740_reg.h.

#define PLL_MEMCLK__88889KHZ   0x02

Definition at line 197 of file i740_reg.h.

#define PLL_MEMCLK_SEL   0x03

Definition at line 194 of file i740_reg.h.

#define POST_DIV_1   0x00

Definition at line 181 of file i740_reg.h.

#define POST_DIV_16   0x40

Definition at line 185 of file i740_reg.h.

#define POST_DIV_2   0x10

Definition at line 182 of file i740_reg.h.

#define POST_DIV_32   0x50

Definition at line 186 of file i740_reg.h.

#define POST_DIV_4   0x20

Definition at line 183 of file i740_reg.h.

#define POST_DIV_8   0x30

Definition at line 184 of file i740_reg.h.

#define POST_DIV_SELECT   0x70

Definition at line 180 of file i740_reg.h.

#define REF_CLK_DIV_BY_5   0x02

Definition at line 189 of file i740_reg.h.

#define REF_DIV_1   0x01

Definition at line 191 of file i740_reg.h.

#define REF_DIV_4   0x00

Definition at line 190 of file i740_reg.h.

#define SINGLE_CAP_MODE   0x01

Definition at line 205 of file i740_reg.h.

#define SOLID_PAT_SELECT   0x00080000

Definition at line 282 of file i740_reg.h.

#define SRC_DST_PITCH   0x00040000

Definition at line 256 of file i740_reg.h.

#define SRC_IS_IN_COLOR   0x00000000

Definition at line 292 of file i740_reg.h.

#define SRC_IS_MONO   0x00001000

Definition at line 293 of file i740_reg.h.

#define SRC_PITCH   0x00001FFF

Definition at line 258 of file i740_reg.h.

#define SRC_USE_BLTDATA   0x00000400

Definition at line 295 of file i740_reg.h.

#define SRC_USE_SRC_ADDR   0x00000000

Definition at line 294 of file i740_reg.h.

#define SRCEXP_BG_COLOR   0x00040024

Definition at line 307 of file i740_reg.h.

#define SRCEXP_FG_COLOR   0x00040028

Definition at line 308 of file i740_reg.h.

#define SRX   VGA_SEQ_I

Definition at line 34 of file i740_reg.h.

#define STANDARD_VGA_MODE   0x00

Definition at line 97 of file i740_reg.h.

#define START_ADDR_HI   0x0C

Definition at line 48 of file i740_reg.h.

#define START_ADDR_LO   0x0D

Definition at line 49 of file i740_reg.h.

#define STATE_VAR_UPDATE_DISABLE   0x02

Definition at line 225 of file i740_reg.h.

#define THREE_D_INST_DISABLE   0x04

Definition at line 224 of file i740_reg.h.

#define THREE_D_PIPE_FLUSHED   0x0001

Definition at line 246 of file i740_reg.h.

#define TWO_D_INST_DISABLE   0x08

Definition at line 223 of file i740_reg.h.

#define USER_DEFINED   0x0040

Definition at line 240 of file i740_reg.h.

#define VCLK2_VCO_DIV_SEL   0xCB

Definition at line 179 of file i740_reg.h.

#define VCLK2_VCO_M   0xC8

Definition at line 174 of file i740_reg.h.

#define VCLK2_VCO_MN_MSBS   0xCA

Definition at line 176 of file i740_reg.h.

#define VCLK2_VCO_N   0xC9

Definition at line 175 of file i740_reg.h.

#define VCO_LOOP_DIV_BY_16M   0x04

Definition at line 188 of file i740_reg.h.

#define VCO_LOOP_DIV_BY_4M   0x00

Definition at line 187 of file i740_reg.h.

#define VCO_M_MSBS   0x03

Definition at line 178 of file i740_reg.h.

#define VCO_N_MSBS   0x30

Definition at line 177 of file i740_reg.h.

#define VERT_SYNC_END   0x11

Definition at line 50 of file i740_reg.h.

#define VGA_NO_WRAP   0x02

Definition at line 95 of file i740_reg.h.

#define VGA_WRAP_AT_256KB   0x00

Definition at line 94 of file i740_reg.h.

#define VGA_WRAP_MODE   0x02

Definition at line 93 of file i740_reg.h.

#define VMIINTB_EVENT   0x2000

Definition at line 233 of file i740_reg.h.

#define VSYNC_CNTL   0x08

Definition at line 123 of file i740_reg.h.

#define VSYNC_OFF   0x08

Definition at line 125 of file i740_reg.h.

#define VSYNC_ON   0x00

Definition at line 124 of file i740_reg.h.

#define XRX   0x3D6

Definition at line 37 of file i740_reg.h.