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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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| #define _IDP_CPLD_FLASH_WE (IDP_CPLD_PHYS + 0x34) |
| #define _IDP_CPLD_GPIOH_DIR (IDP_CPLD_PHYS + 0x18) |
| #define _IDP_CPLD_GPIOH_VALUE (IDP_CPLD_PHYS + 0x1C) |
| #define _IDP_CPLD_GPIOL_DIR (IDP_CPLD_PHYS + 0x20) |
| #define _IDP_CPLD_GPIOL_VALUE (IDP_CPLD_PHYS + 0x24) |
| #define _IDP_CPLD_KB_COL_HIGH (IDP_CPLD_PHYS + 0x0C) |
| #define _IDP_CPLD_KB_COL_LOW (IDP_CPLD_PHYS + 0x10) |
| #define _IDP_CPLD_KB_ROW (IDP_CPLD_PHYS + 0x50) |
| #define _IDP_CPLD_LCD (IDP_CPLD_PHYS + 0x30) |
| #define _IDP_CPLD_LED_CONTROL (IDP_CPLD_PHYS + 0x08) |
| #define _IDP_CPLD_MISC_CTRL (IDP_CPLD_PHYS + 0x2C) |
| #define _IDP_CPLD_MISC_STATUS (IDP_CPLD_PHYS + 0x5C) |
| #define _IDP_CPLD_PCCARD0_STATUS (IDP_CPLD_PHYS + 0x54) |
| #define _IDP_CPLD_PCCARD1_STATUS (IDP_CPLD_PHYS + 0x58) |
| #define _IDP_CPLD_PCCARD_EN (IDP_CPLD_PHYS + 0x14) |
| #define _IDP_CPLD_PCCARD_PWR (IDP_CPLD_PHYS + 0x28) |
| #define _IDP_CPLD_PERIPH_PWR (IDP_CPLD_PHYS + 0x04) |
| #define _IDP_CPLD_REV (IDP_CPLD_PHYS + 0x00) |
| #define CPLD_P2V | ( | x | ) | ((x) - IDP_CPLD_PHYS + IDP_CPLD_VIRT) |
| #define CPLD_V2P | ( | x | ) | ((x) - IDP_CPLD_VIRT + IDP_CPLD_PHYS) |
| #define ETHERNET_IRQ PXA_GPIO_TO_IRQ(4) |
| #define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
| #define FLASH_WRITE_PROTECT_DISABLE | ( | ) | ((IDP_CPLD_FLASH_WE) &= ~(0x1)) |
| #define FLASH_WRITE_PROTECT_ENABLE | ( | ) | ((IDP_CPLD_FLASH_WE) |= (0x1)) |
| #define IDE_IRQ PXA_GPIO_TO_IRQ(21) |
| #define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
| #define IDP_ALT_FLASH_PHYS (PXA_CS1_PHYS) |
| #define IDP_COREVOLT_PHYS (PXA_CS5_PHYS + 0x03800000) |
| #define IDP_CPLD_FLASH_WE __CPLD_REG(_IDP_CPLD_FLASH_WE) |
| #define IDP_CPLD_GPIOH_DIR __CPLD_REG(_IDP_CPLD_GPIOH_DIR) |
| #define IDP_CPLD_GPIOH_VALUE __CPLD_REG(_IDP_CPLD_GPIOH_VALUE) |
| #define IDP_CPLD_GPIOL_DIR __CPLD_REG(_IDP_CPLD_GPIOL_DIR) |
| #define IDP_CPLD_GPIOL_VALUE __CPLD_REG(_IDP_CPLD_GPIOL_VALUE) |
| #define IDP_CPLD_KB_COL_HIGH __CPLD_REG(_IDP_CPLD_KB_COL_HIGH) |
| #define IDP_CPLD_KB_COL_LOW __CPLD_REG(_IDP_CPLD_KB_COL_LOW) |
| #define IDP_CPLD_KB_ROW __CPLD_REG(_IDP_CPLD_KB_ROW) |
| #define IDP_CPLD_LCD __CPLD_REG(_IDP_CPLD_LCD) |
| #define IDP_CPLD_LED_CONTROL __CPLD_REG(_IDP_CPLD_LED_CONTROL) |
| #define IDP_CPLD_MISC_CTRL __CPLD_REG(_IDP_CPLD_MISC_CTRL) |
| #define IDP_CPLD_MISC_STATUS __CPLD_REG(_IDP_CPLD_MISC_STATUS) |
| #define IDP_CPLD_PCCARD0_STATUS __CPLD_REG(_IDP_CPLD_PCCARD0_STATUS) |
| #define IDP_CPLD_PCCARD1_STATUS __CPLD_REG(_IDP_CPLD_PCCARD1_STATUS) |
| #define IDP_CPLD_PCCARD_EN __CPLD_REG(_IDP_CPLD_PCCARD_EN) |
| #define IDP_CPLD_PCCARD_PWR __CPLD_REG(_IDP_CPLD_PCCARD_PWR) |
| #define IDP_CPLD_PERIPH_PWR __CPLD_REG(_IDP_CPLD_PERIPH_PWR) |
| #define IDP_CPLD_PHYS (PXA_CS5_PHYS + 0x03C00000) |
| #define IDP_CPLD_REV __CPLD_REG(_IDP_CPLD_REV) |
| #define IDP_CPLD_VIRT (IDP_COREVOLT_VIRT + IDP_COREVOLT_SIZE) |
| #define IDP_ETH_PHYS (PXA_CS5_PHYS + 0x03400000) |
| #define IDP_FLASH_PHYS (PXA_CS0_PHYS) |
| #define IDP_IDE_PHYS (PXA_CS5_PHYS + 0x03000000) |
| #define IDP_LEDS_MASK (IDP_HB_LED | IDP_BUSY_LED) |
| #define IDP_MEDIAQ_PHYS (PXA_CS3_PHYS) |
| #define KEYBD_MATRIX_GET_INPUTS | ( | inputs | ) |
| #define KEYBD_MATRIX_SET_OUTPUTS | ( | outputs | ) |
| #define PCMCIA_S0_CD_VALID PXA_GPIO_TO_IRQ(7) |
| #define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH |
| #define PCMCIA_S0_RDYINT PXA_GPIO_TO_IRQ(19) |
| #define PCMCIA_S1_CD_VALID PXA_GPIO_TO_IRQ(8) |
| #define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH |
| #define PCMCIA_S1_RDYINT PXA_GPIO_TO_IRQ(22) |
| #define TOUCH_PANEL_IRQ PXA_GPIO_TO_IRQ(5) |
| #define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING |
1.8.2