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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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Macros | |
| #define | IDT77105_MCR 0x0 /* Master Control Register */ |
| #define | IDT77105_ISTAT 0x1 /* Interrupt Status */ |
| #define | IDT77105_DIAG 0x2 /* Diagnostic Control */ |
| #define | IDT77105_LEDHEC 0x3 /* LED Driver & HEC Status/Control */ |
| #define | IDT77105_CTRLO 0x4 /* Low Byte Counter Register */ |
| #define | IDT77105_CTRHI 0x5 /* High Byte Counter Register */ |
| #define | IDT77105_CTRSEL 0x6 /* Counter Register Read Select */ |
| #define | IDT77105_MCR_UPLO 0x80 /* R/W, User Prog'le Output Latch */ |
| #define | IDT77105_MCR_DREC 0x40 /* R/W, Discard Receive Error Cells */ |
| #define | IDT77105_MCR_ECEIO |
| #define | IDT77105_MCR_TDPC 0x10 /* R/W, Transmit Data Parity Check */ |
| #define | IDT77105_MCR_DRIC 0x08 /* R/W, Discard Received Idle Cells */ |
| #define | IDT77105_MCR_HALTTX 0x04 /* R/W, Halt Tx */ |
| #define | IDT77105_MCR_UMODE 0x02 /* R/W, Utopia (cell/byte) Mode */ |
| #define | IDT77105_MCR_EIP 0x01 /* R/W, Enable Interrupt Pin */ |
| #define | IDT77105_ISTAT_GOODSIG 0x40 /* R, Good Signal Bit */ |
| #define | IDT77105_ISTAT_HECERR 0x20 /* sticky, HEC Error*/ |
| #define | IDT77105_ISTAT_SCR 0x10 /* sticky, Short Cell Received */ |
| #define | IDT77105_ISTAT_TPE 0x08 /* sticky, Transmit Parity Error */ |
| #define | IDT77105_ISTAT_RSCC 0x04 /* sticky, Rx Signal Condition Change */ |
| #define | IDT77105_ISTAT_RSE 0x02 /* sticky, Rx Symbol Error */ |
| #define | IDT77105_ISTAT_RFO 0x01 /* sticky, Rx FIFO Overrun */ |
| #define | IDT77105_DIAG_FTD 0x80 /* R/W, Force TxClav deassert */ |
| #define | IDT77105_DIAG_ROS 0x40 /* R/W, RxClav operation select */ |
| #define | IDT77105_DIAG_MPCS 0x20 /* R/W, Multi-PHY config'n select */ |
| #define | IDT77105_DIAG_RFLUSH 0x10 /* R/W, clear receive FIFO */ |
| #define | IDT77105_DIAG_ITPE 0x08 /* R/W, Insert Tx payload error */ |
| #define | IDT77105_DIAG_ITHE 0x04 /* R/W, Insert Tx HEC error */ |
| #define | IDT77105_DIAG_UMODE 0x02 /* R/W, Utopia (cell/byte) Mode */ |
| #define | IDT77105_DIAG_LCMASK 0x03 /* R/W, Loopback Control */ |
| #define | IDT77105_DIAG_LC_NORMAL 0x00 /* Receive from network */ |
| #define | IDT77105_DIAG_LC_PHY_LOOPBACK 0x02 |
| #define | IDT77105_DIAG_LC_LINE_LOOPBACK 0x03 |
| #define | IDT77105_LEDHEC_DRHC 0x40 /* R/W, Disable Rx HEC check */ |
| #define | IDT77105_LEDHEC_DTHC 0x20 /* R/W, Disable Tx HEC calculation */ |
| #define | IDT77105_LEDHEC_RPWMASK 0x18 /* R/W, RxRef pulse width select */ |
| #define | IDT77105_LEDHEC_TFS 0x04 /* R, Tx FIFO Status (1=empty) */ |
| #define | IDT77105_LEDHEC_TLS 0x02 /* R, Tx LED Status (1=lit) */ |
| #define | IDT77105_LEDHEC_RLS 0x01 /* R, Rx LED Status (1=lit) */ |
| #define | IDT77105_LEDHEC_RPW_1 0x00 /* RxRef active for 1 RxClk cycle */ |
| #define | IDT77105_LEDHEC_RPW_2 0x08 /* RxRef active for 2 RxClk cycle */ |
| #define | IDT77105_LEDHEC_RPW_4 0x10 /* RxRef active for 4 RxClk cycle */ |
| #define | IDT77105_LEDHEC_RPW_8 0x18 /* RxRef active for 8 RxClk cycle */ |
| #define | IDT77105_CTRSEL_SEC 0x08 /* W, Symbol Error Counter */ |
| #define | IDT77105_CTRSEL_TCC 0x04 /* W, Tx Cell Counter */ |
| #define | IDT77105_CTRSEL_RCC 0x02 /* W, Rx Cell Counter */ |
| #define | IDT77105_CTRSEL_RHEC 0x01 /* W, Rx HEC Error Counter */ |
| #define | IDT77105_STATS_TIMER_PERIOD (HZ) |
| #define | IDT77105_RESTART_TIMER_PERIOD (5 * HZ) |
| #define IDT77105_CTRHI 0x5 /* High Byte Counter Register */ |
Definition at line 20 of file idt77105.h.
| #define IDT77105_CTRLO 0x4 /* Low Byte Counter Register */ |
Definition at line 19 of file idt77105.h.
| #define IDT77105_CTRSEL 0x6 /* Counter Register Read Select */ |
Definition at line 21 of file idt77105.h.
| #define IDT77105_CTRSEL_RCC 0x02 /* W, Rx Cell Counter */ |
Definition at line 74 of file idt77105.h.
| #define IDT77105_CTRSEL_RHEC 0x01 /* W, Rx HEC Error Counter */ |
Definition at line 75 of file idt77105.h.
| #define IDT77105_CTRSEL_SEC 0x08 /* W, Symbol Error Counter */ |
Definition at line 72 of file idt77105.h.
| #define IDT77105_CTRSEL_TCC 0x04 /* W, Tx Cell Counter */ |
Definition at line 73 of file idt77105.h.
| #define IDT77105_DIAG 0x2 /* Diagnostic Control */ |
Definition at line 17 of file idt77105.h.
| #define IDT77105_DIAG_FTD 0x80 /* R/W, Force TxClav deassert */ |
Definition at line 45 of file idt77105.h.
| #define IDT77105_DIAG_ITHE 0x04 /* R/W, Insert Tx HEC error */ |
Definition at line 50 of file idt77105.h.
| #define IDT77105_DIAG_ITPE 0x08 /* R/W, Insert Tx payload error */ |
Definition at line 49 of file idt77105.h.
| #define IDT77105_DIAG_LC_LINE_LOOPBACK 0x03 |
Definition at line 56 of file idt77105.h.
| #define IDT77105_DIAG_LC_NORMAL 0x00 /* Receive from network */ |
Definition at line 54 of file idt77105.h.
| #define IDT77105_DIAG_LC_PHY_LOOPBACK 0x02 |
Definition at line 55 of file idt77105.h.
| #define IDT77105_DIAG_LCMASK 0x03 /* R/W, Loopback Control */ |
Definition at line 52 of file idt77105.h.
| #define IDT77105_DIAG_MPCS 0x20 /* R/W, Multi-PHY config'n select */ |
Definition at line 47 of file idt77105.h.
| #define IDT77105_DIAG_RFLUSH 0x10 /* R/W, clear receive FIFO */ |
Definition at line 48 of file idt77105.h.
| #define IDT77105_DIAG_ROS 0x40 /* R/W, RxClav operation select */ |
Definition at line 46 of file idt77105.h.
| #define IDT77105_DIAG_UMODE 0x02 /* R/W, Utopia (cell/byte) Mode */ |
Definition at line 51 of file idt77105.h.
| #define IDT77105_ISTAT 0x1 /* Interrupt Status */ |
Definition at line 16 of file idt77105.h.
| #define IDT77105_ISTAT_GOODSIG 0x40 /* R, Good Signal Bit */ |
Definition at line 36 of file idt77105.h.
| #define IDT77105_ISTAT_HECERR 0x20 /* sticky, HEC Error*/ |
Definition at line 37 of file idt77105.h.
| #define IDT77105_ISTAT_RFO 0x01 /* sticky, Rx FIFO Overrun */ |
Definition at line 42 of file idt77105.h.
| #define IDT77105_ISTAT_RSCC 0x04 /* sticky, Rx Signal Condition Change */ |
Definition at line 40 of file idt77105.h.
| #define IDT77105_ISTAT_RSE 0x02 /* sticky, Rx Symbol Error */ |
Definition at line 41 of file idt77105.h.
| #define IDT77105_ISTAT_SCR 0x10 /* sticky, Short Cell Received */ |
Definition at line 38 of file idt77105.h.
| #define IDT77105_ISTAT_TPE 0x08 /* sticky, Transmit Parity Error */ |
Definition at line 39 of file idt77105.h.
| #define IDT77105_LEDHEC 0x3 /* LED Driver & HEC Status/Control */ |
Definition at line 18 of file idt77105.h.
| #define IDT77105_LEDHEC_DRHC 0x40 /* R/W, Disable Rx HEC check */ |
Definition at line 59 of file idt77105.h.
| #define IDT77105_LEDHEC_DTHC 0x20 /* R/W, Disable Tx HEC calculation */ |
Definition at line 60 of file idt77105.h.
| #define IDT77105_LEDHEC_RLS 0x01 /* R, Rx LED Status (1=lit) */ |
Definition at line 64 of file idt77105.h.
| #define IDT77105_LEDHEC_RPW_1 0x00 /* RxRef active for 1 RxClk cycle */ |
Definition at line 66 of file idt77105.h.
| #define IDT77105_LEDHEC_RPW_2 0x08 /* RxRef active for 2 RxClk cycle */ |
Definition at line 67 of file idt77105.h.
| #define IDT77105_LEDHEC_RPW_4 0x10 /* RxRef active for 4 RxClk cycle */ |
Definition at line 68 of file idt77105.h.
| #define IDT77105_LEDHEC_RPW_8 0x18 /* RxRef active for 8 RxClk cycle */ |
Definition at line 69 of file idt77105.h.
| #define IDT77105_LEDHEC_RPWMASK 0x18 /* R/W, RxRef pulse width select */ |
Definition at line 61 of file idt77105.h.
| #define IDT77105_LEDHEC_TFS 0x04 /* R, Tx FIFO Status (1=empty) */ |
Definition at line 62 of file idt77105.h.
| #define IDT77105_LEDHEC_TLS 0x02 /* R, Tx LED Status (1=lit) */ |
Definition at line 63 of file idt77105.h.
| #define IDT77105_MCR 0x0 /* Master Control Register */ |
Definition at line 15 of file idt77105.h.
| #define IDT77105_MCR_DREC 0x40 /* R/W, Discard Receive Error Cells */ |
Definition at line 27 of file idt77105.h.
| #define IDT77105_MCR_DRIC 0x08 /* R/W, Discard Received Idle Cells */ |
Definition at line 30 of file idt77105.h.
| #define IDT77105_MCR_ECEIO |
Definition at line 28 of file idt77105.h.
| #define IDT77105_MCR_EIP 0x01 /* R/W, Enable Interrupt Pin */ |
Definition at line 33 of file idt77105.h.
| #define IDT77105_MCR_HALTTX 0x04 /* R/W, Halt Tx */ |
Definition at line 31 of file idt77105.h.
| #define IDT77105_MCR_TDPC 0x10 /* R/W, Transmit Data Parity Check */ |
Definition at line 29 of file idt77105.h.
| #define IDT77105_MCR_UMODE 0x02 /* R/W, Utopia (cell/byte) Mode */ |
Definition at line 32 of file idt77105.h.
| #define IDT77105_MCR_UPLO 0x80 /* R/W, User Prog'le Output Latch */ |
Definition at line 26 of file idt77105.h.
| #define IDT77105_RESTART_TIMER_PERIOD (5 * HZ) |
Definition at line 88 of file idt77105.h.
| #define IDT77105_STATS_TIMER_PERIOD (HZ) |
Definition at line 86 of file idt77105.h.
1.8.2