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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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#include <linux/bitops.h>Go to the source code of this file.
| #define IMX6Q_GPR0_CLOCK_0_MUX_SEL_ESAI1_IPP_DO_SCKR (0x2 << 28) |
Definition at line 37 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_0_MUX_SEL_ESAI1_IPP_IND_SCKR (0x1 << 28) |
Definition at line 36 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_0_MUX_SEL_ESAI1_IPP_IND_SCKR_MUXED (0x0 << 28) |
Definition at line 35 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_0_MUX_SEL_MASK (0x3 << 28) |
Definition at line 34 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_1_MUX_SEL_AUDMUX_RXCLK_P1 (0x1 << 16) |
Definition at line 65 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_1_MUX_SEL_AUDMUX_RXCLK_P1_MUXED (0x0 << 16) |
Definition at line 64 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_1_MUX_SEL_MASK (0x3 << 16) |
Definition at line 63 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_1_MUX_SEL_SSI1_SSI_RX_BIT_CLK (0x3 << 16) |
Definition at line 67 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_1_MUX_SEL_SSI1_SSI_SRCK (0x2 << 16) |
Definition at line 66 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_2_MUX_SEL_AUDMUX_RXCLK_P2 (0x1 << 20) |
Definition at line 55 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_2_MUX_SEL_AUDMUX_RXCLK_P2_MUXED (0x0 << 20) |
Definition at line 54 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_2_MUX_SEL_MASK (0x3 << 20) |
Definition at line 53 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_2_MUX_SEL_SSI2_RX_BIT_CLK (0x3 << 20) |
Definition at line 57 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_2_MUX_SEL_SSI2_SSI_SRCK (0x2 << 20) |
Definition at line 56 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_3_MUX_SEL_AUDMUX_RXCLK_P7 (0x3 << 24) |
Definition at line 45 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_3_MUX_SEL_AUDMUX_RXCLK_P7_MUXED (0x3 << 24) |
Definition at line 44 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_3_MUX_SEL_MASK (0x3 << 24) |
Definition at line 43 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_3_MUX_SEL_SSI3_RX_BIT_CLK (0x3 << 24) |
Definition at line 47 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_3_MUX_SEL_SSI3_SSI_SRCK (0x3 << 24) |
Definition at line 46 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_8_MUX_SEL_AUDMUX_RXCLK_P7 (0x1 << 30) |
Definition at line 31 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_8_MUX_SEL_AUDMUX_RXCLK_P7_MUXED (0x0 << 30) |
Definition at line 30 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_8_MUX_SEL_MASK (0x3 << 30) |
Definition at line 29 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_8_MUX_SEL_SSI3_RX_BIT_CLK (0x3 << 30) |
Definition at line 33 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_8_MUX_SEL_SSI3_SSI_SRCK (0x2 << 30) |
Definition at line 32 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_9_MUX_SEL_AUDMUX_TXCLK_P1 (0x1 << 18) |
Definition at line 60 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_9_MUX_SEL_AUDMUX_TXCLK_P1_MUXED (0x0 << 18) |
Definition at line 59 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_9_MUX_SEL_MASK (0x3 << 18) |
Definition at line 58 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_9_MUX_SEL_SSI1_SSI_STCK (0x2 << 18) |
Definition at line 61 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_9_MUX_SEL_SSI1_SSI_TX_BIT_CLK (0x3 << 18) |
Definition at line 62 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_A_MUX_SEL_AUDMUX_TXCLK_P2 (0x1 << 22) |
Definition at line 50 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_A_MUX_SEL_AUDMUX_TXCLK_P2_MUXED (0x0 << 22) |
Definition at line 49 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_A_MUX_SEL_MASK (0x3 << 22) |
Definition at line 48 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_A_MUX_SEL_SSI2_SSI_STCK (0x2 << 22) |
Definition at line 51 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_A_MUX_SEL_SSI2_TX_BIT_CLK (0x3 << 22) |
Definition at line 52 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_B_MUX_SEL_AUDMUX_TXCLK_P7 (0x1 << 26) |
Definition at line 40 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_B_MUX_SEL_AUDMUX_TXCLK_P7_MUXED (0x0 << 26) |
Definition at line 39 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_B_MUX_SEL_MASK (0x3 << 26) |
Definition at line 38 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_B_MUX_SEL_SSI3_SSI_STCK (0x2 << 26) |
Definition at line 41 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_CLOCK_B_MUX_SEL_SSI3_TX_BIT_CLK (0x3 << 26) |
Definition at line 42 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL0_IOMUX BIT(0) |
Definition at line 95 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL0_IPU1 0x0 |
Definition at line 94 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL0_MASK BIT(0) |
Definition at line 93 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL1_ECSPI1 0x0 |
Definition at line 91 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL1_I2C3 BIT(1) |
Definition at line 92 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL1_MASK BIT(1) |
Definition at line 90 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL2_ECSPI1 0x0 |
Definition at line 88 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL2_I2C2 BIT(2) |
Definition at line 89 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL2_MASK BIT(2) |
Definition at line 87 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL3_ECSPI2 0x0 |
Definition at line 85 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL3_I2C1 BIT(3) |
Definition at line 86 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL3_MASK BIT(3) |
Definition at line 84 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL4_ECSPI4 0x0 |
Definition at line 82 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL4_I2C1 BIT(4) |
Definition at line 83 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL4_MASK BIT(4) |
Definition at line 81 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL5_ECSPI4 0x0 |
Definition at line 79 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL5_EPIT2 BIT(5) |
Definition at line 80 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL5_MASK BIT(5) |
Definition at line 78 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL6_ESAI 0x0 |
Definition at line 76 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL6_I2C3 BIT(6) |
Definition at line 77 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL6_MASK BIT(6) |
Definition at line 75 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL7_IOMUX BIT(7) |
Definition at line 74 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL7_MASK BIT(7) |
Definition at line 72 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_DMAREQ_MUX_SEL7_SPDIF 0x0 |
Definition at line 73 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_TX_CLK2_MUX_SEL_ASRCK_CLK1 (0x0 << 14) |
Definition at line 69 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_TX_CLK2_MUX_SEL_ASRCK_CLK2 (0x1 << 14) |
Definition at line 70 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_TX_CLK2_MUX_SEL_ASRCK_CLK3 (0x2 << 14) |
Definition at line 71 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR0_TX_CLK2_MUX_SEL_MASK (0x3 << 14) |
Definition at line 68 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_DBG_CLK_EN BIT(12) |
Definition at line 255 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_DBG_EN BIT(13) |
Definition at line 254 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_DCIC1_MUX_CTL_IPU1_DI0 (0x0 << 0) |
Definition at line 267 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_DCIC1_MUX_CTL_IPU1_DI1 (0x1 << 0) |
Definition at line 268 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_DCIC1_MUX_CTL_IPU2_DI0 (0x2 << 0) |
Definition at line 269 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_DCIC1_MUX_CTL_IPU2_DI1 (0x3 << 0) |
Definition at line 270 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_DCIC1_MUX_CTL_MASK (0x3 << 0) |
Definition at line 266 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_DCIC2_MUX_CTL_IPU1_DI0 (0x0 << 2) |
Definition at line 262 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_DCIC2_MUX_CTL_IPU1_DI1 (0x1 << 2) |
Definition at line 263 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_DCIC2_MUX_CTL_IPU2_DI0 (0x2 << 2) |
Definition at line 264 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_DCIC2_MUX_CTL_IPU2_DI1 (0x3 << 2) |
Definition at line 265 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_DCIC2_MUX_CTL_MASK (0x3 << 2) |
Definition at line 261 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_LOCK_DBG_CLK_EN BIT(28) |
Definition at line 248 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_LOCK_DBG_EN BIT(29) |
Definition at line 247 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_LOCK_DCIC1_MUX_MASK (0x3 << 16) |
Definition at line 253 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_LOCK_DCIC2_MUX_MASK (0x3 << 18) |
Definition at line 252 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_LOCK_OCRAM_TZ_ADDR (0x3f << 21) |
Definition at line 250 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_LOCK_OCRAM_TZ_EN BIT(20) |
Definition at line 251 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_LOCK_SEC_ERR_RESP BIT(27) |
Definition at line 249 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_OCRAM_TZ_ADDR_MASK (0x3f << 5) |
Definition at line 259 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_OCRAM_TZ_EN_MASK BIT(4) |
Definition at line 260 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_SEC_ERR_RESP_MASK BIT(11) |
Definition at line 256 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_SEC_ERR_RESP_OKEY 0x0 |
Definition at line 257 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR10_SEC_ERR_RESP_SLVE BIT(11) |
Definition at line 258 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR12_ARMP_AHB_CLK_EN BIT(26) |
Definition at line 273 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR12_ARMP_APB_CLK_EN BIT(24) |
Definition at line 275 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR12_ARMP_ATB_CLK_EN BIT(25) |
Definition at line 274 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR12_ARMP_IPG_CLK_EN BIT(27) |
Definition at line 272 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR12_PCIE_CTL_2 BIT(10) |
Definition at line 276 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_CAN1_STOP_REQ BIT(28) |
Definition at line 280 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_CAN2_STOP_REQ BIT(29) |
Definition at line 279 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_ENET_STOP_REQ BIT(27) |
Definition at line 281 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_1_FAST (0x0 << 0) |
Definition at line 315 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_1_MASK (0x3 << 0) |
Definition at line 314 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_1_MED (0x1 << 0) |
Definition at line 316 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_1_SLOW (0x2 << 0) |
Definition at line 317 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_2_MASK (0x1f << 2) |
Definition at line 312 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_2_OFF 0x2 |
Definition at line 313 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_3_MASK (0xf << 7) |
Definition at line 310 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_3_OFF 0x7 |
Definition at line 311 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_4_10_16 (0x3 << 11) |
Definition at line 307 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_4_12_16 (0x2 << 11) |
Definition at line 306 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_4_14_16 (0x1 << 11) |
Definition at line 305 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_4_16_16 (0x0 << 11) |
Definition at line 304 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_4_8_16 (0x5 << 11) |
Definition at line 309 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_4_9_16 (0x4 << 11) |
Definition at line 308 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_4_MASK (0x7 << 11) |
Definition at line 303 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_5 BIT(14) |
Definition at line 302 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_6_MASK (0x7 << 16) |
Definition at line 298 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_7_MASK (0x1f << 19) |
Definition at line 291 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_7_SATA1I (0x10 << 19) |
Definition at line 292 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_7_SATA1M (0x10 << 19) |
Definition at line 293 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_7_SATA1X (0x1a << 19) |
Definition at line 294 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_7_SATA2I (0x12 << 19) |
Definition at line 295 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_7_SATA2M (0x12 << 19) |
Definition at line 296 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_7_SATA2X (0x1a << 19) |
Definition at line 297 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_8_0_5_DB (0x0 << 24) |
Definition at line 283 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_8_1_0_DB (0x1 << 24) |
Definition at line 284 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_8_1_5_DB (0x2 << 24) |
Definition at line 285 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_8_2_0_DB (0x3 << 24) |
Definition at line 286 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_8_2_5_DB (0x4 << 24) |
Definition at line 287 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_8_3_0_DB (0x5 << 24) |
Definition at line 288 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_8_3_5_DB (0x6 << 24) |
Definition at line 289 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_8_4_0_DB (0x7 << 24) |
Definition at line 290 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_PHY_8_MASK (0x7 << 24) |
Definition at line 282 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_SPEED_1P5G 0x0 |
Definition at line 300 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_SPEED_3P0G BIT(15) |
Definition at line 301 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SATA_SPEED_MASK BIT(15) |
Definition at line 299 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR13_SDMA_STOP_REQ BIT(30) |
Definition at line 278 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_ACT_CS0 BIT(0) |
Definition at line 136 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_ACT_CS1 BIT(3) |
Definition at line 134 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_ACT_CS2 BIT(6) |
Definition at line 132 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_ACT_CS3 BIT(9) |
Definition at line 130 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_ADDRS0_MASK (0x3 << 1) |
Definition at line 135 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_ADDRS1_MASK (0x3 << 4) |
Definition at line 133 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_ADDRS2_MASK (0x3 << 7) |
Definition at line 131 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_ADDRS3_128MB (0x2 << 10) |
Definition at line 129 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_ADDRS3_32MB (0x0 << 10) |
Definition at line 127 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_ADDRS3_64MB (0x1 << 10) |
Definition at line 128 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_ADDRS3_MASK (0x3 << 10) |
Definition at line 126 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_DPI_OFF BIT(24) |
Definition at line 102 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_EXC_MON_MASK BIT(22) |
Definition at line 103 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_EXC_MON_OKAY 0x0 |
Definition at line 104 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_EXC_MON_SLVE BIT(22) |
Definition at line 105 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_GINT BIT(12) |
Definition at line 125 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_IPU_VPU_MUX_IPU1 0x0 |
Definition at line 117 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_IPU_VPU_MUX_IPU2 BIT(17) |
Definition at line 118 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_IPU_VPU_MUX_MASK BIT(17) |
Definition at line 116 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_MIPI_COLOR_SW BIT(25) |
Definition at line 101 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_MIPI_IPU1_MUX_GASKET 0x0 |
Definition at line 110 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_MIPI_IPU1_MUX_IOMUX BIT(20) |
Definition at line 111 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_MIPI_IPU1_MUX_MASK BIT(20) |
Definition at line 109 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_MIPI_IPU2_MUX_GASKET 0x0 |
Definition at line 113 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_MIPI_IPU2_MUX_IOMUX BIT(19) |
Definition at line 114 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_MIPI_IPU2_MUX_MASK BIT(19) |
Definition at line 112 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_MIPI_IPU2_SEL_GASKET 0x0 |
Definition at line 107 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_MIPI_IPU2_SEL_IOMUX BIT(21) |
Definition at line 108 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_MIPI_IPU2_SEL_MASK BIT(21) |
Definition at line 106 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_PCIE_ENTER_L1 BIT(26) |
Definition at line 100 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_PCIE_EXIT_L1 BIT(28) |
Definition at line 98 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_PCIE_INT BIT(14) |
Definition at line 121 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_PCIE_RDY_L23 BIT(27) |
Definition at line 99 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_PCIE_REF_CLK_EN BIT(16) |
Definition at line 119 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_PCIE_REQ_MASK (0x3 << 30) |
Definition at line 97 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_PCIE_TEST_PD BIT(18) |
Definition at line 115 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_USB_EXP_MODE BIT(15) |
Definition at line 120 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_USB_OTG_ID_SEL_ENET_RX_ER 0x0 |
Definition at line 123 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_USB_OTG_ID_SEL_GPIO_1 BIT(13) |
Definition at line 124 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR1_USB_OTG_ID_SEL_MASK BIT(13) |
Definition at line 122 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_BGREF_RRMODE_EXT_RESISTOR 0x0 |
Definition at line 153 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_BGREF_RRMODE_INT_RESISTOR BIT(15) |
Definition at line 154 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_BGREF_RRMODE_MASK BIT(15) |
Definition at line 152 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_BIT_MAPPING_CH0_JEIDA BIT(6) |
Definition at line 169 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_BIT_MAPPING_CH0_MASK BIT(6) |
Definition at line 167 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_BIT_MAPPING_CH0_SPWG 0x0 |
Definition at line 168 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_BIT_MAPPING_CH1_JEIDA BIT(8) |
Definition at line 163 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_BIT_MAPPING_CH1_MASK BIT(8) |
Definition at line 161 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_BIT_MAPPING_CH1_SPWG 0x0 |
Definition at line 162 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_CH0_MODE_DISABLE (0x0 << 0) |
Definition at line 179 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_CH0_MODE_EN_ROUTE_DI0 (0x1 << 0) |
Definition at line 180 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_CH0_MODE_EN_ROUTE_DI1 (0x3 << 0) |
Definition at line 181 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_CH0_MODE_MASK (0x3 << 0) |
Definition at line 178 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_CH1_MODE_DISABLE (0x0 << 2) |
Definition at line 175 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_CH1_MODE_EN_ROUTE_DI0 (0x1 << 2) |
Definition at line 176 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_CH1_MODE_EN_ROUTE_DI1 (0x3 << 2) |
Definition at line 177 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_CH1_MODE_MASK (0x3 << 2) |
Definition at line 174 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_COUNTER_RESET_VAL_3 (0x1 << 20) |
Definition at line 140 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_COUNTER_RESET_VAL_4 (0x2 << 20) |
Definition at line 141 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_COUNTER_RESET_VAL_5 (0x0 << 20) |
Definition at line 139 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_COUNTER_RESET_VAL_6 (0x3 << 20) |
Definition at line 142 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_COUNTER_RESET_VAL_MASK (0x3 << 20) |
Definition at line 138 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_DATA_WIDTH_CH0_18BIT 0x0 |
Definition at line 171 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_DATA_WIDTH_CH0_24BIT BIT(5) |
Definition at line 172 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_DATA_WIDTH_CH0_MASK BIT(5) |
Definition at line 170 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_DATA_WIDTH_CH1_18BIT 0x0 |
Definition at line 165 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_DATA_WIDTH_CH1_24BIT BIT(7) |
Definition at line 166 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_DATA_WIDTH_CH1_MASK BIT(7) |
Definition at line 164 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_DI0_VS_POLARITY_ACTIVE_H 0x0 |
Definition at line 159 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_DI0_VS_POLARITY_ACTIVE_L BIT(9) |
Definition at line 160 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_DI0_VS_POLARITY_MASK BIT(9) |
Definition at line 158 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_DI1_VS_POLARITY_ACTIVE_H 0x0 |
Definition at line 156 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_DI1_VS_POLARITY_ACTIVE_L BIT(10) |
Definition at line 157 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_DI1_VS_POLARITY_MASK BIT(10) |
Definition at line 155 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_LVDS_CLK_SHIFT_0 (0x0 << 16) |
Definition at line 144 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_LVDS_CLK_SHIFT_1 (0x1 << 16) |
Definition at line 145 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_LVDS_CLK_SHIFT_2 (0x2 << 16) |
Definition at line 146 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_LVDS_CLK_SHIFT_3 (0x3 << 16) |
Definition at line 147 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_LVDS_CLK_SHIFT_4 (0x4 << 16) |
Definition at line 148 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_LVDS_CLK_SHIFT_5 (0x5 << 16) |
Definition at line 149 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_LVDS_CLK_SHIFT_6 (0x6 << 16) |
Definition at line 150 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_LVDS_CLK_SHIFT_7 (0x7 << 16) |
Definition at line 151 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_LVDS_CLK_SHIFT_MASK (0x7 << 16) |
Definition at line 143 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR2_SPLIT_MODE_EN BIT(4) |
Definition at line 173 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_BCH_RD_CACHE_CTL BIT(27) |
Definition at line 188 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_BCH_WR_CACHE_CTL BIT(28) |
Definition at line 187 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_CORE0_DBG_ACK_EN BIT(13) |
Definition at line 196 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_CORE1_DBG_ACK_EN BIT(14) |
Definition at line 195 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_CORE2_DBG_ACK_EN BIT(15) |
Definition at line 194 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_CORE3_DBG_ACK_EN BIT(16) |
Definition at line 193 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_GPU_DBG_GPU2D (0x1 << 29) |
Definition at line 185 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_GPU_DBG_GPU3D (0x0 << 29) |
Definition at line 184 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_GPU_DBG_MASK (0x3 << 29) |
Definition at line 183 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_GPU_DBG_OPENVG (0x2 << 29) |
Definition at line 186 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_HDMI_MUX_CTL_IPU1_DI0 (0x0 << 2) |
Definition at line 216 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_HDMI_MUX_CTL_IPU1_DI1 (0x1 << 2) |
Definition at line 217 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_HDMI_MUX_CTL_IPU2_DI0 (0x2 << 2) |
Definition at line 218 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_HDMI_MUX_CTL_IPU2_DI1 (0x3 << 2) |
Definition at line 219 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_HDMI_MUX_CTL_MASK (0x3 << 2) |
Definition at line 215 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_IPU_DIAG_MASK BIT(10) |
Definition at line 199 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_LVDS0_MUX_CTL_IPU1_DI0 (0x0 << 6) |
Definition at line 206 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_LVDS0_MUX_CTL_IPU1_DI1 (0x1 << 6) |
Definition at line 207 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_LVDS0_MUX_CTL_IPU2_DI0 (0x2 << 6) |
Definition at line 208 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_LVDS0_MUX_CTL_IPU2_DI1 (0x3 << 6) |
Definition at line 209 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_LVDS0_MUX_CTL_MASK (0x3 << 6) |
Definition at line 205 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_LVDS1_MUX_CTL_IPU1_DI0 (0x0 << 8) |
Definition at line 201 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_LVDS1_MUX_CTL_IPU1_DI1 (0x1 << 8) |
Definition at line 202 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_LVDS1_MUX_CTL_IPU2_DI0 (0x2 << 8) |
Definition at line 203 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_LVDS1_MUX_CTL_IPU2_DI1 (0x3 << 8) |
Definition at line 204 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_LVDS1_MUX_CTL_MASK (0x3 << 8) |
Definition at line 200 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU1_DI0 (0x0 << 4) |
Definition at line 211 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU1_DI1 (0x1 << 4) |
Definition at line 212 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU2_DI0 (0x2 << 4) |
Definition at line 213 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU2_DI1 (0x3 << 4) |
Definition at line 214 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_MIPI_MUX_CTL_MASK (0x3 << 4) |
Definition at line 210 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_OCRAM_CTL_MASK (0xf << 21) |
Definition at line 191 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_OCRAM_STATUS_MASK (0xf << 17) |
Definition at line 192 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_TZASC1_BOOT_LOCK BIT(11) |
Definition at line 198 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_TZASC2_BOOT_LOCK BIT(12) |
Definition at line 197 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_USDHCX_RD_CACHE_CTL BIT(25) |
Definition at line 190 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR3_USDHCX_WR_CACHE_CTL BIT(26) |
Definition at line 189 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_CAN1_STOP_ACK BIT(17) |
Definition at line 231 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_CAN2_STOP_ACK BIT(18) |
Definition at line 230 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_ENET_STOP_ACK BIT(16) |
Definition at line 232 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_IPU_RD_CACHE_CTL BIT(0) |
Definition at line 240 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_IPU_WR_CACHE_CTL BIT(1) |
Definition at line 239 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_PCIE_RD_CACHE_SEL BIT(26) |
Definition at line 226 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_PCIE_RD_CACHE_VAL BIT(24) |
Definition at line 228 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_PCIE_WR_CACHE_SEL BIT(27) |
Definition at line 225 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_PCIE_WR_CACHE_VAL BIT(25) |
Definition at line 227 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_SDMA_STOP_ACK BIT(19) |
Definition at line 229 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_SOC_VERSION_MASK (0xff << 8) |
Definition at line 233 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_SOC_VERSION_OFF 0x8 |
Definition at line 234 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_VDOA_RD_CACHE_SEL BIT(30) |
Definition at line 222 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_VDOA_RD_CACHE_VAL BIT(28) |
Definition at line 224 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_VDOA_WR_CACHE_SEL BIT(31) |
Definition at line 221 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_VDOA_WR_CACHE_VAL BIT(29) |
Definition at line 223 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_VPU_P_RD_CACHE_VAL_MASK BIT(2) |
Definition at line 238 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_VPU_P_WR_CACHE_VAL BIT(3) |
Definition at line 237 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_VPU_RD_CACHE_SEL BIT(6) |
Definition at line 236 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR4_VPU_WR_CACHE_SEL BIT(7) |
Definition at line 235 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR5_L2_CLK_STOP BIT(8) |
Definition at line 242 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR9_TZASC1_BYP BIT(0) |
Definition at line 245 of file imx6q-iomuxc-gpr.h.
| #define IMX6Q_GPR9_TZASC2_BYP BIT(1) |
Definition at line 244 of file imx6q-iomuxc-gpr.h.
| #define IOMUXC_GPR0 0x00 |
Definition at line 14 of file imx6q-iomuxc-gpr.h.
| #define IOMUXC_GPR1 0x04 |
Definition at line 15 of file imx6q-iomuxc-gpr.h.
| #define IOMUXC_GPR10 0x28 |
Definition at line 24 of file imx6q-iomuxc-gpr.h.
| #define IOMUXC_GPR11 0x2c |
Definition at line 25 of file imx6q-iomuxc-gpr.h.
| #define IOMUXC_GPR12 0x30 |
Definition at line 26 of file imx6q-iomuxc-gpr.h.
| #define IOMUXC_GPR13 0x34 |
Definition at line 27 of file imx6q-iomuxc-gpr.h.
| #define IOMUXC_GPR2 0x08 |
Definition at line 16 of file imx6q-iomuxc-gpr.h.
| #define IOMUXC_GPR3 0x0c |
Definition at line 17 of file imx6q-iomuxc-gpr.h.
| #define IOMUXC_GPR4 0x10 |
Definition at line 18 of file imx6q-iomuxc-gpr.h.
| #define IOMUXC_GPR5 0x14 |
Definition at line 19 of file imx6q-iomuxc-gpr.h.
| #define IOMUXC_GPR6 0x18 |
Definition at line 20 of file imx6q-iomuxc-gpr.h.
| #define IOMUXC_GPR7 0x1c |
Definition at line 21 of file imx6q-iomuxc-gpr.h.
| #define IOMUXC_GPR8 0x20 |
Definition at line 22 of file imx6q-iomuxc-gpr.h.
| #define IOMUXC_GPR9 0x24 |
Definition at line 23 of file imx6q-iomuxc-gpr.h.
1.8.2