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registers.h
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1 /*
2  * ARIZONA register definitions
3  *
4  * Copyright 2012 Wolfson Microelectronics plc
5  *
6  * Author: Mark Brown <[email protected]>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 
13 #ifndef _ARIZONA_REGISTERS_H
14 #define _ARIZONA_REGISTERS_H
15 
16 /*
17  * Register values.
18  */
19 #define ARIZONA_SOFTWARE_RESET 0x00
20 #define ARIZONA_DEVICE_REVISION 0x01
21 #define ARIZONA_CTRL_IF_SPI_CFG_1 0x08
22 #define ARIZONA_CTRL_IF_I2C1_CFG_1 0x09
23 #define ARIZONA_CTRL_IF_I2C2_CFG_1 0x0A
24 #define ARIZONA_CTRL_IF_I2C1_CFG_2 0x0B
25 #define ARIZONA_CTRL_IF_I2C2_CFG_2 0x0C
26 #define ARIZONA_CTRL_IF_STATUS_1 0x0D
27 #define ARIZONA_WRITE_SEQUENCER_CTRL_0 0x16
28 #define ARIZONA_WRITE_SEQUENCER_CTRL_1 0x17
29 #define ARIZONA_WRITE_SEQUENCER_CTRL_2 0x18
30 #define ARIZONA_WRITE_SEQUENCER_PROM 0x1A
31 #define ARIZONA_TONE_GENERATOR_1 0x20
32 #define ARIZONA_TONE_GENERATOR_2 0x21
33 #define ARIZONA_TONE_GENERATOR_3 0x22
34 #define ARIZONA_TONE_GENERATOR_4 0x23
35 #define ARIZONA_TONE_GENERATOR_5 0x24
36 #define ARIZONA_PWM_DRIVE_1 0x30
37 #define ARIZONA_PWM_DRIVE_2 0x31
38 #define ARIZONA_PWM_DRIVE_3 0x32
39 #define ARIZONA_WAKE_CONTROL 0x40
40 #define ARIZONA_SEQUENCE_CONTROL 0x41
41 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1 0x61
42 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2 0x62
43 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3 0x63
44 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4 0x64
45 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1 0x68
46 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2 0x69
47 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3 0x6A
48 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4 0x6B
49 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5 0x6C
50 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6 0x6D
51 #define ARIZONA_COMFORT_NOISE_GENERATOR 0x70
52 #define ARIZONA_HAPTICS_CONTROL_1 0x90
53 #define ARIZONA_HAPTICS_CONTROL_2 0x91
54 #define ARIZONA_HAPTICS_PHASE_1_INTENSITY 0x92
55 #define ARIZONA_HAPTICS_PHASE_1_DURATION 0x93
56 #define ARIZONA_HAPTICS_PHASE_2_INTENSITY 0x94
57 #define ARIZONA_HAPTICS_PHASE_2_DURATION 0x95
58 #define ARIZONA_HAPTICS_PHASE_3_INTENSITY 0x96
59 #define ARIZONA_HAPTICS_PHASE_3_DURATION 0x97
60 #define ARIZONA_HAPTICS_STATUS 0x98
61 #define ARIZONA_CLOCK_32K_1 0x100
62 #define ARIZONA_SYSTEM_CLOCK_1 0x101
63 #define ARIZONA_SAMPLE_RATE_1 0x102
64 #define ARIZONA_SAMPLE_RATE_2 0x103
65 #define ARIZONA_SAMPLE_RATE_3 0x104
66 #define ARIZONA_SAMPLE_RATE_1_STATUS 0x10A
67 #define ARIZONA_SAMPLE_RATE_2_STATUS 0x10B
68 #define ARIZONA_SAMPLE_RATE_3_STATUS 0x10C
69 #define ARIZONA_ASYNC_CLOCK_1 0x112
70 #define ARIZONA_ASYNC_SAMPLE_RATE_1 0x113
71 #define ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS 0x11B
72 #define ARIZONA_OUTPUT_SYSTEM_CLOCK 0x149
73 #define ARIZONA_OUTPUT_ASYNC_CLOCK 0x14A
74 #define ARIZONA_RATE_ESTIMATOR_1 0x152
75 #define ARIZONA_RATE_ESTIMATOR_2 0x153
76 #define ARIZONA_RATE_ESTIMATOR_3 0x154
77 #define ARIZONA_RATE_ESTIMATOR_4 0x155
78 #define ARIZONA_RATE_ESTIMATOR_5 0x156
79 #define ARIZONA_FLL1_CONTROL_1 0x171
80 #define ARIZONA_FLL1_CONTROL_2 0x172
81 #define ARIZONA_FLL1_CONTROL_3 0x173
82 #define ARIZONA_FLL1_CONTROL_4 0x174
83 #define ARIZONA_FLL1_CONTROL_5 0x175
84 #define ARIZONA_FLL1_CONTROL_6 0x176
85 #define ARIZONA_FLL1_LOOP_FILTER_TEST_1 0x177
86 #define ARIZONA_FLL1_NCO_TEST_0 0x178
87 #define ARIZONA_FLL1_SYNCHRONISER_1 0x181
88 #define ARIZONA_FLL1_SYNCHRONISER_2 0x182
89 #define ARIZONA_FLL1_SYNCHRONISER_3 0x183
90 #define ARIZONA_FLL1_SYNCHRONISER_4 0x184
91 #define ARIZONA_FLL1_SYNCHRONISER_5 0x185
92 #define ARIZONA_FLL1_SYNCHRONISER_6 0x186
93 #define ARIZONA_FLL1_SPREAD_SPECTRUM 0x189
94 #define ARIZONA_FLL1_GPIO_CLOCK 0x18A
95 #define ARIZONA_FLL2_CONTROL_1 0x191
96 #define ARIZONA_FLL2_CONTROL_2 0x192
97 #define ARIZONA_FLL2_CONTROL_3 0x193
98 #define ARIZONA_FLL2_CONTROL_4 0x194
99 #define ARIZONA_FLL2_CONTROL_5 0x195
100 #define ARIZONA_FLL2_CONTROL_6 0x196
101 #define ARIZONA_FLL2_LOOP_FILTER_TEST_1 0x197
102 #define ARIZONA_FLL2_NCO_TEST_0 0x198
103 #define ARIZONA_FLL2_SYNCHRONISER_1 0x1A1
104 #define ARIZONA_FLL2_SYNCHRONISER_2 0x1A2
105 #define ARIZONA_FLL2_SYNCHRONISER_3 0x1A3
106 #define ARIZONA_FLL2_SYNCHRONISER_4 0x1A4
107 #define ARIZONA_FLL2_SYNCHRONISER_5 0x1A5
108 #define ARIZONA_FLL2_SYNCHRONISER_6 0x1A6
109 #define ARIZONA_FLL2_SPREAD_SPECTRUM 0x1A9
110 #define ARIZONA_FLL2_GPIO_CLOCK 0x1AA
111 #define ARIZONA_MIC_CHARGE_PUMP_1 0x200
112 #define ARIZONA_LDO1_CONTROL_1 0x210
113 #define ARIZONA_LDO2_CONTROL_1 0x213
114 #define ARIZONA_MIC_BIAS_CTRL_1 0x218
115 #define ARIZONA_MIC_BIAS_CTRL_2 0x219
116 #define ARIZONA_MIC_BIAS_CTRL_3 0x21A
117 #define ARIZONA_ACCESSORY_DETECT_MODE_1 0x293
118 #define ARIZONA_HEADPHONE_DETECT_1 0x29B
119 #define ARIZONA_HEADPHONE_DETECT_2 0x29C
120 #define ARIZONA_MIC_DETECT_1 0x2A3
121 #define ARIZONA_MIC_DETECT_2 0x2A4
122 #define ARIZONA_MIC_DETECT_3 0x2A5
123 #define ARIZONA_MIC_NOISE_MIX_CONTROL_1 0x2C3
124 #define ARIZONA_ISOLATION_CONTROL 0x2CB
125 #define ARIZONA_JACK_DETECT_ANALOGUE 0x2D3
126 #define ARIZONA_INPUT_ENABLES 0x300
127 #define ARIZONA_INPUT_ENABLES_STATUS 0x301
128 #define ARIZONA_INPUT_RATE 0x308
129 #define ARIZONA_INPUT_VOLUME_RAMP 0x309
130 #define ARIZONA_IN1L_CONTROL 0x310
131 #define ARIZONA_ADC_DIGITAL_VOLUME_1L 0x311
132 #define ARIZONA_DMIC1L_CONTROL 0x312
133 #define ARIZONA_IN1R_CONTROL 0x314
134 #define ARIZONA_ADC_DIGITAL_VOLUME_1R 0x315
135 #define ARIZONA_DMIC1R_CONTROL 0x316
136 #define ARIZONA_IN2L_CONTROL 0x318
137 #define ARIZONA_ADC_DIGITAL_VOLUME_2L 0x319
138 #define ARIZONA_DMIC2L_CONTROL 0x31A
139 #define ARIZONA_IN2R_CONTROL 0x31C
140 #define ARIZONA_ADC_DIGITAL_VOLUME_2R 0x31D
141 #define ARIZONA_DMIC2R_CONTROL 0x31E
142 #define ARIZONA_IN3L_CONTROL 0x320
143 #define ARIZONA_ADC_DIGITAL_VOLUME_3L 0x321
144 #define ARIZONA_DMIC3L_CONTROL 0x322
145 #define ARIZONA_IN3R_CONTROL 0x324
146 #define ARIZONA_ADC_DIGITAL_VOLUME_3R 0x325
147 #define ARIZONA_DMIC3R_CONTROL 0x326
148 #define ARIZONA_IN4L_CONTROL 0x328
149 #define ARIZONA_ADC_DIGITAL_VOLUME_4L 0x329
150 #define ARIZONA_DMIC4L_CONTROL 0x32A
151 #define ARIZONA_ADC_DIGITAL_VOLUME_4R 0x32D
152 #define ARIZONA_DMIC4R_CONTROL 0x32E
153 #define ARIZONA_OUTPUT_ENABLES_1 0x400
154 #define ARIZONA_OUTPUT_STATUS_1 0x401
155 #define ARIZONA_RAW_OUTPUT_STATUS_1 0x406
156 #define ARIZONA_OUTPUT_RATE_1 0x408
157 #define ARIZONA_OUTPUT_VOLUME_RAMP 0x409
158 #define ARIZONA_OUTPUT_PATH_CONFIG_1L 0x410
159 #define ARIZONA_DAC_DIGITAL_VOLUME_1L 0x411
160 #define ARIZONA_DAC_VOLUME_LIMIT_1L 0x412
161 #define ARIZONA_NOISE_GATE_SELECT_1L 0x413
162 #define ARIZONA_OUTPUT_PATH_CONFIG_1R 0x414
163 #define ARIZONA_DAC_DIGITAL_VOLUME_1R 0x415
164 #define ARIZONA_DAC_VOLUME_LIMIT_1R 0x416
165 #define ARIZONA_NOISE_GATE_SELECT_1R 0x417
166 #define ARIZONA_OUTPUT_PATH_CONFIG_2L 0x418
167 #define ARIZONA_DAC_DIGITAL_VOLUME_2L 0x419
168 #define ARIZONA_DAC_VOLUME_LIMIT_2L 0x41A
169 #define ARIZONA_NOISE_GATE_SELECT_2L 0x41B
170 #define ARIZONA_OUTPUT_PATH_CONFIG_2R 0x41C
171 #define ARIZONA_DAC_DIGITAL_VOLUME_2R 0x41D
172 #define ARIZONA_DAC_VOLUME_LIMIT_2R 0x41E
173 #define ARIZONA_NOISE_GATE_SELECT_2R 0x41F
174 #define ARIZONA_OUTPUT_PATH_CONFIG_3L 0x420
175 #define ARIZONA_DAC_DIGITAL_VOLUME_3L 0x421
176 #define ARIZONA_DAC_VOLUME_LIMIT_3L 0x422
177 #define ARIZONA_NOISE_GATE_SELECT_3L 0x423
178 #define ARIZONA_OUTPUT_PATH_CONFIG_3R 0x424
179 #define ARIZONA_DAC_DIGITAL_VOLUME_3R 0x425
180 #define ARIZONA_DAC_VOLUME_LIMIT_3R 0x426
181 #define ARIZONA_NOISE_GATE_SELECT_3R 0x427
182 #define ARIZONA_OUTPUT_PATH_CONFIG_4L 0x428
183 #define ARIZONA_DAC_DIGITAL_VOLUME_4L 0x429
184 #define ARIZONA_OUT_VOLUME_4L 0x42A
185 #define ARIZONA_NOISE_GATE_SELECT_4L 0x42B
186 #define ARIZONA_OUTPUT_PATH_CONFIG_4R 0x42C
187 #define ARIZONA_DAC_DIGITAL_VOLUME_4R 0x42D
188 #define ARIZONA_OUT_VOLUME_4R 0x42E
189 #define ARIZONA_NOISE_GATE_SELECT_4R 0x42F
190 #define ARIZONA_OUTPUT_PATH_CONFIG_5L 0x430
191 #define ARIZONA_DAC_DIGITAL_VOLUME_5L 0x431
192 #define ARIZONA_DAC_VOLUME_LIMIT_5L 0x432
193 #define ARIZONA_NOISE_GATE_SELECT_5L 0x433
194 #define ARIZONA_OUTPUT_PATH_CONFIG_5R 0x434
195 #define ARIZONA_DAC_DIGITAL_VOLUME_5R 0x435
196 #define ARIZONA_DAC_VOLUME_LIMIT_5R 0x436
197 #define ARIZONA_NOISE_GATE_SELECT_5R 0x437
198 #define ARIZONA_OUTPUT_PATH_CONFIG_6L 0x438
199 #define ARIZONA_DAC_DIGITAL_VOLUME_6L 0x439
200 #define ARIZONA_DAC_VOLUME_LIMIT_6L 0x43A
201 #define ARIZONA_NOISE_GATE_SELECT_6L 0x43B
202 #define ARIZONA_OUTPUT_PATH_CONFIG_6R 0x43C
203 #define ARIZONA_DAC_DIGITAL_VOLUME_6R 0x43D
204 #define ARIZONA_DAC_VOLUME_LIMIT_6R 0x43E
205 #define ARIZONA_NOISE_GATE_SELECT_6R 0x43F
206 #define ARIZONA_DAC_AEC_CONTROL_1 0x450
207 #define ARIZONA_NOISE_GATE_CONTROL 0x458
208 #define ARIZONA_PDM_SPK1_CTRL_1 0x490
209 #define ARIZONA_PDM_SPK1_CTRL_2 0x491
210 #define ARIZONA_PDM_SPK2_CTRL_1 0x492
211 #define ARIZONA_PDM_SPK2_CTRL_2 0x493
212 #define ARIZONA_DAC_COMP_1 0x4DC
213 #define ARIZONA_DAC_COMP_2 0x4DD
214 #define ARIZONA_DAC_COMP_3 0x4DE
215 #define ARIZONA_DAC_COMP_4 0x4DF
216 #define ARIZONA_AIF1_BCLK_CTRL 0x500
217 #define ARIZONA_AIF1_TX_PIN_CTRL 0x501
218 #define ARIZONA_AIF1_RX_PIN_CTRL 0x502
219 #define ARIZONA_AIF1_RATE_CTRL 0x503
220 #define ARIZONA_AIF1_FORMAT 0x504
221 #define ARIZONA_AIF1_TX_BCLK_RATE 0x505
222 #define ARIZONA_AIF1_RX_BCLK_RATE 0x506
223 #define ARIZONA_AIF1_FRAME_CTRL_1 0x507
224 #define ARIZONA_AIF1_FRAME_CTRL_2 0x508
225 #define ARIZONA_AIF1_FRAME_CTRL_3 0x509
226 #define ARIZONA_AIF1_FRAME_CTRL_4 0x50A
227 #define ARIZONA_AIF1_FRAME_CTRL_5 0x50B
228 #define ARIZONA_AIF1_FRAME_CTRL_6 0x50C
229 #define ARIZONA_AIF1_FRAME_CTRL_7 0x50D
230 #define ARIZONA_AIF1_FRAME_CTRL_8 0x50E
231 #define ARIZONA_AIF1_FRAME_CTRL_9 0x50F
232 #define ARIZONA_AIF1_FRAME_CTRL_10 0x510
233 #define ARIZONA_AIF1_FRAME_CTRL_11 0x511
234 #define ARIZONA_AIF1_FRAME_CTRL_12 0x512
235 #define ARIZONA_AIF1_FRAME_CTRL_13 0x513
236 #define ARIZONA_AIF1_FRAME_CTRL_14 0x514
237 #define ARIZONA_AIF1_FRAME_CTRL_15 0x515
238 #define ARIZONA_AIF1_FRAME_CTRL_16 0x516
239 #define ARIZONA_AIF1_FRAME_CTRL_17 0x517
240 #define ARIZONA_AIF1_FRAME_CTRL_18 0x518
241 #define ARIZONA_AIF1_TX_ENABLES 0x519
242 #define ARIZONA_AIF1_RX_ENABLES 0x51A
243 #define ARIZONA_AIF1_FORCE_WRITE 0x51B
244 #define ARIZONA_AIF2_BCLK_CTRL 0x540
245 #define ARIZONA_AIF2_TX_PIN_CTRL 0x541
246 #define ARIZONA_AIF2_RX_PIN_CTRL 0x542
247 #define ARIZONA_AIF2_RATE_CTRL 0x543
248 #define ARIZONA_AIF2_FORMAT 0x544
249 #define ARIZONA_AIF2_TX_BCLK_RATE 0x545
250 #define ARIZONA_AIF2_RX_BCLK_RATE 0x546
251 #define ARIZONA_AIF2_FRAME_CTRL_1 0x547
252 #define ARIZONA_AIF2_FRAME_CTRL_2 0x548
253 #define ARIZONA_AIF2_FRAME_CTRL_3 0x549
254 #define ARIZONA_AIF2_FRAME_CTRL_4 0x54A
255 #define ARIZONA_AIF2_FRAME_CTRL_11 0x551
256 #define ARIZONA_AIF2_FRAME_CTRL_12 0x552
257 #define ARIZONA_AIF2_TX_ENABLES 0x559
258 #define ARIZONA_AIF2_RX_ENABLES 0x55A
259 #define ARIZONA_AIF2_FORCE_WRITE 0x55B
260 #define ARIZONA_AIF3_BCLK_CTRL 0x580
261 #define ARIZONA_AIF3_TX_PIN_CTRL 0x581
262 #define ARIZONA_AIF3_RX_PIN_CTRL 0x582
263 #define ARIZONA_AIF3_RATE_CTRL 0x583
264 #define ARIZONA_AIF3_FORMAT 0x584
265 #define ARIZONA_AIF3_TX_BCLK_RATE 0x585
266 #define ARIZONA_AIF3_RX_BCLK_RATE 0x586
267 #define ARIZONA_AIF3_FRAME_CTRL_1 0x587
268 #define ARIZONA_AIF3_FRAME_CTRL_2 0x588
269 #define ARIZONA_AIF3_FRAME_CTRL_3 0x589
270 #define ARIZONA_AIF3_FRAME_CTRL_4 0x58A
271 #define ARIZONA_AIF3_FRAME_CTRL_11 0x591
272 #define ARIZONA_AIF3_FRAME_CTRL_12 0x592
273 #define ARIZONA_AIF3_TX_ENABLES 0x599
274 #define ARIZONA_AIF3_RX_ENABLES 0x59A
275 #define ARIZONA_AIF3_FORCE_WRITE 0x59B
276 #define ARIZONA_SLIMBUS_FRAMER_REF_GEAR 0x5E3
277 #define ARIZONA_SLIMBUS_RATES_1 0x5E5
278 #define ARIZONA_SLIMBUS_RATES_2 0x5E6
279 #define ARIZONA_SLIMBUS_RATES_3 0x5E7
280 #define ARIZONA_SLIMBUS_RATES_4 0x5E8
281 #define ARIZONA_SLIMBUS_RATES_5 0x5E9
282 #define ARIZONA_SLIMBUS_RATES_6 0x5EA
283 #define ARIZONA_SLIMBUS_RATES_7 0x5EB
284 #define ARIZONA_SLIMBUS_RATES_8 0x5EC
285 #define ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE 0x5F5
286 #define ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE 0x5F6
287 #define ARIZONA_SLIMBUS_RX_PORT_STATUS 0x5F7
288 #define ARIZONA_SLIMBUS_TX_PORT_STATUS 0x5F8
289 #define ARIZONA_PWM1MIX_INPUT_1_SOURCE 0x640
290 #define ARIZONA_PWM1MIX_INPUT_1_VOLUME 0x641
291 #define ARIZONA_PWM1MIX_INPUT_2_SOURCE 0x642
292 #define ARIZONA_PWM1MIX_INPUT_2_VOLUME 0x643
293 #define ARIZONA_PWM1MIX_INPUT_3_SOURCE 0x644
294 #define ARIZONA_PWM1MIX_INPUT_3_VOLUME 0x645
295 #define ARIZONA_PWM1MIX_INPUT_4_SOURCE 0x646
296 #define ARIZONA_PWM1MIX_INPUT_4_VOLUME 0x647
297 #define ARIZONA_PWM2MIX_INPUT_1_SOURCE 0x648
298 #define ARIZONA_PWM2MIX_INPUT_1_VOLUME 0x649
299 #define ARIZONA_PWM2MIX_INPUT_2_SOURCE 0x64A
300 #define ARIZONA_PWM2MIX_INPUT_2_VOLUME 0x64B
301 #define ARIZONA_PWM2MIX_INPUT_3_SOURCE 0x64C
302 #define ARIZONA_PWM2MIX_INPUT_3_VOLUME 0x64D
303 #define ARIZONA_PWM2MIX_INPUT_4_SOURCE 0x64E
304 #define ARIZONA_PWM2MIX_INPUT_4_VOLUME 0x64F
305 #define ARIZONA_MICMIX_INPUT_1_SOURCE 0x660
306 #define ARIZONA_MICMIX_INPUT_1_VOLUME 0x661
307 #define ARIZONA_MICMIX_INPUT_2_SOURCE 0x662
308 #define ARIZONA_MICMIX_INPUT_2_VOLUME 0x663
309 #define ARIZONA_MICMIX_INPUT_3_SOURCE 0x664
310 #define ARIZONA_MICMIX_INPUT_3_VOLUME 0x665
311 #define ARIZONA_MICMIX_INPUT_4_SOURCE 0x666
312 #define ARIZONA_MICMIX_INPUT_4_VOLUME 0x667
313 #define ARIZONA_NOISEMIX_INPUT_1_SOURCE 0x668
314 #define ARIZONA_NOISEMIX_INPUT_1_VOLUME 0x669
315 #define ARIZONA_NOISEMIX_INPUT_2_SOURCE 0x66A
316 #define ARIZONA_NOISEMIX_INPUT_2_VOLUME 0x66B
317 #define ARIZONA_NOISEMIX_INPUT_3_SOURCE 0x66C
318 #define ARIZONA_NOISEMIX_INPUT_3_VOLUME 0x66D
319 #define ARIZONA_NOISEMIX_INPUT_4_SOURCE 0x66E
320 #define ARIZONA_NOISEMIX_INPUT_4_VOLUME 0x66F
321 #define ARIZONA_OUT1LMIX_INPUT_1_SOURCE 0x680
322 #define ARIZONA_OUT1LMIX_INPUT_1_VOLUME 0x681
323 #define ARIZONA_OUT1LMIX_INPUT_2_SOURCE 0x682
324 #define ARIZONA_OUT1LMIX_INPUT_2_VOLUME 0x683
325 #define ARIZONA_OUT1LMIX_INPUT_3_SOURCE 0x684
326 #define ARIZONA_OUT1LMIX_INPUT_3_VOLUME 0x685
327 #define ARIZONA_OUT1LMIX_INPUT_4_SOURCE 0x686
328 #define ARIZONA_OUT1LMIX_INPUT_4_VOLUME 0x687
329 #define ARIZONA_OUT1RMIX_INPUT_1_SOURCE 0x688
330 #define ARIZONA_OUT1RMIX_INPUT_1_VOLUME 0x689
331 #define ARIZONA_OUT1RMIX_INPUT_2_SOURCE 0x68A
332 #define ARIZONA_OUT1RMIX_INPUT_2_VOLUME 0x68B
333 #define ARIZONA_OUT1RMIX_INPUT_3_SOURCE 0x68C
334 #define ARIZONA_OUT1RMIX_INPUT_3_VOLUME 0x68D
335 #define ARIZONA_OUT1RMIX_INPUT_4_SOURCE 0x68E
336 #define ARIZONA_OUT1RMIX_INPUT_4_VOLUME 0x68F
337 #define ARIZONA_OUT2LMIX_INPUT_1_SOURCE 0x690
338 #define ARIZONA_OUT2LMIX_INPUT_1_VOLUME 0x691
339 #define ARIZONA_OUT2LMIX_INPUT_2_SOURCE 0x692
340 #define ARIZONA_OUT2LMIX_INPUT_2_VOLUME 0x693
341 #define ARIZONA_OUT2LMIX_INPUT_3_SOURCE 0x694
342 #define ARIZONA_OUT2LMIX_INPUT_3_VOLUME 0x695
343 #define ARIZONA_OUT2LMIX_INPUT_4_SOURCE 0x696
344 #define ARIZONA_OUT2LMIX_INPUT_4_VOLUME 0x697
345 #define ARIZONA_OUT2RMIX_INPUT_1_SOURCE 0x698
346 #define ARIZONA_OUT2RMIX_INPUT_1_VOLUME 0x699
347 #define ARIZONA_OUT2RMIX_INPUT_2_SOURCE 0x69A
348 #define ARIZONA_OUT2RMIX_INPUT_2_VOLUME 0x69B
349 #define ARIZONA_OUT2RMIX_INPUT_3_SOURCE 0x69C
350 #define ARIZONA_OUT2RMIX_INPUT_3_VOLUME 0x69D
351 #define ARIZONA_OUT2RMIX_INPUT_4_SOURCE 0x69E
352 #define ARIZONA_OUT2RMIX_INPUT_4_VOLUME 0x69F
353 #define ARIZONA_OUT3LMIX_INPUT_1_SOURCE 0x6A0
354 #define ARIZONA_OUT3LMIX_INPUT_1_VOLUME 0x6A1
355 #define ARIZONA_OUT3LMIX_INPUT_2_SOURCE 0x6A2
356 #define ARIZONA_OUT3LMIX_INPUT_2_VOLUME 0x6A3
357 #define ARIZONA_OUT3LMIX_INPUT_3_SOURCE 0x6A4
358 #define ARIZONA_OUT3LMIX_INPUT_3_VOLUME 0x6A5
359 #define ARIZONA_OUT3LMIX_INPUT_4_SOURCE 0x6A6
360 #define ARIZONA_OUT3LMIX_INPUT_4_VOLUME 0x6A7
361 #define ARIZONA_OUT3RMIX_INPUT_1_SOURCE 0x6A8
362 #define ARIZONA_OUT3RMIX_INPUT_1_VOLUME 0x6A9
363 #define ARIZONA_OUT3RMIX_INPUT_2_SOURCE 0x6AA
364 #define ARIZONA_OUT3RMIX_INPUT_2_VOLUME 0x6AB
365 #define ARIZONA_OUT3RMIX_INPUT_3_SOURCE 0x6AC
366 #define ARIZONA_OUT3RMIX_INPUT_3_VOLUME 0x6AD
367 #define ARIZONA_OUT3RMIX_INPUT_4_SOURCE 0x6AE
368 #define ARIZONA_OUT3RMIX_INPUT_4_VOLUME 0x6AF
369 #define ARIZONA_OUT4LMIX_INPUT_1_SOURCE 0x6B0
370 #define ARIZONA_OUT4LMIX_INPUT_1_VOLUME 0x6B1
371 #define ARIZONA_OUT4LMIX_INPUT_2_SOURCE 0x6B2
372 #define ARIZONA_OUT4LMIX_INPUT_2_VOLUME 0x6B3
373 #define ARIZONA_OUT4LMIX_INPUT_3_SOURCE 0x6B4
374 #define ARIZONA_OUT4LMIX_INPUT_3_VOLUME 0x6B5
375 #define ARIZONA_OUT4LMIX_INPUT_4_SOURCE 0x6B6
376 #define ARIZONA_OUT4LMIX_INPUT_4_VOLUME 0x6B7
377 #define ARIZONA_OUT4RMIX_INPUT_1_SOURCE 0x6B8
378 #define ARIZONA_OUT4RMIX_INPUT_1_VOLUME 0x6B9
379 #define ARIZONA_OUT4RMIX_INPUT_2_SOURCE 0x6BA
380 #define ARIZONA_OUT4RMIX_INPUT_2_VOLUME 0x6BB
381 #define ARIZONA_OUT4RMIX_INPUT_3_SOURCE 0x6BC
382 #define ARIZONA_OUT4RMIX_INPUT_3_VOLUME 0x6BD
383 #define ARIZONA_OUT4RMIX_INPUT_4_SOURCE 0x6BE
384 #define ARIZONA_OUT4RMIX_INPUT_4_VOLUME 0x6BF
385 #define ARIZONA_OUT5LMIX_INPUT_1_SOURCE 0x6C0
386 #define ARIZONA_OUT5LMIX_INPUT_1_VOLUME 0x6C1
387 #define ARIZONA_OUT5LMIX_INPUT_2_SOURCE 0x6C2
388 #define ARIZONA_OUT5LMIX_INPUT_2_VOLUME 0x6C3
389 #define ARIZONA_OUT5LMIX_INPUT_3_SOURCE 0x6C4
390 #define ARIZONA_OUT5LMIX_INPUT_3_VOLUME 0x6C5
391 #define ARIZONA_OUT5LMIX_INPUT_4_SOURCE 0x6C6
392 #define ARIZONA_OUT5LMIX_INPUT_4_VOLUME 0x6C7
393 #define ARIZONA_OUT5RMIX_INPUT_1_SOURCE 0x6C8
394 #define ARIZONA_OUT5RMIX_INPUT_1_VOLUME 0x6C9
395 #define ARIZONA_OUT5RMIX_INPUT_2_SOURCE 0x6CA
396 #define ARIZONA_OUT5RMIX_INPUT_2_VOLUME 0x6CB
397 #define ARIZONA_OUT5RMIX_INPUT_3_SOURCE 0x6CC
398 #define ARIZONA_OUT5RMIX_INPUT_3_VOLUME 0x6CD
399 #define ARIZONA_OUT5RMIX_INPUT_4_SOURCE 0x6CE
400 #define ARIZONA_OUT5RMIX_INPUT_4_VOLUME 0x6CF
401 #define ARIZONA_OUT6LMIX_INPUT_1_SOURCE 0x6D0
402 #define ARIZONA_OUT6LMIX_INPUT_1_VOLUME 0x6D1
403 #define ARIZONA_OUT6LMIX_INPUT_2_SOURCE 0x6D2
404 #define ARIZONA_OUT6LMIX_INPUT_2_VOLUME 0x6D3
405 #define ARIZONA_OUT6LMIX_INPUT_3_SOURCE 0x6D4
406 #define ARIZONA_OUT6LMIX_INPUT_3_VOLUME 0x6D5
407 #define ARIZONA_OUT6LMIX_INPUT_4_SOURCE 0x6D6
408 #define ARIZONA_OUT6LMIX_INPUT_4_VOLUME 0x6D7
409 #define ARIZONA_OUT6RMIX_INPUT_1_SOURCE 0x6D8
410 #define ARIZONA_OUT6RMIX_INPUT_1_VOLUME 0x6D9
411 #define ARIZONA_OUT6RMIX_INPUT_2_SOURCE 0x6DA
412 #define ARIZONA_OUT6RMIX_INPUT_2_VOLUME 0x6DB
413 #define ARIZONA_OUT6RMIX_INPUT_3_SOURCE 0x6DC
414 #define ARIZONA_OUT6RMIX_INPUT_3_VOLUME 0x6DD
415 #define ARIZONA_OUT6RMIX_INPUT_4_SOURCE 0x6DE
416 #define ARIZONA_OUT6RMIX_INPUT_4_VOLUME 0x6DF
417 #define ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE 0x700
418 #define ARIZONA_AIF1TX1MIX_INPUT_1_VOLUME 0x701
419 #define ARIZONA_AIF1TX1MIX_INPUT_2_SOURCE 0x702
420 #define ARIZONA_AIF1TX1MIX_INPUT_2_VOLUME 0x703
421 #define ARIZONA_AIF1TX1MIX_INPUT_3_SOURCE 0x704
422 #define ARIZONA_AIF1TX1MIX_INPUT_3_VOLUME 0x705
423 #define ARIZONA_AIF1TX1MIX_INPUT_4_SOURCE 0x706
424 #define ARIZONA_AIF1TX1MIX_INPUT_4_VOLUME 0x707
425 #define ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE 0x708
426 #define ARIZONA_AIF1TX2MIX_INPUT_1_VOLUME 0x709
427 #define ARIZONA_AIF1TX2MIX_INPUT_2_SOURCE 0x70A
428 #define ARIZONA_AIF1TX2MIX_INPUT_2_VOLUME 0x70B
429 #define ARIZONA_AIF1TX2MIX_INPUT_3_SOURCE 0x70C
430 #define ARIZONA_AIF1TX2MIX_INPUT_3_VOLUME 0x70D
431 #define ARIZONA_AIF1TX2MIX_INPUT_4_SOURCE 0x70E
432 #define ARIZONA_AIF1TX2MIX_INPUT_4_VOLUME 0x70F
433 #define ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE 0x710
434 #define ARIZONA_AIF1TX3MIX_INPUT_1_VOLUME 0x711
435 #define ARIZONA_AIF1TX3MIX_INPUT_2_SOURCE 0x712
436 #define ARIZONA_AIF1TX3MIX_INPUT_2_VOLUME 0x713
437 #define ARIZONA_AIF1TX3MIX_INPUT_3_SOURCE 0x714
438 #define ARIZONA_AIF1TX3MIX_INPUT_3_VOLUME 0x715
439 #define ARIZONA_AIF1TX3MIX_INPUT_4_SOURCE 0x716
440 #define ARIZONA_AIF1TX3MIX_INPUT_4_VOLUME 0x717
441 #define ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE 0x718
442 #define ARIZONA_AIF1TX4MIX_INPUT_1_VOLUME 0x719
443 #define ARIZONA_AIF1TX4MIX_INPUT_2_SOURCE 0x71A
444 #define ARIZONA_AIF1TX4MIX_INPUT_2_VOLUME 0x71B
445 #define ARIZONA_AIF1TX4MIX_INPUT_3_SOURCE 0x71C
446 #define ARIZONA_AIF1TX4MIX_INPUT_3_VOLUME 0x71D
447 #define ARIZONA_AIF1TX4MIX_INPUT_4_SOURCE 0x71E
448 #define ARIZONA_AIF1TX4MIX_INPUT_4_VOLUME 0x71F
449 #define ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE 0x720
450 #define ARIZONA_AIF1TX5MIX_INPUT_1_VOLUME 0x721
451 #define ARIZONA_AIF1TX5MIX_INPUT_2_SOURCE 0x722
452 #define ARIZONA_AIF1TX5MIX_INPUT_2_VOLUME 0x723
453 #define ARIZONA_AIF1TX5MIX_INPUT_3_SOURCE 0x724
454 #define ARIZONA_AIF1TX5MIX_INPUT_3_VOLUME 0x725
455 #define ARIZONA_AIF1TX5MIX_INPUT_4_SOURCE 0x726
456 #define ARIZONA_AIF1TX5MIX_INPUT_4_VOLUME 0x727
457 #define ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE 0x728
458 #define ARIZONA_AIF1TX6MIX_INPUT_1_VOLUME 0x729
459 #define ARIZONA_AIF1TX6MIX_INPUT_2_SOURCE 0x72A
460 #define ARIZONA_AIF1TX6MIX_INPUT_2_VOLUME 0x72B
461 #define ARIZONA_AIF1TX6MIX_INPUT_3_SOURCE 0x72C
462 #define ARIZONA_AIF1TX6MIX_INPUT_3_VOLUME 0x72D
463 #define ARIZONA_AIF1TX6MIX_INPUT_4_SOURCE 0x72E
464 #define ARIZONA_AIF1TX6MIX_INPUT_4_VOLUME 0x72F
465 #define ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE 0x730
466 #define ARIZONA_AIF1TX7MIX_INPUT_1_VOLUME 0x731
467 #define ARIZONA_AIF1TX7MIX_INPUT_2_SOURCE 0x732
468 #define ARIZONA_AIF1TX7MIX_INPUT_2_VOLUME 0x733
469 #define ARIZONA_AIF1TX7MIX_INPUT_3_SOURCE 0x734
470 #define ARIZONA_AIF1TX7MIX_INPUT_3_VOLUME 0x735
471 #define ARIZONA_AIF1TX7MIX_INPUT_4_SOURCE 0x736
472 #define ARIZONA_AIF1TX7MIX_INPUT_4_VOLUME 0x737
473 #define ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE 0x738
474 #define ARIZONA_AIF1TX8MIX_INPUT_1_VOLUME 0x739
475 #define ARIZONA_AIF1TX8MIX_INPUT_2_SOURCE 0x73A
476 #define ARIZONA_AIF1TX8MIX_INPUT_2_VOLUME 0x73B
477 #define ARIZONA_AIF1TX8MIX_INPUT_3_SOURCE 0x73C
478 #define ARIZONA_AIF1TX8MIX_INPUT_3_VOLUME 0x73D
479 #define ARIZONA_AIF1TX8MIX_INPUT_4_SOURCE 0x73E
480 #define ARIZONA_AIF1TX8MIX_INPUT_4_VOLUME 0x73F
481 #define ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE 0x740
482 #define ARIZONA_AIF2TX1MIX_INPUT_1_VOLUME 0x741
483 #define ARIZONA_AIF2TX1MIX_INPUT_2_SOURCE 0x742
484 #define ARIZONA_AIF2TX1MIX_INPUT_2_VOLUME 0x743
485 #define ARIZONA_AIF2TX1MIX_INPUT_3_SOURCE 0x744
486 #define ARIZONA_AIF2TX1MIX_INPUT_3_VOLUME 0x745
487 #define ARIZONA_AIF2TX1MIX_INPUT_4_SOURCE 0x746
488 #define ARIZONA_AIF2TX1MIX_INPUT_4_VOLUME 0x747
489 #define ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE 0x748
490 #define ARIZONA_AIF2TX2MIX_INPUT_1_VOLUME 0x749
491 #define ARIZONA_AIF2TX2MIX_INPUT_2_SOURCE 0x74A
492 #define ARIZONA_AIF2TX2MIX_INPUT_2_VOLUME 0x74B
493 #define ARIZONA_AIF2TX2MIX_INPUT_3_SOURCE 0x74C
494 #define ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME 0x74D
495 #define ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE 0x74E
496 #define ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME 0x74F
497 #define ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE 0x780
498 #define ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME 0x781
499 #define ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE 0x782
500 #define ARIZONA_AIF3TX1MIX_INPUT_2_VOLUME 0x783
501 #define ARIZONA_AIF3TX1MIX_INPUT_3_SOURCE 0x784
502 #define ARIZONA_AIF3TX1MIX_INPUT_3_VOLUME 0x785
503 #define ARIZONA_AIF3TX1MIX_INPUT_4_SOURCE 0x786
504 #define ARIZONA_AIF3TX1MIX_INPUT_4_VOLUME 0x787
505 #define ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE 0x788
506 #define ARIZONA_AIF3TX2MIX_INPUT_1_VOLUME 0x789
507 #define ARIZONA_AIF3TX2MIX_INPUT_2_SOURCE 0x78A
508 #define ARIZONA_AIF3TX2MIX_INPUT_2_VOLUME 0x78B
509 #define ARIZONA_AIF3TX2MIX_INPUT_3_SOURCE 0x78C
510 #define ARIZONA_AIF3TX2MIX_INPUT_3_VOLUME 0x78D
511 #define ARIZONA_AIF3TX2MIX_INPUT_4_SOURCE 0x78E
512 #define ARIZONA_AIF3TX2MIX_INPUT_4_VOLUME 0x78F
513 #define ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE 0x7C0
514 #define ARIZONA_SLIMTX1MIX_INPUT_1_VOLUME 0x7C1
515 #define ARIZONA_SLIMTX1MIX_INPUT_2_SOURCE 0x7C2
516 #define ARIZONA_SLIMTX1MIX_INPUT_2_VOLUME 0x7C3
517 #define ARIZONA_SLIMTX1MIX_INPUT_3_SOURCE 0x7C4
518 #define ARIZONA_SLIMTX1MIX_INPUT_3_VOLUME 0x7C5
519 #define ARIZONA_SLIMTX1MIX_INPUT_4_SOURCE 0x7C6
520 #define ARIZONA_SLIMTX1MIX_INPUT_4_VOLUME 0x7C7
521 #define ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE 0x7C8
522 #define ARIZONA_SLIMTX2MIX_INPUT_1_VOLUME 0x7C9
523 #define ARIZONA_SLIMTX2MIX_INPUT_2_SOURCE 0x7CA
524 #define ARIZONA_SLIMTX2MIX_INPUT_2_VOLUME 0x7CB
525 #define ARIZONA_SLIMTX2MIX_INPUT_3_SOURCE 0x7CC
526 #define ARIZONA_SLIMTX2MIX_INPUT_3_VOLUME 0x7CD
527 #define ARIZONA_SLIMTX2MIX_INPUT_4_SOURCE 0x7CE
528 #define ARIZONA_SLIMTX2MIX_INPUT_4_VOLUME 0x7CF
529 #define ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE 0x7D0
530 #define ARIZONA_SLIMTX3MIX_INPUT_1_VOLUME 0x7D1
531 #define ARIZONA_SLIMTX3MIX_INPUT_2_SOURCE 0x7D2
532 #define ARIZONA_SLIMTX3MIX_INPUT_2_VOLUME 0x7D3
533 #define ARIZONA_SLIMTX3MIX_INPUT_3_SOURCE 0x7D4
534 #define ARIZONA_SLIMTX3MIX_INPUT_3_VOLUME 0x7D5
535 #define ARIZONA_SLIMTX3MIX_INPUT_4_SOURCE 0x7D6
536 #define ARIZONA_SLIMTX3MIX_INPUT_4_VOLUME 0x7D7
537 #define ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE 0x7D8
538 #define ARIZONA_SLIMTX4MIX_INPUT_1_VOLUME 0x7D9
539 #define ARIZONA_SLIMTX4MIX_INPUT_2_SOURCE 0x7DA
540 #define ARIZONA_SLIMTX4MIX_INPUT_2_VOLUME 0x7DB
541 #define ARIZONA_SLIMTX4MIX_INPUT_3_SOURCE 0x7DC
542 #define ARIZONA_SLIMTX4MIX_INPUT_3_VOLUME 0x7DD
543 #define ARIZONA_SLIMTX4MIX_INPUT_4_SOURCE 0x7DE
544 #define ARIZONA_SLIMTX4MIX_INPUT_4_VOLUME 0x7DF
545 #define ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE 0x7E0
546 #define ARIZONA_SLIMTX5MIX_INPUT_1_VOLUME 0x7E1
547 #define ARIZONA_SLIMTX5MIX_INPUT_2_SOURCE 0x7E2
548 #define ARIZONA_SLIMTX5MIX_INPUT_2_VOLUME 0x7E3
549 #define ARIZONA_SLIMTX5MIX_INPUT_3_SOURCE 0x7E4
550 #define ARIZONA_SLIMTX5MIX_INPUT_3_VOLUME 0x7E5
551 #define ARIZONA_SLIMTX5MIX_INPUT_4_SOURCE 0x7E6
552 #define ARIZONA_SLIMTX5MIX_INPUT_4_VOLUME 0x7E7
553 #define ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE 0x7E8
554 #define ARIZONA_SLIMTX6MIX_INPUT_1_VOLUME 0x7E9
555 #define ARIZONA_SLIMTX6MIX_INPUT_2_SOURCE 0x7EA
556 #define ARIZONA_SLIMTX6MIX_INPUT_2_VOLUME 0x7EB
557 #define ARIZONA_SLIMTX6MIX_INPUT_3_SOURCE 0x7EC
558 #define ARIZONA_SLIMTX6MIX_INPUT_3_VOLUME 0x7ED
559 #define ARIZONA_SLIMTX6MIX_INPUT_4_SOURCE 0x7EE
560 #define ARIZONA_SLIMTX6MIX_INPUT_4_VOLUME 0x7EF
561 #define ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE 0x7F0
562 #define ARIZONA_SLIMTX7MIX_INPUT_1_VOLUME 0x7F1
563 #define ARIZONA_SLIMTX7MIX_INPUT_2_SOURCE 0x7F2
564 #define ARIZONA_SLIMTX7MIX_INPUT_2_VOLUME 0x7F3
565 #define ARIZONA_SLIMTX7MIX_INPUT_3_SOURCE 0x7F4
566 #define ARIZONA_SLIMTX7MIX_INPUT_3_VOLUME 0x7F5
567 #define ARIZONA_SLIMTX7MIX_INPUT_4_SOURCE 0x7F6
568 #define ARIZONA_SLIMTX7MIX_INPUT_4_VOLUME 0x7F7
569 #define ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE 0x7F8
570 #define ARIZONA_SLIMTX8MIX_INPUT_1_VOLUME 0x7F9
571 #define ARIZONA_SLIMTX8MIX_INPUT_2_SOURCE 0x7FA
572 #define ARIZONA_SLIMTX8MIX_INPUT_2_VOLUME 0x7FB
573 #define ARIZONA_SLIMTX8MIX_INPUT_3_SOURCE 0x7FC
574 #define ARIZONA_SLIMTX8MIX_INPUT_3_VOLUME 0x7FD
575 #define ARIZONA_SLIMTX8MIX_INPUT_4_SOURCE 0x7FE
576 #define ARIZONA_SLIMTX8MIX_INPUT_4_VOLUME 0x7FF
577 #define ARIZONA_EQ1MIX_INPUT_1_SOURCE 0x880
578 #define ARIZONA_EQ1MIX_INPUT_1_VOLUME 0x881
579 #define ARIZONA_EQ1MIX_INPUT_2_SOURCE 0x882
580 #define ARIZONA_EQ1MIX_INPUT_2_VOLUME 0x883
581 #define ARIZONA_EQ1MIX_INPUT_3_SOURCE 0x884
582 #define ARIZONA_EQ1MIX_INPUT_3_VOLUME 0x885
583 #define ARIZONA_EQ1MIX_INPUT_4_SOURCE 0x886
584 #define ARIZONA_EQ1MIX_INPUT_4_VOLUME 0x887
585 #define ARIZONA_EQ2MIX_INPUT_1_SOURCE 0x888
586 #define ARIZONA_EQ2MIX_INPUT_1_VOLUME 0x889
587 #define ARIZONA_EQ2MIX_INPUT_2_SOURCE 0x88A
588 #define ARIZONA_EQ2MIX_INPUT_2_VOLUME 0x88B
589 #define ARIZONA_EQ2MIX_INPUT_3_SOURCE 0x88C
590 #define ARIZONA_EQ2MIX_INPUT_3_VOLUME 0x88D
591 #define ARIZONA_EQ2MIX_INPUT_4_SOURCE 0x88E
592 #define ARIZONA_EQ2MIX_INPUT_4_VOLUME 0x88F
593 #define ARIZONA_EQ3MIX_INPUT_1_SOURCE 0x890
594 #define ARIZONA_EQ3MIX_INPUT_1_VOLUME 0x891
595 #define ARIZONA_EQ3MIX_INPUT_2_SOURCE 0x892
596 #define ARIZONA_EQ3MIX_INPUT_2_VOLUME 0x893
597 #define ARIZONA_EQ3MIX_INPUT_3_SOURCE 0x894
598 #define ARIZONA_EQ3MIX_INPUT_3_VOLUME 0x895
599 #define ARIZONA_EQ3MIX_INPUT_4_SOURCE 0x896
600 #define ARIZONA_EQ3MIX_INPUT_4_VOLUME 0x897
601 #define ARIZONA_EQ4MIX_INPUT_1_SOURCE 0x898
602 #define ARIZONA_EQ4MIX_INPUT_1_VOLUME 0x899
603 #define ARIZONA_EQ4MIX_INPUT_2_SOURCE 0x89A
604 #define ARIZONA_EQ4MIX_INPUT_2_VOLUME 0x89B
605 #define ARIZONA_EQ4MIX_INPUT_3_SOURCE 0x89C
606 #define ARIZONA_EQ4MIX_INPUT_3_VOLUME 0x89D
607 #define ARIZONA_EQ4MIX_INPUT_4_SOURCE 0x89E
608 #define ARIZONA_EQ4MIX_INPUT_4_VOLUME 0x89F
609 #define ARIZONA_DRC1LMIX_INPUT_1_SOURCE 0x8C0
610 #define ARIZONA_DRC1LMIX_INPUT_1_VOLUME 0x8C1
611 #define ARIZONA_DRC1LMIX_INPUT_2_SOURCE 0x8C2
612 #define ARIZONA_DRC1LMIX_INPUT_2_VOLUME 0x8C3
613 #define ARIZONA_DRC1LMIX_INPUT_3_SOURCE 0x8C4
614 #define ARIZONA_DRC1LMIX_INPUT_3_VOLUME 0x8C5
615 #define ARIZONA_DRC1LMIX_INPUT_4_SOURCE 0x8C6
616 #define ARIZONA_DRC1LMIX_INPUT_4_VOLUME 0x8C7
617 #define ARIZONA_DRC1RMIX_INPUT_1_SOURCE 0x8C8
618 #define ARIZONA_DRC1RMIX_INPUT_1_VOLUME 0x8C9
619 #define ARIZONA_DRC1RMIX_INPUT_2_SOURCE 0x8CA
620 #define ARIZONA_DRC1RMIX_INPUT_2_VOLUME 0x8CB
621 #define ARIZONA_DRC1RMIX_INPUT_3_SOURCE 0x8CC
622 #define ARIZONA_DRC1RMIX_INPUT_3_VOLUME 0x8CD
623 #define ARIZONA_DRC1RMIX_INPUT_4_SOURCE 0x8CE
624 #define ARIZONA_DRC1RMIX_INPUT_4_VOLUME 0x8CF
625 #define ARIZONA_DRC2LMIX_INPUT_1_SOURCE 0x8D0
626 #define ARIZONA_DRC2LMIX_INPUT_1_VOLUME 0x8D1
627 #define ARIZONA_DRC2LMIX_INPUT_2_SOURCE 0x8D2
628 #define ARIZONA_DRC2LMIX_INPUT_2_VOLUME 0x8D3
629 #define ARIZONA_DRC2LMIX_INPUT_3_SOURCE 0x8D4
630 #define ARIZONA_DRC2LMIX_INPUT_3_VOLUME 0x8D5
631 #define ARIZONA_DRC2LMIX_INPUT_4_SOURCE 0x8D6
632 #define ARIZONA_DRC2LMIX_INPUT_4_VOLUME 0x8D7
633 #define ARIZONA_DRC2RMIX_INPUT_1_SOURCE 0x8D8
634 #define ARIZONA_DRC2RMIX_INPUT_1_VOLUME 0x8D9
635 #define ARIZONA_DRC2RMIX_INPUT_2_SOURCE 0x8DA
636 #define ARIZONA_DRC2RMIX_INPUT_2_VOLUME 0x8DB
637 #define ARIZONA_DRC2RMIX_INPUT_3_SOURCE 0x8DC
638 #define ARIZONA_DRC2RMIX_INPUT_3_VOLUME 0x8DD
639 #define ARIZONA_DRC2RMIX_INPUT_4_SOURCE 0x8DE
640 #define ARIZONA_DRC2RMIX_INPUT_4_VOLUME 0x8DF
641 #define ARIZONA_HPLP1MIX_INPUT_1_SOURCE 0x900
642 #define ARIZONA_HPLP1MIX_INPUT_1_VOLUME 0x901
643 #define ARIZONA_HPLP1MIX_INPUT_2_SOURCE 0x902
644 #define ARIZONA_HPLP1MIX_INPUT_2_VOLUME 0x903
645 #define ARIZONA_HPLP1MIX_INPUT_3_SOURCE 0x904
646 #define ARIZONA_HPLP1MIX_INPUT_3_VOLUME 0x905
647 #define ARIZONA_HPLP1MIX_INPUT_4_SOURCE 0x906
648 #define ARIZONA_HPLP1MIX_INPUT_4_VOLUME 0x907
649 #define ARIZONA_HPLP2MIX_INPUT_1_SOURCE 0x908
650 #define ARIZONA_HPLP2MIX_INPUT_1_VOLUME 0x909
651 #define ARIZONA_HPLP2MIX_INPUT_2_SOURCE 0x90A
652 #define ARIZONA_HPLP2MIX_INPUT_2_VOLUME 0x90B
653 #define ARIZONA_HPLP2MIX_INPUT_3_SOURCE 0x90C
654 #define ARIZONA_HPLP2MIX_INPUT_3_VOLUME 0x90D
655 #define ARIZONA_HPLP2MIX_INPUT_4_SOURCE 0x90E
656 #define ARIZONA_HPLP2MIX_INPUT_4_VOLUME 0x90F
657 #define ARIZONA_HPLP3MIX_INPUT_1_SOURCE 0x910
658 #define ARIZONA_HPLP3MIX_INPUT_1_VOLUME 0x911
659 #define ARIZONA_HPLP3MIX_INPUT_2_SOURCE 0x912
660 #define ARIZONA_HPLP3MIX_INPUT_2_VOLUME 0x913
661 #define ARIZONA_HPLP3MIX_INPUT_3_SOURCE 0x914
662 #define ARIZONA_HPLP3MIX_INPUT_3_VOLUME 0x915
663 #define ARIZONA_HPLP3MIX_INPUT_4_SOURCE 0x916
664 #define ARIZONA_HPLP3MIX_INPUT_4_VOLUME 0x917
665 #define ARIZONA_HPLP4MIX_INPUT_1_SOURCE 0x918
666 #define ARIZONA_HPLP4MIX_INPUT_1_VOLUME 0x919
667 #define ARIZONA_HPLP4MIX_INPUT_2_SOURCE 0x91A
668 #define ARIZONA_HPLP4MIX_INPUT_2_VOLUME 0x91B
669 #define ARIZONA_HPLP4MIX_INPUT_3_SOURCE 0x91C
670 #define ARIZONA_HPLP4MIX_INPUT_3_VOLUME 0x91D
671 #define ARIZONA_HPLP4MIX_INPUT_4_SOURCE 0x91E
672 #define ARIZONA_HPLP4MIX_INPUT_4_VOLUME 0x91F
673 #define ARIZONA_DSP1LMIX_INPUT_1_SOURCE 0x940
674 #define ARIZONA_DSP1LMIX_INPUT_1_VOLUME 0x941
675 #define ARIZONA_DSP1LMIX_INPUT_2_SOURCE 0x942
676 #define ARIZONA_DSP1LMIX_INPUT_2_VOLUME 0x943
677 #define ARIZONA_DSP1LMIX_INPUT_3_SOURCE 0x944
678 #define ARIZONA_DSP1LMIX_INPUT_3_VOLUME 0x945
679 #define ARIZONA_DSP1LMIX_INPUT_4_SOURCE 0x946
680 #define ARIZONA_DSP1LMIX_INPUT_4_VOLUME 0x947
681 #define ARIZONA_DSP1RMIX_INPUT_1_SOURCE 0x948
682 #define ARIZONA_DSP1RMIX_INPUT_1_VOLUME 0x949
683 #define ARIZONA_DSP1RMIX_INPUT_2_SOURCE 0x94A
684 #define ARIZONA_DSP1RMIX_INPUT_2_VOLUME 0x94B
685 #define ARIZONA_DSP1RMIX_INPUT_3_SOURCE 0x94C
686 #define ARIZONA_DSP1RMIX_INPUT_3_VOLUME 0x94D
687 #define ARIZONA_DSP1RMIX_INPUT_4_SOURCE 0x94E
688 #define ARIZONA_DSP1RMIX_INPUT_4_VOLUME 0x94F
689 #define ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE 0x950
690 #define ARIZONA_DSP1AUX2MIX_INPUT_1_SOURCE 0x958
691 #define ARIZONA_DSP1AUX3MIX_INPUT_1_SOURCE 0x960
692 #define ARIZONA_DSP1AUX4MIX_INPUT_1_SOURCE 0x968
693 #define ARIZONA_DSP1AUX5MIX_INPUT_1_SOURCE 0x970
694 #define ARIZONA_DSP1AUX6MIX_INPUT_1_SOURCE 0x978
695 #define ARIZONA_DSP2LMIX_INPUT_1_SOURCE 0x980
696 #define ARIZONA_DSP2LMIX_INPUT_1_VOLUME 0x981
697 #define ARIZONA_DSP2LMIX_INPUT_2_SOURCE 0x982
698 #define ARIZONA_DSP2LMIX_INPUT_2_VOLUME 0x983
699 #define ARIZONA_DSP2LMIX_INPUT_3_SOURCE 0x984
700 #define ARIZONA_DSP2LMIX_INPUT_3_VOLUME 0x985
701 #define ARIZONA_DSP2LMIX_INPUT_4_SOURCE 0x986
702 #define ARIZONA_DSP2LMIX_INPUT_4_VOLUME 0x987
703 #define ARIZONA_DSP2RMIX_INPUT_1_SOURCE 0x988
704 #define ARIZONA_DSP2RMIX_INPUT_1_VOLUME 0x989
705 #define ARIZONA_DSP2RMIX_INPUT_2_SOURCE 0x98A
706 #define ARIZONA_DSP2RMIX_INPUT_2_VOLUME 0x98B
707 #define ARIZONA_DSP2RMIX_INPUT_3_SOURCE 0x98C
708 #define ARIZONA_DSP2RMIX_INPUT_3_VOLUME 0x98D
709 #define ARIZONA_DSP2RMIX_INPUT_4_SOURCE 0x98E
710 #define ARIZONA_DSP2RMIX_INPUT_4_VOLUME 0x98F
711 #define ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE 0x990
712 #define ARIZONA_DSP2AUX2MIX_INPUT_1_SOURCE 0x998
713 #define ARIZONA_DSP2AUX3MIX_INPUT_1_SOURCE 0x9A0
714 #define ARIZONA_DSP2AUX4MIX_INPUT_1_SOURCE 0x9A8
715 #define ARIZONA_DSP2AUX5MIX_INPUT_1_SOURCE 0x9B0
716 #define ARIZONA_DSP2AUX6MIX_INPUT_1_SOURCE 0x9B8
717 #define ARIZONA_DSP3LMIX_INPUT_1_SOURCE 0x9C0
718 #define ARIZONA_DSP3LMIX_INPUT_1_VOLUME 0x9C1
719 #define ARIZONA_DSP3LMIX_INPUT_2_SOURCE 0x9C2
720 #define ARIZONA_DSP3LMIX_INPUT_2_VOLUME 0x9C3
721 #define ARIZONA_DSP3LMIX_INPUT_3_SOURCE 0x9C4
722 #define ARIZONA_DSP3LMIX_INPUT_3_VOLUME 0x9C5
723 #define ARIZONA_DSP3LMIX_INPUT_4_SOURCE 0x9C6
724 #define ARIZONA_DSP3LMIX_INPUT_4_VOLUME 0x9C7
725 #define ARIZONA_DSP3RMIX_INPUT_1_SOURCE 0x9C8
726 #define ARIZONA_DSP3RMIX_INPUT_1_VOLUME 0x9C9
727 #define ARIZONA_DSP3RMIX_INPUT_2_SOURCE 0x9CA
728 #define ARIZONA_DSP3RMIX_INPUT_2_VOLUME 0x9CB
729 #define ARIZONA_DSP3RMIX_INPUT_3_SOURCE 0x9CC
730 #define ARIZONA_DSP3RMIX_INPUT_3_VOLUME 0x9CD
731 #define ARIZONA_DSP3RMIX_INPUT_4_SOURCE 0x9CE
732 #define ARIZONA_DSP3RMIX_INPUT_4_VOLUME 0x9CF
733 #define ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE 0x9D0
734 #define ARIZONA_DSP3AUX2MIX_INPUT_1_SOURCE 0x9D8
735 #define ARIZONA_DSP3AUX3MIX_INPUT_1_SOURCE 0x9E0
736 #define ARIZONA_DSP3AUX4MIX_INPUT_1_SOURCE 0x9E8
737 #define ARIZONA_DSP3AUX5MIX_INPUT_1_SOURCE 0x9F0
738 #define ARIZONA_DSP3AUX6MIX_INPUT_1_SOURCE 0x9F8
739 #define ARIZONA_DSP4LMIX_INPUT_1_SOURCE 0xA00
740 #define ARIZONA_DSP4LMIX_INPUT_1_VOLUME 0xA01
741 #define ARIZONA_DSP4LMIX_INPUT_2_SOURCE 0xA02
742 #define ARIZONA_DSP4LMIX_INPUT_2_VOLUME 0xA03
743 #define ARIZONA_DSP4LMIX_INPUT_3_SOURCE 0xA04
744 #define ARIZONA_DSP4LMIX_INPUT_3_VOLUME 0xA05
745 #define ARIZONA_DSP4LMIX_INPUT_4_SOURCE 0xA06
746 #define ARIZONA_DSP4LMIX_INPUT_4_VOLUME 0xA07
747 #define ARIZONA_DSP4RMIX_INPUT_1_SOURCE 0xA08
748 #define ARIZONA_DSP4RMIX_INPUT_1_VOLUME 0xA09
749 #define ARIZONA_DSP4RMIX_INPUT_2_SOURCE 0xA0A
750 #define ARIZONA_DSP4RMIX_INPUT_2_VOLUME 0xA0B
751 #define ARIZONA_DSP4RMIX_INPUT_3_SOURCE 0xA0C
752 #define ARIZONA_DSP4RMIX_INPUT_3_VOLUME 0xA0D
753 #define ARIZONA_DSP4RMIX_INPUT_4_SOURCE 0xA0E
754 #define ARIZONA_DSP4RMIX_INPUT_4_VOLUME 0xA0F
755 #define ARIZONA_DSP4AUX1MIX_INPUT_1_SOURCE 0xA10
756 #define ARIZONA_DSP4AUX2MIX_INPUT_1_SOURCE 0xA18
757 #define ARIZONA_DSP4AUX3MIX_INPUT_1_SOURCE 0xA20
758 #define ARIZONA_DSP4AUX4MIX_INPUT_1_SOURCE 0xA28
759 #define ARIZONA_DSP4AUX5MIX_INPUT_1_SOURCE 0xA30
760 #define ARIZONA_DSP4AUX6MIX_INPUT_1_SOURCE 0xA38
761 #define ARIZONA_ASRC1LMIX_INPUT_1_SOURCE 0xA80
762 #define ARIZONA_ASRC1RMIX_INPUT_1_SOURCE 0xA88
763 #define ARIZONA_ASRC2LMIX_INPUT_1_SOURCE 0xA90
764 #define ARIZONA_ASRC2RMIX_INPUT_1_SOURCE 0xA98
765 #define ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE 0xB00
766 #define ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE 0xB08
767 #define ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE 0xB10
768 #define ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE 0xB18
769 #define ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE 0xB20
770 #define ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE 0xB28
771 #define ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE 0xB30
772 #define ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE 0xB38
773 #define ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE 0xB40
774 #define ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE 0xB48
775 #define ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE 0xB60
776 #define ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE 0xB68
777 #define ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE 0xB30
778 #define ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE 0xB38
779 #define ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE 0xB40
780 #define ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE 0xB48
781 #define ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE 0xB50
782 #define ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE 0xB58
783 #define ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE 0xB60
784 #define ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE 0xB68
785 #define ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE 0xB70
786 #define ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE 0xB78
787 #define ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE 0xB80
788 #define ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE 0xB88
789 #define ARIZONA_ISRC3DEC3MIX_INPUT_1_SOURCE 0xB90
790 #define ARIZONA_ISRC3DEC4MIX_INPUT_1_SOURCE 0xB98
791 #define ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE 0xBA0
792 #define ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE 0xBA8
793 #define ARIZONA_ISRC3INT3MIX_INPUT_1_SOURCE 0xBB0
794 #define ARIZONA_ISRC3INT4MIX_INPUT_1_SOURCE 0xBB8
795 #define ARIZONA_GPIO1_CTRL 0xC00
796 #define ARIZONA_GPIO2_CTRL 0xC01
797 #define ARIZONA_GPIO3_CTRL 0xC02
798 #define ARIZONA_GPIO4_CTRL 0xC03
799 #define ARIZONA_GPIO5_CTRL 0xC04
800 #define ARIZONA_IRQ_CTRL_1 0xC0F
801 #define ARIZONA_GPIO_DEBOUNCE_CONFIG 0xC10
802 #define ARIZONA_MISC_PAD_CTRL_1 0xC20
803 #define ARIZONA_MISC_PAD_CTRL_2 0xC21
804 #define ARIZONA_MISC_PAD_CTRL_3 0xC22
805 #define ARIZONA_MISC_PAD_CTRL_4 0xC23
806 #define ARIZONA_MISC_PAD_CTRL_5 0xC24
807 #define ARIZONA_MISC_PAD_CTRL_6 0xC25
808 #define ARIZONA_MISC_PAD_CTRL_7 0xC30
809 #define ARIZONA_MISC_PAD_CTRL_8 0xC31
810 #define ARIZONA_MISC_PAD_CTRL_9 0xC32
811 #define ARIZONA_MISC_PAD_CTRL_10 0xC33
812 #define ARIZONA_MISC_PAD_CTRL_11 0xC34
813 #define ARIZONA_MISC_PAD_CTRL_12 0xC35
814 #define ARIZONA_MISC_PAD_CTRL_13 0xC36
815 #define ARIZONA_MISC_PAD_CTRL_14 0xC37
816 #define ARIZONA_MISC_PAD_CTRL_15 0xC38
817 #define ARIZONA_MISC_PAD_CTRL_16 0xC39
818 #define ARIZONA_MISC_PAD_CTRL_17 0xC3A
819 #define ARIZONA_MISC_PAD_CTRL_18 0xC3B
820 #define ARIZONA_INTERRUPT_STATUS_1 0xD00
821 #define ARIZONA_INTERRUPT_STATUS_2 0xD01
822 #define ARIZONA_INTERRUPT_STATUS_3 0xD02
823 #define ARIZONA_INTERRUPT_STATUS_4 0xD03
824 #define ARIZONA_INTERRUPT_STATUS_5 0xD04
825 #define ARIZONA_INTERRUPT_STATUS_1_MASK 0xD08
826 #define ARIZONA_INTERRUPT_STATUS_2_MASK 0xD09
827 #define ARIZONA_INTERRUPT_STATUS_3_MASK 0xD0A
828 #define ARIZONA_INTERRUPT_STATUS_4_MASK 0xD0B
829 #define ARIZONA_INTERRUPT_STATUS_5_MASK 0xD0C
830 #define ARIZONA_INTERRUPT_CONTROL 0xD0F
831 #define ARIZONA_IRQ2_STATUS_1 0xD10
832 #define ARIZONA_IRQ2_STATUS_2 0xD11
833 #define ARIZONA_IRQ2_STATUS_3 0xD12
834 #define ARIZONA_IRQ2_STATUS_4 0xD13
835 #define ARIZONA_IRQ2_STATUS_5 0xD14
836 #define ARIZONA_IRQ2_STATUS_1_MASK 0xD18
837 #define ARIZONA_IRQ2_STATUS_2_MASK 0xD19
838 #define ARIZONA_IRQ2_STATUS_3_MASK 0xD1A
839 #define ARIZONA_IRQ2_STATUS_4_MASK 0xD1B
840 #define ARIZONA_IRQ2_STATUS_5_MASK 0xD1C
841 #define ARIZONA_IRQ2_CONTROL 0xD1F
842 #define ARIZONA_INTERRUPT_RAW_STATUS_2 0xD20
843 #define ARIZONA_INTERRUPT_RAW_STATUS_3 0xD21
844 #define ARIZONA_INTERRUPT_RAW_STATUS_4 0xD22
845 #define ARIZONA_INTERRUPT_RAW_STATUS_5 0xD23
846 #define ARIZONA_INTERRUPT_RAW_STATUS_6 0xD24
847 #define ARIZONA_INTERRUPT_RAW_STATUS_7 0xD25
848 #define ARIZONA_INTERRUPT_RAW_STATUS_8 0xD26
849 #define ARIZONA_IRQ_PIN_STATUS 0xD40
850 #define ARIZONA_ADSP2_IRQ0 0xD41
851 #define ARIZONA_AOD_WKUP_AND_TRIG 0xD50
852 #define ARIZONA_AOD_IRQ1 0xD51
853 #define ARIZONA_AOD_IRQ2 0xD52
854 #define ARIZONA_AOD_IRQ_MASK_IRQ1 0xD53
855 #define ARIZONA_AOD_IRQ_MASK_IRQ2 0xD54
856 #define ARIZONA_AOD_IRQ_RAW_STATUS 0xD55
857 #define ARIZONA_JACK_DETECT_DEBOUNCE 0xD56
858 #define ARIZONA_FX_CTRL1 0xE00
859 #define ARIZONA_FX_CTRL2 0xE01
860 #define ARIZONA_EQ1_1 0xE10
861 #define ARIZONA_EQ1_2 0xE11
862 #define ARIZONA_EQ1_3 0xE12
863 #define ARIZONA_EQ1_4 0xE13
864 #define ARIZONA_EQ1_5 0xE14
865 #define ARIZONA_EQ1_6 0xE15
866 #define ARIZONA_EQ1_7 0xE16
867 #define ARIZONA_EQ1_8 0xE17
868 #define ARIZONA_EQ1_9 0xE18
869 #define ARIZONA_EQ1_10 0xE19
870 #define ARIZONA_EQ1_11 0xE1A
871 #define ARIZONA_EQ1_12 0xE1B
872 #define ARIZONA_EQ1_13 0xE1C
873 #define ARIZONA_EQ1_14 0xE1D
874 #define ARIZONA_EQ1_15 0xE1E
875 #define ARIZONA_EQ1_16 0xE1F
876 #define ARIZONA_EQ1_17 0xE20
877 #define ARIZONA_EQ1_18 0xE21
878 #define ARIZONA_EQ1_19 0xE22
879 #define ARIZONA_EQ1_20 0xE23
880 #define ARIZONA_EQ1_21 0xE24
881 #define ARIZONA_EQ2_1 0xE26
882 #define ARIZONA_EQ2_2 0xE27
883 #define ARIZONA_EQ2_3 0xE28
884 #define ARIZONA_EQ2_4 0xE29
885 #define ARIZONA_EQ2_5 0xE2A
886 #define ARIZONA_EQ2_6 0xE2B
887 #define ARIZONA_EQ2_7 0xE2C
888 #define ARIZONA_EQ2_8 0xE2D
889 #define ARIZONA_EQ2_9 0xE2E
890 #define ARIZONA_EQ2_10 0xE2F
891 #define ARIZONA_EQ2_11 0xE30
892 #define ARIZONA_EQ2_12 0xE31
893 #define ARIZONA_EQ2_13 0xE32
894 #define ARIZONA_EQ2_14 0xE33
895 #define ARIZONA_EQ2_15 0xE34
896 #define ARIZONA_EQ2_16 0xE35
897 #define ARIZONA_EQ2_17 0xE36
898 #define ARIZONA_EQ2_18 0xE37
899 #define ARIZONA_EQ2_19 0xE38
900 #define ARIZONA_EQ2_20 0xE39
901 #define ARIZONA_EQ2_21 0xE3A
902 #define ARIZONA_EQ3_1 0xE3C
903 #define ARIZONA_EQ3_2 0xE3D
904 #define ARIZONA_EQ3_3 0xE3E
905 #define ARIZONA_EQ3_4 0xE3F
906 #define ARIZONA_EQ3_5 0xE40
907 #define ARIZONA_EQ3_6 0xE41
908 #define ARIZONA_EQ3_7 0xE42
909 #define ARIZONA_EQ3_8 0xE43
910 #define ARIZONA_EQ3_9 0xE44
911 #define ARIZONA_EQ3_10 0xE45
912 #define ARIZONA_EQ3_11 0xE46
913 #define ARIZONA_EQ3_12 0xE47
914 #define ARIZONA_EQ3_13 0xE48
915 #define ARIZONA_EQ3_14 0xE49
916 #define ARIZONA_EQ3_15 0xE4A
917 #define ARIZONA_EQ3_16 0xE4B
918 #define ARIZONA_EQ3_17 0xE4C
919 #define ARIZONA_EQ3_18 0xE4D
920 #define ARIZONA_EQ3_19 0xE4E
921 #define ARIZONA_EQ3_20 0xE4F
922 #define ARIZONA_EQ3_21 0xE50
923 #define ARIZONA_EQ4_1 0xE52
924 #define ARIZONA_EQ4_2 0xE53
925 #define ARIZONA_EQ4_3 0xE54
926 #define ARIZONA_EQ4_4 0xE55
927 #define ARIZONA_EQ4_5 0xE56
928 #define ARIZONA_EQ4_6 0xE57
929 #define ARIZONA_EQ4_7 0xE58
930 #define ARIZONA_EQ4_8 0xE59
931 #define ARIZONA_EQ4_9 0xE5A
932 #define ARIZONA_EQ4_10 0xE5B
933 #define ARIZONA_EQ4_11 0xE5C
934 #define ARIZONA_EQ4_12 0xE5D
935 #define ARIZONA_EQ4_13 0xE5E
936 #define ARIZONA_EQ4_14 0xE5F
937 #define ARIZONA_EQ4_15 0xE60
938 #define ARIZONA_EQ4_16 0xE61
939 #define ARIZONA_EQ4_17 0xE62
940 #define ARIZONA_EQ4_18 0xE63
941 #define ARIZONA_EQ4_19 0xE64
942 #define ARIZONA_EQ4_20 0xE65
943 #define ARIZONA_EQ4_21 0xE66
944 #define ARIZONA_DRC1_CTRL1 0xE80
945 #define ARIZONA_DRC1_CTRL2 0xE81
946 #define ARIZONA_DRC1_CTRL3 0xE82
947 #define ARIZONA_DRC1_CTRL4 0xE83
948 #define ARIZONA_DRC1_CTRL5 0xE84
949 #define ARIZONA_DRC2_CTRL1 0xE89
950 #define ARIZONA_DRC2_CTRL2 0xE8A
951 #define ARIZONA_DRC2_CTRL3 0xE8B
952 #define ARIZONA_DRC2_CTRL4 0xE8C
953 #define ARIZONA_DRC2_CTRL5 0xE8D
954 #define ARIZONA_HPLPF1_1 0xEC0
955 #define ARIZONA_HPLPF1_2 0xEC1
956 #define ARIZONA_HPLPF2_1 0xEC4
957 #define ARIZONA_HPLPF2_2 0xEC5
958 #define ARIZONA_HPLPF3_1 0xEC8
959 #define ARIZONA_HPLPF3_2 0xEC9
960 #define ARIZONA_HPLPF4_1 0xECC
961 #define ARIZONA_HPLPF4_2 0xECD
962 #define ARIZONA_ASRC_ENABLE 0xEE0
963 #define ARIZONA_ASRC_STATUS 0xEE1
964 #define ARIZONA_ASRC_RATE1 0xEE2
965 #define ARIZONA_ASRC_RATE2 0xEE3
966 #define ARIZONA_ISRC_1_CTRL_1 0xEF0
967 #define ARIZONA_ISRC_1_CTRL_2 0xEF1
968 #define ARIZONA_ISRC_1_CTRL_3 0xEF2
969 #define ARIZONA_ISRC_2_CTRL_1 0xEF3
970 #define ARIZONA_ISRC_2_CTRL_2 0xEF4
971 #define ARIZONA_ISRC_2_CTRL_3 0xEF5
972 #define ARIZONA_ISRC_3_CTRL_1 0xEF6
973 #define ARIZONA_ISRC_3_CTRL_2 0xEF7
974 #define ARIZONA_ISRC_3_CTRL_3 0xEF8
975 #define ARIZONA_CLOCK_CONTROL 0xF00
976 #define ARIZONA_ANC_SRC 0xF01
977 #define ARIZONA_DSP_STATUS 0xF02
978 #define ARIZONA_DSP1_CONTROL_1 0x1100
979 #define ARIZONA_DSP1_CLOCKING_1 0x1101
980 #define ARIZONA_DSP1_STATUS_1 0x1104
981 #define ARIZONA_DSP1_STATUS_2 0x1105
982 #define ARIZONA_DSP2_CONTROL_1 0x1200
983 #define ARIZONA_DSP2_CLOCKING_1 0x1201
984 #define ARIZONA_DSP2_STATUS_1 0x1204
985 #define ARIZONA_DSP2_STATUS_2 0x1205
986 #define ARIZONA_DSP3_CONTROL_1 0x1300
987 #define ARIZONA_DSP3_CLOCKING_1 0x1301
988 #define ARIZONA_DSP3_STATUS_1 0x1304
989 #define ARIZONA_DSP3_STATUS_2 0x1305
990 #define ARIZONA_DSP4_CONTROL_1 0x1400
991 #define ARIZONA_DSP4_CLOCKING_1 0x1401
992 #define ARIZONA_DSP4_STATUS_1 0x1404
993 #define ARIZONA_DSP4_STATUS_2 0x1405
994 
995 /*
996  * Field Definitions.
997  */
998 
999 /*
1000  * R0 (0x00) - software reset
1001  */
1002 #define ARIZONA_SW_RST_DEV_ID1_MASK 0xFFFF /* SW_RST_DEV_ID1 - [15:0] */
1003 #define ARIZONA_SW_RST_DEV_ID1_SHIFT 0 /* SW_RST_DEV_ID1 - [15:0] */
1004 #define ARIZONA_SW_RST_DEV_ID1_WIDTH 16 /* SW_RST_DEV_ID1 - [15:0] */
1005 
1006 /*
1007  * R1 (0x01) - Device Revision
1008  */
1009 #define ARIZONA_DEVICE_REVISION_MASK 0x00FF /* DEVICE_REVISION - [7:0] */
1010 #define ARIZONA_DEVICE_REVISION_SHIFT 0 /* DEVICE_REVISION - [7:0] */
1011 #define ARIZONA_DEVICE_REVISION_WIDTH 8 /* DEVICE_REVISION - [7:0] */
1012 
1013 /*
1014  * R8 (0x08) - Ctrl IF SPI CFG 1
1015  */
1016 #define ARIZONA_SPI_CFG 0x0010 /* SPI_CFG */
1017 #define ARIZONA_SPI_CFG_MASK 0x0010 /* SPI_CFG */
1018 #define ARIZONA_SPI_CFG_SHIFT 4 /* SPI_CFG */
1019 #define ARIZONA_SPI_CFG_WIDTH 1 /* SPI_CFG */
1020 #define ARIZONA_SPI_4WIRE 0x0008 /* SPI_4WIRE */
1021 #define ARIZONA_SPI_4WIRE_MASK 0x0008 /* SPI_4WIRE */
1022 #define ARIZONA_SPI_4WIRE_SHIFT 3 /* SPI_4WIRE */
1023 #define ARIZONA_SPI_4WIRE_WIDTH 1 /* SPI_4WIRE */
1024 #define ARIZONA_SPI_AUTO_INC_MASK 0x0003 /* SPI_AUTO_INC - [1:0] */
1025 #define ARIZONA_SPI_AUTO_INC_SHIFT 0 /* SPI_AUTO_INC - [1:0] */
1026 #define ARIZONA_SPI_AUTO_INC_WIDTH 2 /* SPI_AUTO_INC - [1:0] */
1027 
1028 /*
1029  * R9 (0x09) - Ctrl IF I2C1 CFG 1
1030  */
1031 #define ARIZONA_I2C1_AUTO_INC_MASK 0x0003 /* I2C1_AUTO_INC - [1:0] */
1032 #define ARIZONA_I2C1_AUTO_INC_SHIFT 0 /* I2C1_AUTO_INC - [1:0] */
1033 #define ARIZONA_I2C1_AUTO_INC_WIDTH 2 /* I2C1_AUTO_INC - [1:0] */
1034 
1035 /*
1036  * R13 (0x0D) - Ctrl IF Status 1
1037  */
1038 #define ARIZONA_I2C1_BUSY 0x0020 /* I2C1_BUSY */
1039 #define ARIZONA_I2C1_BUSY_MASK 0x0020 /* I2C1_BUSY */
1040 #define ARIZONA_I2C1_BUSY_SHIFT 5 /* I2C1_BUSY */
1041 #define ARIZONA_I2C1_BUSY_WIDTH 1 /* I2C1_BUSY */
1042 #define ARIZONA_SPI_BUSY 0x0010 /* SPI_BUSY */
1043 #define ARIZONA_SPI_BUSY_MASK 0x0010 /* SPI_BUSY */
1044 #define ARIZONA_SPI_BUSY_SHIFT 4 /* SPI_BUSY */
1045 #define ARIZONA_SPI_BUSY_WIDTH 1 /* SPI_BUSY */
1046 
1047 /*
1048  * R22 (0x16) - Write Sequencer Ctrl 0
1049  */
1050 #define ARIZONA_WSEQ_ABORT 0x0800 /* WSEQ_ABORT */
1051 #define ARIZONA_WSEQ_ABORT_MASK 0x0800 /* WSEQ_ABORT */
1052 #define ARIZONA_WSEQ_ABORT_SHIFT 11 /* WSEQ_ABORT */
1053 #define ARIZONA_WSEQ_ABORT_WIDTH 1 /* WSEQ_ABORT */
1054 #define ARIZONA_WSEQ_START 0x0400 /* WSEQ_START */
1055 #define ARIZONA_WSEQ_START_MASK 0x0400 /* WSEQ_START */
1056 #define ARIZONA_WSEQ_START_SHIFT 10 /* WSEQ_START */
1057 #define ARIZONA_WSEQ_START_WIDTH 1 /* WSEQ_START */
1058 #define ARIZONA_WSEQ_ENA 0x0200 /* WSEQ_ENA */
1059 #define ARIZONA_WSEQ_ENA_MASK 0x0200 /* WSEQ_ENA */
1060 #define ARIZONA_WSEQ_ENA_SHIFT 9 /* WSEQ_ENA */
1061 #define ARIZONA_WSEQ_ENA_WIDTH 1 /* WSEQ_ENA */
1062 #define ARIZONA_WSEQ_START_INDEX_MASK 0x01FF /* WSEQ_START_INDEX - [8:0] */
1063 #define ARIZONA_WSEQ_START_INDEX_SHIFT 0 /* WSEQ_START_INDEX - [8:0] */
1064 #define ARIZONA_WSEQ_START_INDEX_WIDTH 9 /* WSEQ_START_INDEX - [8:0] */
1065 
1066 /*
1067  * R23 (0x17) - Write Sequencer Ctrl 1
1068  */
1069 #define ARIZONA_WSEQ_BUSY 0x0200 /* WSEQ_BUSY */
1070 #define ARIZONA_WSEQ_BUSY_MASK 0x0200 /* WSEQ_BUSY */
1071 #define ARIZONA_WSEQ_BUSY_SHIFT 9 /* WSEQ_BUSY */
1072 #define ARIZONA_WSEQ_BUSY_WIDTH 1 /* WSEQ_BUSY */
1073 #define ARIZONA_WSEQ_CURRENT_INDEX_MASK 0x01FF /* WSEQ_CURRENT_INDEX - [8:0] */
1074 #define ARIZONA_WSEQ_CURRENT_INDEX_SHIFT 0 /* WSEQ_CURRENT_INDEX - [8:0] */
1075 #define ARIZONA_WSEQ_CURRENT_INDEX_WIDTH 9 /* WSEQ_CURRENT_INDEX - [8:0] */
1076 
1077 /*
1078  * R24 (0x18) - Write Sequencer Ctrl 2
1079  */
1080 #define ARIZONA_LOAD_DEFAULTS 0x0002 /* LOAD_DEFAULTS */
1081 #define ARIZONA_LOAD_DEFAULTS_MASK 0x0002 /* LOAD_DEFAULTS */
1082 #define ARIZONA_LOAD_DEFAULTS_SHIFT 1 /* LOAD_DEFAULTS */
1083 #define ARIZONA_LOAD_DEFAULTS_WIDTH 1 /* LOAD_DEFAULTS */
1084 #define ARIZONA_WSEQ_LOAD_MEM 0x0001 /* WSEQ_LOAD_MEM */
1085 #define ARIZONA_WSEQ_LOAD_MEM_MASK 0x0001 /* WSEQ_LOAD_MEM */
1086 #define ARIZONA_WSEQ_LOAD_MEM_SHIFT 0 /* WSEQ_LOAD_MEM */
1087 #define ARIZONA_WSEQ_LOAD_MEM_WIDTH 1 /* WSEQ_LOAD_MEM */
1088 
1089 /*
1090  * R26 (0x1A) - Write Sequencer PROM
1091  */
1092 #define ARIZONA_WSEQ_OTP_WRITE 0x0001 /* WSEQ_OTP_WRITE */
1093 #define ARIZONA_WSEQ_OTP_WRITE_MASK 0x0001 /* WSEQ_OTP_WRITE */
1094 #define ARIZONA_WSEQ_OTP_WRITE_SHIFT 0 /* WSEQ_OTP_WRITE */
1095 #define ARIZONA_WSEQ_OTP_WRITE_WIDTH 1 /* WSEQ_OTP_WRITE */
1096 
1097 /*
1098  * R32 (0x20) - Tone Generator 1
1099  */
1100 #define ARIZONA_TONE_RATE_MASK 0x7800 /* TONE_RATE - [14:11] */
1101 #define ARIZONA_TONE_RATE_SHIFT 11 /* TONE_RATE - [14:11] */
1102 #define ARIZONA_TONE_RATE_WIDTH 4 /* TONE_RATE - [14:11] */
1103 #define ARIZONA_TONE_OFFSET_MASK 0x0300 /* TONE_OFFSET - [9:8] */
1104 #define ARIZONA_TONE_OFFSET_SHIFT 8 /* TONE_OFFSET - [9:8] */
1105 #define ARIZONA_TONE_OFFSET_WIDTH 2 /* TONE_OFFSET - [9:8] */
1106 #define ARIZONA_TONE2_OVD 0x0020 /* TONE2_OVD */
1107 #define ARIZONA_TONE2_OVD_MASK 0x0020 /* TONE2_OVD */
1108 #define ARIZONA_TONE2_OVD_SHIFT 5 /* TONE2_OVD */
1109 #define ARIZONA_TONE2_OVD_WIDTH 1 /* TONE2_OVD */
1110 #define ARIZONA_TONE1_OVD 0x0010 /* TONE1_OVD */
1111 #define ARIZONA_TONE1_OVD_MASK 0x0010 /* TONE1_OVD */
1112 #define ARIZONA_TONE1_OVD_SHIFT 4 /* TONE1_OVD */
1113 #define ARIZONA_TONE1_OVD_WIDTH 1 /* TONE1_OVD */
1114 #define ARIZONA_TONE2_ENA 0x0002 /* TONE2_ENA */
1115 #define ARIZONA_TONE2_ENA_MASK 0x0002 /* TONE2_ENA */
1116 #define ARIZONA_TONE2_ENA_SHIFT 1 /* TONE2_ENA */
1117 #define ARIZONA_TONE2_ENA_WIDTH 1 /* TONE2_ENA */
1118 #define ARIZONA_TONE1_ENA 0x0001 /* TONE1_ENA */
1119 #define ARIZONA_TONE1_ENA_MASK 0x0001 /* TONE1_ENA */
1120 #define ARIZONA_TONE1_ENA_SHIFT 0 /* TONE1_ENA */
1121 #define ARIZONA_TONE1_ENA_WIDTH 1 /* TONE1_ENA */
1122 
1123 /*
1124  * R33 (0x21) - Tone Generator 2
1125  */
1126 #define ARIZONA_TONE1_LVL_0_MASK 0xFFFF /* TONE1_LVL - [15:0] */
1127 #define ARIZONA_TONE1_LVL_0_SHIFT 0 /* TONE1_LVL - [15:0] */
1128 #define ARIZONA_TONE1_LVL_0_WIDTH 16 /* TONE1_LVL - [15:0] */
1129 
1130 /*
1131  * R34 (0x22) - Tone Generator 3
1132  */
1133 #define ARIZONA_TONE1_LVL_MASK 0x00FF /* TONE1_LVL - [7:0] */
1134 #define ARIZONA_TONE1_LVL_SHIFT 0 /* TONE1_LVL - [7:0] */
1135 #define ARIZONA_TONE1_LVL_WIDTH 8 /* TONE1_LVL - [7:0] */
1136 
1137 /*
1138  * R35 (0x23) - Tone Generator 4
1139  */
1140 #define ARIZONA_TONE2_LVL_0_MASK 0xFFFF /* TONE2_LVL - [15:0] */
1141 #define ARIZONA_TONE2_LVL_0_SHIFT 0 /* TONE2_LVL - [15:0] */
1142 #define ARIZONA_TONE2_LVL_0_WIDTH 16 /* TONE2_LVL - [15:0] */
1143 
1144 /*
1145  * R36 (0x24) - Tone Generator 5
1146  */
1147 #define ARIZONA_TONE2_LVL_MASK 0x00FF /* TONE2_LVL - [7:0] */
1148 #define ARIZONA_TONE2_LVL_SHIFT 0 /* TONE2_LVL - [7:0] */
1149 #define ARIZONA_TONE2_LVL_WIDTH 8 /* TONE2_LVL - [7:0] */
1150 
1151 /*
1152  * R48 (0x30) - PWM Drive 1
1153  */
1154 #define ARIZONA_PWM_RATE_MASK 0x7800 /* PWM_RATE - [14:11] */
1155 #define ARIZONA_PWM_RATE_SHIFT 11 /* PWM_RATE - [14:11] */
1156 #define ARIZONA_PWM_RATE_WIDTH 4 /* PWM_RATE - [14:11] */
1157 #define ARIZONA_PWM_CLK_SEL_MASK 0x0700 /* PWM_CLK_SEL - [10:8] */
1158 #define ARIZONA_PWM_CLK_SEL_SHIFT 8 /* PWM_CLK_SEL - [10:8] */
1159 #define ARIZONA_PWM_CLK_SEL_WIDTH 3 /* PWM_CLK_SEL - [10:8] */
1160 #define ARIZONA_PWM2_OVD 0x0020 /* PWM2_OVD */
1161 #define ARIZONA_PWM2_OVD_MASK 0x0020 /* PWM2_OVD */
1162 #define ARIZONA_PWM2_OVD_SHIFT 5 /* PWM2_OVD */
1163 #define ARIZONA_PWM2_OVD_WIDTH 1 /* PWM2_OVD */
1164 #define ARIZONA_PWM1_OVD 0x0010 /* PWM1_OVD */
1165 #define ARIZONA_PWM1_OVD_MASK 0x0010 /* PWM1_OVD */
1166 #define ARIZONA_PWM1_OVD_SHIFT 4 /* PWM1_OVD */
1167 #define ARIZONA_PWM1_OVD_WIDTH 1 /* PWM1_OVD */
1168 #define ARIZONA_PWM2_ENA 0x0002 /* PWM2_ENA */
1169 #define ARIZONA_PWM2_ENA_MASK 0x0002 /* PWM2_ENA */
1170 #define ARIZONA_PWM2_ENA_SHIFT 1 /* PWM2_ENA */
1171 #define ARIZONA_PWM2_ENA_WIDTH 1 /* PWM2_ENA */
1172 #define ARIZONA_PWM1_ENA 0x0001 /* PWM1_ENA */
1173 #define ARIZONA_PWM1_ENA_MASK 0x0001 /* PWM1_ENA */
1174 #define ARIZONA_PWM1_ENA_SHIFT 0 /* PWM1_ENA */
1175 #define ARIZONA_PWM1_ENA_WIDTH 1 /* PWM1_ENA */
1176 
1177 /*
1178  * R49 (0x31) - PWM Drive 2
1179  */
1180 #define ARIZONA_PWM1_LVL_MASK 0x03FF /* PWM1_LVL - [9:0] */
1181 #define ARIZONA_PWM1_LVL_SHIFT 0 /* PWM1_LVL - [9:0] */
1182 #define ARIZONA_PWM1_LVL_WIDTH 10 /* PWM1_LVL - [9:0] */
1183 
1184 /*
1185  * R50 (0x32) - PWM Drive 3
1186  */
1187 #define ARIZONA_PWM2_LVL_MASK 0x03FF /* PWM2_LVL - [9:0] */
1188 #define ARIZONA_PWM2_LVL_SHIFT 0 /* PWM2_LVL - [9:0] */
1189 #define ARIZONA_PWM2_LVL_WIDTH 10 /* PWM2_LVL - [9:0] */
1190 
1191 /*
1192  * R64 (0x40) - Wake control
1193  */
1194 #define ARIZONA_WKUP_GP5_FALL 0x0020 /* WKUP_GP5_FALL */
1195 #define ARIZONA_WKUP_GP5_FALL_MASK 0x0020 /* WKUP_GP5_FALL */
1196 #define ARIZONA_WKUP_GP5_FALL_SHIFT 5 /* WKUP_GP5_FALL */
1197 #define ARIZONA_WKUP_GP5_FALL_WIDTH 1 /* WKUP_GP5_FALL */
1198 #define ARIZONA_WKUP_GP5_RISE 0x0010 /* WKUP_GP5_RISE */
1199 #define ARIZONA_WKUP_GP5_RISE_MASK 0x0010 /* WKUP_GP5_RISE */
1200 #define ARIZONA_WKUP_GP5_RISE_SHIFT 4 /* WKUP_GP5_RISE */
1201 #define ARIZONA_WKUP_GP5_RISE_WIDTH 1 /* WKUP_GP5_RISE */
1202 #define ARIZONA_WKUP_JD1_FALL 0x0008 /* WKUP_JD1_FALL */
1203 #define ARIZONA_WKUP_JD1_FALL_MASK 0x0008 /* WKUP_JD1_FALL */
1204 #define ARIZONA_WKUP_JD1_FALL_SHIFT 3 /* WKUP_JD1_FALL */
1205 #define ARIZONA_WKUP_JD1_FALL_WIDTH 1 /* WKUP_JD1_FALL */
1206 #define ARIZONA_WKUP_JD1_RISE 0x0004 /* WKUP_JD1_RISE */
1207 #define ARIZONA_WKUP_JD1_RISE_MASK 0x0004 /* WKUP_JD1_RISE */
1208 #define ARIZONA_WKUP_JD1_RISE_SHIFT 2 /* WKUP_JD1_RISE */
1209 #define ARIZONA_WKUP_JD1_RISE_WIDTH 1 /* WKUP_JD1_RISE */
1210 #define ARIZONA_WKUP_JD2_FALL 0x0002 /* WKUP_JD2_FALL */
1211 #define ARIZONA_WKUP_JD2_FALL_MASK 0x0002 /* WKUP_JD2_FALL */
1212 #define ARIZONA_WKUP_JD2_FALL_SHIFT 1 /* WKUP_JD2_FALL */
1213 #define ARIZONA_WKUP_JD2_FALL_WIDTH 1 /* WKUP_JD2_FALL */
1214 #define ARIZONA_WKUP_JD2_RISE 0x0001 /* WKUP_JD2_RISE */
1215 #define ARIZONA_WKUP_JD2_RISE_MASK 0x0001 /* WKUP_JD2_RISE */
1216 #define ARIZONA_WKUP_JD2_RISE_SHIFT 0 /* WKUP_JD2_RISE */
1217 #define ARIZONA_WKUP_JD2_RISE_WIDTH 1 /* WKUP_JD2_RISE */
1218 
1219 /*
1220  * R65 (0x41) - Sequence control
1221  */
1222 #define ARIZONA_WSEQ_ENA_GP5_FALL 0x0020 /* WSEQ_ENA_GP5_FALL */
1223 #define ARIZONA_WSEQ_ENA_GP5_FALL_MASK 0x0020 /* WSEQ_ENA_GP5_FALL */
1224 #define ARIZONA_WSEQ_ENA_GP5_FALL_SHIFT 5 /* WSEQ_ENA_GP5_FALL */
1225 #define ARIZONA_WSEQ_ENA_GP5_FALL_WIDTH 1 /* WSEQ_ENA_GP5_FALL */
1226 #define ARIZONA_WSEQ_ENA_GP5_RISE 0x0010 /* WSEQ_ENA_GP5_RISE */
1227 #define ARIZONA_WSEQ_ENA_GP5_RISE_MASK 0x0010 /* WSEQ_ENA_GP5_RISE */
1228 #define ARIZONA_WSEQ_ENA_GP5_RISE_SHIFT 4 /* WSEQ_ENA_GP5_RISE */
1229 #define ARIZONA_WSEQ_ENA_GP5_RISE_WIDTH 1 /* WSEQ_ENA_GP5_RISE */
1230 #define ARIZONA_WSEQ_ENA_JD1_FALL 0x0008 /* WSEQ_ENA_JD1_FALL */
1231 #define ARIZONA_WSEQ_ENA_JD1_FALL_MASK 0x0008 /* WSEQ_ENA_JD1_FALL */
1232 #define ARIZONA_WSEQ_ENA_JD1_FALL_SHIFT 3 /* WSEQ_ENA_JD1_FALL */
1233 #define ARIZONA_WSEQ_ENA_JD1_FALL_WIDTH 1 /* WSEQ_ENA_JD1_FALL */
1234 #define ARIZONA_WSEQ_ENA_JD1_RISE 0x0004 /* WSEQ_ENA_JD1_RISE */
1235 #define ARIZONA_WSEQ_ENA_JD1_RISE_MASK 0x0004 /* WSEQ_ENA_JD1_RISE */
1236 #define ARIZONA_WSEQ_ENA_JD1_RISE_SHIFT 2 /* WSEQ_ENA_JD1_RISE */
1237 #define ARIZONA_WSEQ_ENA_JD1_RISE_WIDTH 1 /* WSEQ_ENA_JD1_RISE */
1238 #define ARIZONA_WSEQ_ENA_JD2_FALL 0x0002 /* WSEQ_ENA_JD2_FALL */
1239 #define ARIZONA_WSEQ_ENA_JD2_FALL_MASK 0x0002 /* WSEQ_ENA_JD2_FALL */
1240 #define ARIZONA_WSEQ_ENA_JD2_FALL_SHIFT 1 /* WSEQ_ENA_JD2_FALL */
1241 #define ARIZONA_WSEQ_ENA_JD2_FALL_WIDTH 1 /* WSEQ_ENA_JD2_FALL */
1242 #define ARIZONA_WSEQ_ENA_JD2_RISE 0x0001 /* WSEQ_ENA_JD2_RISE */
1243 #define ARIZONA_WSEQ_ENA_JD2_RISE_MASK 0x0001 /* WSEQ_ENA_JD2_RISE */
1244 #define ARIZONA_WSEQ_ENA_JD2_RISE_SHIFT 0 /* WSEQ_ENA_JD2_RISE */
1245 #define ARIZONA_WSEQ_ENA_JD2_RISE_WIDTH 1 /* WSEQ_ENA_JD2_RISE */
1246 
1247 /*
1248  * R97 (0x61) - Sample Rate Sequence Select 1
1249  */
1250 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR_MASK 0x01FF /* WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR - [8:0] */
1251 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR_SHIFT 0 /* WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR - [8:0] */
1252 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR_WIDTH 9 /* WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR - [8:0] */
1253 
1254 /*
1255  * R98 (0x62) - Sample Rate Sequence Select 2
1256  */
1257 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR_MASK 0x01FF /* WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR - [8:0] */
1258 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR_SHIFT 0 /* WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR - [8:0] */
1259 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR_WIDTH 9 /* WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR - [8:0] */
1260 
1261 /*
1262  * R99 (0x63) - Sample Rate Sequence Select 3
1263  */
1264 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR_MASK 0x01FF /* WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR - [8:0] */
1265 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR_SHIFT 0 /* WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR - [8:0] */
1266 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR_WIDTH 9 /* WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR - [8:0] */
1267 
1268 /*
1269  * R100 (0x64) - Sample Rate Sequence Select 4
1270  */
1271 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR_MASK 0x01FF /* WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR - [8:0] */
1272 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR_SHIFT 0 /* WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR - [8:0] */
1273 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR_WIDTH 9 /* WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR - [8:0] */
1274 
1275 /*
1276  * R104 (0x68) - Always On Triggers Sequence Select 1
1277  */
1278 #define ARIZONA_WSEQ_GP5_RISE_SEQ_ADDR_MASK 0x01FF /* WSEQ_GP5_RISE_SEQ_ADDR - [8:0] */
1279 #define ARIZONA_WSEQ_GP5_RISE_SEQ_ADDR_SHIFT 0 /* WSEQ_GP5_RISE_SEQ_ADDR - [8:0] */
1280 #define ARIZONA_WSEQ_GP5_RISE_SEQ_ADDR_WIDTH 9 /* WSEQ_GP5_RISE_SEQ_ADDR - [8:0] */
1281 
1282 /*
1283  * R105 (0x69) - Always On Triggers Sequence Select 2
1284  */
1285 #define ARIZONA_WSEQ_GP5_FALL_SEQ_ADDR_MASK 0x01FF /* WSEQ_GP5_FALL_SEQ_ADDR - [8:0] */
1286 #define ARIZONA_WSEQ_GP5_FALL_SEQ_ADDR_SHIFT 0 /* WSEQ_GP5_FALL_SEQ_ADDR - [8:0] */
1287 #define ARIZONA_WSEQ_GP5_FALL_SEQ_ADDR_WIDTH 9 /* WSEQ_GP5_FALL_SEQ_ADDR - [8:0] */
1288 
1289 /*
1290  * R106 (0x6A) - Always On Triggers Sequence Select 3
1291  */
1292 #define ARIZONA_WSEQ_JD1_RISE_SEQ_ADDR_MASK 0x01FF /* WSEQ_JD1_RISE_SEQ_ADDR - [8:0] */
1293 #define ARIZONA_WSEQ_JD1_RISE_SEQ_ADDR_SHIFT 0 /* WSEQ_JD1_RISE_SEQ_ADDR - [8:0] */
1294 #define ARIZONA_WSEQ_JD1_RISE_SEQ_ADDR_WIDTH 9 /* WSEQ_JD1_RISE_SEQ_ADDR - [8:0] */
1295 
1296 /*
1297  * R107 (0x6B) - Always On Triggers Sequence Select 4
1298  */
1299 #define ARIZONA_WSEQ_JD1_FALL_SEQ_ADDR_MASK 0x01FF /* WSEQ_JD1_FALL_SEQ_ADDR - [8:0] */
1300 #define ARIZONA_WSEQ_JD1_FALL_SEQ_ADDR_SHIFT 0 /* WSEQ_JD1_FALL_SEQ_ADDR - [8:0] */
1301 #define ARIZONA_WSEQ_JD1_FALL_SEQ_ADDR_WIDTH 9 /* WSEQ_JD1_FALL_SEQ_ADDR - [8:0] */
1302 
1303 /*
1304  * R108 (0x6C) - Always On Triggers Sequence Select 5
1305  */
1306 #define ARIZONA_WSEQ_JD2_RISE_SEQ_ADDR_MASK 0x01FF /* WSEQ_JD2_RISE_SEQ_ADDR - [8:0] */
1307 #define ARIZONA_WSEQ_JD2_RISE_SEQ_ADDR_SHIFT 0 /* WSEQ_JD2_RISE_SEQ_ADDR - [8:0] */
1308 #define ARIZONA_WSEQ_JD2_RISE_SEQ_ADDR_WIDTH 9 /* WSEQ_JD2_RISE_SEQ_ADDR - [8:0] */
1309 
1310 /*
1311  * R109 (0x6D) - Always On Triggers Sequence Select 6
1312  */
1313 #define ARIZONA_WSEQ_JD2_FALL_SEQ_ADDR_MASK 0x01FF /* WSEQ_JD2_FALL_SEQ_ADDR - [8:0] */
1314 #define ARIZONA_WSEQ_JD2_FALL_SEQ_ADDR_SHIFT 0 /* WSEQ_JD2_FALL_SEQ_ADDR - [8:0] */
1315 #define ARIZONA_WSEQ_JD2_FALL_SEQ_ADDR_WIDTH 9 /* WSEQ_JD2_FALL_SEQ_ADDR - [8:0] */
1316 
1317 /*
1318  * R112 (0x70) - Comfort Noise Generator
1319  */
1320 #define ARIZONA_NOISE_GEN_RATE_MASK 0x7800 /* NOISE_GEN_RATE - [14:11] */
1321 #define ARIZONA_NOISE_GEN_RATE_SHIFT 11 /* NOISE_GEN_RATE - [14:11] */
1322 #define ARIZONA_NOISE_GEN_RATE_WIDTH 4 /* NOISE_GEN_RATE - [14:11] */
1323 #define ARIZONA_NOISE_GEN_ENA 0x0020 /* NOISE_GEN_ENA */
1324 #define ARIZONA_NOISE_GEN_ENA_MASK 0x0020 /* NOISE_GEN_ENA */
1325 #define ARIZONA_NOISE_GEN_ENA_SHIFT 5 /* NOISE_GEN_ENA */
1326 #define ARIZONA_NOISE_GEN_ENA_WIDTH 1 /* NOISE_GEN_ENA */
1327 #define ARIZONA_NOISE_GEN_GAIN_MASK 0x001F /* NOISE_GEN_GAIN - [4:0] */
1328 #define ARIZONA_NOISE_GEN_GAIN_SHIFT 0 /* NOISE_GEN_GAIN - [4:0] */
1329 #define ARIZONA_NOISE_GEN_GAIN_WIDTH 5 /* NOISE_GEN_GAIN - [4:0] */
1330 
1331 /*
1332  * R144 (0x90) - Haptics Control 1
1333  */
1334 #define ARIZONA_HAP_RATE_MASK 0x7800 /* HAP_RATE - [14:11] */
1335 #define ARIZONA_HAP_RATE_SHIFT 11 /* HAP_RATE - [14:11] */
1336 #define ARIZONA_HAP_RATE_WIDTH 4 /* HAP_RATE - [14:11] */
1337 #define ARIZONA_ONESHOT_TRIG 0x0010 /* ONESHOT_TRIG */
1338 #define ARIZONA_ONESHOT_TRIG_MASK 0x0010 /* ONESHOT_TRIG */
1339 #define ARIZONA_ONESHOT_TRIG_SHIFT 4 /* ONESHOT_TRIG */
1340 #define ARIZONA_ONESHOT_TRIG_WIDTH 1 /* ONESHOT_TRIG */
1341 #define ARIZONA_HAP_CTRL_MASK 0x000C /* HAP_CTRL - [3:2] */
1342 #define ARIZONA_HAP_CTRL_SHIFT 2 /* HAP_CTRL - [3:2] */
1343 #define ARIZONA_HAP_CTRL_WIDTH 2 /* HAP_CTRL - [3:2] */
1344 #define ARIZONA_HAP_ACT 0x0002 /* HAP_ACT */
1345 #define ARIZONA_HAP_ACT_MASK 0x0002 /* HAP_ACT */
1346 #define ARIZONA_HAP_ACT_SHIFT 1 /* HAP_ACT */
1347 #define ARIZONA_HAP_ACT_WIDTH 1 /* HAP_ACT */
1348 
1349 /*
1350  * R145 (0x91) - Haptics Control 2
1351  */
1352 #define ARIZONA_LRA_FREQ_MASK 0x7FFF /* LRA_FREQ - [14:0] */
1353 #define ARIZONA_LRA_FREQ_SHIFT 0 /* LRA_FREQ - [14:0] */
1354 #define ARIZONA_LRA_FREQ_WIDTH 15 /* LRA_FREQ - [14:0] */
1355 
1356 /*
1357  * R146 (0x92) - Haptics phase 1 intensity
1358  */
1359 #define ARIZONA_PHASE1_INTENSITY_MASK 0x00FF /* PHASE1_INTENSITY - [7:0] */
1360 #define ARIZONA_PHASE1_INTENSITY_SHIFT 0 /* PHASE1_INTENSITY - [7:0] */
1361 #define ARIZONA_PHASE1_INTENSITY_WIDTH 8 /* PHASE1_INTENSITY - [7:0] */
1362 
1363 /*
1364  * R147 (0x93) - Haptics phase 1 duration
1365  */
1366 #define ARIZONA_PHASE1_DURATION_MASK 0x01FF /* PHASE1_DURATION - [8:0] */
1367 #define ARIZONA_PHASE1_DURATION_SHIFT 0 /* PHASE1_DURATION - [8:0] */
1368 #define ARIZONA_PHASE1_DURATION_WIDTH 9 /* PHASE1_DURATION - [8:0] */
1369 
1370 /*
1371  * R148 (0x94) - Haptics phase 2 intensity
1372  */
1373 #define ARIZONA_PHASE2_INTENSITY_MASK 0x00FF /* PHASE2_INTENSITY - [7:0] */
1374 #define ARIZONA_PHASE2_INTENSITY_SHIFT 0 /* PHASE2_INTENSITY - [7:0] */
1375 #define ARIZONA_PHASE2_INTENSITY_WIDTH 8 /* PHASE2_INTENSITY - [7:0] */
1376 
1377 /*
1378  * R149 (0x95) - Haptics phase 2 duration
1379  */
1380 #define ARIZONA_PHASE2_DURATION_MASK 0x07FF /* PHASE2_DURATION - [10:0] */
1381 #define ARIZONA_PHASE2_DURATION_SHIFT 0 /* PHASE2_DURATION - [10:0] */
1382 #define ARIZONA_PHASE2_DURATION_WIDTH 11 /* PHASE2_DURATION - [10:0] */
1383 
1384 /*
1385  * R150 (0x96) - Haptics phase 3 intensity
1386  */
1387 #define ARIZONA_PHASE3_INTENSITY_MASK 0x00FF /* PHASE3_INTENSITY - [7:0] */
1388 #define ARIZONA_PHASE3_INTENSITY_SHIFT 0 /* PHASE3_INTENSITY - [7:0] */
1389 #define ARIZONA_PHASE3_INTENSITY_WIDTH 8 /* PHASE3_INTENSITY - [7:0] */
1390 
1391 /*
1392  * R151 (0x97) - Haptics phase 3 duration
1393  */
1394 #define ARIZONA_PHASE3_DURATION_MASK 0x01FF /* PHASE3_DURATION - [8:0] */
1395 #define ARIZONA_PHASE3_DURATION_SHIFT 0 /* PHASE3_DURATION - [8:0] */
1396 #define ARIZONA_PHASE3_DURATION_WIDTH 9 /* PHASE3_DURATION - [8:0] */
1397 
1398 /*
1399  * R152 (0x98) - Haptics Status
1400  */
1401 #define ARIZONA_ONESHOT_STS 0x0001 /* ONESHOT_STS */
1402 #define ARIZONA_ONESHOT_STS_MASK 0x0001 /* ONESHOT_STS */
1403 #define ARIZONA_ONESHOT_STS_SHIFT 0 /* ONESHOT_STS */
1404 #define ARIZONA_ONESHOT_STS_WIDTH 1 /* ONESHOT_STS */
1405 
1406 /*
1407  * R256 (0x100) - Clock 32k 1
1408  */
1409 #define ARIZONA_CLK_32K_ENA 0x0040 /* CLK_32K_ENA */
1410 #define ARIZONA_CLK_32K_ENA_MASK 0x0040 /* CLK_32K_ENA */
1411 #define ARIZONA_CLK_32K_ENA_SHIFT 6 /* CLK_32K_ENA */
1412 #define ARIZONA_CLK_32K_ENA_WIDTH 1 /* CLK_32K_ENA */
1413 #define ARIZONA_CLK_32K_SRC_MASK 0x0003 /* CLK_32K_SRC - [1:0] */
1414 #define ARIZONA_CLK_32K_SRC_SHIFT 0 /* CLK_32K_SRC - [1:0] */
1415 #define ARIZONA_CLK_32K_SRC_WIDTH 2 /* CLK_32K_SRC - [1:0] */
1416 
1417 /*
1418  * R257 (0x101) - System Clock 1
1419  */
1420 #define ARIZONA_SYSCLK_FRAC 0x8000 /* SYSCLK_FRAC */
1421 #define ARIZONA_SYSCLK_FRAC_MASK 0x8000 /* SYSCLK_FRAC */
1422 #define ARIZONA_SYSCLK_FRAC_SHIFT 15 /* SYSCLK_FRAC */
1423 #define ARIZONA_SYSCLK_FRAC_WIDTH 1 /* SYSCLK_FRAC */
1424 #define ARIZONA_SYSCLK_FREQ_MASK 0x0700 /* SYSCLK_FREQ - [10:8] */
1425 #define ARIZONA_SYSCLK_FREQ_SHIFT 8 /* SYSCLK_FREQ - [10:8] */
1426 #define ARIZONA_SYSCLK_FREQ_WIDTH 3 /* SYSCLK_FREQ - [10:8] */
1427 #define ARIZONA_SYSCLK_ENA 0x0040 /* SYSCLK_ENA */
1428 #define ARIZONA_SYSCLK_ENA_MASK 0x0040 /* SYSCLK_ENA */
1429 #define ARIZONA_SYSCLK_ENA_SHIFT 6 /* SYSCLK_ENA */
1430 #define ARIZONA_SYSCLK_ENA_WIDTH 1 /* SYSCLK_ENA */
1431 #define ARIZONA_SYSCLK_SRC_MASK 0x000F /* SYSCLK_SRC - [3:0] */
1432 #define ARIZONA_SYSCLK_SRC_SHIFT 0 /* SYSCLK_SRC - [3:0] */
1433 #define ARIZONA_SYSCLK_SRC_WIDTH 4 /* SYSCLK_SRC - [3:0] */
1434 
1435 /*
1436  * R258 (0x102) - Sample rate 1
1437  */
1438 #define ARIZONA_SAMPLE_RATE_1_MASK 0x001F /* SAMPLE_RATE_1 - [4:0] */
1439 #define ARIZONA_SAMPLE_RATE_1_SHIFT 0 /* SAMPLE_RATE_1 - [4:0] */
1440 #define ARIZONA_SAMPLE_RATE_1_WIDTH 5 /* SAMPLE_RATE_1 - [4:0] */
1441 
1442 /*
1443  * R259 (0x103) - Sample rate 2
1444  */
1445 #define ARIZONA_SAMPLE_RATE_2_MASK 0x001F /* SAMPLE_RATE_2 - [4:0] */
1446 #define ARIZONA_SAMPLE_RATE_2_SHIFT 0 /* SAMPLE_RATE_2 - [4:0] */
1447 #define ARIZONA_SAMPLE_RATE_2_WIDTH 5 /* SAMPLE_RATE_2 - [4:0] */
1448 
1449 /*
1450  * R260 (0x104) - Sample rate 3
1451  */
1452 #define ARIZONA_SAMPLE_RATE_3_MASK 0x001F /* SAMPLE_RATE_3 - [4:0] */
1453 #define ARIZONA_SAMPLE_RATE_3_SHIFT 0 /* SAMPLE_RATE_3 - [4:0] */
1454 #define ARIZONA_SAMPLE_RATE_3_WIDTH 5 /* SAMPLE_RATE_3 - [4:0] */
1455 
1456 /*
1457  * R266 (0x10A) - Sample rate 1 status
1458  */
1459 #define ARIZONA_SAMPLE_RATE_1_STS_MASK 0x001F /* SAMPLE_RATE_1_STS - [4:0] */
1460 #define ARIZONA_SAMPLE_RATE_1_STS_SHIFT 0 /* SAMPLE_RATE_1_STS - [4:0] */
1461 #define ARIZONA_SAMPLE_RATE_1_STS_WIDTH 5 /* SAMPLE_RATE_1_STS - [4:0] */
1462 
1463 /*
1464  * R267 (0x10B) - Sample rate 2 status
1465  */
1466 #define ARIZONA_SAMPLE_RATE_2_STS_MASK 0x001F /* SAMPLE_RATE_2_STS - [4:0] */
1467 #define ARIZONA_SAMPLE_RATE_2_STS_SHIFT 0 /* SAMPLE_RATE_2_STS - [4:0] */
1468 #define ARIZONA_SAMPLE_RATE_2_STS_WIDTH 5 /* SAMPLE_RATE_2_STS - [4:0] */
1469 
1470 /*
1471  * R268 (0x10C) - Sample rate 3 status
1472  */
1473 #define ARIZONA_SAMPLE_RATE_3_STS_MASK 0x001F /* SAMPLE_RATE_3_STS - [4:0] */
1474 #define ARIZONA_SAMPLE_RATE_3_STS_SHIFT 0 /* SAMPLE_RATE_3_STS - [4:0] */
1475 #define ARIZONA_SAMPLE_RATE_3_STS_WIDTH 5 /* SAMPLE_RATE_3_STS - [4:0] */
1476 
1477 /*
1478  * R274 (0x112) - Async clock 1
1479  */
1480 #define ARIZONA_ASYNC_CLK_FREQ_MASK 0x0700 /* ASYNC_CLK_FREQ - [10:8] */
1481 #define ARIZONA_ASYNC_CLK_FREQ_SHIFT 8 /* ASYNC_CLK_FREQ - [10:8] */
1482 #define ARIZONA_ASYNC_CLK_FREQ_WIDTH 3 /* ASYNC_CLK_FREQ - [10:8] */
1483 #define ARIZONA_ASYNC_CLK_ENA 0x0040 /* ASYNC_CLK_ENA */
1484 #define ARIZONA_ASYNC_CLK_ENA_MASK 0x0040 /* ASYNC_CLK_ENA */
1485 #define ARIZONA_ASYNC_CLK_ENA_SHIFT 6 /* ASYNC_CLK_ENA */
1486 #define ARIZONA_ASYNC_CLK_ENA_WIDTH 1 /* ASYNC_CLK_ENA */
1487 #define ARIZONA_ASYNC_CLK_SRC_MASK 0x000F /* ASYNC_CLK_SRC - [3:0] */
1488 #define ARIZONA_ASYNC_CLK_SRC_SHIFT 0 /* ASYNC_CLK_SRC - [3:0] */
1489 #define ARIZONA_ASYNC_CLK_SRC_WIDTH 4 /* ASYNC_CLK_SRC - [3:0] */
1490 
1491 /*
1492  * R275 (0x113) - Async sample rate 1
1493  */
1494 #define ARIZONA_ASYNC_SAMPLE_RATE_MASK 0x001F /* ASYNC_SAMPLE_RATE - [4:0] */
1495 #define ARIZONA_ASYNC_SAMPLE_RATE_SHIFT 0 /* ASYNC_SAMPLE_RATE - [4:0] */
1496 #define ARIZONA_ASYNC_SAMPLE_RATE_WIDTH 5 /* ASYNC_SAMPLE_RATE - [4:0] */
1497 
1498 /*
1499  * R283 (0x11B) - Async sample rate 1 status
1500  */
1501 #define ARIZONA_ASYNC_SAMPLE_RATE_STS_MASK 0x001F /* ASYNC_SAMPLE_RATE_STS - [4:0] */
1502 #define ARIZONA_ASYNC_SAMPLE_RATE_STS_SHIFT 0 /* ASYNC_SAMPLE_RATE_STS - [4:0] */
1503 #define ARIZONA_ASYNC_SAMPLE_RATE_STS_WIDTH 5 /* ASYNC_SAMPLE_RATE_STS - [4:0] */
1504 
1505 /*
1506  * R329 (0x149) - Output system clock
1507  */
1508 #define ARIZONA_OPCLK_ENA 0x8000 /* OPCLK_ENA */
1509 #define ARIZONA_OPCLK_ENA_MASK 0x8000 /* OPCLK_ENA */
1510 #define ARIZONA_OPCLK_ENA_SHIFT 15 /* OPCLK_ENA */
1511 #define ARIZONA_OPCLK_ENA_WIDTH 1 /* OPCLK_ENA */
1512 #define ARIZONA_OPCLK_DIV_MASK 0x00F8 /* OPCLK_DIV - [7:3] */
1513 #define ARIZONA_OPCLK_DIV_SHIFT 3 /* OPCLK_DIV - [7:3] */
1514 #define ARIZONA_OPCLK_DIV_WIDTH 5 /* OPCLK_DIV - [7:3] */
1515 #define ARIZONA_OPCLK_SEL_MASK 0x0007 /* OPCLK_SEL - [2:0] */
1516 #define ARIZONA_OPCLK_SEL_SHIFT 0 /* OPCLK_SEL - [2:0] */
1517 #define ARIZONA_OPCLK_SEL_WIDTH 3 /* OPCLK_SEL - [2:0] */
1518 
1519 /*
1520  * R330 (0x14A) - Output async clock
1521  */
1522 #define ARIZONA_OPCLK_ASYNC_ENA 0x8000 /* OPCLK_ASYNC_ENA */
1523 #define ARIZONA_OPCLK_ASYNC_ENA_MASK 0x8000 /* OPCLK_ASYNC_ENA */
1524 #define ARIZONA_OPCLK_ASYNC_ENA_SHIFT 15 /* OPCLK_ASYNC_ENA */
1525 #define ARIZONA_OPCLK_ASYNC_ENA_WIDTH 1 /* OPCLK_ASYNC_ENA */
1526 #define ARIZONA_OPCLK_ASYNC_DIV_MASK 0x00F8 /* OPCLK_ASYNC_DIV - [7:3] */
1527 #define ARIZONA_OPCLK_ASYNC_DIV_SHIFT 3 /* OPCLK_ASYNC_DIV - [7:3] */
1528 #define ARIZONA_OPCLK_ASYNC_DIV_WIDTH 5 /* OPCLK_ASYNC_DIV - [7:3] */
1529 #define ARIZONA_OPCLK_ASYNC_SEL_MASK 0x0007 /* OPCLK_ASYNC_SEL - [2:0] */
1530 #define ARIZONA_OPCLK_ASYNC_SEL_SHIFT 0 /* OPCLK_ASYNC_SEL - [2:0] */
1531 #define ARIZONA_OPCLK_ASYNC_SEL_WIDTH 3 /* OPCLK_ASYNC_SEL - [2:0] */
1532 
1533 /*
1534  * R338 (0x152) - Rate Estimator 1
1535  */
1536 #define ARIZONA_TRIG_ON_STARTUP 0x0010 /* TRIG_ON_STARTUP */
1537 #define ARIZONA_TRIG_ON_STARTUP_MASK 0x0010 /* TRIG_ON_STARTUP */
1538 #define ARIZONA_TRIG_ON_STARTUP_SHIFT 4 /* TRIG_ON_STARTUP */
1539 #define ARIZONA_TRIG_ON_STARTUP_WIDTH 1 /* TRIG_ON_STARTUP */
1540 #define ARIZONA_LRCLK_SRC_MASK 0x000E /* LRCLK_SRC - [3:1] */
1541 #define ARIZONA_LRCLK_SRC_SHIFT 1 /* LRCLK_SRC - [3:1] */
1542 #define ARIZONA_LRCLK_SRC_WIDTH 3 /* LRCLK_SRC - [3:1] */
1543 #define ARIZONA_RATE_EST_ENA 0x0001 /* RATE_EST_ENA */
1544 #define ARIZONA_RATE_EST_ENA_MASK 0x0001 /* RATE_EST_ENA */
1545 #define ARIZONA_RATE_EST_ENA_SHIFT 0 /* RATE_EST_ENA */
1546 #define ARIZONA_RATE_EST_ENA_WIDTH 1 /* RATE_EST_ENA */
1547 
1548 /*
1549  * R339 (0x153) - Rate Estimator 2
1550  */
1551 #define ARIZONA_SAMPLE_RATE_DETECT_A_MASK 0x001F /* SAMPLE_RATE_DETECT_A - [4:0] */
1552 #define ARIZONA_SAMPLE_RATE_DETECT_A_SHIFT 0 /* SAMPLE_RATE_DETECT_A - [4:0] */
1553 #define ARIZONA_SAMPLE_RATE_DETECT_A_WIDTH 5 /* SAMPLE_RATE_DETECT_A - [4:0] */
1554 
1555 /*
1556  * R340 (0x154) - Rate Estimator 3
1557  */
1558 #define ARIZONA_SAMPLE_RATE_DETECT_B_MASK 0x001F /* SAMPLE_RATE_DETECT_B - [4:0] */
1559 #define ARIZONA_SAMPLE_RATE_DETECT_B_SHIFT 0 /* SAMPLE_RATE_DETECT_B - [4:0] */
1560 #define ARIZONA_SAMPLE_RATE_DETECT_B_WIDTH 5 /* SAMPLE_RATE_DETECT_B - [4:0] */
1561 
1562 /*
1563  * R341 (0x155) - Rate Estimator 4
1564  */
1565 #define ARIZONA_SAMPLE_RATE_DETECT_C_MASK 0x001F /* SAMPLE_RATE_DETECT_C - [4:0] */
1566 #define ARIZONA_SAMPLE_RATE_DETECT_C_SHIFT 0 /* SAMPLE_RATE_DETECT_C - [4:0] */
1567 #define ARIZONA_SAMPLE_RATE_DETECT_C_WIDTH 5 /* SAMPLE_RATE_DETECT_C - [4:0] */
1568 
1569 /*
1570  * R342 (0x156) - Rate Estimator 5
1571  */
1572 #define ARIZONA_SAMPLE_RATE_DETECT_D_MASK 0x001F /* SAMPLE_RATE_DETECT_D - [4:0] */
1573 #define ARIZONA_SAMPLE_RATE_DETECT_D_SHIFT 0 /* SAMPLE_RATE_DETECT_D - [4:0] */
1574 #define ARIZONA_SAMPLE_RATE_DETECT_D_WIDTH 5 /* SAMPLE_RATE_DETECT_D - [4:0] */
1575 
1576 /*
1577  * R369 (0x171) - FLL1 Control 1
1578  */
1579 #define ARIZONA_FLL1_FREERUN 0x0002 /* FLL1_FREERUN */
1580 #define ARIZONA_FLL1_FREERUN_MASK 0x0002 /* FLL1_FREERUN */
1581 #define ARIZONA_FLL1_FREERUN_SHIFT 1 /* FLL1_FREERUN */
1582 #define ARIZONA_FLL1_FREERUN_WIDTH 1 /* FLL1_FREERUN */
1583 #define ARIZONA_FLL1_ENA 0x0001 /* FLL1_ENA */
1584 #define ARIZONA_FLL1_ENA_MASK 0x0001 /* FLL1_ENA */
1585 #define ARIZONA_FLL1_ENA_SHIFT 0 /* FLL1_ENA */
1586 #define ARIZONA_FLL1_ENA_WIDTH 1 /* FLL1_ENA */
1587 
1588 /*
1589  * R370 (0x172) - FLL1 Control 2
1590  */
1591 #define ARIZONA_FLL1_CTRL_UPD 0x8000 /* FLL1_CTRL_UPD */
1592 #define ARIZONA_FLL1_CTRL_UPD_MASK 0x8000 /* FLL1_CTRL_UPD */
1593 #define ARIZONA_FLL1_CTRL_UPD_SHIFT 15 /* FLL1_CTRL_UPD */
1594 #define ARIZONA_FLL1_CTRL_UPD_WIDTH 1 /* FLL1_CTRL_UPD */
1595 #define ARIZONA_FLL1_N_MASK 0x03FF /* FLL1_N - [9:0] */
1596 #define ARIZONA_FLL1_N_SHIFT 0 /* FLL1_N - [9:0] */
1597 #define ARIZONA_FLL1_N_WIDTH 10 /* FLL1_N - [9:0] */
1598 
1599 /*
1600  * R371 (0x173) - FLL1 Control 3
1601  */
1602 #define ARIZONA_FLL1_THETA_MASK 0xFFFF /* FLL1_THETA - [15:0] */
1603 #define ARIZONA_FLL1_THETA_SHIFT 0 /* FLL1_THETA - [15:0] */
1604 #define ARIZONA_FLL1_THETA_WIDTH 16 /* FLL1_THETA - [15:0] */
1605 
1606 /*
1607  * R372 (0x174) - FLL1 Control 4
1608  */
1609 #define ARIZONA_FLL1_LAMBDA_MASK 0xFFFF /* FLL1_LAMBDA - [15:0] */
1610 #define ARIZONA_FLL1_LAMBDA_SHIFT 0 /* FLL1_LAMBDA - [15:0] */
1611 #define ARIZONA_FLL1_LAMBDA_WIDTH 16 /* FLL1_LAMBDA - [15:0] */
1612 
1613 /*
1614  * R373 (0x175) - FLL1 Control 5
1615  */
1616 #define ARIZONA_FLL1_FRATIO_MASK 0x0700 /* FLL1_FRATIO - [10:8] */
1617 #define ARIZONA_FLL1_FRATIO_SHIFT 8 /* FLL1_FRATIO - [10:8] */
1618 #define ARIZONA_FLL1_FRATIO_WIDTH 3 /* FLL1_FRATIO - [10:8] */
1619 #define ARIZONA_FLL1_OUTDIV_MASK 0x000E /* FLL1_OUTDIV - [3:1] */
1620 #define ARIZONA_FLL1_OUTDIV_SHIFT 1 /* FLL1_OUTDIV - [3:1] */
1621 #define ARIZONA_FLL1_OUTDIV_WIDTH 3 /* FLL1_OUTDIV - [3:1] */
1622 
1623 /*
1624  * R374 (0x176) - FLL1 Control 6
1625  */
1626 #define ARIZONA_FLL1_CLK_REF_DIV_MASK 0x00C0 /* FLL1_CLK_REF_DIV - [7:6] */
1627 #define ARIZONA_FLL1_CLK_REF_DIV_SHIFT 6 /* FLL1_CLK_REF_DIV - [7:6] */
1628 #define ARIZONA_FLL1_CLK_REF_DIV_WIDTH 2 /* FLL1_CLK_REF_DIV - [7:6] */
1629 #define ARIZONA_FLL1_CLK_REF_SRC_MASK 0x000F /* FLL1_CLK_REF_SRC - [3:0] */
1630 #define ARIZONA_FLL1_CLK_REF_SRC_SHIFT 0 /* FLL1_CLK_REF_SRC - [3:0] */
1631 #define ARIZONA_FLL1_CLK_REF_SRC_WIDTH 4 /* FLL1_CLK_REF_SRC - [3:0] */
1632 
1633 /*
1634  * R375 (0x177) - FLL1 Loop Filter Test 1
1635  */
1636 #define ARIZONA_FLL1_FRC_INTEG_UPD 0x8000 /* FLL1_FRC_INTEG_UPD */
1637 #define ARIZONA_FLL1_FRC_INTEG_UPD_MASK 0x8000 /* FLL1_FRC_INTEG_UPD */
1638 #define ARIZONA_FLL1_FRC_INTEG_UPD_SHIFT 15 /* FLL1_FRC_INTEG_UPD */
1639 #define ARIZONA_FLL1_FRC_INTEG_UPD_WIDTH 1 /* FLL1_FRC_INTEG_UPD */
1640 #define ARIZONA_FLL1_FRC_INTEG_VAL_MASK 0x0FFF /* FLL1_FRC_INTEG_VAL - [11:0] */
1641 #define ARIZONA_FLL1_FRC_INTEG_VAL_SHIFT 0 /* FLL1_FRC_INTEG_VAL - [11:0] */
1642 #define ARIZONA_FLL1_FRC_INTEG_VAL_WIDTH 12 /* FLL1_FRC_INTEG_VAL - [11:0] */
1643 
1644 /*
1645  * R385 (0x181) - FLL1 Synchroniser 1
1646  */
1647 #define ARIZONA_FLL1_SYNC_ENA 0x0001 /* FLL1_SYNC_ENA */
1648 #define ARIZONA_FLL1_SYNC_ENA_MASK 0x0001 /* FLL1_SYNC_ENA */
1649 #define ARIZONA_FLL1_SYNC_ENA_SHIFT 0 /* FLL1_SYNC_ENA */
1650 #define ARIZONA_FLL1_SYNC_ENA_WIDTH 1 /* FLL1_SYNC_ENA */
1651 
1652 /*
1653  * R386 (0x182) - FLL1 Synchroniser 2
1654  */
1655 #define ARIZONA_FLL1_SYNC_N_MASK 0x03FF /* FLL1_SYNC_N - [9:0] */
1656 #define ARIZONA_FLL1_SYNC_N_SHIFT 0 /* FLL1_SYNC_N - [9:0] */
1657 #define ARIZONA_FLL1_SYNC_N_WIDTH 10 /* FLL1_SYNC_N - [9:0] */
1658 
1659 /*
1660  * R387 (0x183) - FLL1 Synchroniser 3
1661  */
1662 #define ARIZONA_FLL1_SYNC_THETA_MASK 0xFFFF /* FLL1_SYNC_THETA - [15:0] */
1663 #define ARIZONA_FLL1_SYNC_THETA_SHIFT 0 /* FLL1_SYNC_THETA - [15:0] */
1664 #define ARIZONA_FLL1_SYNC_THETA_WIDTH 16 /* FLL1_SYNC_THETA - [15:0] */
1665 
1666 /*
1667  * R388 (0x184) - FLL1 Synchroniser 4
1668  */
1669 #define ARIZONA_FLL1_SYNC_LAMBDA_MASK 0xFFFF /* FLL1_SYNC_LAMBDA - [15:0] */
1670 #define ARIZONA_FLL1_SYNC_LAMBDA_SHIFT 0 /* FLL1_SYNC_LAMBDA - [15:0] */
1671 #define ARIZONA_FLL1_SYNC_LAMBDA_WIDTH 16 /* FLL1_SYNC_LAMBDA - [15:0] */
1672 
1673 /*
1674  * R389 (0x185) - FLL1 Synchroniser 5
1675  */
1676 #define ARIZONA_FLL1_SYNC_FRATIO_MASK 0x0700 /* FLL1_SYNC_FRATIO - [10:8] */
1677 #define ARIZONA_FLL1_SYNC_FRATIO_SHIFT 8 /* FLL1_SYNC_FRATIO - [10:8] */
1678 #define ARIZONA_FLL1_SYNC_FRATIO_WIDTH 3 /* FLL1_SYNC_FRATIO - [10:8] */
1679 
1680 /*
1681  * R390 (0x186) - FLL1 Synchroniser 6
1682  */
1683 #define ARIZONA_FLL1_CLK_SYNC_DIV_MASK 0x00C0 /* FLL1_CLK_SYNC_DIV - [7:6] */
1684 #define ARIZONA_FLL1_CLK_SYNC_DIV_SHIFT 6 /* FLL1_CLK_SYNC_DIV - [7:6] */
1685 #define ARIZONA_FLL1_CLK_SYNC_DIV_WIDTH 2 /* FLL1_CLK_SYNC_DIV - [7:6] */
1686 #define ARIZONA_FLL1_CLK_SYNC_SRC_MASK 0x000F /* FLL1_CLK_SYNC_SRC - [3:0] */
1687 #define ARIZONA_FLL1_CLK_SYNC_SRC_SHIFT 0 /* FLL1_CLK_SYNC_SRC - [3:0] */
1688 #define ARIZONA_FLL1_CLK_SYNC_SRC_WIDTH 4 /* FLL1_CLK_SYNC_SRC - [3:0] */
1689 
1690 /*
1691  * R393 (0x189) - FLL1 Spread Spectrum
1692  */
1693 #define ARIZONA_FLL1_SS_AMPL_MASK 0x0030 /* FLL1_SS_AMPL - [5:4] */
1694 #define ARIZONA_FLL1_SS_AMPL_SHIFT 4 /* FLL1_SS_AMPL - [5:4] */
1695 #define ARIZONA_FLL1_SS_AMPL_WIDTH 2 /* FLL1_SS_AMPL - [5:4] */
1696 #define ARIZONA_FLL1_SS_FREQ_MASK 0x000C /* FLL1_SS_FREQ - [3:2] */
1697 #define ARIZONA_FLL1_SS_FREQ_SHIFT 2 /* FLL1_SS_FREQ - [3:2] */
1698 #define ARIZONA_FLL1_SS_FREQ_WIDTH 2 /* FLL1_SS_FREQ - [3:2] */
1699 #define ARIZONA_FLL1_SS_SEL_MASK 0x0003 /* FLL1_SS_SEL - [1:0] */
1700 #define ARIZONA_FLL1_SS_SEL_SHIFT 0 /* FLL1_SS_SEL - [1:0] */
1701 #define ARIZONA_FLL1_SS_SEL_WIDTH 2 /* FLL1_SS_SEL - [1:0] */
1702 
1703 /*
1704  * R394 (0x18A) - FLL1 GPIO Clock
1705  */
1706 #define ARIZONA_FLL1_GPDIV_MASK 0x00FE /* FLL1_GPDIV - [7:1] */
1707 #define ARIZONA_FLL1_GPDIV_SHIFT 1 /* FLL1_GPDIV - [7:1] */
1708 #define ARIZONA_FLL1_GPDIV_WIDTH 7 /* FLL1_GPDIV - [7:1] */
1709 #define ARIZONA_FLL1_GPDIV_ENA 0x0001 /* FLL1_GPDIV_ENA */
1710 #define ARIZONA_FLL1_GPDIV_ENA_MASK 0x0001 /* FLL1_GPDIV_ENA */
1711 #define ARIZONA_FLL1_GPDIV_ENA_SHIFT 0 /* FLL1_GPDIV_ENA */
1712 #define ARIZONA_FLL1_GPDIV_ENA_WIDTH 1 /* FLL1_GPDIV_ENA */
1713 
1714 /*
1715  * R401 (0x191) - FLL2 Control 1
1716  */
1717 #define ARIZONA_FLL2_FREERUN 0x0002 /* FLL2_FREERUN */
1718 #define ARIZONA_FLL2_FREERUN_MASK 0x0002 /* FLL2_FREERUN */
1719 #define ARIZONA_FLL2_FREERUN_SHIFT 1 /* FLL2_FREERUN */
1720 #define ARIZONA_FLL2_FREERUN_WIDTH 1 /* FLL2_FREERUN */
1721 #define ARIZONA_FLL2_ENA 0x0001 /* FLL2_ENA */
1722 #define ARIZONA_FLL2_ENA_MASK 0x0001 /* FLL2_ENA */
1723 #define ARIZONA_FLL2_ENA_SHIFT 0 /* FLL2_ENA */
1724 #define ARIZONA_FLL2_ENA_WIDTH 1 /* FLL2_ENA */
1725 
1726 /*
1727  * R402 (0x192) - FLL2 Control 2
1728  */
1729 #define ARIZONA_FLL2_CTRL_UPD 0x8000 /* FLL2_CTRL_UPD */
1730 #define ARIZONA_FLL2_CTRL_UPD_MASK 0x8000 /* FLL2_CTRL_UPD */
1731 #define ARIZONA_FLL2_CTRL_UPD_SHIFT 15 /* FLL2_CTRL_UPD */
1732 #define ARIZONA_FLL2_CTRL_UPD_WIDTH 1 /* FLL2_CTRL_UPD */
1733 #define ARIZONA_FLL2_N_MASK 0x03FF /* FLL2_N - [9:0] */
1734 #define ARIZONA_FLL2_N_SHIFT 0 /* FLL2_N - [9:0] */
1735 #define ARIZONA_FLL2_N_WIDTH 10 /* FLL2_N - [9:0] */
1736 
1737 /*
1738  * R403 (0x193) - FLL2 Control 3
1739  */
1740 #define ARIZONA_FLL2_THETA_MASK 0xFFFF /* FLL2_THETA - [15:0] */
1741 #define ARIZONA_FLL2_THETA_SHIFT 0 /* FLL2_THETA - [15:0] */
1742 #define ARIZONA_FLL2_THETA_WIDTH 16 /* FLL2_THETA - [15:0] */
1743 
1744 /*
1745  * R404 (0x194) - FLL2 Control 4
1746  */
1747 #define ARIZONA_FLL2_LAMBDA_MASK 0xFFFF /* FLL2_LAMBDA - [15:0] */
1748 #define ARIZONA_FLL2_LAMBDA_SHIFT 0 /* FLL2_LAMBDA - [15:0] */
1749 #define ARIZONA_FLL2_LAMBDA_WIDTH 16 /* FLL2_LAMBDA - [15:0] */
1750 
1751 /*
1752  * R405 (0x195) - FLL2 Control 5
1753  */
1754 #define ARIZONA_FLL2_FRATIO_MASK 0x0700 /* FLL2_FRATIO - [10:8] */
1755 #define ARIZONA_FLL2_FRATIO_SHIFT 8 /* FLL2_FRATIO - [10:8] */
1756 #define ARIZONA_FLL2_FRATIO_WIDTH 3 /* FLL2_FRATIO - [10:8] */
1757 #define ARIZONA_FLL2_OUTDIV_MASK 0x000E /* FLL2_OUTDIV - [3:1] */
1758 #define ARIZONA_FLL2_OUTDIV_SHIFT 1 /* FLL2_OUTDIV - [3:1] */
1759 #define ARIZONA_FLL2_OUTDIV_WIDTH 3 /* FLL2_OUTDIV - [3:1] */
1760 
1761 /*
1762  * R406 (0x196) - FLL2 Control 6
1763  */
1764 #define ARIZONA_FLL2_CLK_REF_DIV_MASK 0x00C0 /* FLL2_CLK_REF_DIV - [7:6] */
1765 #define ARIZONA_FLL2_CLK_REF_DIV_SHIFT 6 /* FLL2_CLK_REF_DIV - [7:6] */
1766 #define ARIZONA_FLL2_CLK_REF_DIV_WIDTH 2 /* FLL2_CLK_REF_DIV - [7:6] */
1767 #define ARIZONA_FLL2_CLK_REF_SRC_MASK 0x000F /* FLL2_CLK_REF_SRC - [3:0] */
1768 #define ARIZONA_FLL2_CLK_REF_SRC_SHIFT 0 /* FLL2_CLK_REF_SRC - [3:0] */
1769 #define ARIZONA_FLL2_CLK_REF_SRC_WIDTH 4 /* FLL2_CLK_REF_SRC - [3:0] */
1770 
1771 /*
1772  * R407 (0x197) - FLL2 Loop Filter Test 1
1773  */
1774 #define ARIZONA_FLL2_FRC_INTEG_UPD 0x8000 /* FLL2_FRC_INTEG_UPD */
1775 #define ARIZONA_FLL2_FRC_INTEG_UPD_MASK 0x8000 /* FLL2_FRC_INTEG_UPD */
1776 #define ARIZONA_FLL2_FRC_INTEG_UPD_SHIFT 15 /* FLL2_FRC_INTEG_UPD */
1777 #define ARIZONA_FLL2_FRC_INTEG_UPD_WIDTH 1 /* FLL2_FRC_INTEG_UPD */
1778 #define ARIZONA_FLL2_FRC_INTEG_VAL_MASK 0x0FFF /* FLL2_FRC_INTEG_VAL - [11:0] */
1779 #define ARIZONA_FLL2_FRC_INTEG_VAL_SHIFT 0 /* FLL2_FRC_INTEG_VAL - [11:0] */
1780 #define ARIZONA_FLL2_FRC_INTEG_VAL_WIDTH 12 /* FLL2_FRC_INTEG_VAL - [11:0] */
1781 
1782 /*
1783  * R417 (0x1A1) - FLL2 Synchroniser 1
1784  */
1785 #define ARIZONA_FLL2_SYNC_ENA 0x0001 /* FLL2_SYNC_ENA */
1786 #define ARIZONA_FLL2_SYNC_ENA_MASK 0x0001 /* FLL2_SYNC_ENA */
1787 #define ARIZONA_FLL2_SYNC_ENA_SHIFT 0 /* FLL2_SYNC_ENA */
1788 #define ARIZONA_FLL2_SYNC_ENA_WIDTH 1 /* FLL2_SYNC_ENA */
1789 
1790 /*
1791  * R418 (0x1A2) - FLL2 Synchroniser 2
1792  */
1793 #define ARIZONA_FLL2_SYNC_N_MASK 0x03FF /* FLL2_SYNC_N - [9:0] */
1794 #define ARIZONA_FLL2_SYNC_N_SHIFT 0 /* FLL2_SYNC_N - [9:0] */
1795 #define ARIZONA_FLL2_SYNC_N_WIDTH 10 /* FLL2_SYNC_N - [9:0] */
1796 
1797 /*
1798  * R419 (0x1A3) - FLL2 Synchroniser 3
1799  */
1800 #define ARIZONA_FLL2_SYNC_THETA_MASK 0xFFFF /* FLL2_SYNC_THETA - [15:0] */
1801 #define ARIZONA_FLL2_SYNC_THETA_SHIFT 0 /* FLL2_SYNC_THETA - [15:0] */
1802 #define ARIZONA_FLL2_SYNC_THETA_WIDTH 16 /* FLL2_SYNC_THETA - [15:0] */
1803 
1804 /*
1805  * R420 (0x1A4) - FLL2 Synchroniser 4
1806  */
1807 #define ARIZONA_FLL2_SYNC_LAMBDA_MASK 0xFFFF /* FLL2_SYNC_LAMBDA - [15:0] */
1808 #define ARIZONA_FLL2_SYNC_LAMBDA_SHIFT 0 /* FLL2_SYNC_LAMBDA - [15:0] */
1809 #define ARIZONA_FLL2_SYNC_LAMBDA_WIDTH 16 /* FLL2_SYNC_LAMBDA - [15:0] */
1810 
1811 /*
1812  * R421 (0x1A5) - FLL2 Synchroniser 5
1813  */
1814 #define ARIZONA_FLL2_SYNC_FRATIO_MASK 0x0700 /* FLL2_SYNC_FRATIO - [10:8] */
1815 #define ARIZONA_FLL2_SYNC_FRATIO_SHIFT 8 /* FLL2_SYNC_FRATIO - [10:8] */
1816 #define ARIZONA_FLL2_SYNC_FRATIO_WIDTH 3 /* FLL2_SYNC_FRATIO - [10:8] */
1817 
1818 /*
1819  * R422 (0x1A6) - FLL2 Synchroniser 6
1820  */
1821 #define ARIZONA_FLL2_CLK_SYNC_DIV_MASK 0x00C0 /* FLL2_CLK_SYNC_DIV - [7:6] */
1822 #define ARIZONA_FLL2_CLK_SYNC_DIV_SHIFT 6 /* FLL2_CLK_SYNC_DIV - [7:6] */
1823 #define ARIZONA_FLL2_CLK_SYNC_DIV_WIDTH 2 /* FLL2_CLK_SYNC_DIV - [7:6] */
1824 #define ARIZONA_FLL2_CLK_SYNC_SRC_MASK 0x000F /* FLL2_CLK_SYNC_SRC - [3:0] */
1825 #define ARIZONA_FLL2_CLK_SYNC_SRC_SHIFT 0 /* FLL2_CLK_SYNC_SRC - [3:0] */
1826 #define ARIZONA_FLL2_CLK_SYNC_SRC_WIDTH 4 /* FLL2_CLK_SYNC_SRC - [3:0] */
1827 
1828 /*
1829  * R425 (0x1A9) - FLL2 Spread Spectrum
1830  */
1831 #define ARIZONA_FLL2_SS_AMPL_MASK 0x0030 /* FLL2_SS_AMPL - [5:4] */
1832 #define ARIZONA_FLL2_SS_AMPL_SHIFT 4 /* FLL2_SS_AMPL - [5:4] */
1833 #define ARIZONA_FLL2_SS_AMPL_WIDTH 2 /* FLL2_SS_AMPL - [5:4] */
1834 #define ARIZONA_FLL2_SS_FREQ_MASK 0x000C /* FLL2_SS_FREQ - [3:2] */
1835 #define ARIZONA_FLL2_SS_FREQ_SHIFT 2 /* FLL2_SS_FREQ - [3:2] */
1836 #define ARIZONA_FLL2_SS_FREQ_WIDTH 2 /* FLL2_SS_FREQ - [3:2] */
1837 #define ARIZONA_FLL2_SS_SEL_MASK 0x0003 /* FLL2_SS_SEL - [1:0] */
1838 #define ARIZONA_FLL2_SS_SEL_SHIFT 0 /* FLL2_SS_SEL - [1:0] */
1839 #define ARIZONA_FLL2_SS_SEL_WIDTH 2 /* FLL2_SS_SEL - [1:0] */
1840 
1841 /*
1842  * R426 (0x1AA) - FLL2 GPIO Clock
1843  */
1844 #define ARIZONA_FLL2_GPDIV_MASK 0x00FE /* FLL2_GPDIV - [7:1] */
1845 #define ARIZONA_FLL2_GPDIV_SHIFT 1 /* FLL2_GPDIV - [7:1] */
1846 #define ARIZONA_FLL2_GPDIV_WIDTH 7 /* FLL2_GPDIV - [7:1] */
1847 #define ARIZONA_FLL2_GPDIV_ENA 0x0001 /* FLL2_GPDIV_ENA */
1848 #define ARIZONA_FLL2_GPDIV_ENA_MASK 0x0001 /* FLL2_GPDIV_ENA */
1849 #define ARIZONA_FLL2_GPDIV_ENA_SHIFT 0 /* FLL2_GPDIV_ENA */
1850 #define ARIZONA_FLL2_GPDIV_ENA_WIDTH 1 /* FLL2_GPDIV_ENA */
1851 
1852 /*
1853  * R512 (0x200) - Mic Charge Pump 1
1854  */
1855 #define ARIZONA_CPMIC_DISCH 0x0004 /* CPMIC_DISCH */
1856 #define ARIZONA_CPMIC_DISCH_MASK 0x0004 /* CPMIC_DISCH */
1857 #define ARIZONA_CPMIC_DISCH_SHIFT 2 /* CPMIC_DISCH */
1858 #define ARIZONA_CPMIC_DISCH_WIDTH 1 /* CPMIC_DISCH */
1859 #define ARIZONA_CPMIC_BYPASS 0x0002 /* CPMIC_BYPASS */
1860 #define ARIZONA_CPMIC_BYPASS_MASK 0x0002 /* CPMIC_BYPASS */
1861 #define ARIZONA_CPMIC_BYPASS_SHIFT 1 /* CPMIC_BYPASS */
1862 #define ARIZONA_CPMIC_BYPASS_WIDTH 1 /* CPMIC_BYPASS */
1863 #define ARIZONA_CPMIC_ENA 0x0001 /* CPMIC_ENA */
1864 #define ARIZONA_CPMIC_ENA_MASK 0x0001 /* CPMIC_ENA */
1865 #define ARIZONA_CPMIC_ENA_SHIFT 0 /* CPMIC_ENA */
1866 #define ARIZONA_CPMIC_ENA_WIDTH 1 /* CPMIC_ENA */
1867 
1868 /*
1869  * R528 (0x210) - LDO1 Control 1
1870  */
1871 #define ARIZONA_LDO1_VSEL_MASK 0x07E0 /* LDO1_VSEL - [10:5] */
1872 #define ARIZONA_LDO1_VSEL_SHIFT 5 /* LDO1_VSEL - [10:5] */
1873 #define ARIZONA_LDO1_VSEL_WIDTH 6 /* LDO1_VSEL - [10:5] */
1874 #define ARIZONA_LDO1_FAST 0x0010 /* LDO1_FAST */
1875 #define ARIZONA_LDO1_FAST_MASK 0x0010 /* LDO1_FAST */
1876 #define ARIZONA_LDO1_FAST_SHIFT 4 /* LDO1_FAST */
1877 #define ARIZONA_LDO1_FAST_WIDTH 1 /* LDO1_FAST */
1878 #define ARIZONA_LDO1_DISCH 0x0004 /* LDO1_DISCH */
1879 #define ARIZONA_LDO1_DISCH_MASK 0x0004 /* LDO1_DISCH */
1880 #define ARIZONA_LDO1_DISCH_SHIFT 2 /* LDO1_DISCH */
1881 #define ARIZONA_LDO1_DISCH_WIDTH 1 /* LDO1_DISCH */
1882 #define ARIZONA_LDO1_BYPASS 0x0002 /* LDO1_BYPASS */
1883 #define ARIZONA_LDO1_BYPASS_MASK 0x0002 /* LDO1_BYPASS */
1884 #define ARIZONA_LDO1_BYPASS_SHIFT 1 /* LDO1_BYPASS */
1885 #define ARIZONA_LDO1_BYPASS_WIDTH 1 /* LDO1_BYPASS */
1886 #define ARIZONA_LDO1_ENA 0x0001 /* LDO1_ENA */
1887 #define ARIZONA_LDO1_ENA_MASK 0x0001 /* LDO1_ENA */
1888 #define ARIZONA_LDO1_ENA_SHIFT 0 /* LDO1_ENA */
1889 #define ARIZONA_LDO1_ENA_WIDTH 1 /* LDO1_ENA */
1890 
1891 /*
1892  * R531 (0x213) - LDO2 Control 1
1893  */
1894 #define ARIZONA_LDO2_VSEL_MASK 0x07E0 /* LDO2_VSEL - [10:5] */
1895 #define ARIZONA_LDO2_VSEL_SHIFT 5 /* LDO2_VSEL - [10:5] */
1896 #define ARIZONA_LDO2_VSEL_WIDTH 6 /* LDO2_VSEL - [10:5] */
1897 #define ARIZONA_LDO2_FAST 0x0010 /* LDO2_FAST */
1898 #define ARIZONA_LDO2_FAST_MASK 0x0010 /* LDO2_FAST */
1899 #define ARIZONA_LDO2_FAST_SHIFT 4 /* LDO2_FAST */
1900 #define ARIZONA_LDO2_FAST_WIDTH 1 /* LDO2_FAST */
1901 #define ARIZONA_LDO2_DISCH 0x0004 /* LDO2_DISCH */
1902 #define ARIZONA_LDO2_DISCH_MASK 0x0004 /* LDO2_DISCH */
1903 #define ARIZONA_LDO2_DISCH_SHIFT 2 /* LDO2_DISCH */
1904 #define ARIZONA_LDO2_DISCH_WIDTH 1 /* LDO2_DISCH */
1905 #define ARIZONA_LDO2_BYPASS 0x0002 /* LDO2_BYPASS */
1906 #define ARIZONA_LDO2_BYPASS_MASK 0x0002 /* LDO2_BYPASS */
1907 #define ARIZONA_LDO2_BYPASS_SHIFT 1 /* LDO2_BYPASS */
1908 #define ARIZONA_LDO2_BYPASS_WIDTH 1 /* LDO2_BYPASS */
1909 #define ARIZONA_LDO2_ENA 0x0001 /* LDO2_ENA */
1910 #define ARIZONA_LDO2_ENA_MASK 0x0001 /* LDO2_ENA */
1911 #define ARIZONA_LDO2_ENA_SHIFT 0 /* LDO2_ENA */
1912 #define ARIZONA_LDO2_ENA_WIDTH 1 /* LDO2_ENA */
1913 
1914 /*
1915  * R536 (0x218) - Mic Bias Ctrl 1
1916  */
1917 #define ARIZONA_MICB1_EXT_CAP 0x8000 /* MICB1_EXT_CAP */
1918 #define ARIZONA_MICB1_EXT_CAP_MASK 0x8000 /* MICB1_EXT_CAP */
1919 #define ARIZONA_MICB1_EXT_CAP_SHIFT 15 /* MICB1_EXT_CAP */
1920 #define ARIZONA_MICB1_EXT_CAP_WIDTH 1 /* MICB1_EXT_CAP */
1921 #define ARIZONA_MICB1_LVL_MASK 0x01E0 /* MICB1_LVL - [8:5] */
1922 #define ARIZONA_MICB1_LVL_SHIFT 5 /* MICB1_LVL - [8:5] */
1923 #define ARIZONA_MICB1_LVL_WIDTH 4 /* MICB1_LVL - [8:5] */
1924 #define ARIZONA_MICB1_FAST 0x0010 /* MICB1_FAST */
1925 #define ARIZONA_MICB1_FAST_MASK 0x0010 /* MICB1_FAST */
1926 #define ARIZONA_MICB1_FAST_SHIFT 4 /* MICB1_FAST */
1927 #define ARIZONA_MICB1_FAST_WIDTH 1 /* MICB1_FAST */
1928 #define ARIZONA_MICB1_RATE 0x0008 /* MICB1_RATE */
1929 #define ARIZONA_MICB1_RATE_MASK 0x0008 /* MICB1_RATE */
1930 #define ARIZONA_MICB1_RATE_SHIFT 3 /* MICB1_RATE */
1931 #define ARIZONA_MICB1_RATE_WIDTH 1 /* MICB1_RATE */
1932 #define ARIZONA_MICB1_DISCH 0x0004 /* MICB1_DISCH */
1933 #define ARIZONA_MICB1_DISCH_MASK 0x0004 /* MICB1_DISCH */
1934 #define ARIZONA_MICB1_DISCH_SHIFT 2 /* MICB1_DISCH */
1935 #define ARIZONA_MICB1_DISCH_WIDTH 1 /* MICB1_DISCH */
1936 #define ARIZONA_MICB1_BYPASS 0x0002 /* MICB1_BYPASS */
1937 #define ARIZONA_MICB1_BYPASS_MASK 0x0002 /* MICB1_BYPASS */
1938 #define ARIZONA_MICB1_BYPASS_SHIFT 1 /* MICB1_BYPASS */
1939 #define ARIZONA_MICB1_BYPASS_WIDTH 1 /* MICB1_BYPASS */
1940 #define ARIZONA_MICB1_ENA 0x0001 /* MICB1_ENA */
1941 #define ARIZONA_MICB1_ENA_MASK 0x0001 /* MICB1_ENA */
1942 #define ARIZONA_MICB1_ENA_SHIFT 0 /* MICB1_ENA */
1943 #define ARIZONA_MICB1_ENA_WIDTH 1 /* MICB1_ENA */
1944 
1945 /*
1946  * R537 (0x219) - Mic Bias Ctrl 2
1947  */
1948 #define ARIZONA_MICB2_EXT_CAP 0x8000 /* MICB2_EXT_CAP */
1949 #define ARIZONA_MICB2_EXT_CAP_MASK 0x8000 /* MICB2_EXT_CAP */
1950 #define ARIZONA_MICB2_EXT_CAP_SHIFT 15 /* MICB2_EXT_CAP */
1951 #define ARIZONA_MICB2_EXT_CAP_WIDTH 1 /* MICB2_EXT_CAP */
1952 #define ARIZONA_MICB2_LVL_MASK 0x01E0 /* MICB2_LVL - [8:5] */
1953 #define ARIZONA_MICB2_LVL_SHIFT 5 /* MICB2_LVL - [8:5] */
1954 #define ARIZONA_MICB2_LVL_WIDTH 4 /* MICB2_LVL - [8:5] */
1955 #define ARIZONA_MICB2_FAST 0x0010 /* MICB2_FAST */
1956 #define ARIZONA_MICB2_FAST_MASK 0x0010 /* MICB2_FAST */
1957 #define ARIZONA_MICB2_FAST_SHIFT 4 /* MICB2_FAST */
1958 #define ARIZONA_MICB2_FAST_WIDTH 1 /* MICB2_FAST */
1959 #define ARIZONA_MICB2_RATE 0x0008 /* MICB2_RATE */
1960 #define ARIZONA_MICB2_RATE_MASK 0x0008 /* MICB2_RATE */
1961 #define ARIZONA_MICB2_RATE_SHIFT 3 /* MICB2_RATE */
1962 #define ARIZONA_MICB2_RATE_WIDTH 1 /* MICB2_RATE */
1963 #define ARIZONA_MICB2_DISCH 0x0004 /* MICB2_DISCH */
1964 #define ARIZONA_MICB2_DISCH_MASK 0x0004 /* MICB2_DISCH */
1965 #define ARIZONA_MICB2_DISCH_SHIFT 2 /* MICB2_DISCH */
1966 #define ARIZONA_MICB2_DISCH_WIDTH 1 /* MICB2_DISCH */
1967 #define ARIZONA_MICB2_BYPASS 0x0002 /* MICB2_BYPASS */
1968 #define ARIZONA_MICB2_BYPASS_MASK 0x0002 /* MICB2_BYPASS */
1969 #define ARIZONA_MICB2_BYPASS_SHIFT 1 /* MICB2_BYPASS */
1970 #define ARIZONA_MICB2_BYPASS_WIDTH 1 /* MICB2_BYPASS */
1971 #define ARIZONA_MICB2_ENA 0x0001 /* MICB2_ENA */
1972 #define ARIZONA_MICB2_ENA_MASK 0x0001 /* MICB2_ENA */
1973 #define ARIZONA_MICB2_ENA_SHIFT 0 /* MICB2_ENA */
1974 #define ARIZONA_MICB2_ENA_WIDTH 1 /* MICB2_ENA */
1975 
1976 /*
1977  * R538 (0x21A) - Mic Bias Ctrl 3
1978  */
1979 #define ARIZONA_MICB3_EXT_CAP 0x8000 /* MICB3_EXT_CAP */
1980 #define ARIZONA_MICB3_EXT_CAP_MASK 0x8000 /* MICB3_EXT_CAP */
1981 #define ARIZONA_MICB3_EXT_CAP_SHIFT 15 /* MICB3_EXT_CAP */
1982 #define ARIZONA_MICB3_EXT_CAP_WIDTH 1 /* MICB3_EXT_CAP */
1983 #define ARIZONA_MICB3_LVL_MASK 0x01E0 /* MICB3_LVL - [8:5] */
1984 #define ARIZONA_MICB3_LVL_SHIFT 5 /* MICB3_LVL - [8:5] */
1985 #define ARIZONA_MICB3_LVL_WIDTH 4 /* MICB3_LVL - [8:5] */
1986 #define ARIZONA_MICB3_FAST 0x0010 /* MICB3_FAST */
1987 #define ARIZONA_MICB3_FAST_MASK 0x0010 /* MICB3_FAST */
1988 #define ARIZONA_MICB3_FAST_SHIFT 4 /* MICB3_FAST */
1989 #define ARIZONA_MICB3_FAST_WIDTH 1 /* MICB3_FAST */
1990 #define ARIZONA_MICB3_RATE 0x0008 /* MICB3_RATE */
1991 #define ARIZONA_MICB3_RATE_MASK 0x0008 /* MICB3_RATE */
1992 #define ARIZONA_MICB3_RATE_SHIFT 3 /* MICB3_RATE */
1993 #define ARIZONA_MICB3_RATE_WIDTH 1 /* MICB3_RATE */
1994 #define ARIZONA_MICB3_DISCH 0x0004 /* MICB3_DISCH */
1995 #define ARIZONA_MICB3_DISCH_MASK 0x0004 /* MICB3_DISCH */
1996 #define ARIZONA_MICB3_DISCH_SHIFT 2 /* MICB3_DISCH */
1997 #define ARIZONA_MICB3_DISCH_WIDTH 1 /* MICB3_DISCH */
1998 #define ARIZONA_MICB3_BYPASS 0x0002 /* MICB3_BYPASS */
1999 #define ARIZONA_MICB3_BYPASS_MASK 0x0002 /* MICB3_BYPASS */
2000 #define ARIZONA_MICB3_BYPASS_SHIFT 1 /* MICB3_BYPASS */
2001 #define ARIZONA_MICB3_BYPASS_WIDTH 1 /* MICB3_BYPASS */
2002 #define ARIZONA_MICB3_ENA 0x0001 /* MICB3_ENA */
2003 #define ARIZONA_MICB3_ENA_MASK 0x0001 /* MICB3_ENA */
2004 #define ARIZONA_MICB3_ENA_SHIFT 0 /* MICB3_ENA */
2005 #define ARIZONA_MICB3_ENA_WIDTH 1 /* MICB3_ENA */
2006 
2007 /*
2008  * R659 (0x293) - Accessory Detect Mode 1
2009  */
2010 #define ARIZONA_ACCDET_SRC 0x2000 /* ACCDET_SRC */
2011 #define ARIZONA_ACCDET_SRC_MASK 0x2000 /* ACCDET_SRC */
2012 #define ARIZONA_ACCDET_SRC_SHIFT 13 /* ACCDET_SRC */
2013 #define ARIZONA_ACCDET_SRC_WIDTH 1 /* ACCDET_SRC */
2014 #define ARIZONA_ACCDET_MODE_MASK 0x0003 /* ACCDET_MODE - [1:0] */
2015 #define ARIZONA_ACCDET_MODE_SHIFT 0 /* ACCDET_MODE - [1:0] */
2016 #define ARIZONA_ACCDET_MODE_WIDTH 2 /* ACCDET_MODE - [1:0] */
2017 
2018 /*
2019  * R667 (0x29B) - Headphone Detect 1
2020  */
2021 #define ARIZONA_HP_STEP_SIZE 0x0100 /* HP_STEP_SIZE */
2022 #define ARIZONA_HP_STEP_SIZE_MASK 0x0100 /* HP_STEP_SIZE */
2023 #define ARIZONA_HP_STEP_SIZE_SHIFT 8 /* HP_STEP_SIZE */
2024 #define ARIZONA_HP_STEP_SIZE_WIDTH 1 /* HP_STEP_SIZE */
2025 #define ARIZONA_HP_HOLDTIME_MASK 0x00E0 /* HP_HOLDTIME - [7:5] */
2026 #define ARIZONA_HP_HOLDTIME_SHIFT 5 /* HP_HOLDTIME - [7:5] */
2027 #define ARIZONA_HP_HOLDTIME_WIDTH 3 /* HP_HOLDTIME - [7:5] */
2028 #define ARIZONA_HP_CLK_DIV_MASK 0x0018 /* HP_CLK_DIV - [4:3] */
2029 #define ARIZONA_HP_CLK_DIV_SHIFT 3 /* HP_CLK_DIV - [4:3] */
2030 #define ARIZONA_HP_CLK_DIV_WIDTH 2 /* HP_CLK_DIV - [4:3] */
2031 #define ARIZONA_HP_IDAC_STEER 0x0004 /* HP_IDAC_STEER */
2032 #define ARIZONA_HP_IDAC_STEER_MASK 0x0004 /* HP_IDAC_STEER */
2033 #define ARIZONA_HP_IDAC_STEER_SHIFT 2 /* HP_IDAC_STEER */
2034 #define ARIZONA_HP_IDAC_STEER_WIDTH 1 /* HP_IDAC_STEER */
2035 #define ARIZONA_HP_RATE 0x0002 /* HP_RATE */
2036 #define ARIZONA_HP_RATE_MASK 0x0002 /* HP_RATE */
2037 #define ARIZONA_HP_RATE_SHIFT 1 /* HP_RATE */
2038 #define ARIZONA_HP_RATE_WIDTH 1 /* HP_RATE */
2039 #define ARIZONA_HP_POLL 0x0001 /* HP_POLL */
2040 #define ARIZONA_HP_POLL_MASK 0x0001 /* HP_POLL */
2041 #define ARIZONA_HP_POLL_SHIFT 0 /* HP_POLL */
2042 #define ARIZONA_HP_POLL_WIDTH 1 /* HP_POLL */
2043 
2044 /*
2045  * R668 (0x29C) - Headphone Detect 2
2046  */
2047 #define ARIZONA_HP_DONE 0x0080 /* HP_DONE */
2048 #define ARIZONA_HP_DONE_MASK 0x0080 /* HP_DONE */
2049 #define ARIZONA_HP_DONE_SHIFT 7 /* HP_DONE */
2050 #define ARIZONA_HP_DONE_WIDTH 1 /* HP_DONE */
2051 #define ARIZONA_HP_LVL_MASK 0x007F /* HP_LVL - [6:0] */
2052 #define ARIZONA_HP_LVL_SHIFT 0 /* HP_LVL - [6:0] */
2053 #define ARIZONA_HP_LVL_WIDTH 7 /* HP_LVL - [6:0] */
2054 
2055 /*
2056  * R675 (0x2A3) - Mic Detect 1
2057  */
2058 #define ARIZONA_MICD_BIAS_STARTTIME_MASK 0xF000 /* MICD_BIAS_STARTTIME - [15:12] */
2059 #define ARIZONA_MICD_BIAS_STARTTIME_SHIFT 12 /* MICD_BIAS_STARTTIME - [15:12] */
2060 #define ARIZONA_MICD_BIAS_STARTTIME_WIDTH 4 /* MICD_BIAS_STARTTIME - [15:12] */
2061 #define ARIZONA_MICD_RATE_MASK 0x0F00 /* MICD_RATE - [11:8] */
2062 #define ARIZONA_MICD_RATE_SHIFT 8 /* MICD_RATE - [11:8] */
2063 #define ARIZONA_MICD_RATE_WIDTH 4 /* MICD_RATE - [11:8] */
2064 #define ARIZONA_MICD_BIAS_SRC_MASK 0x0030 /* MICD_BIAS_SRC - [5:4] */
2065 #define ARIZONA_MICD_BIAS_SRC_SHIFT 4 /* MICD_BIAS_SRC - [5:4] */
2066 #define ARIZONA_MICD_BIAS_SRC_WIDTH 2 /* MICD_BIAS_SRC - [5:4] */
2067 #define ARIZONA_MICD_DBTIME 0x0002 /* MICD_DBTIME */
2068 #define ARIZONA_MICD_DBTIME_MASK 0x0002 /* MICD_DBTIME */
2069 #define ARIZONA_MICD_DBTIME_SHIFT 1 /* MICD_DBTIME */
2070 #define ARIZONA_MICD_DBTIME_WIDTH 1 /* MICD_DBTIME */
2071 #define ARIZONA_MICD_ENA 0x0001 /* MICD_ENA */
2072 #define ARIZONA_MICD_ENA_MASK 0x0001 /* MICD_ENA */
2073 #define ARIZONA_MICD_ENA_SHIFT 0 /* MICD_ENA */
2074 #define ARIZONA_MICD_ENA_WIDTH 1 /* MICD_ENA */
2075 
2076 /*
2077  * R676 (0x2A4) - Mic Detect 2
2078  */
2079 #define ARIZONA_MICD_LVL_SEL_MASK 0x00FF /* MICD_LVL_SEL - [7:0] */
2080 #define ARIZONA_MICD_LVL_SEL_SHIFT 0 /* MICD_LVL_SEL - [7:0] */
2081 #define ARIZONA_MICD_LVL_SEL_WIDTH 8 /* MICD_LVL_SEL - [7:0] */
2082 
2083 /*
2084  * R677 (0x2A5) - Mic Detect 3
2085  */
2086 #define ARIZONA_MICD_LVL_MASK 0x07FC /* MICD_LVL - [10:2] */
2087 #define ARIZONA_MICD_LVL_SHIFT 2 /* MICD_LVL - [10:2] */
2088 #define ARIZONA_MICD_LVL_WIDTH 9 /* MICD_LVL - [10:2] */
2089 #define ARIZONA_MICD_VALID 0x0002 /* MICD_VALID */
2090 #define ARIZONA_MICD_VALID_MASK 0x0002 /* MICD_VALID */
2091 #define ARIZONA_MICD_VALID_SHIFT 1 /* MICD_VALID */
2092 #define ARIZONA_MICD_VALID_WIDTH 1 /* MICD_VALID */
2093 #define ARIZONA_MICD_STS 0x0001 /* MICD_STS */
2094 #define ARIZONA_MICD_STS_MASK 0x0001 /* MICD_STS */
2095 #define ARIZONA_MICD_STS_SHIFT 0 /* MICD_STS */
2096 #define ARIZONA_MICD_STS_WIDTH 1 /* MICD_STS */
2097 
2098 /*
2099  * R707 (0x2C3) - Mic noise mix control 1
2100  */
2101 #define ARIZONA_MICMUTE_RATE_MASK 0x7800 /* MICMUTE_RATE - [14:11] */
2102 #define ARIZONA_MICMUTE_RATE_SHIFT 11 /* MICMUTE_RATE - [14:11] */
2103 #define ARIZONA_MICMUTE_RATE_WIDTH 4 /* MICMUTE_RATE - [14:11] */
2104 #define ARIZONA_MICMUTE_MIX_ENA 0x0040 /* MICMUTE_MIX_ENA */
2105 #define ARIZONA_MICMUTE_MIX_ENA_MASK 0x0040 /* MICMUTE_MIX_ENA */
2106 #define ARIZONA_MICMUTE_MIX_ENA_SHIFT 6 /* MICMUTE_MIX_ENA */
2107 #define ARIZONA_MICMUTE_MIX_ENA_WIDTH 1 /* MICMUTE_MIX_ENA */
2108 
2109 /*
2110  * R715 (0x2CB) - Isolation control
2111  */
2112 #define ARIZONA_ISOLATE_DCVDD1 0x0001 /* ISOLATE_DCVDD1 */
2113 #define ARIZONA_ISOLATE_DCVDD1_MASK 0x0001 /* ISOLATE_DCVDD1 */
2114 #define ARIZONA_ISOLATE_DCVDD1_SHIFT 0 /* ISOLATE_DCVDD1 */
2115 #define ARIZONA_ISOLATE_DCVDD1_WIDTH 1 /* ISOLATE_DCVDD1 */
2116 
2117 /*
2118  * R723 (0x2D3) - Jack detect analogue
2119  */
2120 #define ARIZONA_JD2_ENA 0x0002 /* JD2_ENA */
2121 #define ARIZONA_JD2_ENA_MASK 0x0002 /* JD2_ENA */
2122 #define ARIZONA_JD2_ENA_SHIFT 1 /* JD2_ENA */
2123 #define ARIZONA_JD2_ENA_WIDTH 1 /* JD2_ENA */
2124 #define ARIZONA_JD1_ENA 0x0001 /* JD1_ENA */
2125 #define ARIZONA_JD1_ENA_MASK 0x0001 /* JD1_ENA */
2126 #define ARIZONA_JD1_ENA_SHIFT 0 /* JD1_ENA */
2127 #define ARIZONA_JD1_ENA_WIDTH 1 /* JD1_ENA */
2128 
2129 /*
2130  * R768 (0x300) - Input Enables
2131  */
2132 #define ARIZONA_IN4L_ENA 0x0080 /* IN4L_ENA */
2133 #define ARIZONA_IN4L_ENA_MASK 0x0080 /* IN4L_ENA */
2134 #define ARIZONA_IN4L_ENA_SHIFT 7 /* IN4L_ENA */
2135 #define ARIZONA_IN4L_ENA_WIDTH 1 /* IN4L_ENA */
2136 #define ARIZONA_IN4R_ENA 0x0040 /* IN4R_ENA */
2137 #define ARIZONA_IN4R_ENA_MASK 0x0040 /* IN4R_ENA */
2138 #define ARIZONA_IN4R_ENA_SHIFT 6 /* IN4R_ENA */
2139 #define ARIZONA_IN4R_ENA_WIDTH 1 /* IN4R_ENA */
2140 #define ARIZONA_IN3L_ENA 0x0020 /* IN3L_ENA */
2141 #define ARIZONA_IN3L_ENA_MASK 0x0020 /* IN3L_ENA */
2142 #define ARIZONA_IN3L_ENA_SHIFT 5 /* IN3L_ENA */
2143 #define ARIZONA_IN3L_ENA_WIDTH 1 /* IN3L_ENA */
2144 #define ARIZONA_IN3R_ENA 0x0010 /* IN3R_ENA */
2145 #define ARIZONA_IN3R_ENA_MASK 0x0010 /* IN3R_ENA */
2146 #define ARIZONA_IN3R_ENA_SHIFT 4 /* IN3R_ENA */
2147 #define ARIZONA_IN3R_ENA_WIDTH 1 /* IN3R_ENA */
2148 #define ARIZONA_IN2L_ENA 0x0008 /* IN2L_ENA */
2149 #define ARIZONA_IN2L_ENA_MASK 0x0008 /* IN2L_ENA */
2150 #define ARIZONA_IN2L_ENA_SHIFT 3 /* IN2L_ENA */
2151 #define ARIZONA_IN2L_ENA_WIDTH 1 /* IN2L_ENA */
2152 #define ARIZONA_IN2R_ENA 0x0004 /* IN2R_ENA */
2153 #define ARIZONA_IN2R_ENA_MASK 0x0004 /* IN2R_ENA */
2154 #define ARIZONA_IN2R_ENA_SHIFT 2 /* IN2R_ENA */
2155 #define ARIZONA_IN2R_ENA_WIDTH 1 /* IN2R_ENA */
2156 #define ARIZONA_IN1L_ENA 0x0002 /* IN1L_ENA */
2157 #define ARIZONA_IN1L_ENA_MASK 0x0002 /* IN1L_ENA */
2158 #define ARIZONA_IN1L_ENA_SHIFT 1 /* IN1L_ENA */
2159 #define ARIZONA_IN1L_ENA_WIDTH 1 /* IN1L_ENA */
2160 #define ARIZONA_IN1R_ENA 0x0001 /* IN1R_ENA */
2161 #define ARIZONA_IN1R_ENA_MASK 0x0001 /* IN1R_ENA */
2162 #define ARIZONA_IN1R_ENA_SHIFT 0 /* IN1R_ENA */
2163 #define ARIZONA_IN1R_ENA_WIDTH 1 /* IN1R_ENA */
2164 
2165 /*
2166  * R776 (0x308) - Input Rate
2167  */
2168 #define ARIZONA_IN_RATE_MASK 0x7800 /* IN_RATE - [14:11] */
2169 #define ARIZONA_IN_RATE_SHIFT 11 /* IN_RATE - [14:11] */
2170 #define ARIZONA_IN_RATE_WIDTH 4 /* IN_RATE - [14:11] */
2171 
2172 /*
2173  * R777 (0x309) - Input Volume Ramp
2174  */
2175 #define ARIZONA_IN_VD_RAMP_MASK 0x0070 /* IN_VD_RAMP - [6:4] */
2176 #define ARIZONA_IN_VD_RAMP_SHIFT 4 /* IN_VD_RAMP - [6:4] */
2177 #define ARIZONA_IN_VD_RAMP_WIDTH 3 /* IN_VD_RAMP - [6:4] */
2178 #define ARIZONA_IN_VI_RAMP_MASK 0x0007 /* IN_VI_RAMP - [2:0] */
2179 #define ARIZONA_IN_VI_RAMP_SHIFT 0 /* IN_VI_RAMP - [2:0] */
2180 #define ARIZONA_IN_VI_RAMP_WIDTH 3 /* IN_VI_RAMP - [2:0] */
2181 
2182 /*
2183  * R784 (0x310) - IN1L Control
2184  */
2185 #define ARIZONA_IN1_OSR_MASK 0x6000 /* IN1_OSR - [14:13] */
2186 #define ARIZONA_IN1_OSR_SHIFT 13 /* IN1_OSR - [14:13] */
2187 #define ARIZONA_IN1_OSR_WIDTH 2 /* IN1_OSR - [14:13] */
2188 #define ARIZONA_IN1_DMIC_SUP_MASK 0x1800 /* IN1_DMIC_SUP - [12:11] */
2189 #define ARIZONA_IN1_DMIC_SUP_SHIFT 11 /* IN1_DMIC_SUP - [12:11] */
2190 #define ARIZONA_IN1_DMIC_SUP_WIDTH 2 /* IN1_DMIC_SUP - [12:11] */
2191 #define ARIZONA_IN1_MODE_MASK 0x0600 /* IN1_MODE - [10:9] */
2192 #define ARIZONA_IN1_MODE_SHIFT 9 /* IN1_MODE - [10:9] */
2193 #define ARIZONA_IN1_MODE_WIDTH 2 /* IN1_MODE - [10:9] */
2194 #define ARIZONA_IN1L_PGA_VOL_MASK 0x00FE /* IN1L_PGA_VOL - [7:1] */
2195 #define ARIZONA_IN1L_PGA_VOL_SHIFT 1 /* IN1L_PGA_VOL - [7:1] */
2196 #define ARIZONA_IN1L_PGA_VOL_WIDTH 7 /* IN1L_PGA_VOL - [7:1] */
2197 
2198 /*
2199  * R785 (0x311) - ADC Digital Volume 1L
2200  */
2201 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2202 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2203 #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */
2204 #define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */
2205 #define ARIZONA_IN1L_MUTE 0x0100 /* IN1L_MUTE */
2206 #define ARIZONA_IN1L_MUTE_MASK 0x0100 /* IN1L_MUTE */
2207 #define ARIZONA_IN1L_MUTE_SHIFT 8 /* IN1L_MUTE */
2208 #define ARIZONA_IN1L_MUTE_WIDTH 1 /* IN1L_MUTE */
2209 #define ARIZONA_IN1L_DIG_VOL_MASK 0x00FF /* IN1L_DIG_VOL - [7:0] */
2210 #define ARIZONA_IN1L_DIG_VOL_SHIFT 0 /* IN1L_DIG_VOL - [7:0] */
2211 #define ARIZONA_IN1L_DIG_VOL_WIDTH 8 /* IN1L_DIG_VOL - [7:0] */
2212 
2213 /*
2214  * R786 (0x312) - DMIC1L Control
2215  */
2216 #define ARIZONA_IN1_DMICL_DLY_MASK 0x003F /* IN1_DMICL_DLY - [5:0] */
2217 #define ARIZONA_IN1_DMICL_DLY_SHIFT 0 /* IN1_DMICL_DLY - [5:0] */
2218 #define ARIZONA_IN1_DMICL_DLY_WIDTH 6 /* IN1_DMICL_DLY - [5:0] */
2219 
2220 /*
2221  * R788 (0x314) - IN1R Control
2222  */
2223 #define ARIZONA_IN1R_PGA_VOL_MASK 0x00FE /* IN1R_PGA_VOL - [7:1] */
2224 #define ARIZONA_IN1R_PGA_VOL_SHIFT 1 /* IN1R_PGA_VOL - [7:1] */
2225 #define ARIZONA_IN1R_PGA_VOL_WIDTH 7 /* IN1R_PGA_VOL - [7:1] */
2226 
2227 /*
2228  * R789 (0x315) - ADC Digital Volume 1R
2229  */
2230 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2231 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2232 #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */
2233 #define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */
2234 #define ARIZONA_IN1R_MUTE 0x0100 /* IN1R_MUTE */
2235 #define ARIZONA_IN1R_MUTE_MASK 0x0100 /* IN1R_MUTE */
2236 #define ARIZONA_IN1R_MUTE_SHIFT 8 /* IN1R_MUTE */
2237 #define ARIZONA_IN1R_MUTE_WIDTH 1 /* IN1R_MUTE */
2238 #define ARIZONA_IN1R_DIG_VOL_MASK 0x00FF /* IN1R_DIG_VOL - [7:0] */
2239 #define ARIZONA_IN1R_DIG_VOL_SHIFT 0 /* IN1R_DIG_VOL - [7:0] */
2240 #define ARIZONA_IN1R_DIG_VOL_WIDTH 8 /* IN1R_DIG_VOL - [7:0] */
2241 
2242 /*
2243  * R790 (0x316) - DMIC1R Control
2244  */
2245 #define ARIZONA_IN1_DMICR_DLY_MASK 0x003F /* IN1_DMICR_DLY - [5:0] */
2246 #define ARIZONA_IN1_DMICR_DLY_SHIFT 0 /* IN1_DMICR_DLY - [5:0] */
2247 #define ARIZONA_IN1_DMICR_DLY_WIDTH 6 /* IN1_DMICR_DLY - [5:0] */
2248 
2249 /*
2250  * R792 (0x318) - IN2L Control
2251  */
2252 #define ARIZONA_IN2_OSR_MASK 0x6000 /* IN2_OSR - [14:13] */
2253 #define ARIZONA_IN2_OSR_SHIFT 13 /* IN2_OSR - [14:13] */
2254 #define ARIZONA_IN2_OSR_WIDTH 2 /* IN2_OSR - [14:13] */
2255 #define ARIZONA_IN2_DMIC_SUP_MASK 0x1800 /* IN2_DMIC_SUP - [12:11] */
2256 #define ARIZONA_IN2_DMIC_SUP_SHIFT 11 /* IN2_DMIC_SUP - [12:11] */
2257 #define ARIZONA_IN2_DMIC_SUP_WIDTH 2 /* IN2_DMIC_SUP - [12:11] */
2258 #define ARIZONA_IN2_MODE_MASK 0x0600 /* IN2_MODE - [10:9] */
2259 #define ARIZONA_IN2_MODE_SHIFT 9 /* IN2_MODE - [10:9] */
2260 #define ARIZONA_IN2_MODE_WIDTH 2 /* IN2_MODE - [10:9] */
2261 #define ARIZONA_IN2L_PGA_VOL_MASK 0x00FE /* IN2L_PGA_VOL - [7:1] */
2262 #define ARIZONA_IN2L_PGA_VOL_SHIFT 1 /* IN2L_PGA_VOL - [7:1] */
2263 #define ARIZONA_IN2L_PGA_VOL_WIDTH 7 /* IN2L_PGA_VOL - [7:1] */
2264 
2265 /*
2266  * R793 (0x319) - ADC Digital Volume 2L
2267  */
2268 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2269 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2270 #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */
2271 #define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */
2272 #define ARIZONA_IN2L_MUTE 0x0100 /* IN2L_MUTE */
2273 #define ARIZONA_IN2L_MUTE_MASK 0x0100 /* IN2L_MUTE */
2274 #define ARIZONA_IN2L_MUTE_SHIFT 8 /* IN2L_MUTE */
2275 #define ARIZONA_IN2L_MUTE_WIDTH 1 /* IN2L_MUTE */
2276 #define ARIZONA_IN2L_DIG_VOL_MASK 0x00FF /* IN2L_DIG_VOL - [7:0] */
2277 #define ARIZONA_IN2L_DIG_VOL_SHIFT 0 /* IN2L_DIG_VOL - [7:0] */
2278 #define ARIZONA_IN2L_DIG_VOL_WIDTH 8 /* IN2L_DIG_VOL - [7:0] */
2279 
2280 /*
2281  * R794 (0x31A) - DMIC2L Control
2282  */
2283 #define ARIZONA_IN2_DMICL_DLY_MASK 0x003F /* IN2_DMICL_DLY - [5:0] */
2284 #define ARIZONA_IN2_DMICL_DLY_SHIFT 0 /* IN2_DMICL_DLY - [5:0] */
2285 #define ARIZONA_IN2_DMICL_DLY_WIDTH 6 /* IN2_DMICL_DLY - [5:0] */
2286 
2287 /*
2288  * R796 (0x31C) - IN2R Control
2289  */
2290 #define ARIZONA_IN2R_PGA_VOL_MASK 0x00FE /* IN2R_PGA_VOL - [7:1] */
2291 #define ARIZONA_IN2R_PGA_VOL_SHIFT 1 /* IN2R_PGA_VOL - [7:1] */
2292 #define ARIZONA_IN2R_PGA_VOL_WIDTH 7 /* IN2R_PGA_VOL - [7:1] */
2293 
2294 /*
2295  * R797 (0x31D) - ADC Digital Volume 2R
2296  */
2297 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2298 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2299 #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */
2300 #define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */
2301 #define ARIZONA_IN2R_MUTE 0x0100 /* IN2R_MUTE */
2302 #define ARIZONA_IN2R_MUTE_MASK 0x0100 /* IN2R_MUTE */
2303 #define ARIZONA_IN2R_MUTE_SHIFT 8 /* IN2R_MUTE */
2304 #define ARIZONA_IN2R_MUTE_WIDTH 1 /* IN2R_MUTE */
2305 #define ARIZONA_IN2R_DIG_VOL_MASK 0x00FF /* IN2R_DIG_VOL - [7:0] */
2306 #define ARIZONA_IN2R_DIG_VOL_SHIFT 0 /* IN2R_DIG_VOL - [7:0] */
2307 #define ARIZONA_IN2R_DIG_VOL_WIDTH 8 /* IN2R_DIG_VOL - [7:0] */
2308 
2309 /*
2310  * R798 (0x31E) - DMIC2R Control
2311  */
2312 #define ARIZONA_IN2_DMICR_DLY_MASK 0x003F /* IN2_DMICR_DLY - [5:0] */
2313 #define ARIZONA_IN2_DMICR_DLY_SHIFT 0 /* IN2_DMICR_DLY - [5:0] */
2314 #define ARIZONA_IN2_DMICR_DLY_WIDTH 6 /* IN2_DMICR_DLY - [5:0] */
2315 
2316 /*
2317  * R800 (0x320) - IN3L Control
2318  */
2319 #define ARIZONA_IN3_OSR_MASK 0x6000 /* IN3_OSR - [14:13] */
2320 #define ARIZONA_IN3_OSR_SHIFT 13 /* IN3_OSR - [14:13] */
2321 #define ARIZONA_IN3_OSR_WIDTH 2 /* IN3_OSR - [14:13] */
2322 #define ARIZONA_IN3_DMIC_SUP_MASK 0x1800 /* IN3_DMIC_SUP - [12:11] */
2323 #define ARIZONA_IN3_DMIC_SUP_SHIFT 11 /* IN3_DMIC_SUP - [12:11] */
2324 #define ARIZONA_IN3_DMIC_SUP_WIDTH 2 /* IN3_DMIC_SUP - [12:11] */
2325 #define ARIZONA_IN3_MODE_MASK 0x0600 /* IN3_MODE - [10:9] */
2326 #define ARIZONA_IN3_MODE_SHIFT 9 /* IN3_MODE - [10:9] */
2327 #define ARIZONA_IN3_MODE_WIDTH 2 /* IN3_MODE - [10:9] */
2328 #define ARIZONA_IN3L_PGA_VOL_MASK 0x00FE /* IN3L_PGA_VOL - [7:1] */
2329 #define ARIZONA_IN3L_PGA_VOL_SHIFT 1 /* IN3L_PGA_VOL - [7:1] */
2330 #define ARIZONA_IN3L_PGA_VOL_WIDTH 7 /* IN3L_PGA_VOL - [7:1] */
2331 
2332 /*
2333  * R801 (0x321) - ADC Digital Volume 3L
2334  */
2335 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2336 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2337 #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */
2338 #define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */
2339 #define ARIZONA_IN3L_MUTE 0x0100 /* IN3L_MUTE */
2340 #define ARIZONA_IN3L_MUTE_MASK 0x0100 /* IN3L_MUTE */
2341 #define ARIZONA_IN3L_MUTE_SHIFT 8 /* IN3L_MUTE */
2342 #define ARIZONA_IN3L_MUTE_WIDTH 1 /* IN3L_MUTE */
2343 #define ARIZONA_IN3L_DIG_VOL_MASK 0x00FF /* IN3L_DIG_VOL - [7:0] */
2344 #define ARIZONA_IN3L_DIG_VOL_SHIFT 0 /* IN3L_DIG_VOL - [7:0] */
2345 #define ARIZONA_IN3L_DIG_VOL_WIDTH 8 /* IN3L_DIG_VOL - [7:0] */
2346 
2347 /*
2348  * R802 (0x322) - DMIC3L Control
2349  */
2350 #define ARIZONA_IN3_DMICL_DLY_MASK 0x003F /* IN3_DMICL_DLY - [5:0] */
2351 #define ARIZONA_IN3_DMICL_DLY_SHIFT 0 /* IN3_DMICL_DLY - [5:0] */
2352 #define ARIZONA_IN3_DMICL_DLY_WIDTH 6 /* IN3_DMICL_DLY - [5:0] */
2353 
2354 /*
2355  * R804 (0x324) - IN3R Control
2356  */
2357 #define ARIZONA_IN3R_PGA_VOL_MASK 0x00FE /* IN3R_PGA_VOL - [7:1] */
2358 #define ARIZONA_IN3R_PGA_VOL_SHIFT 1 /* IN3R_PGA_VOL - [7:1] */
2359 #define ARIZONA_IN3R_PGA_VOL_WIDTH 7 /* IN3R_PGA_VOL - [7:1] */
2360 
2361 /*
2362  * R805 (0x325) - ADC Digital Volume 3R
2363  */
2364 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2365 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2366 #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */
2367 #define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */
2368 #define ARIZONA_IN3R_MUTE 0x0100 /* IN3R_MUTE */
2369 #define ARIZONA_IN3R_MUTE_MASK 0x0100 /* IN3R_MUTE */
2370 #define ARIZONA_IN3R_MUTE_SHIFT 8 /* IN3R_MUTE */
2371 #define ARIZONA_IN3R_MUTE_WIDTH 1 /* IN3R_MUTE */
2372 #define ARIZONA_IN3R_DIG_VOL_MASK 0x00FF /* IN3R_DIG_VOL - [7:0] */
2373 #define ARIZONA_IN3R_DIG_VOL_SHIFT 0 /* IN3R_DIG_VOL - [7:0] */
2374 #define ARIZONA_IN3R_DIG_VOL_WIDTH 8 /* IN3R_DIG_VOL - [7:0] */
2375 
2376 /*
2377  * R806 (0x326) - DMIC3R Control
2378  */
2379 #define ARIZONA_IN3_DMICR_DLY_MASK 0x003F /* IN3_DMICR_DLY - [5:0] */
2380 #define ARIZONA_IN3_DMICR_DLY_SHIFT 0 /* IN3_DMICR_DLY - [5:0] */
2381 #define ARIZONA_IN3_DMICR_DLY_WIDTH 6 /* IN3_DMICR_DLY - [5:0] */
2382 
2383 /*
2384  * R808 (0x328) - IN4 Control
2385  */
2386 #define ARIZONA_IN4_OSR_MASK 0x6000 /* IN4_OSR - [14:13] */
2387 #define ARIZONA_IN4_OSR_SHIFT 13 /* IN4_OSR - [14:13] */
2388 #define ARIZONA_IN4_OSR_WIDTH 2 /* IN4_OSR - [14:13] */
2389 #define ARIZONA_IN4_DMIC_SUP_MASK 0x1800 /* IN4_DMIC_SUP - [12:11] */
2390 #define ARIZONA_IN4_DMIC_SUP_SHIFT 11 /* IN4_DMIC_SUP - [12:11] */
2391 #define ARIZONA_IN4_DMIC_SUP_WIDTH 2 /* IN4_DMIC_SUP - [12:11] */
2392 
2393 /*
2394  * R809 (0x329) - ADC Digital Volume 4L
2395  */
2396 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2397 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2398 #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */
2399 #define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */
2400 #define ARIZONA_IN4L_MUTE 0x0100 /* IN4L_MUTE */
2401 #define ARIZONA_IN4L_MUTE_MASK 0x0100 /* IN4L_MUTE */
2402 #define ARIZONA_IN4L_MUTE_SHIFT 8 /* IN4L_MUTE */
2403 #define ARIZONA_IN4L_MUTE_WIDTH 1 /* IN4L_MUTE */
2404 #define ARIZONA_IN4L_DIG_VOL_MASK 0x00FF /* IN4L_DIG_VOL - [7:0] */
2405 #define ARIZONA_IN4L_DIG_VOL_SHIFT 0 /* IN4L_DIG_VOL - [7:0] */
2406 #define ARIZONA_IN4L_DIG_VOL_WIDTH 8 /* IN4L_DIG_VOL - [7:0] */
2407 
2408 /*
2409  * R810 (0x32A) - DMIC4L Control
2410  */
2411 #define ARIZONA_IN4L_DMIC_DLY_MASK 0x003F /* IN4L_DMIC_DLY - [5:0] */
2412 #define ARIZONA_IN4L_DMIC_DLY_SHIFT 0 /* IN4L_DMIC_DLY - [5:0] */
2413 #define ARIZONA_IN4L_DMIC_DLY_WIDTH 6 /* IN4L_DMIC_DLY - [5:0] */
2414 
2415 /*
2416  * R813 (0x32D) - ADC Digital Volume 4R
2417  */
2418 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2419 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2420 #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */
2421 #define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */
2422 #define ARIZONA_IN4R_MUTE 0x0100 /* IN4R_MUTE */
2423 #define ARIZONA_IN4R_MUTE_MASK 0x0100 /* IN4R_MUTE */
2424 #define ARIZONA_IN4R_MUTE_SHIFT 8 /* IN4R_MUTE */
2425 #define ARIZONA_IN4R_MUTE_WIDTH 1 /* IN4R_MUTE */
2426 #define ARIZONA_IN4R_DIG_VOL_MASK 0x00FF /* IN4R_DIG_VOL - [7:0] */
2427 #define ARIZONA_IN4R_DIG_VOL_SHIFT 0 /* IN4R_DIG_VOL - [7:0] */
2428 #define ARIZONA_IN4R_DIG_VOL_WIDTH 8 /* IN4R_DIG_VOL - [7:0] */
2429 
2430 /*
2431  * R814 (0x32E) - DMIC4R Control
2432  */
2433 #define ARIZONA_IN4R_DMIC_DLY_MASK 0x003F /* IN4R_DMIC_DLY - [5:0] */
2434 #define ARIZONA_IN4R_DMIC_DLY_SHIFT 0 /* IN4R_DMIC_DLY - [5:0] */
2435 #define ARIZONA_IN4R_DMIC_DLY_WIDTH 6 /* IN4R_DMIC_DLY - [5:0] */
2436 
2437 /*
2438  * R1024 (0x400) - Output Enables 1
2439  */
2440 #define ARIZONA_OUT6L_ENA 0x0800 /* OUT6L_ENA */
2441 #define ARIZONA_OUT6L_ENA_MASK 0x0800 /* OUT6L_ENA */
2442 #define ARIZONA_OUT6L_ENA_SHIFT 11 /* OUT6L_ENA */
2443 #define ARIZONA_OUT6L_ENA_WIDTH 1 /* OUT6L_ENA */
2444 #define ARIZONA_OUT6R_ENA 0x0400 /* OUT6R_ENA */
2445 #define ARIZONA_OUT6R_ENA_MASK 0x0400 /* OUT6R_ENA */
2446 #define ARIZONA_OUT6R_ENA_SHIFT 10 /* OUT6R_ENA */
2447 #define ARIZONA_OUT6R_ENA_WIDTH 1 /* OUT6R_ENA */
2448 #define ARIZONA_OUT5L_ENA 0x0200 /* OUT5L_ENA */
2449 #define ARIZONA_OUT5L_ENA_MASK 0x0200 /* OUT5L_ENA */
2450 #define ARIZONA_OUT5L_ENA_SHIFT 9 /* OUT5L_ENA */
2451 #define ARIZONA_OUT5L_ENA_WIDTH 1 /* OUT5L_ENA */
2452 #define ARIZONA_OUT5R_ENA 0x0100 /* OUT5R_ENA */
2453 #define ARIZONA_OUT5R_ENA_MASK 0x0100 /* OUT5R_ENA */
2454 #define ARIZONA_OUT5R_ENA_SHIFT 8 /* OUT5R_ENA */
2455 #define ARIZONA_OUT5R_ENA_WIDTH 1 /* OUT5R_ENA */
2456 #define ARIZONA_OUT4L_ENA 0x0080 /* OUT4L_ENA */
2457 #define ARIZONA_OUT4L_ENA_MASK 0x0080 /* OUT4L_ENA */
2458 #define ARIZONA_OUT4L_ENA_SHIFT 7 /* OUT4L_ENA */
2459 #define ARIZONA_OUT4L_ENA_WIDTH 1 /* OUT4L_ENA */
2460 #define ARIZONA_OUT4R_ENA 0x0040 /* OUT4R_ENA */
2461 #define ARIZONA_OUT4R_ENA_MASK 0x0040 /* OUT4R_ENA */
2462 #define ARIZONA_OUT4R_ENA_SHIFT 6 /* OUT4R_ENA */
2463 #define ARIZONA_OUT4R_ENA_WIDTH 1 /* OUT4R_ENA */
2464 #define ARIZONA_OUT3L_ENA 0x0020 /* OUT3L_ENA */
2465 #define ARIZONA_OUT3L_ENA_MASK 0x0020 /* OUT3L_ENA */
2466 #define ARIZONA_OUT3L_ENA_SHIFT 5 /* OUT3L_ENA */
2467 #define ARIZONA_OUT3L_ENA_WIDTH 1 /* OUT3L_ENA */
2468 #define ARIZONA_OUT3R_ENA 0x0010 /* OUT3R_ENA */
2469 #define ARIZONA_OUT3R_ENA_MASK 0x0010 /* OUT3R_ENA */
2470 #define ARIZONA_OUT3R_ENA_SHIFT 4 /* OUT3R_ENA */
2471 #define ARIZONA_OUT3R_ENA_WIDTH 1 /* OUT3R_ENA */
2472 #define ARIZONA_OUT2L_ENA 0x0008 /* OUT2L_ENA */
2473 #define ARIZONA_OUT2L_ENA_MASK 0x0008 /* OUT2L_ENA */
2474 #define ARIZONA_OUT2L_ENA_SHIFT 3 /* OUT2L_ENA */
2475 #define ARIZONA_OUT2L_ENA_WIDTH 1 /* OUT2L_ENA */
2476 #define ARIZONA_OUT2R_ENA 0x0004 /* OUT2R_ENA */
2477 #define ARIZONA_OUT2R_ENA_MASK 0x0004 /* OUT2R_ENA */
2478 #define ARIZONA_OUT2R_ENA_SHIFT 2 /* OUT2R_ENA */
2479 #define ARIZONA_OUT2R_ENA_WIDTH 1 /* OUT2R_ENA */
2480 #define ARIZONA_OUT1L_ENA 0x0002 /* OUT1L_ENA */
2481 #define ARIZONA_OUT1L_ENA_MASK 0x0002 /* OUT1L_ENA */
2482 #define ARIZONA_OUT1L_ENA_SHIFT 1 /* OUT1L_ENA */
2483 #define ARIZONA_OUT1L_ENA_WIDTH 1 /* OUT1L_ENA */
2484 #define ARIZONA_OUT1R_ENA 0x0001 /* OUT1R_ENA */
2485 #define ARIZONA_OUT1R_ENA_MASK 0x0001 /* OUT1R_ENA */
2486 #define ARIZONA_OUT1R_ENA_SHIFT 0 /* OUT1R_ENA */
2487 #define ARIZONA_OUT1R_ENA_WIDTH 1 /* OUT1R_ENA */
2488 
2489 /*
2490  * R1025 (0x401) - Output Status 1
2491  */
2492 #define ARIZONA_OUT6L_ENA_STS 0x0800 /* OUT6L_ENA_STS */
2493 #define ARIZONA_OUT6L_ENA_STS_MASK 0x0800 /* OUT6L_ENA_STS */
2494 #define ARIZONA_OUT6L_ENA_STS_SHIFT 11 /* OUT6L_ENA_STS */
2495 #define ARIZONA_OUT6L_ENA_STS_WIDTH 1 /* OUT6L_ENA_STS */
2496 #define ARIZONA_OUT6R_ENA_STS 0x0400 /* OUT6R_ENA_STS */
2497 #define ARIZONA_OUT6R_ENA_STS_MASK 0x0400 /* OUT6R_ENA_STS */
2498 #define ARIZONA_OUT6R_ENA_STS_SHIFT 10 /* OUT6R_ENA_STS */
2499 #define ARIZONA_OUT6R_ENA_STS_WIDTH 1 /* OUT6R_ENA_STS */
2500 #define ARIZONA_OUT5L_ENA_STS 0x0200 /* OUT5L_ENA_STS */
2501 #define ARIZONA_OUT5L_ENA_STS_MASK 0x0200 /* OUT5L_ENA_STS */
2502 #define ARIZONA_OUT5L_ENA_STS_SHIFT 9 /* OUT5L_ENA_STS */
2503 #define ARIZONA_OUT5L_ENA_STS_WIDTH 1 /* OUT5L_ENA_STS */
2504 #define ARIZONA_OUT5R_ENA_STS 0x0100 /* OUT5R_ENA_STS */
2505 #define ARIZONA_OUT5R_ENA_STS_MASK 0x0100 /* OUT5R_ENA_STS */
2506 #define ARIZONA_OUT5R_ENA_STS_SHIFT 8 /* OUT5R_ENA_STS */
2507 #define ARIZONA_OUT5R_ENA_STS_WIDTH 1 /* OUT5R_ENA_STS */
2508 #define ARIZONA_OUT4L_ENA_STS 0x0080 /* OUT4L_ENA_STS */
2509 #define ARIZONA_OUT4L_ENA_STS_MASK 0x0080 /* OUT4L_ENA_STS */
2510 #define ARIZONA_OUT4L_ENA_STS_SHIFT 7 /* OUT4L_ENA_STS */
2511 #define ARIZONA_OUT4L_ENA_STS_WIDTH 1 /* OUT4L_ENA_STS */
2512 #define ARIZONA_OUT4R_ENA_STS 0x0040 /* OUT4R_ENA_STS */
2513 #define ARIZONA_OUT4R_ENA_STS_MASK 0x0040 /* OUT4R_ENA_STS */
2514 #define ARIZONA_OUT4R_ENA_STS_SHIFT 6 /* OUT4R_ENA_STS */
2515 #define ARIZONA_OUT4R_ENA_STS_WIDTH 1 /* OUT4R_ENA_STS */
2516 
2517 /*
2518  * R1032 (0x408) - Output Rate 1
2519  */
2520 #define ARIZONA_OUT_RATE_MASK 0x7800 /* OUT_RATE - [14:11] */
2521 #define ARIZONA_OUT_RATE_SHIFT 11 /* OUT_RATE - [14:11] */
2522 #define ARIZONA_OUT_RATE_WIDTH 4 /* OUT_RATE - [14:11] */
2523 
2524 /*
2525  * R1033 (0x409) - Output Volume Ramp
2526  */
2527 #define ARIZONA_OUT_VD_RAMP_MASK 0x0070 /* OUT_VD_RAMP - [6:4] */
2528 #define ARIZONA_OUT_VD_RAMP_SHIFT 4 /* OUT_VD_RAMP - [6:4] */
2529 #define ARIZONA_OUT_VD_RAMP_WIDTH 3 /* OUT_VD_RAMP - [6:4] */
2530 #define ARIZONA_OUT_VI_RAMP_MASK 0x0007 /* OUT_VI_RAMP - [2:0] */
2531 #define ARIZONA_OUT_VI_RAMP_SHIFT 0 /* OUT_VI_RAMP - [2:0] */
2532 #define ARIZONA_OUT_VI_RAMP_WIDTH 3 /* OUT_VI_RAMP - [2:0] */
2533 
2534 /*
2535  * R1040 (0x410) - Output Path Config 1L
2536  */
2537 #define ARIZONA_OUT1_LP_MODE 0x8000 /* OUT1_LP_MODE */
2538 #define ARIZONA_OUT1_LP_MODE_MASK 0x8000 /* OUT1_LP_MODE */
2539 #define ARIZONA_OUT1_LP_MODE_SHIFT 15 /* OUT1_LP_MODE */
2540 #define ARIZONA_OUT1_LP_MODE_WIDTH 1 /* OUT1_LP_MODE */
2541 #define ARIZONA_OUT1_OSR 0x2000 /* OUT1_OSR */
2542 #define ARIZONA_OUT1_OSR_MASK 0x2000 /* OUT1_OSR */
2543 #define ARIZONA_OUT1_OSR_SHIFT 13 /* OUT1_OSR */
2544 #define ARIZONA_OUT1_OSR_WIDTH 1 /* OUT1_OSR */
2545 #define ARIZONA_OUT1_MONO 0x1000 /* OUT1_MONO */
2546 #define ARIZONA_OUT1_MONO_MASK 0x1000 /* OUT1_MONO */
2547 #define ARIZONA_OUT1_MONO_SHIFT 12 /* OUT1_MONO */
2548 #define ARIZONA_OUT1_MONO_WIDTH 1 /* OUT1_MONO */
2549 #define ARIZONA_OUT1L_ANC_SRC_MASK 0x0C00 /* OUT1L_ANC_SRC - [11:10] */
2550 #define ARIZONA_OUT1L_ANC_SRC_SHIFT 10 /* OUT1L_ANC_SRC - [11:10] */
2551 #define ARIZONA_OUT1L_ANC_SRC_WIDTH 2 /* OUT1L_ANC_SRC - [11:10] */
2552 #define ARIZONA_OUT1L_PGA_VOL_MASK 0x00FE /* OUT1L_PGA_VOL - [7:1] */
2553 #define ARIZONA_OUT1L_PGA_VOL_SHIFT 1 /* OUT1L_PGA_VOL - [7:1] */
2554 #define ARIZONA_OUT1L_PGA_VOL_WIDTH 7 /* OUT1L_PGA_VOL - [7:1] */
2555 
2556 /*
2557  * R1041 (0x411) - DAC Digital Volume 1L
2558  */
2559 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
2560 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
2561 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
2562 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
2563 #define ARIZONA_OUT1L_MUTE 0x0100 /* OUT1L_MUTE */
2564 #define ARIZONA_OUT1L_MUTE_MASK 0x0100 /* OUT1L_MUTE */
2565 #define ARIZONA_OUT1L_MUTE_SHIFT 8 /* OUT1L_MUTE */
2566 #define ARIZONA_OUT1L_MUTE_WIDTH 1 /* OUT1L_MUTE */
2567 #define ARIZONA_OUT1L_VOL_MASK 0x00FF /* OUT1L_VOL - [7:0] */
2568 #define ARIZONA_OUT1L_VOL_SHIFT 0 /* OUT1L_VOL - [7:0] */
2569 #define ARIZONA_OUT1L_VOL_WIDTH 8 /* OUT1L_VOL - [7:0] */
2570 
2571 /*
2572  * R1042 (0x412) - DAC Volume Limit 1L
2573  */
2574 #define ARIZONA_OUT1L_VOL_LIM_MASK 0x00FF /* OUT1L_VOL_LIM - [7:0] */
2575 #define ARIZONA_OUT1L_VOL_LIM_SHIFT 0 /* OUT1L_VOL_LIM - [7:0] */
2576 #define ARIZONA_OUT1L_VOL_LIM_WIDTH 8 /* OUT1L_VOL_LIM - [7:0] */
2577 
2578 /*
2579  * R1043 (0x413) - Noise Gate Select 1L
2580  */
2581 #define ARIZONA_OUT1L_NGATE_SRC_MASK 0x0FFF /* OUT1L_NGATE_SRC - [11:0] */
2582 #define ARIZONA_OUT1L_NGATE_SRC_SHIFT 0 /* OUT1L_NGATE_SRC - [11:0] */
2583 #define ARIZONA_OUT1L_NGATE_SRC_WIDTH 12 /* OUT1L_NGATE_SRC - [11:0] */
2584 
2585 /*
2586  * R1044 (0x414) - Output Path Config 1R
2587  */
2588 #define ARIZONA_OUT1R_ANC_SRC_MASK 0x0C00 /* OUT1R_ANC_SRC - [11:10] */
2589 #define ARIZONA_OUT1R_ANC_SRC_SHIFT 10 /* OUT1R_ANC_SRC - [11:10] */
2590 #define ARIZONA_OUT1R_ANC_SRC_WIDTH 2 /* OUT1R_ANC_SRC - [11:10] */
2591 #define ARIZONA_OUT1R_PGA_VOL_MASK 0x00FE /* OUT1R_PGA_VOL - [7:1] */
2592 #define ARIZONA_OUT1R_PGA_VOL_SHIFT 1 /* OUT1R_PGA_VOL - [7:1] */
2593 #define ARIZONA_OUT1R_PGA_VOL_WIDTH 7 /* OUT1R_PGA_VOL - [7:1] */
2594 
2595 /*
2596  * R1045 (0x415) - DAC Digital Volume 1R
2597  */
2598 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
2599 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
2600 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
2601 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
2602 #define ARIZONA_OUT1R_MUTE 0x0100 /* OUT1R_MUTE */
2603 #define ARIZONA_OUT1R_MUTE_MASK 0x0100 /* OUT1R_MUTE */
2604 #define ARIZONA_OUT1R_MUTE_SHIFT 8 /* OUT1R_MUTE */
2605 #define ARIZONA_OUT1R_MUTE_WIDTH 1 /* OUT1R_MUTE */
2606 #define ARIZONA_OUT1R_VOL_MASK 0x00FF /* OUT1R_VOL - [7:0] */
2607 #define ARIZONA_OUT1R_VOL_SHIFT 0 /* OUT1R_VOL - [7:0] */
2608 #define ARIZONA_OUT1R_VOL_WIDTH 8 /* OUT1R_VOL - [7:0] */
2609 
2610 /*
2611  * R1046 (0x416) - DAC Volume Limit 1R
2612  */
2613 #define ARIZONA_OUT1R_VOL_LIM_MASK 0x00FF /* OUT1R_VOL_LIM - [7:0] */
2614 #define ARIZONA_OUT1R_VOL_LIM_SHIFT 0 /* OUT1R_VOL_LIM - [7:0] */
2615 #define ARIZONA_OUT1R_VOL_LIM_WIDTH 8 /* OUT1R_VOL_LIM - [7:0] */
2616 
2617 /*
2618  * R1047 (0x417) - Noise Gate Select 1R
2619  */
2620 #define ARIZONA_OUT1R_NGATE_SRC_MASK 0x0FFF /* OUT1R_NGATE_SRC - [11:0] */
2621 #define ARIZONA_OUT1R_NGATE_SRC_SHIFT 0 /* OUT1R_NGATE_SRC - [11:0] */
2622 #define ARIZONA_OUT1R_NGATE_SRC_WIDTH 12 /* OUT1R_NGATE_SRC - [11:0] */
2623 
2624 /*
2625  * R1048 (0x418) - Output Path Config 2L
2626  */
2627 #define ARIZONA_OUT2_LP_MODE 0x8000 /* OUT2_LP_MODE */
2628 #define ARIZONA_OUT2_LP_MODE_MASK 0x8000 /* OUT2_LP_MODE */
2629 #define ARIZONA_OUT2_LP_MODE_SHIFT 15 /* OUT2_LP_MODE */
2630 #define ARIZONA_OUT2_LP_MODE_WIDTH 1 /* OUT2_LP_MODE */
2631 #define ARIZONA_OUT2_OSR 0x2000 /* OUT2_OSR */
2632 #define ARIZONA_OUT2_OSR_MASK 0x2000 /* OUT2_OSR */
2633 #define ARIZONA_OUT2_OSR_SHIFT 13 /* OUT2_OSR */
2634 #define ARIZONA_OUT2_OSR_WIDTH 1 /* OUT2_OSR */
2635 #define ARIZONA_OUT2_MONO 0x1000 /* OUT2_MONO */
2636 #define ARIZONA_OUT2_MONO_MASK 0x1000 /* OUT2_MONO */
2637 #define ARIZONA_OUT2_MONO_SHIFT 12 /* OUT2_MONO */
2638 #define ARIZONA_OUT2_MONO_WIDTH 1 /* OUT2_MONO */
2639 #define ARIZONA_OUT2L_ANC_SRC_MASK 0x0C00 /* OUT2L_ANC_SRC - [11:10] */
2640 #define ARIZONA_OUT2L_ANC_SRC_SHIFT 10 /* OUT2L_ANC_SRC - [11:10] */
2641 #define ARIZONA_OUT2L_ANC_SRC_WIDTH 2 /* OUT2L_ANC_SRC - [11:10] */
2642 #define ARIZONA_OUT2L_PGA_VOL_MASK 0x00FE /* OUT2L_PGA_VOL - [7:1] */
2643 #define ARIZONA_OUT2L_PGA_VOL_SHIFT 1 /* OUT2L_PGA_VOL - [7:1] */
2644 #define ARIZONA_OUT2L_PGA_VOL_WIDTH 7 /* OUT2L_PGA_VOL - [7:1] */
2645 
2646 /*
2647  * R1049 (0x419) - DAC Digital Volume 2L
2648  */
2649 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
2650 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
2651 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
2652 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
2653 #define ARIZONA_OUT2L_MUTE 0x0100 /* OUT2L_MUTE */
2654 #define ARIZONA_OUT2L_MUTE_MASK 0x0100 /* OUT2L_MUTE */
2655 #define ARIZONA_OUT2L_MUTE_SHIFT 8 /* OUT2L_MUTE */
2656 #define ARIZONA_OUT2L_MUTE_WIDTH 1 /* OUT2L_MUTE */
2657 #define ARIZONA_OUT2L_VOL_MASK 0x00FF /* OUT2L_VOL - [7:0] */
2658 #define ARIZONA_OUT2L_VOL_SHIFT 0 /* OUT2L_VOL - [7:0] */
2659 #define ARIZONA_OUT2L_VOL_WIDTH 8 /* OUT2L_VOL - [7:0] */
2660 
2661 /*
2662  * R1050 (0x41A) - DAC Volume Limit 2L
2663  */
2664 #define ARIZONA_OUT2L_VOL_LIM_MASK 0x00FF /* OUT2L_VOL_LIM - [7:0] */
2665 #define ARIZONA_OUT2L_VOL_LIM_SHIFT 0 /* OUT2L_VOL_LIM - [7:0] */
2666 #define ARIZONA_OUT2L_VOL_LIM_WIDTH 8 /* OUT2L_VOL_LIM - [7:0] */
2667 
2668 /*
2669  * R1051 (0x41B) - Noise Gate Select 2L
2670  */
2671 #define ARIZONA_OUT2L_NGATE_SRC_MASK 0x0FFF /* OUT2L_NGATE_SRC - [11:0] */
2672 #define ARIZONA_OUT2L_NGATE_SRC_SHIFT 0 /* OUT2L_NGATE_SRC - [11:0] */
2673 #define ARIZONA_OUT2L_NGATE_SRC_WIDTH 12 /* OUT2L_NGATE_SRC - [11:0] */
2674 
2675 /*
2676  * R1052 (0x41C) - Output Path Config 2R
2677  */
2678 #define ARIZONA_OUT2R_ANC_SRC_MASK 0x0C00 /* OUT2R_ANC_SRC - [11:10] */
2679 #define ARIZONA_OUT2R_ANC_SRC_SHIFT 10 /* OUT2R_ANC_SRC - [11:10] */
2680 #define ARIZONA_OUT2R_ANC_SRC_WIDTH 2 /* OUT2R_ANC_SRC - [11:10] */
2681 #define ARIZONA_OUT2R_PGA_VOL_MASK 0x00FE /* OUT2R_PGA_VOL - [7:1] */
2682 #define ARIZONA_OUT2R_PGA_VOL_SHIFT 1 /* OUT2R_PGA_VOL - [7:1] */
2683 #define ARIZONA_OUT2R_PGA_VOL_WIDTH 7 /* OUT2R_PGA_VOL - [7:1] */
2684 
2685 /*
2686  * R1053 (0x41D) - DAC Digital Volume 2R
2687  */
2688 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
2689 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
2690 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
2691 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
2692 #define ARIZONA_OUT2R_MUTE 0x0100 /* OUT2R_MUTE */
2693 #define ARIZONA_OUT2R_MUTE_MASK 0x0100 /* OUT2R_MUTE */
2694 #define ARIZONA_OUT2R_MUTE_SHIFT 8 /* OUT2R_MUTE */
2695 #define ARIZONA_OUT2R_MUTE_WIDTH 1 /* OUT2R_MUTE */
2696 #define ARIZONA_OUT2R_VOL_MASK 0x00FF /* OUT2R_VOL - [7:0] */
2697 #define ARIZONA_OUT2R_VOL_SHIFT 0 /* OUT2R_VOL - [7:0] */
2698 #define ARIZONA_OUT2R_VOL_WIDTH 8 /* OUT2R_VOL - [7:0] */
2699 
2700 /*
2701  * R1054 (0x41E) - DAC Volume Limit 2R
2702  */
2703 #define ARIZONA_OUT2R_VOL_LIM_MASK 0x00FF /* OUT2R_VOL_LIM - [7:0] */
2704 #define ARIZONA_OUT2R_VOL_LIM_SHIFT 0 /* OUT2R_VOL_LIM - [7:0] */
2705 #define ARIZONA_OUT2R_VOL_LIM_WIDTH 8 /* OUT2R_VOL_LIM - [7:0] */
2706 
2707 /*
2708  * R1055 (0x41F) - Noise Gate Select 2R
2709  */
2710 #define ARIZONA_OUT2R_NGATE_SRC_MASK 0x0FFF /* OUT2R_NGATE_SRC - [11:0] */
2711 #define ARIZONA_OUT2R_NGATE_SRC_SHIFT 0 /* OUT2R_NGATE_SRC - [11:0] */
2712 #define ARIZONA_OUT2R_NGATE_SRC_WIDTH 12 /* OUT2R_NGATE_SRC - [11:0] */
2713 
2714 /*
2715  * R1056 (0x420) - Output Path Config 3L
2716  */
2717 #define ARIZONA_OUT3_LP_MODE 0x8000 /* OUT3_LP_MODE */
2718 #define ARIZONA_OUT3_LP_MODE_MASK 0x8000 /* OUT3_LP_MODE */
2719 #define ARIZONA_OUT3_LP_MODE_SHIFT 15 /* OUT3_LP_MODE */
2720 #define ARIZONA_OUT3_LP_MODE_WIDTH 1 /* OUT3_LP_MODE */
2721 #define ARIZONA_OUT3_OSR 0x2000 /* OUT3_OSR */
2722 #define ARIZONA_OUT3_OSR_MASK 0x2000 /* OUT3_OSR */
2723 #define ARIZONA_OUT3_OSR_SHIFT 13 /* OUT3_OSR */
2724 #define ARIZONA_OUT3_OSR_WIDTH 1 /* OUT3_OSR */
2725 #define ARIZONA_OUT3_MONO 0x1000 /* OUT3_MONO */
2726 #define ARIZONA_OUT3_MONO_MASK 0x1000 /* OUT3_MONO */
2727 #define ARIZONA_OUT3_MONO_SHIFT 12 /* OUT3_MONO */
2728 #define ARIZONA_OUT3_MONO_WIDTH 1 /* OUT3_MONO */
2729 #define ARIZONA_OUT3L_ANC_SRC_MASK 0x0C00 /* OUT3L_ANC_SRC - [11:10] */
2730 #define ARIZONA_OUT3L_ANC_SRC_SHIFT 10 /* OUT3L_ANC_SRC - [11:10] */
2731 #define ARIZONA_OUT3L_ANC_SRC_WIDTH 2 /* OUT3L_ANC_SRC - [11:10] */
2732 #define ARIZONA_OUT3L_PGA_VOL_MASK 0x00FE /* OUT3L_PGA_VOL - [7:1] */
2733 #define ARIZONA_OUT3L_PGA_VOL_SHIFT 1 /* OUT3L_PGA_VOL - [7:1] */
2734 #define ARIZONA_OUT3L_PGA_VOL_WIDTH 7 /* OUT3L_PGA_VOL - [7:1] */
2735 
2736 /*
2737  * R1057 (0x421) - DAC Digital Volume 3L
2738  */
2739 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
2740 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
2741 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
2742 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
2743 #define ARIZONA_OUT3L_MUTE 0x0100 /* OUT3L_MUTE */
2744 #define ARIZONA_OUT3L_MUTE_MASK 0x0100 /* OUT3L_MUTE */
2745 #define ARIZONA_OUT3L_MUTE_SHIFT 8 /* OUT3L_MUTE */
2746 #define ARIZONA_OUT3L_MUTE_WIDTH 1 /* OUT3L_MUTE */
2747 #define ARIZONA_OUT3L_VOL_MASK 0x00FF /* OUT3L_VOL - [7:0] */
2748 #define ARIZONA_OUT3L_VOL_SHIFT 0 /* OUT3L_VOL - [7:0] */
2749 #define ARIZONA_OUT3L_VOL_WIDTH 8 /* OUT3L_VOL - [7:0] */
2750 
2751 /*
2752  * R1058 (0x422) - DAC Volume Limit 3L
2753  */
2754 #define ARIZONA_OUT3L_VOL_LIM_MASK 0x00FF /* OUT3L_VOL_LIM - [7:0] */
2755 #define ARIZONA_OUT3L_VOL_LIM_SHIFT 0 /* OUT3L_VOL_LIM - [7:0] */
2756 #define ARIZONA_OUT3L_VOL_LIM_WIDTH 8 /* OUT3L_VOL_LIM - [7:0] */
2757 
2758 /*
2759  * R1059 (0x423) - Noise Gate Select 3L
2760  */
2761 #define ARIZONA_OUT3_NGATE_SRC_MASK 0x0FFF /* OUT3_NGATE_SRC - [11:0] */
2762 #define ARIZONA_OUT3_NGATE_SRC_SHIFT 0 /* OUT3_NGATE_SRC - [11:0] */
2763 #define ARIZONA_OUT3_NGATE_SRC_WIDTH 12 /* OUT3_NGATE_SRC - [11:0] */
2764 
2765 /*
2766  * R1060 (0x424) - Output Path Config 3R
2767  */
2768 #define ARIZONA_OUT3R_PGA_VOL_MASK 0x00FE /* OUT3R_PGA_VOL - [7:1] */
2769 #define ARIZONA_OUT3R_PGA_VOL_SHIFT 1 /* OUT3R_PGA_VOL - [7:1] */
2770 #define ARIZONA_OUT3R_PGA_VOL_WIDTH 7 /* OUT3R_PGA_VOL - [7:1] */
2771 
2772 /*
2773  * R1061 (0x425) - DAC Digital Volume 3R
2774  */
2775 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
2776 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
2777 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
2778 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
2779 #define ARIZONA_OUT3R_MUTE 0x0100 /* OUT3R_MUTE */
2780 #define ARIZONA_OUT3R_MUTE_MASK 0x0100 /* OUT3R_MUTE */
2781 #define ARIZONA_OUT3R_MUTE_SHIFT 8 /* OUT3R_MUTE */
2782 #define ARIZONA_OUT3R_MUTE_WIDTH 1 /* OUT3R_MUTE */
2783 #define ARIZONA_OUT3R_VOL_MASK 0x00FF /* OUT3R_VOL - [7:0] */
2784 #define ARIZONA_OUT3R_VOL_SHIFT 0 /* OUT3R_VOL - [7:0] */
2785 #define ARIZONA_OUT3R_VOL_WIDTH 8 /* OUT3R_VOL - [7:0] */
2786 
2787 /*
2788  * R1062 (0x426) - DAC Volume Limit 3R
2789  */
2790 #define ARIZONA_OUT3R_ANC_SRC_MASK 0x0C00 /* OUT3R_ANC_SRC - [11:10] */
2791 #define ARIZONA_OUT3R_ANC_SRC_SHIFT 10 /* OUT3R_ANC_SRC - [11:10] */
2792 #define ARIZONA_OUT3R_ANC_SRC_WIDTH 2 /* OUT3R_ANC_SRC - [11:10] */
2793 #define ARIZONA_OUT3R_VOL_LIM_MASK 0x00FF /* OUT3R_VOL_LIM - [7:0] */
2794 #define ARIZONA_OUT3R_VOL_LIM_SHIFT 0 /* OUT3R_VOL_LIM - [7:0] */
2795 #define ARIZONA_OUT3R_VOL_LIM_WIDTH 8 /* OUT3R_VOL_LIM - [7:0] */
2796 
2797 /*
2798  * R1064 (0x428) - Output Path Config 4L
2799  */
2800 #define ARIZONA_OUT4_OSR 0x2000 /* OUT4_OSR */
2801 #define ARIZONA_OUT4_OSR_MASK 0x2000 /* OUT4_OSR */
2802 #define ARIZONA_OUT4_OSR_SHIFT 13 /* OUT4_OSR */
2803 #define ARIZONA_OUT4_OSR_WIDTH 1 /* OUT4_OSR */
2804 #define ARIZONA_OUT4L_ANC_SRC_MASK 0x0C00 /* OUT4L_ANC_SRC - [11:10] */
2805 #define ARIZONA_OUT4L_ANC_SRC_SHIFT 10 /* OUT4L_ANC_SRC - [11:10] */
2806 #define ARIZONA_OUT4L_ANC_SRC_WIDTH 2 /* OUT4L_ANC_SRC - [11:10] */
2807 
2808 /*
2809  * R1065 (0x429) - DAC Digital Volume 4L
2810  */
2811 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
2812 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
2813 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
2814 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
2815 #define ARIZONA_OUT4L_MUTE 0x0100 /* OUT4L_MUTE */
2816 #define ARIZONA_OUT4L_MUTE_MASK 0x0100 /* OUT4L_MUTE */
2817 #define ARIZONA_OUT4L_MUTE_SHIFT 8 /* OUT4L_MUTE */
2818 #define ARIZONA_OUT4L_MUTE_WIDTH 1 /* OUT4L_MUTE */
2819 #define ARIZONA_OUT4L_VOL_MASK 0x00FF /* OUT4L_VOL - [7:0] */
2820 #define ARIZONA_OUT4L_VOL_SHIFT 0 /* OUT4L_VOL - [7:0] */
2821 #define ARIZONA_OUT4L_VOL_WIDTH 8 /* OUT4L_VOL - [7:0] */
2822 
2823 /*
2824  * R1066 (0x42A) - Out Volume 4L
2825  */
2826 #define ARIZONA_OUT4L_VOL_LIM_MASK 0x00FF /* OUT4L_VOL_LIM - [7:0] */
2827 #define ARIZONA_OUT4L_VOL_LIM_SHIFT 0 /* OUT4L_VOL_LIM - [7:0] */
2828 #define ARIZONA_OUT4L_VOL_LIM_WIDTH 8 /* OUT4L_VOL_LIM - [7:0] */
2829 
2830 /*
2831  * R1067 (0x42B) - Noise Gate Select 4L
2832  */
2833 #define ARIZONA_OUT4L_NGATE_SRC_MASK 0x0FFF /* OUT4L_NGATE_SRC - [11:0] */
2834 #define ARIZONA_OUT4L_NGATE_SRC_SHIFT 0 /* OUT4L_NGATE_SRC - [11:0] */
2835 #define ARIZONA_OUT4L_NGATE_SRC_WIDTH 12 /* OUT4L_NGATE_SRC - [11:0] */
2836 
2837 /*
2838  * R1068 (0x42C) - Output Path Config 4R
2839  */
2840 #define ARIZONA_OUT4R_ANC_SRC_MASK 0x0C00 /* OUT4R_ANC_SRC - [11:10] */
2841 #define ARIZONA_OUT4R_ANC_SRC_SHIFT 10 /* OUT4R_ANC_SRC - [11:10] */
2842 #define ARIZONA_OUT4R_ANC_SRC_WIDTH 2 /* OUT4R_ANC_SRC - [11:10] */
2843 
2844 /*
2845  * R1069 (0x42D) - DAC Digital Volume 4R
2846  */
2847 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
2848 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
2849 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
2850 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
2851 #define ARIZONA_OUT4R_MUTE 0x0100 /* OUT4R_MUTE */
2852 #define ARIZONA_OUT4R_MUTE_MASK 0x0100 /* OUT4R_MUTE */
2853 #define ARIZONA_OUT4R_MUTE_SHIFT 8 /* OUT4R_MUTE */
2854 #define ARIZONA_OUT4R_MUTE_WIDTH 1 /* OUT4R_MUTE */
2855 #define ARIZONA_OUT4R_VOL_MASK 0x00FF /* OUT4R_VOL - [7:0] */
2856 #define ARIZONA_OUT4R_VOL_SHIFT 0 /* OUT4R_VOL - [7:0] */
2857 #define ARIZONA_OUT4R_VOL_WIDTH 8 /* OUT4R_VOL - [7:0] */
2858 
2859 /*
2860  * R1070 (0x42E) - Out Volume 4R
2861  */
2862 #define ARIZONA_OUT4R_VOL_LIM_MASK 0x00FF /* OUT4R_VOL_LIM - [7:0] */
2863 #define ARIZONA_OUT4R_VOL_LIM_SHIFT 0 /* OUT4R_VOL_LIM - [7:0] */
2864 #define ARIZONA_OUT4R_VOL_LIM_WIDTH 8 /* OUT4R_VOL_LIM - [7:0] */
2865 
2866 /*
2867  * R1071 (0x42F) - Noise Gate Select 4R
2868  */
2869 #define ARIZONA_OUT4R_NGATE_SRC_MASK 0x0FFF /* OUT4R_NGATE_SRC - [11:0] */
2870 #define ARIZONA_OUT4R_NGATE_SRC_SHIFT 0 /* OUT4R_NGATE_SRC - [11:0] */
2871 #define ARIZONA_OUT4R_NGATE_SRC_WIDTH 12 /* OUT4R_NGATE_SRC - [11:0] */
2872 
2873 /*
2874  * R1072 (0x430) - Output Path Config 5L
2875  */
2876 #define ARIZONA_OUT5_OSR 0x2000 /* OUT5_OSR */
2877 #define ARIZONA_OUT5_OSR_MASK 0x2000 /* OUT5_OSR */
2878 #define ARIZONA_OUT5_OSR_SHIFT 13 /* OUT5_OSR */
2879 #define ARIZONA_OUT5_OSR_WIDTH 1 /* OUT5_OSR */
2880 #define ARIZONA_OUT5L_ANC_SRC_MASK 0x0C00 /* OUT5L_ANC_SRC - [11:10] */
2881 #define ARIZONA_OUT5L_ANC_SRC_SHIFT 10 /* OUT5L_ANC_SRC - [11:10] */
2882 #define ARIZONA_OUT5L_ANC_SRC_WIDTH 2 /* OUT5L_ANC_SRC - [11:10] */
2883 
2884 /*
2885  * R1073 (0x431) - DAC Digital Volume 5L
2886  */
2887 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
2888 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
2889 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
2890 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
2891 #define ARIZONA_OUT5L_MUTE 0x0100 /* OUT5L_MUTE */
2892 #define ARIZONA_OUT5L_MUTE_MASK 0x0100 /* OUT5L_MUTE */
2893 #define ARIZONA_OUT5L_MUTE_SHIFT 8 /* OUT5L_MUTE */
2894 #define ARIZONA_OUT5L_MUTE_WIDTH 1 /* OUT5L_MUTE */
2895 #define ARIZONA_OUT5L_VOL_MASK 0x00FF /* OUT5L_VOL - [7:0] */
2896 #define ARIZONA_OUT5L_VOL_SHIFT 0 /* OUT5L_VOL - [7:0] */
2897 #define ARIZONA_OUT5L_VOL_WIDTH 8 /* OUT5L_VOL - [7:0] */
2898 
2899 /*
2900  * R1074 (0x432) - DAC Volume Limit 5L
2901  */
2902 #define ARIZONA_OUT5L_VOL_LIM_MASK 0x00FF /* OUT5L_VOL_LIM - [7:0] */
2903 #define ARIZONA_OUT5L_VOL_LIM_SHIFT 0 /* OUT5L_VOL_LIM - [7:0] */
2904 #define ARIZONA_OUT5L_VOL_LIM_WIDTH 8 /* OUT5L_VOL_LIM - [7:0] */
2905 
2906 /*
2907  * R1075 (0x433) - Noise Gate Select 5L
2908  */
2909 #define ARIZONA_OUT5L_NGATE_SRC_MASK 0x0FFF /* OUT5L_NGATE_SRC - [11:0] */
2910 #define ARIZONA_OUT5L_NGATE_SRC_SHIFT 0 /* OUT5L_NGATE_SRC - [11:0] */
2911 #define ARIZONA_OUT5L_NGATE_SRC_WIDTH 12 /* OUT5L_NGATE_SRC - [11:0] */
2912 
2913 /*
2914  * R1076 (0x434) - Output Path Config 5R
2915  */
2916 #define ARIZONA_OUT5R_ANC_SRC_MASK 0x0C00 /* OUT5R_ANC_SRC - [11:10] */
2917 #define ARIZONA_OUT5R_ANC_SRC_SHIFT 10 /* OUT5R_ANC_SRC - [11:10] */
2918 #define ARIZONA_OUT5R_ANC_SRC_WIDTH 2 /* OUT5R_ANC_SRC - [11:10] */
2919 
2920 /*
2921  * R1077 (0x435) - DAC Digital Volume 5R
2922  */
2923 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
2924 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
2925 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
2926 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
2927 #define ARIZONA_OUT5R_MUTE 0x0100 /* OUT5R_MUTE */
2928 #define ARIZONA_OUT5R_MUTE_MASK 0x0100 /* OUT5R_MUTE */
2929 #define ARIZONA_OUT5R_MUTE_SHIFT 8 /* OUT5R_MUTE */
2930 #define ARIZONA_OUT5R_MUTE_WIDTH 1 /* OUT5R_MUTE */
2931 #define ARIZONA_OUT5R_VOL_MASK 0x00FF /* OUT5R_VOL - [7:0] */
2932 #define ARIZONA_OUT5R_VOL_SHIFT 0 /* OUT5R_VOL - [7:0] */
2933 #define ARIZONA_OUT5R_VOL_WIDTH 8 /* OUT5R_VOL - [7:0] */
2934 
2935 /*
2936  * R1078 (0x436) - DAC Volume Limit 5R
2937  */
2938 #define ARIZONA_OUT5R_VOL_LIM_MASK 0x00FF /* OUT5R_VOL_LIM - [7:0] */
2939 #define ARIZONA_OUT5R_VOL_LIM_SHIFT 0 /* OUT5R_VOL_LIM - [7:0] */
2940 #define ARIZONA_OUT5R_VOL_LIM_WIDTH 8 /* OUT5R_VOL_LIM - [7:0] */
2941 
2942 /*
2943  * R1079 (0x437) - Noise Gate Select 5R
2944  */
2945 #define ARIZONA_OUT5R_NGATE_SRC_MASK 0x0FFF /* OUT5R_NGATE_SRC - [11:0] */
2946 #define ARIZONA_OUT5R_NGATE_SRC_SHIFT 0 /* OUT5R_NGATE_SRC - [11:0] */
2947 #define ARIZONA_OUT5R_NGATE_SRC_WIDTH 12 /* OUT5R_NGATE_SRC - [11:0] */
2948 
2949 /*
2950  * R1080 (0x438) - Output Path Config 6L
2951  */
2952 #define ARIZONA_OUT6_OSR 0x2000 /* OUT6_OSR */
2953 #define ARIZONA_OUT6_OSR_MASK 0x2000 /* OUT6_OSR */
2954 #define ARIZONA_OUT6_OSR_SHIFT 13 /* OUT6_OSR */
2955 #define ARIZONA_OUT6_OSR_WIDTH 1 /* OUT6_OSR */
2956 #define ARIZONA_OUT6L_ANC_SRC_MASK 0x0C00 /* OUT6L_ANC_SRC - [11:10] */
2957 #define ARIZONA_OUT6L_ANC_SRC_SHIFT 10 /* OUT6L_ANC_SRC - [11:10] */
2958 #define ARIZONA_OUT6L_ANC_SRC_WIDTH 2 /* OUT6L_ANC_SRC - [11:10] */
2959 
2960 /*
2961  * R1081 (0x439) - DAC Digital Volume 6L
2962  */
2963 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
2964 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
2965 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
2966 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
2967 #define ARIZONA_OUT6L_MUTE 0x0100 /* OUT6L_MUTE */
2968 #define ARIZONA_OUT6L_MUTE_MASK 0x0100 /* OUT6L_MUTE */
2969 #define ARIZONA_OUT6L_MUTE_SHIFT 8 /* OUT6L_MUTE */
2970 #define ARIZONA_OUT6L_MUTE_WIDTH 1 /* OUT6L_MUTE */
2971 #define ARIZONA_OUT6L_VOL_MASK 0x00FF /* OUT6L_VOL - [7:0] */
2972 #define ARIZONA_OUT6L_VOL_SHIFT 0 /* OUT6L_VOL - [7:0] */
2973 #define ARIZONA_OUT6L_VOL_WIDTH 8 /* OUT6L_VOL - [7:0] */
2974 
2975 /*
2976  * R1082 (0x43A) - DAC Volume Limit 6L
2977  */
2978 #define ARIZONA_OUT6L_VOL_LIM_MASK 0x00FF /* OUT6L_VOL_LIM - [7:0] */
2979 #define ARIZONA_OUT6L_VOL_LIM_SHIFT 0 /* OUT6L_VOL_LIM - [7:0] */
2980 #define ARIZONA_OUT6L_VOL_LIM_WIDTH 8 /* OUT6L_VOL_LIM - [7:0] */
2981 
2982 /*
2983  * R1083 (0x43B) - Noise Gate Select 6L
2984  */
2985 #define ARIZONA_OUT6L_NGATE_SRC_MASK 0x0FFF /* OUT6L_NGATE_SRC - [11:0] */
2986 #define ARIZONA_OUT6L_NGATE_SRC_SHIFT 0 /* OUT6L_NGATE_SRC - [11:0] */
2987 #define ARIZONA_OUT6L_NGATE_SRC_WIDTH 12 /* OUT6L_NGATE_SRC - [11:0] */
2988 
2989 /*
2990  * R1084 (0x43C) - Output Path Config 6R
2991  */
2992 #define ARIZONA_OUT6R_ANC_SRC_MASK 0x0C00 /* OUT6R_ANC_SRC - [11:10] */
2993 #define ARIZONA_OUT6R_ANC_SRC_SHIFT 10 /* OUT6R_ANC_SRC - [11:10] */
2994 #define ARIZONA_OUT6R_ANC_SRC_WIDTH 2 /* OUT6R_ANC_SRC - [11:10] */
2995 
2996 /*
2997  * R1085 (0x43D) - DAC Digital Volume 6R
2998  */
2999 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
3000 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
3001 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
3002 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
3003 #define ARIZONA_OUT6R_MUTE 0x0100 /* OUT6R_MUTE */
3004 #define ARIZONA_OUT6R_MUTE_MASK 0x0100 /* OUT6R_MUTE */
3005 #define ARIZONA_OUT6R_MUTE_SHIFT 8 /* OUT6R_MUTE */
3006 #define ARIZONA_OUT6R_MUTE_WIDTH 1 /* OUT6R_MUTE */
3007 #define ARIZONA_OUT6R_VOL_MASK 0x00FF /* OUT6R_VOL - [7:0] */
3008 #define ARIZONA_OUT6R_VOL_SHIFT 0 /* OUT6R_VOL - [7:0] */
3009 #define ARIZONA_OUT6R_VOL_WIDTH 8 /* OUT6R_VOL - [7:0] */
3010 
3011 /*
3012  * R1086 (0x43E) - DAC Volume Limit 6R
3013  */
3014 #define ARIZONA_OUT6R_VOL_LIM_MASK 0x00FF /* OUT6R_VOL_LIM - [7:0] */
3015 #define ARIZONA_OUT6R_VOL_LIM_SHIFT 0 /* OUT6R_VOL_LIM - [7:0] */
3016 #define ARIZONA_OUT6R_VOL_LIM_WIDTH 8 /* OUT6R_VOL_LIM - [7:0] */
3017 
3018 /*
3019  * R1087 (0x43F) - Noise Gate Select 6R
3020  */
3021 #define ARIZONA_OUT6R_NGATE_SRC_MASK 0x0FFF /* OUT6R_NGATE_SRC - [11:0] */
3022 #define ARIZONA_OUT6R_NGATE_SRC_SHIFT 0 /* OUT6R_NGATE_SRC - [11:0] */
3023 #define ARIZONA_OUT6R_NGATE_SRC_WIDTH 12 /* OUT6R_NGATE_SRC - [11:0] */
3024 
3025 /*
3026  * R1104 (0x450) - DAC AEC Control 1
3027  */
3028 #define ARIZONA_AEC_LOOPBACK_SRC_MASK 0x003C /* AEC_LOOPBACK_SRC - [5:2] */
3029 #define ARIZONA_AEC_LOOPBACK_SRC_SHIFT 2 /* AEC_LOOPBACK_SRC - [5:2] */
3030 #define ARIZONA_AEC_LOOPBACK_SRC_WIDTH 4 /* AEC_LOOPBACK_SRC - [5:2] */
3031 #define ARIZONA_AEC_ENA_STS 0x0002 /* AEC_ENA_STS */
3032 #define ARIZONA_AEC_ENA_STS_MASK 0x0002 /* AEC_ENA_STS */
3033 #define ARIZONA_AEC_ENA_STS_SHIFT 1 /* AEC_ENA_STS */
3034 #define ARIZONA_AEC_ENA_STS_WIDTH 1 /* AEC_ENA_STS */
3035 #define ARIZONA_AEC_LOOPBACK_ENA 0x0001 /* AEC_LOOPBACK_ENA */
3036 #define ARIZONA_AEC_LOOPBACK_ENA_MASK 0x0001 /* AEC_LOOPBACK_ENA */
3037 #define ARIZONA_AEC_LOOPBACK_ENA_SHIFT 0 /* AEC_LOOPBACK_ENA */
3038 #define ARIZONA_AEC_LOOPBACK_ENA_WIDTH 1 /* AEC_LOOPBACK_ENA */
3039 
3040 /*
3041  * R1112 (0x458) - Noise Gate Control
3042  */
3043 #define ARIZONA_NGATE_HOLD_MASK 0x0030 /* NGATE_HOLD - [5:4] */
3044 #define ARIZONA_NGATE_HOLD_SHIFT 4 /* NGATE_HOLD - [5:4] */
3045 #define ARIZONA_NGATE_HOLD_WIDTH 2 /* NGATE_HOLD - [5:4] */
3046 #define ARIZONA_NGATE_THR_MASK 0x000E /* NGATE_THR - [3:1] */
3047 #define ARIZONA_NGATE_THR_SHIFT 1 /* NGATE_THR - [3:1] */
3048 #define ARIZONA_NGATE_THR_WIDTH 3 /* NGATE_THR - [3:1] */
3049 #define ARIZONA_NGATE_ENA 0x0001 /* NGATE_ENA */
3050 #define ARIZONA_NGATE_ENA_MASK 0x0001 /* NGATE_ENA */
3051 #define ARIZONA_NGATE_ENA_SHIFT 0 /* NGATE_ENA */
3052 #define ARIZONA_NGATE_ENA_WIDTH 1 /* NGATE_ENA */
3053 
3054 /*
3055  * R1168 (0x490) - PDM SPK1 CTRL 1
3056  */
3057 #define ARIZONA_SPK1R_MUTE 0x2000 /* SPK1R_MUTE */
3058 #define ARIZONA_SPK1R_MUTE_MASK 0x2000 /* SPK1R_MUTE */
3059 #define ARIZONA_SPK1R_MUTE_SHIFT 13 /* SPK1R_MUTE */
3060 #define ARIZONA_SPK1R_MUTE_WIDTH 1 /* SPK1R_MUTE */
3061 #define ARIZONA_SPK1L_MUTE 0x1000 /* SPK1L_MUTE */
3062 #define ARIZONA_SPK1L_MUTE_MASK 0x1000 /* SPK1L_MUTE */
3063 #define ARIZONA_SPK1L_MUTE_SHIFT 12 /* SPK1L_MUTE */
3064 #define ARIZONA_SPK1L_MUTE_WIDTH 1 /* SPK1L_MUTE */
3065 #define ARIZONA_SPK1_MUTE_ENDIAN 0x0100 /* SPK1_MUTE_ENDIAN */
3066 #define ARIZONA_SPK1_MUTE_ENDIAN_MASK 0x0100 /* SPK1_MUTE_ENDIAN */
3067 #define ARIZONA_SPK1_MUTE_ENDIAN_SHIFT 8 /* SPK1_MUTE_ENDIAN */
3068 #define ARIZONA_SPK1_MUTE_ENDIAN_WIDTH 1 /* SPK1_MUTE_ENDIAN */
3069 #define ARIZONA_SPK1_MUTE_SEQ1_MASK 0x00FF /* SPK1_MUTE_SEQ1 - [7:0] */
3070 #define ARIZONA_SPK1_MUTE_SEQ1_SHIFT 0 /* SPK1_MUTE_SEQ1 - [7:0] */
3071 #define ARIZONA_SPK1_MUTE_SEQ1_WIDTH 8 /* SPK1_MUTE_SEQ1 - [7:0] */
3072 
3073 /*
3074  * R1169 (0x491) - PDM SPK1 CTRL 2
3075  */
3076 #define ARIZONA_SPK1_FMT 0x0001 /* SPK1_FMT */
3077 #define ARIZONA_SPK1_FMT_MASK 0x0001 /* SPK1_FMT */
3078 #define ARIZONA_SPK1_FMT_SHIFT 0 /* SPK1_FMT */
3079 #define ARIZONA_SPK1_FMT_WIDTH 1 /* SPK1_FMT */
3080 
3081 /*
3082  * R1170 (0x492) - PDM SPK2 CTRL 1
3083  */
3084 #define ARIZONA_SPK2R_MUTE 0x2000 /* SPK2R_MUTE */
3085 #define ARIZONA_SPK2R_MUTE_MASK 0x2000 /* SPK2R_MUTE */
3086 #define ARIZONA_SPK2R_MUTE_SHIFT 13 /* SPK2R_MUTE */
3087 #define ARIZONA_SPK2R_MUTE_WIDTH 1 /* SPK2R_MUTE */
3088 #define ARIZONA_SPK2L_MUTE 0x1000 /* SPK2L_MUTE */
3089 #define ARIZONA_SPK2L_MUTE_MASK 0x1000 /* SPK2L_MUTE */
3090 #define ARIZONA_SPK2L_MUTE_SHIFT 12 /* SPK2L_MUTE */
3091 #define ARIZONA_SPK2L_MUTE_WIDTH 1 /* SPK2L_MUTE */
3092 #define ARIZONA_SPK2_MUTE_ENDIAN 0x0100 /* SPK2_MUTE_ENDIAN */
3093 #define ARIZONA_SPK2_MUTE_ENDIAN_MASK 0x0100 /* SPK2_MUTE_ENDIAN */
3094 #define ARIZONA_SPK2_MUTE_ENDIAN_SHIFT 8 /* SPK2_MUTE_ENDIAN */
3095 #define ARIZONA_SPK2_MUTE_ENDIAN_WIDTH 1 /* SPK2_MUTE_ENDIAN */
3096 #define ARIZONA_SPK2_MUTE_SEQ_MASK 0x00FF /* SPK2_MUTE_SEQ - [7:0] */
3097 #define ARIZONA_SPK2_MUTE_SEQ_SHIFT 0 /* SPK2_MUTE_SEQ - [7:0] */
3098 #define ARIZONA_SPK2_MUTE_SEQ_WIDTH 8 /* SPK2_MUTE_SEQ - [7:0] */
3099 
3100 /*
3101  * R1171 (0x493) - PDM SPK2 CTRL 2
3102  */
3103 #define ARIZONA_SPK2_FMT 0x0001 /* SPK2_FMT */
3104 #define ARIZONA_SPK2_FMT_MASK 0x0001 /* SPK2_FMT */
3105 #define ARIZONA_SPK2_FMT_SHIFT 0 /* SPK2_FMT */
3106 #define ARIZONA_SPK2_FMT_WIDTH 1 /* SPK2_FMT */
3107 
3108 /*
3109  * R1244 (0x4DC) - DAC comp 1
3110  */
3111 #define ARIZONA_OUT_COMP_COEFF_MASK 0xFFFF /* OUT_COMP_COEFF - [15:0] */
3112 #define ARIZONA_OUT_COMP_COEFF_SHIFT 0 /* OUT_COMP_COEFF - [15:0] */
3113 #define ARIZONA_OUT_COMP_COEFF_WIDTH 16 /* OUT_COMP_COEFF - [15:0] */
3114 
3115 /*
3116  * R1245 (0x4DD) - DAC comp 2
3117  */
3118 #define ARIZONA_OUT_COMP_COEFF_1 0x0002 /* OUT_COMP_COEFF */
3119 #define ARIZONA_OUT_COMP_COEFF_1_MASK 0x0002 /* OUT_COMP_COEFF */
3120 #define ARIZONA_OUT_COMP_COEFF_1_SHIFT 1 /* OUT_COMP_COEFF */
3121 #define ARIZONA_OUT_COMP_COEFF_1_WIDTH 1 /* OUT_COMP_COEFF */
3122 #define ARIZONA_OUT_COMP_COEFF_SEL 0x0001 /* OUT_COMP_COEFF_SEL */
3123 #define ARIZONA_OUT_COMP_COEFF_SEL_MASK 0x0001 /* OUT_COMP_COEFF_SEL */
3124 #define ARIZONA_OUT_COMP_COEFF_SEL_SHIFT 0 /* OUT_COMP_COEFF_SEL */
3125 #define ARIZONA_OUT_COMP_COEFF_SEL_WIDTH 1 /* OUT_COMP_COEFF_SEL */
3126 
3127 /*
3128  * R1246 (0x4DE) - DAC comp 3
3129  */
3130 #define ARIZONA_AEC_COMP_COEFF_MASK 0xFFFF /* AEC_COMP_COEFF - [15:0] */
3131 #define ARIZONA_AEC_COMP_COEFF_SHIFT 0 /* AEC_COMP_COEFF - [15:0] */
3132 #define ARIZONA_AEC_COMP_COEFF_WIDTH 16 /* AEC_COMP_COEFF - [15:0] */
3133 
3134 /*
3135  * R1247 (0x4DF) - DAC comp 4
3136  */
3137 #define ARIZONA_AEC_COMP_COEFF_1 0x0002 /* AEC_COMP_COEFF */
3138 #define ARIZONA_AEC_COMP_COEFF_1_MASK 0x0002 /* AEC_COMP_COEFF */
3139 #define ARIZONA_AEC_COMP_COEFF_1_SHIFT 1 /* AEC_COMP_COEFF */
3140 #define ARIZONA_AEC_COMP_COEFF_1_WIDTH 1 /* AEC_COMP_COEFF */
3141 #define ARIZONA_AEC_COMP_COEFF_SEL 0x0001 /* AEC_COMP_COEFF_SEL */
3142 #define ARIZONA_AEC_COMP_COEFF_SEL_MASK 0x0001 /* AEC_COMP_COEFF_SEL */
3143 #define ARIZONA_AEC_COMP_COEFF_SEL_SHIFT 0 /* AEC_COMP_COEFF_SEL */
3144 #define ARIZONA_AEC_COMP_COEFF_SEL_WIDTH 1 /* AEC_COMP_COEFF_SEL */
3145 
3146 /*
3147  * R1280 (0x500) - AIF1 BCLK Ctrl
3148  */
3149 #define ARIZONA_AIF1_BCLK_INV 0x0080 /* AIF1_BCLK_INV */
3150 #define ARIZONA_AIF1_BCLK_INV_MASK 0x0080 /* AIF1_BCLK_INV */
3151 #define ARIZONA_AIF1_BCLK_INV_SHIFT 7 /* AIF1_BCLK_INV */
3152 #define ARIZONA_AIF1_BCLK_INV_WIDTH 1 /* AIF1_BCLK_INV */
3153 #define ARIZONA_AIF1_BCLK_FRC 0x0040 /* AIF1_BCLK_FRC */
3154 #define ARIZONA_AIF1_BCLK_FRC_MASK 0x0040 /* AIF1_BCLK_FRC */
3155 #define ARIZONA_AIF1_BCLK_FRC_SHIFT 6 /* AIF1_BCLK_FRC */
3156 #define ARIZONA_AIF1_BCLK_FRC_WIDTH 1 /* AIF1_BCLK_FRC */
3157 #define ARIZONA_AIF1_BCLK_MSTR 0x0020 /* AIF1_BCLK_MSTR */
3158 #define ARIZONA_AIF1_BCLK_MSTR_MASK 0x0020 /* AIF1_BCLK_MSTR */
3159 #define ARIZONA_AIF1_BCLK_MSTR_SHIFT 5 /* AIF1_BCLK_MSTR */
3160 #define ARIZONA_AIF1_BCLK_MSTR_WIDTH 1 /* AIF1_BCLK_MSTR */
3161 #define ARIZONA_AIF1_BCLK_FREQ_MASK 0x001F /* AIF1_BCLK_FREQ - [4:0] */
3162 #define ARIZONA_AIF1_BCLK_FREQ_SHIFT 0 /* AIF1_BCLK_FREQ - [4:0] */
3163 #define ARIZONA_AIF1_BCLK_FREQ_WIDTH 5 /* AIF1_BCLK_FREQ - [4:0] */
3164 
3165 /*
3166  * R1281 (0x501) - AIF1 Tx Pin Ctrl
3167  */
3168 #define ARIZONA_AIF1TX_DAT_TRI 0x0020 /* AIF1TX_DAT_TRI */
3169 #define ARIZONA_AIF1TX_DAT_TRI_MASK 0x0020 /* AIF1TX_DAT_TRI */
3170 #define ARIZONA_AIF1TX_DAT_TRI_SHIFT 5 /* AIF1TX_DAT_TRI */
3171 #define ARIZONA_AIF1TX_DAT_TRI_WIDTH 1 /* AIF1TX_DAT_TRI */
3172 #define ARIZONA_AIF1TX_LRCLK_SRC 0x0008 /* AIF1TX_LRCLK_SRC */
3173 #define ARIZONA_AIF1TX_LRCLK_SRC_MASK 0x0008 /* AIF1TX_LRCLK_SRC */
3174 #define ARIZONA_AIF1TX_LRCLK_SRC_SHIFT 3 /* AIF1TX_LRCLK_SRC */
3175 #define ARIZONA_AIF1TX_LRCLK_SRC_WIDTH 1 /* AIF1TX_LRCLK_SRC */
3176 #define ARIZONA_AIF1TX_LRCLK_INV 0x0004 /* AIF1TX_LRCLK_INV */
3177 #define ARIZONA_AIF1TX_LRCLK_INV_MASK 0x0004 /* AIF1TX_LRCLK_INV */
3178 #define ARIZONA_AIF1TX_LRCLK_INV_SHIFT 2 /* AIF1TX_LRCLK_INV */
3179 #define ARIZONA_AIF1TX_LRCLK_INV_WIDTH 1 /* AIF1TX_LRCLK_INV */
3180 #define ARIZONA_AIF1TX_LRCLK_FRC 0x0002 /* AIF1TX_LRCLK_FRC */
3181 #define ARIZONA_AIF1TX_LRCLK_FRC_MASK 0x0002 /* AIF1TX_LRCLK_FRC */
3182 #define ARIZONA_AIF1TX_LRCLK_FRC_SHIFT 1 /* AIF1TX_LRCLK_FRC */
3183 #define ARIZONA_AIF1TX_LRCLK_FRC_WIDTH 1 /* AIF1TX_LRCLK_FRC */
3184 #define ARIZONA_AIF1TX_LRCLK_MSTR 0x0001 /* AIF1TX_LRCLK_MSTR */
3185 #define ARIZONA_AIF1TX_LRCLK_MSTR_MASK 0x0001 /* AIF1TX_LRCLK_MSTR */
3186 #define ARIZONA_AIF1TX_LRCLK_MSTR_SHIFT 0 /* AIF1TX_LRCLK_MSTR */
3187 #define ARIZONA_AIF1TX_LRCLK_MSTR_WIDTH 1 /* AIF1TX_LRCLK_MSTR */
3188 
3189 /*
3190  * R1282 (0x502) - AIF1 Rx Pin Ctrl
3191  */
3192 #define ARIZONA_AIF1RX_LRCLK_INV 0x0004 /* AIF1RX_LRCLK_INV */
3193 #define ARIZONA_AIF1RX_LRCLK_INV_MASK 0x0004 /* AIF1RX_LRCLK_INV */
3194 #define ARIZONA_AIF1RX_LRCLK_INV_SHIFT 2 /* AIF1RX_LRCLK_INV */
3195 #define ARIZONA_AIF1RX_LRCLK_INV_WIDTH 1 /* AIF1RX_LRCLK_INV */
3196 #define ARIZONA_AIF1RX_LRCLK_FRC 0x0002 /* AIF1RX_LRCLK_FRC */
3197 #define ARIZONA_AIF1RX_LRCLK_FRC_MASK 0x0002 /* AIF1RX_LRCLK_FRC */
3198 #define ARIZONA_AIF1RX_LRCLK_FRC_SHIFT 1 /* AIF1RX_LRCLK_FRC */
3199 #define ARIZONA_AIF1RX_LRCLK_FRC_WIDTH 1 /* AIF1RX_LRCLK_FRC */
3200 #define ARIZONA_AIF1RX_LRCLK_MSTR 0x0001 /* AIF1RX_LRCLK_MSTR */
3201 #define ARIZONA_AIF1RX_LRCLK_MSTR_MASK 0x0001 /* AIF1RX_LRCLK_MSTR */
3202 #define ARIZONA_AIF1RX_LRCLK_MSTR_SHIFT 0 /* AIF1RX_LRCLK_MSTR */
3203 #define ARIZONA_AIF1RX_LRCLK_MSTR_WIDTH 1 /* AIF1RX_LRCLK_MSTR */
3204 
3205 /*
3206  * R1283 (0x503) - AIF1 Rate Ctrl
3207  */
3208 #define ARIZONA_AIF1_RATE_MASK 0x7800 /* AIF1_RATE - [14:11] */
3209 #define ARIZONA_AIF1_RATE_SHIFT 11 /* AIF1_RATE - [14:11] */
3210 #define ARIZONA_AIF1_RATE_WIDTH 4 /* AIF1_RATE - [14:11] */
3211 #define ARIZONA_AIF1_TRI 0x0040 /* AIF1_TRI */
3212 #define ARIZONA_AIF1_TRI_MASK 0x0040 /* AIF1_TRI */
3213 #define ARIZONA_AIF1_TRI_SHIFT 6 /* AIF1_TRI */
3214 #define ARIZONA_AIF1_TRI_WIDTH 1 /* AIF1_TRI */
3215 
3216 /*
3217  * R1284 (0x504) - AIF1 Format
3218  */
3219 #define ARIZONA_AIF1_FMT_MASK 0x0007 /* AIF1_FMT - [2:0] */
3220 #define ARIZONA_AIF1_FMT_SHIFT 0 /* AIF1_FMT - [2:0] */
3221 #define ARIZONA_AIF1_FMT_WIDTH 3 /* AIF1_FMT - [2:0] */
3222 
3223 /*
3224  * R1285 (0x505) - AIF1 Tx BCLK Rate
3225  */
3226 #define ARIZONA_AIF1TX_BCPF_MASK 0x1FFF /* AIF1TX_BCPF - [12:0] */
3227 #define ARIZONA_AIF1TX_BCPF_SHIFT 0 /* AIF1TX_BCPF - [12:0] */
3228 #define ARIZONA_AIF1TX_BCPF_WIDTH 13 /* AIF1TX_BCPF - [12:0] */
3229 
3230 /*
3231  * R1286 (0x506) - AIF1 Rx BCLK Rate
3232  */
3233 #define ARIZONA_AIF1RX_BCPF_MASK 0x1FFF /* AIF1RX_BCPF - [12:0] */
3234 #define ARIZONA_AIF1RX_BCPF_SHIFT 0 /* AIF1RX_BCPF - [12:0] */
3235 #define ARIZONA_AIF1RX_BCPF_WIDTH 13 /* AIF1RX_BCPF - [12:0] */
3236 
3237 /*
3238  * R1287 (0x507) - AIF1 Frame Ctrl 1
3239  */
3240 #define ARIZONA_AIF1TX_WL_MASK 0x3F00 /* AIF1TX_WL - [13:8] */
3241 #define ARIZONA_AIF1TX_WL_SHIFT 8 /* AIF1TX_WL - [13:8] */
3242 #define ARIZONA_AIF1TX_WL_WIDTH 6 /* AIF1TX_WL - [13:8] */
3243 #define ARIZONA_AIF1TX_SLOT_LEN_MASK 0x00FF /* AIF1TX_SLOT_LEN - [7:0] */
3244 #define ARIZONA_AIF1TX_SLOT_LEN_SHIFT 0 /* AIF1TX_SLOT_LEN - [7:0] */
3245 #define ARIZONA_AIF1TX_SLOT_LEN_WIDTH 8 /* AIF1TX_SLOT_LEN - [7:0] */
3246 
3247 /*
3248  * R1288 (0x508) - AIF1 Frame Ctrl 2
3249  */
3250 #define ARIZONA_AIF1RX_WL_MASK 0x3F00 /* AIF1RX_WL - [13:8] */
3251 #define ARIZONA_AIF1RX_WL_SHIFT 8 /* AIF1RX_WL - [13:8] */
3252 #define ARIZONA_AIF1RX_WL_WIDTH 6 /* AIF1RX_WL - [13:8] */
3253 #define ARIZONA_AIF1RX_SLOT_LEN_MASK 0x00FF /* AIF1RX_SLOT_LEN - [7:0] */
3254 #define ARIZONA_AIF1RX_SLOT_LEN_SHIFT 0 /* AIF1RX_SLOT_LEN - [7:0] */
3255 #define ARIZONA_AIF1RX_SLOT_LEN_WIDTH 8 /* AIF1RX_SLOT_LEN - [7:0] */
3256 
3257 /*
3258  * R1289 (0x509) - AIF1 Frame Ctrl 3
3259  */
3260 #define ARIZONA_AIF1TX1_SLOT_MASK 0x003F /* AIF1TX1_SLOT - [5:0] */
3261 #define ARIZONA_AIF1TX1_SLOT_SHIFT 0 /* AIF1TX1_SLOT - [5:0] */
3262 #define ARIZONA_AIF1TX1_SLOT_WIDTH 6 /* AIF1TX1_SLOT - [5:0] */
3263 
3264 /*
3265  * R1290 (0x50A) - AIF1 Frame Ctrl 4
3266  */
3267 #define ARIZONA_AIF1TX2_SLOT_MASK 0x003F /* AIF1TX2_SLOT - [5:0] */
3268 #define ARIZONA_AIF1TX2_SLOT_SHIFT 0 /* AIF1TX2_SLOT - [5:0] */
3269 #define ARIZONA_AIF1TX2_SLOT_WIDTH 6 /* AIF1TX2_SLOT - [5:0] */
3270 
3271 /*
3272  * R1291 (0x50B) - AIF1 Frame Ctrl 5
3273  */
3274 #define ARIZONA_AIF1TX3_SLOT_MASK 0x003F /* AIF1TX3_SLOT - [5:0] */
3275 #define ARIZONA_AIF1TX3_SLOT_SHIFT 0 /* AIF1TX3_SLOT - [5:0] */
3276 #define ARIZONA_AIF1TX3_SLOT_WIDTH 6 /* AIF1TX3_SLOT - [5:0] */
3277 
3278 /*
3279  * R1292 (0x50C) - AIF1 Frame Ctrl 6
3280  */
3281 #define ARIZONA_AIF1TX4_SLOT_MASK 0x003F /* AIF1TX4_SLOT - [5:0] */
3282 #define ARIZONA_AIF1TX4_SLOT_SHIFT 0 /* AIF1TX4_SLOT - [5:0] */
3283 #define ARIZONA_AIF1TX4_SLOT_WIDTH 6 /* AIF1TX4_SLOT - [5:0] */
3284 
3285 /*
3286  * R1293 (0x50D) - AIF1 Frame Ctrl 7
3287  */
3288 #define ARIZONA_AIF1TX5_SLOT_MASK 0x003F /* AIF1TX5_SLOT - [5:0] */
3289 #define ARIZONA_AIF1TX5_SLOT_SHIFT 0 /* AIF1TX5_SLOT - [5:0] */
3290 #define ARIZONA_AIF1TX5_SLOT_WIDTH 6 /* AIF1TX5_SLOT - [5:0] */
3291 
3292 /*
3293  * R1294 (0x50E) - AIF1 Frame Ctrl 8
3294  */
3295 #define ARIZONA_AIF1TX6_SLOT_MASK 0x003F /* AIF1TX6_SLOT - [5:0] */
3296 #define ARIZONA_AIF1TX6_SLOT_SHIFT 0 /* AIF1TX6_SLOT - [5:0] */
3297 #define ARIZONA_AIF1TX6_SLOT_WIDTH 6 /* AIF1TX6_SLOT - [5:0] */
3298 
3299 /*
3300  * R1295 (0x50F) - AIF1 Frame Ctrl 9
3301  */
3302 #define ARIZONA_AIF1TX7_SLOT_MASK 0x003F /* AIF1TX7_SLOT - [5:0] */
3303 #define ARIZONA_AIF1TX7_SLOT_SHIFT 0 /* AIF1TX7_SLOT - [5:0] */
3304 #define ARIZONA_AIF1TX7_SLOT_WIDTH 6 /* AIF1TX7_SLOT - [5:0] */
3305 
3306 /*
3307  * R1296 (0x510) - AIF1 Frame Ctrl 10
3308  */
3309 #define ARIZONA_AIF1TX8_SLOT_MASK 0x003F /* AIF1TX8_SLOT - [5:0] */
3310 #define ARIZONA_AIF1TX8_SLOT_SHIFT 0 /* AIF1TX8_SLOT - [5:0] */
3311 #define ARIZONA_AIF1TX8_SLOT_WIDTH 6 /* AIF1TX8_SLOT - [5:0] */
3312 
3313 /*
3314  * R1297 (0x511) - AIF1 Frame Ctrl 11
3315  */
3316 #define ARIZONA_AIF1RX1_SLOT_MASK 0x003F /* AIF1RX1_SLOT - [5:0] */
3317 #define ARIZONA_AIF1RX1_SLOT_SHIFT 0 /* AIF1RX1_SLOT - [5:0] */
3318 #define ARIZONA_AIF1RX1_SLOT_WIDTH 6 /* AIF1RX1_SLOT - [5:0] */
3319 
3320 /*
3321  * R1298 (0x512) - AIF1 Frame Ctrl 12
3322  */
3323 #define ARIZONA_AIF1RX2_SLOT_MASK 0x003F /* AIF1RX2_SLOT - [5:0] */
3324 #define ARIZONA_AIF1RX2_SLOT_SHIFT 0 /* AIF1RX2_SLOT - [5:0] */
3325 #define ARIZONA_AIF1RX2_SLOT_WIDTH 6 /* AIF1RX2_SLOT - [5:0] */
3326 
3327 /*
3328  * R1299 (0x513) - AIF1 Frame Ctrl 13
3329  */
3330 #define ARIZONA_AIF1RX3_SLOT_MASK 0x003F /* AIF1RX3_SLOT - [5:0] */
3331 #define ARIZONA_AIF1RX3_SLOT_SHIFT 0 /* AIF1RX3_SLOT - [5:0] */
3332 #define ARIZONA_AIF1RX3_SLOT_WIDTH 6 /* AIF1RX3_SLOT - [5:0] */
3333 
3334 /*
3335  * R1300 (0x514) - AIF1 Frame Ctrl 14
3336  */
3337 #define ARIZONA_AIF1RX4_SLOT_MASK 0x003F /* AIF1RX4_SLOT - [5:0] */
3338 #define ARIZONA_AIF1RX4_SLOT_SHIFT 0 /* AIF1RX4_SLOT - [5:0] */
3339 #define ARIZONA_AIF1RX4_SLOT_WIDTH 6 /* AIF1RX4_SLOT - [5:0] */
3340 
3341 /*
3342  * R1301 (0x515) - AIF1 Frame Ctrl 15
3343  */
3344 #define ARIZONA_AIF1RX5_SLOT_MASK 0x003F /* AIF1RX5_SLOT - [5:0] */
3345 #define ARIZONA_AIF1RX5_SLOT_SHIFT 0 /* AIF1RX5_SLOT - [5:0] */
3346 #define ARIZONA_AIF1RX5_SLOT_WIDTH 6 /* AIF1RX5_SLOT - [5:0] */
3347 
3348 /*
3349  * R1302 (0x516) - AIF1 Frame Ctrl 16
3350  */
3351 #define ARIZONA_AIF1RX6_SLOT_MASK 0x003F /* AIF1RX6_SLOT - [5:0] */
3352 #define ARIZONA_AIF1RX6_SLOT_SHIFT 0 /* AIF1RX6_SLOT - [5:0] */
3353 #define ARIZONA_AIF1RX6_SLOT_WIDTH 6 /* AIF1RX6_SLOT - [5:0] */
3354 
3355 /*
3356  * R1303 (0x517) - AIF1 Frame Ctrl 17
3357  */
3358 #define ARIZONA_AIF1RX7_SLOT_MASK 0x003F /* AIF1RX7_SLOT - [5:0] */
3359 #define ARIZONA_AIF1RX7_SLOT_SHIFT 0 /* AIF1RX7_SLOT - [5:0] */
3360 #define ARIZONA_AIF1RX7_SLOT_WIDTH 6 /* AIF1RX7_SLOT - [5:0] */
3361 
3362 /*
3363  * R1304 (0x518) - AIF1 Frame Ctrl 18
3364  */
3365 #define ARIZONA_AIF1RX8_SLOT_MASK 0x003F /* AIF1RX8_SLOT - [5:0] */
3366 #define ARIZONA_AIF1RX8_SLOT_SHIFT 0 /* AIF1RX8_SLOT - [5:0] */
3367 #define ARIZONA_AIF1RX8_SLOT_WIDTH 6 /* AIF1RX8_SLOT - [5:0] */
3368 
3369 /*
3370  * R1305 (0x519) - AIF1 Tx Enables
3371  */
3372 #define ARIZONA_AIF1TX8_ENA 0x0080 /* AIF1TX8_ENA */
3373 #define ARIZONA_AIF1TX8_ENA_MASK 0x0080 /* AIF1TX8_ENA */
3374 #define ARIZONA_AIF1TX8_ENA_SHIFT 7 /* AIF1TX8_ENA */
3375 #define ARIZONA_AIF1TX8_ENA_WIDTH 1 /* AIF1TX8_ENA */
3376 #define ARIZONA_AIF1TX7_ENA 0x0040 /* AIF1TX7_ENA */
3377 #define ARIZONA_AIF1TX7_ENA_MASK 0x0040 /* AIF1TX7_ENA */
3378 #define ARIZONA_AIF1TX7_ENA_SHIFT 6 /* AIF1TX7_ENA */
3379 #define ARIZONA_AIF1TX7_ENA_WIDTH 1 /* AIF1TX7_ENA */
3380 #define ARIZONA_AIF1TX6_ENA 0x0020 /* AIF1TX6_ENA */
3381 #define ARIZONA_AIF1TX6_ENA_MASK 0x0020 /* AIF1TX6_ENA */
3382 #define ARIZONA_AIF1TX6_ENA_SHIFT 5 /* AIF1TX6_ENA */
3383 #define ARIZONA_AIF1TX6_ENA_WIDTH 1 /* AIF1TX6_ENA */
3384 #define ARIZONA_AIF1TX5_ENA 0x0010 /* AIF1TX5_ENA */
3385 #define ARIZONA_AIF1TX5_ENA_MASK 0x0010 /* AIF1TX5_ENA */
3386 #define ARIZONA_AIF1TX5_ENA_SHIFT 4 /* AIF1TX5_ENA */
3387 #define ARIZONA_AIF1TX5_ENA_WIDTH 1 /* AIF1TX5_ENA */
3388 #define ARIZONA_AIF1TX4_ENA 0x0008 /* AIF1TX4_ENA */
3389 #define ARIZONA_AIF1TX4_ENA_MASK 0x0008 /* AIF1TX4_ENA */
3390 #define ARIZONA_AIF1TX4_ENA_SHIFT 3 /* AIF1TX4_ENA */
3391 #define ARIZONA_AIF1TX4_ENA_WIDTH 1 /* AIF1TX4_ENA */
3392 #define ARIZONA_AIF1TX3_ENA 0x0004 /* AIF1TX3_ENA */
3393 #define ARIZONA_AIF1TX3_ENA_MASK 0x0004 /* AIF1TX3_ENA */
3394 #define ARIZONA_AIF1TX3_ENA_SHIFT 2 /* AIF1TX3_ENA */
3395 #define ARIZONA_AIF1TX3_ENA_WIDTH 1 /* AIF1TX3_ENA */
3396 #define ARIZONA_AIF1TX2_ENA 0x0002 /* AIF1TX2_ENA */
3397 #define ARIZONA_AIF1TX2_ENA_MASK 0x0002 /* AIF1TX2_ENA */
3398 #define ARIZONA_AIF1TX2_ENA_SHIFT 1 /* AIF1TX2_ENA */
3399 #define ARIZONA_AIF1TX2_ENA_WIDTH 1 /* AIF1TX2_ENA */
3400 #define ARIZONA_AIF1TX1_ENA 0x0001 /* AIF1TX1_ENA */
3401 #define ARIZONA_AIF1TX1_ENA_MASK 0x0001 /* AIF1TX1_ENA */
3402 #define ARIZONA_AIF1TX1_ENA_SHIFT 0 /* AIF1TX1_ENA */
3403 #define ARIZONA_AIF1TX1_ENA_WIDTH 1 /* AIF1TX1_ENA */
3404 
3405 /*
3406  * R1306 (0x51A) - AIF1 Rx Enables
3407  */
3408 #define ARIZONA_AIF1RX8_ENA 0x0080 /* AIF1RX8_ENA */
3409 #define ARIZONA_AIF1RX8_ENA_MASK 0x0080 /* AIF1RX8_ENA */
3410 #define ARIZONA_AIF1RX8_ENA_SHIFT 7 /* AIF1RX8_ENA */
3411 #define ARIZONA_AIF1RX8_ENA_WIDTH 1 /* AIF1RX8_ENA */
3412 #define ARIZONA_AIF1RX7_ENA 0x0040 /* AIF1RX7_ENA */
3413 #define ARIZONA_AIF1RX7_ENA_MASK 0x0040 /* AIF1RX7_ENA */
3414 #define ARIZONA_AIF1RX7_ENA_SHIFT 6 /* AIF1RX7_ENA */
3415 #define ARIZONA_AIF1RX7_ENA_WIDTH 1 /* AIF1RX7_ENA */
3416 #define ARIZONA_AIF1RX6_ENA 0x0020 /* AIF1RX6_ENA */
3417 #define ARIZONA_AIF1RX6_ENA_MASK 0x0020 /* AIF1RX6_ENA */
3418 #define ARIZONA_AIF1RX6_ENA_SHIFT 5 /* AIF1RX6_ENA */
3419 #define ARIZONA_AIF1RX6_ENA_WIDTH 1 /* AIF1RX6_ENA */
3420 #define ARIZONA_AIF1RX5_ENA 0x0010 /* AIF1RX5_ENA */
3421 #define ARIZONA_AIF1RX5_ENA_MASK 0x0010 /* AIF1RX5_ENA */
3422 #define ARIZONA_AIF1RX5_ENA_SHIFT 4 /* AIF1RX5_ENA */
3423 #define ARIZONA_AIF1RX5_ENA_WIDTH 1 /* AIF1RX5_ENA */
3424 #define ARIZONA_AIF1RX4_ENA 0x0008 /* AIF1RX4_ENA */
3425 #define ARIZONA_AIF1RX4_ENA_MASK 0x0008 /* AIF1RX4_ENA */
3426 #define ARIZONA_AIF1RX4_ENA_SHIFT 3 /* AIF1RX4_ENA */
3427 #define ARIZONA_AIF1RX4_ENA_WIDTH 1 /* AIF1RX4_ENA */
3428 #define ARIZONA_AIF1RX3_ENA 0x0004 /* AIF1RX3_ENA */
3429 #define ARIZONA_AIF1RX3_ENA_MASK 0x0004 /* AIF1RX3_ENA */
3430 #define ARIZONA_AIF1RX3_ENA_SHIFT 2 /* AIF1RX3_ENA */
3431 #define ARIZONA_AIF1RX3_ENA_WIDTH 1 /* AIF1RX3_ENA */
3432 #define ARIZONA_AIF1RX2_ENA 0x0002 /* AIF1RX2_ENA */
3433 #define ARIZONA_AIF1RX2_ENA_MASK 0x0002 /* AIF1RX2_ENA */
3434 #define ARIZONA_AIF1RX2_ENA_SHIFT 1 /* AIF1RX2_ENA */
3435 #define ARIZONA_AIF1RX2_ENA_WIDTH 1 /* AIF1RX2_ENA */
3436 #define ARIZONA_AIF1RX1_ENA 0x0001 /* AIF1RX1_ENA */
3437 #define ARIZONA_AIF1RX1_ENA_MASK 0x0001 /* AIF1RX1_ENA */
3438 #define ARIZONA_AIF1RX1_ENA_SHIFT 0 /* AIF1RX1_ENA */
3439 #define ARIZONA_AIF1RX1_ENA_WIDTH 1 /* AIF1RX1_ENA */
3440 
3441 /*
3442  * R1307 (0x51B) - AIF1 Force Write
3443  */
3444 #define ARIZONA_AIF1_FRC_WR 0x0001 /* AIF1_FRC_WR */
3445 #define ARIZONA_AIF1_FRC_WR_MASK 0x0001 /* AIF1_FRC_WR */
3446 #define ARIZONA_AIF1_FRC_WR_SHIFT 0 /* AIF1_FRC_WR */
3447 #define ARIZONA_AIF1_FRC_WR_WIDTH 1 /* AIF1_FRC_WR */
3448 
3449 /*
3450  * R1344 (0x540) - AIF2 BCLK Ctrl
3451  */
3452 #define ARIZONA_AIF2_BCLK_INV 0x0080 /* AIF2_BCLK_INV */
3453 #define ARIZONA_AIF2_BCLK_INV_MASK 0x0080 /* AIF2_BCLK_INV */
3454 #define ARIZONA_AIF2_BCLK_INV_SHIFT 7 /* AIF2_BCLK_INV */
3455 #define ARIZONA_AIF2_BCLK_INV_WIDTH 1 /* AIF2_BCLK_INV */
3456 #define ARIZONA_AIF2_BCLK_FRC 0x0040 /* AIF2_BCLK_FRC */
3457 #define ARIZONA_AIF2_BCLK_FRC_MASK 0x0040 /* AIF2_BCLK_FRC */
3458 #define ARIZONA_AIF2_BCLK_FRC_SHIFT 6 /* AIF2_BCLK_FRC */
3459 #define ARIZONA_AIF2_BCLK_FRC_WIDTH 1 /* AIF2_BCLK_FRC */
3460 #define ARIZONA_AIF2_BCLK_MSTR 0x0020 /* AIF2_BCLK_MSTR */
3461 #define ARIZONA_AIF2_BCLK_MSTR_MASK 0x0020 /* AIF2_BCLK_MSTR */
3462 #define ARIZONA_AIF2_BCLK_MSTR_SHIFT 5 /* AIF2_BCLK_MSTR */
3463 #define ARIZONA_AIF2_BCLK_MSTR_WIDTH 1 /* AIF2_BCLK_MSTR */
3464 #define ARIZONA_AIF2_BCLK_FREQ_MASK 0x001F /* AIF2_BCLK_FREQ - [4:0] */
3465 #define ARIZONA_AIF2_BCLK_FREQ_SHIFT 0 /* AIF2_BCLK_FREQ - [4:0] */
3466 #define ARIZONA_AIF2_BCLK_FREQ_WIDTH 5 /* AIF2_BCLK_FREQ - [4:0] */
3467 
3468 /*
3469  * R1345 (0x541) - AIF2 Tx Pin Ctrl
3470  */
3471 #define ARIZONA_AIF2TX_DAT_TRI 0x0020 /* AIF2TX_DAT_TRI */
3472 #define ARIZONA_AIF2TX_DAT_TRI_MASK 0x0020 /* AIF2TX_DAT_TRI */
3473 #define ARIZONA_AIF2TX_DAT_TRI_SHIFT 5 /* AIF2TX_DAT_TRI */
3474 #define ARIZONA_AIF2TX_DAT_TRI_WIDTH 1 /* AIF2TX_DAT_TRI */
3475 #define ARIZONA_AIF2TX_LRCLK_SRC 0x0008 /* AIF2TX_LRCLK_SRC */
3476 #define ARIZONA_AIF2TX_LRCLK_SRC_MASK 0x0008 /* AIF2TX_LRCLK_SRC */
3477 #define ARIZONA_AIF2TX_LRCLK_SRC_SHIFT 3 /* AIF2TX_LRCLK_SRC */
3478 #define ARIZONA_AIF2TX_LRCLK_SRC_WIDTH 1 /* AIF2TX_LRCLK_SRC */
3479 #define ARIZONA_AIF2TX_LRCLK_INV 0x0004 /* AIF2TX_LRCLK_INV */
3480 #define ARIZONA_AIF2TX_LRCLK_INV_MASK 0x0004 /* AIF2TX_LRCLK_INV */
3481 #define ARIZONA_AIF2TX_LRCLK_INV_SHIFT 2 /* AIF2TX_LRCLK_INV */
3482 #define ARIZONA_AIF2TX_LRCLK_INV_WIDTH 1 /* AIF2TX_LRCLK_INV */
3483 #define ARIZONA_AIF2TX_LRCLK_FRC 0x0002 /* AIF2TX_LRCLK_FRC */
3484 #define ARIZONA_AIF2TX_LRCLK_FRC_MASK 0x0002 /* AIF2TX_LRCLK_FRC */
3485 #define ARIZONA_AIF2TX_LRCLK_FRC_SHIFT 1 /* AIF2TX_LRCLK_FRC */
3486 #define ARIZONA_AIF2TX_LRCLK_FRC_WIDTH 1 /* AIF2TX_LRCLK_FRC */
3487 #define ARIZONA_AIF2TX_LRCLK_MSTR 0x0001 /* AIF2TX_LRCLK_MSTR */
3488 #define ARIZONA_AIF2TX_LRCLK_MSTR_MASK 0x0001 /* AIF2TX_LRCLK_MSTR */
3489 #define ARIZONA_AIF2TX_LRCLK_MSTR_SHIFT 0 /* AIF2TX_LRCLK_MSTR */
3490 #define ARIZONA_AIF2TX_LRCLK_MSTR_WIDTH 1 /* AIF2TX_LRCLK_MSTR */
3491 
3492 /*
3493  * R1346 (0x542) - AIF2 Rx Pin Ctrl
3494  */
3495 #define ARIZONA_AIF2RX_LRCLK_INV 0x0004 /* AIF2RX_LRCLK_INV */
3496 #define ARIZONA_AIF2RX_LRCLK_INV_MASK 0x0004 /* AIF2RX_LRCLK_INV */
3497 #define ARIZONA_AIF2RX_LRCLK_INV_SHIFT 2 /* AIF2RX_LRCLK_INV */
3498 #define ARIZONA_AIF2RX_LRCLK_INV_WIDTH 1 /* AIF2RX_LRCLK_INV */
3499 #define ARIZONA_AIF2RX_LRCLK_FRC 0x0002 /* AIF2RX_LRCLK_FRC */
3500 #define ARIZONA_AIF2RX_LRCLK_FRC_MASK 0x0002 /* AIF2RX_LRCLK_FRC */
3501 #define ARIZONA_AIF2RX_LRCLK_FRC_SHIFT 1 /* AIF2RX_LRCLK_FRC */
3502 #define ARIZONA_AIF2RX_LRCLK_FRC_WIDTH 1 /* AIF2RX_LRCLK_FRC */
3503 #define ARIZONA_AIF2RX_LRCLK_MSTR 0x0001 /* AIF2RX_LRCLK_MSTR */
3504 #define ARIZONA_AIF2RX_LRCLK_MSTR_MASK 0x0001 /* AIF2RX_LRCLK_MSTR */
3505 #define ARIZONA_AIF2RX_LRCLK_MSTR_SHIFT 0 /* AIF2RX_LRCLK_MSTR */
3506 #define ARIZONA_AIF2RX_LRCLK_MSTR_WIDTH 1 /* AIF2RX_LRCLK_MSTR */
3507 
3508 /*
3509  * R1347 (0x543) - AIF2 Rate Ctrl
3510  */
3511 #define ARIZONA_AIF2_RATE_MASK 0x7800 /* AIF2_RATE - [14:11] */
3512 #define ARIZONA_AIF2_RATE_SHIFT 11 /* AIF2_RATE - [14:11] */
3513 #define ARIZONA_AIF2_RATE_WIDTH 4 /* AIF2_RATE - [14:11] */
3514 #define ARIZONA_AIF2_TRI 0x0040 /* AIF2_TRI */
3515 #define ARIZONA_AIF2_TRI_MASK 0x0040 /* AIF2_TRI */
3516 #define ARIZONA_AIF2_TRI_SHIFT 6 /* AIF2_TRI */
3517 #define ARIZONA_AIF2_TRI_WIDTH 1 /* AIF2_TRI */
3518 
3519 /*
3520  * R1348 (0x544) - AIF2 Format
3521  */
3522 #define ARIZONA_AIF2_FMT_MASK 0x0007 /* AIF2_FMT - [2:0] */
3523 #define ARIZONA_AIF2_FMT_SHIFT 0 /* AIF2_FMT - [2:0] */
3524 #define ARIZONA_AIF2_FMT_WIDTH 3 /* AIF2_FMT - [2:0] */
3525 
3526 /*
3527  * R1349 (0x545) - AIF2 Tx BCLK Rate
3528  */
3529 #define ARIZONA_AIF2TX_BCPF_MASK 0x1FFF /* AIF2TX_BCPF - [12:0] */
3530 #define ARIZONA_AIF2TX_BCPF_SHIFT 0 /* AIF2TX_BCPF - [12:0] */
3531 #define ARIZONA_AIF2TX_BCPF_WIDTH 13 /* AIF2TX_BCPF - [12:0] */
3532 
3533 /*
3534  * R1350 (0x546) - AIF2 Rx BCLK Rate
3535  */
3536 #define ARIZONA_AIF2RX_BCPF_MASK 0x1FFF /* AIF2RX_BCPF - [12:0] */
3537 #define ARIZONA_AIF2RX_BCPF_SHIFT 0 /* AIF2RX_BCPF - [12:0] */
3538 #define ARIZONA_AIF2RX_BCPF_WIDTH 13 /* AIF2RX_BCPF - [12:0] */
3539 
3540 /*
3541  * R1351 (0x547) - AIF2 Frame Ctrl 1
3542  */
3543 #define ARIZONA_AIF2TX_WL_MASK 0x3F00 /* AIF2TX_WL - [13:8] */
3544 #define ARIZONA_AIF2TX_WL_SHIFT 8 /* AIF2TX_WL - [13:8] */
3545 #define ARIZONA_AIF2TX_WL_WIDTH 6 /* AIF2TX_WL - [13:8] */
3546 #define ARIZONA_AIF2TX_SLOT_LEN_MASK 0x00FF /* AIF2TX_SLOT_LEN - [7:0] */
3547 #define ARIZONA_AIF2TX_SLOT_LEN_SHIFT 0 /* AIF2TX_SLOT_LEN - [7:0] */
3548 #define ARIZONA_AIF2TX_SLOT_LEN_WIDTH 8 /* AIF2TX_SLOT_LEN - [7:0] */
3549 
3550 /*
3551  * R1352 (0x548) - AIF2 Frame Ctrl 2
3552  */
3553 #define ARIZONA_AIF2RX_WL_MASK 0x3F00 /* AIF2RX_WL - [13:8] */
3554 #define ARIZONA_AIF2RX_WL_SHIFT 8 /* AIF2RX_WL - [13:8] */
3555 #define ARIZONA_AIF2RX_WL_WIDTH 6 /* AIF2RX_WL - [13:8] */
3556 #define ARIZONA_AIF2RX_SLOT_LEN_MASK 0x00FF /* AIF2RX_SLOT_LEN - [7:0] */
3557 #define ARIZONA_AIF2RX_SLOT_LEN_SHIFT 0 /* AIF2RX_SLOT_LEN - [7:0] */
3558 #define ARIZONA_AIF2RX_SLOT_LEN_WIDTH 8 /* AIF2RX_SLOT_LEN - [7:0] */
3559 
3560 /*
3561  * R1353 (0x549) - AIF2 Frame Ctrl 3
3562  */
3563 #define ARIZONA_AIF2TX1_SLOT_MASK 0x003F /* AIF2TX1_SLOT - [5:0] */
3564 #define ARIZONA_AIF2TX1_SLOT_SHIFT 0 /* AIF2TX1_SLOT - [5:0] */
3565 #define ARIZONA_AIF2TX1_SLOT_WIDTH 6 /* AIF2TX1_SLOT - [5:0] */
3566 
3567 /*
3568  * R1354 (0x54A) - AIF2 Frame Ctrl 4
3569  */
3570 #define ARIZONA_AIF2TX2_SLOT_MASK 0x003F /* AIF2TX2_SLOT - [5:0] */
3571 #define ARIZONA_AIF2TX2_SLOT_SHIFT 0 /* AIF2TX2_SLOT - [5:0] */
3572 #define ARIZONA_AIF2TX2_SLOT_WIDTH 6 /* AIF2TX2_SLOT - [5:0] */
3573 
3574 /*
3575  * R1361 (0x551) - AIF2 Frame Ctrl 11
3576  */
3577 #define ARIZONA_AIF2RX1_SLOT_MASK 0x003F /* AIF2RX1_SLOT - [5:0] */
3578 #define ARIZONA_AIF2RX1_SLOT_SHIFT 0 /* AIF2RX1_SLOT - [5:0] */
3579 #define ARIZONA_AIF2RX1_SLOT_WIDTH 6 /* AIF2RX1_SLOT - [5:0] */
3580 
3581 /*
3582  * R1362 (0x552) - AIF2 Frame Ctrl 12
3583  */
3584 #define ARIZONA_AIF2RX2_SLOT_MASK 0x003F /* AIF2RX2_SLOT - [5:0] */
3585 #define ARIZONA_AIF2RX2_SLOT_SHIFT 0 /* AIF2RX2_SLOT - [5:0] */
3586 #define ARIZONA_AIF2RX2_SLOT_WIDTH 6 /* AIF2RX2_SLOT - [5:0] */
3587 
3588 /*
3589  * R1369 (0x559) - AIF2 Tx Enables
3590  */
3591 #define ARIZONA_AIF2TX2_ENA 0x0002 /* AIF2TX2_ENA */
3592 #define ARIZONA_AIF2TX2_ENA_MASK 0x0002 /* AIF2TX2_ENA */
3593 #define ARIZONA_AIF2TX2_ENA_SHIFT 1 /* AIF2TX2_ENA */
3594 #define ARIZONA_AIF2TX2_ENA_WIDTH 1 /* AIF2TX2_ENA */
3595 #define ARIZONA_AIF2TX1_ENA 0x0001 /* AIF2TX1_ENA */
3596 #define ARIZONA_AIF2TX1_ENA_MASK 0x0001 /* AIF2TX1_ENA */
3597 #define ARIZONA_AIF2TX1_ENA_SHIFT 0 /* AIF2TX1_ENA */
3598 #define ARIZONA_AIF2TX1_ENA_WIDTH 1 /* AIF2TX1_ENA */
3599 
3600 /*
3601  * R1370 (0x55A) - AIF2 Rx Enables
3602  */
3603 #define ARIZONA_AIF2RX2_ENA 0x0002 /* AIF2RX2_ENA */
3604 #define ARIZONA_AIF2RX2_ENA_MASK 0x0002 /* AIF2RX2_ENA */
3605 #define ARIZONA_AIF2RX2_ENA_SHIFT 1 /* AIF2RX2_ENA */
3606 #define ARIZONA_AIF2RX2_ENA_WIDTH 1 /* AIF2RX2_ENA */
3607 #define ARIZONA_AIF2RX1_ENA 0x0001 /* AIF2RX1_ENA */
3608 #define ARIZONA_AIF2RX1_ENA_MASK 0x0001 /* AIF2RX1_ENA */
3609 #define ARIZONA_AIF2RX1_ENA_SHIFT 0 /* AIF2RX1_ENA */
3610 #define ARIZONA_AIF2RX1_ENA_WIDTH 1 /* AIF2RX1_ENA */
3611 
3612 /*
3613  * R1371 (0x55B) - AIF2 Force Write
3614  */
3615 #define ARIZONA_AIF2_FRC_WR 0x0001 /* AIF2_FRC_WR */
3616 #define ARIZONA_AIF2_FRC_WR_MASK 0x0001 /* AIF2_FRC_WR */
3617 #define ARIZONA_AIF2_FRC_WR_SHIFT 0 /* AIF2_FRC_WR */
3618 #define ARIZONA_AIF2_FRC_WR_WIDTH 1 /* AIF2_FRC_WR */
3619 
3620 /*
3621  * R1408 (0x580) - AIF3 BCLK Ctrl
3622  */
3623 #define ARIZONA_AIF3_BCLK_INV 0x0080 /* AIF3_BCLK_INV */
3624 #define ARIZONA_AIF3_BCLK_INV_MASK 0x0080 /* AIF3_BCLK_INV */
3625 #define ARIZONA_AIF3_BCLK_INV_SHIFT 7 /* AIF3_BCLK_INV */
3626 #define ARIZONA_AIF3_BCLK_INV_WIDTH 1 /* AIF3_BCLK_INV */
3627 #define ARIZONA_AIF3_BCLK_FRC 0x0040 /* AIF3_BCLK_FRC */
3628 #define ARIZONA_AIF3_BCLK_FRC_MASK 0x0040 /* AIF3_BCLK_FRC */
3629 #define ARIZONA_AIF3_BCLK_FRC_SHIFT 6 /* AIF3_BCLK_FRC */
3630 #define ARIZONA_AIF3_BCLK_FRC_WIDTH 1 /* AIF3_BCLK_FRC */
3631 #define ARIZONA_AIF3_BCLK_MSTR 0x0020 /* AIF3_BCLK_MSTR */
3632 #define ARIZONA_AIF3_BCLK_MSTR_MASK 0x0020 /* AIF3_BCLK_MSTR */
3633 #define ARIZONA_AIF3_BCLK_MSTR_SHIFT 5 /* AIF3_BCLK_MSTR */
3634 #define ARIZONA_AIF3_BCLK_MSTR_WIDTH 1 /* AIF3_BCLK_MSTR */
3635 #define ARIZONA_AIF3_BCLK_FREQ_MASK 0x001F /* AIF3_BCLK_FREQ - [4:0] */
3636 #define ARIZONA_AIF3_BCLK_FREQ_SHIFT 0 /* AIF3_BCLK_FREQ - [4:0] */
3637 #define ARIZONA_AIF3_BCLK_FREQ_WIDTH 5 /* AIF3_BCLK_FREQ - [4:0] */
3638 
3639 /*
3640  * R1409 (0x581) - AIF3 Tx Pin Ctrl
3641  */
3642 #define ARIZONA_AIF3TX_DAT_TRI 0x0020 /* AIF3TX_DAT_TRI */
3643 #define ARIZONA_AIF3TX_DAT_TRI_MASK 0x0020 /* AIF3TX_DAT_TRI */
3644 #define ARIZONA_AIF3TX_DAT_TRI_SHIFT 5 /* AIF3TX_DAT_TRI */
3645 #define ARIZONA_AIF3TX_DAT_TRI_WIDTH 1 /* AIF3TX_DAT_TRI */
3646 #define ARIZONA_AIF3TX_LRCLK_SRC 0x0008 /* AIF3TX_LRCLK_SRC */
3647 #define ARIZONA_AIF3TX_LRCLK_SRC_MASK 0x0008 /* AIF3TX_LRCLK_SRC */
3648 #define ARIZONA_AIF3TX_LRCLK_SRC_SHIFT 3 /* AIF3TX_LRCLK_SRC */
3649 #define ARIZONA_AIF3TX_LRCLK_SRC_WIDTH 1 /* AIF3TX_LRCLK_SRC */
3650 #define ARIZONA_AIF3TX_LRCLK_INV 0x0004 /* AIF3TX_LRCLK_INV */
3651 #define ARIZONA_AIF3TX_LRCLK_INV_MASK 0x0004 /* AIF3TX_LRCLK_INV */
3652 #define ARIZONA_AIF3TX_LRCLK_INV_SHIFT 2 /* AIF3TX_LRCLK_INV */
3653 #define ARIZONA_AIF3TX_LRCLK_INV_WIDTH 1 /* AIF3TX_LRCLK_INV */
3654 #define ARIZONA_AIF3TX_LRCLK_FRC 0x0002 /* AIF3TX_LRCLK_FRC */
3655 #define ARIZONA_AIF3TX_LRCLK_FRC_MASK 0x0002 /* AIF3TX_LRCLK_FRC */
3656 #define ARIZONA_AIF3TX_LRCLK_FRC_SHIFT 1 /* AIF3TX_LRCLK_FRC */
3657 #define ARIZONA_AIF3TX_LRCLK_FRC_WIDTH 1 /* AIF3TX_LRCLK_FRC */
3658 #define ARIZONA_AIF3TX_LRCLK_MSTR 0x0001 /* AIF3TX_LRCLK_MSTR */
3659 #define ARIZONA_AIF3TX_LRCLK_MSTR_MASK 0x0001 /* AIF3TX_LRCLK_MSTR */
3660 #define ARIZONA_AIF3TX_LRCLK_MSTR_SHIFT 0 /* AIF3TX_LRCLK_MSTR */
3661 #define ARIZONA_AIF3TX_LRCLK_MSTR_WIDTH 1 /* AIF3TX_LRCLK_MSTR */
3662 
3663 /*
3664  * R1410 (0x582) - AIF3 Rx Pin Ctrl
3665  */
3666 #define ARIZONA_AIF3RX_LRCLK_INV 0x0004 /* AIF3RX_LRCLK_INV */
3667 #define ARIZONA_AIF3RX_LRCLK_INV_MASK 0x0004 /* AIF3RX_LRCLK_INV */
3668 #define ARIZONA_AIF3RX_LRCLK_INV_SHIFT 2 /* AIF3RX_LRCLK_INV */
3669 #define ARIZONA_AIF3RX_LRCLK_INV_WIDTH 1 /* AIF3RX_LRCLK_INV */
3670 #define ARIZONA_AIF3RX_LRCLK_FRC 0x0002 /* AIF3RX_LRCLK_FRC */
3671 #define ARIZONA_AIF3RX_LRCLK_FRC_MASK 0x0002 /* AIF3RX_LRCLK_FRC */
3672 #define ARIZONA_AIF3RX_LRCLK_FRC_SHIFT 1 /* AIF3RX_LRCLK_FRC */
3673 #define ARIZONA_AIF3RX_LRCLK_FRC_WIDTH 1 /* AIF3RX_LRCLK_FRC */
3674 #define ARIZONA_AIF3RX_LRCLK_MSTR 0x0001 /* AIF3RX_LRCLK_MSTR */
3675 #define ARIZONA_AIF3RX_LRCLK_MSTR_MASK 0x0001 /* AIF3RX_LRCLK_MSTR */
3676 #define ARIZONA_AIF3RX_LRCLK_MSTR_SHIFT 0 /* AIF3RX_LRCLK_MSTR */
3677 #define ARIZONA_AIF3RX_LRCLK_MSTR_WIDTH 1 /* AIF3RX_LRCLK_MSTR */
3678 
3679 /*
3680  * R1411 (0x583) - AIF3 Rate Ctrl
3681  */
3682 #define ARIZONA_AIF3_RATE_MASK 0x7800 /* AIF3_RATE - [14:11] */
3683 #define ARIZONA_AIF3_RATE_SHIFT 11 /* AIF3_RATE - [14:11] */
3684 #define ARIZONA_AIF3_RATE_WIDTH 4 /* AIF3_RATE - [14:11] */
3685 #define ARIZONA_AIF3_TRI 0x0040 /* AIF3_TRI */
3686 #define ARIZONA_AIF3_TRI_MASK 0x0040 /* AIF3_TRI */
3687 #define ARIZONA_AIF3_TRI_SHIFT 6 /* AIF3_TRI */
3688 #define ARIZONA_AIF3_TRI_WIDTH 1 /* AIF3_TRI */
3689 
3690 /*
3691  * R1412 (0x584) - AIF3 Format
3692  */
3693 #define ARIZONA_AIF3_FMT_MASK 0x0007 /* AIF3_FMT - [2:0] */
3694 #define ARIZONA_AIF3_FMT_SHIFT 0 /* AIF3_FMT - [2:0] */
3695 #define ARIZONA_AIF3_FMT_WIDTH 3 /* AIF3_FMT - [2:0] */
3696 
3697 /*
3698  * R1413 (0x585) - AIF3 Tx BCLK Rate
3699  */
3700 #define ARIZONA_AIF3TX_BCPF_MASK 0x1FFF /* AIF3TX_BCPF - [12:0] */
3701 #define ARIZONA_AIF3TX_BCPF_SHIFT 0 /* AIF3TX_BCPF - [12:0] */
3702 #define ARIZONA_AIF3TX_BCPF_WIDTH 13 /* AIF3TX_BCPF - [12:0] */
3703 
3704 /*
3705  * R1414 (0x586) - AIF3 Rx BCLK Rate
3706  */
3707 #define ARIZONA_AIF3RX_BCPF_MASK 0x1FFF /* AIF3RX_BCPF - [12:0] */
3708 #define ARIZONA_AIF3RX_BCPF_SHIFT 0 /* AIF3RX_BCPF - [12:0] */
3709 #define ARIZONA_AIF3RX_BCPF_WIDTH 13 /* AIF3RX_BCPF - [12:0] */
3710 
3711 /*
3712  * R1415 (0x587) - AIF3 Frame Ctrl 1
3713  */
3714 #define ARIZONA_AIF3TX_WL_MASK 0x3F00 /* AIF3TX_WL - [13:8] */
3715 #define ARIZONA_AIF3TX_WL_SHIFT 8 /* AIF3TX_WL - [13:8] */
3716 #define ARIZONA_AIF3TX_WL_WIDTH 6 /* AIF3TX_WL - [13:8] */
3717 #define ARIZONA_AIF3TX_SLOT_LEN_MASK 0x00FF /* AIF3TX_SLOT_LEN - [7:0] */
3718 #define ARIZONA_AIF3TX_SLOT_LEN_SHIFT 0 /* AIF3TX_SLOT_LEN - [7:0] */
3719 #define ARIZONA_AIF3TX_SLOT_LEN_WIDTH 8 /* AIF3TX_SLOT_LEN - [7:0] */
3720 
3721 /*
3722  * R1416 (0x588) - AIF3 Frame Ctrl 2
3723  */
3724 #define ARIZONA_AIF3RX_WL_MASK 0x3F00 /* AIF3RX_WL - [13:8] */
3725 #define ARIZONA_AIF3RX_WL_SHIFT 8 /* AIF3RX_WL - [13:8] */
3726 #define ARIZONA_AIF3RX_WL_WIDTH 6 /* AIF3RX_WL - [13:8] */
3727 #define ARIZONA_AIF3RX_SLOT_LEN_MASK 0x00FF /* AIF3RX_SLOT_LEN - [7:0] */
3728 #define ARIZONA_AIF3RX_SLOT_LEN_SHIFT 0 /* AIF3RX_SLOT_LEN - [7:0] */
3729 #define ARIZONA_AIF3RX_SLOT_LEN_WIDTH 8 /* AIF3RX_SLOT_LEN - [7:0] */
3730 
3731 /*
3732  * R1417 (0x589) - AIF3 Frame Ctrl 3
3733  */
3734 #define ARIZONA_AIF3TX1_SLOT_MASK 0x003F /* AIF3TX1_SLOT - [5:0] */
3735 #define ARIZONA_AIF3TX1_SLOT_SHIFT 0 /* AIF3TX1_SLOT - [5:0] */
3736 #define ARIZONA_AIF3TX1_SLOT_WIDTH 6 /* AIF3TX1_SLOT - [5:0] */
3737 
3738 /*
3739  * R1418 (0x58A) - AIF3 Frame Ctrl 4
3740  */
3741 #define ARIZONA_AIF3TX2_SLOT_MASK 0x003F /* AIF3TX2_SLOT - [5:0] */
3742 #define ARIZONA_AIF3TX2_SLOT_SHIFT 0 /* AIF3TX2_SLOT - [5:0] */
3743 #define ARIZONA_AIF3TX2_SLOT_WIDTH 6 /* AIF3TX2_SLOT - [5:0] */
3744 
3745 /*
3746  * R1425 (0x591) - AIF3 Frame Ctrl 11
3747  */
3748 #define ARIZONA_AIF3RX1_SLOT_MASK 0x003F /* AIF3RX1_SLOT - [5:0] */
3749 #define ARIZONA_AIF3RX1_SLOT_SHIFT 0 /* AIF3RX1_SLOT - [5:0] */
3750 #define ARIZONA_AIF3RX1_SLOT_WIDTH 6 /* AIF3RX1_SLOT - [5:0] */
3751 
3752 /*
3753  * R1426 (0x592) - AIF3 Frame Ctrl 12
3754  */
3755 #define ARIZONA_AIF3RX2_SLOT_MASK 0x003F /* AIF3RX2_SLOT - [5:0] */
3756 #define ARIZONA_AIF3RX2_SLOT_SHIFT 0 /* AIF3RX2_SLOT - [5:0] */
3757 #define ARIZONA_AIF3RX2_SLOT_WIDTH 6 /* AIF3RX2_SLOT - [5:0] */
3758 
3759 /*
3760  * R1433 (0x599) - AIF3 Tx Enables
3761  */
3762 #define ARIZONA_AIF3TX2_ENA 0x0002 /* AIF3TX2_ENA */
3763 #define ARIZONA_AIF3TX2_ENA_MASK 0x0002 /* AIF3TX2_ENA */
3764 #define ARIZONA_AIF3TX2_ENA_SHIFT 1 /* AIF3TX2_ENA */
3765 #define ARIZONA_AIF3TX2_ENA_WIDTH 1 /* AIF3TX2_ENA */
3766 #define ARIZONA_AIF3TX1_ENA 0x0001 /* AIF3TX1_ENA */
3767 #define ARIZONA_AIF3TX1_ENA_MASK 0x0001 /* AIF3TX1_ENA */
3768 #define ARIZONA_AIF3TX1_ENA_SHIFT 0 /* AIF3TX1_ENA */
3769 #define ARIZONA_AIF3TX1_ENA_WIDTH 1 /* AIF3TX1_ENA */
3770 
3771 /*
3772  * R1434 (0x59A) - AIF3 Rx Enables
3773  */
3774 #define ARIZONA_AIF3RX2_ENA 0x0002 /* AIF3RX2_ENA */
3775 #define ARIZONA_AIF3RX2_ENA_MASK 0x0002 /* AIF3RX2_ENA */
3776 #define ARIZONA_AIF3RX2_ENA_SHIFT 1 /* AIF3RX2_ENA */
3777 #define ARIZONA_AIF3RX2_ENA_WIDTH 1 /* AIF3RX2_ENA */
3778 #define ARIZONA_AIF3RX1_ENA 0x0001 /* AIF3RX1_ENA */
3779 #define ARIZONA_AIF3RX1_ENA_MASK 0x0001 /* AIF3RX1_ENA */
3780 #define ARIZONA_AIF3RX1_ENA_SHIFT 0 /* AIF3RX1_ENA */
3781 #define ARIZONA_AIF3RX1_ENA_WIDTH 1 /* AIF3RX1_ENA */
3782 
3783 /*
3784  * R1435 (0x59B) - AIF3 Force Write
3785  */
3786 #define ARIZONA_AIF3_FRC_WR 0x0001 /* AIF3_FRC_WR */
3787 #define ARIZONA_AIF3_FRC_WR_MASK 0x0001 /* AIF3_FRC_WR */
3788 #define ARIZONA_AIF3_FRC_WR_SHIFT 0 /* AIF3_FRC_WR */
3789 #define ARIZONA_AIF3_FRC_WR_WIDTH 1 /* AIF3_FRC_WR */
3790 
3791 /*
3792  * R1507 (0x5E3) - SLIMbus Framer Ref Gear
3793  */
3794 #define ARIZONA_SLIMCLK_SRC 0x0010 /* SLIMCLK_SRC */
3795 #define ARIZONA_SLIMCLK_SRC_MASK 0x0010 /* SLIMCLK_SRC */
3796 #define ARIZONA_SLIMCLK_SRC_SHIFT 4 /* SLIMCLK_SRC */
3797 #define ARIZONA_SLIMCLK_SRC_WIDTH 1 /* SLIMCLK_SRC */
3798 #define ARIZONA_FRAMER_REF_GEAR_MASK 0x000F /* FRAMER_REF_GEAR - [3:0] */
3799 #define ARIZONA_FRAMER_REF_GEAR_SHIFT 0 /* FRAMER_REF_GEAR - [3:0] */
3800 #define ARIZONA_FRAMER_REF_GEAR_WIDTH 4 /* FRAMER_REF_GEAR - [3:0] */
3801 
3802 /*
3803  * R1509 (0x5E5) - SLIMbus Rates 1
3804  */
3805 #define ARIZONA_SLIMRX2_RATE_MASK 0x7800 /* SLIMRX2_RATE - [14:11] */
3806 #define ARIZONA_SLIMRX2_RATE_SHIFT 11 /* SLIMRX2_RATE - [14:11] */
3807 #define ARIZONA_SLIMRX2_RATE_WIDTH 4 /* SLIMRX2_RATE - [14:11] */
3808 #define ARIZONA_SLIMRX1_RATE_MASK 0x0078 /* SLIMRX1_RATE - [6:3] */
3809 #define ARIZONA_SLIMRX1_RATE_SHIFT 3 /* SLIMRX1_RATE - [6:3] */
3810 #define ARIZONA_SLIMRX1_RATE_WIDTH 4 /* SLIMRX1_RATE - [6:3] */
3811 
3812 /*
3813  * R1510 (0x5E6) - SLIMbus Rates 2
3814  */
3815 #define ARIZONA_SLIMRX4_RATE_MASK 0x7800 /* SLIMRX4_RATE - [14:11] */
3816 #define ARIZONA_SLIMRX4_RATE_SHIFT 11 /* SLIMRX4_RATE - [14:11] */
3817 #define ARIZONA_SLIMRX4_RATE_WIDTH 4 /* SLIMRX4_RATE - [14:11] */
3818 #define ARIZONA_SLIMRX3_RATE_MASK 0x0078 /* SLIMRX3_RATE - [6:3] */
3819 #define ARIZONA_SLIMRX3_RATE_SHIFT 3 /* SLIMRX3_RATE - [6:3] */
3820 #define ARIZONA_SLIMRX3_RATE_WIDTH 4 /* SLIMRX3_RATE - [6:3] */
3821 
3822 /*
3823  * R1511 (0x5E7) - SLIMbus Rates 3
3824  */
3825 #define ARIZONA_SLIMRX6_RATE_MASK 0x7800 /* SLIMRX6_RATE - [14:11] */
3826 #define ARIZONA_SLIMRX6_RATE_SHIFT 11 /* SLIMRX6_RATE - [14:11] */
3827 #define ARIZONA_SLIMRX6_RATE_WIDTH 4 /* SLIMRX6_RATE - [14:11] */
3828 #define ARIZONA_SLIMRX5_RATE_MASK 0x0078 /* SLIMRX5_RATE - [6:3] */
3829 #define ARIZONA_SLIMRX5_RATE_SHIFT 3 /* SLIMRX5_RATE - [6:3] */
3830 #define ARIZONA_SLIMRX5_RATE_WIDTH 4 /* SLIMRX5_RATE - [6:3] */
3831 
3832 /*
3833  * R1512 (0x5E8) - SLIMbus Rates 4
3834  */
3835 #define ARIZONA_SLIMRX8_RATE_MASK 0x7800 /* SLIMRX8_RATE - [14:11] */
3836 #define ARIZONA_SLIMRX8_RATE_SHIFT 11 /* SLIMRX8_RATE - [14:11] */
3837 #define ARIZONA_SLIMRX8_RATE_WIDTH 4 /* SLIMRX8_RATE - [14:11] */
3838 #define ARIZONA_SLIMRX7_RATE_MASK 0x0078 /* SLIMRX7_RATE - [6:3] */
3839 #define ARIZONA_SLIMRX7_RATE_SHIFT 3 /* SLIMRX7_RATE - [6:3] */
3840 #define ARIZONA_SLIMRX7_RATE_WIDTH 4 /* SLIMRX7_RATE - [6:3] */
3841 
3842 /*
3843  * R1513 (0x5E9) - SLIMbus Rates 5
3844  */
3845 #define ARIZONA_SLIMTX2_RATE_MASK 0x7800 /* SLIMTX2_RATE - [14:11] */
3846 #define ARIZONA_SLIMTX2_RATE_SHIFT 11 /* SLIMTX2_RATE - [14:11] */
3847 #define ARIZONA_SLIMTX2_RATE_WIDTH 4 /* SLIMTX2_RATE - [14:11] */
3848 #define ARIZONA_SLIMTX1_RATE_MASK 0x0078 /* SLIMTX1_RATE - [6:3] */
3849 #define ARIZONA_SLIMTX1_RATE_SHIFT 3 /* SLIMTX1_RATE - [6:3] */
3850 #define ARIZONA_SLIMTX1_RATE_WIDTH 4 /* SLIMTX1_RATE - [6:3] */
3851 
3852 /*
3853  * R1514 (0x5EA) - SLIMbus Rates 6
3854  */
3855 #define ARIZONA_SLIMTX4_RATE_MASK 0x7800 /* SLIMTX4_RATE - [14:11] */
3856 #define ARIZONA_SLIMTX4_RATE_SHIFT 11 /* SLIMTX4_RATE - [14:11] */
3857 #define ARIZONA_SLIMTX4_RATE_WIDTH 4 /* SLIMTX4_RATE - [14:11] */
3858 #define ARIZONA_SLIMTX3_RATE_MASK 0x0078 /* SLIMTX3_RATE - [6:3] */
3859 #define ARIZONA_SLIMTX3_RATE_SHIFT 3 /* SLIMTX3_RATE - [6:3] */
3860 #define ARIZONA_SLIMTX3_RATE_WIDTH 4 /* SLIMTX3_RATE - [6:3] */
3861 
3862 /*
3863  * R1515 (0x5EB) - SLIMbus Rates 7
3864  */
3865 #define ARIZONA_SLIMTX6_RATE_MASK 0x7800 /* SLIMTX6_RATE - [14:11] */
3866 #define ARIZONA_SLIMTX6_RATE_SHIFT 11 /* SLIMTX6_RATE - [14:11] */
3867 #define ARIZONA_SLIMTX6_RATE_WIDTH 4 /* SLIMTX6_RATE - [14:11] */
3868 #define ARIZONA_SLIMTX5_RATE_MASK 0x0078 /* SLIMTX5_RATE - [6:3] */
3869 #define ARIZONA_SLIMTX5_RATE_SHIFT 3 /* SLIMTX5_RATE - [6:3] */
3870 #define ARIZONA_SLIMTX5_RATE_WIDTH 4 /* SLIMTX5_RATE - [6:3] */
3871 
3872 /*
3873  * R1516 (0x5EC) - SLIMbus Rates 8
3874  */
3875 #define ARIZONA_SLIMTX8_RATE_MASK 0x7800 /* SLIMTX8_RATE - [14:11] */
3876 #define ARIZONA_SLIMTX8_RATE_SHIFT 11 /* SLIMTX8_RATE - [14:11] */
3877 #define ARIZONA_SLIMTX8_RATE_WIDTH 4 /* SLIMTX8_RATE - [14:11] */
3878 #define ARIZONA_SLIMTX7_RATE_MASK 0x0078 /* SLIMTX7_RATE - [6:3] */
3879 #define ARIZONA_SLIMTX7_RATE_SHIFT 3 /* SLIMTX7_RATE - [6:3] */
3880 #define ARIZONA_SLIMTX7_RATE_WIDTH 4 /* SLIMTX7_RATE - [6:3] */
3881 
3882 /*
3883  * R1525 (0x5F5) - SLIMbus RX Channel Enable
3884  */
3885 #define ARIZONA_SLIMRX8_ENA 0x0080 /* SLIMRX8_ENA */
3886 #define ARIZONA_SLIMRX8_ENA_MASK 0x0080 /* SLIMRX8_ENA */
3887 #define ARIZONA_SLIMRX8_ENA_SHIFT 7 /* SLIMRX8_ENA */
3888 #define ARIZONA_SLIMRX8_ENA_WIDTH 1 /* SLIMRX8_ENA */
3889 #define ARIZONA_SLIMRX7_ENA 0x0040 /* SLIMRX7_ENA */
3890 #define ARIZONA_SLIMRX7_ENA_MASK 0x0040 /* SLIMRX7_ENA */
3891 #define ARIZONA_SLIMRX7_ENA_SHIFT 6 /* SLIMRX7_ENA */
3892 #define ARIZONA_SLIMRX7_ENA_WIDTH 1 /* SLIMRX7_ENA */
3893 #define ARIZONA_SLIMRX6_ENA 0x0020 /* SLIMRX6_ENA */
3894 #define ARIZONA_SLIMRX6_ENA_MASK 0x0020 /* SLIMRX6_ENA */
3895 #define ARIZONA_SLIMRX6_ENA_SHIFT 5 /* SLIMRX6_ENA */
3896 #define ARIZONA_SLIMRX6_ENA_WIDTH 1 /* SLIMRX6_ENA */
3897 #define ARIZONA_SLIMRX5_ENA 0x0010 /* SLIMRX5_ENA */
3898 #define ARIZONA_SLIMRX5_ENA_MASK 0x0010 /* SLIMRX5_ENA */
3899 #define ARIZONA_SLIMRX5_ENA_SHIFT 4 /* SLIMRX5_ENA */
3900 #define ARIZONA_SLIMRX5_ENA_WIDTH 1 /* SLIMRX5_ENA */
3901 #define ARIZONA_SLIMRX4_ENA 0x0008 /* SLIMRX4_ENA */
3902 #define ARIZONA_SLIMRX4_ENA_MASK 0x0008 /* SLIMRX4_ENA */
3903 #define ARIZONA_SLIMRX4_ENA_SHIFT 3 /* SLIMRX4_ENA */
3904 #define ARIZONA_SLIMRX4_ENA_WIDTH 1 /* SLIMRX4_ENA */
3905 #define ARIZONA_SLIMRX3_ENA 0x0004 /* SLIMRX3_ENA */
3906 #define ARIZONA_SLIMRX3_ENA_MASK 0x0004 /* SLIMRX3_ENA */
3907 #define ARIZONA_SLIMRX3_ENA_SHIFT 2 /* SLIMRX3_ENA */
3908 #define ARIZONA_SLIMRX3_ENA_WIDTH 1 /* SLIMRX3_ENA */
3909 #define ARIZONA_SLIMRX2_ENA 0x0002 /* SLIMRX2_ENA */
3910 #define ARIZONA_SLIMRX2_ENA_MASK 0x0002 /* SLIMRX2_ENA */
3911 #define ARIZONA_SLIMRX2_ENA_SHIFT 1 /* SLIMRX2_ENA */
3912 #define ARIZONA_SLIMRX2_ENA_WIDTH 1 /* SLIMRX2_ENA */
3913 #define ARIZONA_SLIMRX1_ENA 0x0001 /* SLIMRX1_ENA */
3914 #define ARIZONA_SLIMRX1_ENA_MASK 0x0001 /* SLIMRX1_ENA */
3915 #define ARIZONA_SLIMRX1_ENA_SHIFT 0 /* SLIMRX1_ENA */
3916 #define ARIZONA_SLIMRX1_ENA_WIDTH 1 /* SLIMRX1_ENA */
3917 
3918 /*
3919  * R1526 (0x5F6) - SLIMbus TX Channel Enable
3920  */
3921 #define ARIZONA_SLIMTX8_ENA 0x0080 /* SLIMTX8_ENA */
3922 #define ARIZONA_SLIMTX8_ENA_MASK 0x0080 /* SLIMTX8_ENA */
3923 #define ARIZONA_SLIMTX8_ENA_SHIFT 7 /* SLIMTX8_ENA */
3924 #define ARIZONA_SLIMTX8_ENA_WIDTH 1 /* SLIMTX8_ENA */
3925 #define ARIZONA_SLIMTX7_ENA 0x0040 /* SLIMTX7_ENA */
3926 #define ARIZONA_SLIMTX7_ENA_MASK 0x0040 /* SLIMTX7_ENA */
3927 #define ARIZONA_SLIMTX7_ENA_SHIFT 6 /* SLIMTX7_ENA */
3928 #define ARIZONA_SLIMTX7_ENA_WIDTH 1 /* SLIMTX7_ENA */
3929 #define ARIZONA_SLIMTX6_ENA 0x0020 /* SLIMTX6_ENA */
3930 #define ARIZONA_SLIMTX6_ENA_MASK 0x0020 /* SLIMTX6_ENA */
3931 #define ARIZONA_SLIMTX6_ENA_SHIFT 5 /* SLIMTX6_ENA */
3932 #define ARIZONA_SLIMTX6_ENA_WIDTH 1 /* SLIMTX6_ENA */
3933 #define ARIZONA_SLIMTX5_ENA 0x0010 /* SLIMTX5_ENA */
3934 #define ARIZONA_SLIMTX5_ENA_MASK 0x0010 /* SLIMTX5_ENA */
3935 #define ARIZONA_SLIMTX5_ENA_SHIFT 4 /* SLIMTX5_ENA */
3936 #define ARIZONA_SLIMTX5_ENA_WIDTH 1 /* SLIMTX5_ENA */
3937 #define ARIZONA_SLIMTX4_ENA 0x0008 /* SLIMTX4_ENA */
3938 #define ARIZONA_SLIMTX4_ENA_MASK 0x0008 /* SLIMTX4_ENA */
3939 #define ARIZONA_SLIMTX4_ENA_SHIFT 3 /* SLIMTX4_ENA */
3940 #define ARIZONA_SLIMTX4_ENA_WIDTH 1 /* SLIMTX4_ENA */
3941 #define ARIZONA_SLIMTX3_ENA 0x0004 /* SLIMTX3_ENA */
3942 #define ARIZONA_SLIMTX3_ENA_MASK 0x0004 /* SLIMTX3_ENA */
3943 #define ARIZONA_SLIMTX3_ENA_SHIFT 2 /* SLIMTX3_ENA */
3944 #define ARIZONA_SLIMTX3_ENA_WIDTH 1 /* SLIMTX3_ENA */
3945 #define ARIZONA_SLIMTX2_ENA 0x0002 /* SLIMTX2_ENA */
3946 #define ARIZONA_SLIMTX2_ENA_MASK 0x0002 /* SLIMTX2_ENA */
3947 #define ARIZONA_SLIMTX2_ENA_SHIFT 1 /* SLIMTX2_ENA */
3948 #define ARIZONA_SLIMTX2_ENA_WIDTH 1 /* SLIMTX2_ENA */
3949 #define ARIZONA_SLIMTX1_ENA 0x0001 /* SLIMTX1_ENA */
3950 #define ARIZONA_SLIMTX1_ENA_MASK 0x0001 /* SLIMTX1_ENA */
3951 #define ARIZONA_SLIMTX1_ENA_SHIFT 0 /* SLIMTX1_ENA */
3952 #define ARIZONA_SLIMTX1_ENA_WIDTH 1 /* SLIMTX1_ENA */
3953 
3954 /*
3955  * R1527 (0x5F7) - SLIMbus RX Port Status
3956  */
3957 #define ARIZONA_SLIMRX8_PORT_STS 0x0080 /* SLIMRX8_PORT_STS */
3958 #define ARIZONA_SLIMRX8_PORT_STS_MASK 0x0080 /* SLIMRX8_PORT_STS */
3959 #define ARIZONA_SLIMRX8_PORT_STS_SHIFT 7 /* SLIMRX8_PORT_STS */
3960 #define ARIZONA_SLIMRX8_PORT_STS_WIDTH 1 /* SLIMRX8_PORT_STS */
3961 #define ARIZONA_SLIMRX7_PORT_STS 0x0040 /* SLIMRX7_PORT_STS */
3962 #define ARIZONA_SLIMRX7_PORT_STS_MASK 0x0040 /* SLIMRX7_PORT_STS */
3963 #define ARIZONA_SLIMRX7_PORT_STS_SHIFT 6 /* SLIMRX7_PORT_STS */
3964 #define ARIZONA_SLIMRX7_PORT_STS_WIDTH 1 /* SLIMRX7_PORT_STS */
3965 #define ARIZONA_SLIMRX6_PORT_STS 0x0020 /* SLIMRX6_PORT_STS */
3966 #define ARIZONA_SLIMRX6_PORT_STS_MASK 0x0020 /* SLIMRX6_PORT_STS */
3967 #define ARIZONA_SLIMRX6_PORT_STS_SHIFT 5 /* SLIMRX6_PORT_STS */
3968 #define ARIZONA_SLIMRX6_PORT_STS_WIDTH 1 /* SLIMRX6_PORT_STS */
3969 #define ARIZONA_SLIMRX5_PORT_STS 0x0010 /* SLIMRX5_PORT_STS */
3970 #define ARIZONA_SLIMRX5_PORT_STS_MASK 0x0010 /* SLIMRX5_PORT_STS */
3971 #define ARIZONA_SLIMRX5_PORT_STS_SHIFT 4 /* SLIMRX5_PORT_STS */
3972 #define ARIZONA_SLIMRX5_PORT_STS_WIDTH 1 /* SLIMRX5_PORT_STS */
3973 #define ARIZONA_SLIMRX4_PORT_STS 0x0008 /* SLIMRX4_PORT_STS */
3974 #define ARIZONA_SLIMRX4_PORT_STS_MASK 0x0008 /* SLIMRX4_PORT_STS */
3975 #define ARIZONA_SLIMRX4_PORT_STS_SHIFT 3 /* SLIMRX4_PORT_STS */
3976 #define ARIZONA_SLIMRX4_PORT_STS_WIDTH 1 /* SLIMRX4_PORT_STS */
3977 #define ARIZONA_SLIMRX3_PORT_STS 0x0004 /* SLIMRX3_PORT_STS */
3978 #define ARIZONA_SLIMRX3_PORT_STS_MASK 0x0004 /* SLIMRX3_PORT_STS */
3979 #define ARIZONA_SLIMRX3_PORT_STS_SHIFT 2 /* SLIMRX3_PORT_STS */
3980 #define ARIZONA_SLIMRX3_PORT_STS_WIDTH 1 /* SLIMRX3_PORT_STS */
3981 #define ARIZONA_SLIMRX2_PORT_STS 0x0002 /* SLIMRX2_PORT_STS */
3982 #define ARIZONA_SLIMRX2_PORT_STS_MASK 0x0002 /* SLIMRX2_PORT_STS */
3983 #define ARIZONA_SLIMRX2_PORT_STS_SHIFT 1 /* SLIMRX2_PORT_STS */
3984 #define ARIZONA_SLIMRX2_PORT_STS_WIDTH 1 /* SLIMRX2_PORT_STS */
3985 #define ARIZONA_SLIMRX1_PORT_STS 0x0001 /* SLIMRX1_PORT_STS */
3986 #define ARIZONA_SLIMRX1_PORT_STS_MASK 0x0001 /* SLIMRX1_PORT_STS */
3987 #define ARIZONA_SLIMRX1_PORT_STS_SHIFT 0 /* SLIMRX1_PORT_STS */
3988 #define ARIZONA_SLIMRX1_PORT_STS_WIDTH 1 /* SLIMRX1_PORT_STS */
3989 
3990 /*
3991  * R1528 (0x5F8) - SLIMbus TX Port Status
3992  */
3993 #define ARIZONA_SLIMTX8_PORT_STS 0x0080 /* SLIMTX8_PORT_STS */
3994 #define ARIZONA_SLIMTX8_PORT_STS_MASK 0x0080 /* SLIMTX8_PORT_STS */
3995 #define ARIZONA_SLIMTX8_PORT_STS_SHIFT 7 /* SLIMTX8_PORT_STS */
3996 #define ARIZONA_SLIMTX8_PORT_STS_WIDTH 1 /* SLIMTX8_PORT_STS */
3997 #define ARIZONA_SLIMTX7_PORT_STS 0x0040 /* SLIMTX7_PORT_STS */
3998 #define ARIZONA_SLIMTX7_PORT_STS_MASK 0x0040 /* SLIMTX7_PORT_STS */
3999 #define ARIZONA_SLIMTX7_PORT_STS_SHIFT 6 /* SLIMTX7_PORT_STS */
4000 #define ARIZONA_SLIMTX7_PORT_STS_WIDTH 1 /* SLIMTX7_PORT_STS */
4001 #define ARIZONA_SLIMTX6_PORT_STS 0x0020 /* SLIMTX6_PORT_STS */
4002 #define ARIZONA_SLIMTX6_PORT_STS_MASK 0x0020 /* SLIMTX6_PORT_STS */
4003 #define ARIZONA_SLIMTX6_PORT_STS_SHIFT 5 /* SLIMTX6_PORT_STS */
4004 #define ARIZONA_SLIMTX6_PORT_STS_WIDTH 1 /* SLIMTX6_PORT_STS */
4005 #define ARIZONA_SLIMTX5_PORT_STS 0x0010 /* SLIMTX5_PORT_STS */
4006 #define ARIZONA_SLIMTX5_PORT_STS_MASK 0x0010 /* SLIMTX5_PORT_STS */
4007 #define ARIZONA_SLIMTX5_PORT_STS_SHIFT 4 /* SLIMTX5_PORT_STS */
4008 #define ARIZONA_SLIMTX5_PORT_STS_WIDTH 1 /* SLIMTX5_PORT_STS */
4009 #define ARIZONA_SLIMTX4_PORT_STS 0x0008 /* SLIMTX4_PORT_STS */
4010 #define ARIZONA_SLIMTX4_PORT_STS_MASK 0x0008 /* SLIMTX4_PORT_STS */
4011 #define ARIZONA_SLIMTX4_PORT_STS_SHIFT 3 /* SLIMTX4_PORT_STS */
4012 #define ARIZONA_SLIMTX4_PORT_STS_WIDTH 1 /* SLIMTX4_PORT_STS */
4013 #define ARIZONA_SLIMTX3_PORT_STS 0x0004 /* SLIMTX3_PORT_STS */
4014 #define ARIZONA_SLIMTX3_PORT_STS_MASK 0x0004 /* SLIMTX3_PORT_STS */
4015 #define ARIZONA_SLIMTX3_PORT_STS_SHIFT 2 /* SLIMTX3_PORT_STS */
4016 #define ARIZONA_SLIMTX3_PORT_STS_WIDTH 1 /* SLIMTX3_PORT_STS */
4017 #define ARIZONA_SLIMTX2_PORT_STS 0x0002 /* SLIMTX2_PORT_STS */
4018 #define ARIZONA_SLIMTX2_PORT_STS_MASK 0x0002 /* SLIMTX2_PORT_STS */
4019 #define ARIZONA_SLIMTX2_PORT_STS_SHIFT 1 /* SLIMTX2_PORT_STS */
4020 #define ARIZONA_SLIMTX2_PORT_STS_WIDTH 1 /* SLIMTX2_PORT_STS */
4021 #define ARIZONA_SLIMTX1_PORT_STS 0x0001 /* SLIMTX1_PORT_STS */
4022 #define ARIZONA_SLIMTX1_PORT_STS_MASK 0x0001 /* SLIMTX1_PORT_STS */
4023 #define ARIZONA_SLIMTX1_PORT_STS_SHIFT 0 /* SLIMTX1_PORT_STS */
4024 #define ARIZONA_SLIMTX1_PORT_STS_WIDTH 1 /* SLIMTX1_PORT_STS */
4025 
4026 /*
4027  * R3087 (0xC0F) - IRQ CTRL 1
4028  */
4029 #define ARIZONA_IRQ_POL 0x0400 /* IRQ_POL */
4030 #define ARIZONA_IRQ_POL_MASK 0x0400 /* IRQ_POL */
4031 #define ARIZONA_IRQ_POL_SHIFT 10 /* IRQ_POL */
4032 #define ARIZONA_IRQ_POL_WIDTH 1 /* IRQ_POL */
4033 #define ARIZONA_IRQ_OP_CFG 0x0200 /* IRQ_OP_CFG */
4034 #define ARIZONA_IRQ_OP_CFG_MASK 0x0200 /* IRQ_OP_CFG */
4035 #define ARIZONA_IRQ_OP_CFG_SHIFT 9 /* IRQ_OP_CFG */
4036 #define ARIZONA_IRQ_OP_CFG_WIDTH 1 /* IRQ_OP_CFG */
4037 
4038 /*
4039  * R3088 (0xC10) - GPIO Debounce Config
4040  */
4041 #define ARIZONA_GP_DBTIME_MASK 0xF000 /* GP_DBTIME - [15:12] */
4042 #define ARIZONA_GP_DBTIME_SHIFT 12 /* GP_DBTIME - [15:12] */
4043 #define ARIZONA_GP_DBTIME_WIDTH 4 /* GP_DBTIME - [15:12] */
4044 
4045 /*
4046  * R3104 (0xC20) - Misc Pad Ctrl 1
4047  */
4048 #define ARIZONA_LDO1ENA_PD 0x8000 /* LDO1ENA_PD */
4049 #define ARIZONA_LDO1ENA_PD_MASK 0x8000 /* LDO1ENA_PD */
4050 #define ARIZONA_LDO1ENA_PD_SHIFT 15 /* LDO1ENA_PD */
4051 #define ARIZONA_LDO1ENA_PD_WIDTH 1 /* LDO1ENA_PD */
4052 #define ARIZONA_MCLK2_PD 0x2000 /* MCLK2_PD */
4053 #define ARIZONA_MCLK2_PD_MASK 0x2000 /* MCLK2_PD */
4054 #define ARIZONA_MCLK2_PD_SHIFT 13 /* MCLK2_PD */
4055 #define ARIZONA_MCLK2_PD_WIDTH 1 /* MCLK2_PD */
4056 #define ARIZONA_RSTB_PU 0x0002 /* RSTB_PU */
4057 #define ARIZONA_RSTB_PU_MASK 0x0002 /* RSTB_PU */
4058 #define ARIZONA_RSTB_PU_SHIFT 1 /* RSTB_PU */
4059 #define ARIZONA_RSTB_PU_WIDTH 1 /* RSTB_PU */
4060 
4061 /*
4062  * R3105 (0xC21) - Misc Pad Ctrl 2
4063  */
4064 #define ARIZONA_MCLK1_PD 0x1000 /* MCLK1_PD */
4065 #define ARIZONA_MCLK1_PD_MASK 0x1000 /* MCLK1_PD */
4066 #define ARIZONA_MCLK1_PD_SHIFT 12 /* MCLK1_PD */
4067 #define ARIZONA_MCLK1_PD_WIDTH 1 /* MCLK1_PD */
4068 #define ARIZONA_MICD_PD 0x0100 /* MICD_PD */
4069 #define ARIZONA_MICD_PD_MASK 0x0100 /* MICD_PD */
4070 #define ARIZONA_MICD_PD_SHIFT 8 /* MICD_PD */
4071 #define ARIZONA_MICD_PD_WIDTH 1 /* MICD_PD */
4072 #define ARIZONA_ADDR_PD 0x0001 /* ADDR_PD */
4073 #define ARIZONA_ADDR_PD_MASK 0x0001 /* ADDR_PD */
4074 #define ARIZONA_ADDR_PD_SHIFT 0 /* ADDR_PD */
4075 #define ARIZONA_ADDR_PD_WIDTH 1 /* ADDR_PD */
4076 
4077 /*
4078  * R3106 (0xC22) - Misc Pad Ctrl 3
4079  */
4080 #define ARIZONA_DMICDAT4_PD 0x0008 /* DMICDAT4_PD */
4081 #define ARIZONA_DMICDAT4_PD_MASK 0x0008 /* DMICDAT4_PD */
4082 #define ARIZONA_DMICDAT4_PD_SHIFT 3 /* DMICDAT4_PD */
4083 #define ARIZONA_DMICDAT4_PD_WIDTH 1 /* DMICDAT4_PD */
4084 #define ARIZONA_DMICDAT3_PD 0x0004 /* DMICDAT3_PD */
4085 #define ARIZONA_DMICDAT3_PD_MASK 0x0004 /* DMICDAT3_PD */
4086 #define ARIZONA_DMICDAT3_PD_SHIFT 2 /* DMICDAT3_PD */
4087 #define ARIZONA_DMICDAT3_PD_WIDTH 1 /* DMICDAT3_PD */
4088 #define ARIZONA_DMICDAT2_PD 0x0002 /* DMICDAT2_PD */
4089 #define ARIZONA_DMICDAT2_PD_MASK 0x0002 /* DMICDAT2_PD */
4090 #define ARIZONA_DMICDAT2_PD_SHIFT 1 /* DMICDAT2_PD */
4091 #define ARIZONA_DMICDAT2_PD_WIDTH 1 /* DMICDAT2_PD */
4092 #define ARIZONA_DMICDAT1_PD 0x0001 /* DMICDAT1_PD */
4093 #define ARIZONA_DMICDAT1_PD_MASK 0x0001 /* DMICDAT1_PD */
4094 #define ARIZONA_DMICDAT1_PD_SHIFT 0 /* DMICDAT1_PD */
4095 #define ARIZONA_DMICDAT1_PD_WIDTH 1 /* DMICDAT1_PD */
4096 
4097 /*
4098  * R3107 (0xC23) - Misc Pad Ctrl 4
4099  */
4100 #define ARIZONA_AIF1RXLRCLK_PU 0x0020 /* AIF1RXLRCLK_PU */
4101 #define ARIZONA_AIF1RXLRCLK_PU_MASK 0x0020 /* AIF1RXLRCLK_PU */
4102 #define ARIZONA_AIF1RXLRCLK_PU_SHIFT 5 /* AIF1RXLRCLK_PU */
4103 #define ARIZONA_AIF1RXLRCLK_PU_WIDTH 1 /* AIF1RXLRCLK_PU */
4104 #define ARIZONA_AIF1RXLRCLK_PD 0x0010 /* AIF1RXLRCLK_PD */
4105 #define ARIZONA_AIF1RXLRCLK_PD_MASK 0x0010 /* AIF1RXLRCLK_PD */
4106 #define ARIZONA_AIF1RXLRCLK_PD_SHIFT 4 /* AIF1RXLRCLK_PD */
4107 #define ARIZONA_AIF1RXLRCLK_PD_WIDTH 1 /* AIF1RXLRCLK_PD */
4108 #define ARIZONA_AIF1BCLK_PU 0x0008 /* AIF1BCLK_PU */
4109 #define ARIZONA_AIF1BCLK_PU_MASK 0x0008 /* AIF1BCLK_PU */
4110 #define ARIZONA_AIF1BCLK_PU_SHIFT 3 /* AIF1BCLK_PU */
4111 #define ARIZONA_AIF1BCLK_PU_WIDTH 1 /* AIF1BCLK_PU */
4112 #define ARIZONA_AIF1BCLK_PD 0x0004 /* AIF1BCLK_PD */
4113 #define ARIZONA_AIF1BCLK_PD_MASK 0x0004 /* AIF1BCLK_PD */
4114 #define ARIZONA_AIF1BCLK_PD_SHIFT 2 /* AIF1BCLK_PD */
4115 #define ARIZONA_AIF1BCLK_PD_WIDTH 1 /* AIF1BCLK_PD */
4116 #define ARIZONA_AIF1RXDAT_PU 0x0002 /* AIF1RXDAT_PU */
4117 #define ARIZONA_AIF1RXDAT_PU_MASK 0x0002 /* AIF1RXDAT_PU */
4118 #define ARIZONA_AIF1RXDAT_PU_SHIFT 1 /* AIF1RXDAT_PU */
4119 #define ARIZONA_AIF1RXDAT_PU_WIDTH 1 /* AIF1RXDAT_PU */
4120 #define ARIZONA_AIF1RXDAT_PD 0x0001 /* AIF1RXDAT_PD */
4121 #define ARIZONA_AIF1RXDAT_PD_MASK 0x0001 /* AIF1RXDAT_PD */
4122 #define ARIZONA_AIF1RXDAT_PD_SHIFT 0 /* AIF1RXDAT_PD */
4123 #define ARIZONA_AIF1RXDAT_PD_WIDTH 1 /* AIF1RXDAT_PD */
4124 
4125 /*
4126  * R3108 (0xC24) - Misc Pad Ctrl 5
4127  */
4128 #define ARIZONA_AIF2RXLRCLK_PU 0x0020 /* AIF2RXLRCLK_PU */
4129 #define ARIZONA_AIF2RXLRCLK_PU_MASK 0x0020 /* AIF2RXLRCLK_PU */
4130 #define ARIZONA_AIF2RXLRCLK_PU_SHIFT 5 /* AIF2RXLRCLK_PU */
4131 #define ARIZONA_AIF2RXLRCLK_PU_WIDTH 1 /* AIF2RXLRCLK_PU */
4132 #define ARIZONA_AIF2RXLRCLK_PD 0x0010 /* AIF2RXLRCLK_PD */
4133 #define ARIZONA_AIF2RXLRCLK_PD_MASK 0x0010 /* AIF2RXLRCLK_PD */
4134 #define ARIZONA_AIF2RXLRCLK_PD_SHIFT 4 /* AIF2RXLRCLK_PD */
4135 #define ARIZONA_AIF2RXLRCLK_PD_WIDTH 1 /* AIF2RXLRCLK_PD */
4136 #define ARIZONA_AIF2BCLK_PU 0x0008 /* AIF2BCLK_PU */
4137 #define ARIZONA_AIF2BCLK_PU_MASK 0x0008 /* AIF2BCLK_PU */
4138 #define ARIZONA_AIF2BCLK_PU_SHIFT 3 /* AIF2BCLK_PU */
4139 #define ARIZONA_AIF2BCLK_PU_WIDTH 1 /* AIF2BCLK_PU */
4140 #define ARIZONA_AIF2BCLK_PD 0x0004 /* AIF2BCLK_PD */
4141 #define ARIZONA_AIF2BCLK_PD_MASK 0x0004 /* AIF2BCLK_PD */
4142 #define ARIZONA_AIF2BCLK_PD_SHIFT 2 /* AIF2BCLK_PD */
4143 #define ARIZONA_AIF2BCLK_PD_WIDTH 1 /* AIF2BCLK_PD */
4144 #define ARIZONA_AIF2RXDAT_PU 0x0002 /* AIF2RXDAT_PU */
4145 #define ARIZONA_AIF2RXDAT_PU_MASK 0x0002 /* AIF2RXDAT_PU */
4146 #define ARIZONA_AIF2RXDAT_PU_SHIFT 1 /* AIF2RXDAT_PU */
4147 #define ARIZONA_AIF2RXDAT_PU_WIDTH 1 /* AIF2RXDAT_PU */
4148 #define ARIZONA_AIF2RXDAT_PD 0x0001 /* AIF2RXDAT_PD */
4149 #define ARIZONA_AIF2RXDAT_PD_MASK 0x0001 /* AIF2RXDAT_PD */
4150 #define ARIZONA_AIF2RXDAT_PD_SHIFT 0 /* AIF2RXDAT_PD */
4151 #define ARIZONA_AIF2RXDAT_PD_WIDTH 1 /* AIF2RXDAT_PD */
4152 
4153 /*
4154  * R3109 (0xC25) - Misc Pad Ctrl 6
4155  */
4156 #define ARIZONA_AIF3RXLRCLK_PU 0x0020 /* AIF3RXLRCLK_PU */
4157 #define ARIZONA_AIF3RXLRCLK_PU_MASK 0x0020 /* AIF3RXLRCLK_PU */
4158 #define ARIZONA_AIF3RXLRCLK_PU_SHIFT 5 /* AIF3RXLRCLK_PU */
4159 #define ARIZONA_AIF3RXLRCLK_PU_WIDTH 1 /* AIF3RXLRCLK_PU */
4160 #define ARIZONA_AIF3RXLRCLK_PD 0x0010 /* AIF3RXLRCLK_PD */
4161 #define ARIZONA_AIF3RXLRCLK_PD_MASK 0x0010 /* AIF3RXLRCLK_PD */
4162 #define ARIZONA_AIF3RXLRCLK_PD_SHIFT 4 /* AIF3RXLRCLK_PD */
4163 #define ARIZONA_AIF3RXLRCLK_PD_WIDTH 1 /* AIF3RXLRCLK_PD */
4164 #define ARIZONA_AIF3BCLK_PU 0x0008 /* AIF3BCLK_PU */
4165 #define ARIZONA_AIF3BCLK_PU_MASK 0x0008 /* AIF3BCLK_PU */
4166 #define ARIZONA_AIF3BCLK_PU_SHIFT 3 /* AIF3BCLK_PU */
4167 #define ARIZONA_AIF3BCLK_PU_WIDTH 1 /* AIF3BCLK_PU */
4168 #define ARIZONA_AIF3BCLK_PD 0x0004 /* AIF3BCLK_PD */
4169 #define ARIZONA_AIF3BCLK_PD_MASK 0x0004 /* AIF3BCLK_PD */
4170 #define ARIZONA_AIF3BCLK_PD_SHIFT 2 /* AIF3BCLK_PD */
4171 #define ARIZONA_AIF3BCLK_PD_WIDTH 1 /* AIF3BCLK_PD */
4172 #define ARIZONA_AIF3RXDAT_PU 0x0002 /* AIF3RXDAT_PU */
4173 #define ARIZONA_AIF3RXDAT_PU_MASK 0x0002 /* AIF3RXDAT_PU */
4174 #define ARIZONA_AIF3RXDAT_PU_SHIFT 1 /* AIF3RXDAT_PU */
4175 #define ARIZONA_AIF3RXDAT_PU_WIDTH 1 /* AIF3RXDAT_PU */
4176 #define ARIZONA_AIF3RXDAT_PD 0x0001 /* AIF3RXDAT_PD */
4177 #define ARIZONA_AIF3RXDAT_PD_MASK 0x0001 /* AIF3RXDAT_PD */
4178 #define ARIZONA_AIF3RXDAT_PD_SHIFT 0 /* AIF3RXDAT_PD */
4179 #define ARIZONA_AIF3RXDAT_PD_WIDTH 1 /* AIF3RXDAT_PD */
4180 
4181 /*
4182  * R3328 (0xD00) - Interrupt Status 1
4183  */
4184 #define ARIZONA_GP4_EINT1 0x0008 /* GP4_EINT1 */
4185 #define ARIZONA_GP4_EINT1_MASK 0x0008 /* GP4_EINT1 */
4186 #define ARIZONA_GP4_EINT1_SHIFT 3 /* GP4_EINT1 */
4187 #define ARIZONA_GP4_EINT1_WIDTH 1 /* GP4_EINT1 */
4188 #define ARIZONA_GP3_EINT1 0x0004 /* GP3_EINT1 */
4189 #define ARIZONA_GP3_EINT1_MASK 0x0004 /* GP3_EINT1 */
4190 #define ARIZONA_GP3_EINT1_SHIFT 2 /* GP3_EINT1 */
4191 #define ARIZONA_GP3_EINT1_WIDTH 1 /* GP3_EINT1 */
4192 #define ARIZONA_GP2_EINT1 0x0002 /* GP2_EINT1 */
4193 #define ARIZONA_GP2_EINT1_MASK 0x0002 /* GP2_EINT1 */
4194 #define ARIZONA_GP2_EINT1_SHIFT 1 /* GP2_EINT1 */
4195 #define ARIZONA_GP2_EINT1_WIDTH 1 /* GP2_EINT1 */
4196 #define ARIZONA_GP1_EINT1 0x0001 /* GP1_EINT1 */
4197 #define ARIZONA_GP1_EINT1_MASK 0x0001 /* GP1_EINT1 */
4198 #define ARIZONA_GP1_EINT1_SHIFT 0 /* GP1_EINT1 */
4199 #define ARIZONA_GP1_EINT1_WIDTH 1 /* GP1_EINT1 */
4200 
4201 /*
4202  * R3329 (0xD01) - Interrupt Status 2
4203  */
4204 #define ARIZONA_DSP4_RAM_RDY_EINT1 0x0800 /* DSP4_RAM_RDY_EINT1 */
4205 #define ARIZONA_DSP4_RAM_RDY_EINT1_MASK 0x0800 /* DSP4_RAM_RDY_EINT1 */
4206 #define ARIZONA_DSP4_RAM_RDY_EINT1_SHIFT 11 /* DSP4_RAM_RDY_EINT1 */
4207 #define ARIZONA_DSP4_RAM_RDY_EINT1_WIDTH 1 /* DSP4_RAM_RDY_EINT1 */
4208 #define ARIZONA_DSP3_RAM_RDY_EINT1 0x0400 /* DSP3_RAM_RDY_EINT1 */
4209 #define ARIZONA_DSP3_RAM_RDY_EINT1_MASK 0x0400 /* DSP3_RAM_RDY_EINT1 */
4210 #define ARIZONA_DSP3_RAM_RDY_EINT1_SHIFT 10 /* DSP3_RAM_RDY_EINT1 */
4211 #define ARIZONA_DSP3_RAM_RDY_EINT1_WIDTH 1 /* DSP3_RAM_RDY_EINT1 */
4212 #define ARIZONA_DSP2_RAM_RDY_EINT1 0x0200 /* DSP2_RAM_RDY_EINT1 */
4213 #define ARIZONA_DSP2_RAM_RDY_EINT1_MASK 0x0200 /* DSP2_RAM_RDY_EINT1 */
4214 #define ARIZONA_DSP2_RAM_RDY_EINT1_SHIFT 9 /* DSP2_RAM_RDY_EINT1 */
4215 #define ARIZONA_DSP2_RAM_RDY_EINT1_WIDTH 1 /* DSP2_RAM_RDY_EINT1 */
4216 #define ARIZONA_DSP1_RAM_RDY_EINT1 0x0100 /* DSP1_RAM_RDY_EINT1 */
4217 #define ARIZONA_DSP1_RAM_RDY_EINT1_MASK 0x0100 /* DSP1_RAM_RDY_EINT1 */
4218 #define ARIZONA_DSP1_RAM_RDY_EINT1_SHIFT 8 /* DSP1_RAM_RDY_EINT1 */
4219 #define ARIZONA_DSP1_RAM_RDY_EINT1_WIDTH 1 /* DSP1_RAM_RDY_EINT1 */
4220 #define ARIZONA_DSP_IRQ8_EINT1 0x0080 /* DSP_IRQ8_EINT1 */
4221 #define ARIZONA_DSP_IRQ8_EINT1_MASK 0x0080 /* DSP_IRQ8_EINT1 */
4222 #define ARIZONA_DSP_IRQ8_EINT1_SHIFT 7 /* DSP_IRQ8_EINT1 */
4223 #define ARIZONA_DSP_IRQ8_EINT1_WIDTH 1 /* DSP_IRQ8_EINT1 */
4224 #define ARIZONA_DSP_IRQ7_EINT1 0x0040 /* DSP_IRQ7_EINT1 */
4225 #define ARIZONA_DSP_IRQ7_EINT1_MASK 0x0040 /* DSP_IRQ7_EINT1 */
4226 #define ARIZONA_DSP_IRQ7_EINT1_SHIFT 6 /* DSP_IRQ7_EINT1 */
4227 #define ARIZONA_DSP_IRQ7_EINT1_WIDTH 1 /* DSP_IRQ7_EINT1 */
4228 #define ARIZONA_DSP_IRQ6_EINT1 0x0020 /* DSP_IRQ6_EINT1 */
4229 #define ARIZONA_DSP_IRQ6_EINT1_MASK 0x0020 /* DSP_IRQ6_EINT1 */
4230 #define ARIZONA_DSP_IRQ6_EINT1_SHIFT 5 /* DSP_IRQ6_EINT1 */
4231 #define ARIZONA_DSP_IRQ6_EINT1_WIDTH 1 /* DSP_IRQ6_EINT1 */
4232 #define ARIZONA_DSP_IRQ5_EINT1 0x0010 /* DSP_IRQ5_EINT1 */
4233 #define ARIZONA_DSP_IRQ5_EINT1_MASK 0x0010 /* DSP_IRQ5_EINT1 */
4234 #define ARIZONA_DSP_IRQ5_EINT1_SHIFT 4 /* DSP_IRQ5_EINT1 */
4235 #define ARIZONA_DSP_IRQ5_EINT1_WIDTH 1 /* DSP_IRQ5_EINT1 */
4236 #define ARIZONA_DSP_IRQ4_EINT1 0x0008 /* DSP_IRQ4_EINT1 */
4237 #define ARIZONA_DSP_IRQ4_EINT1_MASK 0x0008 /* DSP_IRQ4_EINT1 */
4238 #define ARIZONA_DSP_IRQ4_EINT1_SHIFT 3 /* DSP_IRQ4_EINT1 */
4239 #define ARIZONA_DSP_IRQ4_EINT1_WIDTH 1 /* DSP_IRQ4_EINT1 */
4240 #define ARIZONA_DSP_IRQ3_EINT1 0x0004 /* DSP_IRQ3_EINT1 */
4241 #define ARIZONA_DSP_IRQ3_EINT1_MASK 0x0004 /* DSP_IRQ3_EINT1 */
4242 #define ARIZONA_DSP_IRQ3_EINT1_SHIFT 2 /* DSP_IRQ3_EINT1 */
4243 #define ARIZONA_DSP_IRQ3_EINT1_WIDTH 1 /* DSP_IRQ3_EINT1 */
4244 #define ARIZONA_DSP_IRQ2_EINT1 0x0002 /* DSP_IRQ2_EINT1 */
4245 #define ARIZONA_DSP_IRQ2_EINT1_MASK 0x0002 /* DSP_IRQ2_EINT1 */
4246 #define ARIZONA_DSP_IRQ2_EINT1_SHIFT 1 /* DSP_IRQ2_EINT1 */
4247 #define ARIZONA_DSP_IRQ2_EINT1_WIDTH 1 /* DSP_IRQ2_EINT1 */
4248 #define ARIZONA_DSP_IRQ1_EINT1 0x0001 /* DSP_IRQ1_EINT1 */
4249 #define ARIZONA_DSP_IRQ1_EINT1_MASK 0x0001 /* DSP_IRQ1_EINT1 */
4250 #define ARIZONA_DSP_IRQ1_EINT1_SHIFT 0 /* DSP_IRQ1_EINT1 */
4251 #define ARIZONA_DSP_IRQ1_EINT1_WIDTH 1 /* DSP_IRQ1_EINT1 */
4252 
4253 /*
4254  * R3330 (0xD02) - Interrupt Status 3
4255  */
4256 #define ARIZONA_SPK_SHUTDOWN_WARN_EINT1 0x8000 /* SPK_SHUTDOWN_WARN_EINT1 */
4257 #define ARIZONA_SPK_SHUTDOWN_WARN_EINT1_MASK 0x8000 /* SPK_SHUTDOWN_WARN_EINT1 */
4258 #define ARIZONA_SPK_SHUTDOWN_WARN_EINT1_SHIFT 15 /* SPK_SHUTDOWN_WARN_EINT1 */
4259 #define ARIZONA_SPK_SHUTDOWN_WARN_EINT1_WIDTH 1 /* SPK_SHUTDOWN_WARN_EINT1 */
4260 #define ARIZONA_SPK_SHUTDOWN_EINT1 0x4000 /* SPK_SHUTDOWN_EINT1 */
4261 #define ARIZONA_SPK_SHUTDOWN_EINT1_MASK 0x4000 /* SPK_SHUTDOWN_EINT1 */
4262 #define ARIZONA_SPK_SHUTDOWN_EINT1_SHIFT 14 /* SPK_SHUTDOWN_EINT1 */
4263 #define ARIZONA_SPK_SHUTDOWN_EINT1_WIDTH 1 /* SPK_SHUTDOWN_EINT1 */
4264 #define ARIZONA_HPDET_EINT1 0x2000 /* HPDET_EINT1 */
4265 #define ARIZONA_HPDET_EINT1_MASK 0x2000 /* HPDET_EINT1 */
4266 #define ARIZONA_HPDET_EINT1_SHIFT 13 /* HPDET_EINT1 */
4267 #define ARIZONA_HPDET_EINT1_WIDTH 1 /* HPDET_EINT1 */
4268 #define ARIZONA_MICDET_EINT1 0x1000 /* MICDET_EINT1 */
4269 #define ARIZONA_MICDET_EINT1_MASK 0x1000 /* MICDET_EINT1 */
4270 #define ARIZONA_MICDET_EINT1_SHIFT 12 /* MICDET_EINT1 */
4271 #define ARIZONA_MICDET_EINT1_WIDTH 1 /* MICDET_EINT1 */
4272 #define ARIZONA_WSEQ_DONE_EINT1 0x0800 /* WSEQ_DONE_EINT1 */
4273 #define ARIZONA_WSEQ_DONE_EINT1_MASK 0x0800 /* WSEQ_DONE_EINT1 */
4274 #define ARIZONA_WSEQ_DONE_EINT1_SHIFT 11 /* WSEQ_DONE_EINT1 */
4275 #define ARIZONA_WSEQ_DONE_EINT1_WIDTH 1 /* WSEQ_DONE_EINT1 */
4276 #define ARIZONA_DRC2_SIG_DET_EINT1 0x0400 /* DRC2_SIG_DET_EINT1 */
4277 #define ARIZONA_DRC2_SIG_DET_EINT1_MASK 0x0400 /* DRC2_SIG_DET_EINT1 */
4278 #define ARIZONA_DRC2_SIG_DET_EINT1_SHIFT 10 /* DRC2_SIG_DET_EINT1 */
4279 #define ARIZONA_DRC2_SIG_DET_EINT1_WIDTH 1 /* DRC2_SIG_DET_EINT1 */
4280 #define ARIZONA_DRC1_SIG_DET_EINT1 0x0200 /* DRC1_SIG_DET_EINT1 */
4281 #define ARIZONA_DRC1_SIG_DET_EINT1_MASK 0x0200 /* DRC1_SIG_DET_EINT1 */
4282 #define ARIZONA_DRC1_SIG_DET_EINT1_SHIFT 9 /* DRC1_SIG_DET_EINT1 */
4283 #define ARIZONA_DRC1_SIG_DET_EINT1_WIDTH 1 /* DRC1_SIG_DET_EINT1 */
4284 #define ARIZONA_ASRC2_LOCK_EINT1 0x0100 /* ASRC2_LOCK_EINT1 */
4285 #define ARIZONA_ASRC2_LOCK_EINT1_MASK 0x0100 /* ASRC2_LOCK_EINT1 */
4286 #define ARIZONA_ASRC2_LOCK_EINT1_SHIFT 8 /* ASRC2_LOCK_EINT1 */
4287 #define ARIZONA_ASRC2_LOCK_EINT1_WIDTH 1 /* ASRC2_LOCK_EINT1 */
4288 #define ARIZONA_ASRC1_LOCK_EINT1 0x0080 /* ASRC1_LOCK_EINT1 */
4289 #define ARIZONA_ASRC1_LOCK_EINT1_MASK 0x0080 /* ASRC1_LOCK_EINT1 */
4290 #define ARIZONA_ASRC1_LOCK_EINT1_SHIFT 7 /* ASRC1_LOCK_EINT1 */
4291 #define ARIZONA_ASRC1_LOCK_EINT1_WIDTH 1 /* ASRC1_LOCK_EINT1 */
4292 #define ARIZONA_UNDERCLOCKED_EINT1 0x0040 /* UNDERCLOCKED_EINT1 */
4293 #define ARIZONA_UNDERCLOCKED_EINT1_MASK 0x0040 /* UNDERCLOCKED_EINT1 */
4294 #define ARIZONA_UNDERCLOCKED_EINT1_SHIFT 6 /* UNDERCLOCKED_EINT1 */
4295 #define ARIZONA_UNDERCLOCKED_EINT1_WIDTH 1 /* UNDERCLOCKED_EINT1 */
4296 #define ARIZONA_OVERCLOCKED_EINT1 0x0020 /* OVERCLOCKED_EINT1 */
4297 #define ARIZONA_OVERCLOCKED_EINT1_MASK 0x0020 /* OVERCLOCKED_EINT1 */
4298 #define ARIZONA_OVERCLOCKED_EINT1_SHIFT 5 /* OVERCLOCKED_EINT1 */
4299 #define ARIZONA_OVERCLOCKED_EINT1_WIDTH 1 /* OVERCLOCKED_EINT1 */
4300 #define ARIZONA_FLL2_LOCK_EINT1 0x0008 /* FLL2_LOCK_EINT1 */
4301 #define ARIZONA_FLL2_LOCK_EINT1_MASK 0x0008 /* FLL2_LOCK_EINT1 */
4302 #define ARIZONA_FLL2_LOCK_EINT1_SHIFT 3 /* FLL2_LOCK_EINT1 */
4303 #define ARIZONA_FLL2_LOCK_EINT1_WIDTH 1 /* FLL2_LOCK_EINT1 */
4304 #define ARIZONA_FLL1_LOCK_EINT1 0x0004 /* FLL1_LOCK_EINT1 */
4305 #define ARIZONA_FLL1_LOCK_EINT1_MASK 0x0004 /* FLL1_LOCK_EINT1 */
4306 #define ARIZONA_FLL1_LOCK_EINT1_SHIFT 2 /* FLL1_LOCK_EINT1 */
4307 #define ARIZONA_FLL1_LOCK_EINT1_WIDTH 1 /* FLL1_LOCK_EINT1 */
4308 #define ARIZONA_CLKGEN_ERR_EINT1 0x0002 /* CLKGEN_ERR_EINT1 */
4309 #define ARIZONA_CLKGEN_ERR_EINT1_MASK 0x0002 /* CLKGEN_ERR_EINT1 */
4310 #define ARIZONA_CLKGEN_ERR_EINT1_SHIFT 1 /* CLKGEN_ERR_EINT1 */
4311 #define ARIZONA_CLKGEN_ERR_EINT1_WIDTH 1 /* CLKGEN_ERR_EINT1 */
4312 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT1 0x0001 /* CLKGEN_ERR_ASYNC_EINT1 */
4313 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT1_MASK 0x0001 /* CLKGEN_ERR_ASYNC_EINT1 */
4314 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT1_SHIFT 0 /* CLKGEN_ERR_ASYNC_EINT1 */
4315 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT1_WIDTH 1 /* CLKGEN_ERR_ASYNC_EINT1 */
4316 
4317 /*
4318  * R3331 (0xD03) - Interrupt Status 4
4319  */
4320 #define ARIZONA_ASRC_CFG_ERR_EINT1 0x8000 /* ASRC_CFG_ERR_EINT1 */
4321 #define ARIZONA_ASRC_CFG_ERR_EINT1_MASK 0x8000 /* ASRC_CFG_ERR_EINT1 */
4322 #define ARIZONA_ASRC_CFG_ERR_EINT1_SHIFT 15 /* ASRC_CFG_ERR_EINT1 */
4323 #define ARIZONA_ASRC_CFG_ERR_EINT1_WIDTH 1 /* ASRC_CFG_ERR_EINT1 */
4324 #define ARIZONA_AIF3_ERR_EINT1 0x4000 /* AIF3_ERR_EINT1 */
4325 #define ARIZONA_AIF3_ERR_EINT1_MASK 0x4000 /* AIF3_ERR_EINT1 */
4326 #define ARIZONA_AIF3_ERR_EINT1_SHIFT 14 /* AIF3_ERR_EINT1 */
4327 #define ARIZONA_AIF3_ERR_EINT1_WIDTH 1 /* AIF3_ERR_EINT1 */
4328 #define ARIZONA_AIF2_ERR_EINT1 0x2000 /* AIF2_ERR_EINT1 */
4329 #define ARIZONA_AIF2_ERR_EINT1_MASK 0x2000 /* AIF2_ERR_EINT1 */
4330 #define ARIZONA_AIF2_ERR_EINT1_SHIFT 13 /* AIF2_ERR_EINT1 */
4331 #define ARIZONA_AIF2_ERR_EINT1_WIDTH 1 /* AIF2_ERR_EINT1 */
4332 #define ARIZONA_AIF1_ERR_EINT1 0x1000 /* AIF1_ERR_EINT1 */
4333 #define ARIZONA_AIF1_ERR_EINT1_MASK 0x1000 /* AIF1_ERR_EINT1 */
4334 #define ARIZONA_AIF1_ERR_EINT1_SHIFT 12 /* AIF1_ERR_EINT1 */
4335 #define ARIZONA_AIF1_ERR_EINT1_WIDTH 1 /* AIF1_ERR_EINT1 */
4336 #define ARIZONA_CTRLIF_ERR_EINT1 0x0800 /* CTRLIF_ERR_EINT1 */
4337 #define ARIZONA_CTRLIF_ERR_EINT1_MASK 0x0800 /* CTRLIF_ERR_EINT1 */
4338 #define ARIZONA_CTRLIF_ERR_EINT1_SHIFT 11 /* CTRLIF_ERR_EINT1 */
4339 #define ARIZONA_CTRLIF_ERR_EINT1_WIDTH 1 /* CTRLIF_ERR_EINT1 */
4340 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1 0x0400 /* MIXER_DROPPED_SAMPLE_EINT1 */
4341 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1_MASK 0x0400 /* MIXER_DROPPED_SAMPLE_EINT1 */
4342 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1_SHIFT 10 /* MIXER_DROPPED_SAMPLE_EINT1 */
4343 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1_WIDTH 1 /* MIXER_DROPPED_SAMPLE_EINT1 */
4344 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1 0x0200 /* ASYNC_CLK_ENA_LOW_EINT1 */
4345 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1_MASK 0x0200 /* ASYNC_CLK_ENA_LOW_EINT1 */
4346 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1_SHIFT 9 /* ASYNC_CLK_ENA_LOW_EINT1 */
4347 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1_WIDTH 1 /* ASYNC_CLK_ENA_LOW_EINT1 */
4348 #define ARIZONA_SYSCLK_ENA_LOW_EINT1 0x0100 /* SYSCLK_ENA_LOW_EINT1 */
4349 #define ARIZONA_SYSCLK_ENA_LOW_EINT1_MASK 0x0100 /* SYSCLK_ENA_LOW_EINT1 */
4350 #define ARIZONA_SYSCLK_ENA_LOW_EINT1_SHIFT 8 /* SYSCLK_ENA_LOW_EINT1 */
4351 #define ARIZONA_SYSCLK_ENA_LOW_EINT1_WIDTH 1 /* SYSCLK_ENA_LOW_EINT1 */
4352 #define ARIZONA_ISRC1_CFG_ERR_EINT1 0x0080 /* ISRC1_CFG_ERR_EINT1 */
4353 #define ARIZONA_ISRC1_CFG_ERR_EINT1_MASK 0x0080 /* ISRC1_CFG_ERR_EINT1 */
4354 #define ARIZONA_ISRC1_CFG_ERR_EINT1_SHIFT 7 /* ISRC1_CFG_ERR_EINT1 */
4355 #define ARIZONA_ISRC1_CFG_ERR_EINT1_WIDTH 1 /* ISRC1_CFG_ERR_EINT1 */
4356 #define ARIZONA_ISRC2_CFG_ERR_EINT1 0x0040 /* ISRC2_CFG_ERR_EINT1 */
4357 #define ARIZONA_ISRC2_CFG_ERR_EINT1_MASK 0x0040 /* ISRC2_CFG_ERR_EINT1 */
4358 #define ARIZONA_ISRC2_CFG_ERR_EINT1_SHIFT 6 /* ISRC2_CFG_ERR_EINT1 */
4359 #define ARIZONA_ISRC2_CFG_ERR_EINT1_WIDTH 1 /* ISRC2_CFG_ERR_EINT1 */
4360 
4361 /*
4362  * R3332 (0xD04) - Interrupt Status 5
4363  */
4364 #define ARIZONA_BOOT_DONE_EINT1 0x0100 /* BOOT_DONE_EINT1 */
4365 #define ARIZONA_BOOT_DONE_EINT1_MASK 0x0100 /* BOOT_DONE_EINT1 */
4366 #define ARIZONA_BOOT_DONE_EINT1_SHIFT 8 /* BOOT_DONE_EINT1 */
4367 #define ARIZONA_BOOT_DONE_EINT1_WIDTH 1 /* BOOT_DONE_EINT1 */
4368 #define ARIZONA_DCS_DAC_DONE_EINT1 0x0080 /* DCS_DAC_DONE_EINT1 */
4369 #define ARIZONA_DCS_DAC_DONE_EINT1_MASK 0x0080 /* DCS_DAC_DONE_EINT1 */
4370 #define ARIZONA_DCS_DAC_DONE_EINT1_SHIFT 7 /* DCS_DAC_DONE_EINT1 */
4371 #define ARIZONA_DCS_DAC_DONE_EINT1_WIDTH 1 /* DCS_DAC_DONE_EINT1 */
4372 #define ARIZONA_DCS_HP_DONE_EINT1 0x0040 /* DCS_HP_DONE_EINT1 */
4373 #define ARIZONA_DCS_HP_DONE_EINT1_MASK 0x0040 /* DCS_HP_DONE_EINT1 */
4374 #define ARIZONA_DCS_HP_DONE_EINT1_SHIFT 6 /* DCS_HP_DONE_EINT1 */
4375 #define ARIZONA_DCS_HP_DONE_EINT1_WIDTH 1 /* DCS_HP_DONE_EINT1 */
4376 #define ARIZONA_FLL2_CLOCK_OK_EINT1 0x0002 /* FLL2_CLOCK_OK_EINT1 */
4377 #define ARIZONA_FLL2_CLOCK_OK_EINT1_MASK 0x0002 /* FLL2_CLOCK_OK_EINT1 */
4378 #define ARIZONA_FLL2_CLOCK_OK_EINT1_SHIFT 1 /* FLL2_CLOCK_OK_EINT1 */
4379 #define ARIZONA_FLL2_CLOCK_OK_EINT1_WIDTH 1 /* FLL2_CLOCK_OK_EINT1 */
4380 #define ARIZONA_FLL1_CLOCK_OK_EINT1 0x0001 /* FLL1_CLOCK_OK_EINT1 */
4381 #define ARIZONA_FLL1_CLOCK_OK_EINT1_MASK 0x0001 /* FLL1_CLOCK_OK_EINT1 */
4382 #define ARIZONA_FLL1_CLOCK_OK_EINT1_SHIFT 0 /* FLL1_CLOCK_OK_EINT1 */
4383 #define ARIZONA_FLL1_CLOCK_OK_EINT1_WIDTH 1 /* FLL1_CLOCK_OK_EINT1 */
4384 
4385 /*
4386  * R3336 (0xD08) - Interrupt Status 1 Mask
4387  */
4388 #define ARIZONA_IM_GP4_EINT1 0x0008 /* IM_GP4_EINT1 */
4389 #define ARIZONA_IM_GP4_EINT1_MASK 0x0008 /* IM_GP4_EINT1 */
4390 #define ARIZONA_IM_GP4_EINT1_SHIFT 3 /* IM_GP4_EINT1 */
4391 #define ARIZONA_IM_GP4_EINT1_WIDTH 1 /* IM_GP4_EINT1 */
4392 #define ARIZONA_IM_GP3_EINT1 0x0004 /* IM_GP3_EINT1 */
4393 #define ARIZONA_IM_GP3_EINT1_MASK 0x0004 /* IM_GP3_EINT1 */
4394 #define ARIZONA_IM_GP3_EINT1_SHIFT 2 /* IM_GP3_EINT1 */
4395 #define ARIZONA_IM_GP3_EINT1_WIDTH 1 /* IM_GP3_EINT1 */
4396 #define ARIZONA_IM_GP2_EINT1 0x0002 /* IM_GP2_EINT1 */
4397 #define ARIZONA_IM_GP2_EINT1_MASK 0x0002 /* IM_GP2_EINT1 */
4398 #define ARIZONA_IM_GP2_EINT1_SHIFT 1 /* IM_GP2_EINT1 */
4399 #define ARIZONA_IM_GP2_EINT1_WIDTH 1 /* IM_GP2_EINT1 */
4400 #define ARIZONA_IM_GP1_EINT1 0x0001 /* IM_GP1_EINT1 */
4401 #define ARIZONA_IM_GP1_EINT1_MASK 0x0001 /* IM_GP1_EINT1 */
4402 #define ARIZONA_IM_GP1_EINT1_SHIFT 0 /* IM_GP1_EINT1 */
4403 #define ARIZONA_IM_GP1_EINT1_WIDTH 1 /* IM_GP1_EINT1 */
4404 
4405 /*
4406  * R3337 (0xD09) - Interrupt Status 2 Mask
4407  */
4408 #define ARIZONA_IM_DSP1_RAM_RDY_EINT1 0x0100 /* IM_DSP1_RAM_RDY_EINT1 */
4409 #define ARIZONA_IM_DSP1_RAM_RDY_EINT1_MASK 0x0100 /* IM_DSP1_RAM_RDY_EINT1 */
4410 #define ARIZONA_IM_DSP1_RAM_RDY_EINT1_SHIFT 8 /* IM_DSP1_RAM_RDY_EINT1 */
4411 #define ARIZONA_IM_DSP1_RAM_RDY_EINT1_WIDTH 1 /* IM_DSP1_RAM_RDY_EINT1 */
4412 #define ARIZONA_IM_DSP_IRQ2_EINT1 0x0002 /* IM_DSP_IRQ2_EINT1 */
4413 #define ARIZONA_IM_DSP_IRQ2_EINT1_MASK 0x0002 /* IM_DSP_IRQ2_EINT1 */
4414 #define ARIZONA_IM_DSP_IRQ2_EINT1_SHIFT 1 /* IM_DSP_IRQ2_EINT1 */
4415 #define ARIZONA_IM_DSP_IRQ2_EINT1_WIDTH 1 /* IM_DSP_IRQ2_EINT1 */
4416 #define ARIZONA_IM_DSP_IRQ1_EINT1 0x0001 /* IM_DSP_IRQ1_EINT1 */
4417 #define ARIZONA_IM_DSP_IRQ1_EINT1_MASK 0x0001 /* IM_DSP_IRQ1_EINT1 */
4418 #define ARIZONA_IM_DSP_IRQ1_EINT1_SHIFT 0 /* IM_DSP_IRQ1_EINT1 */
4419 #define ARIZONA_IM_DSP_IRQ1_EINT1_WIDTH 1 /* IM_DSP_IRQ1_EINT1 */
4420 
4421 /*
4422  * R3338 (0xD0A) - Interrupt Status 3 Mask
4423  */
4424 #define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1 0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT1 */
4425 #define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1_MASK 0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT1 */
4426 #define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1_SHIFT 15 /* IM_SPK_SHUTDOWN_WARN_EINT1 */
4427 #define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1_WIDTH 1 /* IM_SPK_SHUTDOWN_WARN_EINT1 */
4428 #define ARIZONA_IM_SPK_SHUTDOWN_EINT1 0x4000 /* IM_SPK_SHUTDOWN_EINT1 */
4429 #define ARIZONA_IM_SPK_SHUTDOWN_EINT1_MASK 0x4000 /* IM_SPK_SHUTDOWN_EINT1 */
4430 #define ARIZONA_IM_SPK_SHUTDOWN_EINT1_SHIFT 14 /* IM_SPK_SHUTDOWN_EINT1 */
4431 #define ARIZONA_IM_SPK_SHUTDOWN_EINT1_WIDTH 1 /* IM_SPK_SHUTDOWN_EINT1 */
4432 #define ARIZONA_IM_HPDET_EINT1 0x2000 /* IM_HPDET_EINT1 */
4433 #define ARIZONA_IM_HPDET_EINT1_MASK 0x2000 /* IM_HPDET_EINT1 */
4434 #define ARIZONA_IM_HPDET_EINT1_SHIFT 13 /* IM_HPDET_EINT1 */
4435 #define ARIZONA_IM_HPDET_EINT1_WIDTH 1 /* IM_HPDET_EINT1 */
4436 #define ARIZONA_IM_MICDET_EINT1 0x1000 /* IM_MICDET_EINT1 */
4437 #define ARIZONA_IM_MICDET_EINT1_MASK 0x1000 /* IM_MICDET_EINT1 */
4438 #define ARIZONA_IM_MICDET_EINT1_SHIFT 12 /* IM_MICDET_EINT1 */
4439 #define ARIZONA_IM_MICDET_EINT1_WIDTH 1 /* IM_MICDET_EINT1 */
4440 #define ARIZONA_IM_WSEQ_DONE_EINT1 0x0800 /* IM_WSEQ_DONE_EINT1 */
4441 #define ARIZONA_IM_WSEQ_DONE_EINT1_MASK 0x0800 /* IM_WSEQ_DONE_EINT1 */
4442 #define ARIZONA_IM_WSEQ_DONE_EINT1_SHIFT 11 /* IM_WSEQ_DONE_EINT1 */
4443 #define ARIZONA_IM_WSEQ_DONE_EINT1_WIDTH 1 /* IM_WSEQ_DONE_EINT1 */
4444 #define ARIZONA_IM_DRC2_SIG_DET_EINT1 0x0400 /* IM_DRC2_SIG_DET_EINT1 */
4445 #define ARIZONA_IM_DRC2_SIG_DET_EINT1_MASK 0x0400 /* IM_DRC2_SIG_DET_EINT1 */
4446 #define ARIZONA_IM_DRC2_SIG_DET_EINT1_SHIFT 10 /* IM_DRC2_SIG_DET_EINT1 */
4447 #define ARIZONA_IM_DRC2_SIG_DET_EINT1_WIDTH 1 /* IM_DRC2_SIG_DET_EINT1 */
4448 #define ARIZONA_IM_DRC1_SIG_DET_EINT1 0x0200 /* IM_DRC1_SIG_DET_EINT1 */
4449 #define ARIZONA_IM_DRC1_SIG_DET_EINT1_MASK 0x0200 /* IM_DRC1_SIG_DET_EINT1 */
4450 #define ARIZONA_IM_DRC1_SIG_DET_EINT1_SHIFT 9 /* IM_DRC1_SIG_DET_EINT1 */
4451 #define ARIZONA_IM_DRC1_SIG_DET_EINT1_WIDTH 1 /* IM_DRC1_SIG_DET_EINT1 */
4452 #define ARIZONA_IM_ASRC2_LOCK_EINT1 0x0100 /* IM_ASRC2_LOCK_EINT1 */
4453 #define ARIZONA_IM_ASRC2_LOCK_EINT1_MASK 0x0100 /* IM_ASRC2_LOCK_EINT1 */
4454 #define ARIZONA_IM_ASRC2_LOCK_EINT1_SHIFT 8 /* IM_ASRC2_LOCK_EINT1 */
4455 #define ARIZONA_IM_ASRC2_LOCK_EINT1_WIDTH 1 /* IM_ASRC2_LOCK_EINT1 */
4456 #define ARIZONA_IM_ASRC1_LOCK_EINT1 0x0080 /* IM_ASRC1_LOCK_EINT1 */
4457 #define ARIZONA_IM_ASRC1_LOCK_EINT1_MASK 0x0080 /* IM_ASRC1_LOCK_EINT1 */
4458 #define ARIZONA_IM_ASRC1_LOCK_EINT1_SHIFT 7 /* IM_ASRC1_LOCK_EINT1 */
4459 #define ARIZONA_IM_ASRC1_LOCK_EINT1_WIDTH 1 /* IM_ASRC1_LOCK_EINT1 */
4460 #define ARIZONA_IM_UNDERCLOCKED_EINT1 0x0040 /* IM_UNDERCLOCKED_EINT1 */
4461 #define ARIZONA_IM_UNDERCLOCKED_EINT1_MASK 0x0040 /* IM_UNDERCLOCKED_EINT1 */
4462 #define ARIZONA_IM_UNDERCLOCKED_EINT1_SHIFT 6 /* IM_UNDERCLOCKED_EINT1 */
4463 #define ARIZONA_IM_UNDERCLOCKED_EINT1_WIDTH 1 /* IM_UNDERCLOCKED_EINT1 */
4464 #define ARIZONA_IM_OVERCLOCKED_EINT1 0x0020 /* IM_OVERCLOCKED_EINT1 */
4465 #define ARIZONA_IM_OVERCLOCKED_EINT1_MASK 0x0020 /* IM_OVERCLOCKED_EINT1 */
4466 #define ARIZONA_IM_OVERCLOCKED_EINT1_SHIFT 5 /* IM_OVERCLOCKED_EINT1 */
4467 #define ARIZONA_IM_OVERCLOCKED_EINT1_WIDTH 1 /* IM_OVERCLOCKED_EINT1 */
4468 #define ARIZONA_IM_FLL2_LOCK_EINT1 0x0008 /* IM_FLL2_LOCK_EINT1 */
4469 #define ARIZONA_IM_FLL2_LOCK_EINT1_MASK 0x0008 /* IM_FLL2_LOCK_EINT1 */
4470 #define ARIZONA_IM_FLL2_LOCK_EINT1_SHIFT 3 /* IM_FLL2_LOCK_EINT1 */
4471 #define ARIZONA_IM_FLL2_LOCK_EINT1_WIDTH 1 /* IM_FLL2_LOCK_EINT1 */
4472 #define ARIZONA_IM_FLL1_LOCK_EINT1 0x0004 /* IM_FLL1_LOCK_EINT1 */
4473 #define ARIZONA_IM_FLL1_LOCK_EINT1_MASK 0x0004 /* IM_FLL1_LOCK_EINT1 */
4474 #define ARIZONA_IM_FLL1_LOCK_EINT1_SHIFT 2 /* IM_FLL1_LOCK_EINT1 */
4475 #define ARIZONA_IM_FLL1_LOCK_EINT1_WIDTH 1 /* IM_FLL1_LOCK_EINT1 */
4476 #define ARIZONA_IM_CLKGEN_ERR_EINT1 0x0002 /* IM_CLKGEN_ERR_EINT1 */
4477 #define ARIZONA_IM_CLKGEN_ERR_EINT1_MASK 0x0002 /* IM_CLKGEN_ERR_EINT1 */
4478 #define ARIZONA_IM_CLKGEN_ERR_EINT1_SHIFT 1 /* IM_CLKGEN_ERR_EINT1 */
4479 #define ARIZONA_IM_CLKGEN_ERR_EINT1_WIDTH 1 /* IM_CLKGEN_ERR_EINT1 */
4480 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1 0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT1 */
4481 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1_MASK 0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT1 */
4482 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1_SHIFT 0 /* IM_CLKGEN_ERR_ASYNC_EINT1 */
4483 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1_WIDTH 1 /* IM_CLKGEN_ERR_ASYNC_EINT1 */
4484 
4485 /*
4486  * R3339 (0xD0B) - Interrupt Status 4 Mask
4487  */
4488 #define ARIZONA_IM_ASRC_CFG_ERR_EINT1 0x8000 /* IM_ASRC_CFG_ERR_EINT1 */
4489 #define ARIZONA_IM_ASRC_CFG_ERR_EINT1_MASK 0x8000 /* IM_ASRC_CFG_ERR_EINT1 */
4490 #define ARIZONA_IM_ASRC_CFG_ERR_EINT1_SHIFT 15 /* IM_ASRC_CFG_ERR_EINT1 */
4491 #define ARIZONA_IM_ASRC_CFG_ERR_EINT1_WIDTH 1 /* IM_ASRC_CFG_ERR_EINT1 */
4492 #define ARIZONA_IM_AIF3_ERR_EINT1 0x4000 /* IM_AIF3_ERR_EINT1 */
4493 #define ARIZONA_IM_AIF3_ERR_EINT1_MASK 0x4000 /* IM_AIF3_ERR_EINT1 */
4494 #define ARIZONA_IM_AIF3_ERR_EINT1_SHIFT 14 /* IM_AIF3_ERR_EINT1 */
4495 #define ARIZONA_IM_AIF3_ERR_EINT1_WIDTH 1 /* IM_AIF3_ERR_EINT1 */
4496 #define ARIZONA_IM_AIF2_ERR_EINT1 0x2000 /* IM_AIF2_ERR_EINT1 */
4497 #define ARIZONA_IM_AIF2_ERR_EINT1_MASK 0x2000 /* IM_AIF2_ERR_EINT1 */
4498 #define ARIZONA_IM_AIF2_ERR_EINT1_SHIFT 13 /* IM_AIF2_ERR_EINT1 */
4499 #define ARIZONA_IM_AIF2_ERR_EINT1_WIDTH 1 /* IM_AIF2_ERR_EINT1 */
4500 #define ARIZONA_IM_AIF1_ERR_EINT1 0x1000 /* IM_AIF1_ERR_EINT1 */
4501 #define ARIZONA_IM_AIF1_ERR_EINT1_MASK 0x1000 /* IM_AIF1_ERR_EINT1 */
4502 #define ARIZONA_IM_AIF1_ERR_EINT1_SHIFT 12 /* IM_AIF1_ERR_EINT1 */
4503 #define ARIZONA_IM_AIF1_ERR_EINT1_WIDTH 1 /* IM_AIF1_ERR_EINT1 */
4504 #define ARIZONA_IM_CTRLIF_ERR_EINT1 0x0800 /* IM_CTRLIF_ERR_EINT1 */
4505 #define ARIZONA_IM_CTRLIF_ERR_EINT1_MASK 0x0800 /* IM_CTRLIF_ERR_EINT1 */
4506 #define ARIZONA_IM_CTRLIF_ERR_EINT1_SHIFT 11 /* IM_CTRLIF_ERR_EINT1 */
4507 #define ARIZONA_IM_CTRLIF_ERR_EINT1_WIDTH 1 /* IM_CTRLIF_ERR_EINT1 */
4508 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
4509 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_MASK 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
4510 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_SHIFT 10 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
4511 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_WIDTH 1 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
4512 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
4513 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_MASK 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
4514 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_SHIFT 9 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
4515 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_WIDTH 1 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
4516 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1 0x0100 /* IM_SYSCLK_ENA_LOW_EINT1 */
4517 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_MASK 0x0100 /* IM_SYSCLK_ENA_LOW_EINT1 */
4518 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_SHIFT 8 /* IM_SYSCLK_ENA_LOW_EINT1 */
4519 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_WIDTH 1 /* IM_SYSCLK_ENA_LOW_EINT1 */
4520 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT1 0x0080 /* IM_ISRC1_CFG_ERR_EINT1 */
4521 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_MASK 0x0080 /* IM_ISRC1_CFG_ERR_EINT1 */
4522 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_SHIFT 7 /* IM_ISRC1_CFG_ERR_EINT1 */
4523 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_WIDTH 1 /* IM_ISRC1_CFG_ERR_EINT1 */
4524 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT1 0x0040 /* IM_ISRC2_CFG_ERR_EINT1 */
4525 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_MASK 0x0040 /* IM_ISRC2_CFG_ERR_EINT1 */
4526 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_SHIFT 6 /* IM_ISRC2_CFG_ERR_EINT1 */
4527 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_WIDTH 1 /* IM_ISRC2_CFG_ERR_EINT1 */
4528 
4529 /*
4530  * R3340 (0xD0C) - Interrupt Status 5 Mask
4531  */
4532 #define ARIZONA_IM_BOOT_DONE_EINT1 0x0100 /* IM_BOOT_DONE_EINT1 */
4533 #define ARIZONA_IM_BOOT_DONE_EINT1_MASK 0x0100 /* IM_BOOT_DONE_EINT1 */
4534 #define ARIZONA_IM_BOOT_DONE_EINT1_SHIFT 8 /* IM_BOOT_DONE_EINT1 */
4535 #define ARIZONA_IM_BOOT_DONE_EINT1_WIDTH 1 /* IM_BOOT_DONE_EINT1 */
4536 #define ARIZONA_IM_DCS_DAC_DONE_EINT1 0x0080 /* IM_DCS_DAC_DONE_EINT1 */
4537 #define ARIZONA_IM_DCS_DAC_DONE_EINT1_MASK 0x0080 /* IM_DCS_DAC_DONE_EINT1 */
4538 #define ARIZONA_IM_DCS_DAC_DONE_EINT1_SHIFT 7 /* IM_DCS_DAC_DONE_EINT1 */
4539 #define ARIZONA_IM_DCS_DAC_DONE_EINT1_WIDTH 1 /* IM_DCS_DAC_DONE_EINT1 */
4540 #define ARIZONA_IM_DCS_HP_DONE_EINT1 0x0040 /* IM_DCS_HP_DONE_EINT1 */
4541 #define ARIZONA_IM_DCS_HP_DONE_EINT1_MASK 0x0040 /* IM_DCS_HP_DONE_EINT1 */
4542 #define ARIZONA_IM_DCS_HP_DONE_EINT1_SHIFT 6 /* IM_DCS_HP_DONE_EINT1 */
4543 #define ARIZONA_IM_DCS_HP_DONE_EINT1_WIDTH 1 /* IM_DCS_HP_DONE_EINT1 */
4544 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT1 0x0002 /* IM_FLL2_CLOCK_OK_EINT1 */
4545 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT1_MASK 0x0002 /* IM_FLL2_CLOCK_OK_EINT1 */
4546 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT1_SHIFT 1 /* IM_FLL2_CLOCK_OK_EINT1 */
4547 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT1_WIDTH 1 /* IM_FLL2_CLOCK_OK_EINT1 */
4548 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT1 0x0001 /* IM_FLL1_CLOCK_OK_EINT1 */
4549 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_MASK 0x0001 /* IM_FLL1_CLOCK_OK_EINT1 */
4550 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_SHIFT 0 /* IM_FLL1_CLOCK_OK_EINT1 */
4551 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_WIDTH 1 /* IM_FLL1_CLOCK_OK_EINT1 */
4552 
4553 /*
4554  * R3343 (0xD0F) - Interrupt Control
4555  */
4556 #define ARIZONA_IM_IRQ1 0x0001 /* IM_IRQ1 */
4557 #define ARIZONA_IM_IRQ1_MASK 0x0001 /* IM_IRQ1 */
4558 #define ARIZONA_IM_IRQ1_SHIFT 0 /* IM_IRQ1 */
4559 #define ARIZONA_IM_IRQ1_WIDTH 1 /* IM_IRQ1 */
4560 
4561 /*
4562  * R3344 (0xD10) - IRQ2 Status 1
4563  */
4564 #define ARIZONA_GP4_EINT2 0x0008 /* GP4_EINT2 */
4565 #define ARIZONA_GP4_EINT2_MASK 0x0008 /* GP4_EINT2 */
4566 #define ARIZONA_GP4_EINT2_SHIFT 3 /* GP4_EINT2 */
4567 #define ARIZONA_GP4_EINT2_WIDTH 1 /* GP4_EINT2 */
4568 #define ARIZONA_GP3_EINT2 0x0004 /* GP3_EINT2 */
4569 #define ARIZONA_GP3_EINT2_MASK 0x0004 /* GP3_EINT2 */
4570 #define ARIZONA_GP3_EINT2_SHIFT 2 /* GP3_EINT2 */
4571 #define ARIZONA_GP3_EINT2_WIDTH 1 /* GP3_EINT2 */
4572 #define ARIZONA_GP2_EINT2 0x0002 /* GP2_EINT2 */
4573 #define ARIZONA_GP2_EINT2_MASK 0x0002 /* GP2_EINT2 */
4574 #define ARIZONA_GP2_EINT2_SHIFT 1 /* GP2_EINT2 */
4575 #define ARIZONA_GP2_EINT2_WIDTH 1 /* GP2_EINT2 */
4576 #define ARIZONA_GP1_EINT2 0x0001 /* GP1_EINT2 */
4577 #define ARIZONA_GP1_EINT2_MASK 0x0001 /* GP1_EINT2 */
4578 #define ARIZONA_GP1_EINT2_SHIFT 0 /* GP1_EINT2 */
4579 #define ARIZONA_GP1_EINT2_WIDTH 1 /* GP1_EINT2 */
4580 
4581 /*
4582  * R3345 (0xD11) - IRQ2 Status 2
4583  */
4584 #define ARIZONA_DSP1_RAM_RDY_EINT2 0x0100 /* DSP1_RAM_RDY_EINT2 */
4585 #define ARIZONA_DSP1_RAM_RDY_EINT2_MASK 0x0100 /* DSP1_RAM_RDY_EINT2 */
4586 #define ARIZONA_DSP1_RAM_RDY_EINT2_SHIFT 8 /* DSP1_RAM_RDY_EINT2 */
4587 #define ARIZONA_DSP1_RAM_RDY_EINT2_WIDTH 1 /* DSP1_RAM_RDY_EINT2 */
4588 #define ARIZONA_DSP_IRQ2_EINT2 0x0002 /* DSP_IRQ2_EINT2 */
4589 #define ARIZONA_DSP_IRQ2_EINT2_MASK 0x0002 /* DSP_IRQ2_EINT2 */
4590 #define ARIZONA_DSP_IRQ2_EINT2_SHIFT 1 /* DSP_IRQ2_EINT2 */
4591 #define ARIZONA_DSP_IRQ2_EINT2_WIDTH 1 /* DSP_IRQ2_EINT2 */
4592 #define ARIZONA_DSP_IRQ1_EINT2 0x0001 /* DSP_IRQ1_EINT2 */
4593 #define ARIZONA_DSP_IRQ1_EINT2_MASK 0x0001 /* DSP_IRQ1_EINT2 */
4594 #define ARIZONA_DSP_IRQ1_EINT2_SHIFT 0 /* DSP_IRQ1_EINT2 */
4595 #define ARIZONA_DSP_IRQ1_EINT2_WIDTH 1 /* DSP_IRQ1_EINT2 */
4596 
4597 /*
4598  * R3346 (0xD12) - IRQ2 Status 3
4599  */
4600 #define ARIZONA_SPK_SHUTDOWN_WARN_EINT2 0x8000 /* SPK_SHUTDOWN_WARN_EINT2 */
4601 #define ARIZONA_SPK_SHUTDOWN_WARN_EINT2_MASK 0x8000 /* SPK_SHUTDOWN_WARN_EINT2 */
4602 #define ARIZONA_SPK_SHUTDOWN_WARN_EINT2_SHIFT 15 /* SPK_SHUTDOWN_WARN_EINT2 */
4603 #define ARIZONA_SPK_SHUTDOWN_WARN_EINT2_WIDTH 1 /* SPK_SHUTDOWN_WARN_EINT2 */
4604 #define ARIZONA_SPK_SHUTDOWN_EINT2 0x4000 /* SPK_SHUTDOWN_EINT2 */
4605 #define ARIZONA_SPK_SHUTDOWN_EINT2_MASK 0x4000 /* SPK_SHUTDOWN_EINT2 */
4606 #define ARIZONA_SPK_SHUTDOWN_EINT2_SHIFT 14 /* SPK_SHUTDOWN_EINT2 */
4607 #define ARIZONA_SPK_SHUTDOWN_EINT2_WIDTH 1 /* SPK_SHUTDOWN_EINT2 */
4608 #define ARIZONA_HPDET_EINT2 0x2000 /* HPDET_EINT2 */
4609 #define ARIZONA_HPDET_EINT2_MASK 0x2000 /* HPDET_EINT2 */
4610 #define ARIZONA_HPDET_EINT2_SHIFT 13 /* HPDET_EINT2 */
4611 #define ARIZONA_HPDET_EINT2_WIDTH 1 /* HPDET_EINT2 */
4612 #define ARIZONA_MICDET_EINT2 0x1000 /* MICDET_EINT2 */
4613 #define ARIZONA_MICDET_EINT2_MASK 0x1000 /* MICDET_EINT2 */
4614 #define ARIZONA_MICDET_EINT2_SHIFT 12 /* MICDET_EINT2 */
4615 #define ARIZONA_MICDET_EINT2_WIDTH 1 /* MICDET_EINT2 */
4616 #define ARIZONA_WSEQ_DONE_EINT2 0x0800 /* WSEQ_DONE_EINT2 */
4617 #define ARIZONA_WSEQ_DONE_EINT2_MASK 0x0800 /* WSEQ_DONE_EINT2 */
4618 #define ARIZONA_WSEQ_DONE_EINT2_SHIFT 11 /* WSEQ_DONE_EINT2 */
4619 #define ARIZONA_WSEQ_DONE_EINT2_WIDTH 1 /* WSEQ_DONE_EINT2 */
4620 #define ARIZONA_DRC2_SIG_DET_EINT2 0x0400 /* DRC2_SIG_DET_EINT2 */
4621 #define ARIZONA_DRC2_SIG_DET_EINT2_MASK 0x0400 /* DRC2_SIG_DET_EINT2 */
4622 #define ARIZONA_DRC2_SIG_DET_EINT2_SHIFT 10 /* DRC2_SIG_DET_EINT2 */
4623 #define ARIZONA_DRC2_SIG_DET_EINT2_WIDTH 1 /* DRC2_SIG_DET_EINT2 */
4624 #define ARIZONA_DRC1_SIG_DET_EINT2 0x0200 /* DRC1_SIG_DET_EINT2 */
4625 #define ARIZONA_DRC1_SIG_DET_EINT2_MASK 0x0200 /* DRC1_SIG_DET_EINT2 */
4626 #define ARIZONA_DRC1_SIG_DET_EINT2_SHIFT 9 /* DRC1_SIG_DET_EINT2 */
4627 #define ARIZONA_DRC1_SIG_DET_EINT2_WIDTH 1 /* DRC1_SIG_DET_EINT2 */
4628 #define ARIZONA_ASRC2_LOCK_EINT2 0x0100 /* ASRC2_LOCK_EINT2 */
4629 #define ARIZONA_ASRC2_LOCK_EINT2_MASK 0x0100 /* ASRC2_LOCK_EINT2 */
4630 #define ARIZONA_ASRC2_LOCK_EINT2_SHIFT 8 /* ASRC2_LOCK_EINT2 */
4631 #define ARIZONA_ASRC2_LOCK_EINT2_WIDTH 1 /* ASRC2_LOCK_EINT2 */
4632 #define ARIZONA_ASRC1_LOCK_EINT2 0x0080 /* ASRC1_LOCK_EINT2 */
4633 #define ARIZONA_ASRC1_LOCK_EINT2_MASK 0x0080 /* ASRC1_LOCK_EINT2 */
4634 #define ARIZONA_ASRC1_LOCK_EINT2_SHIFT 7 /* ASRC1_LOCK_EINT2 */
4635 #define ARIZONA_ASRC1_LOCK_EINT2_WIDTH 1 /* ASRC1_LOCK_EINT2 */
4636 #define ARIZONA_UNDERCLOCKED_EINT2 0x0040 /* UNDERCLOCKED_EINT2 */
4637 #define ARIZONA_UNDERCLOCKED_EINT2_MASK 0x0040 /* UNDERCLOCKED_EINT2 */
4638 #define ARIZONA_UNDERCLOCKED_EINT2_SHIFT 6 /* UNDERCLOCKED_EINT2 */
4639 #define ARIZONA_UNDERCLOCKED_EINT2_WIDTH 1 /* UNDERCLOCKED_EINT2 */
4640 #define ARIZONA_OVERCLOCKED_EINT2 0x0020 /* OVERCLOCKED_EINT2 */
4641 #define ARIZONA_OVERCLOCKED_EINT2_MASK 0x0020 /* OVERCLOCKED_EINT2 */
4642 #define ARIZONA_OVERCLOCKED_EINT2_SHIFT 5 /* OVERCLOCKED_EINT2 */
4643 #define ARIZONA_OVERCLOCKED_EINT2_WIDTH 1 /* OVERCLOCKED_EINT2 */
4644 #define ARIZONA_FLL2_LOCK_EINT2 0x0008 /* FLL2_LOCK_EINT2 */
4645 #define ARIZONA_FLL2_LOCK_EINT2_MASK 0x0008 /* FLL2_LOCK_EINT2 */
4646 #define ARIZONA_FLL2_LOCK_EINT2_SHIFT 3 /* FLL2_LOCK_EINT2 */
4647 #define ARIZONA_FLL2_LOCK_EINT2_WIDTH 1 /* FLL2_LOCK_EINT2 */
4648 #define ARIZONA_FLL1_LOCK_EINT2 0x0004 /* FLL1_LOCK_EINT2 */
4649 #define ARIZONA_FLL1_LOCK_EINT2_MASK 0x0004 /* FLL1_LOCK_EINT2 */
4650 #define ARIZONA_FLL1_LOCK_EINT2_SHIFT 2 /* FLL1_LOCK_EINT2 */
4651 #define ARIZONA_FLL1_LOCK_EINT2_WIDTH 1 /* FLL1_LOCK_EINT2 */
4652 #define ARIZONA_CLKGEN_ERR_EINT2 0x0002 /* CLKGEN_ERR_EINT2 */
4653 #define ARIZONA_CLKGEN_ERR_EINT2_MASK 0x0002 /* CLKGEN_ERR_EINT2 */
4654 #define ARIZONA_CLKGEN_ERR_EINT2_SHIFT 1 /* CLKGEN_ERR_EINT2 */
4655 #define ARIZONA_CLKGEN_ERR_EINT2_WIDTH 1 /* CLKGEN_ERR_EINT2 */
4656 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT2 0x0001 /* CLKGEN_ERR_ASYNC_EINT2 */
4657 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT2_MASK 0x0001 /* CLKGEN_ERR_ASYNC_EINT2 */
4658 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT2_SHIFT 0 /* CLKGEN_ERR_ASYNC_EINT2 */
4659 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT2_WIDTH 1 /* CLKGEN_ERR_ASYNC_EINT2 */
4660 
4661 /*
4662  * R3347 (0xD13) - IRQ2 Status 4
4663  */
4664 #define ARIZONA_ASRC_CFG_ERR_EINT2 0x8000 /* ASRC_CFG_ERR_EINT2 */
4665 #define ARIZONA_ASRC_CFG_ERR_EINT2_MASK 0x8000 /* ASRC_CFG_ERR_EINT2 */
4666 #define ARIZONA_ASRC_CFG_ERR_EINT2_SHIFT 15 /* ASRC_CFG_ERR_EINT2 */
4667 #define ARIZONA_ASRC_CFG_ERR_EINT2_WIDTH 1 /* ASRC_CFG_ERR_EINT2 */
4668 #define ARIZONA_AIF3_ERR_EINT2 0x4000 /* AIF3_ERR_EINT2 */
4669 #define ARIZONA_AIF3_ERR_EINT2_MASK 0x4000 /* AIF3_ERR_EINT2 */
4670 #define ARIZONA_AIF3_ERR_EINT2_SHIFT 14 /* AIF3_ERR_EINT2 */
4671 #define ARIZONA_AIF3_ERR_EINT2_WIDTH 1 /* AIF3_ERR_EINT2 */
4672 #define ARIZONA_AIF2_ERR_EINT2 0x2000 /* AIF2_ERR_EINT2 */
4673 #define ARIZONA_AIF2_ERR_EINT2_MASK 0x2000 /* AIF2_ERR_EINT2 */
4674 #define ARIZONA_AIF2_ERR_EINT2_SHIFT 13 /* AIF2_ERR_EINT2 */
4675 #define ARIZONA_AIF2_ERR_EINT2_WIDTH 1 /* AIF2_ERR_EINT2 */
4676 #define ARIZONA_AIF1_ERR_EINT2 0x1000 /* AIF1_ERR_EINT2 */
4677 #define ARIZONA_AIF1_ERR_EINT2_MASK 0x1000 /* AIF1_ERR_EINT2 */
4678 #define ARIZONA_AIF1_ERR_EINT2_SHIFT 12 /* AIF1_ERR_EINT2 */
4679 #define ARIZONA_AIF1_ERR_EINT2_WIDTH 1 /* AIF1_ERR_EINT2 */
4680 #define ARIZONA_CTRLIF_ERR_EINT2 0x0800 /* CTRLIF_ERR_EINT2 */
4681 #define ARIZONA_CTRLIF_ERR_EINT2_MASK 0x0800 /* CTRLIF_ERR_EINT2 */
4682 #define ARIZONA_CTRLIF_ERR_EINT2_SHIFT 11 /* CTRLIF_ERR_EINT2 */
4683 #define ARIZONA_CTRLIF_ERR_EINT2_WIDTH 1 /* CTRLIF_ERR_EINT2 */
4684 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2 0x0400 /* MIXER_DROPPED_SAMPLE_EINT2 */
4685 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2_MASK 0x0400 /* MIXER_DROPPED_SAMPLE_EINT2 */
4686 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2_SHIFT 10 /* MIXER_DROPPED_SAMPLE_EINT2 */
4687 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2_WIDTH 1 /* MIXER_DROPPED_SAMPLE_EINT2 */
4688 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2 0x0200 /* ASYNC_CLK_ENA_LOW_EINT2 */
4689 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2_MASK 0x0200 /* ASYNC_CLK_ENA_LOW_EINT2 */
4690 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2_SHIFT 9 /* ASYNC_CLK_ENA_LOW_EINT2 */
4691 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2_WIDTH 1 /* ASYNC_CLK_ENA_LOW_EINT2 */
4692 #define ARIZONA_SYSCLK_ENA_LOW_EINT2 0x0100 /* SYSCLK_ENA_LOW_EINT2 */
4693 #define ARIZONA_SYSCLK_ENA_LOW_EINT2_MASK 0x0100 /* SYSCLK_ENA_LOW_EINT2 */
4694 #define ARIZONA_SYSCLK_ENA_LOW_EINT2_SHIFT 8 /* SYSCLK_ENA_LOW_EINT2 */
4695 #define ARIZONA_SYSCLK_ENA_LOW_EINT2_WIDTH 1 /* SYSCLK_ENA_LOW_EINT2 */
4696 #define ARIZONA_ISRC1_CFG_ERR_EINT2 0x0080 /* ISRC1_CFG_ERR_EINT2 */
4697 #define ARIZONA_ISRC1_CFG_ERR_EINT2_MASK 0x0080 /* ISRC1_CFG_ERR_EINT2 */
4698 #define ARIZONA_ISRC1_CFG_ERR_EINT2_SHIFT 7 /* ISRC1_CFG_ERR_EINT2 */
4699 #define ARIZONA_ISRC1_CFG_ERR_EINT2_WIDTH 1 /* ISRC1_CFG_ERR_EINT2 */
4700 #define ARIZONA_ISRC2_CFG_ERR_EINT2 0x0040 /* ISRC2_CFG_ERR_EINT2 */
4701 #define ARIZONA_ISRC2_CFG_ERR_EINT2_MASK 0x0040 /* ISRC2_CFG_ERR_EINT2 */
4702 #define ARIZONA_ISRC2_CFG_ERR_EINT2_SHIFT 6 /* ISRC2_CFG_ERR_EINT2 */
4703 #define ARIZONA_ISRC2_CFG_ERR_EINT2_WIDTH 1 /* ISRC2_CFG_ERR_EINT2 */
4704 
4705 /*
4706  * R3348 (0xD14) - IRQ2 Status 5
4707  */
4708 #define ARIZONA_BOOT_DONE_EINT2 0x0100 /* BOOT_DONE_EINT2 */
4709 #define ARIZONA_BOOT_DONE_EINT2_MASK 0x0100 /* BOOT_DONE_EINT2 */
4710 #define ARIZONA_BOOT_DONE_EINT2_SHIFT 8 /* BOOT_DONE_EINT2 */
4711 #define ARIZONA_BOOT_DONE_EINT2_WIDTH 1 /* BOOT_DONE_EINT2 */
4712 #define ARIZONA_DCS_DAC_DONE_EINT2 0x0080 /* DCS_DAC_DONE_EINT2 */
4713 #define ARIZONA_DCS_DAC_DONE_EINT2_MASK 0x0080 /* DCS_DAC_DONE_EINT2 */
4714 #define ARIZONA_DCS_DAC_DONE_EINT2_SHIFT 7 /* DCS_DAC_DONE_EINT2 */
4715 #define ARIZONA_DCS_DAC_DONE_EINT2_WIDTH 1 /* DCS_DAC_DONE_EINT2 */
4716 #define ARIZONA_DCS_HP_DONE_EINT2 0x0040 /* DCS_HP_DONE_EINT2 */
4717 #define ARIZONA_DCS_HP_DONE_EINT2_MASK 0x0040 /* DCS_HP_DONE_EINT2 */
4718 #define ARIZONA_DCS_HP_DONE_EINT2_SHIFT 6 /* DCS_HP_DONE_EINT2 */
4719 #define ARIZONA_DCS_HP_DONE_EINT2_WIDTH 1 /* DCS_HP_DONE_EINT2 */
4720 #define ARIZONA_FLL2_CLOCK_OK_EINT2 0x0002 /* FLL2_CLOCK_OK_EINT2 */
4721 #define ARIZONA_FLL2_CLOCK_OK_EINT2_MASK 0x0002 /* FLL2_CLOCK_OK_EINT2 */
4722 #define ARIZONA_FLL2_CLOCK_OK_EINT2_SHIFT 1 /* FLL2_CLOCK_OK_EINT2 */
4723 #define ARIZONA_FLL2_CLOCK_OK_EINT2_WIDTH 1 /* FLL2_CLOCK_OK_EINT2 */
4724 #define ARIZONA_FLL1_CLOCK_OK_EINT2 0x0001 /* FLL1_CLOCK_OK_EINT2 */
4725 #define ARIZONA_FLL1_CLOCK_OK_EINT2_MASK 0x0001 /* FLL1_CLOCK_OK_EINT2 */
4726 #define ARIZONA_FLL1_CLOCK_OK_EINT2_SHIFT 0 /* FLL1_CLOCK_OK_EINT2 */
4727 #define ARIZONA_FLL1_CLOCK_OK_EINT2_WIDTH 1 /* FLL1_CLOCK_OK_EINT2 */
4728 
4729 /*
4730  * R3352 (0xD18) - IRQ2 Status 1 Mask
4731  */
4732 #define ARIZONA_IM_GP4_EINT2 0x0008 /* IM_GP4_EINT2 */
4733 #define ARIZONA_IM_GP4_EINT2_MASK 0x0008 /* IM_GP4_EINT2 */
4734 #define ARIZONA_IM_GP4_EINT2_SHIFT 3 /* IM_GP4_EINT2 */
4735 #define ARIZONA_IM_GP4_EINT2_WIDTH 1 /* IM_GP4_EINT2 */
4736 #define ARIZONA_IM_GP3_EINT2 0x0004 /* IM_GP3_EINT2 */
4737 #define ARIZONA_IM_GP3_EINT2_MASK 0x0004 /* IM_GP3_EINT2 */
4738 #define ARIZONA_IM_GP3_EINT2_SHIFT 2 /* IM_GP3_EINT2 */
4739 #define ARIZONA_IM_GP3_EINT2_WIDTH 1 /* IM_GP3_EINT2 */
4740 #define ARIZONA_IM_GP2_EINT2 0x0002 /* IM_GP2_EINT2 */
4741 #define ARIZONA_IM_GP2_EINT2_MASK 0x0002 /* IM_GP2_EINT2 */
4742 #define ARIZONA_IM_GP2_EINT2_SHIFT 1 /* IM_GP2_EINT2 */
4743 #define ARIZONA_IM_GP2_EINT2_WIDTH 1 /* IM_GP2_EINT2 */
4744 #define ARIZONA_IM_GP1_EINT2 0x0001 /* IM_GP1_EINT2 */
4745 #define ARIZONA_IM_GP1_EINT2_MASK 0x0001 /* IM_GP1_EINT2 */
4746 #define ARIZONA_IM_GP1_EINT2_SHIFT 0 /* IM_GP1_EINT2 */
4747 #define ARIZONA_IM_GP1_EINT2_WIDTH 1 /* IM_GP1_EINT2 */
4748 
4749 /*
4750  * R3353 (0xD19) - IRQ2 Status 2 Mask
4751  */
4752 #define ARIZONA_IM_DSP1_RAM_RDY_EINT2 0x0100 /* IM_DSP1_RAM_RDY_EINT2 */
4753 #define ARIZONA_IM_DSP1_RAM_RDY_EINT2_MASK 0x0100 /* IM_DSP1_RAM_RDY_EINT2 */
4754 #define ARIZONA_IM_DSP1_RAM_RDY_EINT2_SHIFT 8 /* IM_DSP1_RAM_RDY_EINT2 */
4755 #define ARIZONA_IM_DSP1_RAM_RDY_EINT2_WIDTH 1 /* IM_DSP1_RAM_RDY_EINT2 */
4756 #define ARIZONA_IM_DSP_IRQ2_EINT2 0x0002 /* IM_DSP_IRQ2_EINT2 */
4757 #define ARIZONA_IM_DSP_IRQ2_EINT2_MASK 0x0002 /* IM_DSP_IRQ2_EINT2 */
4758 #define ARIZONA_IM_DSP_IRQ2_EINT2_SHIFT 1 /* IM_DSP_IRQ2_EINT2 */
4759 #define ARIZONA_IM_DSP_IRQ2_EINT2_WIDTH 1 /* IM_DSP_IRQ2_EINT2 */
4760 #define ARIZONA_IM_DSP_IRQ1_EINT2 0x0001 /* IM_DSP_IRQ1_EINT2 */
4761 #define ARIZONA_IM_DSP_IRQ1_EINT2_MASK 0x0001 /* IM_DSP_IRQ1_EINT2 */
4762 #define ARIZONA_IM_DSP_IRQ1_EINT2_SHIFT 0 /* IM_DSP_IRQ1_EINT2 */
4763 #define ARIZONA_IM_DSP_IRQ1_EINT2_WIDTH 1 /* IM_DSP_IRQ1_EINT2 */
4764 
4765 /*
4766  * R3354 (0xD1A) - IRQ2 Status 3 Mask
4767  */
4768 #define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2 0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT2 */
4769 #define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2_MASK 0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT2 */
4770 #define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2_SHIFT 15 /* IM_SPK_SHUTDOWN_WARN_EINT2 */
4771 #define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2_WIDTH 1 /* IM_SPK_SHUTDOWN_WARN_EINT2 */
4772 #define ARIZONA_IM_SPK_SHUTDOWN_EINT2 0x4000 /* IM_SPK_SHUTDOWN_EINT2 */
4773 #define ARIZONA_IM_SPK_SHUTDOWN_EINT2_MASK 0x4000 /* IM_SPK_SHUTDOWN_EINT2 */
4774 #define ARIZONA_IM_SPK_SHUTDOWN_EINT2_SHIFT 14 /* IM_SPK_SHUTDOWN_EINT2 */
4775 #define ARIZONA_IM_SPK_SHUTDOWN_EINT2_WIDTH 1 /* IM_SPK_SHUTDOWN_EINT2 */
4776 #define ARIZONA_IM_HPDET_EINT2 0x2000 /* IM_HPDET_EINT2 */
4777 #define ARIZONA_IM_HPDET_EINT2_MASK 0x2000 /* IM_HPDET_EINT2 */
4778 #define ARIZONA_IM_HPDET_EINT2_SHIFT 13 /* IM_HPDET_EINT2 */
4779 #define ARIZONA_IM_HPDET_EINT2_WIDTH 1 /* IM_HPDET_EINT2 */
4780 #define ARIZONA_IM_MICDET_EINT2 0x1000 /* IM_MICDET_EINT2 */
4781 #define ARIZONA_IM_MICDET_EINT2_MASK 0x1000 /* IM_MICDET_EINT2 */
4782 #define ARIZONA_IM_MICDET_EINT2_SHIFT 12 /* IM_MICDET_EINT2 */
4783 #define ARIZONA_IM_MICDET_EINT2_WIDTH 1 /* IM_MICDET_EINT2 */
4784 #define ARIZONA_IM_WSEQ_DONE_EINT2 0x0800 /* IM_WSEQ_DONE_EINT2 */
4785 #define ARIZONA_IM_WSEQ_DONE_EINT2_MASK 0x0800 /* IM_WSEQ_DONE_EINT2 */
4786 #define ARIZONA_IM_WSEQ_DONE_EINT2_SHIFT 11 /* IM_WSEQ_DONE_EINT2 */
4787 #define ARIZONA_IM_WSEQ_DONE_EINT2_WIDTH 1 /* IM_WSEQ_DONE_EINT2 */
4788 #define ARIZONA_IM_DRC2_SIG_DET_EINT2 0x0400 /* IM_DRC2_SIG_DET_EINT2 */
4789 #define ARIZONA_IM_DRC2_SIG_DET_EINT2_MASK 0x0400 /* IM_DRC2_SIG_DET_EINT2 */
4790 #define ARIZONA_IM_DRC2_SIG_DET_EINT2_SHIFT 10 /* IM_DRC2_SIG_DET_EINT2 */
4791 #define ARIZONA_IM_DRC2_SIG_DET_EINT2_WIDTH 1 /* IM_DRC2_SIG_DET_EINT2 */
4792 #define ARIZONA_IM_DRC1_SIG_DET_EINT2 0x0200 /* IM_DRC1_SIG_DET_EINT2 */
4793 #define ARIZONA_IM_DRC1_SIG_DET_EINT2_MASK 0x0200 /* IM_DRC1_SIG_DET_EINT2 */
4794 #define ARIZONA_IM_DRC1_SIG_DET_EINT2_SHIFT 9 /* IM_DRC1_SIG_DET_EINT2 */
4795 #define ARIZONA_IM_DRC1_SIG_DET_EINT2_WIDTH 1 /* IM_DRC1_SIG_DET_EINT2 */
4796 #define ARIZONA_IM_ASRC2_LOCK_EINT2 0x0100 /* IM_ASRC2_LOCK_EINT2 */
4797 #define ARIZONA_IM_ASRC2_LOCK_EINT2_MASK 0x0100 /* IM_ASRC2_LOCK_EINT2 */
4798 #define ARIZONA_IM_ASRC2_LOCK_EINT2_SHIFT 8 /* IM_ASRC2_LOCK_EINT2 */
4799 #define ARIZONA_IM_ASRC2_LOCK_EINT2_WIDTH 1 /* IM_ASRC2_LOCK_EINT2 */
4800 #define ARIZONA_IM_ASRC1_LOCK_EINT2 0x0080 /* IM_ASRC1_LOCK_EINT2 */
4801 #define ARIZONA_IM_ASRC1_LOCK_EINT2_MASK 0x0080 /* IM_ASRC1_LOCK_EINT2 */
4802 #define ARIZONA_IM_ASRC1_LOCK_EINT2_SHIFT 7 /* IM_ASRC1_LOCK_EINT2 */
4803 #define ARIZONA_IM_ASRC1_LOCK_EINT2_WIDTH 1 /* IM_ASRC1_LOCK_EINT2 */
4804 #define ARIZONA_IM_UNDERCLOCKED_EINT2 0x0040 /* IM_UNDERCLOCKED_EINT2 */
4805 #define ARIZONA_IM_UNDERCLOCKED_EINT2_MASK 0x0040 /* IM_UNDERCLOCKED_EINT2 */
4806 #define ARIZONA_IM_UNDERCLOCKED_EINT2_SHIFT 6 /* IM_UNDERCLOCKED_EINT2 */
4807 #define ARIZONA_IM_UNDERCLOCKED_EINT2_WIDTH 1 /* IM_UNDERCLOCKED_EINT2 */
4808 #define ARIZONA_IM_OVERCLOCKED_EINT2 0x0020 /* IM_OVERCLOCKED_EINT2 */
4809 #define ARIZONA_IM_OVERCLOCKED_EINT2_MASK 0x0020 /* IM_OVERCLOCKED_EINT2 */
4810 #define ARIZONA_IM_OVERCLOCKED_EINT2_SHIFT 5 /* IM_OVERCLOCKED_EINT2 */
4811 #define ARIZONA_IM_OVERCLOCKED_EINT2_WIDTH 1 /* IM_OVERCLOCKED_EINT2 */
4812 #define ARIZONA_IM_FLL2_LOCK_EINT2 0x0008 /* IM_FLL2_LOCK_EINT2 */
4813 #define ARIZONA_IM_FLL2_LOCK_EINT2_MASK 0x0008 /* IM_FLL2_LOCK_EINT2 */
4814 #define ARIZONA_IM_FLL2_LOCK_EINT2_SHIFT 3 /* IM_FLL2_LOCK_EINT2 */
4815 #define ARIZONA_IM_FLL2_LOCK_EINT2_WIDTH 1 /* IM_FLL2_LOCK_EINT2 */
4816 #define ARIZONA_IM_FLL1_LOCK_EINT2 0x0004 /* IM_FLL1_LOCK_EINT2 */
4817 #define ARIZONA_IM_FLL1_LOCK_EINT2_MASK 0x0004 /* IM_FLL1_LOCK_EINT2 */
4818 #define ARIZONA_IM_FLL1_LOCK_EINT2_SHIFT 2 /* IM_FLL1_LOCK_EINT2 */
4819 #define ARIZONA_IM_FLL1_LOCK_EINT2_WIDTH 1 /* IM_FLL1_LOCK_EINT2 */
4820 #define ARIZONA_IM_CLKGEN_ERR_EINT2 0x0002 /* IM_CLKGEN_ERR_EINT2 */
4821 #define ARIZONA_IM_CLKGEN_ERR_EINT2_MASK 0x0002 /* IM_CLKGEN_ERR_EINT2 */
4822 #define ARIZONA_IM_CLKGEN_ERR_EINT2_SHIFT 1 /* IM_CLKGEN_ERR_EINT2 */
4823 #define ARIZONA_IM_CLKGEN_ERR_EINT2_WIDTH 1 /* IM_CLKGEN_ERR_EINT2 */
4824 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2 0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT2 */
4825 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2_MASK 0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT2 */
4826 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2_SHIFT 0 /* IM_CLKGEN_ERR_ASYNC_EINT2 */
4827 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2_WIDTH 1 /* IM_CLKGEN_ERR_ASYNC_EINT2 */
4828 
4829 /*
4830  * R3355 (0xD1B) - IRQ2 Status 4 Mask
4831  */
4832 #define ARIZONA_IM_ASRC_CFG_ERR_EINT2 0x8000 /* IM_ASRC_CFG_ERR_EINT2 */
4833 #define ARIZONA_IM_ASRC_CFG_ERR_EINT2_MASK 0x8000 /* IM_ASRC_CFG_ERR_EINT2 */
4834 #define ARIZONA_IM_ASRC_CFG_ERR_EINT2_SHIFT 15 /* IM_ASRC_CFG_ERR_EINT2 */
4835 #define ARIZONA_IM_ASRC_CFG_ERR_EINT2_WIDTH 1 /* IM_ASRC_CFG_ERR_EINT2 */
4836 #define ARIZONA_IM_AIF3_ERR_EINT2 0x4000 /* IM_AIF3_ERR_EINT2 */
4837 #define ARIZONA_IM_AIF3_ERR_EINT2_MASK 0x4000 /* IM_AIF3_ERR_EINT2 */
4838 #define ARIZONA_IM_AIF3_ERR_EINT2_SHIFT 14 /* IM_AIF3_ERR_EINT2 */
4839 #define ARIZONA_IM_AIF3_ERR_EINT2_WIDTH 1 /* IM_AIF3_ERR_EINT2 */
4840 #define ARIZONA_IM_AIF2_ERR_EINT2 0x2000 /* IM_AIF2_ERR_EINT2 */
4841 #define ARIZONA_IM_AIF2_ERR_EINT2_MASK 0x2000 /* IM_AIF2_ERR_EINT2 */
4842 #define ARIZONA_IM_AIF2_ERR_EINT2_SHIFT 13 /* IM_AIF2_ERR_EINT2 */
4843 #define ARIZONA_IM_AIF2_ERR_EINT2_WIDTH 1 /* IM_AIF2_ERR_EINT2 */
4844 #define ARIZONA_IM_AIF1_ERR_EINT2 0x1000 /* IM_AIF1_ERR_EINT2 */
4845 #define ARIZONA_IM_AIF1_ERR_EINT2_MASK 0x1000 /* IM_AIF1_ERR_EINT2 */
4846 #define ARIZONA_IM_AIF1_ERR_EINT2_SHIFT 12 /* IM_AIF1_ERR_EINT2 */
4847 #define ARIZONA_IM_AIF1_ERR_EINT2_WIDTH 1 /* IM_AIF1_ERR_EINT2 */
4848 #define ARIZONA_IM_CTRLIF_ERR_EINT2 0x0800 /* IM_CTRLIF_ERR_EINT2 */
4849 #define ARIZONA_IM_CTRLIF_ERR_EINT2_MASK 0x0800 /* IM_CTRLIF_ERR_EINT2 */
4850 #define ARIZONA_IM_CTRLIF_ERR_EINT2_SHIFT 11 /* IM_CTRLIF_ERR_EINT2 */
4851 #define ARIZONA_IM_CTRLIF_ERR_EINT2_WIDTH 1 /* IM_CTRLIF_ERR_EINT2 */
4852 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
4853 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_MASK 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
4854 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_SHIFT 10 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
4855 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_WIDTH 1 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
4856 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
4857 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_MASK 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
4858 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_SHIFT 9 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
4859 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_WIDTH 1 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
4860 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2 0x0100 /* IM_SYSCLK_ENA_LOW_EINT2 */
4861 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_MASK 0x0100 /* IM_SYSCLK_ENA_LOW_EINT2 */
4862 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_SHIFT 8 /* IM_SYSCLK_ENA_LOW_EINT2 */
4863 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_WIDTH 1 /* IM_SYSCLK_ENA_LOW_EINT2 */
4864 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT2 0x0080 /* IM_ISRC1_CFG_ERR_EINT2 */
4865 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_MASK 0x0080 /* IM_ISRC1_CFG_ERR_EINT2 */
4866 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_SHIFT 7 /* IM_ISRC1_CFG_ERR_EINT2 */
4867 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_WIDTH 1 /* IM_ISRC1_CFG_ERR_EINT2 */
4868 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT2 0x0040 /* IM_ISRC2_CFG_ERR_EINT2 */
4869 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_MASK 0x0040 /* IM_ISRC2_CFG_ERR_EINT2 */
4870 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_SHIFT 6 /* IM_ISRC2_CFG_ERR_EINT2 */
4871 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_WIDTH 1 /* IM_ISRC2_CFG_ERR_EINT2 */
4872 
4873 /*
4874  * R3356 (0xD1C) - IRQ2 Status 5 Mask
4875  */
4876 
4877 #define ARIZONA_IM_BOOT_DONE_EINT2 0x0100 /* IM_BOOT_DONE_EINT2 */
4878 #define ARIZONA_IM_BOOT_DONE_EINT2_MASK 0x0100 /* IM_BOOT_DONE_EINT2 */
4879 #define ARIZONA_IM_BOOT_DONE_EINT2_SHIFT 8 /* IM_BOOT_DONE_EINT2 */
4880 #define ARIZONA_IM_BOOT_DONE_EINT2_WIDTH 1 /* IM_BOOT_DONE_EINT2 */
4881 #define ARIZONA_IM_DCS_DAC_DONE_EINT2 0x0080 /* IM_DCS_DAC_DONE_EINT2 */
4882 #define ARIZONA_IM_DCS_DAC_DONE_EINT2_MASK 0x0080 /* IM_DCS_DAC_DONE_EINT2 */
4883 #define ARIZONA_IM_DCS_DAC_DONE_EINT2_SHIFT 7 /* IM_DCS_DAC_DONE_EINT2 */
4884 #define ARIZONA_IM_DCS_DAC_DONE_EINT2_WIDTH 1 /* IM_DCS_DAC_DONE_EINT2 */
4885 #define ARIZONA_IM_DCS_HP_DONE_EINT2 0x0040 /* IM_DCS_HP_DONE_EINT2 */
4886 #define ARIZONA_IM_DCS_HP_DONE_EINT2_MASK 0x0040 /* IM_DCS_HP_DONE_EINT2 */
4887 #define ARIZONA_IM_DCS_HP_DONE_EINT2_SHIFT 6 /* IM_DCS_HP_DONE_EINT2 */
4888 #define ARIZONA_IM_DCS_HP_DONE_EINT2_WIDTH 1 /* IM_DCS_HP_DONE_EINT2 */
4889 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT2 0x0002 /* IM_FLL2_CLOCK_OK_EINT2 */
4890 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT2_MASK 0x0002 /* IM_FLL2_CLOCK_OK_EINT2 */
4891 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT2_SHIFT 1 /* IM_FLL2_CLOCK_OK_EINT2 */
4892 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT2_WIDTH 1 /* IM_FLL2_CLOCK_OK_EINT2 */
4893 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT2 0x0001 /* IM_FLL1_CLOCK_OK_EINT2 */
4894 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_MASK 0x0001 /* IM_FLL1_CLOCK_OK_EINT2 */
4895 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_SHIFT 0 /* IM_FLL1_CLOCK_OK_EINT2 */
4896 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_WIDTH 1 /* IM_FLL1_CLOCK_OK_EINT2 */
4897 
4898 /*
4899  * R3359 (0xD1F) - IRQ2 Control
4900  */
4901 #define ARIZONA_IM_IRQ2 0x0001 /* IM_IRQ2 */
4902 #define ARIZONA_IM_IRQ2_MASK 0x0001 /* IM_IRQ2 */
4903 #define ARIZONA_IM_IRQ2_SHIFT 0 /* IM_IRQ2 */
4904 #define ARIZONA_IM_IRQ2_WIDTH 1 /* IM_IRQ2 */
4905 
4906 /*
4907  * R3360 (0xD20) - Interrupt Raw Status 2
4908  */
4909 #define ARIZONA_DSP1_RAM_RDY_STS 0x0100 /* DSP1_RAM_RDY_STS */
4910 #define ARIZONA_DSP1_RAM_RDY_STS_MASK 0x0100 /* DSP1_RAM_RDY_STS */
4911 #define ARIZONA_DSP1_RAM_RDY_STS_SHIFT 8 /* DSP1_RAM_RDY_STS */
4912 #define ARIZONA_DSP1_RAM_RDY_STS_WIDTH 1 /* DSP1_RAM_RDY_STS */
4913 #define ARIZONA_DSP_IRQ2_STS 0x0002 /* DSP_IRQ2_STS */
4914 #define ARIZONA_DSP_IRQ2_STS_MASK 0x0002 /* DSP_IRQ2_STS */
4915 #define ARIZONA_DSP_IRQ2_STS_SHIFT 1 /* DSP_IRQ2_STS */
4916 #define ARIZONA_DSP_IRQ2_STS_WIDTH 1 /* DSP_IRQ2_STS */
4917 #define ARIZONA_DSP_IRQ1_STS 0x0001 /* DSP_IRQ1_STS */
4918 #define ARIZONA_DSP_IRQ1_STS_MASK 0x0001 /* DSP_IRQ1_STS */
4919 #define ARIZONA_DSP_IRQ1_STS_SHIFT 0 /* DSP_IRQ1_STS */
4920 #define ARIZONA_DSP_IRQ1_STS_WIDTH 1 /* DSP_IRQ1_STS */
4921 
4922 /*
4923  * R3361 (0xD21) - Interrupt Raw Status 3
4924  */
4925 #define ARIZONA_SPK_SHUTDOWN_WARN_STS 0x8000 /* SPK_SHUTDOWN_WARN_STS */
4926 #define ARIZONA_SPK_SHUTDOWN_WARN_STS_MASK 0x8000 /* SPK_SHUTDOWN_WARN_STS */
4927 #define ARIZONA_SPK_SHUTDOWN_WARN_STS_SHIFT 15 /* SPK_SHUTDOWN_WARN_STS */
4928 #define ARIZONA_SPK_SHUTDOWN_WARN_STS_WIDTH 1 /* SPK_SHUTDOWN_WARN_STS */
4929 #define ARIZONA_SPK_SHUTDOWN_STS 0x4000 /* SPK_SHUTDOWN_STS */
4930 #define ARIZONA_SPK_SHUTDOWN_STS_MASK 0x4000 /* SPK_SHUTDOWN_STS */
4931 #define ARIZONA_SPK_SHUTDOWN_STS_SHIFT 14 /* SPK_SHUTDOWN_STS */
4932 #define ARIZONA_SPK_SHUTDOWN_STS_WIDTH 1 /* SPK_SHUTDOWN_STS */
4933 #define ARIZONA_HPDET_STS 0x2000 /* HPDET_STS */
4934 #define ARIZONA_HPDET_STS_MASK 0x2000 /* HPDET_STS */
4935 #define ARIZONA_HPDET_STS_SHIFT 13 /* HPDET_STS */
4936 #define ARIZONA_HPDET_STS_WIDTH 1 /* HPDET_STS */
4937 #define ARIZONA_MICDET_STS 0x1000 /* MICDET_STS */
4938 #define ARIZONA_MICDET_STS_MASK 0x1000 /* MICDET_STS */
4939 #define ARIZONA_MICDET_STS_SHIFT 12 /* MICDET_STS */
4940 #define ARIZONA_MICDET_STS_WIDTH 1 /* MICDET_STS */
4941 #define ARIZONA_WSEQ_DONE_STS 0x0800 /* WSEQ_DONE_STS */
4942 #define ARIZONA_WSEQ_DONE_STS_MASK 0x0800 /* WSEQ_DONE_STS */
4943 #define ARIZONA_WSEQ_DONE_STS_SHIFT 11 /* WSEQ_DONE_STS */
4944 #define ARIZONA_WSEQ_DONE_STS_WIDTH 1 /* WSEQ_DONE_STS */
4945 #define ARIZONA_DRC2_SIG_DET_STS 0x0400 /* DRC2_SIG_DET_STS */
4946 #define ARIZONA_DRC2_SIG_DET_STS_MASK 0x0400 /* DRC2_SIG_DET_STS */
4947 #define ARIZONA_DRC2_SIG_DET_STS_SHIFT 10 /* DRC2_SIG_DET_STS */
4948 #define ARIZONA_DRC2_SIG_DET_STS_WIDTH 1 /* DRC2_SIG_DET_STS */
4949 #define ARIZONA_DRC1_SIG_DET_STS 0x0200 /* DRC1_SIG_DET_STS */
4950 #define ARIZONA_DRC1_SIG_DET_STS_MASK 0x0200 /* DRC1_SIG_DET_STS */
4951 #define ARIZONA_DRC1_SIG_DET_STS_SHIFT 9 /* DRC1_SIG_DET_STS */
4952 #define ARIZONA_DRC1_SIG_DET_STS_WIDTH 1 /* DRC1_SIG_DET_STS */
4953 #define ARIZONA_ASRC2_LOCK_STS 0x0100 /* ASRC2_LOCK_STS */
4954 #define ARIZONA_ASRC2_LOCK_STS_MASK 0x0100 /* ASRC2_LOCK_STS */
4955 #define ARIZONA_ASRC2_LOCK_STS_SHIFT 8 /* ASRC2_LOCK_STS */
4956 #define ARIZONA_ASRC2_LOCK_STS_WIDTH 1 /* ASRC2_LOCK_STS */
4957 #define ARIZONA_ASRC1_LOCK_STS 0x0080 /* ASRC1_LOCK_STS */
4958 #define ARIZONA_ASRC1_LOCK_STS_MASK 0x0080 /* ASRC1_LOCK_STS */
4959 #define ARIZONA_ASRC1_LOCK_STS_SHIFT 7 /* ASRC1_LOCK_STS */
4960 #define ARIZONA_ASRC1_LOCK_STS_WIDTH 1 /* ASRC1_LOCK_STS */
4961 #define ARIZONA_UNDERCLOCKED_STS 0x0040 /* UNDERCLOCKED_STS */
4962 #define ARIZONA_UNDERCLOCKED_STS_MASK 0x0040 /* UNDERCLOCKED_STS */
4963 #define ARIZONA_UNDERCLOCKED_STS_SHIFT 6 /* UNDERCLOCKED_STS */
4964 #define ARIZONA_UNDERCLOCKED_STS_WIDTH 1 /* UNDERCLOCKED_STS */
4965 #define ARIZONA_OVERCLOCKED_STS 0x0020 /* OVERCLOCKED_STS */
4966 #define ARIZONA_OVERCLOCKED_STS_MASK 0x0020 /* OVERCLOCKED_STS */
4967 #define ARIZONA_OVERCLOCKED_STS_SHIFT 5 /* OVERCLOCKED_STS */
4968 #define ARIZONA_OVERCLOCKED_STS_WIDTH 1 /* OVERCLOCKED_STS */
4969 #define ARIZONA_FLL2_LOCK_STS 0x0008 /* FLL2_LOCK_STS */
4970 #define ARIZONA_FLL2_LOCK_STS_MASK 0x0008 /* FLL2_LOCK_STS */
4971 #define ARIZONA_FLL2_LOCK_STS_SHIFT 3 /* FLL2_LOCK_STS */
4972 #define ARIZONA_FLL2_LOCK_STS_WIDTH 1 /* FLL2_LOCK_STS */
4973 #define ARIZONA_FLL1_LOCK_STS 0x0004 /* FLL1_LOCK_STS */
4974 #define ARIZONA_FLL1_LOCK_STS_MASK 0x0004 /* FLL1_LOCK_STS */
4975 #define ARIZONA_FLL1_LOCK_STS_SHIFT 2 /* FLL1_LOCK_STS */
4976 #define ARIZONA_FLL1_LOCK_STS_WIDTH 1 /* FLL1_LOCK_STS */
4977 #define ARIZONA_CLKGEN_ERR_STS 0x0002 /* CLKGEN_ERR_STS */
4978 #define ARIZONA_CLKGEN_ERR_STS_MASK 0x0002 /* CLKGEN_ERR_STS */
4979 #define ARIZONA_CLKGEN_ERR_STS_SHIFT 1 /* CLKGEN_ERR_STS */
4980 #define ARIZONA_CLKGEN_ERR_STS_WIDTH 1 /* CLKGEN_ERR_STS */
4981 #define ARIZONA_CLKGEN_ERR_ASYNC_STS 0x0001 /* CLKGEN_ERR_ASYNC_STS */
4982 #define ARIZONA_CLKGEN_ERR_ASYNC_STS_MASK 0x0001 /* CLKGEN_ERR_ASYNC_STS */
4983 #define ARIZONA_CLKGEN_ERR_ASYNC_STS_SHIFT 0 /* CLKGEN_ERR_ASYNC_STS */
4984 #define ARIZONA_CLKGEN_ERR_ASYNC_STS_WIDTH 1 /* CLKGEN_ERR_ASYNC_STS */
4985 
4986 /*
4987  * R3362 (0xD22) - Interrupt Raw Status 4
4988  */
4989 #define ARIZONA_ASRC_CFG_ERR_STS 0x8000 /* ASRC_CFG_ERR_STS */
4990 #define ARIZONA_ASRC_CFG_ERR_STS_MASK 0x8000 /* ASRC_CFG_ERR_STS */
4991 #define ARIZONA_ASRC_CFG_ERR_STS_SHIFT 15 /* ASRC_CFG_ERR_STS */
4992 #define ARIZONA_ASRC_CFG_ERR_STS_WIDTH 1 /* ASRC_CFG_ERR_STS */
4993 #define ARIZONA_AIF3_ERR_STS 0x4000 /* AIF3_ERR_STS */
4994 #define ARIZONA_AIF3_ERR_STS_MASK 0x4000 /* AIF3_ERR_STS */
4995 #define ARIZONA_AIF3_ERR_STS_SHIFT 14 /* AIF3_ERR_STS */
4996 #define ARIZONA_AIF3_ERR_STS_WIDTH 1 /* AIF3_ERR_STS */
4997 #define ARIZONA_AIF2_ERR_STS 0x2000 /* AIF2_ERR_STS */
4998 #define ARIZONA_AIF2_ERR_STS_MASK 0x2000 /* AIF2_ERR_STS */
4999 #define ARIZONA_AIF2_ERR_STS_SHIFT 13 /* AIF2_ERR_STS */
5000 #define ARIZONA_AIF2_ERR_STS_WIDTH 1 /* AIF2_ERR_STS */
5001 #define ARIZONA_AIF1_ERR_STS 0x1000 /* AIF1_ERR_STS */
5002 #define ARIZONA_AIF1_ERR_STS_MASK 0x1000 /* AIF1_ERR_STS */
5003 #define ARIZONA_AIF1_ERR_STS_SHIFT 12 /* AIF1_ERR_STS */
5004 #define ARIZONA_AIF1_ERR_STS_WIDTH 1 /* AIF1_ERR_STS */
5005 #define ARIZONA_CTRLIF_ERR_STS 0x0800 /* CTRLIF_ERR_STS */
5006 #define ARIZONA_CTRLIF_ERR_STS_MASK 0x0800 /* CTRLIF_ERR_STS */
5007 #define ARIZONA_CTRLIF_ERR_STS_SHIFT 11 /* CTRLIF_ERR_STS */
5008 #define ARIZONA_CTRLIF_ERR_STS_WIDTH 1 /* CTRLIF_ERR_STS */
5009 #define ARIZONA_MIXER_DROPPED_SAMPLE_STS 0x0400 /* MIXER_DROPPED_SAMPLE_STS */
5010 #define ARIZONA_MIXER_DROPPED_SAMPLE_STS_MASK 0x0400 /* MIXER_DROPPED_SAMPLE_STS */
5011 #define ARIZONA_MIXER_DROPPED_SAMPLE_STS_SHIFT 10 /* MIXER_DROPPED_SAMPLE_STS */
5012 #define ARIZONA_MIXER_DROPPED_SAMPLE_STS_WIDTH 1 /* MIXER_DROPPED_SAMPLE_STS */
5013 #define ARIZONA_ASYNC_CLK_ENA_LOW_STS 0x0200 /* ASYNC_CLK_ENA_LOW_STS */
5014 #define ARIZONA_ASYNC_CLK_ENA_LOW_STS_MASK 0x0200 /* ASYNC_CLK_ENA_LOW_STS */
5015 #define ARIZONA_ASYNC_CLK_ENA_LOW_STS_SHIFT 9 /* ASYNC_CLK_ENA_LOW_STS */
5016 #define ARIZONA_ASYNC_CLK_ENA_LOW_STS_WIDTH 1 /* ASYNC_CLK_ENA_LOW_STS */
5017 #define ARIZONA_SYSCLK_ENA_LOW_STS 0x0100 /* SYSCLK_ENA_LOW_STS */
5018 #define ARIZONA_SYSCLK_ENA_LOW_STS_MASK 0x0100 /* SYSCLK_ENA_LOW_STS */
5019 #define ARIZONA_SYSCLK_ENA_LOW_STS_SHIFT 8 /* SYSCLK_ENA_LOW_STS */
5020 #define ARIZONA_SYSCLK_ENA_LOW_STS_WIDTH 1 /* SYSCLK_ENA_LOW_STS */
5021 #define ARIZONA_ISRC1_CFG_ERR_STS 0x0080 /* ISRC1_CFG_ERR_STS */
5022 #define ARIZONA_ISRC1_CFG_ERR_STS_MASK 0x0080 /* ISRC1_CFG_ERR_STS */
5023 #define ARIZONA_ISRC1_CFG_ERR_STS_SHIFT 7 /* ISRC1_CFG_ERR_STS */
5024 #define ARIZONA_ISRC1_CFG_ERR_STS_WIDTH 1 /* ISRC1_CFG_ERR_STS */
5025 #define ARIZONA_ISRC2_CFG_ERR_STS 0x0040 /* ISRC2_CFG_ERR_STS */
5026 #define ARIZONA_ISRC2_CFG_ERR_STS_MASK 0x0040 /* ISRC2_CFG_ERR_STS */
5027 #define ARIZONA_ISRC2_CFG_ERR_STS_SHIFT 6 /* ISRC2_CFG_ERR_STS */
5028 #define ARIZONA_ISRC2_CFG_ERR_STS_WIDTH 1 /* ISRC2_CFG_ERR_STS */
5029 
5030 /*
5031  * R3363 (0xD23) - Interrupt Raw Status 5
5032  */
5033 #define ARIZONA_BOOT_DONE_STS 0x0100 /* BOOT_DONE_STS */
5034 #define ARIZONA_BOOT_DONE_STS_MASK 0x0100 /* BOOT_DONE_STS */
5035 #define ARIZONA_BOOT_DONE_STS_SHIFT 8 /* BOOT_DONE_STS */
5036 #define ARIZONA_BOOT_DONE_STS_WIDTH 1 /* BOOT_DONE_STS */
5037 #define ARIZONA_DCS_DAC_DONE_STS 0x0080 /* DCS_DAC_DONE_STS */
5038 #define ARIZONA_DCS_DAC_DONE_STS_MASK 0x0080 /* DCS_DAC_DONE_STS */
5039 #define ARIZONA_DCS_DAC_DONE_STS_SHIFT 7 /* DCS_DAC_DONE_STS */
5040 #define ARIZONA_DCS_DAC_DONE_STS_WIDTH 1 /* DCS_DAC_DONE_STS */
5041 #define ARIZONA_DCS_HP_DONE_STS 0x0040 /* DCS_HP_DONE_STS */
5042 #define ARIZONA_DCS_HP_DONE_STS_MASK 0x0040 /* DCS_HP_DONE_STS */
5043 #define ARIZONA_DCS_HP_DONE_STS_SHIFT 6 /* DCS_HP_DONE_STS */
5044 #define ARIZONA_DCS_HP_DONE_STS_WIDTH 1 /* DCS_HP_DONE_STS */
5045 #define ARIZONA_FLL2_CLOCK_OK_STS 0x0002 /* FLL2_CLOCK_OK_STS */
5046 #define ARIZONA_FLL2_CLOCK_OK_STS_MASK 0x0002 /* FLL2_CLOCK_OK_STS */
5047 #define ARIZONA_FLL2_CLOCK_OK_STS_SHIFT 1 /* FLL2_CLOCK_OK_STS */
5048 #define ARIZONA_FLL2_CLOCK_OK_STS_WIDTH 1 /* FLL2_CLOCK_OK_STS */
5049 #define ARIZONA_FLL1_CLOCK_OK_STS 0x0001 /* FLL1_CLOCK_OK_STS */
5050 #define ARIZONA_FLL1_CLOCK_OK_STS_MASK 0x0001 /* FLL1_CLOCK_OK_STS */
5051 #define ARIZONA_FLL1_CLOCK_OK_STS_SHIFT 0 /* FLL1_CLOCK_OK_STS */
5052 #define ARIZONA_FLL1_CLOCK_OK_STS_WIDTH 1 /* FLL1_CLOCK_OK_STS */
5053 
5054 /*
5055  * R3364 (0xD24) - Interrupt Raw Status 6
5056  */
5057 #define ARIZONA_PWM_OVERCLOCKED_STS 0x2000 /* PWM_OVERCLOCKED_STS */
5058 #define ARIZONA_PWM_OVERCLOCKED_STS_MASK 0x2000 /* PWM_OVERCLOCKED_STS */
5059 #define ARIZONA_PWM_OVERCLOCKED_STS_SHIFT 13 /* PWM_OVERCLOCKED_STS */
5060 #define ARIZONA_PWM_OVERCLOCKED_STS_WIDTH 1 /* PWM_OVERCLOCKED_STS */
5061 #define ARIZONA_FX_CORE_OVERCLOCKED_STS 0x1000 /* FX_CORE_OVERCLOCKED_STS */
5062 #define ARIZONA_FX_CORE_OVERCLOCKED_STS_MASK 0x1000 /* FX_CORE_OVERCLOCKED_STS */
5063 #define ARIZONA_FX_CORE_OVERCLOCKED_STS_SHIFT 12 /* FX_CORE_OVERCLOCKED_STS */
5064 #define ARIZONA_FX_CORE_OVERCLOCKED_STS_WIDTH 1 /* FX_CORE_OVERCLOCKED_STS */
5065 #define ARIZONA_DAC_SYS_OVERCLOCKED_STS 0x0400 /* DAC_SYS_OVERCLOCKED_STS */
5066 #define ARIZONA_DAC_SYS_OVERCLOCKED_STS_MASK 0x0400 /* DAC_SYS_OVERCLOCKED_STS */
5067 #define ARIZONA_DAC_SYS_OVERCLOCKED_STS_SHIFT 10 /* DAC_SYS_OVERCLOCKED_STS */
5068 #define ARIZONA_DAC_SYS_OVERCLOCKED_STS_WIDTH 1 /* DAC_SYS_OVERCLOCKED_STS */
5069 #define ARIZONA_DAC_WARP_OVERCLOCKED_STS 0x0200 /* DAC_WARP_OVERCLOCKED_STS */
5070 #define ARIZONA_DAC_WARP_OVERCLOCKED_STS_MASK 0x0200 /* DAC_WARP_OVERCLOCKED_STS */
5071 #define ARIZONA_DAC_WARP_OVERCLOCKED_STS_SHIFT 9 /* DAC_WARP_OVERCLOCKED_STS */
5072 #define ARIZONA_DAC_WARP_OVERCLOCKED_STS_WIDTH 1 /* DAC_WARP_OVERCLOCKED_STS */
5073 #define ARIZONA_ADC_OVERCLOCKED_STS 0x0100 /* ADC_OVERCLOCKED_STS */
5074 #define ARIZONA_ADC_OVERCLOCKED_STS_MASK 0x0100 /* ADC_OVERCLOCKED_STS */
5075 #define ARIZONA_ADC_OVERCLOCKED_STS_SHIFT 8 /* ADC_OVERCLOCKED_STS */
5076 #define ARIZONA_ADC_OVERCLOCKED_STS_WIDTH 1 /* ADC_OVERCLOCKED_STS */
5077 #define ARIZONA_MIXER_OVERCLOCKED_STS 0x0080 /* MIXER_OVERCLOCKED_STS */
5078 #define ARIZONA_MIXER_OVERCLOCKED_STS_MASK 0x0080 /* MIXER_OVERCLOCKED_STS */
5079 #define ARIZONA_MIXER_OVERCLOCKED_STS_SHIFT 7 /* MIXER_OVERCLOCKED_STS */
5080 #define ARIZONA_MIXER_OVERCLOCKED_STS_WIDTH 1 /* MIXER_OVERCLOCKED_STS */
5081 #define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS 0x0040 /* AIF3_ASYNC_OVERCLOCKED_STS */
5082 #define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS_MASK 0x0040 /* AIF3_ASYNC_OVERCLOCKED_STS */
5083 #define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS_SHIFT 6 /* AIF3_ASYNC_OVERCLOCKED_STS */
5084 #define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS_WIDTH 1 /* AIF3_ASYNC_OVERCLOCKED_STS */
5085 #define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS 0x0020 /* AIF2_ASYNC_OVERCLOCKED_STS */
5086 #define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS_MASK 0x0020 /* AIF2_ASYNC_OVERCLOCKED_STS */
5087 #define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS_SHIFT 5 /* AIF2_ASYNC_OVERCLOCKED_STS */
5088 #define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS_WIDTH 1 /* AIF2_ASYNC_OVERCLOCKED_STS */
5089 #define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS 0x0010 /* AIF1_ASYNC_OVERCLOCKED_STS */
5090 #define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS_MASK 0x0010 /* AIF1_ASYNC_OVERCLOCKED_STS */
5091 #define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS_SHIFT 4 /* AIF1_ASYNC_OVERCLOCKED_STS */
5092 #define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS_WIDTH 1 /* AIF1_ASYNC_OVERCLOCKED_STS */
5093 #define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS 0x0008 /* AIF3_SYNC_OVERCLOCKED_STS */
5094 #define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS_MASK 0x0008 /* AIF3_SYNC_OVERCLOCKED_STS */
5095 #define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS_SHIFT 3 /* AIF3_SYNC_OVERCLOCKED_STS */
5096 #define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS_WIDTH 1 /* AIF3_SYNC_OVERCLOCKED_STS */
5097 #define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS 0x0004 /* AIF2_SYNC_OVERCLOCKED_STS */
5098 #define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS_MASK 0x0004 /* AIF2_SYNC_OVERCLOCKED_STS */
5099 #define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS_SHIFT 2 /* AIF2_SYNC_OVERCLOCKED_STS */
5100 #define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS_WIDTH 1 /* AIF2_SYNC_OVERCLOCKED_STS */
5101 #define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS 0x0002 /* AIF1_SYNC_OVERCLOCKED_STS */
5102 #define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS_MASK 0x0002 /* AIF1_SYNC_OVERCLOCKED_STS */
5103 #define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS_SHIFT 1 /* AIF1_SYNC_OVERCLOCKED_STS */
5104 #define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS_WIDTH 1 /* AIF1_SYNC_OVERCLOCKED_STS */
5105 #define ARIZONA_PAD_CTRL_OVERCLOCKED_STS 0x0001 /* PAD_CTRL_OVERCLOCKED_STS */
5106 #define ARIZONA_PAD_CTRL_OVERCLOCKED_STS_MASK 0x0001 /* PAD_CTRL_OVERCLOCKED_STS */
5107 #define ARIZONA_PAD_CTRL_OVERCLOCKED_STS_SHIFT 0 /* PAD_CTRL_OVERCLOCKED_STS */
5108 #define ARIZONA_PAD_CTRL_OVERCLOCKED_STS_WIDTH 1 /* PAD_CTRL_OVERCLOCKED_STS */
5109 
5110 /*
5111  * R3365 (0xD25) - Interrupt Raw Status 7
5112  */
5113 #define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS 0x8000 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */
5114 #define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_MASK 0x8000 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */
5115 #define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_SHIFT 15 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */
5116 #define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_WIDTH 1 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */
5117 #define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS 0x4000 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */
5118 #define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_MASK 0x4000 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */
5119 #define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_SHIFT 14 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */
5120 #define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_WIDTH 1 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */
5121 #define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS 0x2000 /* SLIMBUS_SYNC_OVERCLOCKED_STS */
5122 #define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_MASK 0x2000 /* SLIMBUS_SYNC_OVERCLOCKED_STS */
5123 #define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_SHIFT 13 /* SLIMBUS_SYNC_OVERCLOCKED_STS */
5124 #define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_WIDTH 1 /* SLIMBUS_SYNC_OVERCLOCKED_STS */
5125 #define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS 0x1000 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */
5126 #define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_MASK 0x1000 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */
5127 #define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_SHIFT 12 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */
5128 #define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_WIDTH 1 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */
5129 #define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS 0x0800 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */
5130 #define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_MASK 0x0800 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */
5131 #define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_SHIFT 11 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */
5132 #define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_WIDTH 1 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */
5133 #define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS 0x0400 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */
5134 #define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_MASK 0x0400 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */
5135 #define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_SHIFT 10 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */
5136 #define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_WIDTH 1 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */
5137 #define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS 0x0200 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */
5138 #define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_MASK 0x0200 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */
5139 #define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_SHIFT 9 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */
5140 #define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_WIDTH 1 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */
5141 #define ARIZONA_ADSP2_1_OVERCLOCKED_STS 0x0008 /* ADSP2_1_OVERCLOCKED_STS */
5142 #define ARIZONA_ADSP2_1_OVERCLOCKED_STS_MASK 0x0008 /* ADSP2_1_OVERCLOCKED_STS */
5143 #define ARIZONA_ADSP2_1_OVERCLOCKED_STS_SHIFT 3 /* ADSP2_1_OVERCLOCKED_STS */
5144 #define ARIZONA_ADSP2_1_OVERCLOCKED_STS_WIDTH 1 /* ADSP2_1_OVERCLOCKED_STS */
5145 #define ARIZONA_ISRC2_OVERCLOCKED_STS 0x0002 /* ISRC2_OVERCLOCKED_STS */
5146 #define ARIZONA_ISRC2_OVERCLOCKED_STS_MASK 0x0002 /* ISRC2_OVERCLOCKED_STS */
5147 #define ARIZONA_ISRC2_OVERCLOCKED_STS_SHIFT 1 /* ISRC2_OVERCLOCKED_STS */
5148 #define ARIZONA_ISRC2_OVERCLOCKED_STS_WIDTH 1 /* ISRC2_OVERCLOCKED_STS */
5149 #define ARIZONA_ISRC1_OVERCLOCKED_STS 0x0001 /* ISRC1_OVERCLOCKED_STS */
5150 #define ARIZONA_ISRC1_OVERCLOCKED_STS_MASK 0x0001 /* ISRC1_OVERCLOCKED_STS */
5151 #define ARIZONA_ISRC1_OVERCLOCKED_STS_SHIFT 0 /* ISRC1_OVERCLOCKED_STS */
5152 #define ARIZONA_ISRC1_OVERCLOCKED_STS_WIDTH 1 /* ISRC1_OVERCLOCKED_STS */
5153 
5154 /*
5155  * R3366 (0xD26) - Interrupt Raw Status 8
5156  */
5157 #define ARIZONA_AIF3_UNDERCLOCKED_STS 0x0400 /* AIF3_UNDERCLOCKED_STS */
5158 #define ARIZONA_AIF3_UNDERCLOCKED_STS_MASK 0x0400 /* AIF3_UNDERCLOCKED_STS */
5159 #define ARIZONA_AIF3_UNDERCLOCKED_STS_SHIFT 10 /* AIF3_UNDERCLOCKED_STS */
5160 #define ARIZONA_AIF3_UNDERCLOCKED_STS_WIDTH 1 /* AIF3_UNDERCLOCKED_STS */
5161 #define ARIZONA_AIF2_UNDERCLOCKED_STS 0x0200 /* AIF2_UNDERCLOCKED_STS */
5162 #define ARIZONA_AIF2_UNDERCLOCKED_STS_MASK 0x0200 /* AIF2_UNDERCLOCKED_STS */
5163 #define ARIZONA_AIF2_UNDERCLOCKED_STS_SHIFT 9 /* AIF2_UNDERCLOCKED_STS */
5164 #define ARIZONA_AIF2_UNDERCLOCKED_STS_WIDTH 1 /* AIF2_UNDERCLOCKED_STS */
5165 #define ARIZONA_AIF1_UNDERCLOCKED_STS 0x0100 /* AIF1_UNDERCLOCKED_STS */
5166 #define ARIZONA_AIF1_UNDERCLOCKED_STS_MASK 0x0100 /* AIF1_UNDERCLOCKED_STS */
5167 #define ARIZONA_AIF1_UNDERCLOCKED_STS_SHIFT 8 /* AIF1_UNDERCLOCKED_STS */
5168 #define ARIZONA_AIF1_UNDERCLOCKED_STS_WIDTH 1 /* AIF1_UNDERCLOCKED_STS */
5169 #define ARIZONA_ISRC2_UNDERCLOCKED_STS 0x0040 /* ISRC2_UNDERCLOCKED_STS */
5170 #define ARIZONA_ISRC2_UNDERCLOCKED_STS_MASK 0x0040 /* ISRC2_UNDERCLOCKED_STS */
5171 #define ARIZONA_ISRC2_UNDERCLOCKED_STS_SHIFT 6 /* ISRC2_UNDERCLOCKED_STS */
5172 #define ARIZONA_ISRC2_UNDERCLOCKED_STS_WIDTH 1 /* ISRC2_UNDERCLOCKED_STS */
5173 #define ARIZONA_ISRC1_UNDERCLOCKED_STS 0x0020 /* ISRC1_UNDERCLOCKED_STS */
5174 #define ARIZONA_ISRC1_UNDERCLOCKED_STS_MASK 0x0020 /* ISRC1_UNDERCLOCKED_STS */
5175 #define ARIZONA_ISRC1_UNDERCLOCKED_STS_SHIFT 5 /* ISRC1_UNDERCLOCKED_STS */
5176 #define ARIZONA_ISRC1_UNDERCLOCKED_STS_WIDTH 1 /* ISRC1_UNDERCLOCKED_STS */
5177 #define ARIZONA_FX_UNDERCLOCKED_STS 0x0010 /* FX_UNDERCLOCKED_STS */
5178 #define ARIZONA_FX_UNDERCLOCKED_STS_MASK 0x0010 /* FX_UNDERCLOCKED_STS */
5179 #define ARIZONA_FX_UNDERCLOCKED_STS_SHIFT 4 /* FX_UNDERCLOCKED_STS */
5180 #define ARIZONA_FX_UNDERCLOCKED_STS_WIDTH 1 /* FX_UNDERCLOCKED_STS */
5181 #define ARIZONA_ASRC_UNDERCLOCKED_STS 0x0008 /* ASRC_UNDERCLOCKED_STS */
5182 #define ARIZONA_ASRC_UNDERCLOCKED_STS_MASK 0x0008 /* ASRC_UNDERCLOCKED_STS */
5183 #define ARIZONA_ASRC_UNDERCLOCKED_STS_SHIFT 3 /* ASRC_UNDERCLOCKED_STS */
5184 #define ARIZONA_ASRC_UNDERCLOCKED_STS_WIDTH 1 /* ASRC_UNDERCLOCKED_STS */
5185 #define ARIZONA_DAC_UNDERCLOCKED_STS 0x0004 /* DAC_UNDERCLOCKED_STS */
5186 #define ARIZONA_DAC_UNDERCLOCKED_STS_MASK 0x0004 /* DAC_UNDERCLOCKED_STS */
5187 #define ARIZONA_DAC_UNDERCLOCKED_STS_SHIFT 2 /* DAC_UNDERCLOCKED_STS */
5188 #define ARIZONA_DAC_UNDERCLOCKED_STS_WIDTH 1 /* DAC_UNDERCLOCKED_STS */
5189 #define ARIZONA_ADC_UNDERCLOCKED_STS 0x0002 /* ADC_UNDERCLOCKED_STS */
5190 #define ARIZONA_ADC_UNDERCLOCKED_STS_MASK 0x0002 /* ADC_UNDERCLOCKED_STS */
5191 #define ARIZONA_ADC_UNDERCLOCKED_STS_SHIFT 1 /* ADC_UNDERCLOCKED_STS */
5192 #define ARIZONA_ADC_UNDERCLOCKED_STS_WIDTH 1 /* ADC_UNDERCLOCKED_STS */
5193 #define ARIZONA_MIXER_UNDERCLOCKED_STS 0x0001 /* MIXER_UNDERCLOCKED_STS */
5194 #define ARIZONA_MIXER_UNDERCLOCKED_STS_MASK 0x0001 /* MIXER_UNDERCLOCKED_STS */
5195 #define ARIZONA_MIXER_UNDERCLOCKED_STS_SHIFT 0 /* MIXER_UNDERCLOCKED_STS */
5196 #define ARIZONA_MIXER_UNDERCLOCKED_STS_WIDTH 1 /* MIXER_UNDERCLOCKED_STS */
5197 
5198 /*
5199  * R3392 (0xD40) - IRQ Pin Status
5200  */
5201 #define ARIZONA_IRQ2_STS 0x0002 /* IRQ2_STS */
5202 #define ARIZONA_IRQ2_STS_MASK 0x0002 /* IRQ2_STS */
5203 #define ARIZONA_IRQ2_STS_SHIFT 1 /* IRQ2_STS */
5204 #define ARIZONA_IRQ2_STS_WIDTH 1 /* IRQ2_STS */
5205 #define ARIZONA_IRQ1_STS 0x0001 /* IRQ1_STS */
5206 #define ARIZONA_IRQ1_STS_MASK 0x0001 /* IRQ1_STS */
5207 #define ARIZONA_IRQ1_STS_SHIFT 0 /* IRQ1_STS */
5208 #define ARIZONA_IRQ1_STS_WIDTH 1 /* IRQ1_STS */
5209 
5210 /*
5211  * R3393 (0xD41) - ADSP2 IRQ0
5212  */
5213 #define ARIZONA_DSP_IRQ2 0x0002 /* DSP_IRQ2 */
5214 #define ARIZONA_DSP_IRQ2_MASK 0x0002 /* DSP_IRQ2 */
5215 #define ARIZONA_DSP_IRQ2_SHIFT 1 /* DSP_IRQ2 */
5216 #define ARIZONA_DSP_IRQ2_WIDTH 1 /* DSP_IRQ2 */
5217 #define ARIZONA_DSP_IRQ1 0x0001 /* DSP_IRQ1 */
5218 #define ARIZONA_DSP_IRQ1_MASK 0x0001 /* DSP_IRQ1 */
5219 #define ARIZONA_DSP_IRQ1_SHIFT 0 /* DSP_IRQ1 */
5220 #define ARIZONA_DSP_IRQ1_WIDTH 1 /* DSP_IRQ1 */
5221 
5222 /*
5223  * R3408 (0xD50) - AOD wkup and trig
5224  */
5225 #define ARIZONA_GP5_FALL_TRIG_STS 0x0020 /* GP5_FALL_TRIG_STS */
5226 #define ARIZONA_GP5_FALL_TRIG_STS_MASK 0x0020 /* GP5_FALL_TRIG_STS */
5227 #define ARIZONA_GP5_FALL_TRIG_STS_SHIFT 5 /* GP5_FALL_TRIG_STS */
5228 #define ARIZONA_GP5_FALL_TRIG_STS_WIDTH 1 /* GP5_FALL_TRIG_STS */
5229 #define ARIZONA_GP5_RISE_TRIG_STS 0x0010 /* GP5_RISE_TRIG_STS */
5230 #define ARIZONA_GP5_RISE_TRIG_STS_MASK 0x0010 /* GP5_RISE_TRIG_STS */
5231 #define ARIZONA_GP5_RISE_TRIG_STS_SHIFT 4 /* GP5_RISE_TRIG_STS */
5232 #define ARIZONA_GP5_RISE_TRIG_STS_WIDTH 1 /* GP5_RISE_TRIG_STS */
5233 #define ARIZONA_JD1_FALL_TRIG_STS 0x0008 /* JD1_FALL_TRIG_STS */
5234 #define ARIZONA_JD1_FALL_TRIG_STS_MASK 0x0008 /* JD1_FALL_TRIG_STS */
5235 #define ARIZONA_JD1_FALL_TRIG_STS_SHIFT 3 /* JD1_FALL_TRIG_STS */
5236 #define ARIZONA_JD1_FALL_TRIG_STS_WIDTH 1 /* JD1_FALL_TRIG_STS */
5237 #define ARIZONA_JD1_RISE_TRIG_STS 0x0004 /* JD1_RISE_TRIG_STS */
5238 #define ARIZONA_JD1_RISE_TRIG_STS_MASK 0x0004 /* JD1_RISE_TRIG_STS */
5239 #define ARIZONA_JD1_RISE_TRIG_STS_SHIFT 2 /* JD1_RISE_TRIG_STS */
5240 #define ARIZONA_JD1_RISE_TRIG_STS_WIDTH 1 /* JD1_RISE_TRIG_STS */
5241 #define ARIZONA_JD2_FALL_TRIG_STS 0x0002 /* JD2_FALL_TRIG_STS */
5242 #define ARIZONA_JD2_FALL_TRIG_STS_MASK 0x0002 /* JD2_FALL_TRIG_STS */
5243 #define ARIZONA_JD2_FALL_TRIG_STS_SHIFT 1 /* JD2_FALL_TRIG_STS */
5244 #define ARIZONA_JD2_FALL_TRIG_STS_WIDTH 1 /* JD2_FALL_TRIG_STS */
5245 #define ARIZONA_JD2_RISE_TRIG_STS 0x0001 /* JD2_RISE_TRIG_STS */
5246 #define ARIZONA_JD2_RISE_TRIG_STS_MASK 0x0001 /* JD2_RISE_TRIG_STS */
5247 #define ARIZONA_JD2_RISE_TRIG_STS_SHIFT 0 /* JD2_RISE_TRIG_STS */
5248 #define ARIZONA_JD2_RISE_TRIG_STS_WIDTH 1 /* JD2_RISE_TRIG_STS */
5249 
5250 /*
5251  * R3409 (0xD51) - AOD IRQ1
5252  */
5253 #define ARIZONA_GP5_FALL_EINT1 0x0020 /* GP5_FALL_EINT1 */
5254 #define ARIZONA_GP5_FALL_EINT1_MASK 0x0020 /* GP5_FALL_EINT1 */
5255 #define ARIZONA_GP5_FALL_EINT1_SHIFT 5 /* GP5_FALL_EINT1 */
5256 #define ARIZONA_GP5_FALL_EINT1_WIDTH 1 /* GP5_FALL_EINT1 */
5257 #define ARIZONA_GP5_RISE_EINT1 0x0010 /* GP5_RISE_EINT1 */
5258 #define ARIZONA_GP5_RISE_EINT1_MASK 0x0010 /* GP5_RISE_EINT1 */
5259 #define ARIZONA_GP5_RISE_EINT1_SHIFT 4 /* GP5_RISE_EINT1 */
5260 #define ARIZONA_GP5_RISE_EINT1_WIDTH 1 /* GP5_RISE_EINT1 */
5261 #define ARIZONA_JD1_FALL_EINT1 0x0008 /* JD1_FALL_EINT1 */
5262 #define ARIZONA_JD1_FALL_EINT1_MASK 0x0008 /* JD1_FALL_EINT1 */
5263 #define ARIZONA_JD1_FALL_EINT1_SHIFT 3 /* JD1_FALL_EINT1 */
5264 #define ARIZONA_JD1_FALL_EINT1_WIDTH 1 /* JD1_FALL_EINT1 */
5265 #define ARIZONA_JD1_RISE_EINT1 0x0004 /* JD1_RISE_EINT1 */
5266 #define ARIZONA_JD1_RISE_EINT1_MASK 0x0004 /* JD1_RISE_EINT1 */
5267 #define ARIZONA_JD1_RISE_EINT1_SHIFT 2 /* JD1_RISE_EINT1 */
5268 #define ARIZONA_JD1_RISE_EINT1_WIDTH 1 /* JD1_RISE_EINT1 */
5269 #define ARIZONA_JD2_FALL_EINT1 0x0002 /* JD2_FALL_EINT1 */
5270 #define ARIZONA_JD2_FALL_EINT1_MASK 0x0002 /* JD2_FALL_EINT1 */
5271 #define ARIZONA_JD2_FALL_EINT1_SHIFT 1 /* JD2_FALL_EINT1 */
5272 #define ARIZONA_JD2_FALL_EINT1_WIDTH 1 /* JD2_FALL_EINT1 */
5273 #define ARIZONA_JD2_RISE_EINT1 0x0001 /* JD2_RISE_EINT1 */
5274 #define ARIZONA_JD2_RISE_EINT1_MASK 0x0001 /* JD2_RISE_EINT1 */
5275 #define ARIZONA_JD2_RISE_EINT1_SHIFT 0 /* JD2_RISE_EINT1 */
5276 #define ARIZONA_JD2_RISE_EINT1_WIDTH 1 /* JD2_RISE_EINT1 */
5277 
5278 /*
5279  * R3410 (0xD52) - AOD IRQ2
5280  */
5281 #define ARIZONA_GP5_FALL_EINT2 0x0020 /* GP5_FALL_EINT2 */
5282 #define ARIZONA_GP5_FALL_EINT2_MASK 0x0020 /* GP5_FALL_EINT2 */
5283 #define ARIZONA_GP5_FALL_EINT2_SHIFT 5 /* GP5_FALL_EINT2 */
5284 #define ARIZONA_GP5_FALL_EINT2_WIDTH 1 /* GP5_FALL_EINT2 */
5285 #define ARIZONA_GP5_RISE_EINT2 0x0010 /* GP5_RISE_EINT2 */
5286 #define ARIZONA_GP5_RISE_EINT2_MASK 0x0010 /* GP5_RISE_EINT2 */
5287 #define ARIZONA_GP5_RISE_EINT2_SHIFT 4 /* GP5_RISE_EINT2 */
5288 #define ARIZONA_GP5_RISE_EINT2_WIDTH 1 /* GP5_RISE_EINT2 */
5289 #define ARIZONA_JD1_FALL_EINT2 0x0008 /* JD1_FALL_EINT2 */
5290 #define ARIZONA_JD1_FALL_EINT2_MASK 0x0008 /* JD1_FALL_EINT2 */
5291 #define ARIZONA_JD1_FALL_EINT2_SHIFT 3 /* JD1_FALL_EINT2 */
5292 #define ARIZONA_JD1_FALL_EINT2_WIDTH 1 /* JD1_FALL_EINT2 */
5293 #define ARIZONA_JD1_RISE_EINT2 0x0004 /* JD1_RISE_EINT2 */
5294 #define ARIZONA_JD1_RISE_EINT2_MASK 0x0004 /* JD1_RISE_EINT2 */
5295 #define ARIZONA_JD1_RISE_EINT2_SHIFT 2 /* JD1_RISE_EINT2 */
5296 #define ARIZONA_JD1_RISE_EINT2_WIDTH 1 /* JD1_RISE_EINT2 */
5297 #define ARIZONA_JD2_FALL_EINT2 0x0002 /* JD2_FALL_EINT2 */
5298 #define ARIZONA_JD2_FALL_EINT2_MASK 0x0002 /* JD2_FALL_EINT2 */
5299 #define ARIZONA_JD2_FALL_EINT2_SHIFT 1 /* JD2_FALL_EINT2 */
5300 #define ARIZONA_JD2_FALL_EINT2_WIDTH 1 /* JD2_FALL_EINT2 */
5301 #define ARIZONA_JD2_RISE_EINT2 0x0001 /* JD2_RISE_EINT2 */
5302 #define ARIZONA_JD2_RISE_EINT2_MASK 0x0001 /* JD2_RISE_EINT2 */
5303 #define ARIZONA_JD2_RISE_EINT2_SHIFT 0 /* JD2_RISE_EINT2 */
5304 #define ARIZONA_JD2_RISE_EINT2_WIDTH 1 /* JD2_RISE_EINT2 */
5305 
5306 /*
5307  * R3411 (0xD53) - AOD IRQ Mask IRQ1
5308  */
5309 #define ARIZONA_IM_GP5_FALL_EINT1 0x0020 /* IM_GP5_FALL_EINT1 */
5310 #define ARIZONA_IM_GP5_FALL_EINT1_MASK 0x0020 /* IM_GP5_FALL_EINT1 */
5311 #define ARIZONA_IM_GP5_FALL_EINT1_SHIFT 5 /* IM_GP5_FALL_EINT1 */
5312 #define ARIZONA_IM_GP5_FALL_EINT1_WIDTH 1 /* IM_GP5_FALL_EINT1 */
5313 #define ARIZONA_IM_GP5_RISE_EINT1 0x0010 /* IM_GP5_RISE_EINT1 */
5314 #define ARIZONA_IM_GP5_RISE_EINT1_MASK 0x0010 /* IM_GP5_RISE_EINT1 */
5315 #define ARIZONA_IM_GP5_RISE_EINT1_SHIFT 4 /* IM_GP5_RISE_EINT1 */
5316 #define ARIZONA_IM_GP5_RISE_EINT1_WIDTH 1 /* IM_GP5_RISE_EINT1 */
5317 #define ARIZONA_IM_JD1_FALL_EINT1 0x0008 /* IM_JD1_FALL_EINT1 */
5318 #define ARIZONA_IM_JD1_FALL_EINT1_MASK 0x0008 /* IM_JD1_FALL_EINT1 */
5319 #define ARIZONA_IM_JD1_FALL_EINT1_SHIFT 3 /* IM_JD1_FALL_EINT1 */
5320 #define ARIZONA_IM_JD1_FALL_EINT1_WIDTH 1 /* IM_JD1_FALL_EINT1 */
5321 #define ARIZONA_IM_JD1_RISE_EINT1 0x0004 /* IM_JD1_RISE_EINT1 */
5322 #define ARIZONA_IM_JD1_RISE_EINT1_MASK 0x0004 /* IM_JD1_RISE_EINT1 */
5323 #define ARIZONA_IM_JD1_RISE_EINT1_SHIFT 2 /* IM_JD1_RISE_EINT1 */
5324 #define ARIZONA_IM_JD1_RISE_EINT1_WIDTH 1 /* IM_JD1_RISE_EINT1 */
5325 #define ARIZONA_IM_JD2_FALL_EINT1 0x0002 /* IM_JD2_FALL_EINT1 */
5326 #define ARIZONA_IM_JD2_FALL_EINT1_MASK 0x0002 /* IM_JD2_FALL_EINT1 */
5327 #define ARIZONA_IM_JD2_FALL_EINT1_SHIFT 1 /* IM_JD2_FALL_EINT1 */
5328 #define ARIZONA_IM_JD2_FALL_EINT1_WIDTH 1 /* IM_JD2_FALL_EINT1 */
5329 #define ARIZONA_IM_JD2_RISE_EINT1 0x0001 /* IM_JD2_RISE_EINT1 */
5330 #define ARIZONA_IM_JD2_RISE_EINT1_MASK 0x0001 /* IM_JD2_RISE_EINT1 */
5331 #define ARIZONA_IM_JD2_RISE_EINT1_SHIFT 0 /* IM_JD2_RISE_EINT1 */
5332 #define ARIZONA_IM_JD2_RISE_EINT1_WIDTH 1 /* IM_JD2_RISE_EINT1 */
5333 
5334 /*
5335  * R3412 (0xD54) - AOD IRQ Mask IRQ2
5336  */
5337 #define ARIZONA_IM_GP5_FALL_EINT2 0x0020 /* IM_GP5_FALL_EINT2 */
5338 #define ARIZONA_IM_GP5_FALL_EINT2_MASK 0x0020 /* IM_GP5_FALL_EINT2 */
5339 #define ARIZONA_IM_GP5_FALL_EINT2_SHIFT 5 /* IM_GP5_FALL_EINT2 */
5340 #define ARIZONA_IM_GP5_FALL_EINT2_WIDTH 1 /* IM_GP5_FALL_EINT2 */
5341 #define ARIZONA_IM_GP5_RISE_EINT2 0x0010 /* IM_GP5_RISE_EINT2 */
5342 #define ARIZONA_IM_GP5_RISE_EINT2_MASK 0x0010 /* IM_GP5_RISE_EINT2 */
5343 #define ARIZONA_IM_GP5_RISE_EINT2_SHIFT 4 /* IM_GP5_RISE_EINT2 */
5344 #define ARIZONA_IM_GP5_RISE_EINT2_WIDTH 1 /* IM_GP5_RISE_EINT2 */
5345 #define ARIZONA_IM_JD1_FALL_EINT2 0x0008 /* IM_JD1_FALL_EINT2 */
5346 #define ARIZONA_IM_JD1_FALL_EINT2_MASK 0x0008 /* IM_JD1_FALL_EINT2 */
5347 #define ARIZONA_IM_JD1_FALL_EINT2_SHIFT 3 /* IM_JD1_FALL_EINT2 */
5348 #define ARIZONA_IM_JD1_FALL_EINT2_WIDTH 1 /* IM_JD1_FALL_EINT2 */
5349 #define ARIZONA_IM_JD1_RISE_EINT2 0x0004 /* IM_JD1_RISE_EINT2 */
5350 #define ARIZONA_IM_JD1_RISE_EINT2_MASK 0x0004 /* IM_JD1_RISE_EINT2 */
5351 #define ARIZONA_IM_JD1_RISE_EINT2_SHIFT 2 /* IM_JD1_RISE_EINT2 */
5352 #define ARIZONA_IM_JD1_RISE_EINT2_WIDTH 1 /* IM_JD1_RISE_EINT2 */
5353 #define ARIZONA_IM_JD2_FALL_EINT2 0x0002 /* IM_JD2_FALL_EINT2 */
5354 #define ARIZONA_IM_JD2_FALL_EINT2_MASK 0x0002 /* IM_JD2_FALL_EINT2 */
5355 #define ARIZONA_IM_JD2_FALL_EINT2_SHIFT 1 /* IM_JD2_FALL_EINT2 */
5356 #define ARIZONA_IM_JD2_FALL_EINT2_WIDTH 1 /* IM_JD2_FALL_EINT2 */
5357 #define ARIZONA_IM_JD2_RISE_EINT2 0x0001 /* IM_JD2_RISE_EINT2 */
5358 #define ARIZONA_IM_JD2_RISE_EINT2_MASK 0x0001 /* IM_JD2_RISE_EINT2 */
5359 #define ARIZONA_IM_JD2_RISE_EINT2_SHIFT 0 /* IM_JD2_RISE_EINT2 */
5360 #define ARIZONA_IM_JD2_RISE_EINT2_WIDTH 1 /* IM_JD2_RISE_EINT2 */
5361 
5362 /*
5363  * R3413 (0xD55) - AOD IRQ Raw Status
5364  */
5365 #define ARIZONA_GP5_STS 0x0004 /* GP5_STS */
5366 #define ARIZONA_GP5_STS_MASK 0x0004 /* GP5_STS */
5367 #define ARIZONA_GP5_STS_SHIFT 2 /* GP5_STS */
5368 #define ARIZONA_GP5_STS_WIDTH 1 /* GP5_STS */
5369 #define ARIZONA_JD2_STS 0x0002 /* JD2_STS */
5370 #define ARIZONA_JD2_STS_MASK 0x0002 /* JD2_STS */
5371 #define ARIZONA_JD2_STS_SHIFT 1 /* JD2_STS */
5372 #define ARIZONA_JD2_STS_WIDTH 1 /* JD2_STS */
5373 #define ARIZONA_JD1_STS 0x0001 /* JD1_STS */
5374 #define ARIZONA_JD1_STS_MASK 0x0001 /* JD1_STS */
5375 #define ARIZONA_JD1_STS_SHIFT 0 /* JD1_STS */
5376 #define ARIZONA_JD1_STS_WIDTH 1 /* JD1_STS */
5377 
5378 /*
5379  * R3414 (0xD56) - Jack detect debounce
5380  */
5381 #define ARIZONA_JD2_DB 0x0002 /* JD2_DB */
5382 #define ARIZONA_JD2_DB_MASK 0x0002 /* JD2_DB */
5383 #define ARIZONA_JD2_DB_SHIFT 1 /* JD2_DB */
5384 #define ARIZONA_JD2_DB_WIDTH 1 /* JD2_DB */
5385 #define ARIZONA_JD1_DB 0x0001 /* JD1_DB */
5386 #define ARIZONA_JD1_DB_MASK 0x0001 /* JD1_DB */
5387 #define ARIZONA_JD1_DB_SHIFT 0 /* JD1_DB */
5388 #define ARIZONA_JD1_DB_WIDTH 1 /* JD1_DB */
5389 
5390 /*
5391  * R3584 (0xE00) - FX_Ctrl1
5392  */
5393 #define ARIZONA_FX_RATE_MASK 0x7800 /* FX_RATE - [14:11] */
5394 #define ARIZONA_FX_RATE_SHIFT 11 /* FX_RATE - [14:11] */
5395 #define ARIZONA_FX_RATE_WIDTH 4 /* FX_RATE - [14:11] */
5396 
5397 /*
5398  * R3585 (0xE01) - FX_Ctrl2
5399  */
5400 #define ARIZONA_FX_STS_MASK 0xFFF0 /* FX_STS - [15:4] */
5401 #define ARIZONA_FX_STS_SHIFT 4 /* FX_STS - [15:4] */
5402 #define ARIZONA_FX_STS_WIDTH 12 /* FX_STS - [15:4] */
5403 
5404 /*
5405  * R3600 (0xE10) - EQ1_1
5406  */
5407 #define ARIZONA_EQ1_B1_GAIN_MASK 0xF800 /* EQ1_B1_GAIN - [15:11] */
5408 #define ARIZONA_EQ1_B1_GAIN_SHIFT 11 /* EQ1_B1_GAIN - [15:11] */
5409 #define ARIZONA_EQ1_B1_GAIN_WIDTH 5 /* EQ1_B1_GAIN - [15:11] */
5410 #define ARIZONA_EQ1_B2_GAIN_MASK 0x07C0 /* EQ1_B2_GAIN - [10:6] */
5411 #define ARIZONA_EQ1_B2_GAIN_SHIFT 6 /* EQ1_B2_GAIN - [10:6] */
5412 #define ARIZONA_EQ1_B2_GAIN_WIDTH 5 /* EQ1_B2_GAIN - [10:6] */
5413 #define ARIZONA_EQ1_B3_GAIN_MASK 0x003E /* EQ1_B3_GAIN - [5:1] */
5414 #define ARIZONA_EQ1_B3_GAIN_SHIFT 1 /* EQ1_B3_GAIN - [5:1] */
5415 #define ARIZONA_EQ1_B3_GAIN_WIDTH 5 /* EQ1_B3_GAIN - [5:1] */
5416 #define ARIZONA_EQ1_ENA 0x0001 /* EQ1_ENA */
5417 #define ARIZONA_EQ1_ENA_MASK 0x0001 /* EQ1_ENA */
5418 #define ARIZONA_EQ1_ENA_SHIFT 0 /* EQ1_ENA */
5419 #define ARIZONA_EQ1_ENA_WIDTH 1 /* EQ1_ENA */
5420 
5421 /*
5422  * R3601 (0xE11) - EQ1_2
5423  */
5424 #define ARIZONA_EQ1_B4_GAIN_MASK 0xF800 /* EQ1_B4_GAIN - [15:11] */
5425 #define ARIZONA_EQ1_B4_GAIN_SHIFT 11 /* EQ1_B4_GAIN - [15:11] */
5426 #define ARIZONA_EQ1_B4_GAIN_WIDTH 5 /* EQ1_B4_GAIN - [15:11] */
5427 #define ARIZONA_EQ1_B5_GAIN_MASK 0x07C0 /* EQ1_B5_GAIN - [10:6] */
5428 #define ARIZONA_EQ1_B5_GAIN_SHIFT 6 /* EQ1_B5_GAIN - [10:6] */
5429 #define ARIZONA_EQ1_B5_GAIN_WIDTH 5 /* EQ1_B5_GAIN - [10:6] */
5430 #define ARIZONA_EQ1_B1_MODE 0x0001 /* EQ1_B1_MODE */
5431 #define ARIZONA_EQ1_B1_MODE_MASK 0x0001 /* EQ1_B1_MODE */
5432 #define ARIZONA_EQ1_B1_MODE_SHIFT 0 /* EQ1_B1_MODE */
5433 #define ARIZONA_EQ1_B1_MODE_WIDTH 1 /* EQ1_B1_MODE */
5434 
5435 /*
5436  * R3602 (0xE12) - EQ1_3
5437  */
5438 #define ARIZONA_EQ1_B1_A_MASK 0xFFFF /* EQ1_B1_A - [15:0] */
5439 #define ARIZONA_EQ1_B1_A_SHIFT 0 /* EQ1_B1_A - [15:0] */
5440 #define ARIZONA_EQ1_B1_A_WIDTH 16 /* EQ1_B1_A - [15:0] */
5441 
5442 /*
5443  * R3603 (0xE13) - EQ1_4
5444  */
5445 #define ARIZONA_EQ1_B1_B_MASK 0xFFFF /* EQ1_B1_B - [15:0] */
5446 #define ARIZONA_EQ1_B1_B_SHIFT 0 /* EQ1_B1_B - [15:0] */
5447 #define ARIZONA_EQ1_B1_B_WIDTH 16 /* EQ1_B1_B - [15:0] */
5448 
5449 /*
5450  * R3604 (0xE14) - EQ1_5
5451  */
5452 #define ARIZONA_EQ1_B1_PG_MASK 0xFFFF /* EQ1_B1_PG - [15:0] */
5453 #define ARIZONA_EQ1_B1_PG_SHIFT 0 /* EQ1_B1_PG - [15:0] */
5454 #define ARIZONA_EQ1_B1_PG_WIDTH 16 /* EQ1_B1_PG - [15:0] */
5455 
5456 /*
5457  * R3605 (0xE15) - EQ1_6
5458  */
5459 #define ARIZONA_EQ1_B2_A_MASK 0xFFFF /* EQ1_B2_A - [15:0] */
5460 #define ARIZONA_EQ1_B2_A_SHIFT 0 /* EQ1_B2_A - [15:0] */
5461 #define ARIZONA_EQ1_B2_A_WIDTH 16 /* EQ1_B2_A - [15:0] */
5462 
5463 /*
5464  * R3606 (0xE16) - EQ1_7
5465  */
5466 #define ARIZONA_EQ1_B2_B_MASK 0xFFFF /* EQ1_B2_B - [15:0] */
5467 #define ARIZONA_EQ1_B2_B_SHIFT 0 /* EQ1_B2_B - [15:0] */
5468 #define ARIZONA_EQ1_B2_B_WIDTH 16 /* EQ1_B2_B - [15:0] */
5469 
5470 /*
5471  * R3607 (0xE17) - EQ1_8
5472  */
5473 #define ARIZONA_EQ1_B2_C_MASK 0xFFFF /* EQ1_B2_C - [15:0] */
5474 #define ARIZONA_EQ1_B2_C_SHIFT 0 /* EQ1_B2_C - [15:0] */
5475 #define ARIZONA_EQ1_B2_C_WIDTH 16 /* EQ1_B2_C - [15:0] */
5476 
5477 /*
5478  * R3608 (0xE18) - EQ1_9
5479  */
5480 #define ARIZONA_EQ1_B2_PG_MASK 0xFFFF /* EQ1_B2_PG - [15:0] */
5481 #define ARIZONA_EQ1_B2_PG_SHIFT 0 /* EQ1_B2_PG - [15:0] */
5482 #define ARIZONA_EQ1_B2_PG_WIDTH 16 /* EQ1_B2_PG - [15:0] */
5483 
5484 /*
5485  * R3609 (0xE19) - EQ1_10
5486  */
5487 #define ARIZONA_EQ1_B3_A_MASK 0xFFFF /* EQ1_B3_A - [15:0] */
5488 #define ARIZONA_EQ1_B3_A_SHIFT 0 /* EQ1_B3_A - [15:0] */
5489 #define ARIZONA_EQ1_B3_A_WIDTH 16 /* EQ1_B3_A - [15:0] */
5490 
5491 /*
5492  * R3610 (0xE1A) - EQ1_11
5493  */
5494 #define ARIZONA_EQ1_B3_B_MASK 0xFFFF /* EQ1_B3_B - [15:0] */
5495 #define ARIZONA_EQ1_B3_B_SHIFT 0 /* EQ1_B3_B - [15:0] */
5496 #define ARIZONA_EQ1_B3_B_WIDTH 16 /* EQ1_B3_B - [15:0] */
5497 
5498 /*
5499  * R3611 (0xE1B) - EQ1_12
5500  */
5501 #define ARIZONA_EQ1_B3_C_MASK 0xFFFF /* EQ1_B3_C - [15:0] */
5502 #define ARIZONA_EQ1_B3_C_SHIFT 0 /* EQ1_B3_C - [15:0] */
5503 #define ARIZONA_EQ1_B3_C_WIDTH 16 /* EQ1_B3_C - [15:0] */
5504 
5505 /*
5506  * R3612 (0xE1C) - EQ1_13
5507  */
5508 #define ARIZONA_EQ1_B3_PG_MASK 0xFFFF /* EQ1_B3_PG - [15:0] */
5509 #define ARIZONA_EQ1_B3_PG_SHIFT 0 /* EQ1_B3_PG - [15:0] */
5510 #define ARIZONA_EQ1_B3_PG_WIDTH 16 /* EQ1_B3_PG - [15:0] */
5511 
5512 /*
5513  * R3613 (0xE1D) - EQ1_14
5514  */
5515 #define ARIZONA_EQ1_B4_A_MASK 0xFFFF /* EQ1_B4_A - [15:0] */
5516 #define ARIZONA_EQ1_B4_A_SHIFT 0 /* EQ1_B4_A - [15:0] */
5517 #define ARIZONA_EQ1_B4_A_WIDTH 16 /* EQ1_B4_A - [15:0] */
5518 
5519 /*
5520  * R3614 (0xE1E) - EQ1_15
5521  */
5522 #define ARIZONA_EQ1_B4_B_MASK 0xFFFF /* EQ1_B4_B - [15:0] */
5523 #define ARIZONA_EQ1_B4_B_SHIFT 0 /* EQ1_B4_B - [15:0] */
5524 #define ARIZONA_EQ1_B4_B_WIDTH 16 /* EQ1_B4_B - [15:0] */
5525 
5526 /*
5527  * R3615 (0xE1F) - EQ1_16
5528  */
5529 #define ARIZONA_EQ1_B4_C_MASK 0xFFFF /* EQ1_B4_C - [15:0] */
5530 #define ARIZONA_EQ1_B4_C_SHIFT 0 /* EQ1_B4_C - [15:0] */
5531 #define ARIZONA_EQ1_B4_C_WIDTH 16 /* EQ1_B4_C - [15:0] */
5532 
5533 /*
5534  * R3616 (0xE20) - EQ1_17
5535  */
5536 #define ARIZONA_EQ1_B4_PG_MASK 0xFFFF /* EQ1_B4_PG - [15:0] */
5537 #define ARIZONA_EQ1_B4_PG_SHIFT 0 /* EQ1_B4_PG - [15:0] */
5538 #define ARIZONA_EQ1_B4_PG_WIDTH 16 /* EQ1_B4_PG - [15:0] */
5539 
5540 /*
5541  * R3617 (0xE21) - EQ1_18
5542  */
5543 #define ARIZONA_EQ1_B5_A_MASK 0xFFFF /* EQ1_B5_A - [15:0] */
5544 #define ARIZONA_EQ1_B5_A_SHIFT 0 /* EQ1_B5_A - [15:0] */
5545 #define ARIZONA_EQ1_B5_A_WIDTH 16 /* EQ1_B5_A - [15:0] */
5546 
5547 /*
5548  * R3618 (0xE22) - EQ1_19
5549  */
5550 #define ARIZONA_EQ1_B5_B_MASK 0xFFFF /* EQ1_B5_B - [15:0] */
5551 #define ARIZONA_EQ1_B5_B_SHIFT 0 /* EQ1_B5_B - [15:0] */
5552 #define ARIZONA_EQ1_B5_B_WIDTH 16 /* EQ1_B5_B - [15:0] */
5553 
5554 /*
5555  * R3619 (0xE23) - EQ1_20
5556  */
5557 #define ARIZONA_EQ1_B5_PG_MASK 0xFFFF /* EQ1_B5_PG - [15:0] */
5558 #define ARIZONA_EQ1_B5_PG_SHIFT 0 /* EQ1_B5_PG - [15:0] */
5559 #define ARIZONA_EQ1_B5_PG_WIDTH 16 /* EQ1_B5_PG - [15:0] */
5560 
5561 /*
5562  * R3620 (0xE24) - EQ1_21
5563  */
5564 #define ARIZONA_EQ1_B1_C_MASK 0xFFFF /* EQ1_B1_C - [15:0] */
5565 #define ARIZONA_EQ1_B1_C_SHIFT 0 /* EQ1_B1_C - [15:0] */
5566 #define ARIZONA_EQ1_B1_C_WIDTH 16 /* EQ1_B1_C - [15:0] */
5567 
5568 /*
5569  * R3622 (0xE26) - EQ2_1
5570  */
5571 #define ARIZONA_EQ2_B1_GAIN_MASK 0xF800 /* EQ2_B1_GAIN - [15:11] */
5572 #define ARIZONA_EQ2_B1_GAIN_SHIFT 11 /* EQ2_B1_GAIN - [15:11] */
5573 #define ARIZONA_EQ2_B1_GAIN_WIDTH 5 /* EQ2_B1_GAIN - [15:11] */
5574 #define ARIZONA_EQ2_B2_GAIN_MASK 0x07C0 /* EQ2_B2_GAIN - [10:6] */
5575 #define ARIZONA_EQ2_B2_GAIN_SHIFT 6 /* EQ2_B2_GAIN - [10:6] */
5576 #define ARIZONA_EQ2_B2_GAIN_WIDTH 5 /* EQ2_B2_GAIN - [10:6] */
5577 #define ARIZONA_EQ2_B3_GAIN_MASK 0x003E /* EQ2_B3_GAIN - [5:1] */
5578 #define ARIZONA_EQ2_B3_GAIN_SHIFT 1 /* EQ2_B3_GAIN - [5:1] */
5579 #define ARIZONA_EQ2_B3_GAIN_WIDTH 5 /* EQ2_B3_GAIN - [5:1] */
5580 #define ARIZONA_EQ2_ENA 0x0001 /* EQ2_ENA */
5581 #define ARIZONA_EQ2_ENA_MASK 0x0001 /* EQ2_ENA */
5582 #define ARIZONA_EQ2_ENA_SHIFT 0 /* EQ2_ENA */
5583 #define ARIZONA_EQ2_ENA_WIDTH 1 /* EQ2_ENA */
5584 
5585 /*
5586  * R3623 (0xE27) - EQ2_2
5587  */
5588 #define ARIZONA_EQ2_B4_GAIN_MASK 0xF800 /* EQ2_B4_GAIN - [15:11] */
5589 #define ARIZONA_EQ2_B4_GAIN_SHIFT 11 /* EQ2_B4_GAIN - [15:11] */
5590 #define ARIZONA_EQ2_B4_GAIN_WIDTH 5 /* EQ2_B4_GAIN - [15:11] */
5591 #define ARIZONA_EQ2_B5_GAIN_MASK 0x07C0 /* EQ2_B5_GAIN - [10:6] */
5592 #define ARIZONA_EQ2_B5_GAIN_SHIFT 6 /* EQ2_B5_GAIN - [10:6] */
5593 #define ARIZONA_EQ2_B5_GAIN_WIDTH 5 /* EQ2_B5_GAIN - [10:6] */
5594 #define ARIZONA_EQ2_B1_MODE 0x0001 /* EQ2_B1_MODE */
5595 #define ARIZONA_EQ2_B1_MODE_MASK 0x0001 /* EQ2_B1_MODE */
5596 #define ARIZONA_EQ2_B1_MODE_SHIFT 0 /* EQ2_B1_MODE */
5597 #define ARIZONA_EQ2_B1_MODE_WIDTH 1 /* EQ2_B1_MODE */
5598 
5599 /*
5600  * R3624 (0xE28) - EQ2_3
5601  */
5602 #define ARIZONA_EQ2_B1_A_MASK 0xFFFF /* EQ2_B1_A - [15:0] */
5603 #define ARIZONA_EQ2_B1_A_SHIFT 0 /* EQ2_B1_A - [15:0] */
5604 #define ARIZONA_EQ2_B1_A_WIDTH 16 /* EQ2_B1_A - [15:0] */
5605 
5606 /*
5607  * R3625 (0xE29) - EQ2_4
5608  */
5609 #define ARIZONA_EQ2_B1_B_MASK 0xFFFF /* EQ2_B1_B - [15:0] */
5610 #define ARIZONA_EQ2_B1_B_SHIFT 0 /* EQ2_B1_B - [15:0] */
5611 #define ARIZONA_EQ2_B1_B_WIDTH 16 /* EQ2_B1_B - [15:0] */
5612 
5613 /*
5614  * R3626 (0xE2A) - EQ2_5
5615  */
5616 #define ARIZONA_EQ2_B1_PG_MASK 0xFFFF /* EQ2_B1_PG - [15:0] */
5617 #define ARIZONA_EQ2_B1_PG_SHIFT 0 /* EQ2_B1_PG - [15:0] */
5618 #define ARIZONA_EQ2_B1_PG_WIDTH 16 /* EQ2_B1_PG - [15:0] */
5619 
5620 /*
5621  * R3627 (0xE2B) - EQ2_6
5622  */
5623 #define ARIZONA_EQ2_B2_A_MASK 0xFFFF /* EQ2_B2_A - [15:0] */
5624 #define ARIZONA_EQ2_B2_A_SHIFT 0 /* EQ2_B2_A - [15:0] */
5625 #define ARIZONA_EQ2_B2_A_WIDTH 16 /* EQ2_B2_A - [15:0] */
5626 
5627 /*
5628  * R3628 (0xE2C) - EQ2_7
5629  */
5630 #define ARIZONA_EQ2_B2_B_MASK 0xFFFF /* EQ2_B2_B - [15:0] */
5631 #define ARIZONA_EQ2_B2_B_SHIFT 0 /* EQ2_B2_B - [15:0] */
5632 #define ARIZONA_EQ2_B2_B_WIDTH 16 /* EQ2_B2_B - [15:0] */
5633 
5634 /*
5635  * R3629 (0xE2D) - EQ2_8
5636  */
5637 #define ARIZONA_EQ2_B2_C_MASK 0xFFFF /* EQ2_B2_C - [15:0] */
5638 #define ARIZONA_EQ2_B2_C_SHIFT 0 /* EQ2_B2_C - [15:0] */
5639 #define ARIZONA_EQ2_B2_C_WIDTH 16 /* EQ2_B2_C - [15:0] */
5640 
5641 /*
5642  * R3630 (0xE2E) - EQ2_9
5643  */
5644 #define ARIZONA_EQ2_B2_PG_MASK 0xFFFF /* EQ2_B2_PG - [15:0] */
5645 #define ARIZONA_EQ2_B2_PG_SHIFT 0 /* EQ2_B2_PG - [15:0] */
5646 #define ARIZONA_EQ2_B2_PG_WIDTH 16 /* EQ2_B2_PG - [15:0] */
5647 
5648 /*
5649  * R3631 (0xE2F) - EQ2_10
5650  */
5651 #define ARIZONA_EQ2_B3_A_MASK 0xFFFF /* EQ2_B3_A - [15:0] */
5652 #define ARIZONA_EQ2_B3_A_SHIFT 0 /* EQ2_B3_A - [15:0] */
5653 #define ARIZONA_EQ2_B3_A_WIDTH 16 /* EQ2_B3_A - [15:0] */
5654 
5655 /*
5656  * R3632 (0xE30) - EQ2_11
5657  */
5658 #define ARIZONA_EQ2_B3_B_MASK 0xFFFF /* EQ2_B3_B - [15:0] */
5659 #define ARIZONA_EQ2_B3_B_SHIFT 0 /* EQ2_B3_B - [15:0] */
5660 #define ARIZONA_EQ2_B3_B_WIDTH 16 /* EQ2_B3_B - [15:0] */
5661 
5662 /*
5663  * R3633 (0xE31) - EQ2_12
5664  */
5665 #define ARIZONA_EQ2_B3_C_MASK 0xFFFF /* EQ2_B3_C - [15:0] */
5666 #define ARIZONA_EQ2_B3_C_SHIFT 0 /* EQ2_B3_C - [15:0] */
5667 #define ARIZONA_EQ2_B3_C_WIDTH 16 /* EQ2_B3_C - [15:0] */
5668 
5669 /*
5670  * R3634 (0xE32) - EQ2_13
5671  */
5672 #define ARIZONA_EQ2_B3_PG_MASK 0xFFFF /* EQ2_B3_PG - [15:0] */
5673 #define ARIZONA_EQ2_B3_PG_SHIFT 0 /* EQ2_B3_PG - [15:0] */
5674 #define ARIZONA_EQ2_B3_PG_WIDTH 16 /* EQ2_B3_PG - [15:0] */
5675 
5676 /*
5677  * R3635 (0xE33) - EQ2_14
5678  */
5679 #define ARIZONA_EQ2_B4_A_MASK 0xFFFF /* EQ2_B4_A - [15:0] */
5680 #define ARIZONA_EQ2_B4_A_SHIFT 0 /* EQ2_B4_A - [15:0] */
5681 #define ARIZONA_EQ2_B4_A_WIDTH 16 /* EQ2_B4_A - [15:0] */
5682 
5683 /*
5684  * R3636 (0xE34) - EQ2_15
5685  */
5686 #define ARIZONA_EQ2_B4_B_MASK 0xFFFF /* EQ2_B4_B - [15:0] */
5687 #define ARIZONA_EQ2_B4_B_SHIFT 0 /* EQ2_B4_B - [15:0] */
5688 #define ARIZONA_EQ2_B4_B_WIDTH 16 /* EQ2_B4_B - [15:0] */
5689 
5690 /*
5691  * R3637 (0xE35) - EQ2_16
5692  */
5693 #define ARIZONA_EQ2_B4_C_MASK 0xFFFF /* EQ2_B4_C - [15:0] */
5694 #define ARIZONA_EQ2_B4_C_SHIFT 0 /* EQ2_B4_C - [15:0] */
5695 #define ARIZONA_EQ2_B4_C_WIDTH 16 /* EQ2_B4_C - [15:0] */
5696 
5697 /*
5698  * R3638 (0xE36) - EQ2_17
5699  */
5700 #define ARIZONA_EQ2_B4_PG_MASK 0xFFFF /* EQ2_B4_PG - [15:0] */
5701 #define ARIZONA_EQ2_B4_PG_SHIFT 0 /* EQ2_B4_PG - [15:0] */
5702 #define ARIZONA_EQ2_B4_PG_WIDTH 16 /* EQ2_B4_PG - [15:0] */
5703 
5704 /*
5705  * R3639 (0xE37) - EQ2_18
5706  */
5707 #define ARIZONA_EQ2_B5_A_MASK 0xFFFF /* EQ2_B5_A - [15:0] */
5708 #define ARIZONA_EQ2_B5_A_SHIFT 0 /* EQ2_B5_A - [15:0] */
5709 #define ARIZONA_EQ2_B5_A_WIDTH 16 /* EQ2_B5_A - [15:0] */
5710 
5711 /*
5712  * R3640 (0xE38) - EQ2_19
5713  */
5714 #define ARIZONA_EQ2_B5_B_MASK 0xFFFF /* EQ2_B5_B - [15:0] */
5715 #define ARIZONA_EQ2_B5_B_SHIFT 0 /* EQ2_B5_B - [15:0] */
5716 #define ARIZONA_EQ2_B5_B_WIDTH 16 /* EQ2_B5_B - [15:0] */
5717 
5718 /*
5719  * R3641 (0xE39) - EQ2_20
5720  */
5721 #define ARIZONA_EQ2_B5_PG_MASK 0xFFFF /* EQ2_B5_PG - [15:0] */
5722 #define ARIZONA_EQ2_B5_PG_SHIFT 0 /* EQ2_B5_PG - [15:0] */
5723 #define ARIZONA_EQ2_B5_PG_WIDTH 16 /* EQ2_B5_PG - [15:0] */
5724 
5725 /*
5726  * R3642 (0xE3A) - EQ2_21
5727  */
5728 #define ARIZONA_EQ2_B1_C_MASK 0xFFFF /* EQ2_B1_C - [15:0] */
5729 #define ARIZONA_EQ2_B1_C_SHIFT 0 /* EQ2_B1_C - [15:0] */
5730 #define ARIZONA_EQ2_B1_C_WIDTH 16 /* EQ2_B1_C - [15:0] */
5731 
5732 /*
5733  * R3644 (0xE3C) - EQ3_1
5734  */
5735 #define ARIZONA_EQ3_B1_GAIN_MASK 0xF800 /* EQ3_B1_GAIN - [15:11] */
5736 #define ARIZONA_EQ3_B1_GAIN_SHIFT 11 /* EQ3_B1_GAIN - [15:11] */
5737 #define ARIZONA_EQ3_B1_GAIN_WIDTH 5 /* EQ3_B1_GAIN - [15:11] */
5738 #define ARIZONA_EQ3_B2_GAIN_MASK 0x07C0 /* EQ3_B2_GAIN - [10:6] */
5739 #define ARIZONA_EQ3_B2_GAIN_SHIFT 6 /* EQ3_B2_GAIN - [10:6] */
5740 #define ARIZONA_EQ3_B2_GAIN_WIDTH 5 /* EQ3_B2_GAIN - [10:6] */
5741 #define ARIZONA_EQ3_B3_GAIN_MASK 0x003E /* EQ3_B3_GAIN - [5:1] */
5742 #define ARIZONA_EQ3_B3_GAIN_SHIFT 1 /* EQ3_B3_GAIN - [5:1] */
5743 #define ARIZONA_EQ3_B3_GAIN_WIDTH 5 /* EQ3_B3_GAIN - [5:1] */
5744 #define ARIZONA_EQ3_ENA 0x0001 /* EQ3_ENA */
5745 #define ARIZONA_EQ3_ENA_MASK 0x0001 /* EQ3_ENA */
5746 #define ARIZONA_EQ3_ENA_SHIFT 0 /* EQ3_ENA */
5747 #define ARIZONA_EQ3_ENA_WIDTH 1 /* EQ3_ENA */
5748 
5749 /*
5750  * R3645 (0xE3D) - EQ3_2
5751  */
5752 #define ARIZONA_EQ3_B4_GAIN_MASK 0xF800 /* EQ3_B4_GAIN - [15:11] */
5753 #define ARIZONA_EQ3_B4_GAIN_SHIFT 11 /* EQ3_B4_GAIN - [15:11] */
5754 #define ARIZONA_EQ3_B4_GAIN_WIDTH 5 /* EQ3_B4_GAIN - [15:11] */
5755 #define ARIZONA_EQ3_B5_GAIN_MASK 0x07C0 /* EQ3_B5_GAIN - [10:6] */
5756 #define ARIZONA_EQ3_B5_GAIN_SHIFT 6 /* EQ3_B5_GAIN - [10:6] */
5757 #define ARIZONA_EQ3_B5_GAIN_WIDTH 5 /* EQ3_B5_GAIN - [10:6] */
5758 #define ARIZONA_EQ3_B1_MODE 0x0001 /* EQ3_B1_MODE */
5759 #define ARIZONA_EQ3_B1_MODE_MASK 0x0001 /* EQ3_B1_MODE */
5760 #define ARIZONA_EQ3_B1_MODE_SHIFT 0 /* EQ3_B1_MODE */
5761 #define ARIZONA_EQ3_B1_MODE_WIDTH 1 /* EQ3_B1_MODE */
5762 
5763 /*
5764  * R3646 (0xE3E) - EQ3_3
5765  */
5766 #define ARIZONA_EQ3_B1_A_MASK 0xFFFF /* EQ3_B1_A - [15:0] */
5767 #define ARIZONA_EQ3_B1_A_SHIFT 0 /* EQ3_B1_A - [15:0] */
5768 #define ARIZONA_EQ3_B1_A_WIDTH 16 /* EQ3_B1_A - [15:0] */
5769 
5770 /*
5771  * R3647 (0xE3F) - EQ3_4
5772  */
5773 #define ARIZONA_EQ3_B1_B_MASK 0xFFFF /* EQ3_B1_B - [15:0] */
5774 #define ARIZONA_EQ3_B1_B_SHIFT 0 /* EQ3_B1_B - [15:0] */
5775 #define ARIZONA_EQ3_B1_B_WIDTH 16 /* EQ3_B1_B - [15:0] */
5776 
5777 /*
5778  * R3648 (0xE40) - EQ3_5
5779  */
5780 #define ARIZONA_EQ3_B1_PG_MASK 0xFFFF /* EQ3_B1_PG - [15:0] */
5781 #define ARIZONA_EQ3_B1_PG_SHIFT 0 /* EQ3_B1_PG - [15:0] */
5782 #define ARIZONA_EQ3_B1_PG_WIDTH 16 /* EQ3_B1_PG - [15:0] */
5783 
5784 /*
5785  * R3649 (0xE41) - EQ3_6
5786  */
5787 #define ARIZONA_EQ3_B2_A_MASK 0xFFFF /* EQ3_B2_A - [15:0] */
5788 #define ARIZONA_EQ3_B2_A_SHIFT 0 /* EQ3_B2_A - [15:0] */
5789 #define ARIZONA_EQ3_B2_A_WIDTH 16 /* EQ3_B2_A - [15:0] */
5790 
5791 /*
5792  * R3650 (0xE42) - EQ3_7
5793  */
5794 #define ARIZONA_EQ3_B2_B_MASK 0xFFFF /* EQ3_B2_B - [15:0] */
5795 #define ARIZONA_EQ3_B2_B_SHIFT 0 /* EQ3_B2_B - [15:0] */
5796 #define ARIZONA_EQ3_B2_B_WIDTH 16 /* EQ3_B2_B - [15:0] */
5797 
5798 /*
5799  * R3651 (0xE43) - EQ3_8
5800  */
5801 #define ARIZONA_EQ3_B2_C_MASK 0xFFFF /* EQ3_B2_C - [15:0] */
5802 #define ARIZONA_EQ3_B2_C_SHIFT 0 /* EQ3_B2_C - [15:0] */
5803 #define ARIZONA_EQ3_B2_C_WIDTH 16 /* EQ3_B2_C - [15:0] */
5804 
5805 /*
5806  * R3652 (0xE44) - EQ3_9
5807  */
5808 #define ARIZONA_EQ3_B2_PG_MASK 0xFFFF /* EQ3_B2_PG - [15:0] */
5809 #define ARIZONA_EQ3_B2_PG_SHIFT 0 /* EQ3_B2_PG - [15:0] */
5810 #define ARIZONA_EQ3_B2_PG_WIDTH 16 /* EQ3_B2_PG - [15:0] */
5811 
5812 /*
5813  * R3653 (0xE45) - EQ3_10
5814  */
5815 #define ARIZONA_EQ3_B3_A_MASK 0xFFFF /* EQ3_B3_A - [15:0] */
5816 #define ARIZONA_EQ3_B3_A_SHIFT 0 /* EQ3_B3_A - [15:0] */
5817 #define ARIZONA_EQ3_B3_A_WIDTH 16 /* EQ3_B3_A - [15:0] */
5818 
5819 /*
5820  * R3654 (0xE46) - EQ3_11
5821  */
5822 #define ARIZONA_EQ3_B3_B_MASK 0xFFFF /* EQ3_B3_B - [15:0] */
5823 #define ARIZONA_EQ3_B3_B_SHIFT 0 /* EQ3_B3_B - [15:0] */
5824 #define ARIZONA_EQ3_B3_B_WIDTH 16 /* EQ3_B3_B - [15:0] */
5825 
5826 /*
5827  * R3655 (0xE47) - EQ3_12
5828  */
5829 #define ARIZONA_EQ3_B3_C_MASK 0xFFFF /* EQ3_B3_C - [15:0] */
5830 #define ARIZONA_EQ3_B3_C_SHIFT 0 /* EQ3_B3_C - [15:0] */
5831 #define ARIZONA_EQ3_B3_C_WIDTH 16 /* EQ3_B3_C - [15:0] */
5832 
5833 /*
5834  * R3656 (0xE48) - EQ3_13
5835  */
5836 #define ARIZONA_EQ3_B3_PG_MASK 0xFFFF /* EQ3_B3_PG - [15:0] */
5837 #define ARIZONA_EQ3_B3_PG_SHIFT 0 /* EQ3_B3_PG - [15:0] */
5838 #define ARIZONA_EQ3_B3_PG_WIDTH 16 /* EQ3_B3_PG - [15:0] */
5839 
5840 /*
5841  * R3657 (0xE49) - EQ3_14
5842  */
5843 #define ARIZONA_EQ3_B4_A_MASK 0xFFFF /* EQ3_B4_A - [15:0] */
5844 #define ARIZONA_EQ3_B4_A_SHIFT 0 /* EQ3_B4_A - [15:0] */
5845 #define ARIZONA_EQ3_B4_A_WIDTH 16 /* EQ3_B4_A - [15:0] */
5846 
5847 /*
5848  * R3658 (0xE4A) - EQ3_15
5849  */
5850 #define ARIZONA_EQ3_B4_B_MASK 0xFFFF /* EQ3_B4_B - [15:0] */
5851 #define ARIZONA_EQ3_B4_B_SHIFT 0 /* EQ3_B4_B - [15:0] */
5852 #define ARIZONA_EQ3_B4_B_WIDTH 16 /* EQ3_B4_B - [15:0] */
5853 
5854 /*
5855  * R3659 (0xE4B) - EQ3_16
5856  */
5857 #define ARIZONA_EQ3_B4_C_MASK 0xFFFF /* EQ3_B4_C - [15:0] */
5858 #define ARIZONA_EQ3_B4_C_SHIFT 0 /* EQ3_B4_C - [15:0] */
5859 #define ARIZONA_EQ3_B4_C_WIDTH 16 /* EQ3_B4_C - [15:0] */
5860 
5861 /*
5862  * R3660 (0xE4C) - EQ3_17
5863  */
5864 #define ARIZONA_EQ3_B4_PG_MASK 0xFFFF /* EQ3_B4_PG - [15:0] */
5865 #define ARIZONA_EQ3_B4_PG_SHIFT 0 /* EQ3_B4_PG - [15:0] */
5866 #define ARIZONA_EQ3_B4_PG_WIDTH 16 /* EQ3_B4_PG - [15:0] */
5867 
5868 /*
5869  * R3661 (0xE4D) - EQ3_18
5870  */
5871 #define ARIZONA_EQ3_B5_A_MASK 0xFFFF /* EQ3_B5_A - [15:0] */
5872 #define ARIZONA_EQ3_B5_A_SHIFT 0 /* EQ3_B5_A - [15:0] */
5873 #define ARIZONA_EQ3_B5_A_WIDTH 16 /* EQ3_B5_A - [15:0] */
5874 
5875 /*
5876  * R3662 (0xE4E) - EQ3_19
5877  */
5878 #define ARIZONA_EQ3_B5_B_MASK 0xFFFF /* EQ3_B5_B - [15:0] */
5879 #define ARIZONA_EQ3_B5_B_SHIFT 0 /* EQ3_B5_B - [15:0] */
5880 #define ARIZONA_EQ3_B5_B_WIDTH 16 /* EQ3_B5_B - [15:0] */
5881 
5882 /*
5883  * R3663 (0xE4F) - EQ3_20
5884  */
5885 #define ARIZONA_EQ3_B5_PG_MASK 0xFFFF /* EQ3_B5_PG - [15:0] */
5886 #define ARIZONA_EQ3_B5_PG_SHIFT 0 /* EQ3_B5_PG - [15:0] */
5887 #define ARIZONA_EQ3_B5_PG_WIDTH 16 /* EQ3_B5_PG - [15:0] */
5888 
5889 /*
5890  * R3664 (0xE50) - EQ3_21
5891  */
5892 #define ARIZONA_EQ3_B1_C_MASK 0xFFFF /* EQ3_B1_C - [15:0] */
5893 #define ARIZONA_EQ3_B1_C_SHIFT 0 /* EQ3_B1_C - [15:0] */
5894 #define ARIZONA_EQ3_B1_C_WIDTH 16 /* EQ3_B1_C - [15:0] */
5895 
5896 /*
5897  * R3666 (0xE52) - EQ4_1
5898  */
5899 #define ARIZONA_EQ4_B1_GAIN_MASK 0xF800 /* EQ4_B1_GAIN - [15:11] */
5900 #define ARIZONA_EQ4_B1_GAIN_SHIFT 11 /* EQ4_B1_GAIN - [15:11] */
5901 #define ARIZONA_EQ4_B1_GAIN_WIDTH 5 /* EQ4_B1_GAIN - [15:11] */
5902 #define ARIZONA_EQ4_B2_GAIN_MASK 0x07C0 /* EQ4_B2_GAIN - [10:6] */
5903 #define ARIZONA_EQ4_B2_GAIN_SHIFT 6 /* EQ4_B2_GAIN - [10:6] */
5904 #define ARIZONA_EQ4_B2_GAIN_WIDTH 5 /* EQ4_B2_GAIN - [10:6] */
5905 #define ARIZONA_EQ4_B3_GAIN_MASK 0x003E /* EQ4_B3_GAIN - [5:1] */
5906 #define ARIZONA_EQ4_B3_GAIN_SHIFT 1 /* EQ4_B3_GAIN - [5:1] */
5907 #define ARIZONA_EQ4_B3_GAIN_WIDTH 5 /* EQ4_B3_GAIN - [5:1] */
5908 #define ARIZONA_EQ4_ENA 0x0001 /* EQ4_ENA */
5909 #define ARIZONA_EQ4_ENA_MASK 0x0001 /* EQ4_ENA */
5910 #define ARIZONA_EQ4_ENA_SHIFT 0 /* EQ4_ENA */
5911 #define ARIZONA_EQ4_ENA_WIDTH 1 /* EQ4_ENA */
5912 
5913 /*
5914  * R3667 (0xE53) - EQ4_2
5915  */
5916 #define ARIZONA_EQ4_B4_GAIN_MASK 0xF800 /* EQ4_B4_GAIN - [15:11] */
5917 #define ARIZONA_EQ4_B4_GAIN_SHIFT 11 /* EQ4_B4_GAIN - [15:11] */
5918 #define ARIZONA_EQ4_B4_GAIN_WIDTH 5 /* EQ4_B4_GAIN - [15:11] */
5919 #define ARIZONA_EQ4_B5_GAIN_MASK 0x07C0 /* EQ4_B5_GAIN - [10:6] */
5920 #define ARIZONA_EQ4_B5_GAIN_SHIFT 6 /* EQ4_B5_GAIN - [10:6] */
5921 #define ARIZONA_EQ4_B5_GAIN_WIDTH 5 /* EQ4_B5_GAIN - [10:6] */
5922 #define ARIZONA_EQ4_B1_MODE 0x0001 /* EQ4_B1_MODE */
5923 #define ARIZONA_EQ4_B1_MODE_MASK 0x0001 /* EQ4_B1_MODE */
5924 #define ARIZONA_EQ4_B1_MODE_SHIFT 0 /* EQ4_B1_MODE */
5925 #define ARIZONA_EQ4_B1_MODE_WIDTH 1 /* EQ4_B1_MODE */
5926 
5927 /*
5928  * R3668 (0xE54) - EQ4_3
5929  */
5930 #define ARIZONA_EQ4_B1_A_MASK 0xFFFF /* EQ4_B1_A - [15:0] */
5931 #define ARIZONA_EQ4_B1_A_SHIFT 0 /* EQ4_B1_A - [15:0] */
5932 #define ARIZONA_EQ4_B1_A_WIDTH 16 /* EQ4_B1_A - [15:0] */
5933 
5934 /*
5935  * R3669 (0xE55) - EQ4_4
5936  */
5937 #define ARIZONA_EQ4_B1_B_MASK 0xFFFF /* EQ4_B1_B - [15:0] */
5938 #define ARIZONA_EQ4_B1_B_SHIFT 0 /* EQ4_B1_B - [15:0] */
5939 #define ARIZONA_EQ4_B1_B_WIDTH 16 /* EQ4_B1_B - [15:0] */
5940 
5941 /*
5942  * R3670 (0xE56) - EQ4_5
5943  */
5944 #define ARIZONA_EQ4_B1_PG_MASK 0xFFFF /* EQ4_B1_PG - [15:0] */
5945 #define ARIZONA_EQ4_B1_PG_SHIFT 0 /* EQ4_B1_PG - [15:0] */
5946 #define ARIZONA_EQ4_B1_PG_WIDTH 16 /* EQ4_B1_PG - [15:0] */
5947 
5948 /*
5949  * R3671 (0xE57) - EQ4_6
5950  */
5951 #define ARIZONA_EQ4_B2_A_MASK 0xFFFF /* EQ4_B2_A - [15:0] */
5952 #define ARIZONA_EQ4_B2_A_SHIFT 0 /* EQ4_B2_A - [15:0] */
5953 #define ARIZONA_EQ4_B2_A_WIDTH 16 /* EQ4_B2_A - [15:0] */
5954 
5955 /*
5956  * R3672 (0xE58) - EQ4_7
5957  */
5958 #define ARIZONA_EQ4_B2_B_MASK 0xFFFF /* EQ4_B2_B - [15:0] */
5959 #define ARIZONA_EQ4_B2_B_SHIFT 0 /* EQ4_B2_B - [15:0] */
5960 #define ARIZONA_EQ4_B2_B_WIDTH 16 /* EQ4_B2_B - [15:0] */
5961 
5962 /*
5963  * R3673 (0xE59) - EQ4_8
5964  */
5965 #define ARIZONA_EQ4_B2_C_MASK 0xFFFF /* EQ4_B2_C - [15:0] */
5966 #define ARIZONA_EQ4_B2_C_SHIFT 0 /* EQ4_B2_C - [15:0] */
5967 #define ARIZONA_EQ4_B2_C_WIDTH 16 /* EQ4_B2_C - [15:0] */
5968 
5969 /*
5970  * R3674 (0xE5A) - EQ4_9
5971  */
5972 #define ARIZONA_EQ4_B2_PG_MASK 0xFFFF /* EQ4_B2_PG - [15:0] */
5973 #define ARIZONA_EQ4_B2_PG_SHIFT 0 /* EQ4_B2_PG - [15:0] */
5974 #define ARIZONA_EQ4_B2_PG_WIDTH 16 /* EQ4_B2_PG - [15:0] */
5975 
5976 /*
5977  * R3675 (0xE5B) - EQ4_10
5978  */
5979 #define ARIZONA_EQ4_B3_A_MASK 0xFFFF /* EQ4_B3_A - [15:0] */
5980 #define ARIZONA_EQ4_B3_A_SHIFT 0 /* EQ4_B3_A - [15:0] */
5981 #define ARIZONA_EQ4_B3_A_WIDTH 16 /* EQ4_B3_A - [15:0] */
5982 
5983 /*
5984  * R3676 (0xE5C) - EQ4_11
5985  */
5986 #define ARIZONA_EQ4_B3_B_MASK 0xFFFF /* EQ4_B3_B - [15:0] */
5987 #define ARIZONA_EQ4_B3_B_SHIFT 0 /* EQ4_B3_B - [15:0] */
5988 #define ARIZONA_EQ4_B3_B_WIDTH 16 /* EQ4_B3_B - [15:0] */
5989 
5990 /*
5991  * R3677 (0xE5D) - EQ4_12
5992  */
5993 #define ARIZONA_EQ4_B3_C_MASK 0xFFFF /* EQ4_B3_C - [15:0] */
5994 #define ARIZONA_EQ4_B3_C_SHIFT 0 /* EQ4_B3_C - [15:0] */
5995 #define ARIZONA_EQ4_B3_C_WIDTH 16 /* EQ4_B3_C - [15:0] */
5996 
5997 /*
5998  * R3678 (0xE5E) - EQ4_13
5999  */
6000 #define ARIZONA_EQ4_B3_PG_MASK 0xFFFF /* EQ4_B3_PG - [15:0] */
6001 #define ARIZONA_EQ4_B3_PG_SHIFT 0 /* EQ4_B3_PG - [15:0] */
6002 #define ARIZONA_EQ4_B3_PG_WIDTH 16 /* EQ4_B3_PG - [15:0] */
6003 
6004 /*
6005  * R3679 (0xE5F) - EQ4_14
6006  */
6007 #define ARIZONA_EQ4_B4_A_MASK 0xFFFF /* EQ4_B4_A - [15:0] */
6008 #define ARIZONA_EQ4_B4_A_SHIFT 0 /* EQ4_B4_A - [15:0] */
6009 #define ARIZONA_EQ4_B4_A_WIDTH 16 /* EQ4_B4_A - [15:0] */
6010 
6011 /*
6012  * R3680 (0xE60) - EQ4_15
6013  */
6014 #define ARIZONA_EQ4_B4_B_MASK 0xFFFF /* EQ4_B4_B - [15:0] */
6015 #define ARIZONA_EQ4_B4_B_SHIFT 0 /* EQ4_B4_B - [15:0] */
6016 #define ARIZONA_EQ4_B4_B_WIDTH 16 /* EQ4_B4_B - [15:0] */
6017 
6018 /*
6019  * R3681 (0xE61) - EQ4_16
6020  */
6021 #define ARIZONA_EQ4_B4_C_MASK 0xFFFF /* EQ4_B4_C - [15:0] */
6022 #define ARIZONA_EQ4_B4_C_SHIFT 0 /* EQ4_B4_C - [15:0] */
6023 #define ARIZONA_EQ4_B4_C_WIDTH 16 /* EQ4_B4_C - [15:0] */
6024 
6025 /*
6026  * R3682 (0xE62) - EQ4_17
6027  */
6028 #define ARIZONA_EQ4_B4_PG_MASK 0xFFFF /* EQ4_B4_PG - [15:0] */
6029 #define ARIZONA_EQ4_B4_PG_SHIFT 0 /* EQ4_B4_PG - [15:0] */
6030 #define ARIZONA_EQ4_B4_PG_WIDTH 16 /* EQ4_B4_PG - [15:0] */
6031 
6032 /*
6033  * R3683 (0xE63) - EQ4_18
6034  */
6035 #define ARIZONA_EQ4_B5_A_MASK 0xFFFF /* EQ4_B5_A - [15:0] */
6036 #define ARIZONA_EQ4_B5_A_SHIFT 0 /* EQ4_B5_A - [15:0] */
6037 #define ARIZONA_EQ4_B5_A_WIDTH 16 /* EQ4_B5_A - [15:0] */
6038 
6039 /*
6040  * R3684 (0xE64) - EQ4_19
6041  */
6042 #define ARIZONA_EQ4_B5_B_MASK 0xFFFF /* EQ4_B5_B - [15:0] */
6043 #define ARIZONA_EQ4_B5_B_SHIFT 0 /* EQ4_B5_B - [15:0] */
6044 #define ARIZONA_EQ4_B5_B_WIDTH 16 /* EQ4_B5_B - [15:0] */
6045 
6046 /*
6047  * R3685 (0xE65) - EQ4_20
6048  */
6049 #define ARIZONA_EQ4_B5_PG_MASK 0xFFFF /* EQ4_B5_PG - [15:0] */
6050 #define ARIZONA_EQ4_B5_PG_SHIFT 0 /* EQ4_B5_PG - [15:0] */
6051 #define ARIZONA_EQ4_B5_PG_WIDTH 16 /* EQ4_B5_PG - [15:0] */
6052 
6053 /*
6054  * R3686 (0xE66) - EQ4_21
6055  */
6056 #define ARIZONA_EQ4_B1_C_MASK 0xFFFF /* EQ4_B1_C - [15:0] */
6057 #define ARIZONA_EQ4_B1_C_SHIFT 0 /* EQ4_B1_C - [15:0] */
6058 #define ARIZONA_EQ4_B1_C_WIDTH 16 /* EQ4_B1_C - [15:0] */
6059 
6060 /*
6061  * R3712 (0xE80) - DRC1 ctrl1
6062  */
6063 #define ARIZONA_DRC1_SIG_DET_RMS_MASK 0xF800 /* DRC1_SIG_DET_RMS - [15:11] */
6064 #define ARIZONA_DRC1_SIG_DET_RMS_SHIFT 11 /* DRC1_SIG_DET_RMS - [15:11] */
6065 #define ARIZONA_DRC1_SIG_DET_RMS_WIDTH 5 /* DRC1_SIG_DET_RMS - [15:11] */
6066 #define ARIZONA_DRC1_SIG_DET_PK_MASK 0x0600 /* DRC1_SIG_DET_PK - [10:9] */
6067 #define ARIZONA_DRC1_SIG_DET_PK_SHIFT 9 /* DRC1_SIG_DET_PK - [10:9] */
6068 #define ARIZONA_DRC1_SIG_DET_PK_WIDTH 2 /* DRC1_SIG_DET_PK - [10:9] */
6069 #define ARIZONA_DRC1_NG_ENA 0x0100 /* DRC1_NG_ENA */
6070 #define ARIZONA_DRC1_NG_ENA_MASK 0x0100 /* DRC1_NG_ENA */
6071 #define ARIZONA_DRC1_NG_ENA_SHIFT 8 /* DRC1_NG_ENA */
6072 #define ARIZONA_DRC1_NG_ENA_WIDTH 1 /* DRC1_NG_ENA */
6073 #define ARIZONA_DRC1_SIG_DET_MODE 0x0080 /* DRC1_SIG_DET_MODE */
6074 #define ARIZONA_DRC1_SIG_DET_MODE_MASK 0x0080 /* DRC1_SIG_DET_MODE */
6075 #define ARIZONA_DRC1_SIG_DET_MODE_SHIFT 7 /* DRC1_SIG_DET_MODE */
6076 #define ARIZONA_DRC1_SIG_DET_MODE_WIDTH 1 /* DRC1_SIG_DET_MODE */
6077 #define ARIZONA_DRC1_SIG_DET 0x0040 /* DRC1_SIG_DET */
6078 #define ARIZONA_DRC1_SIG_DET_MASK 0x0040 /* DRC1_SIG_DET */
6079 #define ARIZONA_DRC1_SIG_DET_SHIFT 6 /* DRC1_SIG_DET */
6080 #define ARIZONA_DRC1_SIG_DET_WIDTH 1 /* DRC1_SIG_DET */
6081 #define ARIZONA_DRC1_KNEE2_OP_ENA 0x0020 /* DRC1_KNEE2_OP_ENA */
6082 #define ARIZONA_DRC1_KNEE2_OP_ENA_MASK 0x0020 /* DRC1_KNEE2_OP_ENA */
6083 #define ARIZONA_DRC1_KNEE2_OP_ENA_SHIFT 5 /* DRC1_KNEE2_OP_ENA */
6084 #define ARIZONA_DRC1_KNEE2_OP_ENA_WIDTH 1 /* DRC1_KNEE2_OP_ENA */
6085 #define ARIZONA_DRC1_QR 0x0010 /* DRC1_QR */
6086 #define ARIZONA_DRC1_QR_MASK 0x0010 /* DRC1_QR */
6087 #define ARIZONA_DRC1_QR_SHIFT 4 /* DRC1_QR */
6088 #define ARIZONA_DRC1_QR_WIDTH 1 /* DRC1_QR */
6089 #define ARIZONA_DRC1_ANTICLIP 0x0008 /* DRC1_ANTICLIP */
6090 #define ARIZONA_DRC1_ANTICLIP_MASK 0x0008 /* DRC1_ANTICLIP */
6091 #define ARIZONA_DRC1_ANTICLIP_SHIFT 3 /* DRC1_ANTICLIP */
6092 #define ARIZONA_DRC1_ANTICLIP_WIDTH 1 /* DRC1_ANTICLIP */
6093 #define ARIZONA_DRC1L_ENA 0x0002 /* DRC1L_ENA */
6094 #define ARIZONA_DRC1L_ENA_MASK 0x0002 /* DRC1L_ENA */
6095 #define ARIZONA_DRC1L_ENA_SHIFT 1 /* DRC1L_ENA */
6096 #define ARIZONA_DRC1L_ENA_WIDTH 1 /* DRC1L_ENA */
6097 #define ARIZONA_DRC1R_ENA 0x0001 /* DRC1R_ENA */
6098 #define ARIZONA_DRC1R_ENA_MASK 0x0001 /* DRC1R_ENA */
6099 #define ARIZONA_DRC1R_ENA_SHIFT 0 /* DRC1R_ENA */
6100 #define ARIZONA_DRC1R_ENA_WIDTH 1 /* DRC1R_ENA */
6101 
6102 /*
6103  * R3713 (0xE81) - DRC1 ctrl2
6104  */
6105 #define ARIZONA_DRC1_ATK_MASK 0x1E00 /* DRC1_ATK - [12:9] */
6106 #define ARIZONA_DRC1_ATK_SHIFT 9 /* DRC1_ATK - [12:9] */
6107 #define ARIZONA_DRC1_ATK_WIDTH 4 /* DRC1_ATK - [12:9] */
6108 #define ARIZONA_DRC1_DCY_MASK 0x01E0 /* DRC1_DCY - [8:5] */
6109 #define ARIZONA_DRC1_DCY_SHIFT 5 /* DRC1_DCY - [8:5] */
6110 #define ARIZONA_DRC1_DCY_WIDTH 4 /* DRC1_DCY - [8:5] */
6111 #define ARIZONA_DRC1_MINGAIN_MASK 0x001C /* DRC1_MINGAIN - [4:2] */
6112 #define ARIZONA_DRC1_MINGAIN_SHIFT 2 /* DRC1_MINGAIN - [4:2] */
6113 #define ARIZONA_DRC1_MINGAIN_WIDTH 3 /* DRC1_MINGAIN - [4:2] */
6114 #define ARIZONA_DRC1_MAXGAIN_MASK 0x0003 /* DRC1_MAXGAIN - [1:0] */
6115 #define ARIZONA_DRC1_MAXGAIN_SHIFT 0 /* DRC1_MAXGAIN - [1:0] */
6116 #define ARIZONA_DRC1_MAXGAIN_WIDTH 2 /* DRC1_MAXGAIN - [1:0] */
6117 
6118 /*
6119  * R3714 (0xE82) - DRC1 ctrl3
6120  */
6121 #define ARIZONA_DRC1_NG_MINGAIN_MASK 0xF000 /* DRC1_NG_MINGAIN - [15:12] */
6122 #define ARIZONA_DRC1_NG_MINGAIN_SHIFT 12 /* DRC1_NG_MINGAIN - [15:12] */
6123 #define ARIZONA_DRC1_NG_MINGAIN_WIDTH 4 /* DRC1_NG_MINGAIN - [15:12] */
6124 #define ARIZONA_DRC1_NG_EXP_MASK 0x0C00 /* DRC1_NG_EXP - [11:10] */
6125 #define ARIZONA_DRC1_NG_EXP_SHIFT 10 /* DRC1_NG_EXP - [11:10] */
6126 #define ARIZONA_DRC1_NG_EXP_WIDTH 2 /* DRC1_NG_EXP - [11:10] */
6127 #define ARIZONA_DRC1_QR_THR_MASK 0x0300 /* DRC1_QR_THR - [9:8] */
6128 #define ARIZONA_DRC1_QR_THR_SHIFT 8 /* DRC1_QR_THR - [9:8] */
6129 #define ARIZONA_DRC1_QR_THR_WIDTH 2 /* DRC1_QR_THR - [9:8] */
6130 #define ARIZONA_DRC1_QR_DCY_MASK 0x00C0 /* DRC1_QR_DCY - [7:6] */
6131 #define ARIZONA_DRC1_QR_DCY_SHIFT 6 /* DRC1_QR_DCY - [7:6] */
6132 #define ARIZONA_DRC1_QR_DCY_WIDTH 2 /* DRC1_QR_DCY - [7:6] */
6133 #define ARIZONA_DRC1_HI_COMP_MASK 0x0038 /* DRC1_HI_COMP - [5:3] */
6134 #define ARIZONA_DRC1_HI_COMP_SHIFT 3 /* DRC1_HI_COMP - [5:3] */
6135 #define ARIZONA_DRC1_HI_COMP_WIDTH 3 /* DRC1_HI_COMP - [5:3] */
6136 #define ARIZONA_DRC1_LO_COMP_MASK 0x0007 /* DRC1_LO_COMP - [2:0] */
6137 #define ARIZONA_DRC1_LO_COMP_SHIFT 0 /* DRC1_LO_COMP - [2:0] */
6138 #define ARIZONA_DRC1_LO_COMP_WIDTH 3 /* DRC1_LO_COMP - [2:0] */
6139 
6140 /*
6141  * R3715 (0xE83) - DRC1 ctrl4
6142  */
6143 #define ARIZONA_DRC1_KNEE_IP_MASK 0x07E0 /* DRC1_KNEE_IP - [10:5] */
6144 #define ARIZONA_DRC1_KNEE_IP_SHIFT 5 /* DRC1_KNEE_IP - [10:5] */
6145 #define ARIZONA_DRC1_KNEE_IP_WIDTH 6 /* DRC1_KNEE_IP - [10:5] */
6146 #define ARIZONA_DRC1_KNEE_OP_MASK 0x001F /* DRC1_KNEE_OP - [4:0] */
6147 #define ARIZONA_DRC1_KNEE_OP_SHIFT 0 /* DRC1_KNEE_OP - [4:0] */
6148 #define ARIZONA_DRC1_KNEE_OP_WIDTH 5 /* DRC1_KNEE_OP - [4:0] */
6149 
6150 /*
6151  * R3716 (0xE84) - DRC1 ctrl5
6152  */
6153 #define ARIZONA_DRC1_KNEE2_IP_MASK 0x03E0 /* DRC1_KNEE2_IP - [9:5] */
6154 #define ARIZONA_DRC1_KNEE2_IP_SHIFT 5 /* DRC1_KNEE2_IP - [9:5] */
6155 #define ARIZONA_DRC1_KNEE2_IP_WIDTH 5 /* DRC1_KNEE2_IP - [9:5] */
6156 #define ARIZONA_DRC1_KNEE2_OP_MASK 0x001F /* DRC1_KNEE2_OP - [4:0] */
6157 #define ARIZONA_DRC1_KNEE2_OP_SHIFT 0 /* DRC1_KNEE2_OP - [4:0] */
6158 #define ARIZONA_DRC1_KNEE2_OP_WIDTH 5 /* DRC1_KNEE2_OP - [4:0] */
6159 
6160 /*
6161  * R3721 (0xE89) - DRC2 ctrl1
6162  */
6163 #define ARIZONA_DRC2_SIG_DET_RMS_MASK 0xF800 /* DRC2_SIG_DET_RMS - [15:11] */
6164 #define ARIZONA_DRC2_SIG_DET_RMS_SHIFT 11 /* DRC2_SIG_DET_RMS - [15:11] */
6165 #define ARIZONA_DRC2_SIG_DET_RMS_WIDTH 5 /* DRC2_SIG_DET_RMS - [15:11] */
6166 #define ARIZONA_DRC2_SIG_DET_PK_MASK 0x0600 /* DRC2_SIG_DET_PK - [10:9] */
6167 #define ARIZONA_DRC2_SIG_DET_PK_SHIFT 9 /* DRC2_SIG_DET_PK - [10:9] */
6168 #define ARIZONA_DRC2_SIG_DET_PK_WIDTH 2 /* DRC2_SIG_DET_PK - [10:9] */
6169 #define ARIZONA_DRC2_NG_ENA 0x0100 /* DRC2_NG_ENA */
6170 #define ARIZONA_DRC2_NG_ENA_MASK 0x0100 /* DRC2_NG_ENA */
6171 #define ARIZONA_DRC2_NG_ENA_SHIFT 8 /* DRC2_NG_ENA */
6172 #define ARIZONA_DRC2_NG_ENA_WIDTH 1 /* DRC2_NG_ENA */
6173 #define ARIZONA_DRC2_SIG_DET_MODE 0x0080 /* DRC2_SIG_DET_MODE */
6174 #define ARIZONA_DRC2_SIG_DET_MODE_MASK 0x0080 /* DRC2_SIG_DET_MODE */
6175 #define ARIZONA_DRC2_SIG_DET_MODE_SHIFT 7 /* DRC2_SIG_DET_MODE */
6176 #define ARIZONA_DRC2_SIG_DET_MODE_WIDTH 1 /* DRC2_SIG_DET_MODE */
6177 #define ARIZONA_DRC2_SIG_DET 0x0040 /* DRC2_SIG_DET */
6178 #define ARIZONA_DRC2_SIG_DET_MASK 0x0040 /* DRC2_SIG_DET */
6179 #define ARIZONA_DRC2_SIG_DET_SHIFT 6 /* DRC2_SIG_DET */
6180 #define ARIZONA_DRC2_SIG_DET_WIDTH 1 /* DRC2_SIG_DET */
6181 #define ARIZONA_DRC2_KNEE2_OP_ENA 0x0020 /* DRC2_KNEE2_OP_ENA */
6182 #define ARIZONA_DRC2_KNEE2_OP_ENA_MASK 0x0020 /* DRC2_KNEE2_OP_ENA */
6183 #define ARIZONA_DRC2_KNEE2_OP_ENA_SHIFT 5 /* DRC2_KNEE2_OP_ENA */
6184 #define ARIZONA_DRC2_KNEE2_OP_ENA_WIDTH 1 /* DRC2_KNEE2_OP_ENA */
6185 #define ARIZONA_DRC2_QR 0x0010 /* DRC2_QR */
6186 #define ARIZONA_DRC2_QR_MASK 0x0010 /* DRC2_QR */
6187 #define ARIZONA_DRC2_QR_SHIFT 4 /* DRC2_QR */
6188 #define ARIZONA_DRC2_QR_WIDTH 1 /* DRC2_QR */
6189 #define ARIZONA_DRC2_ANTICLIP 0x0008 /* DRC2_ANTICLIP */
6190 #define ARIZONA_DRC2_ANTICLIP_MASK 0x0008 /* DRC2_ANTICLIP */
6191 #define ARIZONA_DRC2_ANTICLIP_SHIFT 3 /* DRC2_ANTICLIP */
6192 #define ARIZONA_DRC2_ANTICLIP_WIDTH 1 /* DRC2_ANTICLIP */
6193 #define ARIZONA_DRC2L_ENA 0x0002 /* DRC2L_ENA */
6194 #define ARIZONA_DRC2L_ENA_MASK 0x0002 /* DRC2L_ENA */
6195 #define ARIZONA_DRC2L_ENA_SHIFT 1 /* DRC2L_ENA */
6196 #define ARIZONA_DRC2L_ENA_WIDTH 1 /* DRC2L_ENA */
6197 #define ARIZONA_DRC2R_ENA 0x0001 /* DRC2R_ENA */
6198 #define ARIZONA_DRC2R_ENA_MASK 0x0001 /* DRC2R_ENA */
6199 #define ARIZONA_DRC2R_ENA_SHIFT 0 /* DRC2R_ENA */
6200 #define ARIZONA_DRC2R_ENA_WIDTH 1 /* DRC2R_ENA */
6201 
6202 /*
6203  * R3722 (0xE8A) - DRC2 ctrl2
6204  */
6205 #define ARIZONA_DRC2_ATK_MASK 0x1E00 /* DRC2_ATK - [12:9] */
6206 #define ARIZONA_DRC2_ATK_SHIFT 9 /* DRC2_ATK - [12:9] */
6207 #define ARIZONA_DRC2_ATK_WIDTH 4 /* DRC2_ATK - [12:9] */
6208 #define ARIZONA_DRC2_DCY_MASK 0x01E0 /* DRC2_DCY - [8:5] */
6209 #define ARIZONA_DRC2_DCY_SHIFT 5 /* DRC2_DCY - [8:5] */
6210 #define ARIZONA_DRC2_DCY_WIDTH 4 /* DRC2_DCY - [8:5] */
6211 #define ARIZONA_DRC2_MINGAIN_MASK 0x001C /* DRC2_MINGAIN - [4:2] */
6212 #define ARIZONA_DRC2_MINGAIN_SHIFT 2 /* DRC2_MINGAIN - [4:2] */
6213 #define ARIZONA_DRC2_MINGAIN_WIDTH 3 /* DRC2_MINGAIN - [4:2] */
6214 #define ARIZONA_DRC2_MAXGAIN_MASK 0x0003 /* DRC2_MAXGAIN - [1:0] */
6215 #define ARIZONA_DRC2_MAXGAIN_SHIFT 0 /* DRC2_MAXGAIN - [1:0] */
6216 #define ARIZONA_DRC2_MAXGAIN_WIDTH 2 /* DRC2_MAXGAIN - [1:0] */
6217 
6218 /*
6219  * R3723 (0xE8B) - DRC2 ctrl3
6220  */
6221 #define ARIZONA_DRC2_NG_MINGAIN_MASK 0xF000 /* DRC2_NG_MINGAIN - [15:12] */
6222 #define ARIZONA_DRC2_NG_MINGAIN_SHIFT 12 /* DRC2_NG_MINGAIN - [15:12] */
6223 #define ARIZONA_DRC2_NG_MINGAIN_WIDTH 4 /* DRC2_NG_MINGAIN - [15:12] */
6224 #define ARIZONA_DRC2_NG_EXP_MASK 0x0C00 /* DRC2_NG_EXP - [11:10] */
6225 #define ARIZONA_DRC2_NG_EXP_SHIFT 10 /* DRC2_NG_EXP - [11:10] */
6226 #define ARIZONA_DRC2_NG_EXP_WIDTH 2 /* DRC2_NG_EXP - [11:10] */
6227 #define ARIZONA_DRC2_QR_THR_MASK 0x0300 /* DRC2_QR_THR - [9:8] */
6228 #define ARIZONA_DRC2_QR_THR_SHIFT 8 /* DRC2_QR_THR - [9:8] */
6229 #define ARIZONA_DRC2_QR_THR_WIDTH 2 /* DRC2_QR_THR - [9:8] */
6230 #define ARIZONA_DRC2_QR_DCY_MASK 0x00C0 /* DRC2_QR_DCY - [7:6] */
6231 #define ARIZONA_DRC2_QR_DCY_SHIFT 6 /* DRC2_QR_DCY - [7:6] */
6232 #define ARIZONA_DRC2_QR_DCY_WIDTH 2 /* DRC2_QR_DCY - [7:6] */
6233 #define ARIZONA_DRC2_HI_COMP_MASK 0x0038 /* DRC2_HI_COMP - [5:3] */
6234 #define ARIZONA_DRC2_HI_COMP_SHIFT 3 /* DRC2_HI_COMP - [5:3] */
6235 #define ARIZONA_DRC2_HI_COMP_WIDTH 3 /* DRC2_HI_COMP - [5:3] */
6236 #define ARIZONA_DRC2_LO_COMP_MASK 0x0007 /* DRC2_LO_COMP - [2:0] */
6237 #define ARIZONA_DRC2_LO_COMP_SHIFT 0 /* DRC2_LO_COMP - [2:0] */
6238 #define ARIZONA_DRC2_LO_COMP_WIDTH 3 /* DRC2_LO_COMP - [2:0] */
6239 
6240 /*
6241  * R3724 (0xE8C) - DRC2 ctrl4
6242  */
6243 #define ARIZONA_DRC2_KNEE_IP_MASK 0x07E0 /* DRC2_KNEE_IP - [10:5] */
6244 #define ARIZONA_DRC2_KNEE_IP_SHIFT 5 /* DRC2_KNEE_IP - [10:5] */
6245 #define ARIZONA_DRC2_KNEE_IP_WIDTH 6 /* DRC2_KNEE_IP - [10:5] */
6246 #define ARIZONA_DRC2_KNEE_OP_MASK 0x001F /* DRC2_KNEE_OP - [4:0] */
6247 #define ARIZONA_DRC2_KNEE_OP_SHIFT 0 /* DRC2_KNEE_OP - [4:0] */
6248 #define ARIZONA_DRC2_KNEE_OP_WIDTH 5 /* DRC2_KNEE_OP - [4:0] */
6249 
6250 /*
6251  * R3725 (0xE8D) - DRC2 ctrl5
6252  */
6253 #define ARIZONA_DRC2_KNEE2_IP_MASK 0x03E0 /* DRC2_KNEE2_IP - [9:5] */
6254 #define ARIZONA_DRC2_KNEE2_IP_SHIFT 5 /* DRC2_KNEE2_IP - [9:5] */
6255 #define ARIZONA_DRC2_KNEE2_IP_WIDTH 5 /* DRC2_KNEE2_IP - [9:5] */
6256 #define ARIZONA_DRC2_KNEE2_OP_MASK 0x001F /* DRC2_KNEE2_OP - [4:0] */
6257 #define ARIZONA_DRC2_KNEE2_OP_SHIFT 0 /* DRC2_KNEE2_OP - [4:0] */
6258 #define ARIZONA_DRC2_KNEE2_OP_WIDTH 5 /* DRC2_KNEE2_OP - [4:0] */
6259 
6260 /*
6261  * R3776 (0xEC0) - HPLPF1_1
6262  */
6263 #define ARIZONA_LHPF1_MODE 0x0002 /* LHPF1_MODE */
6264 #define ARIZONA_LHPF1_MODE_MASK 0x0002 /* LHPF1_MODE */
6265 #define ARIZONA_LHPF1_MODE_SHIFT 1 /* LHPF1_MODE */
6266 #define ARIZONA_LHPF1_MODE_WIDTH 1 /* LHPF1_MODE */
6267 #define ARIZONA_LHPF1_ENA 0x0001 /* LHPF1_ENA */
6268 #define ARIZONA_LHPF1_ENA_MASK 0x0001 /* LHPF1_ENA */
6269 #define ARIZONA_LHPF1_ENA_SHIFT 0 /* LHPF1_ENA */
6270 #define ARIZONA_LHPF1_ENA_WIDTH 1 /* LHPF1_ENA */
6271 
6272 /*
6273  * R3777 (0xEC1) - HPLPF1_2
6274  */
6275 #define ARIZONA_LHPF1_COEFF_MASK 0xFFFF /* LHPF1_COEFF - [15:0] */
6276 #define ARIZONA_LHPF1_COEFF_SHIFT 0 /* LHPF1_COEFF - [15:0] */
6277 #define ARIZONA_LHPF1_COEFF_WIDTH 16 /* LHPF1_COEFF - [15:0] */
6278 
6279 /*
6280  * R3780 (0xEC4) - HPLPF2_1
6281  */
6282 #define ARIZONA_LHPF2_MODE 0x0002 /* LHPF2_MODE */
6283 #define ARIZONA_LHPF2_MODE_MASK 0x0002 /* LHPF2_MODE */
6284 #define ARIZONA_LHPF2_MODE_SHIFT 1 /* LHPF2_MODE */
6285 #define ARIZONA_LHPF2_MODE_WIDTH 1 /* LHPF2_MODE */
6286 #define ARIZONA_LHPF2_ENA 0x0001 /* LHPF2_ENA */
6287 #define ARIZONA_LHPF2_ENA_MASK 0x0001 /* LHPF2_ENA */
6288 #define ARIZONA_LHPF2_ENA_SHIFT 0 /* LHPF2_ENA */
6289 #define ARIZONA_LHPF2_ENA_WIDTH 1 /* LHPF2_ENA */
6290 
6291 /*
6292  * R3781 (0xEC5) - HPLPF2_2
6293  */
6294 #define ARIZONA_LHPF2_COEFF_MASK 0xFFFF /* LHPF2_COEFF - [15:0] */
6295 #define ARIZONA_LHPF2_COEFF_SHIFT 0 /* LHPF2_COEFF - [15:0] */
6296 #define ARIZONA_LHPF2_COEFF_WIDTH 16 /* LHPF2_COEFF - [15:0] */
6297 
6298 /*
6299  * R3784 (0xEC8) - HPLPF3_1
6300  */
6301 #define ARIZONA_LHPF3_MODE 0x0002 /* LHPF3_MODE */
6302 #define ARIZONA_LHPF3_MODE_MASK 0x0002 /* LHPF3_MODE */
6303 #define ARIZONA_LHPF3_MODE_SHIFT 1 /* LHPF3_MODE */
6304 #define ARIZONA_LHPF3_MODE_WIDTH 1 /* LHPF3_MODE */
6305 #define ARIZONA_LHPF3_ENA 0x0001 /* LHPF3_ENA */
6306 #define ARIZONA_LHPF3_ENA_MASK 0x0001 /* LHPF3_ENA */
6307 #define ARIZONA_LHPF3_ENA_SHIFT 0 /* LHPF3_ENA */
6308 #define ARIZONA_LHPF3_ENA_WIDTH 1 /* LHPF3_ENA */
6309 
6310 /*
6311  * R3785 (0xEC9) - HPLPF3_2
6312  */
6313 #define ARIZONA_LHPF3_COEFF_MASK 0xFFFF /* LHPF3_COEFF - [15:0] */
6314 #define ARIZONA_LHPF3_COEFF_SHIFT 0 /* LHPF3_COEFF - [15:0] */
6315 #define ARIZONA_LHPF3_COEFF_WIDTH 16 /* LHPF3_COEFF - [15:0] */
6316 
6317 /*
6318  * R3788 (0xECC) - HPLPF4_1
6319  */
6320 #define ARIZONA_LHPF4_MODE 0x0002 /* LHPF4_MODE */
6321 #define ARIZONA_LHPF4_MODE_MASK 0x0002 /* LHPF4_MODE */
6322 #define ARIZONA_LHPF4_MODE_SHIFT 1 /* LHPF4_MODE */
6323 #define ARIZONA_LHPF4_MODE_WIDTH 1 /* LHPF4_MODE */
6324 #define ARIZONA_LHPF4_ENA 0x0001 /* LHPF4_ENA */
6325 #define ARIZONA_LHPF4_ENA_MASK 0x0001 /* LHPF4_ENA */
6326 #define ARIZONA_LHPF4_ENA_SHIFT 0 /* LHPF4_ENA */
6327 #define ARIZONA_LHPF4_ENA_WIDTH 1 /* LHPF4_ENA */
6328 
6329 /*
6330  * R3789 (0xECD) - HPLPF4_2
6331  */
6332 #define ARIZONA_LHPF4_COEFF_MASK 0xFFFF /* LHPF4_COEFF - [15:0] */
6333 #define ARIZONA_LHPF4_COEFF_SHIFT 0 /* LHPF4_COEFF - [15:0] */
6334 #define ARIZONA_LHPF4_COEFF_WIDTH 16 /* LHPF4_COEFF - [15:0] */
6335 
6336 /*
6337  * R3808 (0xEE0) - ASRC_ENABLE
6338  */
6339 #define ARIZONA_ASRC2L_ENA 0x0008 /* ASRC2L_ENA */
6340 #define ARIZONA_ASRC2L_ENA_MASK 0x0008 /* ASRC2L_ENA */
6341 #define ARIZONA_ASRC2L_ENA_SHIFT 3 /* ASRC2L_ENA */
6342 #define ARIZONA_ASRC2L_ENA_WIDTH 1 /* ASRC2L_ENA */
6343 #define ARIZONA_ASRC2R_ENA 0x0004 /* ASRC2R_ENA */
6344 #define ARIZONA_ASRC2R_ENA_MASK 0x0004 /* ASRC2R_ENA */
6345 #define ARIZONA_ASRC2R_ENA_SHIFT 2 /* ASRC2R_ENA */
6346 #define ARIZONA_ASRC2R_ENA_WIDTH 1 /* ASRC2R_ENA */
6347 #define ARIZONA_ASRC1L_ENA 0x0002 /* ASRC1L_ENA */
6348 #define ARIZONA_ASRC1L_ENA_MASK 0x0002 /* ASRC1L_ENA */
6349 #define ARIZONA_ASRC1L_ENA_SHIFT 1 /* ASRC1L_ENA */
6350 #define ARIZONA_ASRC1L_ENA_WIDTH 1 /* ASRC1L_ENA */
6351 #define ARIZONA_ASRC1R_ENA 0x0001 /* ASRC1R_ENA */
6352 #define ARIZONA_ASRC1R_ENA_MASK 0x0001 /* ASRC1R_ENA */
6353 #define ARIZONA_ASRC1R_ENA_SHIFT 0 /* ASRC1R_ENA */
6354 #define ARIZONA_ASRC1R_ENA_WIDTH 1 /* ASRC1R_ENA */
6355 
6356 /*
6357  * R3810 (0xEE2) - ASRC_RATE1
6358  */
6359 #define ARIZONA_ASRC_RATE1_MASK 0x7800 /* ASRC_RATE1 - [14:11] */
6360 #define ARIZONA_ASRC_RATE1_SHIFT 11 /* ASRC_RATE1 - [14:11] */
6361 #define ARIZONA_ASRC_RATE1_WIDTH 4 /* ASRC_RATE1 - [14:11] */
6362 
6363 /*
6364  * R3811 (0xEE3) - ASRC_RATE2
6365  */
6366 #define ARIZONA_ASRC_RATE2_MASK 0x7800 /* ASRC_RATE2 - [14:11] */
6367 #define ARIZONA_ASRC_RATE2_SHIFT 11 /* ASRC_RATE2 - [14:11] */
6368 #define ARIZONA_ASRC_RATE2_WIDTH 4 /* ASRC_RATE2 - [14:11] */
6369 
6370 /*
6371  * R3824 (0xEF0) - ISRC 1 CTRL 1
6372  */
6373 #define ARIZONA_ISRC1_FSH_MASK 0x7800 /* ISRC1_FSH - [14:11] */
6374 #define ARIZONA_ISRC1_FSH_SHIFT 11 /* ISRC1_FSH - [14:11] */
6375 #define ARIZONA_ISRC1_FSH_WIDTH 4 /* ISRC1_FSH - [14:11] */
6376 #define ARIZONA_ISRC1_CLK_SEL_MASK 0x0700 /* ISRC1_CLK_SEL - [10:8] */
6377 #define ARIZONA_ISRC1_CLK_SEL_SHIFT 8 /* ISRC1_CLK_SEL - [10:8] */
6378 #define ARIZONA_ISRC1_CLK_SEL_WIDTH 3 /* ISRC1_CLK_SEL - [10:8] */
6379 
6380 /*
6381  * R3825 (0xEF1) - ISRC 1 CTRL 2
6382  */
6383 #define ARIZONA_ISRC1_FSL_MASK 0x7800 /* ISRC1_FSL - [14:11] */
6384 #define ARIZONA_ISRC1_FSL_SHIFT 11 /* ISRC1_FSL - [14:11] */
6385 #define ARIZONA_ISRC1_FSL_WIDTH 4 /* ISRC1_FSL - [14:11] */
6386 
6387 /*
6388  * R3826 (0xEF2) - ISRC 1 CTRL 3
6389  */
6390 #define ARIZONA_ISRC1_INT0_ENA 0x8000 /* ISRC1_INT0_ENA */
6391 #define ARIZONA_ISRC1_INT0_ENA_MASK 0x8000 /* ISRC1_INT0_ENA */
6392 #define ARIZONA_ISRC1_INT0_ENA_SHIFT 15 /* ISRC1_INT0_ENA */
6393 #define ARIZONA_ISRC1_INT0_ENA_WIDTH 1 /* ISRC1_INT0_ENA */
6394 #define ARIZONA_ISRC1_INT1_ENA 0x4000 /* ISRC1_INT1_ENA */
6395 #define ARIZONA_ISRC1_INT1_ENA_MASK 0x4000 /* ISRC1_INT1_ENA */
6396 #define ARIZONA_ISRC1_INT1_ENA_SHIFT 14 /* ISRC1_INT1_ENA */
6397 #define ARIZONA_ISRC1_INT1_ENA_WIDTH 1 /* ISRC1_INT1_ENA */
6398 #define ARIZONA_ISRC1_INT2_ENA 0x2000 /* ISRC1_INT2_ENA */
6399 #define ARIZONA_ISRC1_INT2_ENA_MASK 0x2000 /* ISRC1_INT2_ENA */
6400 #define ARIZONA_ISRC1_INT2_ENA_SHIFT 13 /* ISRC1_INT2_ENA */
6401 #define ARIZONA_ISRC1_INT2_ENA_WIDTH 1 /* ISRC1_INT2_ENA */
6402 #define ARIZONA_ISRC1_INT3_ENA 0x1000 /* ISRC1_INT3_ENA */
6403 #define ARIZONA_ISRC1_INT3_ENA_MASK 0x1000 /* ISRC1_INT3_ENA */
6404 #define ARIZONA_ISRC1_INT3_ENA_SHIFT 12 /* ISRC1_INT3_ENA */
6405 #define ARIZONA_ISRC1_INT3_ENA_WIDTH 1 /* ISRC1_INT3_ENA */
6406 #define ARIZONA_ISRC1_DEC0_ENA 0x0200 /* ISRC1_DEC0_ENA */
6407 #define ARIZONA_ISRC1_DEC0_ENA_MASK 0x0200 /* ISRC1_DEC0_ENA */
6408 #define ARIZONA_ISRC1_DEC0_ENA_SHIFT 9 /* ISRC1_DEC0_ENA */
6409 #define ARIZONA_ISRC1_DEC0_ENA_WIDTH 1 /* ISRC1_DEC0_ENA */
6410 #define ARIZONA_ISRC1_DEC1_ENA 0x0100 /* ISRC1_DEC1_ENA */
6411 #define ARIZONA_ISRC1_DEC1_ENA_MASK 0x0100 /* ISRC1_DEC1_ENA */
6412 #define ARIZONA_ISRC1_DEC1_ENA_SHIFT 8 /* ISRC1_DEC1_ENA */
6413 #define ARIZONA_ISRC1_DEC1_ENA_WIDTH 1 /* ISRC1_DEC1_ENA */
6414 #define ARIZONA_ISRC1_DEC2_ENA 0x0080 /* ISRC1_DEC2_ENA */
6415 #define ARIZONA_ISRC1_DEC2_ENA_MASK 0x0080 /* ISRC1_DEC2_ENA */
6416 #define ARIZONA_ISRC1_DEC2_ENA_SHIFT 7 /* ISRC1_DEC2_ENA */
6417 #define ARIZONA_ISRC1_DEC2_ENA_WIDTH 1 /* ISRC1_DEC2_ENA */
6418 #define ARIZONA_ISRC1_DEC3_ENA 0x0040 /* ISRC1_DEC3_ENA */
6419 #define ARIZONA_ISRC1_DEC3_ENA_MASK 0x0040 /* ISRC1_DEC3_ENA */
6420 #define ARIZONA_ISRC1_DEC3_ENA_SHIFT 6 /* ISRC1_DEC3_ENA */
6421 #define ARIZONA_ISRC1_DEC3_ENA_WIDTH 1 /* ISRC1_DEC3_ENA */
6422 #define ARIZONA_ISRC1_NOTCH_ENA 0x0001 /* ISRC1_NOTCH_ENA */
6423 #define ARIZONA_ISRC1_NOTCH_ENA_MASK 0x0001 /* ISRC1_NOTCH_ENA */
6424 #define ARIZONA_ISRC1_NOTCH_ENA_SHIFT 0 /* ISRC1_NOTCH_ENA */
6425 #define ARIZONA_ISRC1_NOTCH_ENA_WIDTH 1 /* ISRC1_NOTCH_ENA */
6426 
6427 /*
6428  * R3827 (0xEF3) - ISRC 2 CTRL 1
6429  */
6430 #define ARIZONA_ISRC2_FSH_MASK 0x7800 /* ISRC2_FSH - [14:11] */
6431 #define ARIZONA_ISRC2_FSH_SHIFT 11 /* ISRC2_FSH - [14:11] */
6432 #define ARIZONA_ISRC2_FSH_WIDTH 4 /* ISRC2_FSH - [14:11] */
6433 #define ARIZONA_ISRC2_CLK_SEL_MASK 0x0700 /* ISRC2_CLK_SEL - [10:8] */
6434 #define ARIZONA_ISRC2_CLK_SEL_SHIFT 8 /* ISRC2_CLK_SEL - [10:8] */
6435 #define ARIZONA_ISRC2_CLK_SEL_WIDTH 3 /* ISRC2_CLK_SEL - [10:8] */
6436 
6437 /*
6438  * R3828 (0xEF4) - ISRC 2 CTRL 2
6439  */
6440 #define ARIZONA_ISRC2_FSL_MASK 0x7800 /* ISRC2_FSL - [14:11] */
6441 #define ARIZONA_ISRC2_FSL_SHIFT 11 /* ISRC2_FSL - [14:11] */
6442 #define ARIZONA_ISRC2_FSL_WIDTH 4 /* ISRC2_FSL - [14:11] */
6443 
6444 /*
6445  * R3829 (0xEF5) - ISRC 2 CTRL 3
6446  */
6447 #define ARIZONA_ISRC2_INT0_ENA 0x8000 /* ISRC2_INT0_ENA */
6448 #define ARIZONA_ISRC2_INT0_ENA_MASK 0x8000 /* ISRC2_INT0_ENA */
6449 #define ARIZONA_ISRC2_INT0_ENA_SHIFT 15 /* ISRC2_INT0_ENA */
6450 #define ARIZONA_ISRC2_INT0_ENA_WIDTH 1 /* ISRC2_INT0_ENA */
6451 #define ARIZONA_ISRC2_INT1_ENA 0x4000 /* ISRC2_INT1_ENA */
6452 #define ARIZONA_ISRC2_INT1_ENA_MASK 0x4000 /* ISRC2_INT1_ENA */
6453 #define ARIZONA_ISRC2_INT1_ENA_SHIFT 14 /* ISRC2_INT1_ENA */
6454 #define ARIZONA_ISRC2_INT1_ENA_WIDTH 1 /* ISRC2_INT1_ENA */
6455 #define ARIZONA_ISRC2_INT2_ENA 0x2000 /* ISRC2_INT2_ENA */
6456 #define ARIZONA_ISRC2_INT2_ENA_MASK 0x2000 /* ISRC2_INT2_ENA */
6457 #define ARIZONA_ISRC2_INT2_ENA_SHIFT 13 /* ISRC2_INT2_ENA */
6458 #define ARIZONA_ISRC2_INT2_ENA_WIDTH 1 /* ISRC2_INT2_ENA */
6459 #define ARIZONA_ISRC2_INT3_ENA 0x1000 /* ISRC2_INT3_ENA */
6460 #define ARIZONA_ISRC2_INT3_ENA_MASK 0x1000 /* ISRC2_INT3_ENA */
6461 #define ARIZONA_ISRC2_INT3_ENA_SHIFT 12 /* ISRC2_INT3_ENA */
6462 #define ARIZONA_ISRC2_INT3_ENA_WIDTH 1 /* ISRC2_INT3_ENA */
6463 #define ARIZONA_ISRC2_DEC0_ENA 0x0200 /* ISRC2_DEC0_ENA */
6464 #define ARIZONA_ISRC2_DEC0_ENA_MASK 0x0200 /* ISRC2_DEC0_ENA */
6465 #define ARIZONA_ISRC2_DEC0_ENA_SHIFT 9 /* ISRC2_DEC0_ENA */
6466 #define ARIZONA_ISRC2_DEC0_ENA_WIDTH 1 /* ISRC2_DEC0_ENA */
6467 #define ARIZONA_ISRC2_DEC1_ENA 0x0100 /* ISRC2_DEC1_ENA */
6468 #define ARIZONA_ISRC2_DEC1_ENA_MASK 0x0100 /* ISRC2_DEC1_ENA */
6469 #define ARIZONA_ISRC2_DEC1_ENA_SHIFT 8 /* ISRC2_DEC1_ENA */
6470 #define ARIZONA_ISRC2_DEC1_ENA_WIDTH 1 /* ISRC2_DEC1_ENA */
6471 #define ARIZONA_ISRC2_DEC2_ENA 0x0080 /* ISRC2_DEC2_ENA */
6472 #define ARIZONA_ISRC2_DEC2_ENA_MASK 0x0080 /* ISRC2_DEC2_ENA */
6473 #define ARIZONA_ISRC2_DEC2_ENA_SHIFT 7 /* ISRC2_DEC2_ENA */
6474 #define ARIZONA_ISRC2_DEC2_ENA_WIDTH 1 /* ISRC2_DEC2_ENA */
6475 #define ARIZONA_ISRC2_DEC3_ENA 0x0040 /* ISRC2_DEC3_ENA */
6476 #define ARIZONA_ISRC2_DEC3_ENA_MASK 0x0040 /* ISRC2_DEC3_ENA */
6477 #define ARIZONA_ISRC2_DEC3_ENA_SHIFT 6 /* ISRC2_DEC3_ENA */
6478 #define ARIZONA_ISRC2_DEC3_ENA_WIDTH 1 /* ISRC2_DEC3_ENA */
6479 #define ARIZONA_ISRC2_NOTCH_ENA 0x0001 /* ISRC2_NOTCH_ENA */
6480 #define ARIZONA_ISRC2_NOTCH_ENA_MASK 0x0001 /* ISRC2_NOTCH_ENA */
6481 #define ARIZONA_ISRC2_NOTCH_ENA_SHIFT 0 /* ISRC2_NOTCH_ENA */
6482 #define ARIZONA_ISRC2_NOTCH_ENA_WIDTH 1 /* ISRC2_NOTCH_ENA */
6483 
6484 /*
6485  * R3830 (0xEF6) - ISRC 3 CTRL 1
6486  */
6487 #define ARIZONA_ISRC3_FSH_MASK 0x7800 /* ISRC3_FSH - [14:11] */
6488 #define ARIZONA_ISRC3_FSH_SHIFT 11 /* ISRC3_FSH - [14:11] */
6489 #define ARIZONA_ISRC3_FSH_WIDTH 4 /* ISRC3_FSH - [14:11] */
6490 #define ARIZONA_ISRC3_CLK_SEL_MASK 0x0700 /* ISRC3_CLK_SEL - [10:8] */
6491 #define ARIZONA_ISRC3_CLK_SEL_SHIFT 8 /* ISRC3_CLK_SEL - [10:8] */
6492 #define ARIZONA_ISRC3_CLK_SEL_WIDTH 3 /* ISRC3_CLK_SEL - [10:8] */
6493 
6494 /*
6495  * R3831 (0xEF7) - ISRC 3 CTRL 2
6496  */
6497 #define ARIZONA_ISRC3_FSL_MASK 0x7800 /* ISRC3_FSL - [14:11] */
6498 #define ARIZONA_ISRC3_FSL_SHIFT 11 /* ISRC3_FSL - [14:11] */
6499 #define ARIZONA_ISRC3_FSL_WIDTH 4 /* ISRC3_FSL - [14:11] */
6500 
6501 /*
6502  * R3832 (0xEF8) - ISRC 3 CTRL 3
6503  */
6504 #define ARIZONA_ISRC3_INT0_ENA 0x8000 /* ISRC3_INT0_ENA */
6505 #define ARIZONA_ISRC3_INT0_ENA_MASK 0x8000 /* ISRC3_INT0_ENA */
6506 #define ARIZONA_ISRC3_INT0_ENA_SHIFT 15 /* ISRC3_INT0_ENA */
6507 #define ARIZONA_ISRC3_INT0_ENA_WIDTH 1 /* ISRC3_INT0_ENA */
6508 #define ARIZONA_ISRC3_INT1_ENA 0x4000 /* ISRC3_INT1_ENA */
6509 #define ARIZONA_ISRC3_INT1_ENA_MASK 0x4000 /* ISRC3_INT1_ENA */
6510 #define ARIZONA_ISRC3_INT1_ENA_SHIFT 14 /* ISRC3_INT1_ENA */
6511 #define ARIZONA_ISRC3_INT1_ENA_WIDTH 1 /* ISRC3_INT1_ENA */
6512 #define ARIZONA_ISRC3_INT2_ENA 0x2000 /* ISRC3_INT2_ENA */
6513 #define ARIZONA_ISRC3_INT2_ENA_MASK 0x2000 /* ISRC3_INT2_ENA */
6514 #define ARIZONA_ISRC3_INT2_ENA_SHIFT 13 /* ISRC3_INT2_ENA */
6515 #define ARIZONA_ISRC3_INT2_ENA_WIDTH 1 /* ISRC3_INT2_ENA */
6516 #define ARIZONA_ISRC3_INT3_ENA 0x1000 /* ISRC3_INT3_ENA */
6517 #define ARIZONA_ISRC3_INT3_ENA_MASK 0x1000 /* ISRC3_INT3_ENA */
6518 #define ARIZONA_ISRC3_INT3_ENA_SHIFT 12 /* ISRC3_INT3_ENA */
6519 #define ARIZONA_ISRC3_INT3_ENA_WIDTH 1 /* ISRC3_INT3_ENA */
6520 #define ARIZONA_ISRC3_DEC0_ENA 0x0200 /* ISRC3_DEC0_ENA */
6521 #define ARIZONA_ISRC3_DEC0_ENA_MASK 0x0200 /* ISRC3_DEC0_ENA */
6522 #define ARIZONA_ISRC3_DEC0_ENA_SHIFT 9 /* ISRC3_DEC0_ENA */
6523 #define ARIZONA_ISRC3_DEC0_ENA_WIDTH 1 /* ISRC3_DEC0_ENA */
6524 #define ARIZONA_ISRC3_DEC1_ENA 0x0100 /* ISRC3_DEC1_ENA */
6525 #define ARIZONA_ISRC3_DEC1_ENA_MASK 0x0100 /* ISRC3_DEC1_ENA */
6526 #define ARIZONA_ISRC3_DEC1_ENA_SHIFT 8 /* ISRC3_DEC1_ENA */
6527 #define ARIZONA_ISRC3_DEC1_ENA_WIDTH 1 /* ISRC3_DEC1_ENA */
6528 #define ARIZONA_ISRC3_DEC2_ENA 0x0080 /* ISRC3_DEC2_ENA */
6529 #define ARIZONA_ISRC3_DEC2_ENA_MASK 0x0080 /* ISRC3_DEC2_ENA */
6530 #define ARIZONA_ISRC3_DEC2_ENA_SHIFT 7 /* ISRC3_DEC2_ENA */
6531 #define ARIZONA_ISRC3_DEC2_ENA_WIDTH 1 /* ISRC3_DEC2_ENA */
6532 #define ARIZONA_ISRC3_DEC3_ENA 0x0040 /* ISRC3_DEC3_ENA */
6533 #define ARIZONA_ISRC3_DEC3_ENA_MASK 0x0040 /* ISRC3_DEC3_ENA */
6534 #define ARIZONA_ISRC3_DEC3_ENA_SHIFT 6 /* ISRC3_DEC3_ENA */
6535 #define ARIZONA_ISRC3_DEC3_ENA_WIDTH 1 /* ISRC3_DEC3_ENA */
6536 #define ARIZONA_ISRC3_NOTCH_ENA 0x0001 /* ISRC3_NOTCH_ENA */
6537 #define ARIZONA_ISRC3_NOTCH_ENA_MASK 0x0001 /* ISRC3_NOTCH_ENA */
6538 #define ARIZONA_ISRC3_NOTCH_ENA_SHIFT 0 /* ISRC3_NOTCH_ENA */
6539 #define ARIZONA_ISRC3_NOTCH_ENA_WIDTH 1 /* ISRC3_NOTCH_ENA */
6540 
6541 /*
6542  * R4352 (0x1100) - DSP1 Control 1
6543  */
6544 #define ARIZONA_DSP1_RATE_MASK 0x7800 /* DSP1_RATE - [14:11] */
6545 #define ARIZONA_DSP1_RATE_SHIFT 11 /* DSP1_RATE - [14:11] */
6546 #define ARIZONA_DSP1_RATE_WIDTH 4 /* DSP1_RATE - [14:11] */
6547 #define ARIZONA_DSP1_MEM_ENA 0x0010 /* DSP1_MEM_ENA */
6548 #define ARIZONA_DSP1_MEM_ENA_MASK 0x0010 /* DSP1_MEM_ENA */
6549 #define ARIZONA_DSP1_MEM_ENA_SHIFT 4 /* DSP1_MEM_ENA */
6550 #define ARIZONA_DSP1_MEM_ENA_WIDTH 1 /* DSP1_MEM_ENA */
6551 #define ARIZONA_DSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
6552 #define ARIZONA_DSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
6553 #define ARIZONA_DSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
6554 #define ARIZONA_DSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
6555 #define ARIZONA_DSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
6556 #define ARIZONA_DSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
6557 #define ARIZONA_DSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
6558 #define ARIZONA_DSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
6559 #define ARIZONA_DSP1_START 0x0001 /* DSP1_START */
6560 #define ARIZONA_DSP1_START_MASK 0x0001 /* DSP1_START */
6561 #define ARIZONA_DSP1_START_SHIFT 0 /* DSP1_START */
6562 #define ARIZONA_DSP1_START_WIDTH 1 /* DSP1_START */
6563 
6564 /*
6565  * R4353 (0x1101) - DSP1 Clocking 1
6566  */
6567 #define ARIZONA_DSP1_CLK_SEL_MASK 0x0007 /* DSP1_CLK_SEL - [2:0] */
6568 #define ARIZONA_DSP1_CLK_SEL_SHIFT 0 /* DSP1_CLK_SEL - [2:0] */
6569 #define ARIZONA_DSP1_CLK_SEL_WIDTH 3 /* DSP1_CLK_SEL - [2:0] */
6570 
6571 /*
6572  * R4356 (0x1104) - DSP1 Status 1
6573  */
6574 #define ARIZONA_DSP1_RAM_RDY 0x0001 /* DSP1_RAM_RDY */
6575 #define ARIZONA_DSP1_RAM_RDY_MASK 0x0001 /* DSP1_RAM_RDY */
6576 #define ARIZONA_DSP1_RAM_RDY_SHIFT 0 /* DSP1_RAM_RDY */
6577 #define ARIZONA_DSP1_RAM_RDY_WIDTH 1 /* DSP1_RAM_RDY */
6578 
6579 /*
6580  * R4357 (0x1105) - DSP1 Status 2
6581  */
6582 #define ARIZONA_DSP1_PING_FULL 0x8000 /* DSP1_PING_FULL */
6583 #define ARIZONA_DSP1_PING_FULL_MASK 0x8000 /* DSP1_PING_FULL */
6584 #define ARIZONA_DSP1_PING_FULL_SHIFT 15 /* DSP1_PING_FULL */
6585 #define ARIZONA_DSP1_PING_FULL_WIDTH 1 /* DSP1_PING_FULL */
6586 #define ARIZONA_DSP1_PONG_FULL 0x4000 /* DSP1_PONG_FULL */
6587 #define ARIZONA_DSP1_PONG_FULL_MASK 0x4000 /* DSP1_PONG_FULL */
6588 #define ARIZONA_DSP1_PONG_FULL_SHIFT 14 /* DSP1_PONG_FULL */
6589 #define ARIZONA_DSP1_PONG_FULL_WIDTH 1 /* DSP1_PONG_FULL */
6590 #define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_MASK 0x00FF /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */
6591 #define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_SHIFT 0 /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */
6592 #define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_WIDTH 8 /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */
6593 
6594 #endif