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Macros
registers.h File Reference

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Macros

#define ARIZONA_SOFTWARE_RESET   0x00
 
#define ARIZONA_DEVICE_REVISION   0x01
 
#define ARIZONA_CTRL_IF_SPI_CFG_1   0x08
 
#define ARIZONA_CTRL_IF_I2C1_CFG_1   0x09
 
#define ARIZONA_CTRL_IF_I2C2_CFG_1   0x0A
 
#define ARIZONA_CTRL_IF_I2C1_CFG_2   0x0B
 
#define ARIZONA_CTRL_IF_I2C2_CFG_2   0x0C
 
#define ARIZONA_CTRL_IF_STATUS_1   0x0D
 
#define ARIZONA_WRITE_SEQUENCER_CTRL_0   0x16
 
#define ARIZONA_WRITE_SEQUENCER_CTRL_1   0x17
 
#define ARIZONA_WRITE_SEQUENCER_CTRL_2   0x18
 
#define ARIZONA_WRITE_SEQUENCER_PROM   0x1A
 
#define ARIZONA_TONE_GENERATOR_1   0x20
 
#define ARIZONA_TONE_GENERATOR_2   0x21
 
#define ARIZONA_TONE_GENERATOR_3   0x22
 
#define ARIZONA_TONE_GENERATOR_4   0x23
 
#define ARIZONA_TONE_GENERATOR_5   0x24
 
#define ARIZONA_PWM_DRIVE_1   0x30
 
#define ARIZONA_PWM_DRIVE_2   0x31
 
#define ARIZONA_PWM_DRIVE_3   0x32
 
#define ARIZONA_WAKE_CONTROL   0x40
 
#define ARIZONA_SEQUENCE_CONTROL   0x41
 
#define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1   0x61
 
#define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2   0x62
 
#define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3   0x63
 
#define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4   0x64
 
#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1   0x68
 
#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2   0x69
 
#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3   0x6A
 
#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4   0x6B
 
#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5   0x6C
 
#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6   0x6D
 
#define ARIZONA_COMFORT_NOISE_GENERATOR   0x70
 
#define ARIZONA_HAPTICS_CONTROL_1   0x90
 
#define ARIZONA_HAPTICS_CONTROL_2   0x91
 
#define ARIZONA_HAPTICS_PHASE_1_INTENSITY   0x92
 
#define ARIZONA_HAPTICS_PHASE_1_DURATION   0x93
 
#define ARIZONA_HAPTICS_PHASE_2_INTENSITY   0x94
 
#define ARIZONA_HAPTICS_PHASE_2_DURATION   0x95
 
#define ARIZONA_HAPTICS_PHASE_3_INTENSITY   0x96
 
#define ARIZONA_HAPTICS_PHASE_3_DURATION   0x97
 
#define ARIZONA_HAPTICS_STATUS   0x98
 
#define ARIZONA_CLOCK_32K_1   0x100
 
#define ARIZONA_SYSTEM_CLOCK_1   0x101
 
#define ARIZONA_SAMPLE_RATE_1   0x102
 
#define ARIZONA_SAMPLE_RATE_2   0x103
 
#define ARIZONA_SAMPLE_RATE_3   0x104
 
#define ARIZONA_SAMPLE_RATE_1_STATUS   0x10A
 
#define ARIZONA_SAMPLE_RATE_2_STATUS   0x10B
 
#define ARIZONA_SAMPLE_RATE_3_STATUS   0x10C
 
#define ARIZONA_ASYNC_CLOCK_1   0x112
 
#define ARIZONA_ASYNC_SAMPLE_RATE_1   0x113
 
#define ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS   0x11B
 
#define ARIZONA_OUTPUT_SYSTEM_CLOCK   0x149
 
#define ARIZONA_OUTPUT_ASYNC_CLOCK   0x14A
 
#define ARIZONA_RATE_ESTIMATOR_1   0x152
 
#define ARIZONA_RATE_ESTIMATOR_2   0x153
 
#define ARIZONA_RATE_ESTIMATOR_3   0x154
 
#define ARIZONA_RATE_ESTIMATOR_4   0x155
 
#define ARIZONA_RATE_ESTIMATOR_5   0x156
 
#define ARIZONA_FLL1_CONTROL_1   0x171
 
#define ARIZONA_FLL1_CONTROL_2   0x172
 
#define ARIZONA_FLL1_CONTROL_3   0x173
 
#define ARIZONA_FLL1_CONTROL_4   0x174
 
#define ARIZONA_FLL1_CONTROL_5   0x175
 
#define ARIZONA_FLL1_CONTROL_6   0x176
 
#define ARIZONA_FLL1_LOOP_FILTER_TEST_1   0x177
 
#define ARIZONA_FLL1_NCO_TEST_0   0x178
 
#define ARIZONA_FLL1_SYNCHRONISER_1   0x181
 
#define ARIZONA_FLL1_SYNCHRONISER_2   0x182
 
#define ARIZONA_FLL1_SYNCHRONISER_3   0x183
 
#define ARIZONA_FLL1_SYNCHRONISER_4   0x184
 
#define ARIZONA_FLL1_SYNCHRONISER_5   0x185
 
#define ARIZONA_FLL1_SYNCHRONISER_6   0x186
 
#define ARIZONA_FLL1_SPREAD_SPECTRUM   0x189
 
#define ARIZONA_FLL1_GPIO_CLOCK   0x18A
 
#define ARIZONA_FLL2_CONTROL_1   0x191
 
#define ARIZONA_FLL2_CONTROL_2   0x192
 
#define ARIZONA_FLL2_CONTROL_3   0x193
 
#define ARIZONA_FLL2_CONTROL_4   0x194
 
#define ARIZONA_FLL2_CONTROL_5   0x195
 
#define ARIZONA_FLL2_CONTROL_6   0x196
 
#define ARIZONA_FLL2_LOOP_FILTER_TEST_1   0x197
 
#define ARIZONA_FLL2_NCO_TEST_0   0x198
 
#define ARIZONA_FLL2_SYNCHRONISER_1   0x1A1
 
#define ARIZONA_FLL2_SYNCHRONISER_2   0x1A2
 
#define ARIZONA_FLL2_SYNCHRONISER_3   0x1A3
 
#define ARIZONA_FLL2_SYNCHRONISER_4   0x1A4
 
#define ARIZONA_FLL2_SYNCHRONISER_5   0x1A5
 
#define ARIZONA_FLL2_SYNCHRONISER_6   0x1A6
 
#define ARIZONA_FLL2_SPREAD_SPECTRUM   0x1A9
 
#define ARIZONA_FLL2_GPIO_CLOCK   0x1AA
 
#define ARIZONA_MIC_CHARGE_PUMP_1   0x200
 
#define ARIZONA_LDO1_CONTROL_1   0x210
 
#define ARIZONA_LDO2_CONTROL_1   0x213
 
#define ARIZONA_MIC_BIAS_CTRL_1   0x218
 
#define ARIZONA_MIC_BIAS_CTRL_2   0x219
 
#define ARIZONA_MIC_BIAS_CTRL_3   0x21A
 
#define ARIZONA_ACCESSORY_DETECT_MODE_1   0x293
 
#define ARIZONA_HEADPHONE_DETECT_1   0x29B
 
#define ARIZONA_HEADPHONE_DETECT_2   0x29C
 
#define ARIZONA_MIC_DETECT_1   0x2A3
 
#define ARIZONA_MIC_DETECT_2   0x2A4
 
#define ARIZONA_MIC_DETECT_3   0x2A5
 
#define ARIZONA_MIC_NOISE_MIX_CONTROL_1   0x2C3
 
#define ARIZONA_ISOLATION_CONTROL   0x2CB
 
#define ARIZONA_JACK_DETECT_ANALOGUE   0x2D3
 
#define ARIZONA_INPUT_ENABLES   0x300
 
#define ARIZONA_INPUT_ENABLES_STATUS   0x301
 
#define ARIZONA_INPUT_RATE   0x308
 
#define ARIZONA_INPUT_VOLUME_RAMP   0x309
 
#define ARIZONA_IN1L_CONTROL   0x310
 
#define ARIZONA_ADC_DIGITAL_VOLUME_1L   0x311
 
#define ARIZONA_DMIC1L_CONTROL   0x312
 
#define ARIZONA_IN1R_CONTROL   0x314
 
#define ARIZONA_ADC_DIGITAL_VOLUME_1R   0x315
 
#define ARIZONA_DMIC1R_CONTROL   0x316
 
#define ARIZONA_IN2L_CONTROL   0x318
 
#define ARIZONA_ADC_DIGITAL_VOLUME_2L   0x319
 
#define ARIZONA_DMIC2L_CONTROL   0x31A
 
#define ARIZONA_IN2R_CONTROL   0x31C
 
#define ARIZONA_ADC_DIGITAL_VOLUME_2R   0x31D
 
#define ARIZONA_DMIC2R_CONTROL   0x31E
 
#define ARIZONA_IN3L_CONTROL   0x320
 
#define ARIZONA_ADC_DIGITAL_VOLUME_3L   0x321
 
#define ARIZONA_DMIC3L_CONTROL   0x322
 
#define ARIZONA_IN3R_CONTROL   0x324
 
#define ARIZONA_ADC_DIGITAL_VOLUME_3R   0x325
 
#define ARIZONA_DMIC3R_CONTROL   0x326
 
#define ARIZONA_IN4L_CONTROL   0x328
 
#define ARIZONA_ADC_DIGITAL_VOLUME_4L   0x329
 
#define ARIZONA_DMIC4L_CONTROL   0x32A
 
#define ARIZONA_ADC_DIGITAL_VOLUME_4R   0x32D
 
#define ARIZONA_DMIC4R_CONTROL   0x32E
 
#define ARIZONA_OUTPUT_ENABLES_1   0x400
 
#define ARIZONA_OUTPUT_STATUS_1   0x401
 
#define ARIZONA_RAW_OUTPUT_STATUS_1   0x406
 
#define ARIZONA_OUTPUT_RATE_1   0x408
 
#define ARIZONA_OUTPUT_VOLUME_RAMP   0x409
 
#define ARIZONA_OUTPUT_PATH_CONFIG_1L   0x410
 
#define ARIZONA_DAC_DIGITAL_VOLUME_1L   0x411
 
#define ARIZONA_DAC_VOLUME_LIMIT_1L   0x412
 
#define ARIZONA_NOISE_GATE_SELECT_1L   0x413
 
#define ARIZONA_OUTPUT_PATH_CONFIG_1R   0x414
 
#define ARIZONA_DAC_DIGITAL_VOLUME_1R   0x415
 
#define ARIZONA_DAC_VOLUME_LIMIT_1R   0x416
 
#define ARIZONA_NOISE_GATE_SELECT_1R   0x417
 
#define ARIZONA_OUTPUT_PATH_CONFIG_2L   0x418
 
#define ARIZONA_DAC_DIGITAL_VOLUME_2L   0x419
 
#define ARIZONA_DAC_VOLUME_LIMIT_2L   0x41A
 
#define ARIZONA_NOISE_GATE_SELECT_2L   0x41B
 
#define ARIZONA_OUTPUT_PATH_CONFIG_2R   0x41C
 
#define ARIZONA_DAC_DIGITAL_VOLUME_2R   0x41D
 
#define ARIZONA_DAC_VOLUME_LIMIT_2R   0x41E
 
#define ARIZONA_NOISE_GATE_SELECT_2R   0x41F
 
#define ARIZONA_OUTPUT_PATH_CONFIG_3L   0x420
 
#define ARIZONA_DAC_DIGITAL_VOLUME_3L   0x421
 
#define ARIZONA_DAC_VOLUME_LIMIT_3L   0x422
 
#define ARIZONA_NOISE_GATE_SELECT_3L   0x423
 
#define ARIZONA_OUTPUT_PATH_CONFIG_3R   0x424
 
#define ARIZONA_DAC_DIGITAL_VOLUME_3R   0x425
 
#define ARIZONA_DAC_VOLUME_LIMIT_3R   0x426
 
#define ARIZONA_NOISE_GATE_SELECT_3R   0x427
 
#define ARIZONA_OUTPUT_PATH_CONFIG_4L   0x428
 
#define ARIZONA_DAC_DIGITAL_VOLUME_4L   0x429
 
#define ARIZONA_OUT_VOLUME_4L   0x42A
 
#define ARIZONA_NOISE_GATE_SELECT_4L   0x42B
 
#define ARIZONA_OUTPUT_PATH_CONFIG_4R   0x42C
 
#define ARIZONA_DAC_DIGITAL_VOLUME_4R   0x42D
 
#define ARIZONA_OUT_VOLUME_4R   0x42E
 
#define ARIZONA_NOISE_GATE_SELECT_4R   0x42F
 
#define ARIZONA_OUTPUT_PATH_CONFIG_5L   0x430
 
#define ARIZONA_DAC_DIGITAL_VOLUME_5L   0x431
 
#define ARIZONA_DAC_VOLUME_LIMIT_5L   0x432
 
#define ARIZONA_NOISE_GATE_SELECT_5L   0x433
 
#define ARIZONA_OUTPUT_PATH_CONFIG_5R   0x434
 
#define ARIZONA_DAC_DIGITAL_VOLUME_5R   0x435
 
#define ARIZONA_DAC_VOLUME_LIMIT_5R   0x436
 
#define ARIZONA_NOISE_GATE_SELECT_5R   0x437
 
#define ARIZONA_OUTPUT_PATH_CONFIG_6L   0x438
 
#define ARIZONA_DAC_DIGITAL_VOLUME_6L   0x439
 
#define ARIZONA_DAC_VOLUME_LIMIT_6L   0x43A
 
#define ARIZONA_NOISE_GATE_SELECT_6L   0x43B
 
#define ARIZONA_OUTPUT_PATH_CONFIG_6R   0x43C
 
#define ARIZONA_DAC_DIGITAL_VOLUME_6R   0x43D
 
#define ARIZONA_DAC_VOLUME_LIMIT_6R   0x43E
 
#define ARIZONA_NOISE_GATE_SELECT_6R   0x43F
 
#define ARIZONA_DAC_AEC_CONTROL_1   0x450
 
#define ARIZONA_NOISE_GATE_CONTROL   0x458
 
#define ARIZONA_PDM_SPK1_CTRL_1   0x490
 
#define ARIZONA_PDM_SPK1_CTRL_2   0x491
 
#define ARIZONA_PDM_SPK2_CTRL_1   0x492
 
#define ARIZONA_PDM_SPK2_CTRL_2   0x493
 
#define ARIZONA_DAC_COMP_1   0x4DC
 
#define ARIZONA_DAC_COMP_2   0x4DD
 
#define ARIZONA_DAC_COMP_3   0x4DE
 
#define ARIZONA_DAC_COMP_4   0x4DF
 
#define ARIZONA_AIF1_BCLK_CTRL   0x500
 
#define ARIZONA_AIF1_TX_PIN_CTRL   0x501
 
#define ARIZONA_AIF1_RX_PIN_CTRL   0x502
 
#define ARIZONA_AIF1_RATE_CTRL   0x503
 
#define ARIZONA_AIF1_FORMAT   0x504
 
#define ARIZONA_AIF1_TX_BCLK_RATE   0x505
 
#define ARIZONA_AIF1_RX_BCLK_RATE   0x506
 
#define ARIZONA_AIF1_FRAME_CTRL_1   0x507
 
#define ARIZONA_AIF1_FRAME_CTRL_2   0x508
 
#define ARIZONA_AIF1_FRAME_CTRL_3   0x509
 
#define ARIZONA_AIF1_FRAME_CTRL_4   0x50A
 
#define ARIZONA_AIF1_FRAME_CTRL_5   0x50B
 
#define ARIZONA_AIF1_FRAME_CTRL_6   0x50C
 
#define ARIZONA_AIF1_FRAME_CTRL_7   0x50D
 
#define ARIZONA_AIF1_FRAME_CTRL_8   0x50E
 
#define ARIZONA_AIF1_FRAME_CTRL_9   0x50F
 
#define ARIZONA_AIF1_FRAME_CTRL_10   0x510
 
#define ARIZONA_AIF1_FRAME_CTRL_11   0x511
 
#define ARIZONA_AIF1_FRAME_CTRL_12   0x512
 
#define ARIZONA_AIF1_FRAME_CTRL_13   0x513
 
#define ARIZONA_AIF1_FRAME_CTRL_14   0x514
 
#define ARIZONA_AIF1_FRAME_CTRL_15   0x515
 
#define ARIZONA_AIF1_FRAME_CTRL_16   0x516
 
#define ARIZONA_AIF1_FRAME_CTRL_17   0x517
 
#define ARIZONA_AIF1_FRAME_CTRL_18   0x518
 
#define ARIZONA_AIF1_TX_ENABLES   0x519
 
#define ARIZONA_AIF1_RX_ENABLES   0x51A
 
#define ARIZONA_AIF1_FORCE_WRITE   0x51B
 
#define ARIZONA_AIF2_BCLK_CTRL   0x540
 
#define ARIZONA_AIF2_TX_PIN_CTRL   0x541
 
#define ARIZONA_AIF2_RX_PIN_CTRL   0x542
 
#define ARIZONA_AIF2_RATE_CTRL   0x543
 
#define ARIZONA_AIF2_FORMAT   0x544
 
#define ARIZONA_AIF2_TX_BCLK_RATE   0x545
 
#define ARIZONA_AIF2_RX_BCLK_RATE   0x546
 
#define ARIZONA_AIF2_FRAME_CTRL_1   0x547
 
#define ARIZONA_AIF2_FRAME_CTRL_2   0x548
 
#define ARIZONA_AIF2_FRAME_CTRL_3   0x549
 
#define ARIZONA_AIF2_FRAME_CTRL_4   0x54A
 
#define ARIZONA_AIF2_FRAME_CTRL_11   0x551
 
#define ARIZONA_AIF2_FRAME_CTRL_12   0x552
 
#define ARIZONA_AIF2_TX_ENABLES   0x559
 
#define ARIZONA_AIF2_RX_ENABLES   0x55A
 
#define ARIZONA_AIF2_FORCE_WRITE   0x55B
 
#define ARIZONA_AIF3_BCLK_CTRL   0x580
 
#define ARIZONA_AIF3_TX_PIN_CTRL   0x581
 
#define ARIZONA_AIF3_RX_PIN_CTRL   0x582
 
#define ARIZONA_AIF3_RATE_CTRL   0x583
 
#define ARIZONA_AIF3_FORMAT   0x584
 
#define ARIZONA_AIF3_TX_BCLK_RATE   0x585
 
#define ARIZONA_AIF3_RX_BCLK_RATE   0x586
 
#define ARIZONA_AIF3_FRAME_CTRL_1   0x587
 
#define ARIZONA_AIF3_FRAME_CTRL_2   0x588
 
#define ARIZONA_AIF3_FRAME_CTRL_3   0x589
 
#define ARIZONA_AIF3_FRAME_CTRL_4   0x58A
 
#define ARIZONA_AIF3_FRAME_CTRL_11   0x591
 
#define ARIZONA_AIF3_FRAME_CTRL_12   0x592
 
#define ARIZONA_AIF3_TX_ENABLES   0x599
 
#define ARIZONA_AIF3_RX_ENABLES   0x59A
 
#define ARIZONA_AIF3_FORCE_WRITE   0x59B
 
#define ARIZONA_SLIMBUS_FRAMER_REF_GEAR   0x5E3
 
#define ARIZONA_SLIMBUS_RATES_1   0x5E5
 
#define ARIZONA_SLIMBUS_RATES_2   0x5E6
 
#define ARIZONA_SLIMBUS_RATES_3   0x5E7
 
#define ARIZONA_SLIMBUS_RATES_4   0x5E8
 
#define ARIZONA_SLIMBUS_RATES_5   0x5E9
 
#define ARIZONA_SLIMBUS_RATES_6   0x5EA
 
#define ARIZONA_SLIMBUS_RATES_7   0x5EB
 
#define ARIZONA_SLIMBUS_RATES_8   0x5EC
 
#define ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE   0x5F5
 
#define ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE   0x5F6
 
#define ARIZONA_SLIMBUS_RX_PORT_STATUS   0x5F7
 
#define ARIZONA_SLIMBUS_TX_PORT_STATUS   0x5F8
 
#define ARIZONA_PWM1MIX_INPUT_1_SOURCE   0x640
 
#define ARIZONA_PWM1MIX_INPUT_1_VOLUME   0x641
 
#define ARIZONA_PWM1MIX_INPUT_2_SOURCE   0x642
 
#define ARIZONA_PWM1MIX_INPUT_2_VOLUME   0x643
 
#define ARIZONA_PWM1MIX_INPUT_3_SOURCE   0x644
 
#define ARIZONA_PWM1MIX_INPUT_3_VOLUME   0x645
 
#define ARIZONA_PWM1MIX_INPUT_4_SOURCE   0x646
 
#define ARIZONA_PWM1MIX_INPUT_4_VOLUME   0x647
 
#define ARIZONA_PWM2MIX_INPUT_1_SOURCE   0x648
 
#define ARIZONA_PWM2MIX_INPUT_1_VOLUME   0x649
 
#define ARIZONA_PWM2MIX_INPUT_2_SOURCE   0x64A
 
#define ARIZONA_PWM2MIX_INPUT_2_VOLUME   0x64B
 
#define ARIZONA_PWM2MIX_INPUT_3_SOURCE   0x64C
 
#define ARIZONA_PWM2MIX_INPUT_3_VOLUME   0x64D
 
#define ARIZONA_PWM2MIX_INPUT_4_SOURCE   0x64E
 
#define ARIZONA_PWM2MIX_INPUT_4_VOLUME   0x64F
 
#define ARIZONA_MICMIX_INPUT_1_SOURCE   0x660
 
#define ARIZONA_MICMIX_INPUT_1_VOLUME   0x661
 
#define ARIZONA_MICMIX_INPUT_2_SOURCE   0x662
 
#define ARIZONA_MICMIX_INPUT_2_VOLUME   0x663
 
#define ARIZONA_MICMIX_INPUT_3_SOURCE   0x664
 
#define ARIZONA_MICMIX_INPUT_3_VOLUME   0x665
 
#define ARIZONA_MICMIX_INPUT_4_SOURCE   0x666
 
#define ARIZONA_MICMIX_INPUT_4_VOLUME   0x667
 
#define ARIZONA_NOISEMIX_INPUT_1_SOURCE   0x668
 
#define ARIZONA_NOISEMIX_INPUT_1_VOLUME   0x669
 
#define ARIZONA_NOISEMIX_INPUT_2_SOURCE   0x66A
 
#define ARIZONA_NOISEMIX_INPUT_2_VOLUME   0x66B
 
#define ARIZONA_NOISEMIX_INPUT_3_SOURCE   0x66C
 
#define ARIZONA_NOISEMIX_INPUT_3_VOLUME   0x66D
 
#define ARIZONA_NOISEMIX_INPUT_4_SOURCE   0x66E
 
#define ARIZONA_NOISEMIX_INPUT_4_VOLUME   0x66F
 
#define ARIZONA_OUT1LMIX_INPUT_1_SOURCE   0x680
 
#define ARIZONA_OUT1LMIX_INPUT_1_VOLUME   0x681
 
#define ARIZONA_OUT1LMIX_INPUT_2_SOURCE   0x682
 
#define ARIZONA_OUT1LMIX_INPUT_2_VOLUME   0x683
 
#define ARIZONA_OUT1LMIX_INPUT_3_SOURCE   0x684
 
#define ARIZONA_OUT1LMIX_INPUT_3_VOLUME   0x685
 
#define ARIZONA_OUT1LMIX_INPUT_4_SOURCE   0x686
 
#define ARIZONA_OUT1LMIX_INPUT_4_VOLUME   0x687
 
#define ARIZONA_OUT1RMIX_INPUT_1_SOURCE   0x688
 
#define ARIZONA_OUT1RMIX_INPUT_1_VOLUME   0x689
 
#define ARIZONA_OUT1RMIX_INPUT_2_SOURCE   0x68A
 
#define ARIZONA_OUT1RMIX_INPUT_2_VOLUME   0x68B
 
#define ARIZONA_OUT1RMIX_INPUT_3_SOURCE   0x68C
 
#define ARIZONA_OUT1RMIX_INPUT_3_VOLUME   0x68D
 
#define ARIZONA_OUT1RMIX_INPUT_4_SOURCE   0x68E
 
#define ARIZONA_OUT1RMIX_INPUT_4_VOLUME   0x68F
 
#define ARIZONA_OUT2LMIX_INPUT_1_SOURCE   0x690
 
#define ARIZONA_OUT2LMIX_INPUT_1_VOLUME   0x691
 
#define ARIZONA_OUT2LMIX_INPUT_2_SOURCE   0x692
 
#define ARIZONA_OUT2LMIX_INPUT_2_VOLUME   0x693
 
#define ARIZONA_OUT2LMIX_INPUT_3_SOURCE   0x694
 
#define ARIZONA_OUT2LMIX_INPUT_3_VOLUME   0x695
 
#define ARIZONA_OUT2LMIX_INPUT_4_SOURCE   0x696
 
#define ARIZONA_OUT2LMIX_INPUT_4_VOLUME   0x697
 
#define ARIZONA_OUT2RMIX_INPUT_1_SOURCE   0x698
 
#define ARIZONA_OUT2RMIX_INPUT_1_VOLUME   0x699
 
#define ARIZONA_OUT2RMIX_INPUT_2_SOURCE   0x69A
 
#define ARIZONA_OUT2RMIX_INPUT_2_VOLUME   0x69B
 
#define ARIZONA_OUT2RMIX_INPUT_3_SOURCE   0x69C
 
#define ARIZONA_OUT2RMIX_INPUT_3_VOLUME   0x69D
 
#define ARIZONA_OUT2RMIX_INPUT_4_SOURCE   0x69E
 
#define ARIZONA_OUT2RMIX_INPUT_4_VOLUME   0x69F
 
#define ARIZONA_OUT3LMIX_INPUT_1_SOURCE   0x6A0
 
#define ARIZONA_OUT3LMIX_INPUT_1_VOLUME   0x6A1
 
#define ARIZONA_OUT3LMIX_INPUT_2_SOURCE   0x6A2
 
#define ARIZONA_OUT3LMIX_INPUT_2_VOLUME   0x6A3
 
#define ARIZONA_OUT3LMIX_INPUT_3_SOURCE   0x6A4
 
#define ARIZONA_OUT3LMIX_INPUT_3_VOLUME   0x6A5
 
#define ARIZONA_OUT3LMIX_INPUT_4_SOURCE   0x6A6
 
#define ARIZONA_OUT3LMIX_INPUT_4_VOLUME   0x6A7
 
#define ARIZONA_OUT3RMIX_INPUT_1_SOURCE   0x6A8
 
#define ARIZONA_OUT3RMIX_INPUT_1_VOLUME   0x6A9
 
#define ARIZONA_OUT3RMIX_INPUT_2_SOURCE   0x6AA
 
#define ARIZONA_OUT3RMIX_INPUT_2_VOLUME   0x6AB
 
#define ARIZONA_OUT3RMIX_INPUT_3_SOURCE   0x6AC
 
#define ARIZONA_OUT3RMIX_INPUT_3_VOLUME   0x6AD
 
#define ARIZONA_OUT3RMIX_INPUT_4_SOURCE   0x6AE
 
#define ARIZONA_OUT3RMIX_INPUT_4_VOLUME   0x6AF
 
#define ARIZONA_OUT4LMIX_INPUT_1_SOURCE   0x6B0
 
#define ARIZONA_OUT4LMIX_INPUT_1_VOLUME   0x6B1
 
#define ARIZONA_OUT4LMIX_INPUT_2_SOURCE   0x6B2
 
#define ARIZONA_OUT4LMIX_INPUT_2_VOLUME   0x6B3
 
#define ARIZONA_OUT4LMIX_INPUT_3_SOURCE   0x6B4
 
#define ARIZONA_OUT4LMIX_INPUT_3_VOLUME   0x6B5
 
#define ARIZONA_OUT4LMIX_INPUT_4_SOURCE   0x6B6
 
#define ARIZONA_OUT4LMIX_INPUT_4_VOLUME   0x6B7
 
#define ARIZONA_OUT4RMIX_INPUT_1_SOURCE   0x6B8
 
#define ARIZONA_OUT4RMIX_INPUT_1_VOLUME   0x6B9
 
#define ARIZONA_OUT4RMIX_INPUT_2_SOURCE   0x6BA
 
#define ARIZONA_OUT4RMIX_INPUT_2_VOLUME   0x6BB
 
#define ARIZONA_OUT4RMIX_INPUT_3_SOURCE   0x6BC
 
#define ARIZONA_OUT4RMIX_INPUT_3_VOLUME   0x6BD
 
#define ARIZONA_OUT4RMIX_INPUT_4_SOURCE   0x6BE
 
#define ARIZONA_OUT4RMIX_INPUT_4_VOLUME   0x6BF
 
#define ARIZONA_OUT5LMIX_INPUT_1_SOURCE   0x6C0
 
#define ARIZONA_OUT5LMIX_INPUT_1_VOLUME   0x6C1
 
#define ARIZONA_OUT5LMIX_INPUT_2_SOURCE   0x6C2
 
#define ARIZONA_OUT5LMIX_INPUT_2_VOLUME   0x6C3
 
#define ARIZONA_OUT5LMIX_INPUT_3_SOURCE   0x6C4
 
#define ARIZONA_OUT5LMIX_INPUT_3_VOLUME   0x6C5
 
#define ARIZONA_OUT5LMIX_INPUT_4_SOURCE   0x6C6
 
#define ARIZONA_OUT5LMIX_INPUT_4_VOLUME   0x6C7
 
#define ARIZONA_OUT5RMIX_INPUT_1_SOURCE   0x6C8
 
#define ARIZONA_OUT5RMIX_INPUT_1_VOLUME   0x6C9
 
#define ARIZONA_OUT5RMIX_INPUT_2_SOURCE   0x6CA
 
#define ARIZONA_OUT5RMIX_INPUT_2_VOLUME   0x6CB
 
#define ARIZONA_OUT5RMIX_INPUT_3_SOURCE   0x6CC
 
#define ARIZONA_OUT5RMIX_INPUT_3_VOLUME   0x6CD
 
#define ARIZONA_OUT5RMIX_INPUT_4_SOURCE   0x6CE
 
#define ARIZONA_OUT5RMIX_INPUT_4_VOLUME   0x6CF
 
#define ARIZONA_OUT6LMIX_INPUT_1_SOURCE   0x6D0
 
#define ARIZONA_OUT6LMIX_INPUT_1_VOLUME   0x6D1
 
#define ARIZONA_OUT6LMIX_INPUT_2_SOURCE   0x6D2
 
#define ARIZONA_OUT6LMIX_INPUT_2_VOLUME   0x6D3
 
#define ARIZONA_OUT6LMIX_INPUT_3_SOURCE   0x6D4
 
#define ARIZONA_OUT6LMIX_INPUT_3_VOLUME   0x6D5
 
#define ARIZONA_OUT6LMIX_INPUT_4_SOURCE   0x6D6
 
#define ARIZONA_OUT6LMIX_INPUT_4_VOLUME   0x6D7
 
#define ARIZONA_OUT6RMIX_INPUT_1_SOURCE   0x6D8
 
#define ARIZONA_OUT6RMIX_INPUT_1_VOLUME   0x6D9
 
#define ARIZONA_OUT6RMIX_INPUT_2_SOURCE   0x6DA
 
#define ARIZONA_OUT6RMIX_INPUT_2_VOLUME   0x6DB
 
#define ARIZONA_OUT6RMIX_INPUT_3_SOURCE   0x6DC
 
#define ARIZONA_OUT6RMIX_INPUT_3_VOLUME   0x6DD
 
#define ARIZONA_OUT6RMIX_INPUT_4_SOURCE   0x6DE
 
#define ARIZONA_OUT6RMIX_INPUT_4_VOLUME   0x6DF
 
#define ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE   0x700
 
#define ARIZONA_AIF1TX1MIX_INPUT_1_VOLUME   0x701
 
#define ARIZONA_AIF1TX1MIX_INPUT_2_SOURCE   0x702
 
#define ARIZONA_AIF1TX1MIX_INPUT_2_VOLUME   0x703
 
#define ARIZONA_AIF1TX1MIX_INPUT_3_SOURCE   0x704
 
#define ARIZONA_AIF1TX1MIX_INPUT_3_VOLUME   0x705
 
#define ARIZONA_AIF1TX1MIX_INPUT_4_SOURCE   0x706
 
#define ARIZONA_AIF1TX1MIX_INPUT_4_VOLUME   0x707
 
#define ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE   0x708
 
#define ARIZONA_AIF1TX2MIX_INPUT_1_VOLUME   0x709
 
#define ARIZONA_AIF1TX2MIX_INPUT_2_SOURCE   0x70A
 
#define ARIZONA_AIF1TX2MIX_INPUT_2_VOLUME   0x70B
 
#define ARIZONA_AIF1TX2MIX_INPUT_3_SOURCE   0x70C
 
#define ARIZONA_AIF1TX2MIX_INPUT_3_VOLUME   0x70D
 
#define ARIZONA_AIF1TX2MIX_INPUT_4_SOURCE   0x70E
 
#define ARIZONA_AIF1TX2MIX_INPUT_4_VOLUME   0x70F
 
#define ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE   0x710
 
#define ARIZONA_AIF1TX3MIX_INPUT_1_VOLUME   0x711
 
#define ARIZONA_AIF1TX3MIX_INPUT_2_SOURCE   0x712
 
#define ARIZONA_AIF1TX3MIX_INPUT_2_VOLUME   0x713
 
#define ARIZONA_AIF1TX3MIX_INPUT_3_SOURCE   0x714
 
#define ARIZONA_AIF1TX3MIX_INPUT_3_VOLUME   0x715
 
#define ARIZONA_AIF1TX3MIX_INPUT_4_SOURCE   0x716
 
#define ARIZONA_AIF1TX3MIX_INPUT_4_VOLUME   0x717
 
#define ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE   0x718
 
#define ARIZONA_AIF1TX4MIX_INPUT_1_VOLUME   0x719
 
#define ARIZONA_AIF1TX4MIX_INPUT_2_SOURCE   0x71A
 
#define ARIZONA_AIF1TX4MIX_INPUT_2_VOLUME   0x71B
 
#define ARIZONA_AIF1TX4MIX_INPUT_3_SOURCE   0x71C
 
#define ARIZONA_AIF1TX4MIX_INPUT_3_VOLUME   0x71D
 
#define ARIZONA_AIF1TX4MIX_INPUT_4_SOURCE   0x71E
 
#define ARIZONA_AIF1TX4MIX_INPUT_4_VOLUME   0x71F
 
#define ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE   0x720
 
#define ARIZONA_AIF1TX5MIX_INPUT_1_VOLUME   0x721
 
#define ARIZONA_AIF1TX5MIX_INPUT_2_SOURCE   0x722
 
#define ARIZONA_AIF1TX5MIX_INPUT_2_VOLUME   0x723
 
#define ARIZONA_AIF1TX5MIX_INPUT_3_SOURCE   0x724
 
#define ARIZONA_AIF1TX5MIX_INPUT_3_VOLUME   0x725
 
#define ARIZONA_AIF1TX5MIX_INPUT_4_SOURCE   0x726
 
#define ARIZONA_AIF1TX5MIX_INPUT_4_VOLUME   0x727
 
#define ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE   0x728
 
#define ARIZONA_AIF1TX6MIX_INPUT_1_VOLUME   0x729
 
#define ARIZONA_AIF1TX6MIX_INPUT_2_SOURCE   0x72A
 
#define ARIZONA_AIF1TX6MIX_INPUT_2_VOLUME   0x72B
 
#define ARIZONA_AIF1TX6MIX_INPUT_3_SOURCE   0x72C
 
#define ARIZONA_AIF1TX6MIX_INPUT_3_VOLUME   0x72D
 
#define ARIZONA_AIF1TX6MIX_INPUT_4_SOURCE   0x72E
 
#define ARIZONA_AIF1TX6MIX_INPUT_4_VOLUME   0x72F
 
#define ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE   0x730
 
#define ARIZONA_AIF1TX7MIX_INPUT_1_VOLUME   0x731
 
#define ARIZONA_AIF1TX7MIX_INPUT_2_SOURCE   0x732
 
#define ARIZONA_AIF1TX7MIX_INPUT_2_VOLUME   0x733
 
#define ARIZONA_AIF1TX7MIX_INPUT_3_SOURCE   0x734
 
#define ARIZONA_AIF1TX7MIX_INPUT_3_VOLUME   0x735
 
#define ARIZONA_AIF1TX7MIX_INPUT_4_SOURCE   0x736
 
#define ARIZONA_AIF1TX7MIX_INPUT_4_VOLUME   0x737
 
#define ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE   0x738
 
#define ARIZONA_AIF1TX8MIX_INPUT_1_VOLUME   0x739
 
#define ARIZONA_AIF1TX8MIX_INPUT_2_SOURCE   0x73A
 
#define ARIZONA_AIF1TX8MIX_INPUT_2_VOLUME   0x73B
 
#define ARIZONA_AIF1TX8MIX_INPUT_3_SOURCE   0x73C
 
#define ARIZONA_AIF1TX8MIX_INPUT_3_VOLUME   0x73D
 
#define ARIZONA_AIF1TX8MIX_INPUT_4_SOURCE   0x73E
 
#define ARIZONA_AIF1TX8MIX_INPUT_4_VOLUME   0x73F
 
#define ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE   0x740
 
#define ARIZONA_AIF2TX1MIX_INPUT_1_VOLUME   0x741
 
#define ARIZONA_AIF2TX1MIX_INPUT_2_SOURCE   0x742
 
#define ARIZONA_AIF2TX1MIX_INPUT_2_VOLUME   0x743
 
#define ARIZONA_AIF2TX1MIX_INPUT_3_SOURCE   0x744
 
#define ARIZONA_AIF2TX1MIX_INPUT_3_VOLUME   0x745
 
#define ARIZONA_AIF2TX1MIX_INPUT_4_SOURCE   0x746
 
#define ARIZONA_AIF2TX1MIX_INPUT_4_VOLUME   0x747
 
#define ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE   0x748
 
#define ARIZONA_AIF2TX2MIX_INPUT_1_VOLUME   0x749
 
#define ARIZONA_AIF2TX2MIX_INPUT_2_SOURCE   0x74A
 
#define ARIZONA_AIF2TX2MIX_INPUT_2_VOLUME   0x74B
 
#define ARIZONA_AIF2TX2MIX_INPUT_3_SOURCE   0x74C
 
#define ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME   0x74D
 
#define ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE   0x74E
 
#define ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME   0x74F
 
#define ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE   0x780
 
#define ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME   0x781
 
#define ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE   0x782
 
#define ARIZONA_AIF3TX1MIX_INPUT_2_VOLUME   0x783
 
#define ARIZONA_AIF3TX1MIX_INPUT_3_SOURCE   0x784
 
#define ARIZONA_AIF3TX1MIX_INPUT_3_VOLUME   0x785
 
#define ARIZONA_AIF3TX1MIX_INPUT_4_SOURCE   0x786
 
#define ARIZONA_AIF3TX1MIX_INPUT_4_VOLUME   0x787
 
#define ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE   0x788
 
#define ARIZONA_AIF3TX2MIX_INPUT_1_VOLUME   0x789
 
#define ARIZONA_AIF3TX2MIX_INPUT_2_SOURCE   0x78A
 
#define ARIZONA_AIF3TX2MIX_INPUT_2_VOLUME   0x78B
 
#define ARIZONA_AIF3TX2MIX_INPUT_3_SOURCE   0x78C
 
#define ARIZONA_AIF3TX2MIX_INPUT_3_VOLUME   0x78D
 
#define ARIZONA_AIF3TX2MIX_INPUT_4_SOURCE   0x78E
 
#define ARIZONA_AIF3TX2MIX_INPUT_4_VOLUME   0x78F
 
#define ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE   0x7C0
 
#define ARIZONA_SLIMTX1MIX_INPUT_1_VOLUME   0x7C1
 
#define ARIZONA_SLIMTX1MIX_INPUT_2_SOURCE   0x7C2
 
#define ARIZONA_SLIMTX1MIX_INPUT_2_VOLUME   0x7C3
 
#define ARIZONA_SLIMTX1MIX_INPUT_3_SOURCE   0x7C4
 
#define ARIZONA_SLIMTX1MIX_INPUT_3_VOLUME   0x7C5
 
#define ARIZONA_SLIMTX1MIX_INPUT_4_SOURCE   0x7C6
 
#define ARIZONA_SLIMTX1MIX_INPUT_4_VOLUME   0x7C7
 
#define ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE   0x7C8
 
#define ARIZONA_SLIMTX2MIX_INPUT_1_VOLUME   0x7C9
 
#define ARIZONA_SLIMTX2MIX_INPUT_2_SOURCE   0x7CA
 
#define ARIZONA_SLIMTX2MIX_INPUT_2_VOLUME   0x7CB
 
#define ARIZONA_SLIMTX2MIX_INPUT_3_SOURCE   0x7CC
 
#define ARIZONA_SLIMTX2MIX_INPUT_3_VOLUME   0x7CD
 
#define ARIZONA_SLIMTX2MIX_INPUT_4_SOURCE   0x7CE
 
#define ARIZONA_SLIMTX2MIX_INPUT_4_VOLUME   0x7CF
 
#define ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE   0x7D0
 
#define ARIZONA_SLIMTX3MIX_INPUT_1_VOLUME   0x7D1
 
#define ARIZONA_SLIMTX3MIX_INPUT_2_SOURCE   0x7D2
 
#define ARIZONA_SLIMTX3MIX_INPUT_2_VOLUME   0x7D3
 
#define ARIZONA_SLIMTX3MIX_INPUT_3_SOURCE   0x7D4
 
#define ARIZONA_SLIMTX3MIX_INPUT_3_VOLUME   0x7D5
 
#define ARIZONA_SLIMTX3MIX_INPUT_4_SOURCE   0x7D6
 
#define ARIZONA_SLIMTX3MIX_INPUT_4_VOLUME   0x7D7
 
#define ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE   0x7D8
 
#define ARIZONA_SLIMTX4MIX_INPUT_1_VOLUME   0x7D9
 
#define ARIZONA_SLIMTX4MIX_INPUT_2_SOURCE   0x7DA
 
#define ARIZONA_SLIMTX4MIX_INPUT_2_VOLUME   0x7DB
 
#define ARIZONA_SLIMTX4MIX_INPUT_3_SOURCE   0x7DC
 
#define ARIZONA_SLIMTX4MIX_INPUT_3_VOLUME   0x7DD
 
#define ARIZONA_SLIMTX4MIX_INPUT_4_SOURCE   0x7DE
 
#define ARIZONA_SLIMTX4MIX_INPUT_4_VOLUME   0x7DF
 
#define ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE   0x7E0
 
#define ARIZONA_SLIMTX5MIX_INPUT_1_VOLUME   0x7E1
 
#define ARIZONA_SLIMTX5MIX_INPUT_2_SOURCE   0x7E2
 
#define ARIZONA_SLIMTX5MIX_INPUT_2_VOLUME   0x7E3
 
#define ARIZONA_SLIMTX5MIX_INPUT_3_SOURCE   0x7E4
 
#define ARIZONA_SLIMTX5MIX_INPUT_3_VOLUME   0x7E5
 
#define ARIZONA_SLIMTX5MIX_INPUT_4_SOURCE   0x7E6
 
#define ARIZONA_SLIMTX5MIX_INPUT_4_VOLUME   0x7E7
 
#define ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE   0x7E8
 
#define ARIZONA_SLIMTX6MIX_INPUT_1_VOLUME   0x7E9
 
#define ARIZONA_SLIMTX6MIX_INPUT_2_SOURCE   0x7EA
 
#define ARIZONA_SLIMTX6MIX_INPUT_2_VOLUME   0x7EB
 
#define ARIZONA_SLIMTX6MIX_INPUT_3_SOURCE   0x7EC
 
#define ARIZONA_SLIMTX6MIX_INPUT_3_VOLUME   0x7ED
 
#define ARIZONA_SLIMTX6MIX_INPUT_4_SOURCE   0x7EE
 
#define ARIZONA_SLIMTX6MIX_INPUT_4_VOLUME   0x7EF
 
#define ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE   0x7F0
 
#define ARIZONA_SLIMTX7MIX_INPUT_1_VOLUME   0x7F1
 
#define ARIZONA_SLIMTX7MIX_INPUT_2_SOURCE   0x7F2
 
#define ARIZONA_SLIMTX7MIX_INPUT_2_VOLUME   0x7F3
 
#define ARIZONA_SLIMTX7MIX_INPUT_3_SOURCE   0x7F4
 
#define ARIZONA_SLIMTX7MIX_INPUT_3_VOLUME   0x7F5
 
#define ARIZONA_SLIMTX7MIX_INPUT_4_SOURCE   0x7F6
 
#define ARIZONA_SLIMTX7MIX_INPUT_4_VOLUME   0x7F7
 
#define ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE   0x7F8
 
#define ARIZONA_SLIMTX8MIX_INPUT_1_VOLUME   0x7F9
 
#define ARIZONA_SLIMTX8MIX_INPUT_2_SOURCE   0x7FA
 
#define ARIZONA_SLIMTX8MIX_INPUT_2_VOLUME   0x7FB
 
#define ARIZONA_SLIMTX8MIX_INPUT_3_SOURCE   0x7FC
 
#define ARIZONA_SLIMTX8MIX_INPUT_3_VOLUME   0x7FD
 
#define ARIZONA_SLIMTX8MIX_INPUT_4_SOURCE   0x7FE
 
#define ARIZONA_SLIMTX8MIX_INPUT_4_VOLUME   0x7FF
 
#define ARIZONA_EQ1MIX_INPUT_1_SOURCE   0x880
 
#define ARIZONA_EQ1MIX_INPUT_1_VOLUME   0x881
 
#define ARIZONA_EQ1MIX_INPUT_2_SOURCE   0x882
 
#define ARIZONA_EQ1MIX_INPUT_2_VOLUME   0x883
 
#define ARIZONA_EQ1MIX_INPUT_3_SOURCE   0x884
 
#define ARIZONA_EQ1MIX_INPUT_3_VOLUME   0x885
 
#define ARIZONA_EQ1MIX_INPUT_4_SOURCE   0x886
 
#define ARIZONA_EQ1MIX_INPUT_4_VOLUME   0x887
 
#define ARIZONA_EQ2MIX_INPUT_1_SOURCE   0x888
 
#define ARIZONA_EQ2MIX_INPUT_1_VOLUME   0x889
 
#define ARIZONA_EQ2MIX_INPUT_2_SOURCE   0x88A
 
#define ARIZONA_EQ2MIX_INPUT_2_VOLUME   0x88B
 
#define ARIZONA_EQ2MIX_INPUT_3_SOURCE   0x88C
 
#define ARIZONA_EQ2MIX_INPUT_3_VOLUME   0x88D
 
#define ARIZONA_EQ2MIX_INPUT_4_SOURCE   0x88E
 
#define ARIZONA_EQ2MIX_INPUT_4_VOLUME   0x88F
 
#define ARIZONA_EQ3MIX_INPUT_1_SOURCE   0x890
 
#define ARIZONA_EQ3MIX_INPUT_1_VOLUME   0x891
 
#define ARIZONA_EQ3MIX_INPUT_2_SOURCE   0x892
 
#define ARIZONA_EQ3MIX_INPUT_2_VOLUME   0x893
 
#define ARIZONA_EQ3MIX_INPUT_3_SOURCE   0x894
 
#define ARIZONA_EQ3MIX_INPUT_3_VOLUME   0x895
 
#define ARIZONA_EQ3MIX_INPUT_4_SOURCE   0x896
 
#define ARIZONA_EQ3MIX_INPUT_4_VOLUME   0x897
 
#define ARIZONA_EQ4MIX_INPUT_1_SOURCE   0x898
 
#define ARIZONA_EQ4MIX_INPUT_1_VOLUME   0x899
 
#define ARIZONA_EQ4MIX_INPUT_2_SOURCE   0x89A
 
#define ARIZONA_EQ4MIX_INPUT_2_VOLUME   0x89B
 
#define ARIZONA_EQ4MIX_INPUT_3_SOURCE   0x89C
 
#define ARIZONA_EQ4MIX_INPUT_3_VOLUME   0x89D
 
#define ARIZONA_EQ4MIX_INPUT_4_SOURCE   0x89E
 
#define ARIZONA_EQ4MIX_INPUT_4_VOLUME   0x89F
 
#define ARIZONA_DRC1LMIX_INPUT_1_SOURCE   0x8C0
 
#define ARIZONA_DRC1LMIX_INPUT_1_VOLUME   0x8C1
 
#define ARIZONA_DRC1LMIX_INPUT_2_SOURCE   0x8C2
 
#define ARIZONA_DRC1LMIX_INPUT_2_VOLUME   0x8C3
 
#define ARIZONA_DRC1LMIX_INPUT_3_SOURCE   0x8C4
 
#define ARIZONA_DRC1LMIX_INPUT_3_VOLUME   0x8C5
 
#define ARIZONA_DRC1LMIX_INPUT_4_SOURCE   0x8C6
 
#define ARIZONA_DRC1LMIX_INPUT_4_VOLUME   0x8C7
 
#define ARIZONA_DRC1RMIX_INPUT_1_SOURCE   0x8C8
 
#define ARIZONA_DRC1RMIX_INPUT_1_VOLUME   0x8C9
 
#define ARIZONA_DRC1RMIX_INPUT_2_SOURCE   0x8CA
 
#define ARIZONA_DRC1RMIX_INPUT_2_VOLUME   0x8CB
 
#define ARIZONA_DRC1RMIX_INPUT_3_SOURCE   0x8CC
 
#define ARIZONA_DRC1RMIX_INPUT_3_VOLUME   0x8CD
 
#define ARIZONA_DRC1RMIX_INPUT_4_SOURCE   0x8CE
 
#define ARIZONA_DRC1RMIX_INPUT_4_VOLUME   0x8CF
 
#define ARIZONA_DRC2LMIX_INPUT_1_SOURCE   0x8D0
 
#define ARIZONA_DRC2LMIX_INPUT_1_VOLUME   0x8D1
 
#define ARIZONA_DRC2LMIX_INPUT_2_SOURCE   0x8D2
 
#define ARIZONA_DRC2LMIX_INPUT_2_VOLUME   0x8D3
 
#define ARIZONA_DRC2LMIX_INPUT_3_SOURCE   0x8D4
 
#define ARIZONA_DRC2LMIX_INPUT_3_VOLUME   0x8D5
 
#define ARIZONA_DRC2LMIX_INPUT_4_SOURCE   0x8D6
 
#define ARIZONA_DRC2LMIX_INPUT_4_VOLUME   0x8D7
 
#define ARIZONA_DRC2RMIX_INPUT_1_SOURCE   0x8D8
 
#define ARIZONA_DRC2RMIX_INPUT_1_VOLUME   0x8D9
 
#define ARIZONA_DRC2RMIX_INPUT_2_SOURCE   0x8DA
 
#define ARIZONA_DRC2RMIX_INPUT_2_VOLUME   0x8DB
 
#define ARIZONA_DRC2RMIX_INPUT_3_SOURCE   0x8DC
 
#define ARIZONA_DRC2RMIX_INPUT_3_VOLUME   0x8DD
 
#define ARIZONA_DRC2RMIX_INPUT_4_SOURCE   0x8DE
 
#define ARIZONA_DRC2RMIX_INPUT_4_VOLUME   0x8DF
 
#define ARIZONA_HPLP1MIX_INPUT_1_SOURCE   0x900
 
#define ARIZONA_HPLP1MIX_INPUT_1_VOLUME   0x901
 
#define ARIZONA_HPLP1MIX_INPUT_2_SOURCE   0x902
 
#define ARIZONA_HPLP1MIX_INPUT_2_VOLUME   0x903
 
#define ARIZONA_HPLP1MIX_INPUT_3_SOURCE   0x904
 
#define ARIZONA_HPLP1MIX_INPUT_3_VOLUME   0x905
 
#define ARIZONA_HPLP1MIX_INPUT_4_SOURCE   0x906
 
#define ARIZONA_HPLP1MIX_INPUT_4_VOLUME   0x907
 
#define ARIZONA_HPLP2MIX_INPUT_1_SOURCE   0x908
 
#define ARIZONA_HPLP2MIX_INPUT_1_VOLUME   0x909
 
#define ARIZONA_HPLP2MIX_INPUT_2_SOURCE   0x90A
 
#define ARIZONA_HPLP2MIX_INPUT_2_VOLUME   0x90B
 
#define ARIZONA_HPLP2MIX_INPUT_3_SOURCE   0x90C
 
#define ARIZONA_HPLP2MIX_INPUT_3_VOLUME   0x90D
 
#define ARIZONA_HPLP2MIX_INPUT_4_SOURCE   0x90E
 
#define ARIZONA_HPLP2MIX_INPUT_4_VOLUME   0x90F
 
#define ARIZONA_HPLP3MIX_INPUT_1_SOURCE   0x910
 
#define ARIZONA_HPLP3MIX_INPUT_1_VOLUME   0x911
 
#define ARIZONA_HPLP3MIX_INPUT_2_SOURCE   0x912
 
#define ARIZONA_HPLP3MIX_INPUT_2_VOLUME   0x913
 
#define ARIZONA_HPLP3MIX_INPUT_3_SOURCE   0x914
 
#define ARIZONA_HPLP3MIX_INPUT_3_VOLUME   0x915
 
#define ARIZONA_HPLP3MIX_INPUT_4_SOURCE   0x916
 
#define ARIZONA_HPLP3MIX_INPUT_4_VOLUME   0x917
 
#define ARIZONA_HPLP4MIX_INPUT_1_SOURCE   0x918
 
#define ARIZONA_HPLP4MIX_INPUT_1_VOLUME   0x919
 
#define ARIZONA_HPLP4MIX_INPUT_2_SOURCE   0x91A
 
#define ARIZONA_HPLP4MIX_INPUT_2_VOLUME   0x91B
 
#define ARIZONA_HPLP4MIX_INPUT_3_SOURCE   0x91C
 
#define ARIZONA_HPLP4MIX_INPUT_3_VOLUME   0x91D
 
#define ARIZONA_HPLP4MIX_INPUT_4_SOURCE   0x91E
 
#define ARIZONA_HPLP4MIX_INPUT_4_VOLUME   0x91F
 
#define ARIZONA_DSP1LMIX_INPUT_1_SOURCE   0x940
 
#define ARIZONA_DSP1LMIX_INPUT_1_VOLUME   0x941
 
#define ARIZONA_DSP1LMIX_INPUT_2_SOURCE   0x942
 
#define ARIZONA_DSP1LMIX_INPUT_2_VOLUME   0x943
 
#define ARIZONA_DSP1LMIX_INPUT_3_SOURCE   0x944
 
#define ARIZONA_DSP1LMIX_INPUT_3_VOLUME   0x945
 
#define ARIZONA_DSP1LMIX_INPUT_4_SOURCE   0x946
 
#define ARIZONA_DSP1LMIX_INPUT_4_VOLUME   0x947
 
#define ARIZONA_DSP1RMIX_INPUT_1_SOURCE   0x948
 
#define ARIZONA_DSP1RMIX_INPUT_1_VOLUME   0x949
 
#define ARIZONA_DSP1RMIX_INPUT_2_SOURCE   0x94A
 
#define ARIZONA_DSP1RMIX_INPUT_2_VOLUME   0x94B
 
#define ARIZONA_DSP1RMIX_INPUT_3_SOURCE   0x94C
 
#define ARIZONA_DSP1RMIX_INPUT_3_VOLUME   0x94D
 
#define ARIZONA_DSP1RMIX_INPUT_4_SOURCE   0x94E
 
#define ARIZONA_DSP1RMIX_INPUT_4_VOLUME   0x94F
 
#define ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE   0x950
 
#define ARIZONA_DSP1AUX2MIX_INPUT_1_SOURCE   0x958
 
#define ARIZONA_DSP1AUX3MIX_INPUT_1_SOURCE   0x960
 
#define ARIZONA_DSP1AUX4MIX_INPUT_1_SOURCE   0x968
 
#define ARIZONA_DSP1AUX5MIX_INPUT_1_SOURCE   0x970
 
#define ARIZONA_DSP1AUX6MIX_INPUT_1_SOURCE   0x978
 
#define ARIZONA_DSP2LMIX_INPUT_1_SOURCE   0x980
 
#define ARIZONA_DSP2LMIX_INPUT_1_VOLUME   0x981
 
#define ARIZONA_DSP2LMIX_INPUT_2_SOURCE   0x982
 
#define ARIZONA_DSP2LMIX_INPUT_2_VOLUME   0x983
 
#define ARIZONA_DSP2LMIX_INPUT_3_SOURCE   0x984
 
#define ARIZONA_DSP2LMIX_INPUT_3_VOLUME   0x985
 
#define ARIZONA_DSP2LMIX_INPUT_4_SOURCE   0x986
 
#define ARIZONA_DSP2LMIX_INPUT_4_VOLUME   0x987
 
#define ARIZONA_DSP2RMIX_INPUT_1_SOURCE   0x988
 
#define ARIZONA_DSP2RMIX_INPUT_1_VOLUME   0x989
 
#define ARIZONA_DSP2RMIX_INPUT_2_SOURCE   0x98A
 
#define ARIZONA_DSP2RMIX_INPUT_2_VOLUME   0x98B
 
#define ARIZONA_DSP2RMIX_INPUT_3_SOURCE   0x98C
 
#define ARIZONA_DSP2RMIX_INPUT_3_VOLUME   0x98D
 
#define ARIZONA_DSP2RMIX_INPUT_4_SOURCE   0x98E
 
#define ARIZONA_DSP2RMIX_INPUT_4_VOLUME   0x98F
 
#define ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE   0x990
 
#define ARIZONA_DSP2AUX2MIX_INPUT_1_SOURCE   0x998
 
#define ARIZONA_DSP2AUX3MIX_INPUT_1_SOURCE   0x9A0
 
#define ARIZONA_DSP2AUX4MIX_INPUT_1_SOURCE   0x9A8
 
#define ARIZONA_DSP2AUX5MIX_INPUT_1_SOURCE   0x9B0
 
#define ARIZONA_DSP2AUX6MIX_INPUT_1_SOURCE   0x9B8
 
#define ARIZONA_DSP3LMIX_INPUT_1_SOURCE   0x9C0
 
#define ARIZONA_DSP3LMIX_INPUT_1_VOLUME   0x9C1
 
#define ARIZONA_DSP3LMIX_INPUT_2_SOURCE   0x9C2
 
#define ARIZONA_DSP3LMIX_INPUT_2_VOLUME   0x9C3
 
#define ARIZONA_DSP3LMIX_INPUT_3_SOURCE   0x9C4
 
#define ARIZONA_DSP3LMIX_INPUT_3_VOLUME   0x9C5
 
#define ARIZONA_DSP3LMIX_INPUT_4_SOURCE   0x9C6
 
#define ARIZONA_DSP3LMIX_INPUT_4_VOLUME   0x9C7
 
#define ARIZONA_DSP3RMIX_INPUT_1_SOURCE   0x9C8
 
#define ARIZONA_DSP3RMIX_INPUT_1_VOLUME   0x9C9
 
#define ARIZONA_DSP3RMIX_INPUT_2_SOURCE   0x9CA
 
#define ARIZONA_DSP3RMIX_INPUT_2_VOLUME   0x9CB
 
#define ARIZONA_DSP3RMIX_INPUT_3_SOURCE   0x9CC
 
#define ARIZONA_DSP3RMIX_INPUT_3_VOLUME   0x9CD
 
#define ARIZONA_DSP3RMIX_INPUT_4_SOURCE   0x9CE
 
#define ARIZONA_DSP3RMIX_INPUT_4_VOLUME   0x9CF
 
#define ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE   0x9D0
 
#define ARIZONA_DSP3AUX2MIX_INPUT_1_SOURCE   0x9D8
 
#define ARIZONA_DSP3AUX3MIX_INPUT_1_SOURCE   0x9E0
 
#define ARIZONA_DSP3AUX4MIX_INPUT_1_SOURCE   0x9E8
 
#define ARIZONA_DSP3AUX5MIX_INPUT_1_SOURCE   0x9F0
 
#define ARIZONA_DSP3AUX6MIX_INPUT_1_SOURCE   0x9F8
 
#define ARIZONA_DSP4LMIX_INPUT_1_SOURCE   0xA00
 
#define ARIZONA_DSP4LMIX_INPUT_1_VOLUME   0xA01
 
#define ARIZONA_DSP4LMIX_INPUT_2_SOURCE   0xA02
 
#define ARIZONA_DSP4LMIX_INPUT_2_VOLUME   0xA03
 
#define ARIZONA_DSP4LMIX_INPUT_3_SOURCE   0xA04
 
#define ARIZONA_DSP4LMIX_INPUT_3_VOLUME   0xA05
 
#define ARIZONA_DSP4LMIX_INPUT_4_SOURCE   0xA06
 
#define ARIZONA_DSP4LMIX_INPUT_4_VOLUME   0xA07
 
#define ARIZONA_DSP4RMIX_INPUT_1_SOURCE   0xA08
 
#define ARIZONA_DSP4RMIX_INPUT_1_VOLUME   0xA09
 
#define ARIZONA_DSP4RMIX_INPUT_2_SOURCE   0xA0A
 
#define ARIZONA_DSP4RMIX_INPUT_2_VOLUME   0xA0B
 
#define ARIZONA_DSP4RMIX_INPUT_3_SOURCE   0xA0C
 
#define ARIZONA_DSP4RMIX_INPUT_3_VOLUME   0xA0D
 
#define ARIZONA_DSP4RMIX_INPUT_4_SOURCE   0xA0E
 
#define ARIZONA_DSP4RMIX_INPUT_4_VOLUME   0xA0F
 
#define ARIZONA_DSP4AUX1MIX_INPUT_1_SOURCE   0xA10
 
#define ARIZONA_DSP4AUX2MIX_INPUT_1_SOURCE   0xA18
 
#define ARIZONA_DSP4AUX3MIX_INPUT_1_SOURCE   0xA20
 
#define ARIZONA_DSP4AUX4MIX_INPUT_1_SOURCE   0xA28
 
#define ARIZONA_DSP4AUX5MIX_INPUT_1_SOURCE   0xA30
 
#define ARIZONA_DSP4AUX6MIX_INPUT_1_SOURCE   0xA38
 
#define ARIZONA_ASRC1LMIX_INPUT_1_SOURCE   0xA80
 
#define ARIZONA_ASRC1RMIX_INPUT_1_SOURCE   0xA88
 
#define ARIZONA_ASRC2LMIX_INPUT_1_SOURCE   0xA90
 
#define ARIZONA_ASRC2RMIX_INPUT_1_SOURCE   0xA98
 
#define ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE   0xB00
 
#define ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE   0xB08
 
#define ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE   0xB10
 
#define ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE   0xB18
 
#define ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE   0xB20
 
#define ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE   0xB28
 
#define ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE   0xB30
 
#define ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE   0xB38
 
#define ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE   0xB40
 
#define ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE   0xB48
 
#define ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE   0xB60
 
#define ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE   0xB68
 
#define ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE   0xB30
 
#define ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE   0xB38
 
#define ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE   0xB40
 
#define ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE   0xB48
 
#define ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE   0xB50
 
#define ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE   0xB58
 
#define ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE   0xB60
 
#define ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE   0xB68
 
#define ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE   0xB70
 
#define ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE   0xB78
 
#define ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE   0xB80
 
#define ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE   0xB88
 
#define ARIZONA_ISRC3DEC3MIX_INPUT_1_SOURCE   0xB90
 
#define ARIZONA_ISRC3DEC4MIX_INPUT_1_SOURCE   0xB98
 
#define ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE   0xBA0
 
#define ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE   0xBA8
 
#define ARIZONA_ISRC3INT3MIX_INPUT_1_SOURCE   0xBB0
 
#define ARIZONA_ISRC3INT4MIX_INPUT_1_SOURCE   0xBB8
 
#define ARIZONA_GPIO1_CTRL   0xC00
 
#define ARIZONA_GPIO2_CTRL   0xC01
 
#define ARIZONA_GPIO3_CTRL   0xC02
 
#define ARIZONA_GPIO4_CTRL   0xC03
 
#define ARIZONA_GPIO5_CTRL   0xC04
 
#define ARIZONA_IRQ_CTRL_1   0xC0F
 
#define ARIZONA_GPIO_DEBOUNCE_CONFIG   0xC10
 
#define ARIZONA_MISC_PAD_CTRL_1   0xC20
 
#define ARIZONA_MISC_PAD_CTRL_2   0xC21
 
#define ARIZONA_MISC_PAD_CTRL_3   0xC22
 
#define ARIZONA_MISC_PAD_CTRL_4   0xC23
 
#define ARIZONA_MISC_PAD_CTRL_5   0xC24
 
#define ARIZONA_MISC_PAD_CTRL_6   0xC25
 
#define ARIZONA_MISC_PAD_CTRL_7   0xC30
 
#define ARIZONA_MISC_PAD_CTRL_8   0xC31
 
#define ARIZONA_MISC_PAD_CTRL_9   0xC32
 
#define ARIZONA_MISC_PAD_CTRL_10   0xC33
 
#define ARIZONA_MISC_PAD_CTRL_11   0xC34
 
#define ARIZONA_MISC_PAD_CTRL_12   0xC35
 
#define ARIZONA_MISC_PAD_CTRL_13   0xC36
 
#define ARIZONA_MISC_PAD_CTRL_14   0xC37
 
#define ARIZONA_MISC_PAD_CTRL_15   0xC38
 
#define ARIZONA_MISC_PAD_CTRL_16   0xC39
 
#define ARIZONA_MISC_PAD_CTRL_17   0xC3A
 
#define ARIZONA_MISC_PAD_CTRL_18   0xC3B
 
#define ARIZONA_INTERRUPT_STATUS_1   0xD00
 
#define ARIZONA_INTERRUPT_STATUS_2   0xD01
 
#define ARIZONA_INTERRUPT_STATUS_3   0xD02
 
#define ARIZONA_INTERRUPT_STATUS_4   0xD03
 
#define ARIZONA_INTERRUPT_STATUS_5   0xD04
 
#define ARIZONA_INTERRUPT_STATUS_1_MASK   0xD08
 
#define ARIZONA_INTERRUPT_STATUS_2_MASK   0xD09
 
#define ARIZONA_INTERRUPT_STATUS_3_MASK   0xD0A
 
#define ARIZONA_INTERRUPT_STATUS_4_MASK   0xD0B
 
#define ARIZONA_INTERRUPT_STATUS_5_MASK   0xD0C
 
#define ARIZONA_INTERRUPT_CONTROL   0xD0F
 
#define ARIZONA_IRQ2_STATUS_1   0xD10
 
#define ARIZONA_IRQ2_STATUS_2   0xD11
 
#define ARIZONA_IRQ2_STATUS_3   0xD12
 
#define ARIZONA_IRQ2_STATUS_4   0xD13
 
#define ARIZONA_IRQ2_STATUS_5   0xD14
 
#define ARIZONA_IRQ2_STATUS_1_MASK   0xD18
 
#define ARIZONA_IRQ2_STATUS_2_MASK   0xD19
 
#define ARIZONA_IRQ2_STATUS_3_MASK   0xD1A
 
#define ARIZONA_IRQ2_STATUS_4_MASK   0xD1B
 
#define ARIZONA_IRQ2_STATUS_5_MASK   0xD1C
 
#define ARIZONA_IRQ2_CONTROL   0xD1F
 
#define ARIZONA_INTERRUPT_RAW_STATUS_2   0xD20
 
#define ARIZONA_INTERRUPT_RAW_STATUS_3   0xD21
 
#define ARIZONA_INTERRUPT_RAW_STATUS_4   0xD22
 
#define ARIZONA_INTERRUPT_RAW_STATUS_5   0xD23
 
#define ARIZONA_INTERRUPT_RAW_STATUS_6   0xD24
 
#define ARIZONA_INTERRUPT_RAW_STATUS_7   0xD25
 
#define ARIZONA_INTERRUPT_RAW_STATUS_8   0xD26
 
#define ARIZONA_IRQ_PIN_STATUS   0xD40
 
#define ARIZONA_ADSP2_IRQ0   0xD41
 
#define ARIZONA_AOD_WKUP_AND_TRIG   0xD50
 
#define ARIZONA_AOD_IRQ1   0xD51
 
#define ARIZONA_AOD_IRQ2   0xD52
 
#define ARIZONA_AOD_IRQ_MASK_IRQ1   0xD53
 
#define ARIZONA_AOD_IRQ_MASK_IRQ2   0xD54
 
#define ARIZONA_AOD_IRQ_RAW_STATUS   0xD55
 
#define ARIZONA_JACK_DETECT_DEBOUNCE   0xD56
 
#define ARIZONA_FX_CTRL1   0xE00
 
#define ARIZONA_FX_CTRL2   0xE01
 
#define ARIZONA_EQ1_1   0xE10
 
#define ARIZONA_EQ1_2   0xE11
 
#define ARIZONA_EQ1_3   0xE12
 
#define ARIZONA_EQ1_4   0xE13
 
#define ARIZONA_EQ1_5   0xE14
 
#define ARIZONA_EQ1_6   0xE15
 
#define ARIZONA_EQ1_7   0xE16
 
#define ARIZONA_EQ1_8   0xE17
 
#define ARIZONA_EQ1_9   0xE18
 
#define ARIZONA_EQ1_10   0xE19
 
#define ARIZONA_EQ1_11   0xE1A
 
#define ARIZONA_EQ1_12   0xE1B
 
#define ARIZONA_EQ1_13   0xE1C
 
#define ARIZONA_EQ1_14   0xE1D
 
#define ARIZONA_EQ1_15   0xE1E
 
#define ARIZONA_EQ1_16   0xE1F
 
#define ARIZONA_EQ1_17   0xE20
 
#define ARIZONA_EQ1_18   0xE21
 
#define ARIZONA_EQ1_19   0xE22
 
#define ARIZONA_EQ1_20   0xE23
 
#define ARIZONA_EQ1_21   0xE24
 
#define ARIZONA_EQ2_1   0xE26
 
#define ARIZONA_EQ2_2   0xE27
 
#define ARIZONA_EQ2_3   0xE28
 
#define ARIZONA_EQ2_4   0xE29
 
#define ARIZONA_EQ2_5   0xE2A
 
#define ARIZONA_EQ2_6   0xE2B
 
#define ARIZONA_EQ2_7   0xE2C
 
#define ARIZONA_EQ2_8   0xE2D
 
#define ARIZONA_EQ2_9   0xE2E
 
#define ARIZONA_EQ2_10   0xE2F
 
#define ARIZONA_EQ2_11   0xE30
 
#define ARIZONA_EQ2_12   0xE31
 
#define ARIZONA_EQ2_13   0xE32
 
#define ARIZONA_EQ2_14   0xE33
 
#define ARIZONA_EQ2_15   0xE34
 
#define ARIZONA_EQ2_16   0xE35
 
#define ARIZONA_EQ2_17   0xE36
 
#define ARIZONA_EQ2_18   0xE37
 
#define ARIZONA_EQ2_19   0xE38
 
#define ARIZONA_EQ2_20   0xE39
 
#define ARIZONA_EQ2_21   0xE3A
 
#define ARIZONA_EQ3_1   0xE3C
 
#define ARIZONA_EQ3_2   0xE3D
 
#define ARIZONA_EQ3_3   0xE3E
 
#define ARIZONA_EQ3_4   0xE3F
 
#define ARIZONA_EQ3_5   0xE40
 
#define ARIZONA_EQ3_6   0xE41
 
#define ARIZONA_EQ3_7   0xE42
 
#define ARIZONA_EQ3_8   0xE43
 
#define ARIZONA_EQ3_9   0xE44
 
#define ARIZONA_EQ3_10   0xE45
 
#define ARIZONA_EQ3_11   0xE46
 
#define ARIZONA_EQ3_12   0xE47
 
#define ARIZONA_EQ3_13   0xE48
 
#define ARIZONA_EQ3_14   0xE49
 
#define ARIZONA_EQ3_15   0xE4A
 
#define ARIZONA_EQ3_16   0xE4B
 
#define ARIZONA_EQ3_17   0xE4C
 
#define ARIZONA_EQ3_18   0xE4D
 
#define ARIZONA_EQ3_19   0xE4E
 
#define ARIZONA_EQ3_20   0xE4F
 
#define ARIZONA_EQ3_21   0xE50
 
#define ARIZONA_EQ4_1   0xE52
 
#define ARIZONA_EQ4_2   0xE53
 
#define ARIZONA_EQ4_3   0xE54
 
#define ARIZONA_EQ4_4   0xE55
 
#define ARIZONA_EQ4_5   0xE56
 
#define ARIZONA_EQ4_6   0xE57
 
#define ARIZONA_EQ4_7   0xE58
 
#define ARIZONA_EQ4_8   0xE59
 
#define ARIZONA_EQ4_9   0xE5A
 
#define ARIZONA_EQ4_10   0xE5B
 
#define ARIZONA_EQ4_11   0xE5C
 
#define ARIZONA_EQ4_12   0xE5D
 
#define ARIZONA_EQ4_13   0xE5E
 
#define ARIZONA_EQ4_14   0xE5F
 
#define ARIZONA_EQ4_15   0xE60
 
#define ARIZONA_EQ4_16   0xE61
 
#define ARIZONA_EQ4_17   0xE62
 
#define ARIZONA_EQ4_18   0xE63
 
#define ARIZONA_EQ4_19   0xE64
 
#define ARIZONA_EQ4_20   0xE65
 
#define ARIZONA_EQ4_21   0xE66
 
#define ARIZONA_DRC1_CTRL1   0xE80
 
#define ARIZONA_DRC1_CTRL2   0xE81
 
#define ARIZONA_DRC1_CTRL3   0xE82
 
#define ARIZONA_DRC1_CTRL4   0xE83
 
#define ARIZONA_DRC1_CTRL5   0xE84
 
#define ARIZONA_DRC2_CTRL1   0xE89
 
#define ARIZONA_DRC2_CTRL2   0xE8A
 
#define ARIZONA_DRC2_CTRL3   0xE8B
 
#define ARIZONA_DRC2_CTRL4   0xE8C
 
#define ARIZONA_DRC2_CTRL5   0xE8D
 
#define ARIZONA_HPLPF1_1   0xEC0
 
#define ARIZONA_HPLPF1_2   0xEC1
 
#define ARIZONA_HPLPF2_1   0xEC4
 
#define ARIZONA_HPLPF2_2   0xEC5
 
#define ARIZONA_HPLPF3_1   0xEC8
 
#define ARIZONA_HPLPF3_2   0xEC9
 
#define ARIZONA_HPLPF4_1   0xECC
 
#define ARIZONA_HPLPF4_2   0xECD
 
#define ARIZONA_ASRC_ENABLE   0xEE0
 
#define ARIZONA_ASRC_STATUS   0xEE1
 
#define ARIZONA_ASRC_RATE1   0xEE2
 
#define ARIZONA_ASRC_RATE2   0xEE3
 
#define ARIZONA_ISRC_1_CTRL_1   0xEF0
 
#define ARIZONA_ISRC_1_CTRL_2   0xEF1
 
#define ARIZONA_ISRC_1_CTRL_3   0xEF2
 
#define ARIZONA_ISRC_2_CTRL_1   0xEF3
 
#define ARIZONA_ISRC_2_CTRL_2   0xEF4
 
#define ARIZONA_ISRC_2_CTRL_3   0xEF5
 
#define ARIZONA_ISRC_3_CTRL_1   0xEF6
 
#define ARIZONA_ISRC_3_CTRL_2   0xEF7
 
#define ARIZONA_ISRC_3_CTRL_3   0xEF8
 
#define ARIZONA_CLOCK_CONTROL   0xF00
 
#define ARIZONA_ANC_SRC   0xF01
 
#define ARIZONA_DSP_STATUS   0xF02
 
#define ARIZONA_DSP1_CONTROL_1   0x1100
 
#define ARIZONA_DSP1_CLOCKING_1   0x1101
 
#define ARIZONA_DSP1_STATUS_1   0x1104
 
#define ARIZONA_DSP1_STATUS_2   0x1105
 
#define ARIZONA_DSP2_CONTROL_1   0x1200
 
#define ARIZONA_DSP2_CLOCKING_1   0x1201
 
#define ARIZONA_DSP2_STATUS_1   0x1204
 
#define ARIZONA_DSP2_STATUS_2   0x1205
 
#define ARIZONA_DSP3_CONTROL_1   0x1300
 
#define ARIZONA_DSP3_CLOCKING_1   0x1301
 
#define ARIZONA_DSP3_STATUS_1   0x1304
 
#define ARIZONA_DSP3_STATUS_2   0x1305
 
#define ARIZONA_DSP4_CONTROL_1   0x1400
 
#define ARIZONA_DSP4_CLOCKING_1   0x1401
 
#define ARIZONA_DSP4_STATUS_1   0x1404
 
#define ARIZONA_DSP4_STATUS_2   0x1405
 
#define ARIZONA_SW_RST_DEV_ID1_MASK   0xFFFF /* SW_RST_DEV_ID1 - [15:0] */
 
#define ARIZONA_SW_RST_DEV_ID1_SHIFT   0 /* SW_RST_DEV_ID1 - [15:0] */
 
#define ARIZONA_SW_RST_DEV_ID1_WIDTH   16 /* SW_RST_DEV_ID1 - [15:0] */
 
#define ARIZONA_DEVICE_REVISION_MASK   0x00FF /* DEVICE_REVISION - [7:0] */
 
#define ARIZONA_DEVICE_REVISION_SHIFT   0 /* DEVICE_REVISION - [7:0] */
 
#define ARIZONA_DEVICE_REVISION_WIDTH   8 /* DEVICE_REVISION - [7:0] */
 
#define ARIZONA_SPI_CFG   0x0010 /* SPI_CFG */
 
#define ARIZONA_SPI_CFG_MASK   0x0010 /* SPI_CFG */
 
#define ARIZONA_SPI_CFG_SHIFT   4 /* SPI_CFG */
 
#define ARIZONA_SPI_CFG_WIDTH   1 /* SPI_CFG */
 
#define ARIZONA_SPI_4WIRE   0x0008 /* SPI_4WIRE */
 
#define ARIZONA_SPI_4WIRE_MASK   0x0008 /* SPI_4WIRE */
 
#define ARIZONA_SPI_4WIRE_SHIFT   3 /* SPI_4WIRE */
 
#define ARIZONA_SPI_4WIRE_WIDTH   1 /* SPI_4WIRE */
 
#define ARIZONA_SPI_AUTO_INC_MASK   0x0003 /* SPI_AUTO_INC - [1:0] */
 
#define ARIZONA_SPI_AUTO_INC_SHIFT   0 /* SPI_AUTO_INC - [1:0] */
 
#define ARIZONA_SPI_AUTO_INC_WIDTH   2 /* SPI_AUTO_INC - [1:0] */
 
#define ARIZONA_I2C1_AUTO_INC_MASK   0x0003 /* I2C1_AUTO_INC - [1:0] */
 
#define ARIZONA_I2C1_AUTO_INC_SHIFT   0 /* I2C1_AUTO_INC - [1:0] */
 
#define ARIZONA_I2C1_AUTO_INC_WIDTH   2 /* I2C1_AUTO_INC - [1:0] */
 
#define ARIZONA_I2C1_BUSY   0x0020 /* I2C1_BUSY */
 
#define ARIZONA_I2C1_BUSY_MASK   0x0020 /* I2C1_BUSY */
 
#define ARIZONA_I2C1_BUSY_SHIFT   5 /* I2C1_BUSY */
 
#define ARIZONA_I2C1_BUSY_WIDTH   1 /* I2C1_BUSY */
 
#define ARIZONA_SPI_BUSY   0x0010 /* SPI_BUSY */
 
#define ARIZONA_SPI_BUSY_MASK   0x0010 /* SPI_BUSY */
 
#define ARIZONA_SPI_BUSY_SHIFT   4 /* SPI_BUSY */
 
#define ARIZONA_SPI_BUSY_WIDTH   1 /* SPI_BUSY */
 
#define ARIZONA_WSEQ_ABORT   0x0800 /* WSEQ_ABORT */
 
#define ARIZONA_WSEQ_ABORT_MASK   0x0800 /* WSEQ_ABORT */
 
#define ARIZONA_WSEQ_ABORT_SHIFT   11 /* WSEQ_ABORT */
 
#define ARIZONA_WSEQ_ABORT_WIDTH   1 /* WSEQ_ABORT */
 
#define ARIZONA_WSEQ_START   0x0400 /* WSEQ_START */
 
#define ARIZONA_WSEQ_START_MASK   0x0400 /* WSEQ_START */
 
#define ARIZONA_WSEQ_START_SHIFT   10 /* WSEQ_START */
 
#define ARIZONA_WSEQ_START_WIDTH   1 /* WSEQ_START */
 
#define ARIZONA_WSEQ_ENA   0x0200 /* WSEQ_ENA */
 
#define ARIZONA_WSEQ_ENA_MASK   0x0200 /* WSEQ_ENA */
 
#define ARIZONA_WSEQ_ENA_SHIFT   9 /* WSEQ_ENA */
 
#define ARIZONA_WSEQ_ENA_WIDTH   1 /* WSEQ_ENA */
 
#define ARIZONA_WSEQ_START_INDEX_MASK   0x01FF /* WSEQ_START_INDEX - [8:0] */
 
#define ARIZONA_WSEQ_START_INDEX_SHIFT   0 /* WSEQ_START_INDEX - [8:0] */
 
#define ARIZONA_WSEQ_START_INDEX_WIDTH   9 /* WSEQ_START_INDEX - [8:0] */
 
#define ARIZONA_WSEQ_BUSY   0x0200 /* WSEQ_BUSY */
 
#define ARIZONA_WSEQ_BUSY_MASK   0x0200 /* WSEQ_BUSY */
 
#define ARIZONA_WSEQ_BUSY_SHIFT   9 /* WSEQ_BUSY */
 
#define ARIZONA_WSEQ_BUSY_WIDTH   1 /* WSEQ_BUSY */
 
#define ARIZONA_WSEQ_CURRENT_INDEX_MASK   0x01FF /* WSEQ_CURRENT_INDEX - [8:0] */
 
#define ARIZONA_WSEQ_CURRENT_INDEX_SHIFT   0 /* WSEQ_CURRENT_INDEX - [8:0] */
 
#define ARIZONA_WSEQ_CURRENT_INDEX_WIDTH   9 /* WSEQ_CURRENT_INDEX - [8:0] */
 
#define ARIZONA_LOAD_DEFAULTS   0x0002 /* LOAD_DEFAULTS */
 
#define ARIZONA_LOAD_DEFAULTS_MASK   0x0002 /* LOAD_DEFAULTS */
 
#define ARIZONA_LOAD_DEFAULTS_SHIFT   1 /* LOAD_DEFAULTS */
 
#define ARIZONA_LOAD_DEFAULTS_WIDTH   1 /* LOAD_DEFAULTS */
 
#define ARIZONA_WSEQ_LOAD_MEM   0x0001 /* WSEQ_LOAD_MEM */
 
#define ARIZONA_WSEQ_LOAD_MEM_MASK   0x0001 /* WSEQ_LOAD_MEM */
 
#define ARIZONA_WSEQ_LOAD_MEM_SHIFT   0 /* WSEQ_LOAD_MEM */
 
#define ARIZONA_WSEQ_LOAD_MEM_WIDTH   1 /* WSEQ_LOAD_MEM */
 
#define ARIZONA_WSEQ_OTP_WRITE   0x0001 /* WSEQ_OTP_WRITE */
 
#define ARIZONA_WSEQ_OTP_WRITE_MASK   0x0001 /* WSEQ_OTP_WRITE */
 
#define ARIZONA_WSEQ_OTP_WRITE_SHIFT   0 /* WSEQ_OTP_WRITE */
 
#define ARIZONA_WSEQ_OTP_WRITE_WIDTH   1 /* WSEQ_OTP_WRITE */
 
#define ARIZONA_TONE_RATE_MASK   0x7800 /* TONE_RATE - [14:11] */
 
#define ARIZONA_TONE_RATE_SHIFT   11 /* TONE_RATE - [14:11] */
 
#define ARIZONA_TONE_RATE_WIDTH   4 /* TONE_RATE - [14:11] */
 
#define ARIZONA_TONE_OFFSET_MASK   0x0300 /* TONE_OFFSET - [9:8] */
 
#define ARIZONA_TONE_OFFSET_SHIFT   8 /* TONE_OFFSET - [9:8] */
 
#define ARIZONA_TONE_OFFSET_WIDTH   2 /* TONE_OFFSET - [9:8] */
 
#define ARIZONA_TONE2_OVD   0x0020 /* TONE2_OVD */
 
#define ARIZONA_TONE2_OVD_MASK   0x0020 /* TONE2_OVD */
 
#define ARIZONA_TONE2_OVD_SHIFT   5 /* TONE2_OVD */
 
#define ARIZONA_TONE2_OVD_WIDTH   1 /* TONE2_OVD */
 
#define ARIZONA_TONE1_OVD   0x0010 /* TONE1_OVD */
 
#define ARIZONA_TONE1_OVD_MASK   0x0010 /* TONE1_OVD */
 
#define ARIZONA_TONE1_OVD_SHIFT   4 /* TONE1_OVD */
 
#define ARIZONA_TONE1_OVD_WIDTH   1 /* TONE1_OVD */
 
#define ARIZONA_TONE2_ENA   0x0002 /* TONE2_ENA */
 
#define ARIZONA_TONE2_ENA_MASK   0x0002 /* TONE2_ENA */
 
#define ARIZONA_TONE2_ENA_SHIFT   1 /* TONE2_ENA */
 
#define ARIZONA_TONE2_ENA_WIDTH   1 /* TONE2_ENA */
 
#define ARIZONA_TONE1_ENA   0x0001 /* TONE1_ENA */
 
#define ARIZONA_TONE1_ENA_MASK   0x0001 /* TONE1_ENA */
 
#define ARIZONA_TONE1_ENA_SHIFT   0 /* TONE1_ENA */
 
#define ARIZONA_TONE1_ENA_WIDTH   1 /* TONE1_ENA */
 
#define ARIZONA_TONE1_LVL_0_MASK   0xFFFF /* TONE1_LVL - [15:0] */
 
#define ARIZONA_TONE1_LVL_0_SHIFT   0 /* TONE1_LVL - [15:0] */
 
#define ARIZONA_TONE1_LVL_0_WIDTH   16 /* TONE1_LVL - [15:0] */
 
#define ARIZONA_TONE1_LVL_MASK   0x00FF /* TONE1_LVL - [7:0] */
 
#define ARIZONA_TONE1_LVL_SHIFT   0 /* TONE1_LVL - [7:0] */
 
#define ARIZONA_TONE1_LVL_WIDTH   8 /* TONE1_LVL - [7:0] */
 
#define ARIZONA_TONE2_LVL_0_MASK   0xFFFF /* TONE2_LVL - [15:0] */
 
#define ARIZONA_TONE2_LVL_0_SHIFT   0 /* TONE2_LVL - [15:0] */
 
#define ARIZONA_TONE2_LVL_0_WIDTH   16 /* TONE2_LVL - [15:0] */
 
#define ARIZONA_TONE2_LVL_MASK   0x00FF /* TONE2_LVL - [7:0] */
 
#define ARIZONA_TONE2_LVL_SHIFT   0 /* TONE2_LVL - [7:0] */
 
#define ARIZONA_TONE2_LVL_WIDTH   8 /* TONE2_LVL - [7:0] */
 
#define ARIZONA_PWM_RATE_MASK   0x7800 /* PWM_RATE - [14:11] */
 
#define ARIZONA_PWM_RATE_SHIFT   11 /* PWM_RATE - [14:11] */
 
#define ARIZONA_PWM_RATE_WIDTH   4 /* PWM_RATE - [14:11] */
 
#define ARIZONA_PWM_CLK_SEL_MASK   0x0700 /* PWM_CLK_SEL - [10:8] */
 
#define ARIZONA_PWM_CLK_SEL_SHIFT   8 /* PWM_CLK_SEL - [10:8] */
 
#define ARIZONA_PWM_CLK_SEL_WIDTH   3 /* PWM_CLK_SEL - [10:8] */
 
#define ARIZONA_PWM2_OVD   0x0020 /* PWM2_OVD */
 
#define ARIZONA_PWM2_OVD_MASK   0x0020 /* PWM2_OVD */
 
#define ARIZONA_PWM2_OVD_SHIFT   5 /* PWM2_OVD */
 
#define ARIZONA_PWM2_OVD_WIDTH   1 /* PWM2_OVD */
 
#define ARIZONA_PWM1_OVD   0x0010 /* PWM1_OVD */
 
#define ARIZONA_PWM1_OVD_MASK   0x0010 /* PWM1_OVD */
 
#define ARIZONA_PWM1_OVD_SHIFT   4 /* PWM1_OVD */
 
#define ARIZONA_PWM1_OVD_WIDTH   1 /* PWM1_OVD */
 
#define ARIZONA_PWM2_ENA   0x0002 /* PWM2_ENA */
 
#define ARIZONA_PWM2_ENA_MASK   0x0002 /* PWM2_ENA */
 
#define ARIZONA_PWM2_ENA_SHIFT   1 /* PWM2_ENA */
 
#define ARIZONA_PWM2_ENA_WIDTH   1 /* PWM2_ENA */
 
#define ARIZONA_PWM1_ENA   0x0001 /* PWM1_ENA */
 
#define ARIZONA_PWM1_ENA_MASK   0x0001 /* PWM1_ENA */
 
#define ARIZONA_PWM1_ENA_SHIFT   0 /* PWM1_ENA */
 
#define ARIZONA_PWM1_ENA_WIDTH   1 /* PWM1_ENA */
 
#define ARIZONA_PWM1_LVL_MASK   0x03FF /* PWM1_LVL - [9:0] */
 
#define ARIZONA_PWM1_LVL_SHIFT   0 /* PWM1_LVL - [9:0] */
 
#define ARIZONA_PWM1_LVL_WIDTH   10 /* PWM1_LVL - [9:0] */
 
#define ARIZONA_PWM2_LVL_MASK   0x03FF /* PWM2_LVL - [9:0] */
 
#define ARIZONA_PWM2_LVL_SHIFT   0 /* PWM2_LVL - [9:0] */
 
#define ARIZONA_PWM2_LVL_WIDTH   10 /* PWM2_LVL - [9:0] */
 
#define ARIZONA_WKUP_GP5_FALL   0x0020 /* WKUP_GP5_FALL */
 
#define ARIZONA_WKUP_GP5_FALL_MASK   0x0020 /* WKUP_GP5_FALL */
 
#define ARIZONA_WKUP_GP5_FALL_SHIFT   5 /* WKUP_GP5_FALL */
 
#define ARIZONA_WKUP_GP5_FALL_WIDTH   1 /* WKUP_GP5_FALL */
 
#define ARIZONA_WKUP_GP5_RISE   0x0010 /* WKUP_GP5_RISE */
 
#define ARIZONA_WKUP_GP5_RISE_MASK   0x0010 /* WKUP_GP5_RISE */
 
#define ARIZONA_WKUP_GP5_RISE_SHIFT   4 /* WKUP_GP5_RISE */
 
#define ARIZONA_WKUP_GP5_RISE_WIDTH   1 /* WKUP_GP5_RISE */
 
#define ARIZONA_WKUP_JD1_FALL   0x0008 /* WKUP_JD1_FALL */
 
#define ARIZONA_WKUP_JD1_FALL_MASK   0x0008 /* WKUP_JD1_FALL */
 
#define ARIZONA_WKUP_JD1_FALL_SHIFT   3 /* WKUP_JD1_FALL */
 
#define ARIZONA_WKUP_JD1_FALL_WIDTH   1 /* WKUP_JD1_FALL */
 
#define ARIZONA_WKUP_JD1_RISE   0x0004 /* WKUP_JD1_RISE */
 
#define ARIZONA_WKUP_JD1_RISE_MASK   0x0004 /* WKUP_JD1_RISE */
 
#define ARIZONA_WKUP_JD1_RISE_SHIFT   2 /* WKUP_JD1_RISE */
 
#define ARIZONA_WKUP_JD1_RISE_WIDTH   1 /* WKUP_JD1_RISE */
 
#define ARIZONA_WKUP_JD2_FALL   0x0002 /* WKUP_JD2_FALL */
 
#define ARIZONA_WKUP_JD2_FALL_MASK   0x0002 /* WKUP_JD2_FALL */
 
#define ARIZONA_WKUP_JD2_FALL_SHIFT   1 /* WKUP_JD2_FALL */
 
#define ARIZONA_WKUP_JD2_FALL_WIDTH   1 /* WKUP_JD2_FALL */
 
#define ARIZONA_WKUP_JD2_RISE   0x0001 /* WKUP_JD2_RISE */
 
#define ARIZONA_WKUP_JD2_RISE_MASK   0x0001 /* WKUP_JD2_RISE */
 
#define ARIZONA_WKUP_JD2_RISE_SHIFT   0 /* WKUP_JD2_RISE */
 
#define ARIZONA_WKUP_JD2_RISE_WIDTH   1 /* WKUP_JD2_RISE */
 
#define ARIZONA_WSEQ_ENA_GP5_FALL   0x0020 /* WSEQ_ENA_GP5_FALL */
 
#define ARIZONA_WSEQ_ENA_GP5_FALL_MASK   0x0020 /* WSEQ_ENA_GP5_FALL */
 
#define ARIZONA_WSEQ_ENA_GP5_FALL_SHIFT   5 /* WSEQ_ENA_GP5_FALL */
 
#define ARIZONA_WSEQ_ENA_GP5_FALL_WIDTH   1 /* WSEQ_ENA_GP5_FALL */
 
#define ARIZONA_WSEQ_ENA_GP5_RISE   0x0010 /* WSEQ_ENA_GP5_RISE */
 
#define ARIZONA_WSEQ_ENA_GP5_RISE_MASK   0x0010 /* WSEQ_ENA_GP5_RISE */
 
#define ARIZONA_WSEQ_ENA_GP5_RISE_SHIFT   4 /* WSEQ_ENA_GP5_RISE */
 
#define ARIZONA_WSEQ_ENA_GP5_RISE_WIDTH   1 /* WSEQ_ENA_GP5_RISE */
 
#define ARIZONA_WSEQ_ENA_JD1_FALL   0x0008 /* WSEQ_ENA_JD1_FALL */
 
#define ARIZONA_WSEQ_ENA_JD1_FALL_MASK   0x0008 /* WSEQ_ENA_JD1_FALL */
 
#define ARIZONA_WSEQ_ENA_JD1_FALL_SHIFT   3 /* WSEQ_ENA_JD1_FALL */
 
#define ARIZONA_WSEQ_ENA_JD1_FALL_WIDTH   1 /* WSEQ_ENA_JD1_FALL */
 
#define ARIZONA_WSEQ_ENA_JD1_RISE   0x0004 /* WSEQ_ENA_JD1_RISE */
 
#define ARIZONA_WSEQ_ENA_JD1_RISE_MASK   0x0004 /* WSEQ_ENA_JD1_RISE */
 
#define ARIZONA_WSEQ_ENA_JD1_RISE_SHIFT   2 /* WSEQ_ENA_JD1_RISE */
 
#define ARIZONA_WSEQ_ENA_JD1_RISE_WIDTH   1 /* WSEQ_ENA_JD1_RISE */
 
#define ARIZONA_WSEQ_ENA_JD2_FALL   0x0002 /* WSEQ_ENA_JD2_FALL */
 
#define ARIZONA_WSEQ_ENA_JD2_FALL_MASK   0x0002 /* WSEQ_ENA_JD2_FALL */
 
#define ARIZONA_WSEQ_ENA_JD2_FALL_SHIFT   1 /* WSEQ_ENA_JD2_FALL */
 
#define ARIZONA_WSEQ_ENA_JD2_FALL_WIDTH   1 /* WSEQ_ENA_JD2_FALL */
 
#define ARIZONA_WSEQ_ENA_JD2_RISE   0x0001 /* WSEQ_ENA_JD2_RISE */
 
#define ARIZONA_WSEQ_ENA_JD2_RISE_MASK   0x0001 /* WSEQ_ENA_JD2_RISE */
 
#define ARIZONA_WSEQ_ENA_JD2_RISE_SHIFT   0 /* WSEQ_ENA_JD2_RISE */
 
#define ARIZONA_WSEQ_ENA_JD2_RISE_WIDTH   1 /* WSEQ_ENA_JD2_RISE */
 
#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR_MASK   0x01FF /* WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR_SHIFT   0 /* WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR_WIDTH   9 /* WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR_MASK   0x01FF /* WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR_SHIFT   0 /* WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR_WIDTH   9 /* WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR_MASK   0x01FF /* WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR_SHIFT   0 /* WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR_WIDTH   9 /* WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR_MASK   0x01FF /* WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR_SHIFT   0 /* WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR_WIDTH   9 /* WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_GP5_RISE_SEQ_ADDR_MASK   0x01FF /* WSEQ_GP5_RISE_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_GP5_RISE_SEQ_ADDR_SHIFT   0 /* WSEQ_GP5_RISE_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_GP5_RISE_SEQ_ADDR_WIDTH   9 /* WSEQ_GP5_RISE_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_GP5_FALL_SEQ_ADDR_MASK   0x01FF /* WSEQ_GP5_FALL_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_GP5_FALL_SEQ_ADDR_SHIFT   0 /* WSEQ_GP5_FALL_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_GP5_FALL_SEQ_ADDR_WIDTH   9 /* WSEQ_GP5_FALL_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_JD1_RISE_SEQ_ADDR_MASK   0x01FF /* WSEQ_JD1_RISE_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_JD1_RISE_SEQ_ADDR_SHIFT   0 /* WSEQ_JD1_RISE_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_JD1_RISE_SEQ_ADDR_WIDTH   9 /* WSEQ_JD1_RISE_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_JD1_FALL_SEQ_ADDR_MASK   0x01FF /* WSEQ_JD1_FALL_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_JD1_FALL_SEQ_ADDR_SHIFT   0 /* WSEQ_JD1_FALL_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_JD1_FALL_SEQ_ADDR_WIDTH   9 /* WSEQ_JD1_FALL_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_JD2_RISE_SEQ_ADDR_MASK   0x01FF /* WSEQ_JD2_RISE_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_JD2_RISE_SEQ_ADDR_SHIFT   0 /* WSEQ_JD2_RISE_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_JD2_RISE_SEQ_ADDR_WIDTH   9 /* WSEQ_JD2_RISE_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_JD2_FALL_SEQ_ADDR_MASK   0x01FF /* WSEQ_JD2_FALL_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_JD2_FALL_SEQ_ADDR_SHIFT   0 /* WSEQ_JD2_FALL_SEQ_ADDR - [8:0] */
 
#define ARIZONA_WSEQ_JD2_FALL_SEQ_ADDR_WIDTH   9 /* WSEQ_JD2_FALL_SEQ_ADDR - [8:0] */
 
#define ARIZONA_NOISE_GEN_RATE_MASK   0x7800 /* NOISE_GEN_RATE - [14:11] */
 
#define ARIZONA_NOISE_GEN_RATE_SHIFT   11 /* NOISE_GEN_RATE - [14:11] */
 
#define ARIZONA_NOISE_GEN_RATE_WIDTH   4 /* NOISE_GEN_RATE - [14:11] */
 
#define ARIZONA_NOISE_GEN_ENA   0x0020 /* NOISE_GEN_ENA */
 
#define ARIZONA_NOISE_GEN_ENA_MASK   0x0020 /* NOISE_GEN_ENA */
 
#define ARIZONA_NOISE_GEN_ENA_SHIFT   5 /* NOISE_GEN_ENA */
 
#define ARIZONA_NOISE_GEN_ENA_WIDTH   1 /* NOISE_GEN_ENA */
 
#define ARIZONA_NOISE_GEN_GAIN_MASK   0x001F /* NOISE_GEN_GAIN - [4:0] */
 
#define ARIZONA_NOISE_GEN_GAIN_SHIFT   0 /* NOISE_GEN_GAIN - [4:0] */
 
#define ARIZONA_NOISE_GEN_GAIN_WIDTH   5 /* NOISE_GEN_GAIN - [4:0] */
 
#define ARIZONA_HAP_RATE_MASK   0x7800 /* HAP_RATE - [14:11] */
 
#define ARIZONA_HAP_RATE_SHIFT   11 /* HAP_RATE - [14:11] */
 
#define ARIZONA_HAP_RATE_WIDTH   4 /* HAP_RATE - [14:11] */
 
#define ARIZONA_ONESHOT_TRIG   0x0010 /* ONESHOT_TRIG */
 
#define ARIZONA_ONESHOT_TRIG_MASK   0x0010 /* ONESHOT_TRIG */
 
#define ARIZONA_ONESHOT_TRIG_SHIFT   4 /* ONESHOT_TRIG */
 
#define ARIZONA_ONESHOT_TRIG_WIDTH   1 /* ONESHOT_TRIG */
 
#define ARIZONA_HAP_CTRL_MASK   0x000C /* HAP_CTRL - [3:2] */
 
#define ARIZONA_HAP_CTRL_SHIFT   2 /* HAP_CTRL - [3:2] */
 
#define ARIZONA_HAP_CTRL_WIDTH   2 /* HAP_CTRL - [3:2] */
 
#define ARIZONA_HAP_ACT   0x0002 /* HAP_ACT */
 
#define ARIZONA_HAP_ACT_MASK   0x0002 /* HAP_ACT */
 
#define ARIZONA_HAP_ACT_SHIFT   1 /* HAP_ACT */
 
#define ARIZONA_HAP_ACT_WIDTH   1 /* HAP_ACT */
 
#define ARIZONA_LRA_FREQ_MASK   0x7FFF /* LRA_FREQ - [14:0] */
 
#define ARIZONA_LRA_FREQ_SHIFT   0 /* LRA_FREQ - [14:0] */
 
#define ARIZONA_LRA_FREQ_WIDTH   15 /* LRA_FREQ - [14:0] */
 
#define ARIZONA_PHASE1_INTENSITY_MASK   0x00FF /* PHASE1_INTENSITY - [7:0] */
 
#define ARIZONA_PHASE1_INTENSITY_SHIFT   0 /* PHASE1_INTENSITY - [7:0] */
 
#define ARIZONA_PHASE1_INTENSITY_WIDTH   8 /* PHASE1_INTENSITY - [7:0] */
 
#define ARIZONA_PHASE1_DURATION_MASK   0x01FF /* PHASE1_DURATION - [8:0] */
 
#define ARIZONA_PHASE1_DURATION_SHIFT   0 /* PHASE1_DURATION - [8:0] */
 
#define ARIZONA_PHASE1_DURATION_WIDTH   9 /* PHASE1_DURATION - [8:0] */
 
#define ARIZONA_PHASE2_INTENSITY_MASK   0x00FF /* PHASE2_INTENSITY - [7:0] */
 
#define ARIZONA_PHASE2_INTENSITY_SHIFT   0 /* PHASE2_INTENSITY - [7:0] */
 
#define ARIZONA_PHASE2_INTENSITY_WIDTH   8 /* PHASE2_INTENSITY - [7:0] */
 
#define ARIZONA_PHASE2_DURATION_MASK   0x07FF /* PHASE2_DURATION - [10:0] */
 
#define ARIZONA_PHASE2_DURATION_SHIFT   0 /* PHASE2_DURATION - [10:0] */
 
#define ARIZONA_PHASE2_DURATION_WIDTH   11 /* PHASE2_DURATION - [10:0] */
 
#define ARIZONA_PHASE3_INTENSITY_MASK   0x00FF /* PHASE3_INTENSITY - [7:0] */
 
#define ARIZONA_PHASE3_INTENSITY_SHIFT   0 /* PHASE3_INTENSITY - [7:0] */
 
#define ARIZONA_PHASE3_INTENSITY_WIDTH   8 /* PHASE3_INTENSITY - [7:0] */
 
#define ARIZONA_PHASE3_DURATION_MASK   0x01FF /* PHASE3_DURATION - [8:0] */
 
#define ARIZONA_PHASE3_DURATION_SHIFT   0 /* PHASE3_DURATION - [8:0] */
 
#define ARIZONA_PHASE3_DURATION_WIDTH   9 /* PHASE3_DURATION - [8:0] */
 
#define ARIZONA_ONESHOT_STS   0x0001 /* ONESHOT_STS */
 
#define ARIZONA_ONESHOT_STS_MASK   0x0001 /* ONESHOT_STS */
 
#define ARIZONA_ONESHOT_STS_SHIFT   0 /* ONESHOT_STS */
 
#define ARIZONA_ONESHOT_STS_WIDTH   1 /* ONESHOT_STS */
 
#define ARIZONA_CLK_32K_ENA   0x0040 /* CLK_32K_ENA */
 
#define ARIZONA_CLK_32K_ENA_MASK   0x0040 /* CLK_32K_ENA */
 
#define ARIZONA_CLK_32K_ENA_SHIFT   6 /* CLK_32K_ENA */
 
#define ARIZONA_CLK_32K_ENA_WIDTH   1 /* CLK_32K_ENA */
 
#define ARIZONA_CLK_32K_SRC_MASK   0x0003 /* CLK_32K_SRC - [1:0] */
 
#define ARIZONA_CLK_32K_SRC_SHIFT   0 /* CLK_32K_SRC - [1:0] */
 
#define ARIZONA_CLK_32K_SRC_WIDTH   2 /* CLK_32K_SRC - [1:0] */
 
#define ARIZONA_SYSCLK_FRAC   0x8000 /* SYSCLK_FRAC */
 
#define ARIZONA_SYSCLK_FRAC_MASK   0x8000 /* SYSCLK_FRAC */
 
#define ARIZONA_SYSCLK_FRAC_SHIFT   15 /* SYSCLK_FRAC */
 
#define ARIZONA_SYSCLK_FRAC_WIDTH   1 /* SYSCLK_FRAC */
 
#define ARIZONA_SYSCLK_FREQ_MASK   0x0700 /* SYSCLK_FREQ - [10:8] */
 
#define ARIZONA_SYSCLK_FREQ_SHIFT   8 /* SYSCLK_FREQ - [10:8] */
 
#define ARIZONA_SYSCLK_FREQ_WIDTH   3 /* SYSCLK_FREQ - [10:8] */
 
#define ARIZONA_SYSCLK_ENA   0x0040 /* SYSCLK_ENA */
 
#define ARIZONA_SYSCLK_ENA_MASK   0x0040 /* SYSCLK_ENA */
 
#define ARIZONA_SYSCLK_ENA_SHIFT   6 /* SYSCLK_ENA */
 
#define ARIZONA_SYSCLK_ENA_WIDTH   1 /* SYSCLK_ENA */
 
#define ARIZONA_SYSCLK_SRC_MASK   0x000F /* SYSCLK_SRC - [3:0] */
 
#define ARIZONA_SYSCLK_SRC_SHIFT   0 /* SYSCLK_SRC - [3:0] */
 
#define ARIZONA_SYSCLK_SRC_WIDTH   4 /* SYSCLK_SRC - [3:0] */
 
#define ARIZONA_SAMPLE_RATE_1_MASK   0x001F /* SAMPLE_RATE_1 - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_1_SHIFT   0 /* SAMPLE_RATE_1 - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_1_WIDTH   5 /* SAMPLE_RATE_1 - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_2_MASK   0x001F /* SAMPLE_RATE_2 - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_2_SHIFT   0 /* SAMPLE_RATE_2 - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_2_WIDTH   5 /* SAMPLE_RATE_2 - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_3_MASK   0x001F /* SAMPLE_RATE_3 - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_3_SHIFT   0 /* SAMPLE_RATE_3 - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_3_WIDTH   5 /* SAMPLE_RATE_3 - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_1_STS_MASK   0x001F /* SAMPLE_RATE_1_STS - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_1_STS_SHIFT   0 /* SAMPLE_RATE_1_STS - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_1_STS_WIDTH   5 /* SAMPLE_RATE_1_STS - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_2_STS_MASK   0x001F /* SAMPLE_RATE_2_STS - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_2_STS_SHIFT   0 /* SAMPLE_RATE_2_STS - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_2_STS_WIDTH   5 /* SAMPLE_RATE_2_STS - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_3_STS_MASK   0x001F /* SAMPLE_RATE_3_STS - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_3_STS_SHIFT   0 /* SAMPLE_RATE_3_STS - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_3_STS_WIDTH   5 /* SAMPLE_RATE_3_STS - [4:0] */
 
#define ARIZONA_ASYNC_CLK_FREQ_MASK   0x0700 /* ASYNC_CLK_FREQ - [10:8] */
 
#define ARIZONA_ASYNC_CLK_FREQ_SHIFT   8 /* ASYNC_CLK_FREQ - [10:8] */
 
#define ARIZONA_ASYNC_CLK_FREQ_WIDTH   3 /* ASYNC_CLK_FREQ - [10:8] */
 
#define ARIZONA_ASYNC_CLK_ENA   0x0040 /* ASYNC_CLK_ENA */
 
#define ARIZONA_ASYNC_CLK_ENA_MASK   0x0040 /* ASYNC_CLK_ENA */
 
#define ARIZONA_ASYNC_CLK_ENA_SHIFT   6 /* ASYNC_CLK_ENA */
 
#define ARIZONA_ASYNC_CLK_ENA_WIDTH   1 /* ASYNC_CLK_ENA */
 
#define ARIZONA_ASYNC_CLK_SRC_MASK   0x000F /* ASYNC_CLK_SRC - [3:0] */
 
#define ARIZONA_ASYNC_CLK_SRC_SHIFT   0 /* ASYNC_CLK_SRC - [3:0] */
 
#define ARIZONA_ASYNC_CLK_SRC_WIDTH   4 /* ASYNC_CLK_SRC - [3:0] */
 
#define ARIZONA_ASYNC_SAMPLE_RATE_MASK   0x001F /* ASYNC_SAMPLE_RATE - [4:0] */
 
#define ARIZONA_ASYNC_SAMPLE_RATE_SHIFT   0 /* ASYNC_SAMPLE_RATE - [4:0] */
 
#define ARIZONA_ASYNC_SAMPLE_RATE_WIDTH   5 /* ASYNC_SAMPLE_RATE - [4:0] */
 
#define ARIZONA_ASYNC_SAMPLE_RATE_STS_MASK   0x001F /* ASYNC_SAMPLE_RATE_STS - [4:0] */
 
#define ARIZONA_ASYNC_SAMPLE_RATE_STS_SHIFT   0 /* ASYNC_SAMPLE_RATE_STS - [4:0] */
 
#define ARIZONA_ASYNC_SAMPLE_RATE_STS_WIDTH   5 /* ASYNC_SAMPLE_RATE_STS - [4:0] */
 
#define ARIZONA_OPCLK_ENA   0x8000 /* OPCLK_ENA */
 
#define ARIZONA_OPCLK_ENA_MASK   0x8000 /* OPCLK_ENA */
 
#define ARIZONA_OPCLK_ENA_SHIFT   15 /* OPCLK_ENA */
 
#define ARIZONA_OPCLK_ENA_WIDTH   1 /* OPCLK_ENA */
 
#define ARIZONA_OPCLK_DIV_MASK   0x00F8 /* OPCLK_DIV - [7:3] */
 
#define ARIZONA_OPCLK_DIV_SHIFT   3 /* OPCLK_DIV - [7:3] */
 
#define ARIZONA_OPCLK_DIV_WIDTH   5 /* OPCLK_DIV - [7:3] */
 
#define ARIZONA_OPCLK_SEL_MASK   0x0007 /* OPCLK_SEL - [2:0] */
 
#define ARIZONA_OPCLK_SEL_SHIFT   0 /* OPCLK_SEL - [2:0] */
 
#define ARIZONA_OPCLK_SEL_WIDTH   3 /* OPCLK_SEL - [2:0] */
 
#define ARIZONA_OPCLK_ASYNC_ENA   0x8000 /* OPCLK_ASYNC_ENA */
 
#define ARIZONA_OPCLK_ASYNC_ENA_MASK   0x8000 /* OPCLK_ASYNC_ENA */
 
#define ARIZONA_OPCLK_ASYNC_ENA_SHIFT   15 /* OPCLK_ASYNC_ENA */
 
#define ARIZONA_OPCLK_ASYNC_ENA_WIDTH   1 /* OPCLK_ASYNC_ENA */
 
#define ARIZONA_OPCLK_ASYNC_DIV_MASK   0x00F8 /* OPCLK_ASYNC_DIV - [7:3] */
 
#define ARIZONA_OPCLK_ASYNC_DIV_SHIFT   3 /* OPCLK_ASYNC_DIV - [7:3] */
 
#define ARIZONA_OPCLK_ASYNC_DIV_WIDTH   5 /* OPCLK_ASYNC_DIV - [7:3] */
 
#define ARIZONA_OPCLK_ASYNC_SEL_MASK   0x0007 /* OPCLK_ASYNC_SEL - [2:0] */
 
#define ARIZONA_OPCLK_ASYNC_SEL_SHIFT   0 /* OPCLK_ASYNC_SEL - [2:0] */
 
#define ARIZONA_OPCLK_ASYNC_SEL_WIDTH   3 /* OPCLK_ASYNC_SEL - [2:0] */
 
#define ARIZONA_TRIG_ON_STARTUP   0x0010 /* TRIG_ON_STARTUP */
 
#define ARIZONA_TRIG_ON_STARTUP_MASK   0x0010 /* TRIG_ON_STARTUP */
 
#define ARIZONA_TRIG_ON_STARTUP_SHIFT   4 /* TRIG_ON_STARTUP */
 
#define ARIZONA_TRIG_ON_STARTUP_WIDTH   1 /* TRIG_ON_STARTUP */
 
#define ARIZONA_LRCLK_SRC_MASK   0x000E /* LRCLK_SRC - [3:1] */
 
#define ARIZONA_LRCLK_SRC_SHIFT   1 /* LRCLK_SRC - [3:1] */
 
#define ARIZONA_LRCLK_SRC_WIDTH   3 /* LRCLK_SRC - [3:1] */
 
#define ARIZONA_RATE_EST_ENA   0x0001 /* RATE_EST_ENA */
 
#define ARIZONA_RATE_EST_ENA_MASK   0x0001 /* RATE_EST_ENA */
 
#define ARIZONA_RATE_EST_ENA_SHIFT   0 /* RATE_EST_ENA */
 
#define ARIZONA_RATE_EST_ENA_WIDTH   1 /* RATE_EST_ENA */
 
#define ARIZONA_SAMPLE_RATE_DETECT_A_MASK   0x001F /* SAMPLE_RATE_DETECT_A - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_DETECT_A_SHIFT   0 /* SAMPLE_RATE_DETECT_A - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_DETECT_A_WIDTH   5 /* SAMPLE_RATE_DETECT_A - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_DETECT_B_MASK   0x001F /* SAMPLE_RATE_DETECT_B - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_DETECT_B_SHIFT   0 /* SAMPLE_RATE_DETECT_B - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_DETECT_B_WIDTH   5 /* SAMPLE_RATE_DETECT_B - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_DETECT_C_MASK   0x001F /* SAMPLE_RATE_DETECT_C - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_DETECT_C_SHIFT   0 /* SAMPLE_RATE_DETECT_C - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_DETECT_C_WIDTH   5 /* SAMPLE_RATE_DETECT_C - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_DETECT_D_MASK   0x001F /* SAMPLE_RATE_DETECT_D - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_DETECT_D_SHIFT   0 /* SAMPLE_RATE_DETECT_D - [4:0] */
 
#define ARIZONA_SAMPLE_RATE_DETECT_D_WIDTH   5 /* SAMPLE_RATE_DETECT_D - [4:0] */
 
#define ARIZONA_FLL1_FREERUN   0x0002 /* FLL1_FREERUN */
 
#define ARIZONA_FLL1_FREERUN_MASK   0x0002 /* FLL1_FREERUN */
 
#define ARIZONA_FLL1_FREERUN_SHIFT   1 /* FLL1_FREERUN */
 
#define ARIZONA_FLL1_FREERUN_WIDTH   1 /* FLL1_FREERUN */
 
#define ARIZONA_FLL1_ENA   0x0001 /* FLL1_ENA */
 
#define ARIZONA_FLL1_ENA_MASK   0x0001 /* FLL1_ENA */
 
#define ARIZONA_FLL1_ENA_SHIFT   0 /* FLL1_ENA */
 
#define ARIZONA_FLL1_ENA_WIDTH   1 /* FLL1_ENA */
 
#define ARIZONA_FLL1_CTRL_UPD   0x8000 /* FLL1_CTRL_UPD */
 
#define ARIZONA_FLL1_CTRL_UPD_MASK   0x8000 /* FLL1_CTRL_UPD */
 
#define ARIZONA_FLL1_CTRL_UPD_SHIFT   15 /* FLL1_CTRL_UPD */
 
#define ARIZONA_FLL1_CTRL_UPD_WIDTH   1 /* FLL1_CTRL_UPD */
 
#define ARIZONA_FLL1_N_MASK   0x03FF /* FLL1_N - [9:0] */
 
#define ARIZONA_FLL1_N_SHIFT   0 /* FLL1_N - [9:0] */
 
#define ARIZONA_FLL1_N_WIDTH   10 /* FLL1_N - [9:0] */
 
#define ARIZONA_FLL1_THETA_MASK   0xFFFF /* FLL1_THETA - [15:0] */
 
#define ARIZONA_FLL1_THETA_SHIFT   0 /* FLL1_THETA - [15:0] */
 
#define ARIZONA_FLL1_THETA_WIDTH   16 /* FLL1_THETA - [15:0] */
 
#define ARIZONA_FLL1_LAMBDA_MASK   0xFFFF /* FLL1_LAMBDA - [15:0] */
 
#define ARIZONA_FLL1_LAMBDA_SHIFT   0 /* FLL1_LAMBDA - [15:0] */
 
#define ARIZONA_FLL1_LAMBDA_WIDTH   16 /* FLL1_LAMBDA - [15:0] */
 
#define ARIZONA_FLL1_FRATIO_MASK   0x0700 /* FLL1_FRATIO - [10:8] */
 
#define ARIZONA_FLL1_FRATIO_SHIFT   8 /* FLL1_FRATIO - [10:8] */
 
#define ARIZONA_FLL1_FRATIO_WIDTH   3 /* FLL1_FRATIO - [10:8] */
 
#define ARIZONA_FLL1_OUTDIV_MASK   0x000E /* FLL1_OUTDIV - [3:1] */
 
#define ARIZONA_FLL1_OUTDIV_SHIFT   1 /* FLL1_OUTDIV - [3:1] */
 
#define ARIZONA_FLL1_OUTDIV_WIDTH   3 /* FLL1_OUTDIV - [3:1] */
 
#define ARIZONA_FLL1_CLK_REF_DIV_MASK   0x00C0 /* FLL1_CLK_REF_DIV - [7:6] */
 
#define ARIZONA_FLL1_CLK_REF_DIV_SHIFT   6 /* FLL1_CLK_REF_DIV - [7:6] */
 
#define ARIZONA_FLL1_CLK_REF_DIV_WIDTH   2 /* FLL1_CLK_REF_DIV - [7:6] */
 
#define ARIZONA_FLL1_CLK_REF_SRC_MASK   0x000F /* FLL1_CLK_REF_SRC - [3:0] */
 
#define ARIZONA_FLL1_CLK_REF_SRC_SHIFT   0 /* FLL1_CLK_REF_SRC - [3:0] */
 
#define ARIZONA_FLL1_CLK_REF_SRC_WIDTH   4 /* FLL1_CLK_REF_SRC - [3:0] */
 
#define ARIZONA_FLL1_FRC_INTEG_UPD   0x8000 /* FLL1_FRC_INTEG_UPD */
 
#define ARIZONA_FLL1_FRC_INTEG_UPD_MASK   0x8000 /* FLL1_FRC_INTEG_UPD */
 
#define ARIZONA_FLL1_FRC_INTEG_UPD_SHIFT   15 /* FLL1_FRC_INTEG_UPD */
 
#define ARIZONA_FLL1_FRC_INTEG_UPD_WIDTH   1 /* FLL1_FRC_INTEG_UPD */
 
#define ARIZONA_FLL1_FRC_INTEG_VAL_MASK   0x0FFF /* FLL1_FRC_INTEG_VAL - [11:0] */
 
#define ARIZONA_FLL1_FRC_INTEG_VAL_SHIFT   0 /* FLL1_FRC_INTEG_VAL - [11:0] */
 
#define ARIZONA_FLL1_FRC_INTEG_VAL_WIDTH   12 /* FLL1_FRC_INTEG_VAL - [11:0] */
 
#define ARIZONA_FLL1_SYNC_ENA   0x0001 /* FLL1_SYNC_ENA */
 
#define ARIZONA_FLL1_SYNC_ENA_MASK   0x0001 /* FLL1_SYNC_ENA */
 
#define ARIZONA_FLL1_SYNC_ENA_SHIFT   0 /* FLL1_SYNC_ENA */
 
#define ARIZONA_FLL1_SYNC_ENA_WIDTH   1 /* FLL1_SYNC_ENA */
 
#define ARIZONA_FLL1_SYNC_N_MASK   0x03FF /* FLL1_SYNC_N - [9:0] */
 
#define ARIZONA_FLL1_SYNC_N_SHIFT   0 /* FLL1_SYNC_N - [9:0] */
 
#define ARIZONA_FLL1_SYNC_N_WIDTH   10 /* FLL1_SYNC_N - [9:0] */
 
#define ARIZONA_FLL1_SYNC_THETA_MASK   0xFFFF /* FLL1_SYNC_THETA - [15:0] */
 
#define ARIZONA_FLL1_SYNC_THETA_SHIFT   0 /* FLL1_SYNC_THETA - [15:0] */
 
#define ARIZONA_FLL1_SYNC_THETA_WIDTH   16 /* FLL1_SYNC_THETA - [15:0] */
 
#define ARIZONA_FLL1_SYNC_LAMBDA_MASK   0xFFFF /* FLL1_SYNC_LAMBDA - [15:0] */
 
#define ARIZONA_FLL1_SYNC_LAMBDA_SHIFT   0 /* FLL1_SYNC_LAMBDA - [15:0] */
 
#define ARIZONA_FLL1_SYNC_LAMBDA_WIDTH   16 /* FLL1_SYNC_LAMBDA - [15:0] */
 
#define ARIZONA_FLL1_SYNC_FRATIO_MASK   0x0700 /* FLL1_SYNC_FRATIO - [10:8] */
 
#define ARIZONA_FLL1_SYNC_FRATIO_SHIFT   8 /* FLL1_SYNC_FRATIO - [10:8] */
 
#define ARIZONA_FLL1_SYNC_FRATIO_WIDTH   3 /* FLL1_SYNC_FRATIO - [10:8] */
 
#define ARIZONA_FLL1_CLK_SYNC_DIV_MASK   0x00C0 /* FLL1_CLK_SYNC_DIV - [7:6] */
 
#define ARIZONA_FLL1_CLK_SYNC_DIV_SHIFT   6 /* FLL1_CLK_SYNC_DIV - [7:6] */
 
#define ARIZONA_FLL1_CLK_SYNC_DIV_WIDTH   2 /* FLL1_CLK_SYNC_DIV - [7:6] */
 
#define ARIZONA_FLL1_CLK_SYNC_SRC_MASK   0x000F /* FLL1_CLK_SYNC_SRC - [3:0] */
 
#define ARIZONA_FLL1_CLK_SYNC_SRC_SHIFT   0 /* FLL1_CLK_SYNC_SRC - [3:0] */
 
#define ARIZONA_FLL1_CLK_SYNC_SRC_WIDTH   4 /* FLL1_CLK_SYNC_SRC - [3:0] */
 
#define ARIZONA_FLL1_SS_AMPL_MASK   0x0030 /* FLL1_SS_AMPL - [5:4] */
 
#define ARIZONA_FLL1_SS_AMPL_SHIFT   4 /* FLL1_SS_AMPL - [5:4] */
 
#define ARIZONA_FLL1_SS_AMPL_WIDTH   2 /* FLL1_SS_AMPL - [5:4] */
 
#define ARIZONA_FLL1_SS_FREQ_MASK   0x000C /* FLL1_SS_FREQ - [3:2] */
 
#define ARIZONA_FLL1_SS_FREQ_SHIFT   2 /* FLL1_SS_FREQ - [3:2] */
 
#define ARIZONA_FLL1_SS_FREQ_WIDTH   2 /* FLL1_SS_FREQ - [3:2] */
 
#define ARIZONA_FLL1_SS_SEL_MASK   0x0003 /* FLL1_SS_SEL - [1:0] */
 
#define ARIZONA_FLL1_SS_SEL_SHIFT   0 /* FLL1_SS_SEL - [1:0] */
 
#define ARIZONA_FLL1_SS_SEL_WIDTH   2 /* FLL1_SS_SEL - [1:0] */
 
#define ARIZONA_FLL1_GPDIV_MASK   0x00FE /* FLL1_GPDIV - [7:1] */
 
#define ARIZONA_FLL1_GPDIV_SHIFT   1 /* FLL1_GPDIV - [7:1] */
 
#define ARIZONA_FLL1_GPDIV_WIDTH   7 /* FLL1_GPDIV - [7:1] */
 
#define ARIZONA_FLL1_GPDIV_ENA   0x0001 /* FLL1_GPDIV_ENA */
 
#define ARIZONA_FLL1_GPDIV_ENA_MASK   0x0001 /* FLL1_GPDIV_ENA */
 
#define ARIZONA_FLL1_GPDIV_ENA_SHIFT   0 /* FLL1_GPDIV_ENA */
 
#define ARIZONA_FLL1_GPDIV_ENA_WIDTH   1 /* FLL1_GPDIV_ENA */
 
#define ARIZONA_FLL2_FREERUN   0x0002 /* FLL2_FREERUN */
 
#define ARIZONA_FLL2_FREERUN_MASK   0x0002 /* FLL2_FREERUN */
 
#define ARIZONA_FLL2_FREERUN_SHIFT   1 /* FLL2_FREERUN */
 
#define ARIZONA_FLL2_FREERUN_WIDTH   1 /* FLL2_FREERUN */
 
#define ARIZONA_FLL2_ENA   0x0001 /* FLL2_ENA */
 
#define ARIZONA_FLL2_ENA_MASK   0x0001 /* FLL2_ENA */
 
#define ARIZONA_FLL2_ENA_SHIFT   0 /* FLL2_ENA */
 
#define ARIZONA_FLL2_ENA_WIDTH   1 /* FLL2_ENA */
 
#define ARIZONA_FLL2_CTRL_UPD   0x8000 /* FLL2_CTRL_UPD */
 
#define ARIZONA_FLL2_CTRL_UPD_MASK   0x8000 /* FLL2_CTRL_UPD */
 
#define ARIZONA_FLL2_CTRL_UPD_SHIFT   15 /* FLL2_CTRL_UPD */
 
#define ARIZONA_FLL2_CTRL_UPD_WIDTH   1 /* FLL2_CTRL_UPD */
 
#define ARIZONA_FLL2_N_MASK   0x03FF /* FLL2_N - [9:0] */
 
#define ARIZONA_FLL2_N_SHIFT   0 /* FLL2_N - [9:0] */
 
#define ARIZONA_FLL2_N_WIDTH   10 /* FLL2_N - [9:0] */
 
#define ARIZONA_FLL2_THETA_MASK   0xFFFF /* FLL2_THETA - [15:0] */
 
#define ARIZONA_FLL2_THETA_SHIFT   0 /* FLL2_THETA - [15:0] */
 
#define ARIZONA_FLL2_THETA_WIDTH   16 /* FLL2_THETA - [15:0] */
 
#define ARIZONA_FLL2_LAMBDA_MASK   0xFFFF /* FLL2_LAMBDA - [15:0] */
 
#define ARIZONA_FLL2_LAMBDA_SHIFT   0 /* FLL2_LAMBDA - [15:0] */
 
#define ARIZONA_FLL2_LAMBDA_WIDTH   16 /* FLL2_LAMBDA - [15:0] */
 
#define ARIZONA_FLL2_FRATIO_MASK   0x0700 /* FLL2_FRATIO - [10:8] */
 
#define ARIZONA_FLL2_FRATIO_SHIFT   8 /* FLL2_FRATIO - [10:8] */
 
#define ARIZONA_FLL2_FRATIO_WIDTH   3 /* FLL2_FRATIO - [10:8] */
 
#define ARIZONA_FLL2_OUTDIV_MASK   0x000E /* FLL2_OUTDIV - [3:1] */
 
#define ARIZONA_FLL2_OUTDIV_SHIFT   1 /* FLL2_OUTDIV - [3:1] */
 
#define ARIZONA_FLL2_OUTDIV_WIDTH   3 /* FLL2_OUTDIV - [3:1] */
 
#define ARIZONA_FLL2_CLK_REF_DIV_MASK   0x00C0 /* FLL2_CLK_REF_DIV - [7:6] */
 
#define ARIZONA_FLL2_CLK_REF_DIV_SHIFT   6 /* FLL2_CLK_REF_DIV - [7:6] */
 
#define ARIZONA_FLL2_CLK_REF_DIV_WIDTH   2 /* FLL2_CLK_REF_DIV - [7:6] */
 
#define ARIZONA_FLL2_CLK_REF_SRC_MASK   0x000F /* FLL2_CLK_REF_SRC - [3:0] */
 
#define ARIZONA_FLL2_CLK_REF_SRC_SHIFT   0 /* FLL2_CLK_REF_SRC - [3:0] */
 
#define ARIZONA_FLL2_CLK_REF_SRC_WIDTH   4 /* FLL2_CLK_REF_SRC - [3:0] */
 
#define ARIZONA_FLL2_FRC_INTEG_UPD   0x8000 /* FLL2_FRC_INTEG_UPD */
 
#define ARIZONA_FLL2_FRC_INTEG_UPD_MASK   0x8000 /* FLL2_FRC_INTEG_UPD */
 
#define ARIZONA_FLL2_FRC_INTEG_UPD_SHIFT   15 /* FLL2_FRC_INTEG_UPD */
 
#define ARIZONA_FLL2_FRC_INTEG_UPD_WIDTH   1 /* FLL2_FRC_INTEG_UPD */
 
#define ARIZONA_FLL2_FRC_INTEG_VAL_MASK   0x0FFF /* FLL2_FRC_INTEG_VAL - [11:0] */
 
#define ARIZONA_FLL2_FRC_INTEG_VAL_SHIFT   0 /* FLL2_FRC_INTEG_VAL - [11:0] */
 
#define ARIZONA_FLL2_FRC_INTEG_VAL_WIDTH   12 /* FLL2_FRC_INTEG_VAL - [11:0] */
 
#define ARIZONA_FLL2_SYNC_ENA   0x0001 /* FLL2_SYNC_ENA */
 
#define ARIZONA_FLL2_SYNC_ENA_MASK   0x0001 /* FLL2_SYNC_ENA */
 
#define ARIZONA_FLL2_SYNC_ENA_SHIFT   0 /* FLL2_SYNC_ENA */
 
#define ARIZONA_FLL2_SYNC_ENA_WIDTH   1 /* FLL2_SYNC_ENA */
 
#define ARIZONA_FLL2_SYNC_N_MASK   0x03FF /* FLL2_SYNC_N - [9:0] */
 
#define ARIZONA_FLL2_SYNC_N_SHIFT   0 /* FLL2_SYNC_N - [9:0] */
 
#define ARIZONA_FLL2_SYNC_N_WIDTH   10 /* FLL2_SYNC_N - [9:0] */
 
#define ARIZONA_FLL2_SYNC_THETA_MASK   0xFFFF /* FLL2_SYNC_THETA - [15:0] */
 
#define ARIZONA_FLL2_SYNC_THETA_SHIFT   0 /* FLL2_SYNC_THETA - [15:0] */
 
#define ARIZONA_FLL2_SYNC_THETA_WIDTH   16 /* FLL2_SYNC_THETA - [15:0] */
 
#define ARIZONA_FLL2_SYNC_LAMBDA_MASK   0xFFFF /* FLL2_SYNC_LAMBDA - [15:0] */
 
#define ARIZONA_FLL2_SYNC_LAMBDA_SHIFT   0 /* FLL2_SYNC_LAMBDA - [15:0] */
 
#define ARIZONA_FLL2_SYNC_LAMBDA_WIDTH   16 /* FLL2_SYNC_LAMBDA - [15:0] */
 
#define ARIZONA_FLL2_SYNC_FRATIO_MASK   0x0700 /* FLL2_SYNC_FRATIO - [10:8] */
 
#define ARIZONA_FLL2_SYNC_FRATIO_SHIFT   8 /* FLL2_SYNC_FRATIO - [10:8] */
 
#define ARIZONA_FLL2_SYNC_FRATIO_WIDTH   3 /* FLL2_SYNC_FRATIO - [10:8] */
 
#define ARIZONA_FLL2_CLK_SYNC_DIV_MASK   0x00C0 /* FLL2_CLK_SYNC_DIV - [7:6] */
 
#define ARIZONA_FLL2_CLK_SYNC_DIV_SHIFT   6 /* FLL2_CLK_SYNC_DIV - [7:6] */
 
#define ARIZONA_FLL2_CLK_SYNC_DIV_WIDTH   2 /* FLL2_CLK_SYNC_DIV - [7:6] */
 
#define ARIZONA_FLL2_CLK_SYNC_SRC_MASK   0x000F /* FLL2_CLK_SYNC_SRC - [3:0] */
 
#define ARIZONA_FLL2_CLK_SYNC_SRC_SHIFT   0 /* FLL2_CLK_SYNC_SRC - [3:0] */
 
#define ARIZONA_FLL2_CLK_SYNC_SRC_WIDTH   4 /* FLL2_CLK_SYNC_SRC - [3:0] */
 
#define ARIZONA_FLL2_SS_AMPL_MASK   0x0030 /* FLL2_SS_AMPL - [5:4] */
 
#define ARIZONA_FLL2_SS_AMPL_SHIFT   4 /* FLL2_SS_AMPL - [5:4] */
 
#define ARIZONA_FLL2_SS_AMPL_WIDTH   2 /* FLL2_SS_AMPL - [5:4] */
 
#define ARIZONA_FLL2_SS_FREQ_MASK   0x000C /* FLL2_SS_FREQ - [3:2] */
 
#define ARIZONA_FLL2_SS_FREQ_SHIFT   2 /* FLL2_SS_FREQ - [3:2] */
 
#define ARIZONA_FLL2_SS_FREQ_WIDTH   2 /* FLL2_SS_FREQ - [3:2] */
 
#define ARIZONA_FLL2_SS_SEL_MASK   0x0003 /* FLL2_SS_SEL - [1:0] */
 
#define ARIZONA_FLL2_SS_SEL_SHIFT   0 /* FLL2_SS_SEL - [1:0] */
 
#define ARIZONA_FLL2_SS_SEL_WIDTH   2 /* FLL2_SS_SEL - [1:0] */
 
#define ARIZONA_FLL2_GPDIV_MASK   0x00FE /* FLL2_GPDIV - [7:1] */
 
#define ARIZONA_FLL2_GPDIV_SHIFT   1 /* FLL2_GPDIV - [7:1] */
 
#define ARIZONA_FLL2_GPDIV_WIDTH   7 /* FLL2_GPDIV - [7:1] */
 
#define ARIZONA_FLL2_GPDIV_ENA   0x0001 /* FLL2_GPDIV_ENA */
 
#define ARIZONA_FLL2_GPDIV_ENA_MASK   0x0001 /* FLL2_GPDIV_ENA */
 
#define ARIZONA_FLL2_GPDIV_ENA_SHIFT   0 /* FLL2_GPDIV_ENA */
 
#define ARIZONA_FLL2_GPDIV_ENA_WIDTH   1 /* FLL2_GPDIV_ENA */
 
#define ARIZONA_CPMIC_DISCH   0x0004 /* CPMIC_DISCH */
 
#define ARIZONA_CPMIC_DISCH_MASK   0x0004 /* CPMIC_DISCH */
 
#define ARIZONA_CPMIC_DISCH_SHIFT   2 /* CPMIC_DISCH */
 
#define ARIZONA_CPMIC_DISCH_WIDTH   1 /* CPMIC_DISCH */
 
#define ARIZONA_CPMIC_BYPASS   0x0002 /* CPMIC_BYPASS */
 
#define ARIZONA_CPMIC_BYPASS_MASK   0x0002 /* CPMIC_BYPASS */
 
#define ARIZONA_CPMIC_BYPASS_SHIFT   1 /* CPMIC_BYPASS */
 
#define ARIZONA_CPMIC_BYPASS_WIDTH   1 /* CPMIC_BYPASS */
 
#define ARIZONA_CPMIC_ENA   0x0001 /* CPMIC_ENA */
 
#define ARIZONA_CPMIC_ENA_MASK   0x0001 /* CPMIC_ENA */
 
#define ARIZONA_CPMIC_ENA_SHIFT   0 /* CPMIC_ENA */
 
#define ARIZONA_CPMIC_ENA_WIDTH   1 /* CPMIC_ENA */
 
#define ARIZONA_LDO1_VSEL_MASK   0x07E0 /* LDO1_VSEL - [10:5] */
 
#define ARIZONA_LDO1_VSEL_SHIFT   5 /* LDO1_VSEL - [10:5] */
 
#define ARIZONA_LDO1_VSEL_WIDTH   6 /* LDO1_VSEL - [10:5] */
 
#define ARIZONA_LDO1_FAST   0x0010 /* LDO1_FAST */
 
#define ARIZONA_LDO1_FAST_MASK   0x0010 /* LDO1_FAST */
 
#define ARIZONA_LDO1_FAST_SHIFT   4 /* LDO1_FAST */
 
#define ARIZONA_LDO1_FAST_WIDTH   1 /* LDO1_FAST */
 
#define ARIZONA_LDO1_DISCH   0x0004 /* LDO1_DISCH */
 
#define ARIZONA_LDO1_DISCH_MASK   0x0004 /* LDO1_DISCH */
 
#define ARIZONA_LDO1_DISCH_SHIFT   2 /* LDO1_DISCH */
 
#define ARIZONA_LDO1_DISCH_WIDTH   1 /* LDO1_DISCH */
 
#define ARIZONA_LDO1_BYPASS   0x0002 /* LDO1_BYPASS */
 
#define ARIZONA_LDO1_BYPASS_MASK   0x0002 /* LDO1_BYPASS */
 
#define ARIZONA_LDO1_BYPASS_SHIFT   1 /* LDO1_BYPASS */
 
#define ARIZONA_LDO1_BYPASS_WIDTH   1 /* LDO1_BYPASS */
 
#define ARIZONA_LDO1_ENA   0x0001 /* LDO1_ENA */
 
#define ARIZONA_LDO1_ENA_MASK   0x0001 /* LDO1_ENA */
 
#define ARIZONA_LDO1_ENA_SHIFT   0 /* LDO1_ENA */
 
#define ARIZONA_LDO1_ENA_WIDTH   1 /* LDO1_ENA */
 
#define ARIZONA_LDO2_VSEL_MASK   0x07E0 /* LDO2_VSEL - [10:5] */
 
#define ARIZONA_LDO2_VSEL_SHIFT   5 /* LDO2_VSEL - [10:5] */
 
#define ARIZONA_LDO2_VSEL_WIDTH   6 /* LDO2_VSEL - [10:5] */
 
#define ARIZONA_LDO2_FAST   0x0010 /* LDO2_FAST */
 
#define ARIZONA_LDO2_FAST_MASK   0x0010 /* LDO2_FAST */
 
#define ARIZONA_LDO2_FAST_SHIFT   4 /* LDO2_FAST */
 
#define ARIZONA_LDO2_FAST_WIDTH   1 /* LDO2_FAST */
 
#define ARIZONA_LDO2_DISCH   0x0004 /* LDO2_DISCH */
 
#define ARIZONA_LDO2_DISCH_MASK   0x0004 /* LDO2_DISCH */
 
#define ARIZONA_LDO2_DISCH_SHIFT   2 /* LDO2_DISCH */
 
#define ARIZONA_LDO2_DISCH_WIDTH   1 /* LDO2_DISCH */
 
#define ARIZONA_LDO2_BYPASS   0x0002 /* LDO2_BYPASS */
 
#define ARIZONA_LDO2_BYPASS_MASK   0x0002 /* LDO2_BYPASS */
 
#define ARIZONA_LDO2_BYPASS_SHIFT   1 /* LDO2_BYPASS */
 
#define ARIZONA_LDO2_BYPASS_WIDTH   1 /* LDO2_BYPASS */
 
#define ARIZONA_LDO2_ENA   0x0001 /* LDO2_ENA */
 
#define ARIZONA_LDO2_ENA_MASK   0x0001 /* LDO2_ENA */
 
#define ARIZONA_LDO2_ENA_SHIFT   0 /* LDO2_ENA */
 
#define ARIZONA_LDO2_ENA_WIDTH   1 /* LDO2_ENA */
 
#define ARIZONA_MICB1_EXT_CAP   0x8000 /* MICB1_EXT_CAP */
 
#define ARIZONA_MICB1_EXT_CAP_MASK   0x8000 /* MICB1_EXT_CAP */
 
#define ARIZONA_MICB1_EXT_CAP_SHIFT   15 /* MICB1_EXT_CAP */
 
#define ARIZONA_MICB1_EXT_CAP_WIDTH   1 /* MICB1_EXT_CAP */
 
#define ARIZONA_MICB1_LVL_MASK   0x01E0 /* MICB1_LVL - [8:5] */
 
#define ARIZONA_MICB1_LVL_SHIFT   5 /* MICB1_LVL - [8:5] */
 
#define ARIZONA_MICB1_LVL_WIDTH   4 /* MICB1_LVL - [8:5] */
 
#define ARIZONA_MICB1_FAST   0x0010 /* MICB1_FAST */
 
#define ARIZONA_MICB1_FAST_MASK   0x0010 /* MICB1_FAST */
 
#define ARIZONA_MICB1_FAST_SHIFT   4 /* MICB1_FAST */
 
#define ARIZONA_MICB1_FAST_WIDTH   1 /* MICB1_FAST */
 
#define ARIZONA_MICB1_RATE   0x0008 /* MICB1_RATE */
 
#define ARIZONA_MICB1_RATE_MASK   0x0008 /* MICB1_RATE */
 
#define ARIZONA_MICB1_RATE_SHIFT   3 /* MICB1_RATE */
 
#define ARIZONA_MICB1_RATE_WIDTH   1 /* MICB1_RATE */
 
#define ARIZONA_MICB1_DISCH   0x0004 /* MICB1_DISCH */
 
#define ARIZONA_MICB1_DISCH_MASK   0x0004 /* MICB1_DISCH */
 
#define ARIZONA_MICB1_DISCH_SHIFT   2 /* MICB1_DISCH */
 
#define ARIZONA_MICB1_DISCH_WIDTH   1 /* MICB1_DISCH */
 
#define ARIZONA_MICB1_BYPASS   0x0002 /* MICB1_BYPASS */
 
#define ARIZONA_MICB1_BYPASS_MASK   0x0002 /* MICB1_BYPASS */
 
#define ARIZONA_MICB1_BYPASS_SHIFT   1 /* MICB1_BYPASS */
 
#define ARIZONA_MICB1_BYPASS_WIDTH   1 /* MICB1_BYPASS */
 
#define ARIZONA_MICB1_ENA   0x0001 /* MICB1_ENA */
 
#define ARIZONA_MICB1_ENA_MASK   0x0001 /* MICB1_ENA */
 
#define ARIZONA_MICB1_ENA_SHIFT   0 /* MICB1_ENA */
 
#define ARIZONA_MICB1_ENA_WIDTH   1 /* MICB1_ENA */
 
#define ARIZONA_MICB2_EXT_CAP   0x8000 /* MICB2_EXT_CAP */
 
#define ARIZONA_MICB2_EXT_CAP_MASK   0x8000 /* MICB2_EXT_CAP */
 
#define ARIZONA_MICB2_EXT_CAP_SHIFT   15 /* MICB2_EXT_CAP */
 
#define ARIZONA_MICB2_EXT_CAP_WIDTH   1 /* MICB2_EXT_CAP */
 
#define ARIZONA_MICB2_LVL_MASK   0x01E0 /* MICB2_LVL - [8:5] */
 
#define ARIZONA_MICB2_LVL_SHIFT   5 /* MICB2_LVL - [8:5] */
 
#define ARIZONA_MICB2_LVL_WIDTH   4 /* MICB2_LVL - [8:5] */
 
#define ARIZONA_MICB2_FAST   0x0010 /* MICB2_FAST */
 
#define ARIZONA_MICB2_FAST_MASK   0x0010 /* MICB2_FAST */
 
#define ARIZONA_MICB2_FAST_SHIFT   4 /* MICB2_FAST */
 
#define ARIZONA_MICB2_FAST_WIDTH   1 /* MICB2_FAST */
 
#define ARIZONA_MICB2_RATE   0x0008 /* MICB2_RATE */
 
#define ARIZONA_MICB2_RATE_MASK   0x0008 /* MICB2_RATE */
 
#define ARIZONA_MICB2_RATE_SHIFT   3 /* MICB2_RATE */
 
#define ARIZONA_MICB2_RATE_WIDTH   1 /* MICB2_RATE */
 
#define ARIZONA_MICB2_DISCH   0x0004 /* MICB2_DISCH */
 
#define ARIZONA_MICB2_DISCH_MASK   0x0004 /* MICB2_DISCH */
 
#define ARIZONA_MICB2_DISCH_SHIFT   2 /* MICB2_DISCH */
 
#define ARIZONA_MICB2_DISCH_WIDTH   1 /* MICB2_DISCH */
 
#define ARIZONA_MICB2_BYPASS   0x0002 /* MICB2_BYPASS */
 
#define ARIZONA_MICB2_BYPASS_MASK   0x0002 /* MICB2_BYPASS */
 
#define ARIZONA_MICB2_BYPASS_SHIFT   1 /* MICB2_BYPASS */
 
#define ARIZONA_MICB2_BYPASS_WIDTH   1 /* MICB2_BYPASS */
 
#define ARIZONA_MICB2_ENA   0x0001 /* MICB2_ENA */
 
#define ARIZONA_MICB2_ENA_MASK   0x0001 /* MICB2_ENA */
 
#define ARIZONA_MICB2_ENA_SHIFT   0 /* MICB2_ENA */
 
#define ARIZONA_MICB2_ENA_WIDTH   1 /* MICB2_ENA */
 
#define ARIZONA_MICB3_EXT_CAP   0x8000 /* MICB3_EXT_CAP */
 
#define ARIZONA_MICB3_EXT_CAP_MASK   0x8000 /* MICB3_EXT_CAP */
 
#define ARIZONA_MICB3_EXT_CAP_SHIFT   15 /* MICB3_EXT_CAP */
 
#define ARIZONA_MICB3_EXT_CAP_WIDTH   1 /* MICB3_EXT_CAP */
 
#define ARIZONA_MICB3_LVL_MASK   0x01E0 /* MICB3_LVL - [8:5] */
 
#define ARIZONA_MICB3_LVL_SHIFT   5 /* MICB3_LVL - [8:5] */
 
#define ARIZONA_MICB3_LVL_WIDTH   4 /* MICB3_LVL - [8:5] */
 
#define ARIZONA_MICB3_FAST   0x0010 /* MICB3_FAST */
 
#define ARIZONA_MICB3_FAST_MASK   0x0010 /* MICB3_FAST */
 
#define ARIZONA_MICB3_FAST_SHIFT   4 /* MICB3_FAST */
 
#define ARIZONA_MICB3_FAST_WIDTH   1 /* MICB3_FAST */
 
#define ARIZONA_MICB3_RATE   0x0008 /* MICB3_RATE */
 
#define ARIZONA_MICB3_RATE_MASK   0x0008 /* MICB3_RATE */
 
#define ARIZONA_MICB3_RATE_SHIFT   3 /* MICB3_RATE */
 
#define ARIZONA_MICB3_RATE_WIDTH   1 /* MICB3_RATE */
 
#define ARIZONA_MICB3_DISCH   0x0004 /* MICB3_DISCH */
 
#define ARIZONA_MICB3_DISCH_MASK   0x0004 /* MICB3_DISCH */
 
#define ARIZONA_MICB3_DISCH_SHIFT   2 /* MICB3_DISCH */
 
#define ARIZONA_MICB3_DISCH_WIDTH   1 /* MICB3_DISCH */
 
#define ARIZONA_MICB3_BYPASS   0x0002 /* MICB3_BYPASS */
 
#define ARIZONA_MICB3_BYPASS_MASK   0x0002 /* MICB3_BYPASS */
 
#define ARIZONA_MICB3_BYPASS_SHIFT   1 /* MICB3_BYPASS */
 
#define ARIZONA_MICB3_BYPASS_WIDTH   1 /* MICB3_BYPASS */
 
#define ARIZONA_MICB3_ENA   0x0001 /* MICB3_ENA */
 
#define ARIZONA_MICB3_ENA_MASK   0x0001 /* MICB3_ENA */
 
#define ARIZONA_MICB3_ENA_SHIFT   0 /* MICB3_ENA */
 
#define ARIZONA_MICB3_ENA_WIDTH   1 /* MICB3_ENA */
 
#define ARIZONA_ACCDET_SRC   0x2000 /* ACCDET_SRC */
 
#define ARIZONA_ACCDET_SRC_MASK   0x2000 /* ACCDET_SRC */
 
#define ARIZONA_ACCDET_SRC_SHIFT   13 /* ACCDET_SRC */
 
#define ARIZONA_ACCDET_SRC_WIDTH   1 /* ACCDET_SRC */
 
#define ARIZONA_ACCDET_MODE_MASK   0x0003 /* ACCDET_MODE - [1:0] */
 
#define ARIZONA_ACCDET_MODE_SHIFT   0 /* ACCDET_MODE - [1:0] */
 
#define ARIZONA_ACCDET_MODE_WIDTH   2 /* ACCDET_MODE - [1:0] */
 
#define ARIZONA_HP_STEP_SIZE   0x0100 /* HP_STEP_SIZE */
 
#define ARIZONA_HP_STEP_SIZE_MASK   0x0100 /* HP_STEP_SIZE */
 
#define ARIZONA_HP_STEP_SIZE_SHIFT   8 /* HP_STEP_SIZE */
 
#define ARIZONA_HP_STEP_SIZE_WIDTH   1 /* HP_STEP_SIZE */
 
#define ARIZONA_HP_HOLDTIME_MASK   0x00E0 /* HP_HOLDTIME - [7:5] */
 
#define ARIZONA_HP_HOLDTIME_SHIFT   5 /* HP_HOLDTIME - [7:5] */
 
#define ARIZONA_HP_HOLDTIME_WIDTH   3 /* HP_HOLDTIME - [7:5] */
 
#define ARIZONA_HP_CLK_DIV_MASK   0x0018 /* HP_CLK_DIV - [4:3] */
 
#define ARIZONA_HP_CLK_DIV_SHIFT   3 /* HP_CLK_DIV - [4:3] */
 
#define ARIZONA_HP_CLK_DIV_WIDTH   2 /* HP_CLK_DIV - [4:3] */
 
#define ARIZONA_HP_IDAC_STEER   0x0004 /* HP_IDAC_STEER */
 
#define ARIZONA_HP_IDAC_STEER_MASK   0x0004 /* HP_IDAC_STEER */
 
#define ARIZONA_HP_IDAC_STEER_SHIFT   2 /* HP_IDAC_STEER */
 
#define ARIZONA_HP_IDAC_STEER_WIDTH   1 /* HP_IDAC_STEER */
 
#define ARIZONA_HP_RATE   0x0002 /* HP_RATE */
 
#define ARIZONA_HP_RATE_MASK   0x0002 /* HP_RATE */
 
#define ARIZONA_HP_RATE_SHIFT   1 /* HP_RATE */
 
#define ARIZONA_HP_RATE_WIDTH   1 /* HP_RATE */
 
#define ARIZONA_HP_POLL   0x0001 /* HP_POLL */
 
#define ARIZONA_HP_POLL_MASK   0x0001 /* HP_POLL */
 
#define ARIZONA_HP_POLL_SHIFT   0 /* HP_POLL */
 
#define ARIZONA_HP_POLL_WIDTH   1 /* HP_POLL */
 
#define ARIZONA_HP_DONE   0x0080 /* HP_DONE */
 
#define ARIZONA_HP_DONE_MASK   0x0080 /* HP_DONE */
 
#define ARIZONA_HP_DONE_SHIFT   7 /* HP_DONE */
 
#define ARIZONA_HP_DONE_WIDTH   1 /* HP_DONE */
 
#define ARIZONA_HP_LVL_MASK   0x007F /* HP_LVL - [6:0] */
 
#define ARIZONA_HP_LVL_SHIFT   0 /* HP_LVL - [6:0] */
 
#define ARIZONA_HP_LVL_WIDTH   7 /* HP_LVL - [6:0] */
 
#define ARIZONA_MICD_BIAS_STARTTIME_MASK   0xF000 /* MICD_BIAS_STARTTIME - [15:12] */
 
#define ARIZONA_MICD_BIAS_STARTTIME_SHIFT   12 /* MICD_BIAS_STARTTIME - [15:12] */
 
#define ARIZONA_MICD_BIAS_STARTTIME_WIDTH   4 /* MICD_BIAS_STARTTIME - [15:12] */
 
#define ARIZONA_MICD_RATE_MASK   0x0F00 /* MICD_RATE - [11:8] */
 
#define ARIZONA_MICD_RATE_SHIFT   8 /* MICD_RATE - [11:8] */
 
#define ARIZONA_MICD_RATE_WIDTH   4 /* MICD_RATE - [11:8] */
 
#define ARIZONA_MICD_BIAS_SRC_MASK   0x0030 /* MICD_BIAS_SRC - [5:4] */
 
#define ARIZONA_MICD_BIAS_SRC_SHIFT   4 /* MICD_BIAS_SRC - [5:4] */
 
#define ARIZONA_MICD_BIAS_SRC_WIDTH   2 /* MICD_BIAS_SRC - [5:4] */
 
#define ARIZONA_MICD_DBTIME   0x0002 /* MICD_DBTIME */
 
#define ARIZONA_MICD_DBTIME_MASK   0x0002 /* MICD_DBTIME */
 
#define ARIZONA_MICD_DBTIME_SHIFT   1 /* MICD_DBTIME */
 
#define ARIZONA_MICD_DBTIME_WIDTH   1 /* MICD_DBTIME */
 
#define ARIZONA_MICD_ENA   0x0001 /* MICD_ENA */
 
#define ARIZONA_MICD_ENA_MASK   0x0001 /* MICD_ENA */
 
#define ARIZONA_MICD_ENA_SHIFT   0 /* MICD_ENA */
 
#define ARIZONA_MICD_ENA_WIDTH   1 /* MICD_ENA */
 
#define ARIZONA_MICD_LVL_SEL_MASK   0x00FF /* MICD_LVL_SEL - [7:0] */
 
#define ARIZONA_MICD_LVL_SEL_SHIFT   0 /* MICD_LVL_SEL - [7:0] */
 
#define ARIZONA_MICD_LVL_SEL_WIDTH   8 /* MICD_LVL_SEL - [7:0] */
 
#define ARIZONA_MICD_LVL_MASK   0x07FC /* MICD_LVL - [10:2] */
 
#define ARIZONA_MICD_LVL_SHIFT   2 /* MICD_LVL - [10:2] */
 
#define ARIZONA_MICD_LVL_WIDTH   9 /* MICD_LVL - [10:2] */
 
#define ARIZONA_MICD_VALID   0x0002 /* MICD_VALID */
 
#define ARIZONA_MICD_VALID_MASK   0x0002 /* MICD_VALID */
 
#define ARIZONA_MICD_VALID_SHIFT   1 /* MICD_VALID */
 
#define ARIZONA_MICD_VALID_WIDTH   1 /* MICD_VALID */
 
#define ARIZONA_MICD_STS   0x0001 /* MICD_STS */
 
#define ARIZONA_MICD_STS_MASK   0x0001 /* MICD_STS */
 
#define ARIZONA_MICD_STS_SHIFT   0 /* MICD_STS */
 
#define ARIZONA_MICD_STS_WIDTH   1 /* MICD_STS */
 
#define ARIZONA_MICMUTE_RATE_MASK   0x7800 /* MICMUTE_RATE - [14:11] */
 
#define ARIZONA_MICMUTE_RATE_SHIFT   11 /* MICMUTE_RATE - [14:11] */
 
#define ARIZONA_MICMUTE_RATE_WIDTH   4 /* MICMUTE_RATE - [14:11] */
 
#define ARIZONA_MICMUTE_MIX_ENA   0x0040 /* MICMUTE_MIX_ENA */
 
#define ARIZONA_MICMUTE_MIX_ENA_MASK   0x0040 /* MICMUTE_MIX_ENA */
 
#define ARIZONA_MICMUTE_MIX_ENA_SHIFT   6 /* MICMUTE_MIX_ENA */
 
#define ARIZONA_MICMUTE_MIX_ENA_WIDTH   1 /* MICMUTE_MIX_ENA */
 
#define ARIZONA_ISOLATE_DCVDD1   0x0001 /* ISOLATE_DCVDD1 */
 
#define ARIZONA_ISOLATE_DCVDD1_MASK   0x0001 /* ISOLATE_DCVDD1 */
 
#define ARIZONA_ISOLATE_DCVDD1_SHIFT   0 /* ISOLATE_DCVDD1 */
 
#define ARIZONA_ISOLATE_DCVDD1_WIDTH   1 /* ISOLATE_DCVDD1 */
 
#define ARIZONA_JD2_ENA   0x0002 /* JD2_ENA */
 
#define ARIZONA_JD2_ENA_MASK   0x0002 /* JD2_ENA */
 
#define ARIZONA_JD2_ENA_SHIFT   1 /* JD2_ENA */
 
#define ARIZONA_JD2_ENA_WIDTH   1 /* JD2_ENA */
 
#define ARIZONA_JD1_ENA   0x0001 /* JD1_ENA */
 
#define ARIZONA_JD1_ENA_MASK   0x0001 /* JD1_ENA */
 
#define ARIZONA_JD1_ENA_SHIFT   0 /* JD1_ENA */
 
#define ARIZONA_JD1_ENA_WIDTH   1 /* JD1_ENA */
 
#define ARIZONA_IN4L_ENA   0x0080 /* IN4L_ENA */
 
#define ARIZONA_IN4L_ENA_MASK   0x0080 /* IN4L_ENA */
 
#define ARIZONA_IN4L_ENA_SHIFT   7 /* IN4L_ENA */
 
#define ARIZONA_IN4L_ENA_WIDTH   1 /* IN4L_ENA */
 
#define ARIZONA_IN4R_ENA   0x0040 /* IN4R_ENA */
 
#define ARIZONA_IN4R_ENA_MASK   0x0040 /* IN4R_ENA */
 
#define ARIZONA_IN4R_ENA_SHIFT   6 /* IN4R_ENA */
 
#define ARIZONA_IN4R_ENA_WIDTH   1 /* IN4R_ENA */
 
#define ARIZONA_IN3L_ENA   0x0020 /* IN3L_ENA */
 
#define ARIZONA_IN3L_ENA_MASK   0x0020 /* IN3L_ENA */
 
#define ARIZONA_IN3L_ENA_SHIFT   5 /* IN3L_ENA */
 
#define ARIZONA_IN3L_ENA_WIDTH   1 /* IN3L_ENA */
 
#define ARIZONA_IN3R_ENA   0x0010 /* IN3R_ENA */
 
#define ARIZONA_IN3R_ENA_MASK   0x0010 /* IN3R_ENA */
 
#define ARIZONA_IN3R_ENA_SHIFT   4 /* IN3R_ENA */
 
#define ARIZONA_IN3R_ENA_WIDTH   1 /* IN3R_ENA */
 
#define ARIZONA_IN2L_ENA   0x0008 /* IN2L_ENA */
 
#define ARIZONA_IN2L_ENA_MASK   0x0008 /* IN2L_ENA */
 
#define ARIZONA_IN2L_ENA_SHIFT   3 /* IN2L_ENA */
 
#define ARIZONA_IN2L_ENA_WIDTH   1 /* IN2L_ENA */
 
#define ARIZONA_IN2R_ENA   0x0004 /* IN2R_ENA */
 
#define ARIZONA_IN2R_ENA_MASK   0x0004 /* IN2R_ENA */
 
#define ARIZONA_IN2R_ENA_SHIFT   2 /* IN2R_ENA */
 
#define ARIZONA_IN2R_ENA_WIDTH   1 /* IN2R_ENA */
 
#define ARIZONA_IN1L_ENA   0x0002 /* IN1L_ENA */
 
#define ARIZONA_IN1L_ENA_MASK   0x0002 /* IN1L_ENA */
 
#define ARIZONA_IN1L_ENA_SHIFT   1 /* IN1L_ENA */
 
#define ARIZONA_IN1L_ENA_WIDTH   1 /* IN1L_ENA */
 
#define ARIZONA_IN1R_ENA   0x0001 /* IN1R_ENA */
 
#define ARIZONA_IN1R_ENA_MASK   0x0001 /* IN1R_ENA */
 
#define ARIZONA_IN1R_ENA_SHIFT   0 /* IN1R_ENA */
 
#define ARIZONA_IN1R_ENA_WIDTH   1 /* IN1R_ENA */
 
#define ARIZONA_IN_RATE_MASK   0x7800 /* IN_RATE - [14:11] */
 
#define ARIZONA_IN_RATE_SHIFT   11 /* IN_RATE - [14:11] */
 
#define ARIZONA_IN_RATE_WIDTH   4 /* IN_RATE - [14:11] */
 
#define ARIZONA_IN_VD_RAMP_MASK   0x0070 /* IN_VD_RAMP - [6:4] */
 
#define ARIZONA_IN_VD_RAMP_SHIFT   4 /* IN_VD_RAMP - [6:4] */
 
#define ARIZONA_IN_VD_RAMP_WIDTH   3 /* IN_VD_RAMP - [6:4] */
 
#define ARIZONA_IN_VI_RAMP_MASK   0x0007 /* IN_VI_RAMP - [2:0] */
 
#define ARIZONA_IN_VI_RAMP_SHIFT   0 /* IN_VI_RAMP - [2:0] */
 
#define ARIZONA_IN_VI_RAMP_WIDTH   3 /* IN_VI_RAMP - [2:0] */
 
#define ARIZONA_IN1_OSR_MASK   0x6000 /* IN1_OSR - [14:13] */
 
#define ARIZONA_IN1_OSR_SHIFT   13 /* IN1_OSR - [14:13] */
 
#define ARIZONA_IN1_OSR_WIDTH   2 /* IN1_OSR - [14:13] */
 
#define ARIZONA_IN1_DMIC_SUP_MASK   0x1800 /* IN1_DMIC_SUP - [12:11] */
 
#define ARIZONA_IN1_DMIC_SUP_SHIFT   11 /* IN1_DMIC_SUP - [12:11] */
 
#define ARIZONA_IN1_DMIC_SUP_WIDTH   2 /* IN1_DMIC_SUP - [12:11] */
 
#define ARIZONA_IN1_MODE_MASK   0x0600 /* IN1_MODE - [10:9] */
 
#define ARIZONA_IN1_MODE_SHIFT   9 /* IN1_MODE - [10:9] */
 
#define ARIZONA_IN1_MODE_WIDTH   2 /* IN1_MODE - [10:9] */
 
#define ARIZONA_IN1L_PGA_VOL_MASK   0x00FE /* IN1L_PGA_VOL - [7:1] */
 
#define ARIZONA_IN1L_PGA_VOL_SHIFT   1 /* IN1L_PGA_VOL - [7:1] */
 
#define ARIZONA_IN1L_PGA_VOL_WIDTH   7 /* IN1L_PGA_VOL - [7:1] */
 
#define ARIZONA_IN_VU   0x0200 /* IN_VU */
 
#define ARIZONA_IN_VU_MASK   0x0200 /* IN_VU */
 
#define ARIZONA_IN_VU_SHIFT   9 /* IN_VU */
 
#define ARIZONA_IN_VU_WIDTH   1 /* IN_VU */
 
#define ARIZONA_IN1L_MUTE   0x0100 /* IN1L_MUTE */
 
#define ARIZONA_IN1L_MUTE_MASK   0x0100 /* IN1L_MUTE */
 
#define ARIZONA_IN1L_MUTE_SHIFT   8 /* IN1L_MUTE */
 
#define ARIZONA_IN1L_MUTE_WIDTH   1 /* IN1L_MUTE */
 
#define ARIZONA_IN1L_DIG_VOL_MASK   0x00FF /* IN1L_DIG_VOL - [7:0] */
 
#define ARIZONA_IN1L_DIG_VOL_SHIFT   0 /* IN1L_DIG_VOL - [7:0] */
 
#define ARIZONA_IN1L_DIG_VOL_WIDTH   8 /* IN1L_DIG_VOL - [7:0] */
 
#define ARIZONA_IN1_DMICL_DLY_MASK   0x003F /* IN1_DMICL_DLY - [5:0] */
 
#define ARIZONA_IN1_DMICL_DLY_SHIFT   0 /* IN1_DMICL_DLY - [5:0] */
 
#define ARIZONA_IN1_DMICL_DLY_WIDTH   6 /* IN1_DMICL_DLY - [5:0] */
 
#define ARIZONA_IN1R_PGA_VOL_MASK   0x00FE /* IN1R_PGA_VOL - [7:1] */
 
#define ARIZONA_IN1R_PGA_VOL_SHIFT   1 /* IN1R_PGA_VOL - [7:1] */
 
#define ARIZONA_IN1R_PGA_VOL_WIDTH   7 /* IN1R_PGA_VOL - [7:1] */
 
#define ARIZONA_IN_VU   0x0200 /* IN_VU */
 
#define ARIZONA_IN_VU_MASK   0x0200 /* IN_VU */
 
#define ARIZONA_IN_VU_SHIFT   9 /* IN_VU */
 
#define ARIZONA_IN_VU_WIDTH   1 /* IN_VU */
 
#define ARIZONA_IN1R_MUTE   0x0100 /* IN1R_MUTE */
 
#define ARIZONA_IN1R_MUTE_MASK   0x0100 /* IN1R_MUTE */
 
#define ARIZONA_IN1R_MUTE_SHIFT   8 /* IN1R_MUTE */
 
#define ARIZONA_IN1R_MUTE_WIDTH   1 /* IN1R_MUTE */
 
#define ARIZONA_IN1R_DIG_VOL_MASK   0x00FF /* IN1R_DIG_VOL - [7:0] */
 
#define ARIZONA_IN1R_DIG_VOL_SHIFT   0 /* IN1R_DIG_VOL - [7:0] */
 
#define ARIZONA_IN1R_DIG_VOL_WIDTH   8 /* IN1R_DIG_VOL - [7:0] */
 
#define ARIZONA_IN1_DMICR_DLY_MASK   0x003F /* IN1_DMICR_DLY - [5:0] */
 
#define ARIZONA_IN1_DMICR_DLY_SHIFT   0 /* IN1_DMICR_DLY - [5:0] */
 
#define ARIZONA_IN1_DMICR_DLY_WIDTH   6 /* IN1_DMICR_DLY - [5:0] */
 
#define ARIZONA_IN2_OSR_MASK   0x6000 /* IN2_OSR - [14:13] */
 
#define ARIZONA_IN2_OSR_SHIFT   13 /* IN2_OSR - [14:13] */
 
#define ARIZONA_IN2_OSR_WIDTH   2 /* IN2_OSR - [14:13] */
 
#define ARIZONA_IN2_DMIC_SUP_MASK   0x1800 /* IN2_DMIC_SUP - [12:11] */
 
#define ARIZONA_IN2_DMIC_SUP_SHIFT   11 /* IN2_DMIC_SUP - [12:11] */
 
#define ARIZONA_IN2_DMIC_SUP_WIDTH   2 /* IN2_DMIC_SUP - [12:11] */
 
#define ARIZONA_IN2_MODE_MASK   0x0600 /* IN2_MODE - [10:9] */
 
#define ARIZONA_IN2_MODE_SHIFT   9 /* IN2_MODE - [10:9] */
 
#define ARIZONA_IN2_MODE_WIDTH   2 /* IN2_MODE - [10:9] */
 
#define ARIZONA_IN2L_PGA_VOL_MASK   0x00FE /* IN2L_PGA_VOL - [7:1] */
 
#define ARIZONA_IN2L_PGA_VOL_SHIFT   1 /* IN2L_PGA_VOL - [7:1] */
 
#define ARIZONA_IN2L_PGA_VOL_WIDTH   7 /* IN2L_PGA_VOL - [7:1] */
 
#define ARIZONA_IN_VU   0x0200 /* IN_VU */
 
#define ARIZONA_IN_VU_MASK   0x0200 /* IN_VU */
 
#define ARIZONA_IN_VU_SHIFT   9 /* IN_VU */
 
#define ARIZONA_IN_VU_WIDTH   1 /* IN_VU */
 
#define ARIZONA_IN2L_MUTE   0x0100 /* IN2L_MUTE */
 
#define ARIZONA_IN2L_MUTE_MASK   0x0100 /* IN2L_MUTE */
 
#define ARIZONA_IN2L_MUTE_SHIFT   8 /* IN2L_MUTE */
 
#define ARIZONA_IN2L_MUTE_WIDTH   1 /* IN2L_MUTE */
 
#define ARIZONA_IN2L_DIG_VOL_MASK   0x00FF /* IN2L_DIG_VOL - [7:0] */
 
#define ARIZONA_IN2L_DIG_VOL_SHIFT   0 /* IN2L_DIG_VOL - [7:0] */
 
#define ARIZONA_IN2L_DIG_VOL_WIDTH   8 /* IN2L_DIG_VOL - [7:0] */
 
#define ARIZONA_IN2_DMICL_DLY_MASK   0x003F /* IN2_DMICL_DLY - [5:0] */
 
#define ARIZONA_IN2_DMICL_DLY_SHIFT   0 /* IN2_DMICL_DLY - [5:0] */
 
#define ARIZONA_IN2_DMICL_DLY_WIDTH   6 /* IN2_DMICL_DLY - [5:0] */
 
#define ARIZONA_IN2R_PGA_VOL_MASK   0x00FE /* IN2R_PGA_VOL - [7:1] */
 
#define ARIZONA_IN2R_PGA_VOL_SHIFT   1 /* IN2R_PGA_VOL - [7:1] */
 
#define ARIZONA_IN2R_PGA_VOL_WIDTH   7 /* IN2R_PGA_VOL - [7:1] */
 
#define ARIZONA_IN_VU   0x0200 /* IN_VU */
 
#define ARIZONA_IN_VU_MASK   0x0200 /* IN_VU */
 
#define ARIZONA_IN_VU_SHIFT   9 /* IN_VU */
 
#define ARIZONA_IN_VU_WIDTH   1 /* IN_VU */
 
#define ARIZONA_IN2R_MUTE   0x0100 /* IN2R_MUTE */
 
#define ARIZONA_IN2R_MUTE_MASK   0x0100 /* IN2R_MUTE */
 
#define ARIZONA_IN2R_MUTE_SHIFT   8 /* IN2R_MUTE */
 
#define ARIZONA_IN2R_MUTE_WIDTH   1 /* IN2R_MUTE */
 
#define ARIZONA_IN2R_DIG_VOL_MASK   0x00FF /* IN2R_DIG_VOL - [7:0] */
 
#define ARIZONA_IN2R_DIG_VOL_SHIFT   0 /* IN2R_DIG_VOL - [7:0] */
 
#define ARIZONA_IN2R_DIG_VOL_WIDTH   8 /* IN2R_DIG_VOL - [7:0] */
 
#define ARIZONA_IN2_DMICR_DLY_MASK   0x003F /* IN2_DMICR_DLY - [5:0] */
 
#define ARIZONA_IN2_DMICR_DLY_SHIFT   0 /* IN2_DMICR_DLY - [5:0] */
 
#define ARIZONA_IN2_DMICR_DLY_WIDTH   6 /* IN2_DMICR_DLY - [5:0] */
 
#define ARIZONA_IN3_OSR_MASK   0x6000 /* IN3_OSR - [14:13] */
 
#define ARIZONA_IN3_OSR_SHIFT   13 /* IN3_OSR - [14:13] */
 
#define ARIZONA_IN3_OSR_WIDTH   2 /* IN3_OSR - [14:13] */
 
#define ARIZONA_IN3_DMIC_SUP_MASK   0x1800 /* IN3_DMIC_SUP - [12:11] */
 
#define ARIZONA_IN3_DMIC_SUP_SHIFT   11 /* IN3_DMIC_SUP - [12:11] */
 
#define ARIZONA_IN3_DMIC_SUP_WIDTH   2 /* IN3_DMIC_SUP - [12:11] */
 
#define ARIZONA_IN3_MODE_MASK   0x0600 /* IN3_MODE - [10:9] */
 
#define ARIZONA_IN3_MODE_SHIFT   9 /* IN3_MODE - [10:9] */
 
#define ARIZONA_IN3_MODE_WIDTH   2 /* IN3_MODE - [10:9] */
 
#define ARIZONA_IN3L_PGA_VOL_MASK   0x00FE /* IN3L_PGA_VOL - [7:1] */
 
#define ARIZONA_IN3L_PGA_VOL_SHIFT   1 /* IN3L_PGA_VOL - [7:1] */
 
#define ARIZONA_IN3L_PGA_VOL_WIDTH   7 /* IN3L_PGA_VOL - [7:1] */
 
#define ARIZONA_IN_VU   0x0200 /* IN_VU */
 
#define ARIZONA_IN_VU_MASK   0x0200 /* IN_VU */
 
#define ARIZONA_IN_VU_SHIFT   9 /* IN_VU */
 
#define ARIZONA_IN_VU_WIDTH   1 /* IN_VU */
 
#define ARIZONA_IN3L_MUTE   0x0100 /* IN3L_MUTE */
 
#define ARIZONA_IN3L_MUTE_MASK   0x0100 /* IN3L_MUTE */
 
#define ARIZONA_IN3L_MUTE_SHIFT   8 /* IN3L_MUTE */
 
#define ARIZONA_IN3L_MUTE_WIDTH   1 /* IN3L_MUTE */
 
#define ARIZONA_IN3L_DIG_VOL_MASK   0x00FF /* IN3L_DIG_VOL - [7:0] */
 
#define ARIZONA_IN3L_DIG_VOL_SHIFT   0 /* IN3L_DIG_VOL - [7:0] */
 
#define ARIZONA_IN3L_DIG_VOL_WIDTH   8 /* IN3L_DIG_VOL - [7:0] */
 
#define ARIZONA_IN3_DMICL_DLY_MASK   0x003F /* IN3_DMICL_DLY - [5:0] */
 
#define ARIZONA_IN3_DMICL_DLY_SHIFT   0 /* IN3_DMICL_DLY - [5:0] */
 
#define ARIZONA_IN3_DMICL_DLY_WIDTH   6 /* IN3_DMICL_DLY - [5:0] */
 
#define ARIZONA_IN3R_PGA_VOL_MASK   0x00FE /* IN3R_PGA_VOL - [7:1] */
 
#define ARIZONA_IN3R_PGA_VOL_SHIFT   1 /* IN3R_PGA_VOL - [7:1] */
 
#define ARIZONA_IN3R_PGA_VOL_WIDTH   7 /* IN3R_PGA_VOL - [7:1] */
 
#define ARIZONA_IN_VU   0x0200 /* IN_VU */
 
#define ARIZONA_IN_VU_MASK   0x0200 /* IN_VU */
 
#define ARIZONA_IN_VU_SHIFT   9 /* IN_VU */
 
#define ARIZONA_IN_VU_WIDTH   1 /* IN_VU */
 
#define ARIZONA_IN3R_MUTE   0x0100 /* IN3R_MUTE */
 
#define ARIZONA_IN3R_MUTE_MASK   0x0100 /* IN3R_MUTE */
 
#define ARIZONA_IN3R_MUTE_SHIFT   8 /* IN3R_MUTE */
 
#define ARIZONA_IN3R_MUTE_WIDTH   1 /* IN3R_MUTE */
 
#define ARIZONA_IN3R_DIG_VOL_MASK   0x00FF /* IN3R_DIG_VOL - [7:0] */
 
#define ARIZONA_IN3R_DIG_VOL_SHIFT   0 /* IN3R_DIG_VOL - [7:0] */
 
#define ARIZONA_IN3R_DIG_VOL_WIDTH   8 /* IN3R_DIG_VOL - [7:0] */
 
#define ARIZONA_IN3_DMICR_DLY_MASK   0x003F /* IN3_DMICR_DLY - [5:0] */
 
#define ARIZONA_IN3_DMICR_DLY_SHIFT   0 /* IN3_DMICR_DLY - [5:0] */
 
#define ARIZONA_IN3_DMICR_DLY_WIDTH   6 /* IN3_DMICR_DLY - [5:0] */
 
#define ARIZONA_IN4_OSR_MASK   0x6000 /* IN4_OSR - [14:13] */
 
#define ARIZONA_IN4_OSR_SHIFT   13 /* IN4_OSR - [14:13] */
 
#define ARIZONA_IN4_OSR_WIDTH   2 /* IN4_OSR - [14:13] */
 
#define ARIZONA_IN4_DMIC_SUP_MASK   0x1800 /* IN4_DMIC_SUP - [12:11] */
 
#define ARIZONA_IN4_DMIC_SUP_SHIFT   11 /* IN4_DMIC_SUP - [12:11] */
 
#define ARIZONA_IN4_DMIC_SUP_WIDTH   2 /* IN4_DMIC_SUP - [12:11] */
 
#define ARIZONA_IN_VU   0x0200 /* IN_VU */
 
#define ARIZONA_IN_VU_MASK   0x0200 /* IN_VU */
 
#define ARIZONA_IN_VU_SHIFT   9 /* IN_VU */
 
#define ARIZONA_IN_VU_WIDTH   1 /* IN_VU */
 
#define ARIZONA_IN4L_MUTE   0x0100 /* IN4L_MUTE */
 
#define ARIZONA_IN4L_MUTE_MASK   0x0100 /* IN4L_MUTE */
 
#define ARIZONA_IN4L_MUTE_SHIFT   8 /* IN4L_MUTE */
 
#define ARIZONA_IN4L_MUTE_WIDTH   1 /* IN4L_MUTE */
 
#define ARIZONA_IN4L_DIG_VOL_MASK   0x00FF /* IN4L_DIG_VOL - [7:0] */
 
#define ARIZONA_IN4L_DIG_VOL_SHIFT   0 /* IN4L_DIG_VOL - [7:0] */
 
#define ARIZONA_IN4L_DIG_VOL_WIDTH   8 /* IN4L_DIG_VOL - [7:0] */
 
#define ARIZONA_IN4L_DMIC_DLY_MASK   0x003F /* IN4L_DMIC_DLY - [5:0] */
 
#define ARIZONA_IN4L_DMIC_DLY_SHIFT   0 /* IN4L_DMIC_DLY - [5:0] */
 
#define ARIZONA_IN4L_DMIC_DLY_WIDTH   6 /* IN4L_DMIC_DLY - [5:0] */
 
#define ARIZONA_IN_VU   0x0200 /* IN_VU */
 
#define ARIZONA_IN_VU_MASK   0x0200 /* IN_VU */
 
#define ARIZONA_IN_VU_SHIFT   9 /* IN_VU */
 
#define ARIZONA_IN_VU_WIDTH   1 /* IN_VU */
 
#define ARIZONA_IN4R_MUTE   0x0100 /* IN4R_MUTE */
 
#define ARIZONA_IN4R_MUTE_MASK   0x0100 /* IN4R_MUTE */
 
#define ARIZONA_IN4R_MUTE_SHIFT   8 /* IN4R_MUTE */
 
#define ARIZONA_IN4R_MUTE_WIDTH   1 /* IN4R_MUTE */
 
#define ARIZONA_IN4R_DIG_VOL_MASK   0x00FF /* IN4R_DIG_VOL - [7:0] */
 
#define ARIZONA_IN4R_DIG_VOL_SHIFT   0 /* IN4R_DIG_VOL - [7:0] */
 
#define ARIZONA_IN4R_DIG_VOL_WIDTH   8 /* IN4R_DIG_VOL - [7:0] */
 
#define ARIZONA_IN4R_DMIC_DLY_MASK   0x003F /* IN4R_DMIC_DLY - [5:0] */
 
#define ARIZONA_IN4R_DMIC_DLY_SHIFT   0 /* IN4R_DMIC_DLY - [5:0] */
 
#define ARIZONA_IN4R_DMIC_DLY_WIDTH   6 /* IN4R_DMIC_DLY - [5:0] */
 
#define ARIZONA_OUT6L_ENA   0x0800 /* OUT6L_ENA */
 
#define ARIZONA_OUT6L_ENA_MASK   0x0800 /* OUT6L_ENA */
 
#define ARIZONA_OUT6L_ENA_SHIFT   11 /* OUT6L_ENA */
 
#define ARIZONA_OUT6L_ENA_WIDTH   1 /* OUT6L_ENA */
 
#define ARIZONA_OUT6R_ENA   0x0400 /* OUT6R_ENA */
 
#define ARIZONA_OUT6R_ENA_MASK   0x0400 /* OUT6R_ENA */
 
#define ARIZONA_OUT6R_ENA_SHIFT   10 /* OUT6R_ENA */
 
#define ARIZONA_OUT6R_ENA_WIDTH   1 /* OUT6R_ENA */
 
#define ARIZONA_OUT5L_ENA   0x0200 /* OUT5L_ENA */
 
#define ARIZONA_OUT5L_ENA_MASK   0x0200 /* OUT5L_ENA */
 
#define ARIZONA_OUT5L_ENA_SHIFT   9 /* OUT5L_ENA */
 
#define ARIZONA_OUT5L_ENA_WIDTH   1 /* OUT5L_ENA */
 
#define ARIZONA_OUT5R_ENA   0x0100 /* OUT5R_ENA */
 
#define ARIZONA_OUT5R_ENA_MASK   0x0100 /* OUT5R_ENA */
 
#define ARIZONA_OUT5R_ENA_SHIFT   8 /* OUT5R_ENA */
 
#define ARIZONA_OUT5R_ENA_WIDTH   1 /* OUT5R_ENA */
 
#define ARIZONA_OUT4L_ENA   0x0080 /* OUT4L_ENA */
 
#define ARIZONA_OUT4L_ENA_MASK   0x0080 /* OUT4L_ENA */
 
#define ARIZONA_OUT4L_ENA_SHIFT   7 /* OUT4L_ENA */
 
#define ARIZONA_OUT4L_ENA_WIDTH   1 /* OUT4L_ENA */
 
#define ARIZONA_OUT4R_ENA   0x0040 /* OUT4R_ENA */
 
#define ARIZONA_OUT4R_ENA_MASK   0x0040 /* OUT4R_ENA */
 
#define ARIZONA_OUT4R_ENA_SHIFT   6 /* OUT4R_ENA */
 
#define ARIZONA_OUT4R_ENA_WIDTH   1 /* OUT4R_ENA */
 
#define ARIZONA_OUT3L_ENA   0x0020 /* OUT3L_ENA */
 
#define ARIZONA_OUT3L_ENA_MASK   0x0020 /* OUT3L_ENA */
 
#define ARIZONA_OUT3L_ENA_SHIFT   5 /* OUT3L_ENA */
 
#define ARIZONA_OUT3L_ENA_WIDTH   1 /* OUT3L_ENA */
 
#define ARIZONA_OUT3R_ENA   0x0010 /* OUT3R_ENA */
 
#define ARIZONA_OUT3R_ENA_MASK   0x0010 /* OUT3R_ENA */
 
#define ARIZONA_OUT3R_ENA_SHIFT   4 /* OUT3R_ENA */
 
#define ARIZONA_OUT3R_ENA_WIDTH   1 /* OUT3R_ENA */
 
#define ARIZONA_OUT2L_ENA   0x0008 /* OUT2L_ENA */
 
#define ARIZONA_OUT2L_ENA_MASK   0x0008 /* OUT2L_ENA */
 
#define ARIZONA_OUT2L_ENA_SHIFT   3 /* OUT2L_ENA */
 
#define ARIZONA_OUT2L_ENA_WIDTH   1 /* OUT2L_ENA */
 
#define ARIZONA_OUT2R_ENA   0x0004 /* OUT2R_ENA */
 
#define ARIZONA_OUT2R_ENA_MASK   0x0004 /* OUT2R_ENA */
 
#define ARIZONA_OUT2R_ENA_SHIFT   2 /* OUT2R_ENA */
 
#define ARIZONA_OUT2R_ENA_WIDTH   1 /* OUT2R_ENA */
 
#define ARIZONA_OUT1L_ENA   0x0002 /* OUT1L_ENA */
 
#define ARIZONA_OUT1L_ENA_MASK   0x0002 /* OUT1L_ENA */
 
#define ARIZONA_OUT1L_ENA_SHIFT   1 /* OUT1L_ENA */
 
#define ARIZONA_OUT1L_ENA_WIDTH   1 /* OUT1L_ENA */
 
#define ARIZONA_OUT1R_ENA   0x0001 /* OUT1R_ENA */
 
#define ARIZONA_OUT1R_ENA_MASK   0x0001 /* OUT1R_ENA */
 
#define ARIZONA_OUT1R_ENA_SHIFT   0 /* OUT1R_ENA */
 
#define ARIZONA_OUT1R_ENA_WIDTH   1 /* OUT1R_ENA */
 
#define ARIZONA_OUT6L_ENA_STS   0x0800 /* OUT6L_ENA_STS */
 
#define ARIZONA_OUT6L_ENA_STS_MASK   0x0800 /* OUT6L_ENA_STS */
 
#define ARIZONA_OUT6L_ENA_STS_SHIFT   11 /* OUT6L_ENA_STS */
 
#define ARIZONA_OUT6L_ENA_STS_WIDTH   1 /* OUT6L_ENA_STS */
 
#define ARIZONA_OUT6R_ENA_STS   0x0400 /* OUT6R_ENA_STS */
 
#define ARIZONA_OUT6R_ENA_STS_MASK   0x0400 /* OUT6R_ENA_STS */
 
#define ARIZONA_OUT6R_ENA_STS_SHIFT   10 /* OUT6R_ENA_STS */
 
#define ARIZONA_OUT6R_ENA_STS_WIDTH   1 /* OUT6R_ENA_STS */
 
#define ARIZONA_OUT5L_ENA_STS   0x0200 /* OUT5L_ENA_STS */
 
#define ARIZONA_OUT5L_ENA_STS_MASK   0x0200 /* OUT5L_ENA_STS */
 
#define ARIZONA_OUT5L_ENA_STS_SHIFT   9 /* OUT5L_ENA_STS */
 
#define ARIZONA_OUT5L_ENA_STS_WIDTH   1 /* OUT5L_ENA_STS */
 
#define ARIZONA_OUT5R_ENA_STS   0x0100 /* OUT5R_ENA_STS */
 
#define ARIZONA_OUT5R_ENA_STS_MASK   0x0100 /* OUT5R_ENA_STS */
 
#define ARIZONA_OUT5R_ENA_STS_SHIFT   8 /* OUT5R_ENA_STS */
 
#define ARIZONA_OUT5R_ENA_STS_WIDTH   1 /* OUT5R_ENA_STS */
 
#define ARIZONA_OUT4L_ENA_STS   0x0080 /* OUT4L_ENA_STS */
 
#define ARIZONA_OUT4L_ENA_STS_MASK   0x0080 /* OUT4L_ENA_STS */
 
#define ARIZONA_OUT4L_ENA_STS_SHIFT   7 /* OUT4L_ENA_STS */
 
#define ARIZONA_OUT4L_ENA_STS_WIDTH   1 /* OUT4L_ENA_STS */
 
#define ARIZONA_OUT4R_ENA_STS   0x0040 /* OUT4R_ENA_STS */
 
#define ARIZONA_OUT4R_ENA_STS_MASK   0x0040 /* OUT4R_ENA_STS */
 
#define ARIZONA_OUT4R_ENA_STS_SHIFT   6 /* OUT4R_ENA_STS */
 
#define ARIZONA_OUT4R_ENA_STS_WIDTH   1 /* OUT4R_ENA_STS */
 
#define ARIZONA_OUT_RATE_MASK   0x7800 /* OUT_RATE - [14:11] */
 
#define ARIZONA_OUT_RATE_SHIFT   11 /* OUT_RATE - [14:11] */
 
#define ARIZONA_OUT_RATE_WIDTH   4 /* OUT_RATE - [14:11] */
 
#define ARIZONA_OUT_VD_RAMP_MASK   0x0070 /* OUT_VD_RAMP - [6:4] */
 
#define ARIZONA_OUT_VD_RAMP_SHIFT   4 /* OUT_VD_RAMP - [6:4] */
 
#define ARIZONA_OUT_VD_RAMP_WIDTH   3 /* OUT_VD_RAMP - [6:4] */
 
#define ARIZONA_OUT_VI_RAMP_MASK   0x0007 /* OUT_VI_RAMP - [2:0] */
 
#define ARIZONA_OUT_VI_RAMP_SHIFT   0 /* OUT_VI_RAMP - [2:0] */
 
#define ARIZONA_OUT_VI_RAMP_WIDTH   3 /* OUT_VI_RAMP - [2:0] */
 
#define ARIZONA_OUT1_LP_MODE   0x8000 /* OUT1_LP_MODE */
 
#define ARIZONA_OUT1_LP_MODE_MASK   0x8000 /* OUT1_LP_MODE */
 
#define ARIZONA_OUT1_LP_MODE_SHIFT   15 /* OUT1_LP_MODE */
 
#define ARIZONA_OUT1_LP_MODE_WIDTH   1 /* OUT1_LP_MODE */
 
#define ARIZONA_OUT1_OSR   0x2000 /* OUT1_OSR */
 
#define ARIZONA_OUT1_OSR_MASK   0x2000 /* OUT1_OSR */
 
#define ARIZONA_OUT1_OSR_SHIFT   13 /* OUT1_OSR */
 
#define ARIZONA_OUT1_OSR_WIDTH   1 /* OUT1_OSR */
 
#define ARIZONA_OUT1_MONO   0x1000 /* OUT1_MONO */
 
#define ARIZONA_OUT1_MONO_MASK   0x1000 /* OUT1_MONO */
 
#define ARIZONA_OUT1_MONO_SHIFT   12 /* OUT1_MONO */
 
#define ARIZONA_OUT1_MONO_WIDTH   1 /* OUT1_MONO */
 
#define ARIZONA_OUT1L_ANC_SRC_MASK   0x0C00 /* OUT1L_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT1L_ANC_SRC_SHIFT   10 /* OUT1L_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT1L_ANC_SRC_WIDTH   2 /* OUT1L_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT1L_PGA_VOL_MASK   0x00FE /* OUT1L_PGA_VOL - [7:1] */
 
#define ARIZONA_OUT1L_PGA_VOL_SHIFT   1 /* OUT1L_PGA_VOL - [7:1] */
 
#define ARIZONA_OUT1L_PGA_VOL_WIDTH   7 /* OUT1L_PGA_VOL - [7:1] */
 
#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */
 
#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */
 
#define ARIZONA_OUT1L_MUTE   0x0100 /* OUT1L_MUTE */
 
#define ARIZONA_OUT1L_MUTE_MASK   0x0100 /* OUT1L_MUTE */
 
#define ARIZONA_OUT1L_MUTE_SHIFT   8 /* OUT1L_MUTE */
 
#define ARIZONA_OUT1L_MUTE_WIDTH   1 /* OUT1L_MUTE */
 
#define ARIZONA_OUT1L_VOL_MASK   0x00FF /* OUT1L_VOL - [7:0] */
 
#define ARIZONA_OUT1L_VOL_SHIFT   0 /* OUT1L_VOL - [7:0] */
 
#define ARIZONA_OUT1L_VOL_WIDTH   8 /* OUT1L_VOL - [7:0] */
 
#define ARIZONA_OUT1L_VOL_LIM_MASK   0x00FF /* OUT1L_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT1L_VOL_LIM_SHIFT   0 /* OUT1L_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT1L_VOL_LIM_WIDTH   8 /* OUT1L_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT1L_NGATE_SRC_MASK   0x0FFF /* OUT1L_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT1L_NGATE_SRC_SHIFT   0 /* OUT1L_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT1L_NGATE_SRC_WIDTH   12 /* OUT1L_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT1R_ANC_SRC_MASK   0x0C00 /* OUT1R_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT1R_ANC_SRC_SHIFT   10 /* OUT1R_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT1R_ANC_SRC_WIDTH   2 /* OUT1R_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT1R_PGA_VOL_MASK   0x00FE /* OUT1R_PGA_VOL - [7:1] */
 
#define ARIZONA_OUT1R_PGA_VOL_SHIFT   1 /* OUT1R_PGA_VOL - [7:1] */
 
#define ARIZONA_OUT1R_PGA_VOL_WIDTH   7 /* OUT1R_PGA_VOL - [7:1] */
 
#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */
 
#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */
 
#define ARIZONA_OUT1R_MUTE   0x0100 /* OUT1R_MUTE */
 
#define ARIZONA_OUT1R_MUTE_MASK   0x0100 /* OUT1R_MUTE */
 
#define ARIZONA_OUT1R_MUTE_SHIFT   8 /* OUT1R_MUTE */
 
#define ARIZONA_OUT1R_MUTE_WIDTH   1 /* OUT1R_MUTE */
 
#define ARIZONA_OUT1R_VOL_MASK   0x00FF /* OUT1R_VOL - [7:0] */
 
#define ARIZONA_OUT1R_VOL_SHIFT   0 /* OUT1R_VOL - [7:0] */
 
#define ARIZONA_OUT1R_VOL_WIDTH   8 /* OUT1R_VOL - [7:0] */
 
#define ARIZONA_OUT1R_VOL_LIM_MASK   0x00FF /* OUT1R_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT1R_VOL_LIM_SHIFT   0 /* OUT1R_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT1R_VOL_LIM_WIDTH   8 /* OUT1R_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT1R_NGATE_SRC_MASK   0x0FFF /* OUT1R_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT1R_NGATE_SRC_SHIFT   0 /* OUT1R_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT1R_NGATE_SRC_WIDTH   12 /* OUT1R_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT2_LP_MODE   0x8000 /* OUT2_LP_MODE */
 
#define ARIZONA_OUT2_LP_MODE_MASK   0x8000 /* OUT2_LP_MODE */
 
#define ARIZONA_OUT2_LP_MODE_SHIFT   15 /* OUT2_LP_MODE */
 
#define ARIZONA_OUT2_LP_MODE_WIDTH   1 /* OUT2_LP_MODE */
 
#define ARIZONA_OUT2_OSR   0x2000 /* OUT2_OSR */
 
#define ARIZONA_OUT2_OSR_MASK   0x2000 /* OUT2_OSR */
 
#define ARIZONA_OUT2_OSR_SHIFT   13 /* OUT2_OSR */
 
#define ARIZONA_OUT2_OSR_WIDTH   1 /* OUT2_OSR */
 
#define ARIZONA_OUT2_MONO   0x1000 /* OUT2_MONO */
 
#define ARIZONA_OUT2_MONO_MASK   0x1000 /* OUT2_MONO */
 
#define ARIZONA_OUT2_MONO_SHIFT   12 /* OUT2_MONO */
 
#define ARIZONA_OUT2_MONO_WIDTH   1 /* OUT2_MONO */
 
#define ARIZONA_OUT2L_ANC_SRC_MASK   0x0C00 /* OUT2L_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT2L_ANC_SRC_SHIFT   10 /* OUT2L_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT2L_ANC_SRC_WIDTH   2 /* OUT2L_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT2L_PGA_VOL_MASK   0x00FE /* OUT2L_PGA_VOL - [7:1] */
 
#define ARIZONA_OUT2L_PGA_VOL_SHIFT   1 /* OUT2L_PGA_VOL - [7:1] */
 
#define ARIZONA_OUT2L_PGA_VOL_WIDTH   7 /* OUT2L_PGA_VOL - [7:1] */
 
#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */
 
#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */
 
#define ARIZONA_OUT2L_MUTE   0x0100 /* OUT2L_MUTE */
 
#define ARIZONA_OUT2L_MUTE_MASK   0x0100 /* OUT2L_MUTE */
 
#define ARIZONA_OUT2L_MUTE_SHIFT   8 /* OUT2L_MUTE */
 
#define ARIZONA_OUT2L_MUTE_WIDTH   1 /* OUT2L_MUTE */
 
#define ARIZONA_OUT2L_VOL_MASK   0x00FF /* OUT2L_VOL - [7:0] */
 
#define ARIZONA_OUT2L_VOL_SHIFT   0 /* OUT2L_VOL - [7:0] */
 
#define ARIZONA_OUT2L_VOL_WIDTH   8 /* OUT2L_VOL - [7:0] */
 
#define ARIZONA_OUT2L_VOL_LIM_MASK   0x00FF /* OUT2L_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT2L_VOL_LIM_SHIFT   0 /* OUT2L_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT2L_VOL_LIM_WIDTH   8 /* OUT2L_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT2L_NGATE_SRC_MASK   0x0FFF /* OUT2L_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT2L_NGATE_SRC_SHIFT   0 /* OUT2L_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT2L_NGATE_SRC_WIDTH   12 /* OUT2L_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT2R_ANC_SRC_MASK   0x0C00 /* OUT2R_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT2R_ANC_SRC_SHIFT   10 /* OUT2R_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT2R_ANC_SRC_WIDTH   2 /* OUT2R_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT2R_PGA_VOL_MASK   0x00FE /* OUT2R_PGA_VOL - [7:1] */
 
#define ARIZONA_OUT2R_PGA_VOL_SHIFT   1 /* OUT2R_PGA_VOL - [7:1] */
 
#define ARIZONA_OUT2R_PGA_VOL_WIDTH   7 /* OUT2R_PGA_VOL - [7:1] */
 
#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */
 
#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */
 
#define ARIZONA_OUT2R_MUTE   0x0100 /* OUT2R_MUTE */
 
#define ARIZONA_OUT2R_MUTE_MASK   0x0100 /* OUT2R_MUTE */
 
#define ARIZONA_OUT2R_MUTE_SHIFT   8 /* OUT2R_MUTE */
 
#define ARIZONA_OUT2R_MUTE_WIDTH   1 /* OUT2R_MUTE */
 
#define ARIZONA_OUT2R_VOL_MASK   0x00FF /* OUT2R_VOL - [7:0] */
 
#define ARIZONA_OUT2R_VOL_SHIFT   0 /* OUT2R_VOL - [7:0] */
 
#define ARIZONA_OUT2R_VOL_WIDTH   8 /* OUT2R_VOL - [7:0] */
 
#define ARIZONA_OUT2R_VOL_LIM_MASK   0x00FF /* OUT2R_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT2R_VOL_LIM_SHIFT   0 /* OUT2R_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT2R_VOL_LIM_WIDTH   8 /* OUT2R_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT2R_NGATE_SRC_MASK   0x0FFF /* OUT2R_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT2R_NGATE_SRC_SHIFT   0 /* OUT2R_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT2R_NGATE_SRC_WIDTH   12 /* OUT2R_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT3_LP_MODE   0x8000 /* OUT3_LP_MODE */
 
#define ARIZONA_OUT3_LP_MODE_MASK   0x8000 /* OUT3_LP_MODE */
 
#define ARIZONA_OUT3_LP_MODE_SHIFT   15 /* OUT3_LP_MODE */
 
#define ARIZONA_OUT3_LP_MODE_WIDTH   1 /* OUT3_LP_MODE */
 
#define ARIZONA_OUT3_OSR   0x2000 /* OUT3_OSR */
 
#define ARIZONA_OUT3_OSR_MASK   0x2000 /* OUT3_OSR */
 
#define ARIZONA_OUT3_OSR_SHIFT   13 /* OUT3_OSR */
 
#define ARIZONA_OUT3_OSR_WIDTH   1 /* OUT3_OSR */
 
#define ARIZONA_OUT3_MONO   0x1000 /* OUT3_MONO */
 
#define ARIZONA_OUT3_MONO_MASK   0x1000 /* OUT3_MONO */
 
#define ARIZONA_OUT3_MONO_SHIFT   12 /* OUT3_MONO */
 
#define ARIZONA_OUT3_MONO_WIDTH   1 /* OUT3_MONO */
 
#define ARIZONA_OUT3L_ANC_SRC_MASK   0x0C00 /* OUT3L_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT3L_ANC_SRC_SHIFT   10 /* OUT3L_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT3L_ANC_SRC_WIDTH   2 /* OUT3L_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT3L_PGA_VOL_MASK   0x00FE /* OUT3L_PGA_VOL - [7:1] */
 
#define ARIZONA_OUT3L_PGA_VOL_SHIFT   1 /* OUT3L_PGA_VOL - [7:1] */
 
#define ARIZONA_OUT3L_PGA_VOL_WIDTH   7 /* OUT3L_PGA_VOL - [7:1] */
 
#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */
 
#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */
 
#define ARIZONA_OUT3L_MUTE   0x0100 /* OUT3L_MUTE */
 
#define ARIZONA_OUT3L_MUTE_MASK   0x0100 /* OUT3L_MUTE */
 
#define ARIZONA_OUT3L_MUTE_SHIFT   8 /* OUT3L_MUTE */
 
#define ARIZONA_OUT3L_MUTE_WIDTH   1 /* OUT3L_MUTE */
 
#define ARIZONA_OUT3L_VOL_MASK   0x00FF /* OUT3L_VOL - [7:0] */
 
#define ARIZONA_OUT3L_VOL_SHIFT   0 /* OUT3L_VOL - [7:0] */
 
#define ARIZONA_OUT3L_VOL_WIDTH   8 /* OUT3L_VOL - [7:0] */
 
#define ARIZONA_OUT3L_VOL_LIM_MASK   0x00FF /* OUT3L_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT3L_VOL_LIM_SHIFT   0 /* OUT3L_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT3L_VOL_LIM_WIDTH   8 /* OUT3L_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT3_NGATE_SRC_MASK   0x0FFF /* OUT3_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT3_NGATE_SRC_SHIFT   0 /* OUT3_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT3_NGATE_SRC_WIDTH   12 /* OUT3_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT3R_PGA_VOL_MASK   0x00FE /* OUT3R_PGA_VOL - [7:1] */
 
#define ARIZONA_OUT3R_PGA_VOL_SHIFT   1 /* OUT3R_PGA_VOL - [7:1] */
 
#define ARIZONA_OUT3R_PGA_VOL_WIDTH   7 /* OUT3R_PGA_VOL - [7:1] */
 
#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */
 
#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */
 
#define ARIZONA_OUT3R_MUTE   0x0100 /* OUT3R_MUTE */
 
#define ARIZONA_OUT3R_MUTE_MASK   0x0100 /* OUT3R_MUTE */
 
#define ARIZONA_OUT3R_MUTE_SHIFT   8 /* OUT3R_MUTE */
 
#define ARIZONA_OUT3R_MUTE_WIDTH   1 /* OUT3R_MUTE */
 
#define ARIZONA_OUT3R_VOL_MASK   0x00FF /* OUT3R_VOL - [7:0] */
 
#define ARIZONA_OUT3R_VOL_SHIFT   0 /* OUT3R_VOL - [7:0] */
 
#define ARIZONA_OUT3R_VOL_WIDTH   8 /* OUT3R_VOL - [7:0] */
 
#define ARIZONA_OUT3R_ANC_SRC_MASK   0x0C00 /* OUT3R_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT3R_ANC_SRC_SHIFT   10 /* OUT3R_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT3R_ANC_SRC_WIDTH   2 /* OUT3R_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT3R_VOL_LIM_MASK   0x00FF /* OUT3R_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT3R_VOL_LIM_SHIFT   0 /* OUT3R_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT3R_VOL_LIM_WIDTH   8 /* OUT3R_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT4_OSR   0x2000 /* OUT4_OSR */
 
#define ARIZONA_OUT4_OSR_MASK   0x2000 /* OUT4_OSR */
 
#define ARIZONA_OUT4_OSR_SHIFT   13 /* OUT4_OSR */
 
#define ARIZONA_OUT4_OSR_WIDTH   1 /* OUT4_OSR */
 
#define ARIZONA_OUT4L_ANC_SRC_MASK   0x0C00 /* OUT4L_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT4L_ANC_SRC_SHIFT   10 /* OUT4L_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT4L_ANC_SRC_WIDTH   2 /* OUT4L_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */
 
#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */
 
#define ARIZONA_OUT4L_MUTE   0x0100 /* OUT4L_MUTE */
 
#define ARIZONA_OUT4L_MUTE_MASK   0x0100 /* OUT4L_MUTE */
 
#define ARIZONA_OUT4L_MUTE_SHIFT   8 /* OUT4L_MUTE */
 
#define ARIZONA_OUT4L_MUTE_WIDTH   1 /* OUT4L_MUTE */
 
#define ARIZONA_OUT4L_VOL_MASK   0x00FF /* OUT4L_VOL - [7:0] */
 
#define ARIZONA_OUT4L_VOL_SHIFT   0 /* OUT4L_VOL - [7:0] */
 
#define ARIZONA_OUT4L_VOL_WIDTH   8 /* OUT4L_VOL - [7:0] */
 
#define ARIZONA_OUT4L_VOL_LIM_MASK   0x00FF /* OUT4L_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT4L_VOL_LIM_SHIFT   0 /* OUT4L_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT4L_VOL_LIM_WIDTH   8 /* OUT4L_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT4L_NGATE_SRC_MASK   0x0FFF /* OUT4L_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT4L_NGATE_SRC_SHIFT   0 /* OUT4L_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT4L_NGATE_SRC_WIDTH   12 /* OUT4L_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT4R_ANC_SRC_MASK   0x0C00 /* OUT4R_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT4R_ANC_SRC_SHIFT   10 /* OUT4R_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT4R_ANC_SRC_WIDTH   2 /* OUT4R_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */
 
#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */
 
#define ARIZONA_OUT4R_MUTE   0x0100 /* OUT4R_MUTE */
 
#define ARIZONA_OUT4R_MUTE_MASK   0x0100 /* OUT4R_MUTE */
 
#define ARIZONA_OUT4R_MUTE_SHIFT   8 /* OUT4R_MUTE */
 
#define ARIZONA_OUT4R_MUTE_WIDTH   1 /* OUT4R_MUTE */
 
#define ARIZONA_OUT4R_VOL_MASK   0x00FF /* OUT4R_VOL - [7:0] */
 
#define ARIZONA_OUT4R_VOL_SHIFT   0 /* OUT4R_VOL - [7:0] */
 
#define ARIZONA_OUT4R_VOL_WIDTH   8 /* OUT4R_VOL - [7:0] */
 
#define ARIZONA_OUT4R_VOL_LIM_MASK   0x00FF /* OUT4R_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT4R_VOL_LIM_SHIFT   0 /* OUT4R_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT4R_VOL_LIM_WIDTH   8 /* OUT4R_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT4R_NGATE_SRC_MASK   0x0FFF /* OUT4R_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT4R_NGATE_SRC_SHIFT   0 /* OUT4R_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT4R_NGATE_SRC_WIDTH   12 /* OUT4R_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT5_OSR   0x2000 /* OUT5_OSR */
 
#define ARIZONA_OUT5_OSR_MASK   0x2000 /* OUT5_OSR */
 
#define ARIZONA_OUT5_OSR_SHIFT   13 /* OUT5_OSR */
 
#define ARIZONA_OUT5_OSR_WIDTH   1 /* OUT5_OSR */
 
#define ARIZONA_OUT5L_ANC_SRC_MASK   0x0C00 /* OUT5L_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT5L_ANC_SRC_SHIFT   10 /* OUT5L_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT5L_ANC_SRC_WIDTH   2 /* OUT5L_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */
 
#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */
 
#define ARIZONA_OUT5L_MUTE   0x0100 /* OUT5L_MUTE */
 
#define ARIZONA_OUT5L_MUTE_MASK   0x0100 /* OUT5L_MUTE */
 
#define ARIZONA_OUT5L_MUTE_SHIFT   8 /* OUT5L_MUTE */
 
#define ARIZONA_OUT5L_MUTE_WIDTH   1 /* OUT5L_MUTE */
 
#define ARIZONA_OUT5L_VOL_MASK   0x00FF /* OUT5L_VOL - [7:0] */
 
#define ARIZONA_OUT5L_VOL_SHIFT   0 /* OUT5L_VOL - [7:0] */
 
#define ARIZONA_OUT5L_VOL_WIDTH   8 /* OUT5L_VOL - [7:0] */
 
#define ARIZONA_OUT5L_VOL_LIM_MASK   0x00FF /* OUT5L_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT5L_VOL_LIM_SHIFT   0 /* OUT5L_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT5L_VOL_LIM_WIDTH   8 /* OUT5L_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT5L_NGATE_SRC_MASK   0x0FFF /* OUT5L_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT5L_NGATE_SRC_SHIFT   0 /* OUT5L_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT5L_NGATE_SRC_WIDTH   12 /* OUT5L_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT5R_ANC_SRC_MASK   0x0C00 /* OUT5R_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT5R_ANC_SRC_SHIFT   10 /* OUT5R_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT5R_ANC_SRC_WIDTH   2 /* OUT5R_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */
 
#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */
 
#define ARIZONA_OUT5R_MUTE   0x0100 /* OUT5R_MUTE */
 
#define ARIZONA_OUT5R_MUTE_MASK   0x0100 /* OUT5R_MUTE */
 
#define ARIZONA_OUT5R_MUTE_SHIFT   8 /* OUT5R_MUTE */
 
#define ARIZONA_OUT5R_MUTE_WIDTH   1 /* OUT5R_MUTE */
 
#define ARIZONA_OUT5R_VOL_MASK   0x00FF /* OUT5R_VOL - [7:0] */
 
#define ARIZONA_OUT5R_VOL_SHIFT   0 /* OUT5R_VOL - [7:0] */
 
#define ARIZONA_OUT5R_VOL_WIDTH   8 /* OUT5R_VOL - [7:0] */
 
#define ARIZONA_OUT5R_VOL_LIM_MASK   0x00FF /* OUT5R_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT5R_VOL_LIM_SHIFT   0 /* OUT5R_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT5R_VOL_LIM_WIDTH   8 /* OUT5R_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT5R_NGATE_SRC_MASK   0x0FFF /* OUT5R_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT5R_NGATE_SRC_SHIFT   0 /* OUT5R_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT5R_NGATE_SRC_WIDTH   12 /* OUT5R_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT6_OSR   0x2000 /* OUT6_OSR */
 
#define ARIZONA_OUT6_OSR_MASK   0x2000 /* OUT6_OSR */
 
#define ARIZONA_OUT6_OSR_SHIFT   13 /* OUT6_OSR */
 
#define ARIZONA_OUT6_OSR_WIDTH   1 /* OUT6_OSR */
 
#define ARIZONA_OUT6L_ANC_SRC_MASK   0x0C00 /* OUT6L_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT6L_ANC_SRC_SHIFT   10 /* OUT6L_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT6L_ANC_SRC_WIDTH   2 /* OUT6L_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */
 
#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */
 
#define ARIZONA_OUT6L_MUTE   0x0100 /* OUT6L_MUTE */
 
#define ARIZONA_OUT6L_MUTE_MASK   0x0100 /* OUT6L_MUTE */
 
#define ARIZONA_OUT6L_MUTE_SHIFT   8 /* OUT6L_MUTE */
 
#define ARIZONA_OUT6L_MUTE_WIDTH   1 /* OUT6L_MUTE */
 
#define ARIZONA_OUT6L_VOL_MASK   0x00FF /* OUT6L_VOL - [7:0] */
 
#define ARIZONA_OUT6L_VOL_SHIFT   0 /* OUT6L_VOL - [7:0] */
 
#define ARIZONA_OUT6L_VOL_WIDTH   8 /* OUT6L_VOL - [7:0] */
 
#define ARIZONA_OUT6L_VOL_LIM_MASK   0x00FF /* OUT6L_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT6L_VOL_LIM_SHIFT   0 /* OUT6L_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT6L_VOL_LIM_WIDTH   8 /* OUT6L_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT6L_NGATE_SRC_MASK   0x0FFF /* OUT6L_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT6L_NGATE_SRC_SHIFT   0 /* OUT6L_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT6L_NGATE_SRC_WIDTH   12 /* OUT6L_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT6R_ANC_SRC_MASK   0x0C00 /* OUT6R_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT6R_ANC_SRC_SHIFT   10 /* OUT6R_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT6R_ANC_SRC_WIDTH   2 /* OUT6R_ANC_SRC - [11:10] */
 
#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */
 
#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */
 
#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */
 
#define ARIZONA_OUT6R_MUTE   0x0100 /* OUT6R_MUTE */
 
#define ARIZONA_OUT6R_MUTE_MASK   0x0100 /* OUT6R_MUTE */
 
#define ARIZONA_OUT6R_MUTE_SHIFT   8 /* OUT6R_MUTE */
 
#define ARIZONA_OUT6R_MUTE_WIDTH   1 /* OUT6R_MUTE */
 
#define ARIZONA_OUT6R_VOL_MASK   0x00FF /* OUT6R_VOL - [7:0] */
 
#define ARIZONA_OUT6R_VOL_SHIFT   0 /* OUT6R_VOL - [7:0] */
 
#define ARIZONA_OUT6R_VOL_WIDTH   8 /* OUT6R_VOL - [7:0] */
 
#define ARIZONA_OUT6R_VOL_LIM_MASK   0x00FF /* OUT6R_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT6R_VOL_LIM_SHIFT   0 /* OUT6R_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT6R_VOL_LIM_WIDTH   8 /* OUT6R_VOL_LIM - [7:0] */
 
#define ARIZONA_OUT6R_NGATE_SRC_MASK   0x0FFF /* OUT6R_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT6R_NGATE_SRC_SHIFT   0 /* OUT6R_NGATE_SRC - [11:0] */
 
#define ARIZONA_OUT6R_NGATE_SRC_WIDTH   12 /* OUT6R_NGATE_SRC - [11:0] */
 
#define ARIZONA_AEC_LOOPBACK_SRC_MASK   0x003C /* AEC_LOOPBACK_SRC - [5:2] */
 
#define ARIZONA_AEC_LOOPBACK_SRC_SHIFT   2 /* AEC_LOOPBACK_SRC - [5:2] */
 
#define ARIZONA_AEC_LOOPBACK_SRC_WIDTH   4 /* AEC_LOOPBACK_SRC - [5:2] */
 
#define ARIZONA_AEC_ENA_STS   0x0002 /* AEC_ENA_STS */
 
#define ARIZONA_AEC_ENA_STS_MASK   0x0002 /* AEC_ENA_STS */
 
#define ARIZONA_AEC_ENA_STS_SHIFT   1 /* AEC_ENA_STS */
 
#define ARIZONA_AEC_ENA_STS_WIDTH   1 /* AEC_ENA_STS */
 
#define ARIZONA_AEC_LOOPBACK_ENA   0x0001 /* AEC_LOOPBACK_ENA */
 
#define ARIZONA_AEC_LOOPBACK_ENA_MASK   0x0001 /* AEC_LOOPBACK_ENA */
 
#define ARIZONA_AEC_LOOPBACK_ENA_SHIFT   0 /* AEC_LOOPBACK_ENA */
 
#define ARIZONA_AEC_LOOPBACK_ENA_WIDTH   1 /* AEC_LOOPBACK_ENA */
 
#define ARIZONA_NGATE_HOLD_MASK   0x0030 /* NGATE_HOLD - [5:4] */
 
#define ARIZONA_NGATE_HOLD_SHIFT   4 /* NGATE_HOLD - [5:4] */
 
#define ARIZONA_NGATE_HOLD_WIDTH   2 /* NGATE_HOLD - [5:4] */
 
#define ARIZONA_NGATE_THR_MASK   0x000E /* NGATE_THR - [3:1] */
 
#define ARIZONA_NGATE_THR_SHIFT   1 /* NGATE_THR - [3:1] */
 
#define ARIZONA_NGATE_THR_WIDTH   3 /* NGATE_THR - [3:1] */
 
#define ARIZONA_NGATE_ENA   0x0001 /* NGATE_ENA */
 
#define ARIZONA_NGATE_ENA_MASK   0x0001 /* NGATE_ENA */
 
#define ARIZONA_NGATE_ENA_SHIFT   0 /* NGATE_ENA */
 
#define ARIZONA_NGATE_ENA_WIDTH   1 /* NGATE_ENA */
 
#define ARIZONA_SPK1R_MUTE   0x2000 /* SPK1R_MUTE */
 
#define ARIZONA_SPK1R_MUTE_MASK   0x2000 /* SPK1R_MUTE */
 
#define ARIZONA_SPK1R_MUTE_SHIFT   13 /* SPK1R_MUTE */
 
#define ARIZONA_SPK1R_MUTE_WIDTH   1 /* SPK1R_MUTE */
 
#define ARIZONA_SPK1L_MUTE   0x1000 /* SPK1L_MUTE */
 
#define ARIZONA_SPK1L_MUTE_MASK   0x1000 /* SPK1L_MUTE */
 
#define ARIZONA_SPK1L_MUTE_SHIFT   12 /* SPK1L_MUTE */
 
#define ARIZONA_SPK1L_MUTE_WIDTH   1 /* SPK1L_MUTE */
 
#define ARIZONA_SPK1_MUTE_ENDIAN   0x0100 /* SPK1_MUTE_ENDIAN */
 
#define ARIZONA_SPK1_MUTE_ENDIAN_MASK   0x0100 /* SPK1_MUTE_ENDIAN */
 
#define ARIZONA_SPK1_MUTE_ENDIAN_SHIFT   8 /* SPK1_MUTE_ENDIAN */
 
#define ARIZONA_SPK1_MUTE_ENDIAN_WIDTH   1 /* SPK1_MUTE_ENDIAN */
 
#define ARIZONA_SPK1_MUTE_SEQ1_MASK   0x00FF /* SPK1_MUTE_SEQ1 - [7:0] */
 
#define ARIZONA_SPK1_MUTE_SEQ1_SHIFT   0 /* SPK1_MUTE_SEQ1 - [7:0] */
 
#define ARIZONA_SPK1_MUTE_SEQ1_WIDTH   8 /* SPK1_MUTE_SEQ1 - [7:0] */
 
#define ARIZONA_SPK1_FMT   0x0001 /* SPK1_FMT */
 
#define ARIZONA_SPK1_FMT_MASK   0x0001 /* SPK1_FMT */
 
#define ARIZONA_SPK1_FMT_SHIFT   0 /* SPK1_FMT */
 
#define ARIZONA_SPK1_FMT_WIDTH   1 /* SPK1_FMT */
 
#define ARIZONA_SPK2R_MUTE   0x2000 /* SPK2R_MUTE */
 
#define ARIZONA_SPK2R_MUTE_MASK   0x2000 /* SPK2R_MUTE */
 
#define ARIZONA_SPK2R_MUTE_SHIFT   13 /* SPK2R_MUTE */
 
#define ARIZONA_SPK2R_MUTE_WIDTH   1 /* SPK2R_MUTE */
 
#define ARIZONA_SPK2L_MUTE   0x1000 /* SPK2L_MUTE */
 
#define ARIZONA_SPK2L_MUTE_MASK   0x1000 /* SPK2L_MUTE */
 
#define ARIZONA_SPK2L_MUTE_SHIFT   12 /* SPK2L_MUTE */
 
#define ARIZONA_SPK2L_MUTE_WIDTH   1 /* SPK2L_MUTE */
 
#define ARIZONA_SPK2_MUTE_ENDIAN   0x0100 /* SPK2_MUTE_ENDIAN */
 
#define ARIZONA_SPK2_MUTE_ENDIAN_MASK   0x0100 /* SPK2_MUTE_ENDIAN */
 
#define ARIZONA_SPK2_MUTE_ENDIAN_SHIFT   8 /* SPK2_MUTE_ENDIAN */
 
#define ARIZONA_SPK2_MUTE_ENDIAN_WIDTH   1 /* SPK2_MUTE_ENDIAN */
 
#define ARIZONA_SPK2_MUTE_SEQ_MASK   0x00FF /* SPK2_MUTE_SEQ - [7:0] */
 
#define ARIZONA_SPK2_MUTE_SEQ_SHIFT   0 /* SPK2_MUTE_SEQ - [7:0] */
 
#define ARIZONA_SPK2_MUTE_SEQ_WIDTH   8 /* SPK2_MUTE_SEQ - [7:0] */
 
#define ARIZONA_SPK2_FMT   0x0001 /* SPK2_FMT */
 
#define ARIZONA_SPK2_FMT_MASK   0x0001 /* SPK2_FMT */
 
#define ARIZONA_SPK2_FMT_SHIFT   0 /* SPK2_FMT */
 
#define ARIZONA_SPK2_FMT_WIDTH   1 /* SPK2_FMT */
 
#define ARIZONA_OUT_COMP_COEFF_MASK   0xFFFF /* OUT_COMP_COEFF - [15:0] */
 
#define ARIZONA_OUT_COMP_COEFF_SHIFT   0 /* OUT_COMP_COEFF - [15:0] */
 
#define ARIZONA_OUT_COMP_COEFF_WIDTH   16 /* OUT_COMP_COEFF - [15:0] */
 
#define ARIZONA_OUT_COMP_COEFF_1   0x0002 /* OUT_COMP_COEFF */
 
#define ARIZONA_OUT_COMP_COEFF_1_MASK   0x0002 /* OUT_COMP_COEFF */
 
#define ARIZONA_OUT_COMP_COEFF_1_SHIFT   1 /* OUT_COMP_COEFF */
 
#define ARIZONA_OUT_COMP_COEFF_1_WIDTH   1 /* OUT_COMP_COEFF */
 
#define ARIZONA_OUT_COMP_COEFF_SEL   0x0001 /* OUT_COMP_COEFF_SEL */
 
#define ARIZONA_OUT_COMP_COEFF_SEL_MASK   0x0001 /* OUT_COMP_COEFF_SEL */
 
#define ARIZONA_OUT_COMP_COEFF_SEL_SHIFT   0 /* OUT_COMP_COEFF_SEL */
 
#define ARIZONA_OUT_COMP_COEFF_SEL_WIDTH   1 /* OUT_COMP_COEFF_SEL */
 
#define ARIZONA_AEC_COMP_COEFF_MASK   0xFFFF /* AEC_COMP_COEFF - [15:0] */
 
#define ARIZONA_AEC_COMP_COEFF_SHIFT   0 /* AEC_COMP_COEFF - [15:0] */
 
#define ARIZONA_AEC_COMP_COEFF_WIDTH   16 /* AEC_COMP_COEFF - [15:0] */
 
#define ARIZONA_AEC_COMP_COEFF_1   0x0002 /* AEC_COMP_COEFF */
 
#define ARIZONA_AEC_COMP_COEFF_1_MASK   0x0002 /* AEC_COMP_COEFF */
 
#define ARIZONA_AEC_COMP_COEFF_1_SHIFT   1 /* AEC_COMP_COEFF */
 
#define ARIZONA_AEC_COMP_COEFF_1_WIDTH   1 /* AEC_COMP_COEFF */
 
#define ARIZONA_AEC_COMP_COEFF_SEL   0x0001 /* AEC_COMP_COEFF_SEL */
 
#define ARIZONA_AEC_COMP_COEFF_SEL_MASK   0x0001 /* AEC_COMP_COEFF_SEL */
 
#define ARIZONA_AEC_COMP_COEFF_SEL_SHIFT   0 /* AEC_COMP_COEFF_SEL */
 
#define ARIZONA_AEC_COMP_COEFF_SEL_WIDTH   1 /* AEC_COMP_COEFF_SEL */
 
#define ARIZONA_AIF1_BCLK_INV   0x0080 /* AIF1_BCLK_INV */
 
#define ARIZONA_AIF1_BCLK_INV_MASK   0x0080 /* AIF1_BCLK_INV */
 
#define ARIZONA_AIF1_BCLK_INV_SHIFT   7 /* AIF1_BCLK_INV */
 
#define ARIZONA_AIF1_BCLK_INV_WIDTH   1 /* AIF1_BCLK_INV */
 
#define ARIZONA_AIF1_BCLK_FRC   0x0040 /* AIF1_BCLK_FRC */
 
#define ARIZONA_AIF1_BCLK_FRC_MASK   0x0040 /* AIF1_BCLK_FRC */
 
#define ARIZONA_AIF1_BCLK_FRC_SHIFT   6 /* AIF1_BCLK_FRC */
 
#define ARIZONA_AIF1_BCLK_FRC_WIDTH   1 /* AIF1_BCLK_FRC */
 
#define ARIZONA_AIF1_BCLK_MSTR   0x0020 /* AIF1_BCLK_MSTR */
 
#define ARIZONA_AIF1_BCLK_MSTR_MASK   0x0020 /* AIF1_BCLK_MSTR */
 
#define ARIZONA_AIF1_BCLK_MSTR_SHIFT   5 /* AIF1_BCLK_MSTR */
 
#define ARIZONA_AIF1_BCLK_MSTR_WIDTH   1 /* AIF1_BCLK_MSTR */
 
#define ARIZONA_AIF1_BCLK_FREQ_MASK   0x001F /* AIF1_BCLK_FREQ - [4:0] */
 
#define ARIZONA_AIF1_BCLK_FREQ_SHIFT   0 /* AIF1_BCLK_FREQ - [4:0] */
 
#define ARIZONA_AIF1_BCLK_FREQ_WIDTH   5 /* AIF1_BCLK_FREQ - [4:0] */
 
#define ARIZONA_AIF1TX_DAT_TRI   0x0020 /* AIF1TX_DAT_TRI */
 
#define ARIZONA_AIF1TX_DAT_TRI_MASK   0x0020 /* AIF1TX_DAT_TRI */
 
#define ARIZONA_AIF1TX_DAT_TRI_SHIFT   5 /* AIF1TX_DAT_TRI */
 
#define ARIZONA_AIF1TX_DAT_TRI_WIDTH   1 /* AIF1TX_DAT_TRI */
 
#define ARIZONA_AIF1TX_LRCLK_SRC   0x0008 /* AIF1TX_LRCLK_SRC */
 
#define ARIZONA_AIF1TX_LRCLK_SRC_MASK   0x0008 /* AIF1TX_LRCLK_SRC */
 
#define ARIZONA_AIF1TX_LRCLK_SRC_SHIFT   3 /* AIF1TX_LRCLK_SRC */
 
#define ARIZONA_AIF1TX_LRCLK_SRC_WIDTH   1 /* AIF1TX_LRCLK_SRC */
 
#define ARIZONA_AIF1TX_LRCLK_INV   0x0004 /* AIF1TX_LRCLK_INV */
 
#define ARIZONA_AIF1TX_LRCLK_INV_MASK   0x0004 /* AIF1TX_LRCLK_INV */
 
#define ARIZONA_AIF1TX_LRCLK_INV_SHIFT   2 /* AIF1TX_LRCLK_INV */
 
#define ARIZONA_AIF1TX_LRCLK_INV_WIDTH   1 /* AIF1TX_LRCLK_INV */
 
#define ARIZONA_AIF1TX_LRCLK_FRC   0x0002 /* AIF1TX_LRCLK_FRC */
 
#define ARIZONA_AIF1TX_LRCLK_FRC_MASK   0x0002 /* AIF1TX_LRCLK_FRC */
 
#define ARIZONA_AIF1TX_LRCLK_FRC_SHIFT   1 /* AIF1TX_LRCLK_FRC */
 
#define ARIZONA_AIF1TX_LRCLK_FRC_WIDTH   1 /* AIF1TX_LRCLK_FRC */
 
#define ARIZONA_AIF1TX_LRCLK_MSTR   0x0001 /* AIF1TX_LRCLK_MSTR */
 
#define ARIZONA_AIF1TX_LRCLK_MSTR_MASK   0x0001 /* AIF1TX_LRCLK_MSTR */
 
#define ARIZONA_AIF1TX_LRCLK_MSTR_SHIFT   0 /* AIF1TX_LRCLK_MSTR */
 
#define ARIZONA_AIF1TX_LRCLK_MSTR_WIDTH   1 /* AIF1TX_LRCLK_MSTR */
 
#define ARIZONA_AIF1RX_LRCLK_INV   0x0004 /* AIF1RX_LRCLK_INV */
 
#define ARIZONA_AIF1RX_LRCLK_INV_MASK   0x0004 /* AIF1RX_LRCLK_INV */
 
#define ARIZONA_AIF1RX_LRCLK_INV_SHIFT   2 /* AIF1RX_LRCLK_INV */
 
#define ARIZONA_AIF1RX_LRCLK_INV_WIDTH   1 /* AIF1RX_LRCLK_INV */
 
#define ARIZONA_AIF1RX_LRCLK_FRC   0x0002 /* AIF1RX_LRCLK_FRC */
 
#define ARIZONA_AIF1RX_LRCLK_FRC_MASK   0x0002 /* AIF1RX_LRCLK_FRC */
 
#define ARIZONA_AIF1RX_LRCLK_FRC_SHIFT   1 /* AIF1RX_LRCLK_FRC */
 
#define ARIZONA_AIF1RX_LRCLK_FRC_WIDTH   1 /* AIF1RX_LRCLK_FRC */
 
#define ARIZONA_AIF1RX_LRCLK_MSTR   0x0001 /* AIF1RX_LRCLK_MSTR */
 
#define ARIZONA_AIF1RX_LRCLK_MSTR_MASK   0x0001 /* AIF1RX_LRCLK_MSTR */
 
#define ARIZONA_AIF1RX_LRCLK_MSTR_SHIFT   0 /* AIF1RX_LRCLK_MSTR */
 
#define ARIZONA_AIF1RX_LRCLK_MSTR_WIDTH   1 /* AIF1RX_LRCLK_MSTR */
 
#define ARIZONA_AIF1_RATE_MASK   0x7800 /* AIF1_RATE - [14:11] */
 
#define ARIZONA_AIF1_RATE_SHIFT   11 /* AIF1_RATE - [14:11] */
 
#define ARIZONA_AIF1_RATE_WIDTH   4 /* AIF1_RATE - [14:11] */
 
#define ARIZONA_AIF1_TRI   0x0040 /* AIF1_TRI */
 
#define ARIZONA_AIF1_TRI_MASK   0x0040 /* AIF1_TRI */
 
#define ARIZONA_AIF1_TRI_SHIFT   6 /* AIF1_TRI */
 
#define ARIZONA_AIF1_TRI_WIDTH   1 /* AIF1_TRI */
 
#define ARIZONA_AIF1_FMT_MASK   0x0007 /* AIF1_FMT - [2:0] */
 
#define ARIZONA_AIF1_FMT_SHIFT   0 /* AIF1_FMT - [2:0] */
 
#define ARIZONA_AIF1_FMT_WIDTH   3 /* AIF1_FMT - [2:0] */
 
#define ARIZONA_AIF1TX_BCPF_MASK   0x1FFF /* AIF1TX_BCPF - [12:0] */
 
#define ARIZONA_AIF1TX_BCPF_SHIFT   0 /* AIF1TX_BCPF - [12:0] */
 
#define ARIZONA_AIF1TX_BCPF_WIDTH   13 /* AIF1TX_BCPF - [12:0] */
 
#define ARIZONA_AIF1RX_BCPF_MASK   0x1FFF /* AIF1RX_BCPF - [12:0] */
 
#define ARIZONA_AIF1RX_BCPF_SHIFT   0 /* AIF1RX_BCPF - [12:0] */
 
#define ARIZONA_AIF1RX_BCPF_WIDTH   13 /* AIF1RX_BCPF - [12:0] */
 
#define ARIZONA_AIF1TX_WL_MASK   0x3F00 /* AIF1TX_WL - [13:8] */
 
#define ARIZONA_AIF1TX_WL_SHIFT   8 /* AIF1TX_WL - [13:8] */
 
#define ARIZONA_AIF1TX_WL_WIDTH   6 /* AIF1TX_WL - [13:8] */
 
#define ARIZONA_AIF1TX_SLOT_LEN_MASK   0x00FF /* AIF1TX_SLOT_LEN - [7:0] */
 
#define ARIZONA_AIF1TX_SLOT_LEN_SHIFT   0 /* AIF1TX_SLOT_LEN - [7:0] */
 
#define ARIZONA_AIF1TX_SLOT_LEN_WIDTH   8 /* AIF1TX_SLOT_LEN - [7:0] */
 
#define ARIZONA_AIF1RX_WL_MASK   0x3F00 /* AIF1RX_WL - [13:8] */
 
#define ARIZONA_AIF1RX_WL_SHIFT   8 /* AIF1RX_WL - [13:8] */
 
#define ARIZONA_AIF1RX_WL_WIDTH   6 /* AIF1RX_WL - [13:8] */
 
#define ARIZONA_AIF1RX_SLOT_LEN_MASK   0x00FF /* AIF1RX_SLOT_LEN - [7:0] */
 
#define ARIZONA_AIF1RX_SLOT_LEN_SHIFT   0 /* AIF1RX_SLOT_LEN - [7:0] */
 
#define ARIZONA_AIF1RX_SLOT_LEN_WIDTH   8 /* AIF1RX_SLOT_LEN - [7:0] */
 
#define ARIZONA_AIF1TX1_SLOT_MASK   0x003F /* AIF1TX1_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX1_SLOT_SHIFT   0 /* AIF1TX1_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX1_SLOT_WIDTH   6 /* AIF1TX1_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX2_SLOT_MASK   0x003F /* AIF1TX2_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX2_SLOT_SHIFT   0 /* AIF1TX2_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX2_SLOT_WIDTH   6 /* AIF1TX2_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX3_SLOT_MASK   0x003F /* AIF1TX3_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX3_SLOT_SHIFT   0 /* AIF1TX3_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX3_SLOT_WIDTH   6 /* AIF1TX3_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX4_SLOT_MASK   0x003F /* AIF1TX4_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX4_SLOT_SHIFT   0 /* AIF1TX4_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX4_SLOT_WIDTH   6 /* AIF1TX4_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX5_SLOT_MASK   0x003F /* AIF1TX5_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX5_SLOT_SHIFT   0 /* AIF1TX5_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX5_SLOT_WIDTH   6 /* AIF1TX5_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX6_SLOT_MASK   0x003F /* AIF1TX6_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX6_SLOT_SHIFT   0 /* AIF1TX6_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX6_SLOT_WIDTH   6 /* AIF1TX6_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX7_SLOT_MASK   0x003F /* AIF1TX7_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX7_SLOT_SHIFT   0 /* AIF1TX7_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX7_SLOT_WIDTH   6 /* AIF1TX7_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX8_SLOT_MASK   0x003F /* AIF1TX8_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX8_SLOT_SHIFT   0 /* AIF1TX8_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX8_SLOT_WIDTH   6 /* AIF1TX8_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX1_SLOT_MASK   0x003F /* AIF1RX1_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX1_SLOT_SHIFT   0 /* AIF1RX1_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX1_SLOT_WIDTH   6 /* AIF1RX1_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX2_SLOT_MASK   0x003F /* AIF1RX2_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX2_SLOT_SHIFT   0 /* AIF1RX2_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX2_SLOT_WIDTH   6 /* AIF1RX2_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX3_SLOT_MASK   0x003F /* AIF1RX3_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX3_SLOT_SHIFT   0 /* AIF1RX3_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX3_SLOT_WIDTH   6 /* AIF1RX3_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX4_SLOT_MASK   0x003F /* AIF1RX4_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX4_SLOT_SHIFT   0 /* AIF1RX4_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX4_SLOT_WIDTH   6 /* AIF1RX4_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX5_SLOT_MASK   0x003F /* AIF1RX5_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX5_SLOT_SHIFT   0 /* AIF1RX5_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX5_SLOT_WIDTH   6 /* AIF1RX5_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX6_SLOT_MASK   0x003F /* AIF1RX6_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX6_SLOT_SHIFT   0 /* AIF1RX6_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX6_SLOT_WIDTH   6 /* AIF1RX6_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX7_SLOT_MASK   0x003F /* AIF1RX7_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX7_SLOT_SHIFT   0 /* AIF1RX7_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX7_SLOT_WIDTH   6 /* AIF1RX7_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX8_SLOT_MASK   0x003F /* AIF1RX8_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX8_SLOT_SHIFT   0 /* AIF1RX8_SLOT - [5:0] */
 
#define ARIZONA_AIF1RX8_SLOT_WIDTH   6 /* AIF1RX8_SLOT - [5:0] */
 
#define ARIZONA_AIF1TX8_ENA   0x0080 /* AIF1TX8_ENA */
 
#define ARIZONA_AIF1TX8_ENA_MASK   0x0080 /* AIF1TX8_ENA */
 
#define ARIZONA_AIF1TX8_ENA_SHIFT   7 /* AIF1TX8_ENA */
 
#define ARIZONA_AIF1TX8_ENA_WIDTH   1 /* AIF1TX8_ENA */
 
#define ARIZONA_AIF1TX7_ENA   0x0040 /* AIF1TX7_ENA */
 
#define ARIZONA_AIF1TX7_ENA_MASK   0x0040 /* AIF1TX7_ENA */
 
#define ARIZONA_AIF1TX7_ENA_SHIFT   6 /* AIF1TX7_ENA */
 
#define ARIZONA_AIF1TX7_ENA_WIDTH   1 /* AIF1TX7_ENA */
 
#define ARIZONA_AIF1TX6_ENA   0x0020 /* AIF1TX6_ENA */
 
#define ARIZONA_AIF1TX6_ENA_MASK   0x0020 /* AIF1TX6_ENA */
 
#define ARIZONA_AIF1TX6_ENA_SHIFT   5 /* AIF1TX6_ENA */
 
#define ARIZONA_AIF1TX6_ENA_WIDTH   1 /* AIF1TX6_ENA */
 
#define ARIZONA_AIF1TX5_ENA   0x0010 /* AIF1TX5_ENA */
 
#define ARIZONA_AIF1TX5_ENA_MASK   0x0010 /* AIF1TX5_ENA */
 
#define ARIZONA_AIF1TX5_ENA_SHIFT   4 /* AIF1TX5_ENA */
 
#define ARIZONA_AIF1TX5_ENA_WIDTH   1 /* AIF1TX5_ENA */
 
#define ARIZONA_AIF1TX4_ENA   0x0008 /* AIF1TX4_ENA */
 
#define ARIZONA_AIF1TX4_ENA_MASK   0x0008 /* AIF1TX4_ENA */
 
#define ARIZONA_AIF1TX4_ENA_SHIFT   3 /* AIF1TX4_ENA */
 
#define ARIZONA_AIF1TX4_ENA_WIDTH   1 /* AIF1TX4_ENA */
 
#define ARIZONA_AIF1TX3_ENA   0x0004 /* AIF1TX3_ENA */
 
#define ARIZONA_AIF1TX3_ENA_MASK   0x0004 /* AIF1TX3_ENA */
 
#define ARIZONA_AIF1TX3_ENA_SHIFT   2 /* AIF1TX3_ENA */
 
#define ARIZONA_AIF1TX3_ENA_WIDTH   1 /* AIF1TX3_ENA */
 
#define ARIZONA_AIF1TX2_ENA   0x0002 /* AIF1TX2_ENA */
 
#define ARIZONA_AIF1TX2_ENA_MASK   0x0002 /* AIF1TX2_ENA */
 
#define ARIZONA_AIF1TX2_ENA_SHIFT   1 /* AIF1TX2_ENA */
 
#define ARIZONA_AIF1TX2_ENA_WIDTH   1 /* AIF1TX2_ENA */
 
#define ARIZONA_AIF1TX1_ENA   0x0001 /* AIF1TX1_ENA */
 
#define ARIZONA_AIF1TX1_ENA_MASK   0x0001 /* AIF1TX1_ENA */
 
#define ARIZONA_AIF1TX1_ENA_SHIFT   0 /* AIF1TX1_ENA */
 
#define ARIZONA_AIF1TX1_ENA_WIDTH   1 /* AIF1TX1_ENA */
 
#define ARIZONA_AIF1RX8_ENA   0x0080 /* AIF1RX8_ENA */
 
#define ARIZONA_AIF1RX8_ENA_MASK   0x0080 /* AIF1RX8_ENA */
 
#define ARIZONA_AIF1RX8_ENA_SHIFT   7 /* AIF1RX8_ENA */
 
#define ARIZONA_AIF1RX8_ENA_WIDTH   1 /* AIF1RX8_ENA */
 
#define ARIZONA_AIF1RX7_ENA   0x0040 /* AIF1RX7_ENA */
 
#define ARIZONA_AIF1RX7_ENA_MASK   0x0040 /* AIF1RX7_ENA */
 
#define ARIZONA_AIF1RX7_ENA_SHIFT   6 /* AIF1RX7_ENA */
 
#define ARIZONA_AIF1RX7_ENA_WIDTH   1 /* AIF1RX7_ENA */
 
#define ARIZONA_AIF1RX6_ENA   0x0020 /* AIF1RX6_ENA */
 
#define ARIZONA_AIF1RX6_ENA_MASK   0x0020 /* AIF1RX6_ENA */
 
#define ARIZONA_AIF1RX6_ENA_SHIFT   5 /* AIF1RX6_ENA */
 
#define ARIZONA_AIF1RX6_ENA_WIDTH   1 /* AIF1RX6_ENA */
 
#define ARIZONA_AIF1RX5_ENA   0x0010 /* AIF1RX5_ENA */
 
#define ARIZONA_AIF1RX5_ENA_MASK   0x0010 /* AIF1RX5_ENA */
 
#define ARIZONA_AIF1RX5_ENA_SHIFT   4 /* AIF1RX5_ENA */
 
#define ARIZONA_AIF1RX5_ENA_WIDTH   1 /* AIF1RX5_ENA */
 
#define ARIZONA_AIF1RX4_ENA   0x0008 /* AIF1RX4_ENA */
 
#define ARIZONA_AIF1RX4_ENA_MASK   0x0008 /* AIF1RX4_ENA */
 
#define ARIZONA_AIF1RX4_ENA_SHIFT   3 /* AIF1RX4_ENA */
 
#define ARIZONA_AIF1RX4_ENA_WIDTH   1 /* AIF1RX4_ENA */
 
#define ARIZONA_AIF1RX3_ENA   0x0004 /* AIF1RX3_ENA */
 
#define ARIZONA_AIF1RX3_ENA_MASK   0x0004 /* AIF1RX3_ENA */
 
#define ARIZONA_AIF1RX3_ENA_SHIFT   2 /* AIF1RX3_ENA */
 
#define ARIZONA_AIF1RX3_ENA_WIDTH   1 /* AIF1RX3_ENA */
 
#define ARIZONA_AIF1RX2_ENA   0x0002 /* AIF1RX2_ENA */
 
#define ARIZONA_AIF1RX2_ENA_MASK   0x0002 /* AIF1RX2_ENA */
 
#define ARIZONA_AIF1RX2_ENA_SHIFT   1 /* AIF1RX2_ENA */
 
#define ARIZONA_AIF1RX2_ENA_WIDTH   1 /* AIF1RX2_ENA */
 
#define ARIZONA_AIF1RX1_ENA   0x0001 /* AIF1RX1_ENA */
 
#define ARIZONA_AIF1RX1_ENA_MASK   0x0001 /* AIF1RX1_ENA */
 
#define ARIZONA_AIF1RX1_ENA_SHIFT   0 /* AIF1RX1_ENA */
 
#define ARIZONA_AIF1RX1_ENA_WIDTH   1 /* AIF1RX1_ENA */
 
#define ARIZONA_AIF1_FRC_WR   0x0001 /* AIF1_FRC_WR */
 
#define ARIZONA_AIF1_FRC_WR_MASK   0x0001 /* AIF1_FRC_WR */
 
#define ARIZONA_AIF1_FRC_WR_SHIFT   0 /* AIF1_FRC_WR */
 
#define ARIZONA_AIF1_FRC_WR_WIDTH   1 /* AIF1_FRC_WR */
 
#define ARIZONA_AIF2_BCLK_INV   0x0080 /* AIF2_BCLK_INV */
 
#define ARIZONA_AIF2_BCLK_INV_MASK   0x0080 /* AIF2_BCLK_INV */
 
#define ARIZONA_AIF2_BCLK_INV_SHIFT   7 /* AIF2_BCLK_INV */
 
#define ARIZONA_AIF2_BCLK_INV_WIDTH   1 /* AIF2_BCLK_INV */
 
#define ARIZONA_AIF2_BCLK_FRC   0x0040 /* AIF2_BCLK_FRC */
 
#define ARIZONA_AIF2_BCLK_FRC_MASK   0x0040 /* AIF2_BCLK_FRC */
 
#define ARIZONA_AIF2_BCLK_FRC_SHIFT   6 /* AIF2_BCLK_FRC */
 
#define ARIZONA_AIF2_BCLK_FRC_WIDTH   1 /* AIF2_BCLK_FRC */
 
#define ARIZONA_AIF2_BCLK_MSTR   0x0020 /* AIF2_BCLK_MSTR */
 
#define ARIZONA_AIF2_BCLK_MSTR_MASK   0x0020 /* AIF2_BCLK_MSTR */
 
#define ARIZONA_AIF2_BCLK_MSTR_SHIFT   5 /* AIF2_BCLK_MSTR */
 
#define ARIZONA_AIF2_BCLK_MSTR_WIDTH   1 /* AIF2_BCLK_MSTR */
 
#define ARIZONA_AIF2_BCLK_FREQ_MASK   0x001F /* AIF2_BCLK_FREQ - [4:0] */
 
#define ARIZONA_AIF2_BCLK_FREQ_SHIFT   0 /* AIF2_BCLK_FREQ - [4:0] */
 
#define ARIZONA_AIF2_BCLK_FREQ_WIDTH   5 /* AIF2_BCLK_FREQ - [4:0] */
 
#define ARIZONA_AIF2TX_DAT_TRI   0x0020 /* AIF2TX_DAT_TRI */
 
#define ARIZONA_AIF2TX_DAT_TRI_MASK   0x0020 /* AIF2TX_DAT_TRI */
 
#define ARIZONA_AIF2TX_DAT_TRI_SHIFT   5 /* AIF2TX_DAT_TRI */
 
#define ARIZONA_AIF2TX_DAT_TRI_WIDTH   1 /* AIF2TX_DAT_TRI */
 
#define ARIZONA_AIF2TX_LRCLK_SRC   0x0008 /* AIF2TX_LRCLK_SRC */
 
#define ARIZONA_AIF2TX_LRCLK_SRC_MASK   0x0008 /* AIF2TX_LRCLK_SRC */
 
#define ARIZONA_AIF2TX_LRCLK_SRC_SHIFT   3 /* AIF2TX_LRCLK_SRC */
 
#define ARIZONA_AIF2TX_LRCLK_SRC_WIDTH   1 /* AIF2TX_LRCLK_SRC */
 
#define ARIZONA_AIF2TX_LRCLK_INV   0x0004 /* AIF2TX_LRCLK_INV */
 
#define ARIZONA_AIF2TX_LRCLK_INV_MASK   0x0004 /* AIF2TX_LRCLK_INV */
 
#define ARIZONA_AIF2TX_LRCLK_INV_SHIFT   2 /* AIF2TX_LRCLK_INV */
 
#define ARIZONA_AIF2TX_LRCLK_INV_WIDTH   1 /* AIF2TX_LRCLK_INV */
 
#define ARIZONA_AIF2TX_LRCLK_FRC   0x0002 /* AIF2TX_LRCLK_FRC */
 
#define ARIZONA_AIF2TX_LRCLK_FRC_MASK   0x0002 /* AIF2TX_LRCLK_FRC */
 
#define ARIZONA_AIF2TX_LRCLK_FRC_SHIFT   1 /* AIF2TX_LRCLK_FRC */
 
#define ARIZONA_AIF2TX_LRCLK_FRC_WIDTH   1 /* AIF2TX_LRCLK_FRC */
 
#define ARIZONA_AIF2TX_LRCLK_MSTR   0x0001 /* AIF2TX_LRCLK_MSTR */
 
#define ARIZONA_AIF2TX_LRCLK_MSTR_MASK   0x0001 /* AIF2TX_LRCLK_MSTR */
 
#define ARIZONA_AIF2TX_LRCLK_MSTR_SHIFT   0 /* AIF2TX_LRCLK_MSTR */
 
#define ARIZONA_AIF2TX_LRCLK_MSTR_WIDTH   1 /* AIF2TX_LRCLK_MSTR */
 
#define ARIZONA_AIF2RX_LRCLK_INV   0x0004 /* AIF2RX_LRCLK_INV */
 
#define ARIZONA_AIF2RX_LRCLK_INV_MASK   0x0004 /* AIF2RX_LRCLK_INV */
 
#define ARIZONA_AIF2RX_LRCLK_INV_SHIFT   2 /* AIF2RX_LRCLK_INV */
 
#define ARIZONA_AIF2RX_LRCLK_INV_WIDTH   1 /* AIF2RX_LRCLK_INV */
 
#define ARIZONA_AIF2RX_LRCLK_FRC   0x0002 /* AIF2RX_LRCLK_FRC */
 
#define ARIZONA_AIF2RX_LRCLK_FRC_MASK   0x0002 /* AIF2RX_LRCLK_FRC */
 
#define ARIZONA_AIF2RX_LRCLK_FRC_SHIFT   1 /* AIF2RX_LRCLK_FRC */
 
#define ARIZONA_AIF2RX_LRCLK_FRC_WIDTH   1 /* AIF2RX_LRCLK_FRC */
 
#define ARIZONA_AIF2RX_LRCLK_MSTR   0x0001 /* AIF2RX_LRCLK_MSTR */
 
#define ARIZONA_AIF2RX_LRCLK_MSTR_MASK   0x0001 /* AIF2RX_LRCLK_MSTR */
 
#define ARIZONA_AIF2RX_LRCLK_MSTR_SHIFT   0 /* AIF2RX_LRCLK_MSTR */
 
#define ARIZONA_AIF2RX_LRCLK_MSTR_WIDTH   1 /* AIF2RX_LRCLK_MSTR */
 
#define ARIZONA_AIF2_RATE_MASK   0x7800 /* AIF2_RATE - [14:11] */
 
#define ARIZONA_AIF2_RATE_SHIFT   11 /* AIF2_RATE - [14:11] */
 
#define ARIZONA_AIF2_RATE_WIDTH   4 /* AIF2_RATE - [14:11] */
 
#define ARIZONA_AIF2_TRI   0x0040 /* AIF2_TRI */
 
#define ARIZONA_AIF2_TRI_MASK   0x0040 /* AIF2_TRI */
 
#define ARIZONA_AIF2_TRI_SHIFT   6 /* AIF2_TRI */
 
#define ARIZONA_AIF2_TRI_WIDTH   1 /* AIF2_TRI */
 
#define ARIZONA_AIF2_FMT_MASK   0x0007 /* AIF2_FMT - [2:0] */
 
#define ARIZONA_AIF2_FMT_SHIFT   0 /* AIF2_FMT - [2:0] */
 
#define ARIZONA_AIF2_FMT_WIDTH   3 /* AIF2_FMT - [2:0] */
 
#define ARIZONA_AIF2TX_BCPF_MASK   0x1FFF /* AIF2TX_BCPF - [12:0] */
 
#define ARIZONA_AIF2TX_BCPF_SHIFT   0 /* AIF2TX_BCPF - [12:0] */
 
#define ARIZONA_AIF2TX_BCPF_WIDTH   13 /* AIF2TX_BCPF - [12:0] */
 
#define ARIZONA_AIF2RX_BCPF_MASK   0x1FFF /* AIF2RX_BCPF - [12:0] */
 
#define ARIZONA_AIF2RX_BCPF_SHIFT   0 /* AIF2RX_BCPF - [12:0] */
 
#define ARIZONA_AIF2RX_BCPF_WIDTH   13 /* AIF2RX_BCPF - [12:0] */
 
#define ARIZONA_AIF2TX_WL_MASK   0x3F00 /* AIF2TX_WL - [13:8] */
 
#define ARIZONA_AIF2TX_WL_SHIFT   8 /* AIF2TX_WL - [13:8] */
 
#define ARIZONA_AIF2TX_WL_WIDTH   6 /* AIF2TX_WL - [13:8] */
 
#define ARIZONA_AIF2TX_SLOT_LEN_MASK   0x00FF /* AIF2TX_SLOT_LEN - [7:0] */
 
#define ARIZONA_AIF2TX_SLOT_LEN_SHIFT   0 /* AIF2TX_SLOT_LEN - [7:0] */
 
#define ARIZONA_AIF2TX_SLOT_LEN_WIDTH   8 /* AIF2TX_SLOT_LEN - [7:0] */
 
#define ARIZONA_AIF2RX_WL_MASK   0x3F00 /* AIF2RX_WL - [13:8] */
 
#define ARIZONA_AIF2RX_WL_SHIFT   8 /* AIF2RX_WL - [13:8] */
 
#define ARIZONA_AIF2RX_WL_WIDTH   6 /* AIF2RX_WL - [13:8] */
 
#define ARIZONA_AIF2RX_SLOT_LEN_MASK   0x00FF /* AIF2RX_SLOT_LEN - [7:0] */
 
#define ARIZONA_AIF2RX_SLOT_LEN_SHIFT   0 /* AIF2RX_SLOT_LEN - [7:0] */
 
#define ARIZONA_AIF2RX_SLOT_LEN_WIDTH   8 /* AIF2RX_SLOT_LEN - [7:0] */
 
#define ARIZONA_AIF2TX1_SLOT_MASK   0x003F /* AIF2TX1_SLOT - [5:0] */
 
#define ARIZONA_AIF2TX1_SLOT_SHIFT   0 /* AIF2TX1_SLOT - [5:0] */
 
#define ARIZONA_AIF2TX1_SLOT_WIDTH   6 /* AIF2TX1_SLOT - [5:0] */
 
#define ARIZONA_AIF2TX2_SLOT_MASK   0x003F /* AIF2TX2_SLOT - [5:0] */
 
#define ARIZONA_AIF2TX2_SLOT_SHIFT   0 /* AIF2TX2_SLOT - [5:0] */
 
#define ARIZONA_AIF2TX2_SLOT_WIDTH   6 /* AIF2TX2_SLOT - [5:0] */
 
#define ARIZONA_AIF2RX1_SLOT_MASK   0x003F /* AIF2RX1_SLOT - [5:0] */
 
#define ARIZONA_AIF2RX1_SLOT_SHIFT   0 /* AIF2RX1_SLOT - [5:0] */
 
#define ARIZONA_AIF2RX1_SLOT_WIDTH   6 /* AIF2RX1_SLOT - [5:0] */
 
#define ARIZONA_AIF2RX2_SLOT_MASK   0x003F /* AIF2RX2_SLOT - [5:0] */
 
#define ARIZONA_AIF2RX2_SLOT_SHIFT   0 /* AIF2RX2_SLOT - [5:0] */
 
#define ARIZONA_AIF2RX2_SLOT_WIDTH   6 /* AIF2RX2_SLOT - [5:0] */
 
#define ARIZONA_AIF2TX2_ENA   0x0002 /* AIF2TX2_ENA */
 
#define ARIZONA_AIF2TX2_ENA_MASK   0x0002 /* AIF2TX2_ENA */
 
#define ARIZONA_AIF2TX2_ENA_SHIFT   1 /* AIF2TX2_ENA */
 
#define ARIZONA_AIF2TX2_ENA_WIDTH   1 /* AIF2TX2_ENA */
 
#define ARIZONA_AIF2TX1_ENA   0x0001 /* AIF2TX1_ENA */
 
#define ARIZONA_AIF2TX1_ENA_MASK   0x0001 /* AIF2TX1_ENA */
 
#define ARIZONA_AIF2TX1_ENA_SHIFT   0 /* AIF2TX1_ENA */
 
#define ARIZONA_AIF2TX1_ENA_WIDTH   1 /* AIF2TX1_ENA */
 
#define ARIZONA_AIF2RX2_ENA   0x0002 /* AIF2RX2_ENA */
 
#define ARIZONA_AIF2RX2_ENA_MASK   0x0002 /* AIF2RX2_ENA */
 
#define ARIZONA_AIF2RX2_ENA_SHIFT   1 /* AIF2RX2_ENA */
 
#define ARIZONA_AIF2RX2_ENA_WIDTH   1 /* AIF2RX2_ENA */
 
#define ARIZONA_AIF2RX1_ENA   0x0001 /* AIF2RX1_ENA */
 
#define ARIZONA_AIF2RX1_ENA_MASK   0x0001 /* AIF2RX1_ENA */
 
#define ARIZONA_AIF2RX1_ENA_SHIFT   0 /* AIF2RX1_ENA */
 
#define ARIZONA_AIF2RX1_ENA_WIDTH   1 /* AIF2RX1_ENA */
 
#define ARIZONA_AIF2_FRC_WR   0x0001 /* AIF2_FRC_WR */
 
#define ARIZONA_AIF2_FRC_WR_MASK   0x0001 /* AIF2_FRC_WR */
 
#define ARIZONA_AIF2_FRC_WR_SHIFT   0 /* AIF2_FRC_WR */
 
#define ARIZONA_AIF2_FRC_WR_WIDTH   1 /* AIF2_FRC_WR */
 
#define ARIZONA_AIF3_BCLK_INV   0x0080 /* AIF3_BCLK_INV */
 
#define ARIZONA_AIF3_BCLK_INV_MASK   0x0080 /* AIF3_BCLK_INV */
 
#define ARIZONA_AIF3_BCLK_INV_SHIFT   7 /* AIF3_BCLK_INV */
 
#define ARIZONA_AIF3_BCLK_INV_WIDTH   1 /* AIF3_BCLK_INV */
 
#define ARIZONA_AIF3_BCLK_FRC   0x0040 /* AIF3_BCLK_FRC */
 
#define ARIZONA_AIF3_BCLK_FRC_MASK   0x0040 /* AIF3_BCLK_FRC */
 
#define ARIZONA_AIF3_BCLK_FRC_SHIFT   6 /* AIF3_BCLK_FRC */
 
#define ARIZONA_AIF3_BCLK_FRC_WIDTH   1 /* AIF3_BCLK_FRC */
 
#define ARIZONA_AIF3_BCLK_MSTR   0x0020 /* AIF3_BCLK_MSTR */
 
#define ARIZONA_AIF3_BCLK_MSTR_MASK   0x0020 /* AIF3_BCLK_MSTR */
 
#define ARIZONA_AIF3_BCLK_MSTR_SHIFT   5 /* AIF3_BCLK_MSTR */
 
#define ARIZONA_AIF3_BCLK_MSTR_WIDTH   1 /* AIF3_BCLK_MSTR */
 
#define ARIZONA_AIF3_BCLK_FREQ_MASK   0x001F /* AIF3_BCLK_FREQ - [4:0] */
 
#define ARIZONA_AIF3_BCLK_FREQ_SHIFT   0 /* AIF3_BCLK_FREQ - [4:0] */
 
#define ARIZONA_AIF3_BCLK_FREQ_WIDTH   5 /* AIF3_BCLK_FREQ - [4:0] */
 
#define ARIZONA_AIF3TX_DAT_TRI   0x0020 /* AIF3TX_DAT_TRI */
 
#define ARIZONA_AIF3TX_DAT_TRI_MASK   0x0020 /* AIF3TX_DAT_TRI */
 
#define ARIZONA_AIF3TX_DAT_TRI_SHIFT   5 /* AIF3TX_DAT_TRI */
 
#define ARIZONA_AIF3TX_DAT_TRI_WIDTH   1 /* AIF3TX_DAT_TRI */
 
#define ARIZONA_AIF3TX_LRCLK_SRC   0x0008 /* AIF3TX_LRCLK_SRC */
 
#define ARIZONA_AIF3TX_LRCLK_SRC_MASK   0x0008 /* AIF3TX_LRCLK_SRC */
 
#define ARIZONA_AIF3TX_LRCLK_SRC_SHIFT   3 /* AIF3TX_LRCLK_SRC */
 
#define ARIZONA_AIF3TX_LRCLK_SRC_WIDTH   1 /* AIF3TX_LRCLK_SRC */
 
#define ARIZONA_AIF3TX_LRCLK_INV   0x0004 /* AIF3TX_LRCLK_INV */
 
#define ARIZONA_AIF3TX_LRCLK_INV_MASK   0x0004 /* AIF3TX_LRCLK_INV */
 
#define ARIZONA_AIF3TX_LRCLK_INV_SHIFT   2 /* AIF3TX_LRCLK_INV */
 
#define ARIZONA_AIF3TX_LRCLK_INV_WIDTH   1 /* AIF3TX_LRCLK_INV */
 
#define ARIZONA_AIF3TX_LRCLK_FRC   0x0002 /* AIF3TX_LRCLK_FRC */
 
#define ARIZONA_AIF3TX_LRCLK_FRC_MASK   0x0002 /* AIF3TX_LRCLK_FRC */
 
#define ARIZONA_AIF3TX_LRCLK_FRC_SHIFT   1 /* AIF3TX_LRCLK_FRC */
 
#define ARIZONA_AIF3TX_LRCLK_FRC_WIDTH   1 /* AIF3TX_LRCLK_FRC */
 
#define ARIZONA_AIF3TX_LRCLK_MSTR   0x0001 /* AIF3TX_LRCLK_MSTR */
 
#define ARIZONA_AIF3TX_LRCLK_MSTR_MASK   0x0001 /* AIF3TX_LRCLK_MSTR */
 
#define ARIZONA_AIF3TX_LRCLK_MSTR_SHIFT   0 /* AIF3TX_LRCLK_MSTR */
 
#define ARIZONA_AIF3TX_LRCLK_MSTR_WIDTH   1 /* AIF3TX_LRCLK_MSTR */
 
#define ARIZONA_AIF3RX_LRCLK_INV   0x0004 /* AIF3RX_LRCLK_INV */
 
#define ARIZONA_AIF3RX_LRCLK_INV_MASK   0x0004 /* AIF3RX_LRCLK_INV */
 
#define ARIZONA_AIF3RX_LRCLK_INV_SHIFT   2 /* AIF3RX_LRCLK_INV */
 
#define ARIZONA_AIF3RX_LRCLK_INV_WIDTH   1 /* AIF3RX_LRCLK_INV */
 
#define ARIZONA_AIF3RX_LRCLK_FRC   0x0002 /* AIF3RX_LRCLK_FRC */
 
#define ARIZONA_AIF3RX_LRCLK_FRC_MASK   0x0002 /* AIF3RX_LRCLK_FRC */
 
#define ARIZONA_AIF3RX_LRCLK_FRC_SHIFT   1 /* AIF3RX_LRCLK_FRC */
 
#define ARIZONA_AIF3RX_LRCLK_FRC_WIDTH   1 /* AIF3RX_LRCLK_FRC */
 
#define ARIZONA_AIF3RX_LRCLK_MSTR   0x0001 /* AIF3RX_LRCLK_MSTR */
 
#define ARIZONA_AIF3RX_LRCLK_MSTR_MASK   0x0001 /* AIF3RX_LRCLK_MSTR */
 
#define ARIZONA_AIF3RX_LRCLK_MSTR_SHIFT   0 /* AIF3RX_LRCLK_MSTR */
 
#define ARIZONA_AIF3RX_LRCLK_MSTR_WIDTH   1 /* AIF3RX_LRCLK_MSTR */
 
#define ARIZONA_AIF3_RATE_MASK   0x7800 /* AIF3_RATE - [14:11] */
 
#define ARIZONA_AIF3_RATE_SHIFT   11 /* AIF3_RATE - [14:11] */
 
#define ARIZONA_AIF3_RATE_WIDTH   4 /* AIF3_RATE - [14:11] */
 
#define ARIZONA_AIF3_TRI   0x0040 /* AIF3_TRI */
 
#define ARIZONA_AIF3_TRI_MASK   0x0040 /* AIF3_TRI */
 
#define ARIZONA_AIF3_TRI_SHIFT   6 /* AIF3_TRI */
 
#define ARIZONA_AIF3_TRI_WIDTH   1 /* AIF3_TRI */
 
#define ARIZONA_AIF3_FMT_MASK   0x0007 /* AIF3_FMT - [2:0] */
 
#define ARIZONA_AIF3_FMT_SHIFT   0 /* AIF3_FMT - [2:0] */
 
#define ARIZONA_AIF3_FMT_WIDTH   3 /* AIF3_FMT - [2:0] */
 
#define ARIZONA_AIF3TX_BCPF_MASK   0x1FFF /* AIF3TX_BCPF - [12:0] */
 
#define ARIZONA_AIF3TX_BCPF_SHIFT   0 /* AIF3TX_BCPF - [12:0] */
 
#define ARIZONA_AIF3TX_BCPF_WIDTH   13 /* AIF3TX_BCPF - [12:0] */
 
#define ARIZONA_AIF3RX_BCPF_MASK   0x1FFF /* AIF3RX_BCPF - [12:0] */
 
#define ARIZONA_AIF3RX_BCPF_SHIFT   0 /* AIF3RX_BCPF - [12:0] */
 
#define ARIZONA_AIF3RX_BCPF_WIDTH   13 /* AIF3RX_BCPF - [12:0] */
 
#define ARIZONA_AIF3TX_WL_MASK   0x3F00 /* AIF3TX_WL - [13:8] */
 
#define ARIZONA_AIF3TX_WL_SHIFT   8 /* AIF3TX_WL - [13:8] */
 
#define ARIZONA_AIF3TX_WL_WIDTH   6 /* AIF3TX_WL - [13:8] */
 
#define ARIZONA_AIF3TX_SLOT_LEN_MASK   0x00FF /* AIF3TX_SLOT_LEN - [7:0] */
 
#define ARIZONA_AIF3TX_SLOT_LEN_SHIFT   0 /* AIF3TX_SLOT_LEN - [7:0] */
 
#define ARIZONA_AIF3TX_SLOT_LEN_WIDTH   8 /* AIF3TX_SLOT_LEN - [7:0] */
 
#define ARIZONA_AIF3RX_WL_MASK   0x3F00 /* AIF3RX_WL - [13:8] */
 
#define ARIZONA_AIF3RX_WL_SHIFT   8 /* AIF3RX_WL - [13:8] */
 
#define ARIZONA_AIF3RX_WL_WIDTH   6 /* AIF3RX_WL - [13:8] */
 
#define ARIZONA_AIF3RX_SLOT_LEN_MASK   0x00FF /* AIF3RX_SLOT_LEN - [7:0] */
 
#define ARIZONA_AIF3RX_SLOT_LEN_SHIFT   0 /* AIF3RX_SLOT_LEN - [7:0] */
 
#define ARIZONA_AIF3RX_SLOT_LEN_WIDTH   8 /* AIF3RX_SLOT_LEN - [7:0] */
 
#define ARIZONA_AIF3TX1_SLOT_MASK   0x003F /* AIF3TX1_SLOT - [5:0] */
 
#define ARIZONA_AIF3TX1_SLOT_SHIFT   0 /* AIF3TX1_SLOT - [5:0] */
 
#define ARIZONA_AIF3TX1_SLOT_WIDTH   6 /* AIF3TX1_SLOT - [5:0] */
 
#define ARIZONA_AIF3TX2_SLOT_MASK   0x003F /* AIF3TX2_SLOT - [5:0] */
 
#define ARIZONA_AIF3TX2_SLOT_SHIFT   0 /* AIF3TX2_SLOT - [5:0] */
 
#define ARIZONA_AIF3TX2_SLOT_WIDTH   6 /* AIF3TX2_SLOT - [5:0] */
 
#define ARIZONA_AIF3RX1_SLOT_MASK   0x003F /* AIF3RX1_SLOT - [5:0] */
 
#define ARIZONA_AIF3RX1_SLOT_SHIFT   0 /* AIF3RX1_SLOT - [5:0] */
 
#define ARIZONA_AIF3RX1_SLOT_WIDTH   6 /* AIF3RX1_SLOT - [5:0] */
 
#define ARIZONA_AIF3RX2_SLOT_MASK   0x003F /* AIF3RX2_SLOT - [5:0] */
 
#define ARIZONA_AIF3RX2_SLOT_SHIFT   0 /* AIF3RX2_SLOT - [5:0] */
 
#define ARIZONA_AIF3RX2_SLOT_WIDTH   6 /* AIF3RX2_SLOT - [5:0] */
 
#define ARIZONA_AIF3TX2_ENA   0x0002 /* AIF3TX2_ENA */
 
#define ARIZONA_AIF3TX2_ENA_MASK   0x0002 /* AIF3TX2_ENA */
 
#define ARIZONA_AIF3TX2_ENA_SHIFT   1 /* AIF3TX2_ENA */
 
#define ARIZONA_AIF3TX2_ENA_WIDTH   1 /* AIF3TX2_ENA */
 
#define ARIZONA_AIF3TX1_ENA   0x0001 /* AIF3TX1_ENA */
 
#define ARIZONA_AIF3TX1_ENA_MASK   0x0001 /* AIF3TX1_ENA */
 
#define ARIZONA_AIF3TX1_ENA_SHIFT   0 /* AIF3TX1_ENA */
 
#define ARIZONA_AIF3TX1_ENA_WIDTH   1 /* AIF3TX1_ENA */
 
#define ARIZONA_AIF3RX2_ENA   0x0002 /* AIF3RX2_ENA */
 
#define ARIZONA_AIF3RX2_ENA_MASK   0x0002 /* AIF3RX2_ENA */
 
#define ARIZONA_AIF3RX2_ENA_SHIFT   1 /* AIF3RX2_ENA */
 
#define ARIZONA_AIF3RX2_ENA_WIDTH   1 /* AIF3RX2_ENA */
 
#define ARIZONA_AIF3RX1_ENA   0x0001 /* AIF3RX1_ENA */
 
#define ARIZONA_AIF3RX1_ENA_MASK   0x0001 /* AIF3RX1_ENA */
 
#define ARIZONA_AIF3RX1_ENA_SHIFT   0 /* AIF3RX1_ENA */
 
#define ARIZONA_AIF3RX1_ENA_WIDTH   1 /* AIF3RX1_ENA */
 
#define ARIZONA_AIF3_FRC_WR   0x0001 /* AIF3_FRC_WR */
 
#define ARIZONA_AIF3_FRC_WR_MASK   0x0001 /* AIF3_FRC_WR */
 
#define ARIZONA_AIF3_FRC_WR_SHIFT   0 /* AIF3_FRC_WR */
 
#define ARIZONA_AIF3_FRC_WR_WIDTH   1 /* AIF3_FRC_WR */
 
#define ARIZONA_SLIMCLK_SRC   0x0010 /* SLIMCLK_SRC */
 
#define ARIZONA_SLIMCLK_SRC_MASK   0x0010 /* SLIMCLK_SRC */
 
#define ARIZONA_SLIMCLK_SRC_SHIFT   4 /* SLIMCLK_SRC */
 
#define ARIZONA_SLIMCLK_SRC_WIDTH   1 /* SLIMCLK_SRC */
 
#define ARIZONA_FRAMER_REF_GEAR_MASK   0x000F /* FRAMER_REF_GEAR - [3:0] */
 
#define ARIZONA_FRAMER_REF_GEAR_SHIFT   0 /* FRAMER_REF_GEAR - [3:0] */
 
#define ARIZONA_FRAMER_REF_GEAR_WIDTH   4 /* FRAMER_REF_GEAR - [3:0] */
 
#define ARIZONA_SLIMRX2_RATE_MASK   0x7800 /* SLIMRX2_RATE - [14:11] */
 
#define ARIZONA_SLIMRX2_RATE_SHIFT   11 /* SLIMRX2_RATE - [14:11] */
 
#define ARIZONA_SLIMRX2_RATE_WIDTH   4 /* SLIMRX2_RATE - [14:11] */
 
#define ARIZONA_SLIMRX1_RATE_MASK   0x0078 /* SLIMRX1_RATE - [6:3] */
 
#define ARIZONA_SLIMRX1_RATE_SHIFT   3 /* SLIMRX1_RATE - [6:3] */
 
#define ARIZONA_SLIMRX1_RATE_WIDTH   4 /* SLIMRX1_RATE - [6:3] */
 
#define ARIZONA_SLIMRX4_RATE_MASK   0x7800 /* SLIMRX4_RATE - [14:11] */
 
#define ARIZONA_SLIMRX4_RATE_SHIFT   11 /* SLIMRX4_RATE - [14:11] */
 
#define ARIZONA_SLIMRX4_RATE_WIDTH   4 /* SLIMRX4_RATE - [14:11] */
 
#define ARIZONA_SLIMRX3_RATE_MASK   0x0078 /* SLIMRX3_RATE - [6:3] */
 
#define ARIZONA_SLIMRX3_RATE_SHIFT   3 /* SLIMRX3_RATE - [6:3] */
 
#define ARIZONA_SLIMRX3_RATE_WIDTH   4 /* SLIMRX3_RATE - [6:3] */
 
#define ARIZONA_SLIMRX6_RATE_MASK   0x7800 /* SLIMRX6_RATE - [14:11] */
 
#define ARIZONA_SLIMRX6_RATE_SHIFT   11 /* SLIMRX6_RATE - [14:11] */
 
#define ARIZONA_SLIMRX6_RATE_WIDTH   4 /* SLIMRX6_RATE - [14:11] */
 
#define ARIZONA_SLIMRX5_RATE_MASK   0x0078 /* SLIMRX5_RATE - [6:3] */
 
#define ARIZONA_SLIMRX5_RATE_SHIFT   3 /* SLIMRX5_RATE - [6:3] */
 
#define ARIZONA_SLIMRX5_RATE_WIDTH   4 /* SLIMRX5_RATE - [6:3] */
 
#define ARIZONA_SLIMRX8_RATE_MASK   0x7800 /* SLIMRX8_RATE - [14:11] */
 
#define ARIZONA_SLIMRX8_RATE_SHIFT   11 /* SLIMRX8_RATE - [14:11] */
 
#define ARIZONA_SLIMRX8_RATE_WIDTH   4 /* SLIMRX8_RATE - [14:11] */
 
#define ARIZONA_SLIMRX7_RATE_MASK   0x0078 /* SLIMRX7_RATE - [6:3] */
 
#define ARIZONA_SLIMRX7_RATE_SHIFT   3 /* SLIMRX7_RATE - [6:3] */
 
#define ARIZONA_SLIMRX7_RATE_WIDTH   4 /* SLIMRX7_RATE - [6:3] */
 
#define ARIZONA_SLIMTX2_RATE_MASK   0x7800 /* SLIMTX2_RATE - [14:11] */
 
#define ARIZONA_SLIMTX2_RATE_SHIFT   11 /* SLIMTX2_RATE - [14:11] */
 
#define ARIZONA_SLIMTX2_RATE_WIDTH   4 /* SLIMTX2_RATE - [14:11] */
 
#define ARIZONA_SLIMTX1_RATE_MASK   0x0078 /* SLIMTX1_RATE - [6:3] */
 
#define ARIZONA_SLIMTX1_RATE_SHIFT   3 /* SLIMTX1_RATE - [6:3] */
 
#define ARIZONA_SLIMTX1_RATE_WIDTH   4 /* SLIMTX1_RATE - [6:3] */
 
#define ARIZONA_SLIMTX4_RATE_MASK   0x7800 /* SLIMTX4_RATE - [14:11] */
 
#define ARIZONA_SLIMTX4_RATE_SHIFT   11 /* SLIMTX4_RATE - [14:11] */
 
#define ARIZONA_SLIMTX4_RATE_WIDTH   4 /* SLIMTX4_RATE - [14:11] */
 
#define ARIZONA_SLIMTX3_RATE_MASK   0x0078 /* SLIMTX3_RATE - [6:3] */
 
#define ARIZONA_SLIMTX3_RATE_SHIFT   3 /* SLIMTX3_RATE - [6:3] */
 
#define ARIZONA_SLIMTX3_RATE_WIDTH   4 /* SLIMTX3_RATE - [6:3] */
 
#define ARIZONA_SLIMTX6_RATE_MASK   0x7800 /* SLIMTX6_RATE - [14:11] */
 
#define ARIZONA_SLIMTX6_RATE_SHIFT   11 /* SLIMTX6_RATE - [14:11] */
 
#define ARIZONA_SLIMTX6_RATE_WIDTH   4 /* SLIMTX6_RATE - [14:11] */
 
#define ARIZONA_SLIMTX5_RATE_MASK   0x0078 /* SLIMTX5_RATE - [6:3] */
 
#define ARIZONA_SLIMTX5_RATE_SHIFT   3 /* SLIMTX5_RATE - [6:3] */
 
#define ARIZONA_SLIMTX5_RATE_WIDTH   4 /* SLIMTX5_RATE - [6:3] */
 
#define ARIZONA_SLIMTX8_RATE_MASK   0x7800 /* SLIMTX8_RATE - [14:11] */
 
#define ARIZONA_SLIMTX8_RATE_SHIFT   11 /* SLIMTX8_RATE - [14:11] */
 
#define ARIZONA_SLIMTX8_RATE_WIDTH   4 /* SLIMTX8_RATE - [14:11] */
 
#define ARIZONA_SLIMTX7_RATE_MASK   0x0078 /* SLIMTX7_RATE - [6:3] */
 
#define ARIZONA_SLIMTX7_RATE_SHIFT   3 /* SLIMTX7_RATE - [6:3] */
 
#define ARIZONA_SLIMTX7_RATE_WIDTH   4 /* SLIMTX7_RATE - [6:3] */
 
#define ARIZONA_SLIMRX8_ENA   0x0080 /* SLIMRX8_ENA */
 
#define ARIZONA_SLIMRX8_ENA_MASK   0x0080 /* SLIMRX8_ENA */
 
#define ARIZONA_SLIMRX8_ENA_SHIFT   7 /* SLIMRX8_ENA */
 
#define ARIZONA_SLIMRX8_ENA_WIDTH   1 /* SLIMRX8_ENA */
 
#define ARIZONA_SLIMRX7_ENA   0x0040 /* SLIMRX7_ENA */
 
#define ARIZONA_SLIMRX7_ENA_MASK   0x0040 /* SLIMRX7_ENA */
 
#define ARIZONA_SLIMRX7_ENA_SHIFT   6 /* SLIMRX7_ENA */
 
#define ARIZONA_SLIMRX7_ENA_WIDTH   1 /* SLIMRX7_ENA */
 
#define ARIZONA_SLIMRX6_ENA   0x0020 /* SLIMRX6_ENA */
 
#define ARIZONA_SLIMRX6_ENA_MASK   0x0020 /* SLIMRX6_ENA */
 
#define ARIZONA_SLIMRX6_ENA_SHIFT   5 /* SLIMRX6_ENA */
 
#define ARIZONA_SLIMRX6_ENA_WIDTH   1 /* SLIMRX6_ENA */
 
#define ARIZONA_SLIMRX5_ENA   0x0010 /* SLIMRX5_ENA */
 
#define ARIZONA_SLIMRX5_ENA_MASK   0x0010 /* SLIMRX5_ENA */
 
#define ARIZONA_SLIMRX5_ENA_SHIFT   4 /* SLIMRX5_ENA */
 
#define ARIZONA_SLIMRX5_ENA_WIDTH   1 /* SLIMRX5_ENA */
 
#define ARIZONA_SLIMRX4_ENA   0x0008 /* SLIMRX4_ENA */
 
#define ARIZONA_SLIMRX4_ENA_MASK   0x0008 /* SLIMRX4_ENA */
 
#define ARIZONA_SLIMRX4_ENA_SHIFT   3 /* SLIMRX4_ENA */
 
#define ARIZONA_SLIMRX4_ENA_WIDTH   1 /* SLIMRX4_ENA */
 
#define ARIZONA_SLIMRX3_ENA   0x0004 /* SLIMRX3_ENA */
 
#define ARIZONA_SLIMRX3_ENA_MASK   0x0004 /* SLIMRX3_ENA */
 
#define ARIZONA_SLIMRX3_ENA_SHIFT   2 /* SLIMRX3_ENA */
 
#define ARIZONA_SLIMRX3_ENA_WIDTH   1 /* SLIMRX3_ENA */
 
#define ARIZONA_SLIMRX2_ENA   0x0002 /* SLIMRX2_ENA */
 
#define ARIZONA_SLIMRX2_ENA_MASK   0x0002 /* SLIMRX2_ENA */
 
#define ARIZONA_SLIMRX2_ENA_SHIFT   1 /* SLIMRX2_ENA */
 
#define ARIZONA_SLIMRX2_ENA_WIDTH   1 /* SLIMRX2_ENA */
 
#define ARIZONA_SLIMRX1_ENA   0x0001 /* SLIMRX1_ENA */
 
#define ARIZONA_SLIMRX1_ENA_MASK   0x0001 /* SLIMRX1_ENA */
 
#define ARIZONA_SLIMRX1_ENA_SHIFT   0 /* SLIMRX1_ENA */
 
#define ARIZONA_SLIMRX1_ENA_WIDTH   1 /* SLIMRX1_ENA */
 
#define ARIZONA_SLIMTX8_ENA   0x0080 /* SLIMTX8_ENA */
 
#define ARIZONA_SLIMTX8_ENA_MASK   0x0080 /* SLIMTX8_ENA */
 
#define ARIZONA_SLIMTX8_ENA_SHIFT   7 /* SLIMTX8_ENA */
 
#define ARIZONA_SLIMTX8_ENA_WIDTH   1 /* SLIMTX8_ENA */
 
#define ARIZONA_SLIMTX7_ENA   0x0040 /* SLIMTX7_ENA */
 
#define ARIZONA_SLIMTX7_ENA_MASK   0x0040 /* SLIMTX7_ENA */
 
#define ARIZONA_SLIMTX7_ENA_SHIFT   6 /* SLIMTX7_ENA */
 
#define ARIZONA_SLIMTX7_ENA_WIDTH   1 /* SLIMTX7_ENA */
 
#define ARIZONA_SLIMTX6_ENA   0x0020 /* SLIMTX6_ENA */
 
#define ARIZONA_SLIMTX6_ENA_MASK   0x0020 /* SLIMTX6_ENA */
 
#define ARIZONA_SLIMTX6_ENA_SHIFT   5 /* SLIMTX6_ENA */
 
#define ARIZONA_SLIMTX6_ENA_WIDTH   1 /* SLIMTX6_ENA */
 
#define ARIZONA_SLIMTX5_ENA   0x0010 /* SLIMTX5_ENA */
 
#define ARIZONA_SLIMTX5_ENA_MASK   0x0010 /* SLIMTX5_ENA */
 
#define ARIZONA_SLIMTX5_ENA_SHIFT   4 /* SLIMTX5_ENA */
 
#define ARIZONA_SLIMTX5_ENA_WIDTH   1 /* SLIMTX5_ENA */
 
#define ARIZONA_SLIMTX4_ENA   0x0008 /* SLIMTX4_ENA */
 
#define ARIZONA_SLIMTX4_ENA_MASK   0x0008 /* SLIMTX4_ENA */
 
#define ARIZONA_SLIMTX4_ENA_SHIFT   3 /* SLIMTX4_ENA */
 
#define ARIZONA_SLIMTX4_ENA_WIDTH   1 /* SLIMTX4_ENA */
 
#define ARIZONA_SLIMTX3_ENA   0x0004 /* SLIMTX3_ENA */
 
#define ARIZONA_SLIMTX3_ENA_MASK   0x0004 /* SLIMTX3_ENA */
 
#define ARIZONA_SLIMTX3_ENA_SHIFT   2 /* SLIMTX3_ENA */
 
#define ARIZONA_SLIMTX3_ENA_WIDTH   1 /* SLIMTX3_ENA */
 
#define ARIZONA_SLIMTX2_ENA   0x0002 /* SLIMTX2_ENA */
 
#define ARIZONA_SLIMTX2_ENA_MASK   0x0002 /* SLIMTX2_ENA */
 
#define ARIZONA_SLIMTX2_ENA_SHIFT   1 /* SLIMTX2_ENA */
 
#define ARIZONA_SLIMTX2_ENA_WIDTH   1 /* SLIMTX2_ENA */
 
#define ARIZONA_SLIMTX1_ENA   0x0001 /* SLIMTX1_ENA */
 
#define ARIZONA_SLIMTX1_ENA_MASK   0x0001 /* SLIMTX1_ENA */
 
#define ARIZONA_SLIMTX1_ENA_SHIFT   0 /* SLIMTX1_ENA */
 
#define ARIZONA_SLIMTX1_ENA_WIDTH   1 /* SLIMTX1_ENA */
 
#define ARIZONA_SLIMRX8_PORT_STS   0x0080 /* SLIMRX8_PORT_STS */
 
#define ARIZONA_SLIMRX8_PORT_STS_MASK   0x0080 /* SLIMRX8_PORT_STS */
 
#define ARIZONA_SLIMRX8_PORT_STS_SHIFT   7 /* SLIMRX8_PORT_STS */
 
#define ARIZONA_SLIMRX8_PORT_STS_WIDTH   1 /* SLIMRX8_PORT_STS */
 
#define ARIZONA_SLIMRX7_PORT_STS   0x0040 /* SLIMRX7_PORT_STS */
 
#define ARIZONA_SLIMRX7_PORT_STS_MASK   0x0040 /* SLIMRX7_PORT_STS */
 
#define ARIZONA_SLIMRX7_PORT_STS_SHIFT   6 /* SLIMRX7_PORT_STS */
 
#define ARIZONA_SLIMRX7_PORT_STS_WIDTH   1 /* SLIMRX7_PORT_STS */
 
#define ARIZONA_SLIMRX6_PORT_STS   0x0020 /* SLIMRX6_PORT_STS */
 
#define ARIZONA_SLIMRX6_PORT_STS_MASK   0x0020 /* SLIMRX6_PORT_STS */
 
#define ARIZONA_SLIMRX6_PORT_STS_SHIFT   5 /* SLIMRX6_PORT_STS */
 
#define ARIZONA_SLIMRX6_PORT_STS_WIDTH   1 /* SLIMRX6_PORT_STS */
 
#define ARIZONA_SLIMRX5_PORT_STS   0x0010 /* SLIMRX5_PORT_STS */
 
#define ARIZONA_SLIMRX5_PORT_STS_MASK   0x0010 /* SLIMRX5_PORT_STS */
 
#define ARIZONA_SLIMRX5_PORT_STS_SHIFT   4 /* SLIMRX5_PORT_STS */
 
#define ARIZONA_SLIMRX5_PORT_STS_WIDTH   1 /* SLIMRX5_PORT_STS */
 
#define ARIZONA_SLIMRX4_PORT_STS   0x0008 /* SLIMRX4_PORT_STS */
 
#define ARIZONA_SLIMRX4_PORT_STS_MASK   0x0008 /* SLIMRX4_PORT_STS */
 
#define ARIZONA_SLIMRX4_PORT_STS_SHIFT   3 /* SLIMRX4_PORT_STS */
 
#define ARIZONA_SLIMRX4_PORT_STS_WIDTH   1 /* SLIMRX4_PORT_STS */
 
#define ARIZONA_SLIMRX3_PORT_STS   0x0004 /* SLIMRX3_PORT_STS */
 
#define ARIZONA_SLIMRX3_PORT_STS_MASK   0x0004 /* SLIMRX3_PORT_STS */
 
#define ARIZONA_SLIMRX3_PORT_STS_SHIFT   2 /* SLIMRX3_PORT_STS */
 
#define ARIZONA_SLIMRX3_PORT_STS_WIDTH   1 /* SLIMRX3_PORT_STS */
 
#define ARIZONA_SLIMRX2_PORT_STS   0x0002 /* SLIMRX2_PORT_STS */
 
#define ARIZONA_SLIMRX2_PORT_STS_MASK   0x0002 /* SLIMRX2_PORT_STS */
 
#define ARIZONA_SLIMRX2_PORT_STS_SHIFT   1 /* SLIMRX2_PORT_STS */
 
#define ARIZONA_SLIMRX2_PORT_STS_WIDTH   1 /* SLIMRX2_PORT_STS */
 
#define ARIZONA_SLIMRX1_PORT_STS   0x0001 /* SLIMRX1_PORT_STS */
 
#define ARIZONA_SLIMRX1_PORT_STS_MASK   0x0001 /* SLIMRX1_PORT_STS */
 
#define ARIZONA_SLIMRX1_PORT_STS_SHIFT   0 /* SLIMRX1_PORT_STS */
 
#define ARIZONA_SLIMRX1_PORT_STS_WIDTH   1 /* SLIMRX1_PORT_STS */
 
#define ARIZONA_SLIMTX8_PORT_STS   0x0080 /* SLIMTX8_PORT_STS */
 
#define ARIZONA_SLIMTX8_PORT_STS_MASK   0x0080 /* SLIMTX8_PORT_STS */
 
#define ARIZONA_SLIMTX8_PORT_STS_SHIFT   7 /* SLIMTX8_PORT_STS */
 
#define ARIZONA_SLIMTX8_PORT_STS_WIDTH   1 /* SLIMTX8_PORT_STS */
 
#define ARIZONA_SLIMTX7_PORT_STS   0x0040 /* SLIMTX7_PORT_STS */
 
#define ARIZONA_SLIMTX7_PORT_STS_MASK   0x0040 /* SLIMTX7_PORT_STS */
 
#define ARIZONA_SLIMTX7_PORT_STS_SHIFT   6 /* SLIMTX7_PORT_STS */
 
#define ARIZONA_SLIMTX7_PORT_STS_WIDTH   1 /* SLIMTX7_PORT_STS */
 
#define ARIZONA_SLIMTX6_PORT_STS   0x0020 /* SLIMTX6_PORT_STS */
 
#define ARIZONA_SLIMTX6_PORT_STS_MASK   0x0020 /* SLIMTX6_PORT_STS */
 
#define ARIZONA_SLIMTX6_PORT_STS_SHIFT   5 /* SLIMTX6_PORT_STS */
 
#define ARIZONA_SLIMTX6_PORT_STS_WIDTH   1 /* SLIMTX6_PORT_STS */
 
#define ARIZONA_SLIMTX5_PORT_STS   0x0010 /* SLIMTX5_PORT_STS */
 
#define ARIZONA_SLIMTX5_PORT_STS_MASK   0x0010 /* SLIMTX5_PORT_STS */
 
#define ARIZONA_SLIMTX5_PORT_STS_SHIFT   4 /* SLIMTX5_PORT_STS */
 
#define ARIZONA_SLIMTX5_PORT_STS_WIDTH   1 /* SLIMTX5_PORT_STS */
 
#define ARIZONA_SLIMTX4_PORT_STS   0x0008 /* SLIMTX4_PORT_STS */
 
#define ARIZONA_SLIMTX4_PORT_STS_MASK   0x0008 /* SLIMTX4_PORT_STS */
 
#define ARIZONA_SLIMTX4_PORT_STS_SHIFT   3 /* SLIMTX4_PORT_STS */
 
#define ARIZONA_SLIMTX4_PORT_STS_WIDTH   1 /* SLIMTX4_PORT_STS */
 
#define ARIZONA_SLIMTX3_PORT_STS   0x0004 /* SLIMTX3_PORT_STS */
 
#define ARIZONA_SLIMTX3_PORT_STS_MASK   0x0004 /* SLIMTX3_PORT_STS */
 
#define ARIZONA_SLIMTX3_PORT_STS_SHIFT   2 /* SLIMTX3_PORT_STS */
 
#define ARIZONA_SLIMTX3_PORT_STS_WIDTH   1 /* SLIMTX3_PORT_STS */
 
#define ARIZONA_SLIMTX2_PORT_STS   0x0002 /* SLIMTX2_PORT_STS */
 
#define ARIZONA_SLIMTX2_PORT_STS_MASK   0x0002 /* SLIMTX2_PORT_STS */
 
#define ARIZONA_SLIMTX2_PORT_STS_SHIFT   1 /* SLIMTX2_PORT_STS */
 
#define ARIZONA_SLIMTX2_PORT_STS_WIDTH   1 /* SLIMTX2_PORT_STS */
 
#define ARIZONA_SLIMTX1_PORT_STS   0x0001 /* SLIMTX1_PORT_STS */
 
#define ARIZONA_SLIMTX1_PORT_STS_MASK   0x0001 /* SLIMTX1_PORT_STS */
 
#define ARIZONA_SLIMTX1_PORT_STS_SHIFT   0 /* SLIMTX1_PORT_STS */
 
#define ARIZONA_SLIMTX1_PORT_STS_WIDTH   1 /* SLIMTX1_PORT_STS */
 
#define ARIZONA_IRQ_POL   0x0400 /* IRQ_POL */
 
#define ARIZONA_IRQ_POL_MASK   0x0400 /* IRQ_POL */
 
#define ARIZONA_IRQ_POL_SHIFT   10 /* IRQ_POL */
 
#define ARIZONA_IRQ_POL_WIDTH   1 /* IRQ_POL */
 
#define ARIZONA_IRQ_OP_CFG   0x0200 /* IRQ_OP_CFG */
 
#define ARIZONA_IRQ_OP_CFG_MASK   0x0200 /* IRQ_OP_CFG */
 
#define ARIZONA_IRQ_OP_CFG_SHIFT   9 /* IRQ_OP_CFG */
 
#define ARIZONA_IRQ_OP_CFG_WIDTH   1 /* IRQ_OP_CFG */
 
#define ARIZONA_GP_DBTIME_MASK   0xF000 /* GP_DBTIME - [15:12] */
 
#define ARIZONA_GP_DBTIME_SHIFT   12 /* GP_DBTIME - [15:12] */
 
#define ARIZONA_GP_DBTIME_WIDTH   4 /* GP_DBTIME - [15:12] */
 
#define ARIZONA_LDO1ENA_PD   0x8000 /* LDO1ENA_PD */
 
#define ARIZONA_LDO1ENA_PD_MASK   0x8000 /* LDO1ENA_PD */
 
#define ARIZONA_LDO1ENA_PD_SHIFT   15 /* LDO1ENA_PD */
 
#define ARIZONA_LDO1ENA_PD_WIDTH   1 /* LDO1ENA_PD */
 
#define ARIZONA_MCLK2_PD   0x2000 /* MCLK2_PD */
 
#define ARIZONA_MCLK2_PD_MASK   0x2000 /* MCLK2_PD */
 
#define ARIZONA_MCLK2_PD_SHIFT   13 /* MCLK2_PD */
 
#define ARIZONA_MCLK2_PD_WIDTH   1 /* MCLK2_PD */
 
#define ARIZONA_RSTB_PU   0x0002 /* RSTB_PU */
 
#define ARIZONA_RSTB_PU_MASK   0x0002 /* RSTB_PU */
 
#define ARIZONA_RSTB_PU_SHIFT   1 /* RSTB_PU */
 
#define ARIZONA_RSTB_PU_WIDTH   1 /* RSTB_PU */
 
#define ARIZONA_MCLK1_PD   0x1000 /* MCLK1_PD */
 
#define ARIZONA_MCLK1_PD_MASK   0x1000 /* MCLK1_PD */
 
#define ARIZONA_MCLK1_PD_SHIFT   12 /* MCLK1_PD */
 
#define ARIZONA_MCLK1_PD_WIDTH   1 /* MCLK1_PD */
 
#define ARIZONA_MICD_PD   0x0100 /* MICD_PD */
 
#define ARIZONA_MICD_PD_MASK   0x0100 /* MICD_PD */
 
#define ARIZONA_MICD_PD_SHIFT   8 /* MICD_PD */
 
#define ARIZONA_MICD_PD_WIDTH   1 /* MICD_PD */
 
#define ARIZONA_ADDR_PD   0x0001 /* ADDR_PD */
 
#define ARIZONA_ADDR_PD_MASK   0x0001 /* ADDR_PD */
 
#define ARIZONA_ADDR_PD_SHIFT   0 /* ADDR_PD */
 
#define ARIZONA_ADDR_PD_WIDTH   1 /* ADDR_PD */
 
#define ARIZONA_DMICDAT4_PD   0x0008 /* DMICDAT4_PD */
 
#define ARIZONA_DMICDAT4_PD_MASK   0x0008 /* DMICDAT4_PD */
 
#define ARIZONA_DMICDAT4_PD_SHIFT   3 /* DMICDAT4_PD */
 
#define ARIZONA_DMICDAT4_PD_WIDTH   1 /* DMICDAT4_PD */
 
#define ARIZONA_DMICDAT3_PD   0x0004 /* DMICDAT3_PD */
 
#define ARIZONA_DMICDAT3_PD_MASK   0x0004 /* DMICDAT3_PD */
 
#define ARIZONA_DMICDAT3_PD_SHIFT   2 /* DMICDAT3_PD */
 
#define ARIZONA_DMICDAT3_PD_WIDTH   1 /* DMICDAT3_PD */
 
#define ARIZONA_DMICDAT2_PD   0x0002 /* DMICDAT2_PD */
 
#define ARIZONA_DMICDAT2_PD_MASK   0x0002 /* DMICDAT2_PD */
 
#define ARIZONA_DMICDAT2_PD_SHIFT   1 /* DMICDAT2_PD */
 
#define ARIZONA_DMICDAT2_PD_WIDTH   1 /* DMICDAT2_PD */
 
#define ARIZONA_DMICDAT1_PD   0x0001 /* DMICDAT1_PD */
 
#define ARIZONA_DMICDAT1_PD_MASK   0x0001 /* DMICDAT1_PD */
 
#define ARIZONA_DMICDAT1_PD_SHIFT   0 /* DMICDAT1_PD */
 
#define ARIZONA_DMICDAT1_PD_WIDTH   1 /* DMICDAT1_PD */
 
#define ARIZONA_AIF1RXLRCLK_PU   0x0020 /* AIF1RXLRCLK_PU */
 
#define ARIZONA_AIF1RXLRCLK_PU_MASK   0x0020 /* AIF1RXLRCLK_PU */
 
#define ARIZONA_AIF1RXLRCLK_PU_SHIFT   5 /* AIF1RXLRCLK_PU */
 
#define ARIZONA_AIF1RXLRCLK_PU_WIDTH   1 /* AIF1RXLRCLK_PU */
 
#define ARIZONA_AIF1RXLRCLK_PD   0x0010 /* AIF1RXLRCLK_PD */
 
#define ARIZONA_AIF1RXLRCLK_PD_MASK   0x0010 /* AIF1RXLRCLK_PD */
 
#define ARIZONA_AIF1RXLRCLK_PD_SHIFT   4 /* AIF1RXLRCLK_PD */
 
#define ARIZONA_AIF1RXLRCLK_PD_WIDTH   1 /* AIF1RXLRCLK_PD */
 
#define ARIZONA_AIF1BCLK_PU   0x0008 /* AIF1BCLK_PU */
 
#define ARIZONA_AIF1BCLK_PU_MASK   0x0008 /* AIF1BCLK_PU */
 
#define ARIZONA_AIF1BCLK_PU_SHIFT   3 /* AIF1BCLK_PU */
 
#define ARIZONA_AIF1BCLK_PU_WIDTH   1 /* AIF1BCLK_PU */
 
#define ARIZONA_AIF1BCLK_PD   0x0004 /* AIF1BCLK_PD */
 
#define ARIZONA_AIF1BCLK_PD_MASK   0x0004 /* AIF1BCLK_PD */
 
#define ARIZONA_AIF1BCLK_PD_SHIFT   2 /* AIF1BCLK_PD */
 
#define ARIZONA_AIF1BCLK_PD_WIDTH   1 /* AIF1BCLK_PD */
 
#define ARIZONA_AIF1RXDAT_PU   0x0002 /* AIF1RXDAT_PU */
 
#define ARIZONA_AIF1RXDAT_PU_MASK   0x0002 /* AIF1RXDAT_PU */
 
#define ARIZONA_AIF1RXDAT_PU_SHIFT   1 /* AIF1RXDAT_PU */
 
#define ARIZONA_AIF1RXDAT_PU_WIDTH   1 /* AIF1RXDAT_PU */
 
#define ARIZONA_AIF1RXDAT_PD   0x0001 /* AIF1RXDAT_PD */
 
#define ARIZONA_AIF1RXDAT_PD_MASK   0x0001 /* AIF1RXDAT_PD */
 
#define ARIZONA_AIF1RXDAT_PD_SHIFT   0 /* AIF1RXDAT_PD */
 
#define ARIZONA_AIF1RXDAT_PD_WIDTH   1 /* AIF1RXDAT_PD */
 
#define ARIZONA_AIF2RXLRCLK_PU   0x0020 /* AIF2RXLRCLK_PU */
 
#define ARIZONA_AIF2RXLRCLK_PU_MASK   0x0020 /* AIF2RXLRCLK_PU */
 
#define ARIZONA_AIF2RXLRCLK_PU_SHIFT   5 /* AIF2RXLRCLK_PU */
 
#define ARIZONA_AIF2RXLRCLK_PU_WIDTH   1 /* AIF2RXLRCLK_PU */
 
#define ARIZONA_AIF2RXLRCLK_PD   0x0010 /* AIF2RXLRCLK_PD */
 
#define ARIZONA_AIF2RXLRCLK_PD_MASK   0x0010 /* AIF2RXLRCLK_PD */
 
#define ARIZONA_AIF2RXLRCLK_PD_SHIFT   4 /* AIF2RXLRCLK_PD */
 
#define ARIZONA_AIF2RXLRCLK_PD_WIDTH   1 /* AIF2RXLRCLK_PD */
 
#define ARIZONA_AIF2BCLK_PU   0x0008 /* AIF2BCLK_PU */
 
#define ARIZONA_AIF2BCLK_PU_MASK   0x0008 /* AIF2BCLK_PU */
 
#define ARIZONA_AIF2BCLK_PU_SHIFT   3 /* AIF2BCLK_PU */
 
#define ARIZONA_AIF2BCLK_PU_WIDTH   1 /* AIF2BCLK_PU */
 
#define ARIZONA_AIF2BCLK_PD   0x0004 /* AIF2BCLK_PD */
 
#define ARIZONA_AIF2BCLK_PD_MASK   0x0004 /* AIF2BCLK_PD */
 
#define ARIZONA_AIF2BCLK_PD_SHIFT   2 /* AIF2BCLK_PD */
 
#define ARIZONA_AIF2BCLK_PD_WIDTH   1 /* AIF2BCLK_PD */
 
#define ARIZONA_AIF2RXDAT_PU   0x0002 /* AIF2RXDAT_PU */
 
#define ARIZONA_AIF2RXDAT_PU_MASK   0x0002 /* AIF2RXDAT_PU */
 
#define ARIZONA_AIF2RXDAT_PU_SHIFT   1 /* AIF2RXDAT_PU */
 
#define ARIZONA_AIF2RXDAT_PU_WIDTH   1 /* AIF2RXDAT_PU */
 
#define ARIZONA_AIF2RXDAT_PD   0x0001 /* AIF2RXDAT_PD */
 
#define ARIZONA_AIF2RXDAT_PD_MASK   0x0001 /* AIF2RXDAT_PD */
 
#define ARIZONA_AIF2RXDAT_PD_SHIFT   0 /* AIF2RXDAT_PD */
 
#define ARIZONA_AIF2RXDAT_PD_WIDTH   1 /* AIF2RXDAT_PD */
 
#define ARIZONA_AIF3RXLRCLK_PU   0x0020 /* AIF3RXLRCLK_PU */
 
#define ARIZONA_AIF3RXLRCLK_PU_MASK   0x0020 /* AIF3RXLRCLK_PU */
 
#define ARIZONA_AIF3RXLRCLK_PU_SHIFT   5 /* AIF3RXLRCLK_PU */
 
#define ARIZONA_AIF3RXLRCLK_PU_WIDTH   1 /* AIF3RXLRCLK_PU */
 
#define ARIZONA_AIF3RXLRCLK_PD   0x0010 /* AIF3RXLRCLK_PD */
 
#define ARIZONA_AIF3RXLRCLK_PD_MASK   0x0010 /* AIF3RXLRCLK_PD */
 
#define ARIZONA_AIF3RXLRCLK_PD_SHIFT   4 /* AIF3RXLRCLK_PD */
 
#define ARIZONA_AIF3RXLRCLK_PD_WIDTH   1 /* AIF3RXLRCLK_PD */
 
#define ARIZONA_AIF3BCLK_PU   0x0008 /* AIF3BCLK_PU */
 
#define ARIZONA_AIF3BCLK_PU_MASK   0x0008 /* AIF3BCLK_PU */
 
#define ARIZONA_AIF3BCLK_PU_SHIFT   3 /* AIF3BCLK_PU */
 
#define ARIZONA_AIF3BCLK_PU_WIDTH   1 /* AIF3BCLK_PU */
 
#define ARIZONA_AIF3BCLK_PD   0x0004 /* AIF3BCLK_PD */
 
#define ARIZONA_AIF3BCLK_PD_MASK   0x0004 /* AIF3BCLK_PD */
 
#define ARIZONA_AIF3BCLK_PD_SHIFT   2 /* AIF3BCLK_PD */
 
#define ARIZONA_AIF3BCLK_PD_WIDTH   1 /* AIF3BCLK_PD */
 
#define ARIZONA_AIF3RXDAT_PU   0x0002 /* AIF3RXDAT_PU */
 
#define ARIZONA_AIF3RXDAT_PU_MASK   0x0002 /* AIF3RXDAT_PU */
 
#define ARIZONA_AIF3RXDAT_PU_SHIFT   1 /* AIF3RXDAT_PU */
 
#define ARIZONA_AIF3RXDAT_PU_WIDTH   1 /* AIF3RXDAT_PU */
 
#define ARIZONA_AIF3RXDAT_PD   0x0001 /* AIF3RXDAT_PD */
 
#define ARIZONA_AIF3RXDAT_PD_MASK   0x0001 /* AIF3RXDAT_PD */
 
#define ARIZONA_AIF3RXDAT_PD_SHIFT   0 /* AIF3RXDAT_PD */
 
#define ARIZONA_AIF3RXDAT_PD_WIDTH   1 /* AIF3RXDAT_PD */
 
#define ARIZONA_GP4_EINT1   0x0008 /* GP4_EINT1 */
 
#define ARIZONA_GP4_EINT1_MASK   0x0008 /* GP4_EINT1 */
 
#define ARIZONA_GP4_EINT1_SHIFT   3 /* GP4_EINT1 */
 
#define ARIZONA_GP4_EINT1_WIDTH   1 /* GP4_EINT1 */
 
#define ARIZONA_GP3_EINT1   0x0004 /* GP3_EINT1 */
 
#define ARIZONA_GP3_EINT1_MASK   0x0004 /* GP3_EINT1 */
 
#define ARIZONA_GP3_EINT1_SHIFT   2 /* GP3_EINT1 */
 
#define ARIZONA_GP3_EINT1_WIDTH   1 /* GP3_EINT1 */
 
#define ARIZONA_GP2_EINT1   0x0002 /* GP2_EINT1 */
 
#define ARIZONA_GP2_EINT1_MASK   0x0002 /* GP2_EINT1 */
 
#define ARIZONA_GP2_EINT1_SHIFT   1 /* GP2_EINT1 */
 
#define ARIZONA_GP2_EINT1_WIDTH   1 /* GP2_EINT1 */
 
#define ARIZONA_GP1_EINT1   0x0001 /* GP1_EINT1 */
 
#define ARIZONA_GP1_EINT1_MASK   0x0001 /* GP1_EINT1 */
 
#define ARIZONA_GP1_EINT1_SHIFT   0 /* GP1_EINT1 */
 
#define ARIZONA_GP1_EINT1_WIDTH   1 /* GP1_EINT1 */
 
#define ARIZONA_DSP4_RAM_RDY_EINT1   0x0800 /* DSP4_RAM_RDY_EINT1 */
 
#define ARIZONA_DSP4_RAM_RDY_EINT1_MASK   0x0800 /* DSP4_RAM_RDY_EINT1 */
 
#define ARIZONA_DSP4_RAM_RDY_EINT1_SHIFT   11 /* DSP4_RAM_RDY_EINT1 */
 
#define ARIZONA_DSP4_RAM_RDY_EINT1_WIDTH   1 /* DSP4_RAM_RDY_EINT1 */
 
#define ARIZONA_DSP3_RAM_RDY_EINT1   0x0400 /* DSP3_RAM_RDY_EINT1 */
 
#define ARIZONA_DSP3_RAM_RDY_EINT1_MASK   0x0400 /* DSP3_RAM_RDY_EINT1 */
 
#define ARIZONA_DSP3_RAM_RDY_EINT1_SHIFT   10 /* DSP3_RAM_RDY_EINT1 */
 
#define ARIZONA_DSP3_RAM_RDY_EINT1_WIDTH   1 /* DSP3_RAM_RDY_EINT1 */
 
#define ARIZONA_DSP2_RAM_RDY_EINT1   0x0200 /* DSP2_RAM_RDY_EINT1 */
 
#define ARIZONA_DSP2_RAM_RDY_EINT1_MASK   0x0200 /* DSP2_RAM_RDY_EINT1 */
 
#define ARIZONA_DSP2_RAM_RDY_EINT1_SHIFT   9 /* DSP2_RAM_RDY_EINT1 */
 
#define ARIZONA_DSP2_RAM_RDY_EINT1_WIDTH   1 /* DSP2_RAM_RDY_EINT1 */
 
#define ARIZONA_DSP1_RAM_RDY_EINT1   0x0100 /* DSP1_RAM_RDY_EINT1 */
 
#define ARIZONA_DSP1_RAM_RDY_EINT1_MASK   0x0100 /* DSP1_RAM_RDY_EINT1 */
 
#define ARIZONA_DSP1_RAM_RDY_EINT1_SHIFT   8 /* DSP1_RAM_RDY_EINT1 */
 
#define ARIZONA_DSP1_RAM_RDY_EINT1_WIDTH   1 /* DSP1_RAM_RDY_EINT1 */
 
#define ARIZONA_DSP_IRQ8_EINT1   0x0080 /* DSP_IRQ8_EINT1 */
 
#define ARIZONA_DSP_IRQ8_EINT1_MASK   0x0080 /* DSP_IRQ8_EINT1 */
 
#define ARIZONA_DSP_IRQ8_EINT1_SHIFT   7 /* DSP_IRQ8_EINT1 */
 
#define ARIZONA_DSP_IRQ8_EINT1_WIDTH   1 /* DSP_IRQ8_EINT1 */
 
#define ARIZONA_DSP_IRQ7_EINT1   0x0040 /* DSP_IRQ7_EINT1 */
 
#define ARIZONA_DSP_IRQ7_EINT1_MASK   0x0040 /* DSP_IRQ7_EINT1 */
 
#define ARIZONA_DSP_IRQ7_EINT1_SHIFT   6 /* DSP_IRQ7_EINT1 */
 
#define ARIZONA_DSP_IRQ7_EINT1_WIDTH   1 /* DSP_IRQ7_EINT1 */
 
#define ARIZONA_DSP_IRQ6_EINT1   0x0020 /* DSP_IRQ6_EINT1 */
 
#define ARIZONA_DSP_IRQ6_EINT1_MASK   0x0020 /* DSP_IRQ6_EINT1 */
 
#define ARIZONA_DSP_IRQ6_EINT1_SHIFT   5 /* DSP_IRQ6_EINT1 */
 
#define ARIZONA_DSP_IRQ6_EINT1_WIDTH   1 /* DSP_IRQ6_EINT1 */
 
#define ARIZONA_DSP_IRQ5_EINT1   0x0010 /* DSP_IRQ5_EINT1 */
 
#define ARIZONA_DSP_IRQ5_EINT1_MASK   0x0010 /* DSP_IRQ5_EINT1 */
 
#define ARIZONA_DSP_IRQ5_EINT1_SHIFT   4 /* DSP_IRQ5_EINT1 */
 
#define ARIZONA_DSP_IRQ5_EINT1_WIDTH   1 /* DSP_IRQ5_EINT1 */
 
#define ARIZONA_DSP_IRQ4_EINT1   0x0008 /* DSP_IRQ4_EINT1 */
 
#define ARIZONA_DSP_IRQ4_EINT1_MASK   0x0008 /* DSP_IRQ4_EINT1 */
 
#define ARIZONA_DSP_IRQ4_EINT1_SHIFT   3 /* DSP_IRQ4_EINT1 */
 
#define ARIZONA_DSP_IRQ4_EINT1_WIDTH   1 /* DSP_IRQ4_EINT1 */
 
#define ARIZONA_DSP_IRQ3_EINT1   0x0004 /* DSP_IRQ3_EINT1 */
 
#define ARIZONA_DSP_IRQ3_EINT1_MASK   0x0004 /* DSP_IRQ3_EINT1 */
 
#define ARIZONA_DSP_IRQ3_EINT1_SHIFT   2 /* DSP_IRQ3_EINT1 */
 
#define ARIZONA_DSP_IRQ3_EINT1_WIDTH   1 /* DSP_IRQ3_EINT1 */
 
#define ARIZONA_DSP_IRQ2_EINT1   0x0002 /* DSP_IRQ2_EINT1 */
 
#define ARIZONA_DSP_IRQ2_EINT1_MASK   0x0002 /* DSP_IRQ2_EINT1 */
 
#define ARIZONA_DSP_IRQ2_EINT1_SHIFT   1 /* DSP_IRQ2_EINT1 */
 
#define ARIZONA_DSP_IRQ2_EINT1_WIDTH   1 /* DSP_IRQ2_EINT1 */
 
#define ARIZONA_DSP_IRQ1_EINT1   0x0001 /* DSP_IRQ1_EINT1 */
 
#define ARIZONA_DSP_IRQ1_EINT1_MASK   0x0001 /* DSP_IRQ1_EINT1 */
 
#define ARIZONA_DSP_IRQ1_EINT1_SHIFT   0 /* DSP_IRQ1_EINT1 */
 
#define ARIZONA_DSP_IRQ1_EINT1_WIDTH   1 /* DSP_IRQ1_EINT1 */
 
#define ARIZONA_SPK_SHUTDOWN_WARN_EINT1   0x8000 /* SPK_SHUTDOWN_WARN_EINT1 */
 
#define ARIZONA_SPK_SHUTDOWN_WARN_EINT1_MASK   0x8000 /* SPK_SHUTDOWN_WARN_EINT1 */
 
#define ARIZONA_SPK_SHUTDOWN_WARN_EINT1_SHIFT   15 /* SPK_SHUTDOWN_WARN_EINT1 */
 
#define ARIZONA_SPK_SHUTDOWN_WARN_EINT1_WIDTH   1 /* SPK_SHUTDOWN_WARN_EINT1 */
 
#define ARIZONA_SPK_SHUTDOWN_EINT1   0x4000 /* SPK_SHUTDOWN_EINT1 */
 
#define ARIZONA_SPK_SHUTDOWN_EINT1_MASK   0x4000 /* SPK_SHUTDOWN_EINT1 */
 
#define ARIZONA_SPK_SHUTDOWN_EINT1_SHIFT   14 /* SPK_SHUTDOWN_EINT1 */
 
#define ARIZONA_SPK_SHUTDOWN_EINT1_WIDTH   1 /* SPK_SHUTDOWN_EINT1 */
 
#define ARIZONA_HPDET_EINT1   0x2000 /* HPDET_EINT1 */
 
#define ARIZONA_HPDET_EINT1_MASK   0x2000 /* HPDET_EINT1 */
 
#define ARIZONA_HPDET_EINT1_SHIFT   13 /* HPDET_EINT1 */
 
#define ARIZONA_HPDET_EINT1_WIDTH   1 /* HPDET_EINT1 */
 
#define ARIZONA_MICDET_EINT1   0x1000 /* MICDET_EINT1 */
 
#define ARIZONA_MICDET_EINT1_MASK   0x1000 /* MICDET_EINT1 */
 
#define ARIZONA_MICDET_EINT1_SHIFT   12 /* MICDET_EINT1 */
 
#define ARIZONA_MICDET_EINT1_WIDTH   1 /* MICDET_EINT1 */
 
#define ARIZONA_WSEQ_DONE_EINT1   0x0800 /* WSEQ_DONE_EINT1 */
 
#define ARIZONA_WSEQ_DONE_EINT1_MASK   0x0800 /* WSEQ_DONE_EINT1 */
 
#define ARIZONA_WSEQ_DONE_EINT1_SHIFT   11 /* WSEQ_DONE_EINT1 */
 
#define ARIZONA_WSEQ_DONE_EINT1_WIDTH   1 /* WSEQ_DONE_EINT1 */
 
#define ARIZONA_DRC2_SIG_DET_EINT1   0x0400 /* DRC2_SIG_DET_EINT1 */
 
#define ARIZONA_DRC2_SIG_DET_EINT1_MASK   0x0400 /* DRC2_SIG_DET_EINT1 */
 
#define ARIZONA_DRC2_SIG_DET_EINT1_SHIFT   10 /* DRC2_SIG_DET_EINT1 */
 
#define ARIZONA_DRC2_SIG_DET_EINT1_WIDTH   1 /* DRC2_SIG_DET_EINT1 */
 
#define ARIZONA_DRC1_SIG_DET_EINT1   0x0200 /* DRC1_SIG_DET_EINT1 */
 
#define ARIZONA_DRC1_SIG_DET_EINT1_MASK   0x0200 /* DRC1_SIG_DET_EINT1 */
 
#define ARIZONA_DRC1_SIG_DET_EINT1_SHIFT   9 /* DRC1_SIG_DET_EINT1 */
 
#define ARIZONA_DRC1_SIG_DET_EINT1_WIDTH   1 /* DRC1_SIG_DET_EINT1 */
 
#define ARIZONA_ASRC2_LOCK_EINT1   0x0100 /* ASRC2_LOCK_EINT1 */
 
#define ARIZONA_ASRC2_LOCK_EINT1_MASK   0x0100 /* ASRC2_LOCK_EINT1 */
 
#define ARIZONA_ASRC2_LOCK_EINT1_SHIFT   8 /* ASRC2_LOCK_EINT1 */
 
#define ARIZONA_ASRC2_LOCK_EINT1_WIDTH   1 /* ASRC2_LOCK_EINT1 */
 
#define ARIZONA_ASRC1_LOCK_EINT1   0x0080 /* ASRC1_LOCK_EINT1 */
 
#define ARIZONA_ASRC1_LOCK_EINT1_MASK   0x0080 /* ASRC1_LOCK_EINT1 */
 
#define ARIZONA_ASRC1_LOCK_EINT1_SHIFT   7 /* ASRC1_LOCK_EINT1 */
 
#define ARIZONA_ASRC1_LOCK_EINT1_WIDTH   1 /* ASRC1_LOCK_EINT1 */
 
#define ARIZONA_UNDERCLOCKED_EINT1   0x0040 /* UNDERCLOCKED_EINT1 */
 
#define ARIZONA_UNDERCLOCKED_EINT1_MASK   0x0040 /* UNDERCLOCKED_EINT1 */
 
#define ARIZONA_UNDERCLOCKED_EINT1_SHIFT   6 /* UNDERCLOCKED_EINT1 */
 
#define ARIZONA_UNDERCLOCKED_EINT1_WIDTH   1 /* UNDERCLOCKED_EINT1 */
 
#define ARIZONA_OVERCLOCKED_EINT1   0x0020 /* OVERCLOCKED_EINT1 */
 
#define ARIZONA_OVERCLOCKED_EINT1_MASK   0x0020 /* OVERCLOCKED_EINT1 */
 
#define ARIZONA_OVERCLOCKED_EINT1_SHIFT   5 /* OVERCLOCKED_EINT1 */
 
#define ARIZONA_OVERCLOCKED_EINT1_WIDTH   1 /* OVERCLOCKED_EINT1 */
 
#define ARIZONA_FLL2_LOCK_EINT1   0x0008 /* FLL2_LOCK_EINT1 */
 
#define ARIZONA_FLL2_LOCK_EINT1_MASK   0x0008 /* FLL2_LOCK_EINT1 */
 
#define ARIZONA_FLL2_LOCK_EINT1_SHIFT   3 /* FLL2_LOCK_EINT1 */
 
#define ARIZONA_FLL2_LOCK_EINT1_WIDTH   1 /* FLL2_LOCK_EINT1 */
 
#define ARIZONA_FLL1_LOCK_EINT1   0x0004 /* FLL1_LOCK_EINT1 */
 
#define ARIZONA_FLL1_LOCK_EINT1_MASK   0x0004 /* FLL1_LOCK_EINT1 */
 
#define ARIZONA_FLL1_LOCK_EINT1_SHIFT   2 /* FLL1_LOCK_EINT1 */
 
#define ARIZONA_FLL1_LOCK_EINT1_WIDTH   1 /* FLL1_LOCK_EINT1 */
 
#define ARIZONA_CLKGEN_ERR_EINT1   0x0002 /* CLKGEN_ERR_EINT1 */
 
#define ARIZONA_CLKGEN_ERR_EINT1_MASK   0x0002 /* CLKGEN_ERR_EINT1 */
 
#define ARIZONA_CLKGEN_ERR_EINT1_SHIFT   1 /* CLKGEN_ERR_EINT1 */
 
#define ARIZONA_CLKGEN_ERR_EINT1_WIDTH   1 /* CLKGEN_ERR_EINT1 */
 
#define ARIZONA_CLKGEN_ERR_ASYNC_EINT1   0x0001 /* CLKGEN_ERR_ASYNC_EINT1 */
 
#define ARIZONA_CLKGEN_ERR_ASYNC_EINT1_MASK   0x0001 /* CLKGEN_ERR_ASYNC_EINT1 */
 
#define ARIZONA_CLKGEN_ERR_ASYNC_EINT1_SHIFT   0 /* CLKGEN_ERR_ASYNC_EINT1 */
 
#define ARIZONA_CLKGEN_ERR_ASYNC_EINT1_WIDTH   1 /* CLKGEN_ERR_ASYNC_EINT1 */
 
#define ARIZONA_ASRC_CFG_ERR_EINT1   0x8000 /* ASRC_CFG_ERR_EINT1 */
 
#define ARIZONA_ASRC_CFG_ERR_EINT1_MASK   0x8000 /* ASRC_CFG_ERR_EINT1 */
 
#define ARIZONA_ASRC_CFG_ERR_EINT1_SHIFT   15 /* ASRC_CFG_ERR_EINT1 */
 
#define ARIZONA_ASRC_CFG_ERR_EINT1_WIDTH   1 /* ASRC_CFG_ERR_EINT1 */
 
#define ARIZONA_AIF3_ERR_EINT1   0x4000 /* AIF3_ERR_EINT1 */
 
#define ARIZONA_AIF3_ERR_EINT1_MASK   0x4000 /* AIF3_ERR_EINT1 */
 
#define ARIZONA_AIF3_ERR_EINT1_SHIFT   14 /* AIF3_ERR_EINT1 */
 
#define ARIZONA_AIF3_ERR_EINT1_WIDTH   1 /* AIF3_ERR_EINT1 */
 
#define ARIZONA_AIF2_ERR_EINT1   0x2000 /* AIF2_ERR_EINT1 */
 
#define ARIZONA_AIF2_ERR_EINT1_MASK   0x2000 /* AIF2_ERR_EINT1 */
 
#define ARIZONA_AIF2_ERR_EINT1_SHIFT   13 /* AIF2_ERR_EINT1 */
 
#define ARIZONA_AIF2_ERR_EINT1_WIDTH   1 /* AIF2_ERR_EINT1 */
 
#define ARIZONA_AIF1_ERR_EINT1   0x1000 /* AIF1_ERR_EINT1 */
 
#define ARIZONA_AIF1_ERR_EINT1_MASK   0x1000 /* AIF1_ERR_EINT1 */
 
#define ARIZONA_AIF1_ERR_EINT1_SHIFT   12 /* AIF1_ERR_EINT1 */
 
#define ARIZONA_AIF1_ERR_EINT1_WIDTH   1 /* AIF1_ERR_EINT1 */
 
#define ARIZONA_CTRLIF_ERR_EINT1   0x0800 /* CTRLIF_ERR_EINT1 */
 
#define ARIZONA_CTRLIF_ERR_EINT1_MASK   0x0800 /* CTRLIF_ERR_EINT1 */
 
#define ARIZONA_CTRLIF_ERR_EINT1_SHIFT   11 /* CTRLIF_ERR_EINT1 */
 
#define ARIZONA_CTRLIF_ERR_EINT1_WIDTH   1 /* CTRLIF_ERR_EINT1 */
 
#define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1   0x0400 /* MIXER_DROPPED_SAMPLE_EINT1 */
 
#define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1_MASK   0x0400 /* MIXER_DROPPED_SAMPLE_EINT1 */
 
#define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1_SHIFT   10 /* MIXER_DROPPED_SAMPLE_EINT1 */
 
#define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1_WIDTH   1 /* MIXER_DROPPED_SAMPLE_EINT1 */
 
#define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1   0x0200 /* ASYNC_CLK_ENA_LOW_EINT1 */
 
#define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1_MASK   0x0200 /* ASYNC_CLK_ENA_LOW_EINT1 */
 
#define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1_SHIFT   9 /* ASYNC_CLK_ENA_LOW_EINT1 */
 
#define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1_WIDTH   1 /* ASYNC_CLK_ENA_LOW_EINT1 */
 
#define ARIZONA_SYSCLK_ENA_LOW_EINT1   0x0100 /* SYSCLK_ENA_LOW_EINT1 */
 
#define ARIZONA_SYSCLK_ENA_LOW_EINT1_MASK   0x0100 /* SYSCLK_ENA_LOW_EINT1 */
 
#define ARIZONA_SYSCLK_ENA_LOW_EINT1_SHIFT   8 /* SYSCLK_ENA_LOW_EINT1 */
 
#define ARIZONA_SYSCLK_ENA_LOW_EINT1_WIDTH   1 /* SYSCLK_ENA_LOW_EINT1 */
 
#define ARIZONA_ISRC1_CFG_ERR_EINT1   0x0080 /* ISRC1_CFG_ERR_EINT1 */
 
#define ARIZONA_ISRC1_CFG_ERR_EINT1_MASK   0x0080 /* ISRC1_CFG_ERR_EINT1 */
 
#define ARIZONA_ISRC1_CFG_ERR_EINT1_SHIFT   7 /* ISRC1_CFG_ERR_EINT1 */
 
#define ARIZONA_ISRC1_CFG_ERR_EINT1_WIDTH   1 /* ISRC1_CFG_ERR_EINT1 */
 
#define ARIZONA_ISRC2_CFG_ERR_EINT1   0x0040 /* ISRC2_CFG_ERR_EINT1 */
 
#define ARIZONA_ISRC2_CFG_ERR_EINT1_MASK   0x0040 /* ISRC2_CFG_ERR_EINT1 */
 
#define ARIZONA_ISRC2_CFG_ERR_EINT1_SHIFT   6 /* ISRC2_CFG_ERR_EINT1 */
 
#define ARIZONA_ISRC2_CFG_ERR_EINT1_WIDTH   1 /* ISRC2_CFG_ERR_EINT1 */
 
#define ARIZONA_BOOT_DONE_EINT1   0x0100 /* BOOT_DONE_EINT1 */
 
#define ARIZONA_BOOT_DONE_EINT1_MASK   0x0100 /* BOOT_DONE_EINT1 */
 
#define ARIZONA_BOOT_DONE_EINT1_SHIFT   8 /* BOOT_DONE_EINT1 */
 
#define ARIZONA_BOOT_DONE_EINT1_WIDTH   1 /* BOOT_DONE_EINT1 */
 
#define ARIZONA_DCS_DAC_DONE_EINT1   0x0080 /* DCS_DAC_DONE_EINT1 */
 
#define ARIZONA_DCS_DAC_DONE_EINT1_MASK   0x0080 /* DCS_DAC_DONE_EINT1 */
 
#define ARIZONA_DCS_DAC_DONE_EINT1_SHIFT   7 /* DCS_DAC_DONE_EINT1 */
 
#define ARIZONA_DCS_DAC_DONE_EINT1_WIDTH   1 /* DCS_DAC_DONE_EINT1 */
 
#define ARIZONA_DCS_HP_DONE_EINT1   0x0040 /* DCS_HP_DONE_EINT1 */
 
#define ARIZONA_DCS_HP_DONE_EINT1_MASK   0x0040 /* DCS_HP_DONE_EINT1 */
 
#define ARIZONA_DCS_HP_DONE_EINT1_SHIFT   6 /* DCS_HP_DONE_EINT1 */
 
#define ARIZONA_DCS_HP_DONE_EINT1_WIDTH   1 /* DCS_HP_DONE_EINT1 */
 
#define ARIZONA_FLL2_CLOCK_OK_EINT1   0x0002 /* FLL2_CLOCK_OK_EINT1 */
 
#define ARIZONA_FLL2_CLOCK_OK_EINT1_MASK   0x0002 /* FLL2_CLOCK_OK_EINT1 */
 
#define ARIZONA_FLL2_CLOCK_OK_EINT1_SHIFT   1 /* FLL2_CLOCK_OK_EINT1 */
 
#define ARIZONA_FLL2_CLOCK_OK_EINT1_WIDTH   1 /* FLL2_CLOCK_OK_EINT1 */
 
#define ARIZONA_FLL1_CLOCK_OK_EINT1   0x0001 /* FLL1_CLOCK_OK_EINT1 */
 
#define ARIZONA_FLL1_CLOCK_OK_EINT1_MASK   0x0001 /* FLL1_CLOCK_OK_EINT1 */
 
#define ARIZONA_FLL1_CLOCK_OK_EINT1_SHIFT   0 /* FLL1_CLOCK_OK_EINT1 */
 
#define ARIZONA_FLL1_CLOCK_OK_EINT1_WIDTH   1 /* FLL1_CLOCK_OK_EINT1 */
 
#define ARIZONA_IM_GP4_EINT1   0x0008 /* IM_GP4_EINT1 */
 
#define ARIZONA_IM_GP4_EINT1_MASK   0x0008 /* IM_GP4_EINT1 */
 
#define ARIZONA_IM_GP4_EINT1_SHIFT   3 /* IM_GP4_EINT1 */
 
#define ARIZONA_IM_GP4_EINT1_WIDTH   1 /* IM_GP4_EINT1 */
 
#define ARIZONA_IM_GP3_EINT1   0x0004 /* IM_GP3_EINT1 */
 
#define ARIZONA_IM_GP3_EINT1_MASK   0x0004 /* IM_GP3_EINT1 */
 
#define ARIZONA_IM_GP3_EINT1_SHIFT   2 /* IM_GP3_EINT1 */
 
#define ARIZONA_IM_GP3_EINT1_WIDTH   1 /* IM_GP3_EINT1 */
 
#define ARIZONA_IM_GP2_EINT1   0x0002 /* IM_GP2_EINT1 */
 
#define ARIZONA_IM_GP2_EINT1_MASK   0x0002 /* IM_GP2_EINT1 */
 
#define ARIZONA_IM_GP2_EINT1_SHIFT   1 /* IM_GP2_EINT1 */
 
#define ARIZONA_IM_GP2_EINT1_WIDTH   1 /* IM_GP2_EINT1 */
 
#define ARIZONA_IM_GP1_EINT1   0x0001 /* IM_GP1_EINT1 */
 
#define ARIZONA_IM_GP1_EINT1_MASK   0x0001 /* IM_GP1_EINT1 */
 
#define ARIZONA_IM_GP1_EINT1_SHIFT   0 /* IM_GP1_EINT1 */
 
#define ARIZONA_IM_GP1_EINT1_WIDTH   1 /* IM_GP1_EINT1 */
 
#define ARIZONA_IM_DSP1_RAM_RDY_EINT1   0x0100 /* IM_DSP1_RAM_RDY_EINT1 */
 
#define ARIZONA_IM_DSP1_RAM_RDY_EINT1_MASK   0x0100 /* IM_DSP1_RAM_RDY_EINT1 */
 
#define ARIZONA_IM_DSP1_RAM_RDY_EINT1_SHIFT   8 /* IM_DSP1_RAM_RDY_EINT1 */
 
#define ARIZONA_IM_DSP1_RAM_RDY_EINT1_WIDTH   1 /* IM_DSP1_RAM_RDY_EINT1 */
 
#define ARIZONA_IM_DSP_IRQ2_EINT1   0x0002 /* IM_DSP_IRQ2_EINT1 */
 
#define ARIZONA_IM_DSP_IRQ2_EINT1_MASK   0x0002 /* IM_DSP_IRQ2_EINT1 */
 
#define ARIZONA_IM_DSP_IRQ2_EINT1_SHIFT   1 /* IM_DSP_IRQ2_EINT1 */
 
#define ARIZONA_IM_DSP_IRQ2_EINT1_WIDTH   1 /* IM_DSP_IRQ2_EINT1 */
 
#define ARIZONA_IM_DSP_IRQ1_EINT1   0x0001 /* IM_DSP_IRQ1_EINT1 */
 
#define ARIZONA_IM_DSP_IRQ1_EINT1_MASK   0x0001 /* IM_DSP_IRQ1_EINT1 */
 
#define ARIZONA_IM_DSP_IRQ1_EINT1_SHIFT   0 /* IM_DSP_IRQ1_EINT1 */
 
#define ARIZONA_IM_DSP_IRQ1_EINT1_WIDTH   1 /* IM_DSP_IRQ1_EINT1 */
 
#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1   0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT1 */
 
#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1_MASK   0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT1 */
 
#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1_SHIFT   15 /* IM_SPK_SHUTDOWN_WARN_EINT1 */
 
#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1_WIDTH   1 /* IM_SPK_SHUTDOWN_WARN_EINT1 */
 
#define ARIZONA_IM_SPK_SHUTDOWN_EINT1   0x4000 /* IM_SPK_SHUTDOWN_EINT1 */
 
#define ARIZONA_IM_SPK_SHUTDOWN_EINT1_MASK   0x4000 /* IM_SPK_SHUTDOWN_EINT1 */
 
#define ARIZONA_IM_SPK_SHUTDOWN_EINT1_SHIFT   14 /* IM_SPK_SHUTDOWN_EINT1 */
 
#define ARIZONA_IM_SPK_SHUTDOWN_EINT1_WIDTH   1 /* IM_SPK_SHUTDOWN_EINT1 */
 
#define ARIZONA_IM_HPDET_EINT1   0x2000 /* IM_HPDET_EINT1 */
 
#define ARIZONA_IM_HPDET_EINT1_MASK   0x2000 /* IM_HPDET_EINT1 */
 
#define ARIZONA_IM_HPDET_EINT1_SHIFT   13 /* IM_HPDET_EINT1 */
 
#define ARIZONA_IM_HPDET_EINT1_WIDTH   1 /* IM_HPDET_EINT1 */
 
#define ARIZONA_IM_MICDET_EINT1   0x1000 /* IM_MICDET_EINT1 */
 
#define ARIZONA_IM_MICDET_EINT1_MASK   0x1000 /* IM_MICDET_EINT1 */
 
#define ARIZONA_IM_MICDET_EINT1_SHIFT   12 /* IM_MICDET_EINT1 */
 
#define ARIZONA_IM_MICDET_EINT1_WIDTH   1 /* IM_MICDET_EINT1 */
 
#define ARIZONA_IM_WSEQ_DONE_EINT1   0x0800 /* IM_WSEQ_DONE_EINT1 */
 
#define ARIZONA_IM_WSEQ_DONE_EINT1_MASK   0x0800 /* IM_WSEQ_DONE_EINT1 */
 
#define ARIZONA_IM_WSEQ_DONE_EINT1_SHIFT   11 /* IM_WSEQ_DONE_EINT1 */
 
#define ARIZONA_IM_WSEQ_DONE_EINT1_WIDTH   1 /* IM_WSEQ_DONE_EINT1 */
 
#define ARIZONA_IM_DRC2_SIG_DET_EINT1   0x0400 /* IM_DRC2_SIG_DET_EINT1 */
 
#define ARIZONA_IM_DRC2_SIG_DET_EINT1_MASK   0x0400 /* IM_DRC2_SIG_DET_EINT1 */
 
#define ARIZONA_IM_DRC2_SIG_DET_EINT1_SHIFT   10 /* IM_DRC2_SIG_DET_EINT1 */
 
#define ARIZONA_IM_DRC2_SIG_DET_EINT1_WIDTH   1 /* IM_DRC2_SIG_DET_EINT1 */
 
#define ARIZONA_IM_DRC1_SIG_DET_EINT1   0x0200 /* IM_DRC1_SIG_DET_EINT1 */
 
#define ARIZONA_IM_DRC1_SIG_DET_EINT1_MASK   0x0200 /* IM_DRC1_SIG_DET_EINT1 */
 
#define ARIZONA_IM_DRC1_SIG_DET_EINT1_SHIFT   9 /* IM_DRC1_SIG_DET_EINT1 */
 
#define ARIZONA_IM_DRC1_SIG_DET_EINT1_WIDTH   1 /* IM_DRC1_SIG_DET_EINT1 */
 
#define ARIZONA_IM_ASRC2_LOCK_EINT1   0x0100 /* IM_ASRC2_LOCK_EINT1 */
 
#define ARIZONA_IM_ASRC2_LOCK_EINT1_MASK   0x0100 /* IM_ASRC2_LOCK_EINT1 */
 
#define ARIZONA_IM_ASRC2_LOCK_EINT1_SHIFT   8 /* IM_ASRC2_LOCK_EINT1 */
 
#define ARIZONA_IM_ASRC2_LOCK_EINT1_WIDTH   1 /* IM_ASRC2_LOCK_EINT1 */
 
#define ARIZONA_IM_ASRC1_LOCK_EINT1   0x0080 /* IM_ASRC1_LOCK_EINT1 */
 
#define ARIZONA_IM_ASRC1_LOCK_EINT1_MASK   0x0080 /* IM_ASRC1_LOCK_EINT1 */
 
#define ARIZONA_IM_ASRC1_LOCK_EINT1_SHIFT   7 /* IM_ASRC1_LOCK_EINT1 */
 
#define ARIZONA_IM_ASRC1_LOCK_EINT1_WIDTH   1 /* IM_ASRC1_LOCK_EINT1 */
 
#define ARIZONA_IM_UNDERCLOCKED_EINT1   0x0040 /* IM_UNDERCLOCKED_EINT1 */
 
#define ARIZONA_IM_UNDERCLOCKED_EINT1_MASK   0x0040 /* IM_UNDERCLOCKED_EINT1 */
 
#define ARIZONA_IM_UNDERCLOCKED_EINT1_SHIFT   6 /* IM_UNDERCLOCKED_EINT1 */
 
#define ARIZONA_IM_UNDERCLOCKED_EINT1_WIDTH   1 /* IM_UNDERCLOCKED_EINT1 */
 
#define ARIZONA_IM_OVERCLOCKED_EINT1   0x0020 /* IM_OVERCLOCKED_EINT1 */
 
#define ARIZONA_IM_OVERCLOCKED_EINT1_MASK   0x0020 /* IM_OVERCLOCKED_EINT1 */
 
#define ARIZONA_IM_OVERCLOCKED_EINT1_SHIFT   5 /* IM_OVERCLOCKED_EINT1 */
 
#define ARIZONA_IM_OVERCLOCKED_EINT1_WIDTH   1 /* IM_OVERCLOCKED_EINT1 */
 
#define ARIZONA_IM_FLL2_LOCK_EINT1   0x0008 /* IM_FLL2_LOCK_EINT1 */
 
#define ARIZONA_IM_FLL2_LOCK_EINT1_MASK   0x0008 /* IM_FLL2_LOCK_EINT1 */
 
#define ARIZONA_IM_FLL2_LOCK_EINT1_SHIFT   3 /* IM_FLL2_LOCK_EINT1 */
 
#define ARIZONA_IM_FLL2_LOCK_EINT1_WIDTH   1 /* IM_FLL2_LOCK_EINT1 */
 
#define ARIZONA_IM_FLL1_LOCK_EINT1   0x0004 /* IM_FLL1_LOCK_EINT1 */
 
#define ARIZONA_IM_FLL1_LOCK_EINT1_MASK   0x0004 /* IM_FLL1_LOCK_EINT1 */
 
#define ARIZONA_IM_FLL1_LOCK_EINT1_SHIFT   2 /* IM_FLL1_LOCK_EINT1 */
 
#define ARIZONA_IM_FLL1_LOCK_EINT1_WIDTH   1 /* IM_FLL1_LOCK_EINT1 */
 
#define ARIZONA_IM_CLKGEN_ERR_EINT1   0x0002 /* IM_CLKGEN_ERR_EINT1 */
 
#define ARIZONA_IM_CLKGEN_ERR_EINT1_MASK   0x0002 /* IM_CLKGEN_ERR_EINT1 */
 
#define ARIZONA_IM_CLKGEN_ERR_EINT1_SHIFT   1 /* IM_CLKGEN_ERR_EINT1 */
 
#define ARIZONA_IM_CLKGEN_ERR_EINT1_WIDTH   1 /* IM_CLKGEN_ERR_EINT1 */
 
#define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1   0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT1 */
 
#define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1_MASK   0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT1 */
 
#define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1_SHIFT   0 /* IM_CLKGEN_ERR_ASYNC_EINT1 */
 
#define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1_WIDTH   1 /* IM_CLKGEN_ERR_ASYNC_EINT1 */
 
#define ARIZONA_IM_ASRC_CFG_ERR_EINT1   0x8000 /* IM_ASRC_CFG_ERR_EINT1 */
 
#define ARIZONA_IM_ASRC_CFG_ERR_EINT1_MASK   0x8000 /* IM_ASRC_CFG_ERR_EINT1 */
 
#define ARIZONA_IM_ASRC_CFG_ERR_EINT1_SHIFT   15 /* IM_ASRC_CFG_ERR_EINT1 */
 
#define ARIZONA_IM_ASRC_CFG_ERR_EINT1_WIDTH   1 /* IM_ASRC_CFG_ERR_EINT1 */
 
#define ARIZONA_IM_AIF3_ERR_EINT1   0x4000 /* IM_AIF3_ERR_EINT1 */
 
#define ARIZONA_IM_AIF3_ERR_EINT1_MASK   0x4000 /* IM_AIF3_ERR_EINT1 */
 
#define ARIZONA_IM_AIF3_ERR_EINT1_SHIFT   14 /* IM_AIF3_ERR_EINT1 */
 
#define ARIZONA_IM_AIF3_ERR_EINT1_WIDTH   1 /* IM_AIF3_ERR_EINT1 */
 
#define ARIZONA_IM_AIF2_ERR_EINT1   0x2000 /* IM_AIF2_ERR_EINT1 */
 
#define ARIZONA_IM_AIF2_ERR_EINT1_MASK   0x2000 /* IM_AIF2_ERR_EINT1 */
 
#define ARIZONA_IM_AIF2_ERR_EINT1_SHIFT   13 /* IM_AIF2_ERR_EINT1 */
 
#define ARIZONA_IM_AIF2_ERR_EINT1_WIDTH   1 /* IM_AIF2_ERR_EINT1 */
 
#define ARIZONA_IM_AIF1_ERR_EINT1   0x1000 /* IM_AIF1_ERR_EINT1 */
 
#define ARIZONA_IM_AIF1_ERR_EINT1_MASK   0x1000 /* IM_AIF1_ERR_EINT1 */
 
#define ARIZONA_IM_AIF1_ERR_EINT1_SHIFT   12 /* IM_AIF1_ERR_EINT1 */
 
#define ARIZONA_IM_AIF1_ERR_EINT1_WIDTH   1 /* IM_AIF1_ERR_EINT1 */
 
#define ARIZONA_IM_CTRLIF_ERR_EINT1   0x0800 /* IM_CTRLIF_ERR_EINT1 */
 
#define ARIZONA_IM_CTRLIF_ERR_EINT1_MASK   0x0800 /* IM_CTRLIF_ERR_EINT1 */
 
#define ARIZONA_IM_CTRLIF_ERR_EINT1_SHIFT   11 /* IM_CTRLIF_ERR_EINT1 */
 
#define ARIZONA_IM_CTRLIF_ERR_EINT1_WIDTH   1 /* IM_CTRLIF_ERR_EINT1 */
 
#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1   0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
 
#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_MASK   0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
 
#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_SHIFT   10 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
 
#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_WIDTH   1 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
 
#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1   0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
 
#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_MASK   0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
 
#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_SHIFT   9 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
 
#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_WIDTH   1 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
 
#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1   0x0100 /* IM_SYSCLK_ENA_LOW_EINT1 */
 
#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_MASK   0x0100 /* IM_SYSCLK_ENA_LOW_EINT1 */
 
#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_SHIFT   8 /* IM_SYSCLK_ENA_LOW_EINT1 */
 
#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_WIDTH   1 /* IM_SYSCLK_ENA_LOW_EINT1 */
 
#define ARIZONA_IM_ISRC1_CFG_ERR_EINT1   0x0080 /* IM_ISRC1_CFG_ERR_EINT1 */
 
#define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_MASK   0x0080 /* IM_ISRC1_CFG_ERR_EINT1 */
 
#define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_SHIFT   7 /* IM_ISRC1_CFG_ERR_EINT1 */
 
#define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_WIDTH   1 /* IM_ISRC1_CFG_ERR_EINT1 */
 
#define ARIZONA_IM_ISRC2_CFG_ERR_EINT1   0x0040 /* IM_ISRC2_CFG_ERR_EINT1 */
 
#define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_MASK   0x0040 /* IM_ISRC2_CFG_ERR_EINT1 */
 
#define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_SHIFT   6 /* IM_ISRC2_CFG_ERR_EINT1 */
 
#define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_WIDTH   1 /* IM_ISRC2_CFG_ERR_EINT1 */
 
#define ARIZONA_IM_BOOT_DONE_EINT1   0x0100 /* IM_BOOT_DONE_EINT1 */
 
#define ARIZONA_IM_BOOT_DONE_EINT1_MASK   0x0100 /* IM_BOOT_DONE_EINT1 */
 
#define ARIZONA_IM_BOOT_DONE_EINT1_SHIFT   8 /* IM_BOOT_DONE_EINT1 */
 
#define ARIZONA_IM_BOOT_DONE_EINT1_WIDTH   1 /* IM_BOOT_DONE_EINT1 */
 
#define ARIZONA_IM_DCS_DAC_DONE_EINT1   0x0080 /* IM_DCS_DAC_DONE_EINT1 */
 
#define ARIZONA_IM_DCS_DAC_DONE_EINT1_MASK   0x0080 /* IM_DCS_DAC_DONE_EINT1 */
 
#define ARIZONA_IM_DCS_DAC_DONE_EINT1_SHIFT   7 /* IM_DCS_DAC_DONE_EINT1 */
 
#define ARIZONA_IM_DCS_DAC_DONE_EINT1_WIDTH   1 /* IM_DCS_DAC_DONE_EINT1 */
 
#define ARIZONA_IM_DCS_HP_DONE_EINT1   0x0040 /* IM_DCS_HP_DONE_EINT1 */
 
#define ARIZONA_IM_DCS_HP_DONE_EINT1_MASK   0x0040 /* IM_DCS_HP_DONE_EINT1 */
 
#define ARIZONA_IM_DCS_HP_DONE_EINT1_SHIFT   6 /* IM_DCS_HP_DONE_EINT1 */
 
#define ARIZONA_IM_DCS_HP_DONE_EINT1_WIDTH   1 /* IM_DCS_HP_DONE_EINT1 */
 
#define ARIZONA_IM_FLL2_CLOCK_OK_EINT1   0x0002 /* IM_FLL2_CLOCK_OK_EINT1 */
 
#define ARIZONA_IM_FLL2_CLOCK_OK_EINT1_MASK   0x0002 /* IM_FLL2_CLOCK_OK_EINT1 */
 
#define ARIZONA_IM_FLL2_CLOCK_OK_EINT1_SHIFT   1 /* IM_FLL2_CLOCK_OK_EINT1 */
 
#define ARIZONA_IM_FLL2_CLOCK_OK_EINT1_WIDTH   1 /* IM_FLL2_CLOCK_OK_EINT1 */
 
#define ARIZONA_IM_FLL1_CLOCK_OK_EINT1   0x0001 /* IM_FLL1_CLOCK_OK_EINT1 */
 
#define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_MASK   0x0001 /* IM_FLL1_CLOCK_OK_EINT1 */
 
#define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_SHIFT   0 /* IM_FLL1_CLOCK_OK_EINT1 */
 
#define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_WIDTH   1 /* IM_FLL1_CLOCK_OK_EINT1 */
 
#define ARIZONA_IM_IRQ1   0x0001 /* IM_IRQ1 */
 
#define ARIZONA_IM_IRQ1_MASK   0x0001 /* IM_IRQ1 */
 
#define ARIZONA_IM_IRQ1_SHIFT   0 /* IM_IRQ1 */
 
#define ARIZONA_IM_IRQ1_WIDTH   1 /* IM_IRQ1 */
 
#define ARIZONA_GP4_EINT2   0x0008 /* GP4_EINT2 */
 
#define ARIZONA_GP4_EINT2_MASK   0x0008 /* GP4_EINT2 */
 
#define ARIZONA_GP4_EINT2_SHIFT   3 /* GP4_EINT2 */
 
#define ARIZONA_GP4_EINT2_WIDTH   1 /* GP4_EINT2 */
 
#define ARIZONA_GP3_EINT2   0x0004 /* GP3_EINT2 */
 
#define ARIZONA_GP3_EINT2_MASK   0x0004 /* GP3_EINT2 */
 
#define ARIZONA_GP3_EINT2_SHIFT   2 /* GP3_EINT2 */
 
#define ARIZONA_GP3_EINT2_WIDTH   1 /* GP3_EINT2 */
 
#define ARIZONA_GP2_EINT2   0x0002 /* GP2_EINT2 */
 
#define ARIZONA_GP2_EINT2_MASK   0x0002 /* GP2_EINT2 */
 
#define ARIZONA_GP2_EINT2_SHIFT   1 /* GP2_EINT2 */
 
#define ARIZONA_GP2_EINT2_WIDTH   1 /* GP2_EINT2 */
 
#define ARIZONA_GP1_EINT2   0x0001 /* GP1_EINT2 */
 
#define ARIZONA_GP1_EINT2_MASK   0x0001 /* GP1_EINT2 */
 
#define ARIZONA_GP1_EINT2_SHIFT   0 /* GP1_EINT2 */
 
#define ARIZONA_GP1_EINT2_WIDTH   1 /* GP1_EINT2 */
 
#define ARIZONA_DSP1_RAM_RDY_EINT2   0x0100 /* DSP1_RAM_RDY_EINT2 */
 
#define ARIZONA_DSP1_RAM_RDY_EINT2_MASK   0x0100 /* DSP1_RAM_RDY_EINT2 */
 
#define ARIZONA_DSP1_RAM_RDY_EINT2_SHIFT   8 /* DSP1_RAM_RDY_EINT2 */
 
#define ARIZONA_DSP1_RAM_RDY_EINT2_WIDTH   1 /* DSP1_RAM_RDY_EINT2 */
 
#define ARIZONA_DSP_IRQ2_EINT2   0x0002 /* DSP_IRQ2_EINT2 */
 
#define ARIZONA_DSP_IRQ2_EINT2_MASK   0x0002 /* DSP_IRQ2_EINT2 */
 
#define ARIZONA_DSP_IRQ2_EINT2_SHIFT   1 /* DSP_IRQ2_EINT2 */
 
#define ARIZONA_DSP_IRQ2_EINT2_WIDTH   1 /* DSP_IRQ2_EINT2 */
 
#define ARIZONA_DSP_IRQ1_EINT2   0x0001 /* DSP_IRQ1_EINT2 */
 
#define ARIZONA_DSP_IRQ1_EINT2_MASK   0x0001 /* DSP_IRQ1_EINT2 */
 
#define ARIZONA_DSP_IRQ1_EINT2_SHIFT   0 /* DSP_IRQ1_EINT2 */
 
#define ARIZONA_DSP_IRQ1_EINT2_WIDTH   1 /* DSP_IRQ1_EINT2 */
 
#define ARIZONA_SPK_SHUTDOWN_WARN_EINT2   0x8000 /* SPK_SHUTDOWN_WARN_EINT2 */
 
#define ARIZONA_SPK_SHUTDOWN_WARN_EINT2_MASK   0x8000 /* SPK_SHUTDOWN_WARN_EINT2 */
 
#define ARIZONA_SPK_SHUTDOWN_WARN_EINT2_SHIFT   15 /* SPK_SHUTDOWN_WARN_EINT2 */
 
#define ARIZONA_SPK_SHUTDOWN_WARN_EINT2_WIDTH   1 /* SPK_SHUTDOWN_WARN_EINT2 */
 
#define ARIZONA_SPK_SHUTDOWN_EINT2   0x4000 /* SPK_SHUTDOWN_EINT2 */
 
#define ARIZONA_SPK_SHUTDOWN_EINT2_MASK   0x4000 /* SPK_SHUTDOWN_EINT2 */
 
#define ARIZONA_SPK_SHUTDOWN_EINT2_SHIFT   14 /* SPK_SHUTDOWN_EINT2 */
 
#define ARIZONA_SPK_SHUTDOWN_EINT2_WIDTH   1 /* SPK_SHUTDOWN_EINT2 */
 
#define ARIZONA_HPDET_EINT2   0x2000 /* HPDET_EINT2 */
 
#define ARIZONA_HPDET_EINT2_MASK   0x2000 /* HPDET_EINT2 */
 
#define ARIZONA_HPDET_EINT2_SHIFT   13 /* HPDET_EINT2 */
 
#define ARIZONA_HPDET_EINT2_WIDTH   1 /* HPDET_EINT2 */
 
#define ARIZONA_MICDET_EINT2   0x1000 /* MICDET_EINT2 */
 
#define ARIZONA_MICDET_EINT2_MASK   0x1000 /* MICDET_EINT2 */
 
#define ARIZONA_MICDET_EINT2_SHIFT   12 /* MICDET_EINT2 */
 
#define ARIZONA_MICDET_EINT2_WIDTH   1 /* MICDET_EINT2 */
 
#define ARIZONA_WSEQ_DONE_EINT2   0x0800 /* WSEQ_DONE_EINT2 */
 
#define ARIZONA_WSEQ_DONE_EINT2_MASK   0x0800 /* WSEQ_DONE_EINT2 */
 
#define ARIZONA_WSEQ_DONE_EINT2_SHIFT   11 /* WSEQ_DONE_EINT2 */
 
#define ARIZONA_WSEQ_DONE_EINT2_WIDTH   1 /* WSEQ_DONE_EINT2 */
 
#define ARIZONA_DRC2_SIG_DET_EINT2   0x0400 /* DRC2_SIG_DET_EINT2 */
 
#define ARIZONA_DRC2_SIG_DET_EINT2_MASK   0x0400 /* DRC2_SIG_DET_EINT2 */
 
#define ARIZONA_DRC2_SIG_DET_EINT2_SHIFT   10 /* DRC2_SIG_DET_EINT2 */
 
#define ARIZONA_DRC2_SIG_DET_EINT2_WIDTH   1 /* DRC2_SIG_DET_EINT2 */
 
#define ARIZONA_DRC1_SIG_DET_EINT2   0x0200 /* DRC1_SIG_DET_EINT2 */
 
#define ARIZONA_DRC1_SIG_DET_EINT2_MASK   0x0200 /* DRC1_SIG_DET_EINT2 */
 
#define ARIZONA_DRC1_SIG_DET_EINT2_SHIFT   9 /* DRC1_SIG_DET_EINT2 */
 
#define ARIZONA_DRC1_SIG_DET_EINT2_WIDTH   1 /* DRC1_SIG_DET_EINT2 */
 
#define ARIZONA_ASRC2_LOCK_EINT2   0x0100 /* ASRC2_LOCK_EINT2 */
 
#define ARIZONA_ASRC2_LOCK_EINT2_MASK   0x0100 /* ASRC2_LOCK_EINT2 */
 
#define ARIZONA_ASRC2_LOCK_EINT2_SHIFT   8 /* ASRC2_LOCK_EINT2 */
 
#define ARIZONA_ASRC2_LOCK_EINT2_WIDTH   1 /* ASRC2_LOCK_EINT2 */
 
#define ARIZONA_ASRC1_LOCK_EINT2   0x0080 /* ASRC1_LOCK_EINT2 */
 
#define ARIZONA_ASRC1_LOCK_EINT2_MASK   0x0080 /* ASRC1_LOCK_EINT2 */
 
#define ARIZONA_ASRC1_LOCK_EINT2_SHIFT   7 /* ASRC1_LOCK_EINT2 */
 
#define ARIZONA_ASRC1_LOCK_EINT2_WIDTH   1 /* ASRC1_LOCK_EINT2 */
 
#define ARIZONA_UNDERCLOCKED_EINT2   0x0040 /* UNDERCLOCKED_EINT2 */
 
#define ARIZONA_UNDERCLOCKED_EINT2_MASK   0x0040 /* UNDERCLOCKED_EINT2 */
 
#define ARIZONA_UNDERCLOCKED_EINT2_SHIFT   6 /* UNDERCLOCKED_EINT2 */
 
#define ARIZONA_UNDERCLOCKED_EINT2_WIDTH   1 /* UNDERCLOCKED_EINT2 */
 
#define ARIZONA_OVERCLOCKED_EINT2   0x0020 /* OVERCLOCKED_EINT2 */
 
#define ARIZONA_OVERCLOCKED_EINT2_MASK   0x0020 /* OVERCLOCKED_EINT2 */
 
#define ARIZONA_OVERCLOCKED_EINT2_SHIFT   5 /* OVERCLOCKED_EINT2 */
 
#define ARIZONA_OVERCLOCKED_EINT2_WIDTH   1 /* OVERCLOCKED_EINT2 */
 
#define ARIZONA_FLL2_LOCK_EINT2   0x0008 /* FLL2_LOCK_EINT2 */
 
#define ARIZONA_FLL2_LOCK_EINT2_MASK   0x0008 /* FLL2_LOCK_EINT2 */
 
#define ARIZONA_FLL2_LOCK_EINT2_SHIFT   3 /* FLL2_LOCK_EINT2 */
 
#define ARIZONA_FLL2_LOCK_EINT2_WIDTH   1 /* FLL2_LOCK_EINT2 */
 
#define ARIZONA_FLL1_LOCK_EINT2   0x0004 /* FLL1_LOCK_EINT2 */
 
#define ARIZONA_FLL1_LOCK_EINT2_MASK   0x0004 /* FLL1_LOCK_EINT2 */
 
#define ARIZONA_FLL1_LOCK_EINT2_SHIFT   2 /* FLL1_LOCK_EINT2 */
 
#define ARIZONA_FLL1_LOCK_EINT2_WIDTH   1 /* FLL1_LOCK_EINT2 */
 
#define ARIZONA_CLKGEN_ERR_EINT2   0x0002 /* CLKGEN_ERR_EINT2 */
 
#define ARIZONA_CLKGEN_ERR_EINT2_MASK   0x0002 /* CLKGEN_ERR_EINT2 */
 
#define ARIZONA_CLKGEN_ERR_EINT2_SHIFT   1 /* CLKGEN_ERR_EINT2 */
 
#define ARIZONA_CLKGEN_ERR_EINT2_WIDTH   1 /* CLKGEN_ERR_EINT2 */
 
#define ARIZONA_CLKGEN_ERR_ASYNC_EINT2   0x0001 /* CLKGEN_ERR_ASYNC_EINT2 */
 
#define ARIZONA_CLKGEN_ERR_ASYNC_EINT2_MASK   0x0001 /* CLKGEN_ERR_ASYNC_EINT2 */
 
#define ARIZONA_CLKGEN_ERR_ASYNC_EINT2_SHIFT   0 /* CLKGEN_ERR_ASYNC_EINT2 */
 
#define ARIZONA_CLKGEN_ERR_ASYNC_EINT2_WIDTH   1 /* CLKGEN_ERR_ASYNC_EINT2 */
 
#define ARIZONA_ASRC_CFG_ERR_EINT2   0x8000 /* ASRC_CFG_ERR_EINT2 */
 
#define ARIZONA_ASRC_CFG_ERR_EINT2_MASK   0x8000 /* ASRC_CFG_ERR_EINT2 */
 
#define ARIZONA_ASRC_CFG_ERR_EINT2_SHIFT   15 /* ASRC_CFG_ERR_EINT2 */
 
#define ARIZONA_ASRC_CFG_ERR_EINT2_WIDTH   1 /* ASRC_CFG_ERR_EINT2 */
 
#define ARIZONA_AIF3_ERR_EINT2   0x4000 /* AIF3_ERR_EINT2 */
 
#define ARIZONA_AIF3_ERR_EINT2_MASK   0x4000 /* AIF3_ERR_EINT2 */
 
#define ARIZONA_AIF3_ERR_EINT2_SHIFT   14 /* AIF3_ERR_EINT2 */
 
#define ARIZONA_AIF3_ERR_EINT2_WIDTH   1 /* AIF3_ERR_EINT2 */
 
#define ARIZONA_AIF2_ERR_EINT2   0x2000 /* AIF2_ERR_EINT2 */
 
#define ARIZONA_AIF2_ERR_EINT2_MASK   0x2000 /* AIF2_ERR_EINT2 */
 
#define ARIZONA_AIF2_ERR_EINT2_SHIFT   13 /* AIF2_ERR_EINT2 */
 
#define ARIZONA_AIF2_ERR_EINT2_WIDTH   1 /* AIF2_ERR_EINT2 */
 
#define ARIZONA_AIF1_ERR_EINT2   0x1000 /* AIF1_ERR_EINT2 */
 
#define ARIZONA_AIF1_ERR_EINT2_MASK   0x1000 /* AIF1_ERR_EINT2 */
 
#define ARIZONA_AIF1_ERR_EINT2_SHIFT   12 /* AIF1_ERR_EINT2 */
 
#define ARIZONA_AIF1_ERR_EINT2_WIDTH   1 /* AIF1_ERR_EINT2 */
 
#define ARIZONA_CTRLIF_ERR_EINT2   0x0800 /* CTRLIF_ERR_EINT2 */
 
#define ARIZONA_CTRLIF_ERR_EINT2_MASK   0x0800 /* CTRLIF_ERR_EINT2 */
 
#define ARIZONA_CTRLIF_ERR_EINT2_SHIFT   11 /* CTRLIF_ERR_EINT2 */
 
#define ARIZONA_CTRLIF_ERR_EINT2_WIDTH   1 /* CTRLIF_ERR_EINT2 */
 
#define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2   0x0400 /* MIXER_DROPPED_SAMPLE_EINT2 */
 
#define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2_MASK   0x0400 /* MIXER_DROPPED_SAMPLE_EINT2 */
 
#define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2_SHIFT   10 /* MIXER_DROPPED_SAMPLE_EINT2 */
 
#define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2_WIDTH   1 /* MIXER_DROPPED_SAMPLE_EINT2 */
 
#define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2   0x0200 /* ASYNC_CLK_ENA_LOW_EINT2 */
 
#define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2_MASK   0x0200 /* ASYNC_CLK_ENA_LOW_EINT2 */
 
#define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2_SHIFT   9 /* ASYNC_CLK_ENA_LOW_EINT2 */
 
#define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2_WIDTH   1 /* ASYNC_CLK_ENA_LOW_EINT2 */
 
#define ARIZONA_SYSCLK_ENA_LOW_EINT2   0x0100 /* SYSCLK_ENA_LOW_EINT2 */
 
#define ARIZONA_SYSCLK_ENA_LOW_EINT2_MASK   0x0100 /* SYSCLK_ENA_LOW_EINT2 */
 
#define ARIZONA_SYSCLK_ENA_LOW_EINT2_SHIFT   8 /* SYSCLK_ENA_LOW_EINT2 */
 
#define ARIZONA_SYSCLK_ENA_LOW_EINT2_WIDTH   1 /* SYSCLK_ENA_LOW_EINT2 */
 
#define ARIZONA_ISRC1_CFG_ERR_EINT2   0x0080 /* ISRC1_CFG_ERR_EINT2 */
 
#define ARIZONA_ISRC1_CFG_ERR_EINT2_MASK   0x0080 /* ISRC1_CFG_ERR_EINT2 */
 
#define ARIZONA_ISRC1_CFG_ERR_EINT2_SHIFT   7 /* ISRC1_CFG_ERR_EINT2 */
 
#define ARIZONA_ISRC1_CFG_ERR_EINT2_WIDTH   1 /* ISRC1_CFG_ERR_EINT2 */
 
#define ARIZONA_ISRC2_CFG_ERR_EINT2   0x0040 /* ISRC2_CFG_ERR_EINT2 */
 
#define ARIZONA_ISRC2_CFG_ERR_EINT2_MASK   0x0040 /* ISRC2_CFG_ERR_EINT2 */
 
#define ARIZONA_ISRC2_CFG_ERR_EINT2_SHIFT   6 /* ISRC2_CFG_ERR_EINT2 */
 
#define ARIZONA_ISRC2_CFG_ERR_EINT2_WIDTH   1 /* ISRC2_CFG_ERR_EINT2 */
 
#define ARIZONA_BOOT_DONE_EINT2   0x0100 /* BOOT_DONE_EINT2 */
 
#define ARIZONA_BOOT_DONE_EINT2_MASK   0x0100 /* BOOT_DONE_EINT2 */
 
#define ARIZONA_BOOT_DONE_EINT2_SHIFT   8 /* BOOT_DONE_EINT2 */
 
#define ARIZONA_BOOT_DONE_EINT2_WIDTH   1 /* BOOT_DONE_EINT2 */
 
#define ARIZONA_DCS_DAC_DONE_EINT2   0x0080 /* DCS_DAC_DONE_EINT2 */
 
#define ARIZONA_DCS_DAC_DONE_EINT2_MASK   0x0080 /* DCS_DAC_DONE_EINT2 */
 
#define ARIZONA_DCS_DAC_DONE_EINT2_SHIFT   7 /* DCS_DAC_DONE_EINT2 */
 
#define ARIZONA_DCS_DAC_DONE_EINT2_WIDTH   1 /* DCS_DAC_DONE_EINT2 */
 
#define ARIZONA_DCS_HP_DONE_EINT2   0x0040 /* DCS_HP_DONE_EINT2 */
 
#define ARIZONA_DCS_HP_DONE_EINT2_MASK   0x0040 /* DCS_HP_DONE_EINT2 */
 
#define ARIZONA_DCS_HP_DONE_EINT2_SHIFT   6 /* DCS_HP_DONE_EINT2 */
 
#define ARIZONA_DCS_HP_DONE_EINT2_WIDTH   1 /* DCS_HP_DONE_EINT2 */
 
#define ARIZONA_FLL2_CLOCK_OK_EINT2   0x0002 /* FLL2_CLOCK_OK_EINT2 */
 
#define ARIZONA_FLL2_CLOCK_OK_EINT2_MASK   0x0002 /* FLL2_CLOCK_OK_EINT2 */
 
#define ARIZONA_FLL2_CLOCK_OK_EINT2_SHIFT   1 /* FLL2_CLOCK_OK_EINT2 */
 
#define ARIZONA_FLL2_CLOCK_OK_EINT2_WIDTH   1 /* FLL2_CLOCK_OK_EINT2 */
 
#define ARIZONA_FLL1_CLOCK_OK_EINT2   0x0001 /* FLL1_CLOCK_OK_EINT2 */
 
#define ARIZONA_FLL1_CLOCK_OK_EINT2_MASK   0x0001 /* FLL1_CLOCK_OK_EINT2 */
 
#define ARIZONA_FLL1_CLOCK_OK_EINT2_SHIFT   0 /* FLL1_CLOCK_OK_EINT2 */
 
#define ARIZONA_FLL1_CLOCK_OK_EINT2_WIDTH   1 /* FLL1_CLOCK_OK_EINT2 */
 
#define ARIZONA_IM_GP4_EINT2   0x0008 /* IM_GP4_EINT2 */
 
#define ARIZONA_IM_GP4_EINT2_MASK   0x0008 /* IM_GP4_EINT2 */
 
#define ARIZONA_IM_GP4_EINT2_SHIFT   3 /* IM_GP4_EINT2 */
 
#define ARIZONA_IM_GP4_EINT2_WIDTH   1 /* IM_GP4_EINT2 */
 
#define ARIZONA_IM_GP3_EINT2   0x0004 /* IM_GP3_EINT2 */
 
#define ARIZONA_IM_GP3_EINT2_MASK   0x0004 /* IM_GP3_EINT2 */
 
#define ARIZONA_IM_GP3_EINT2_SHIFT   2 /* IM_GP3_EINT2 */
 
#define ARIZONA_IM_GP3_EINT2_WIDTH   1 /* IM_GP3_EINT2 */
 
#define ARIZONA_IM_GP2_EINT2   0x0002 /* IM_GP2_EINT2 */
 
#define ARIZONA_IM_GP2_EINT2_MASK   0x0002 /* IM_GP2_EINT2 */
 
#define ARIZONA_IM_GP2_EINT2_SHIFT   1 /* IM_GP2_EINT2 */
 
#define ARIZONA_IM_GP2_EINT2_WIDTH   1 /* IM_GP2_EINT2 */
 
#define ARIZONA_IM_GP1_EINT2   0x0001 /* IM_GP1_EINT2 */
 
#define ARIZONA_IM_GP1_EINT2_MASK   0x0001 /* IM_GP1_EINT2 */
 
#define ARIZONA_IM_GP1_EINT2_SHIFT   0 /* IM_GP1_EINT2 */
 
#define ARIZONA_IM_GP1_EINT2_WIDTH   1 /* IM_GP1_EINT2 */
 
#define ARIZONA_IM_DSP1_RAM_RDY_EINT2   0x0100 /* IM_DSP1_RAM_RDY_EINT2 */
 
#define ARIZONA_IM_DSP1_RAM_RDY_EINT2_MASK   0x0100 /* IM_DSP1_RAM_RDY_EINT2 */
 
#define ARIZONA_IM_DSP1_RAM_RDY_EINT2_SHIFT   8 /* IM_DSP1_RAM_RDY_EINT2 */
 
#define ARIZONA_IM_DSP1_RAM_RDY_EINT2_WIDTH   1 /* IM_DSP1_RAM_RDY_EINT2 */
 
#define ARIZONA_IM_DSP_IRQ2_EINT2   0x0002 /* IM_DSP_IRQ2_EINT2 */
 
#define ARIZONA_IM_DSP_IRQ2_EINT2_MASK   0x0002 /* IM_DSP_IRQ2_EINT2 */
 
#define ARIZONA_IM_DSP_IRQ2_EINT2_SHIFT   1 /* IM_DSP_IRQ2_EINT2 */
 
#define ARIZONA_IM_DSP_IRQ2_EINT2_WIDTH   1 /* IM_DSP_IRQ2_EINT2 */
 
#define ARIZONA_IM_DSP_IRQ1_EINT2   0x0001 /* IM_DSP_IRQ1_EINT2 */
 
#define ARIZONA_IM_DSP_IRQ1_EINT2_MASK   0x0001 /* IM_DSP_IRQ1_EINT2 */
 
#define ARIZONA_IM_DSP_IRQ1_EINT2_SHIFT   0 /* IM_DSP_IRQ1_EINT2 */
 
#define ARIZONA_IM_DSP_IRQ1_EINT2_WIDTH   1 /* IM_DSP_IRQ1_EINT2 */
 
#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2   0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT2 */
 
#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2_MASK   0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT2 */
 
#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2_SHIFT   15 /* IM_SPK_SHUTDOWN_WARN_EINT2 */
 
#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2_WIDTH   1 /* IM_SPK_SHUTDOWN_WARN_EINT2 */
 
#define ARIZONA_IM_SPK_SHUTDOWN_EINT2   0x4000 /* IM_SPK_SHUTDOWN_EINT2 */
 
#define ARIZONA_IM_SPK_SHUTDOWN_EINT2_MASK   0x4000 /* IM_SPK_SHUTDOWN_EINT2 */
 
#define ARIZONA_IM_SPK_SHUTDOWN_EINT2_SHIFT   14 /* IM_SPK_SHUTDOWN_EINT2 */
 
#define ARIZONA_IM_SPK_SHUTDOWN_EINT2_WIDTH   1 /* IM_SPK_SHUTDOWN_EINT2 */
 
#define ARIZONA_IM_HPDET_EINT2   0x2000 /* IM_HPDET_EINT2 */
 
#define ARIZONA_IM_HPDET_EINT2_MASK   0x2000 /* IM_HPDET_EINT2 */
 
#define ARIZONA_IM_HPDET_EINT2_SHIFT   13 /* IM_HPDET_EINT2 */
 
#define ARIZONA_IM_HPDET_EINT2_WIDTH   1 /* IM_HPDET_EINT2 */
 
#define ARIZONA_IM_MICDET_EINT2   0x1000 /* IM_MICDET_EINT2 */
 
#define ARIZONA_IM_MICDET_EINT2_MASK   0x1000 /* IM_MICDET_EINT2 */
 
#define ARIZONA_IM_MICDET_EINT2_SHIFT   12 /* IM_MICDET_EINT2 */
 
#define ARIZONA_IM_MICDET_EINT2_WIDTH   1 /* IM_MICDET_EINT2 */
 
#define ARIZONA_IM_WSEQ_DONE_EINT2   0x0800 /* IM_WSEQ_DONE_EINT2 */
 
#define ARIZONA_IM_WSEQ_DONE_EINT2_MASK   0x0800 /* IM_WSEQ_DONE_EINT2 */
 
#define ARIZONA_IM_WSEQ_DONE_EINT2_SHIFT   11 /* IM_WSEQ_DONE_EINT2 */
 
#define ARIZONA_IM_WSEQ_DONE_EINT2_WIDTH   1 /* IM_WSEQ_DONE_EINT2 */
 
#define ARIZONA_IM_DRC2_SIG_DET_EINT2   0x0400 /* IM_DRC2_SIG_DET_EINT2 */
 
#define ARIZONA_IM_DRC2_SIG_DET_EINT2_MASK   0x0400 /* IM_DRC2_SIG_DET_EINT2 */
 
#define ARIZONA_IM_DRC2_SIG_DET_EINT2_SHIFT   10 /* IM_DRC2_SIG_DET_EINT2 */
 
#define ARIZONA_IM_DRC2_SIG_DET_EINT2_WIDTH   1 /* IM_DRC2_SIG_DET_EINT2 */
 
#define ARIZONA_IM_DRC1_SIG_DET_EINT2   0x0200 /* IM_DRC1_SIG_DET_EINT2 */
 
#define ARIZONA_IM_DRC1_SIG_DET_EINT2_MASK   0x0200 /* IM_DRC1_SIG_DET_EINT2 */
 
#define ARIZONA_IM_DRC1_SIG_DET_EINT2_SHIFT   9 /* IM_DRC1_SIG_DET_EINT2 */
 
#define ARIZONA_IM_DRC1_SIG_DET_EINT2_WIDTH   1 /* IM_DRC1_SIG_DET_EINT2 */
 
#define ARIZONA_IM_ASRC2_LOCK_EINT2   0x0100 /* IM_ASRC2_LOCK_EINT2 */
 
#define ARIZONA_IM_ASRC2_LOCK_EINT2_MASK   0x0100 /* IM_ASRC2_LOCK_EINT2 */
 
#define ARIZONA_IM_ASRC2_LOCK_EINT2_SHIFT   8 /* IM_ASRC2_LOCK_EINT2 */
 
#define ARIZONA_IM_ASRC2_LOCK_EINT2_WIDTH   1 /* IM_ASRC2_LOCK_EINT2 */
 
#define ARIZONA_IM_ASRC1_LOCK_EINT2   0x0080 /* IM_ASRC1_LOCK_EINT2 */
 
#define ARIZONA_IM_ASRC1_LOCK_EINT2_MASK   0x0080 /* IM_ASRC1_LOCK_EINT2 */
 
#define ARIZONA_IM_ASRC1_LOCK_EINT2_SHIFT   7 /* IM_ASRC1_LOCK_EINT2 */
 
#define ARIZONA_IM_ASRC1_LOCK_EINT2_WIDTH   1 /* IM_ASRC1_LOCK_EINT2 */
 
#define ARIZONA_IM_UNDERCLOCKED_EINT2   0x0040 /* IM_UNDERCLOCKED_EINT2 */
 
#define ARIZONA_IM_UNDERCLOCKED_EINT2_MASK   0x0040 /* IM_UNDERCLOCKED_EINT2 */
 
#define ARIZONA_IM_UNDERCLOCKED_EINT2_SHIFT   6 /* IM_UNDERCLOCKED_EINT2 */
 
#define ARIZONA_IM_UNDERCLOCKED_EINT2_WIDTH   1 /* IM_UNDERCLOCKED_EINT2 */
 
#define ARIZONA_IM_OVERCLOCKED_EINT2   0x0020 /* IM_OVERCLOCKED_EINT2 */
 
#define ARIZONA_IM_OVERCLOCKED_EINT2_MASK   0x0020 /* IM_OVERCLOCKED_EINT2 */
 
#define ARIZONA_IM_OVERCLOCKED_EINT2_SHIFT   5 /* IM_OVERCLOCKED_EINT2 */
 
#define ARIZONA_IM_OVERCLOCKED_EINT2_WIDTH   1 /* IM_OVERCLOCKED_EINT2 */
 
#define ARIZONA_IM_FLL2_LOCK_EINT2   0x0008 /* IM_FLL2_LOCK_EINT2 */
 
#define ARIZONA_IM_FLL2_LOCK_EINT2_MASK   0x0008 /* IM_FLL2_LOCK_EINT2 */
 
#define ARIZONA_IM_FLL2_LOCK_EINT2_SHIFT   3 /* IM_FLL2_LOCK_EINT2 */
 
#define ARIZONA_IM_FLL2_LOCK_EINT2_WIDTH   1 /* IM_FLL2_LOCK_EINT2 */
 
#define ARIZONA_IM_FLL1_LOCK_EINT2   0x0004 /* IM_FLL1_LOCK_EINT2 */
 
#define ARIZONA_IM_FLL1_LOCK_EINT2_MASK   0x0004 /* IM_FLL1_LOCK_EINT2 */
 
#define ARIZONA_IM_FLL1_LOCK_EINT2_SHIFT   2 /* IM_FLL1_LOCK_EINT2 */
 
#define ARIZONA_IM_FLL1_LOCK_EINT2_WIDTH   1 /* IM_FLL1_LOCK_EINT2 */
 
#define ARIZONA_IM_CLKGEN_ERR_EINT2   0x0002 /* IM_CLKGEN_ERR_EINT2 */
 
#define ARIZONA_IM_CLKGEN_ERR_EINT2_MASK   0x0002 /* IM_CLKGEN_ERR_EINT2 */
 
#define ARIZONA_IM_CLKGEN_ERR_EINT2_SHIFT   1 /* IM_CLKGEN_ERR_EINT2 */
 
#define ARIZONA_IM_CLKGEN_ERR_EINT2_WIDTH   1 /* IM_CLKGEN_ERR_EINT2 */
 
#define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2   0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT2 */
 
#define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2_MASK   0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT2 */
 
#define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2_SHIFT   0 /* IM_CLKGEN_ERR_ASYNC_EINT2 */
 
#define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2_WIDTH   1 /* IM_CLKGEN_ERR_ASYNC_EINT2 */
 
#define ARIZONA_IM_ASRC_CFG_ERR_EINT2   0x8000 /* IM_ASRC_CFG_ERR_EINT2 */
 
#define ARIZONA_IM_ASRC_CFG_ERR_EINT2_MASK   0x8000 /* IM_ASRC_CFG_ERR_EINT2 */
 
#define ARIZONA_IM_ASRC_CFG_ERR_EINT2_SHIFT   15 /* IM_ASRC_CFG_ERR_EINT2 */
 
#define ARIZONA_IM_ASRC_CFG_ERR_EINT2_WIDTH   1 /* IM_ASRC_CFG_ERR_EINT2 */
 
#define ARIZONA_IM_AIF3_ERR_EINT2   0x4000 /* IM_AIF3_ERR_EINT2 */
 
#define ARIZONA_IM_AIF3_ERR_EINT2_MASK   0x4000 /* IM_AIF3_ERR_EINT2 */
 
#define ARIZONA_IM_AIF3_ERR_EINT2_SHIFT   14 /* IM_AIF3_ERR_EINT2 */
 
#define ARIZONA_IM_AIF3_ERR_EINT2_WIDTH   1 /* IM_AIF3_ERR_EINT2 */
 
#define ARIZONA_IM_AIF2_ERR_EINT2   0x2000 /* IM_AIF2_ERR_EINT2 */
 
#define ARIZONA_IM_AIF2_ERR_EINT2_MASK   0x2000 /* IM_AIF2_ERR_EINT2 */
 
#define ARIZONA_IM_AIF2_ERR_EINT2_SHIFT   13 /* IM_AIF2_ERR_EINT2 */
 
#define ARIZONA_IM_AIF2_ERR_EINT2_WIDTH   1 /* IM_AIF2_ERR_EINT2 */
 
#define ARIZONA_IM_AIF1_ERR_EINT2   0x1000 /* IM_AIF1_ERR_EINT2 */
 
#define ARIZONA_IM_AIF1_ERR_EINT2_MASK   0x1000 /* IM_AIF1_ERR_EINT2 */
 
#define ARIZONA_IM_AIF1_ERR_EINT2_SHIFT   12 /* IM_AIF1_ERR_EINT2 */
 
#define ARIZONA_IM_AIF1_ERR_EINT2_WIDTH   1 /* IM_AIF1_ERR_EINT2 */
 
#define ARIZONA_IM_CTRLIF_ERR_EINT2   0x0800 /* IM_CTRLIF_ERR_EINT2 */
 
#define ARIZONA_IM_CTRLIF_ERR_EINT2_MASK   0x0800 /* IM_CTRLIF_ERR_EINT2 */
 
#define ARIZONA_IM_CTRLIF_ERR_EINT2_SHIFT   11 /* IM_CTRLIF_ERR_EINT2 */
 
#define ARIZONA_IM_CTRLIF_ERR_EINT2_WIDTH   1 /* IM_CTRLIF_ERR_EINT2 */
 
#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2   0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
 
#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_MASK   0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
 
#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_SHIFT   10 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
 
#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_WIDTH   1 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
 
#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2   0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
 
#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_MASK   0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
 
#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_SHIFT   9 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
 
#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_WIDTH   1 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
 
#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2   0x0100 /* IM_SYSCLK_ENA_LOW_EINT2 */
 
#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_MASK   0x0100 /* IM_SYSCLK_ENA_LOW_EINT2 */
 
#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_SHIFT   8 /* IM_SYSCLK_ENA_LOW_EINT2 */
 
#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_WIDTH   1 /* IM_SYSCLK_ENA_LOW_EINT2 */
 
#define ARIZONA_IM_ISRC1_CFG_ERR_EINT2   0x0080 /* IM_ISRC1_CFG_ERR_EINT2 */
 
#define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_MASK   0x0080 /* IM_ISRC1_CFG_ERR_EINT2 */
 
#define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_SHIFT   7 /* IM_ISRC1_CFG_ERR_EINT2 */
 
#define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_WIDTH   1 /* IM_ISRC1_CFG_ERR_EINT2 */
 
#define ARIZONA_IM_ISRC2_CFG_ERR_EINT2   0x0040 /* IM_ISRC2_CFG_ERR_EINT2 */
 
#define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_MASK   0x0040 /* IM_ISRC2_CFG_ERR_EINT2 */
 
#define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_SHIFT   6 /* IM_ISRC2_CFG_ERR_EINT2 */
 
#define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_WIDTH   1 /* IM_ISRC2_CFG_ERR_EINT2 */
 
#define ARIZONA_IM_BOOT_DONE_EINT2   0x0100 /* IM_BOOT_DONE_EINT2 */
 
#define ARIZONA_IM_BOOT_DONE_EINT2_MASK   0x0100 /* IM_BOOT_DONE_EINT2 */
 
#define ARIZONA_IM_BOOT_DONE_EINT2_SHIFT   8 /* IM_BOOT_DONE_EINT2 */
 
#define ARIZONA_IM_BOOT_DONE_EINT2_WIDTH   1 /* IM_BOOT_DONE_EINT2 */
 
#define ARIZONA_IM_DCS_DAC_DONE_EINT2   0x0080 /* IM_DCS_DAC_DONE_EINT2 */
 
#define ARIZONA_IM_DCS_DAC_DONE_EINT2_MASK   0x0080 /* IM_DCS_DAC_DONE_EINT2 */
 
#define ARIZONA_IM_DCS_DAC_DONE_EINT2_SHIFT   7 /* IM_DCS_DAC_DONE_EINT2 */
 
#define ARIZONA_IM_DCS_DAC_DONE_EINT2_WIDTH   1 /* IM_DCS_DAC_DONE_EINT2 */
 
#define ARIZONA_IM_DCS_HP_DONE_EINT2   0x0040 /* IM_DCS_HP_DONE_EINT2 */
 
#define ARIZONA_IM_DCS_HP_DONE_EINT2_MASK   0x0040 /* IM_DCS_HP_DONE_EINT2 */
 
#define ARIZONA_IM_DCS_HP_DONE_EINT2_SHIFT   6 /* IM_DCS_HP_DONE_EINT2 */
 
#define ARIZONA_IM_DCS_HP_DONE_EINT2_WIDTH   1 /* IM_DCS_HP_DONE_EINT2 */
 
#define ARIZONA_IM_FLL2_CLOCK_OK_EINT2   0x0002 /* IM_FLL2_CLOCK_OK_EINT2 */
 
#define ARIZONA_IM_FLL2_CLOCK_OK_EINT2_MASK   0x0002 /* IM_FLL2_CLOCK_OK_EINT2 */
 
#define ARIZONA_IM_FLL2_CLOCK_OK_EINT2_SHIFT   1 /* IM_FLL2_CLOCK_OK_EINT2 */
 
#define ARIZONA_IM_FLL2_CLOCK_OK_EINT2_WIDTH   1 /* IM_FLL2_CLOCK_OK_EINT2 */
 
#define ARIZONA_IM_FLL1_CLOCK_OK_EINT2   0x0001 /* IM_FLL1_CLOCK_OK_EINT2 */
 
#define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_MASK   0x0001 /* IM_FLL1_CLOCK_OK_EINT2 */
 
#define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_SHIFT   0 /* IM_FLL1_CLOCK_OK_EINT2 */
 
#define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_WIDTH   1 /* IM_FLL1_CLOCK_OK_EINT2 */
 
#define ARIZONA_IM_IRQ2   0x0001 /* IM_IRQ2 */
 
#define ARIZONA_IM_IRQ2_MASK   0x0001 /* IM_IRQ2 */
 
#define ARIZONA_IM_IRQ2_SHIFT   0 /* IM_IRQ2 */
 
#define ARIZONA_IM_IRQ2_WIDTH   1 /* IM_IRQ2 */
 
#define ARIZONA_DSP1_RAM_RDY_STS   0x0100 /* DSP1_RAM_RDY_STS */
 
#define ARIZONA_DSP1_RAM_RDY_STS_MASK   0x0100 /* DSP1_RAM_RDY_STS */
 
#define ARIZONA_DSP1_RAM_RDY_STS_SHIFT   8 /* DSP1_RAM_RDY_STS */
 
#define ARIZONA_DSP1_RAM_RDY_STS_WIDTH   1 /* DSP1_RAM_RDY_STS */
 
#define ARIZONA_DSP_IRQ2_STS   0x0002 /* DSP_IRQ2_STS */
 
#define ARIZONA_DSP_IRQ2_STS_MASK   0x0002 /* DSP_IRQ2_STS */
 
#define ARIZONA_DSP_IRQ2_STS_SHIFT   1 /* DSP_IRQ2_STS */
 
#define ARIZONA_DSP_IRQ2_STS_WIDTH   1 /* DSP_IRQ2_STS */
 
#define ARIZONA_DSP_IRQ1_STS   0x0001 /* DSP_IRQ1_STS */
 
#define ARIZONA_DSP_IRQ1_STS_MASK   0x0001 /* DSP_IRQ1_STS */
 
#define ARIZONA_DSP_IRQ1_STS_SHIFT   0 /* DSP_IRQ1_STS */
 
#define ARIZONA_DSP_IRQ1_STS_WIDTH   1 /* DSP_IRQ1_STS */
 
#define ARIZONA_SPK_SHUTDOWN_WARN_STS   0x8000 /* SPK_SHUTDOWN_WARN_STS */
 
#define ARIZONA_SPK_SHUTDOWN_WARN_STS_MASK   0x8000 /* SPK_SHUTDOWN_WARN_STS */
 
#define ARIZONA_SPK_SHUTDOWN_WARN_STS_SHIFT   15 /* SPK_SHUTDOWN_WARN_STS */
 
#define ARIZONA_SPK_SHUTDOWN_WARN_STS_WIDTH   1 /* SPK_SHUTDOWN_WARN_STS */
 
#define ARIZONA_SPK_SHUTDOWN_STS   0x4000 /* SPK_SHUTDOWN_STS */
 
#define ARIZONA_SPK_SHUTDOWN_STS_MASK   0x4000 /* SPK_SHUTDOWN_STS */
 
#define ARIZONA_SPK_SHUTDOWN_STS_SHIFT   14 /* SPK_SHUTDOWN_STS */
 
#define ARIZONA_SPK_SHUTDOWN_STS_WIDTH   1 /* SPK_SHUTDOWN_STS */
 
#define ARIZONA_HPDET_STS   0x2000 /* HPDET_STS */
 
#define ARIZONA_HPDET_STS_MASK   0x2000 /* HPDET_STS */
 
#define ARIZONA_HPDET_STS_SHIFT   13 /* HPDET_STS */
 
#define ARIZONA_HPDET_STS_WIDTH   1 /* HPDET_STS */
 
#define ARIZONA_MICDET_STS   0x1000 /* MICDET_STS */
 
#define ARIZONA_MICDET_STS_MASK   0x1000 /* MICDET_STS */
 
#define ARIZONA_MICDET_STS_SHIFT   12 /* MICDET_STS */
 
#define ARIZONA_MICDET_STS_WIDTH   1 /* MICDET_STS */
 
#define ARIZONA_WSEQ_DONE_STS   0x0800 /* WSEQ_DONE_STS */
 
#define ARIZONA_WSEQ_DONE_STS_MASK   0x0800 /* WSEQ_DONE_STS */
 
#define ARIZONA_WSEQ_DONE_STS_SHIFT   11 /* WSEQ_DONE_STS */
 
#define ARIZONA_WSEQ_DONE_STS_WIDTH   1 /* WSEQ_DONE_STS */
 
#define ARIZONA_DRC2_SIG_DET_STS   0x0400 /* DRC2_SIG_DET_STS */
 
#define ARIZONA_DRC2_SIG_DET_STS_MASK   0x0400 /* DRC2_SIG_DET_STS */
 
#define ARIZONA_DRC2_SIG_DET_STS_SHIFT   10 /* DRC2_SIG_DET_STS */
 
#define ARIZONA_DRC2_SIG_DET_STS_WIDTH   1 /* DRC2_SIG_DET_STS */
 
#define ARIZONA_DRC1_SIG_DET_STS   0x0200 /* DRC1_SIG_DET_STS */
 
#define ARIZONA_DRC1_SIG_DET_STS_MASK   0x0200 /* DRC1_SIG_DET_STS */
 
#define ARIZONA_DRC1_SIG_DET_STS_SHIFT   9 /* DRC1_SIG_DET_STS */
 
#define ARIZONA_DRC1_SIG_DET_STS_WIDTH   1 /* DRC1_SIG_DET_STS */
 
#define ARIZONA_ASRC2_LOCK_STS   0x0100 /* ASRC2_LOCK_STS */
 
#define ARIZONA_ASRC2_LOCK_STS_MASK   0x0100 /* ASRC2_LOCK_STS */
 
#define ARIZONA_ASRC2_LOCK_STS_SHIFT   8 /* ASRC2_LOCK_STS */
 
#define ARIZONA_ASRC2_LOCK_STS_WIDTH   1 /* ASRC2_LOCK_STS */
 
#define ARIZONA_ASRC1_LOCK_STS   0x0080 /* ASRC1_LOCK_STS */
 
#define ARIZONA_ASRC1_LOCK_STS_MASK   0x0080 /* ASRC1_LOCK_STS */
 
#define ARIZONA_ASRC1_LOCK_STS_SHIFT   7 /* ASRC1_LOCK_STS */
 
#define ARIZONA_ASRC1_LOCK_STS_WIDTH   1 /* ASRC1_LOCK_STS */
 
#define ARIZONA_UNDERCLOCKED_STS   0x0040 /* UNDERCLOCKED_STS */
 
#define ARIZONA_UNDERCLOCKED_STS_MASK   0x0040 /* UNDERCLOCKED_STS */
 
#define ARIZONA_UNDERCLOCKED_STS_SHIFT   6 /* UNDERCLOCKED_STS */
 
#define ARIZONA_UNDERCLOCKED_STS_WIDTH   1 /* UNDERCLOCKED_STS */
 
#define ARIZONA_OVERCLOCKED_STS   0x0020 /* OVERCLOCKED_STS */
 
#define ARIZONA_OVERCLOCKED_STS_MASK   0x0020 /* OVERCLOCKED_STS */
 
#define ARIZONA_OVERCLOCKED_STS_SHIFT   5 /* OVERCLOCKED_STS */
 
#define ARIZONA_OVERCLOCKED_STS_WIDTH   1 /* OVERCLOCKED_STS */
 
#define ARIZONA_FLL2_LOCK_STS   0x0008 /* FLL2_LOCK_STS */
 
#define ARIZONA_FLL2_LOCK_STS_MASK   0x0008 /* FLL2_LOCK_STS */
 
#define ARIZONA_FLL2_LOCK_STS_SHIFT   3 /* FLL2_LOCK_STS */
 
#define ARIZONA_FLL2_LOCK_STS_WIDTH   1 /* FLL2_LOCK_STS */
 
#define ARIZONA_FLL1_LOCK_STS   0x0004 /* FLL1_LOCK_STS */
 
#define ARIZONA_FLL1_LOCK_STS_MASK   0x0004 /* FLL1_LOCK_STS */
 
#define ARIZONA_FLL1_LOCK_STS_SHIFT   2 /* FLL1_LOCK_STS */
 
#define ARIZONA_FLL1_LOCK_STS_WIDTH   1 /* FLL1_LOCK_STS */
 
#define ARIZONA_CLKGEN_ERR_STS   0x0002 /* CLKGEN_ERR_STS */
 
#define ARIZONA_CLKGEN_ERR_STS_MASK   0x0002 /* CLKGEN_ERR_STS */
 
#define ARIZONA_CLKGEN_ERR_STS_SHIFT   1 /* CLKGEN_ERR_STS */
 
#define ARIZONA_CLKGEN_ERR_STS_WIDTH   1 /* CLKGEN_ERR_STS */
 
#define ARIZONA_CLKGEN_ERR_ASYNC_STS   0x0001 /* CLKGEN_ERR_ASYNC_STS */
 
#define ARIZONA_CLKGEN_ERR_ASYNC_STS_MASK   0x0001 /* CLKGEN_ERR_ASYNC_STS */
 
#define ARIZONA_CLKGEN_ERR_ASYNC_STS_SHIFT   0 /* CLKGEN_ERR_ASYNC_STS */
 
#define ARIZONA_CLKGEN_ERR_ASYNC_STS_WIDTH   1 /* CLKGEN_ERR_ASYNC_STS */
 
#define ARIZONA_ASRC_CFG_ERR_STS   0x8000 /* ASRC_CFG_ERR_STS */
 
#define ARIZONA_ASRC_CFG_ERR_STS_MASK   0x8000 /* ASRC_CFG_ERR_STS */
 
#define ARIZONA_ASRC_CFG_ERR_STS_SHIFT   15 /* ASRC_CFG_ERR_STS */
 
#define ARIZONA_ASRC_CFG_ERR_STS_WIDTH   1 /* ASRC_CFG_ERR_STS */
 
#define ARIZONA_AIF3_ERR_STS   0x4000 /* AIF3_ERR_STS */
 
#define ARIZONA_AIF3_ERR_STS_MASK   0x4000 /* AIF3_ERR_STS */
 
#define ARIZONA_AIF3_ERR_STS_SHIFT   14 /* AIF3_ERR_STS */
 
#define ARIZONA_AIF3_ERR_STS_WIDTH   1 /* AIF3_ERR_STS */
 
#define ARIZONA_AIF2_ERR_STS   0x2000 /* AIF2_ERR_STS */
 
#define ARIZONA_AIF2_ERR_STS_MASK   0x2000 /* AIF2_ERR_STS */
 
#define ARIZONA_AIF2_ERR_STS_SHIFT   13 /* AIF2_ERR_STS */
 
#define ARIZONA_AIF2_ERR_STS_WIDTH   1 /* AIF2_ERR_STS */
 
#define ARIZONA_AIF1_ERR_STS   0x1000 /* AIF1_ERR_STS */
 
#define ARIZONA_AIF1_ERR_STS_MASK   0x1000 /* AIF1_ERR_STS */
 
#define ARIZONA_AIF1_ERR_STS_SHIFT   12 /* AIF1_ERR_STS */
 
#define ARIZONA_AIF1_ERR_STS_WIDTH   1 /* AIF1_ERR_STS */
 
#define ARIZONA_CTRLIF_ERR_STS   0x0800 /* CTRLIF_ERR_STS */
 
#define ARIZONA_CTRLIF_ERR_STS_MASK   0x0800 /* CTRLIF_ERR_STS */
 
#define ARIZONA_CTRLIF_ERR_STS_SHIFT   11 /* CTRLIF_ERR_STS */
 
#define ARIZONA_CTRLIF_ERR_STS_WIDTH   1 /* CTRLIF_ERR_STS */
 
#define ARIZONA_MIXER_DROPPED_SAMPLE_STS   0x0400 /* MIXER_DROPPED_SAMPLE_STS */
 
#define ARIZONA_MIXER_DROPPED_SAMPLE_STS_MASK   0x0400 /* MIXER_DROPPED_SAMPLE_STS */
 
#define ARIZONA_MIXER_DROPPED_SAMPLE_STS_SHIFT   10 /* MIXER_DROPPED_SAMPLE_STS */
 
#define ARIZONA_MIXER_DROPPED_SAMPLE_STS_WIDTH   1 /* MIXER_DROPPED_SAMPLE_STS */
 
#define ARIZONA_ASYNC_CLK_ENA_LOW_STS   0x0200 /* ASYNC_CLK_ENA_LOW_STS */
 
#define ARIZONA_ASYNC_CLK_ENA_LOW_STS_MASK   0x0200 /* ASYNC_CLK_ENA_LOW_STS */
 
#define ARIZONA_ASYNC_CLK_ENA_LOW_STS_SHIFT   9 /* ASYNC_CLK_ENA_LOW_STS */
 
#define ARIZONA_ASYNC_CLK_ENA_LOW_STS_WIDTH   1 /* ASYNC_CLK_ENA_LOW_STS */
 
#define ARIZONA_SYSCLK_ENA_LOW_STS   0x0100 /* SYSCLK_ENA_LOW_STS */
 
#define ARIZONA_SYSCLK_ENA_LOW_STS_MASK   0x0100 /* SYSCLK_ENA_LOW_STS */
 
#define ARIZONA_SYSCLK_ENA_LOW_STS_SHIFT   8 /* SYSCLK_ENA_LOW_STS */
 
#define ARIZONA_SYSCLK_ENA_LOW_STS_WIDTH   1 /* SYSCLK_ENA_LOW_STS */
 
#define ARIZONA_ISRC1_CFG_ERR_STS   0x0080 /* ISRC1_CFG_ERR_STS */
 
#define ARIZONA_ISRC1_CFG_ERR_STS_MASK   0x0080 /* ISRC1_CFG_ERR_STS */
 
#define ARIZONA_ISRC1_CFG_ERR_STS_SHIFT   7 /* ISRC1_CFG_ERR_STS */
 
#define ARIZONA_ISRC1_CFG_ERR_STS_WIDTH   1 /* ISRC1_CFG_ERR_STS */
 
#define ARIZONA_ISRC2_CFG_ERR_STS   0x0040 /* ISRC2_CFG_ERR_STS */
 
#define ARIZONA_ISRC2_CFG_ERR_STS_MASK   0x0040 /* ISRC2_CFG_ERR_STS */
 
#define ARIZONA_ISRC2_CFG_ERR_STS_SHIFT   6 /* ISRC2_CFG_ERR_STS */
 
#define ARIZONA_ISRC2_CFG_ERR_STS_WIDTH   1 /* ISRC2_CFG_ERR_STS */
 
#define ARIZONA_BOOT_DONE_STS   0x0100 /* BOOT_DONE_STS */
 
#define ARIZONA_BOOT_DONE_STS_MASK   0x0100 /* BOOT_DONE_STS */
 
#define ARIZONA_BOOT_DONE_STS_SHIFT   8 /* BOOT_DONE_STS */
 
#define ARIZONA_BOOT_DONE_STS_WIDTH   1 /* BOOT_DONE_STS */
 
#define ARIZONA_DCS_DAC_DONE_STS   0x0080 /* DCS_DAC_DONE_STS */
 
#define ARIZONA_DCS_DAC_DONE_STS_MASK   0x0080 /* DCS_DAC_DONE_STS */
 
#define ARIZONA_DCS_DAC_DONE_STS_SHIFT   7 /* DCS_DAC_DONE_STS */
 
#define ARIZONA_DCS_DAC_DONE_STS_WIDTH   1 /* DCS_DAC_DONE_STS */
 
#define ARIZONA_DCS_HP_DONE_STS   0x0040 /* DCS_HP_DONE_STS */
 
#define ARIZONA_DCS_HP_DONE_STS_MASK   0x0040 /* DCS_HP_DONE_STS */
 
#define ARIZONA_DCS_HP_DONE_STS_SHIFT   6 /* DCS_HP_DONE_STS */
 
#define ARIZONA_DCS_HP_DONE_STS_WIDTH   1 /* DCS_HP_DONE_STS */
 
#define ARIZONA_FLL2_CLOCK_OK_STS   0x0002 /* FLL2_CLOCK_OK_STS */
 
#define ARIZONA_FLL2_CLOCK_OK_STS_MASK   0x0002 /* FLL2_CLOCK_OK_STS */
 
#define ARIZONA_FLL2_CLOCK_OK_STS_SHIFT   1 /* FLL2_CLOCK_OK_STS */
 
#define ARIZONA_FLL2_CLOCK_OK_STS_WIDTH   1 /* FLL2_CLOCK_OK_STS */
 
#define ARIZONA_FLL1_CLOCK_OK_STS   0x0001 /* FLL1_CLOCK_OK_STS */
 
#define ARIZONA_FLL1_CLOCK_OK_STS_MASK   0x0001 /* FLL1_CLOCK_OK_STS */
 
#define ARIZONA_FLL1_CLOCK_OK_STS_SHIFT   0 /* FLL1_CLOCK_OK_STS */
 
#define ARIZONA_FLL1_CLOCK_OK_STS_WIDTH   1 /* FLL1_CLOCK_OK_STS */
 
#define ARIZONA_PWM_OVERCLOCKED_STS   0x2000 /* PWM_OVERCLOCKED_STS */
 
#define ARIZONA_PWM_OVERCLOCKED_STS_MASK   0x2000 /* PWM_OVERCLOCKED_STS */
 
#define ARIZONA_PWM_OVERCLOCKED_STS_SHIFT   13 /* PWM_OVERCLOCKED_STS */
 
#define ARIZONA_PWM_OVERCLOCKED_STS_WIDTH   1 /* PWM_OVERCLOCKED_STS */
 
#define ARIZONA_FX_CORE_OVERCLOCKED_STS   0x1000 /* FX_CORE_OVERCLOCKED_STS */
 
#define ARIZONA_FX_CORE_OVERCLOCKED_STS_MASK   0x1000 /* FX_CORE_OVERCLOCKED_STS */
 
#define ARIZONA_FX_CORE_OVERCLOCKED_STS_SHIFT   12 /* FX_CORE_OVERCLOCKED_STS */
 
#define ARIZONA_FX_CORE_OVERCLOCKED_STS_WIDTH   1 /* FX_CORE_OVERCLOCKED_STS */
 
#define ARIZONA_DAC_SYS_OVERCLOCKED_STS   0x0400 /* DAC_SYS_OVERCLOCKED_STS */
 
#define ARIZONA_DAC_SYS_OVERCLOCKED_STS_MASK   0x0400 /* DAC_SYS_OVERCLOCKED_STS */
 
#define ARIZONA_DAC_SYS_OVERCLOCKED_STS_SHIFT   10 /* DAC_SYS_OVERCLOCKED_STS */
 
#define ARIZONA_DAC_SYS_OVERCLOCKED_STS_WIDTH   1 /* DAC_SYS_OVERCLOCKED_STS */
 
#define ARIZONA_DAC_WARP_OVERCLOCKED_STS   0x0200 /* DAC_WARP_OVERCLOCKED_STS */
 
#define ARIZONA_DAC_WARP_OVERCLOCKED_STS_MASK   0x0200 /* DAC_WARP_OVERCLOCKED_STS */
 
#define ARIZONA_DAC_WARP_OVERCLOCKED_STS_SHIFT   9 /* DAC_WARP_OVERCLOCKED_STS */
 
#define ARIZONA_DAC_WARP_OVERCLOCKED_STS_WIDTH   1 /* DAC_WARP_OVERCLOCKED_STS */
 
#define ARIZONA_ADC_OVERCLOCKED_STS   0x0100 /* ADC_OVERCLOCKED_STS */
 
#define ARIZONA_ADC_OVERCLOCKED_STS_MASK   0x0100 /* ADC_OVERCLOCKED_STS */
 
#define ARIZONA_ADC_OVERCLOCKED_STS_SHIFT   8 /* ADC_OVERCLOCKED_STS */
 
#define ARIZONA_ADC_OVERCLOCKED_STS_WIDTH   1 /* ADC_OVERCLOCKED_STS */
 
#define ARIZONA_MIXER_OVERCLOCKED_STS   0x0080 /* MIXER_OVERCLOCKED_STS */
 
#define ARIZONA_MIXER_OVERCLOCKED_STS_MASK   0x0080 /* MIXER_OVERCLOCKED_STS */
 
#define ARIZONA_MIXER_OVERCLOCKED_STS_SHIFT   7 /* MIXER_OVERCLOCKED_STS */
 
#define ARIZONA_MIXER_OVERCLOCKED_STS_WIDTH   1 /* MIXER_OVERCLOCKED_STS */
 
#define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS   0x0040 /* AIF3_ASYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS_MASK   0x0040 /* AIF3_ASYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS_SHIFT   6 /* AIF3_ASYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS_WIDTH   1 /* AIF3_ASYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS   0x0020 /* AIF2_ASYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS_MASK   0x0020 /* AIF2_ASYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS_SHIFT   5 /* AIF2_ASYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS_WIDTH   1 /* AIF2_ASYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS   0x0010 /* AIF1_ASYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS_MASK   0x0010 /* AIF1_ASYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS_SHIFT   4 /* AIF1_ASYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS_WIDTH   1 /* AIF1_ASYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS   0x0008 /* AIF3_SYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS_MASK   0x0008 /* AIF3_SYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS_SHIFT   3 /* AIF3_SYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS_WIDTH   1 /* AIF3_SYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS   0x0004 /* AIF2_SYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS_MASK   0x0004 /* AIF2_SYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS_SHIFT   2 /* AIF2_SYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS_WIDTH   1 /* AIF2_SYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS   0x0002 /* AIF1_SYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS_MASK   0x0002 /* AIF1_SYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS_SHIFT   1 /* AIF1_SYNC_OVERCLOCKED_STS */
 
#define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS_WIDTH   1 /* AIF1_SYNC_OVERCLOCKED_STS */
 
#define ARIZONA_PAD_CTRL_OVERCLOCKED_STS   0x0001 /* PAD_CTRL_OVERCLOCKED_STS */
 
#define ARIZONA_PAD_CTRL_OVERCLOCKED_STS_MASK   0x0001 /* PAD_CTRL_OVERCLOCKED_STS */
 
#define ARIZONA_PAD_CTRL_OVERCLOCKED_STS_SHIFT   0 /* PAD_CTRL_OVERCLOCKED_STS */
 
#define ARIZONA_PAD_CTRL_OVERCLOCKED_STS_WIDTH   1 /* PAD_CTRL_OVERCLOCKED_STS */
 
#define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS   0x8000 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */
 
#define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_MASK   0x8000 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */
 
#define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_SHIFT   15 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */
 
#define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_WIDTH   1 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */
 
#define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS   0x4000 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */
 
#define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_MASK   0x4000 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */
 
#define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_SHIFT   14 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */
 
#define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_WIDTH   1 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */
 
#define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS   0x2000 /* SLIMBUS_SYNC_OVERCLOCKED_STS */
 
#define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_MASK   0x2000 /* SLIMBUS_SYNC_OVERCLOCKED_STS */
 
#define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_SHIFT   13 /* SLIMBUS_SYNC_OVERCLOCKED_STS */
 
#define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_WIDTH   1 /* SLIMBUS_SYNC_OVERCLOCKED_STS */
 
#define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS   0x1000 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */
 
#define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_MASK   0x1000 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */
 
#define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_SHIFT   12 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */
 
#define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_WIDTH   1 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */
 
#define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS   0x0800 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */
 
#define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_MASK   0x0800 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */
 
#define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_SHIFT   11 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */
 
#define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_WIDTH   1 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */
 
#define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS   0x0400 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */
 
#define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_MASK   0x0400 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */
 
#define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_SHIFT   10 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */
 
#define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_WIDTH   1 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */
 
#define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS   0x0200 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */
 
#define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_MASK   0x0200 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */
 
#define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_SHIFT   9 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */
 
#define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_WIDTH   1 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */
 
#define ARIZONA_ADSP2_1_OVERCLOCKED_STS   0x0008 /* ADSP2_1_OVERCLOCKED_STS */
 
#define ARIZONA_ADSP2_1_OVERCLOCKED_STS_MASK   0x0008 /* ADSP2_1_OVERCLOCKED_STS */
 
#define ARIZONA_ADSP2_1_OVERCLOCKED_STS_SHIFT   3 /* ADSP2_1_OVERCLOCKED_STS */
 
#define ARIZONA_ADSP2_1_OVERCLOCKED_STS_WIDTH   1 /* ADSP2_1_OVERCLOCKED_STS */
 
#define ARIZONA_ISRC2_OVERCLOCKED_STS   0x0002 /* ISRC2_OVERCLOCKED_STS */
 
#define ARIZONA_ISRC2_OVERCLOCKED_STS_MASK   0x0002 /* ISRC2_OVERCLOCKED_STS */
 
#define ARIZONA_ISRC2_OVERCLOCKED_STS_SHIFT   1 /* ISRC2_OVERCLOCKED_STS */
 
#define ARIZONA_ISRC2_OVERCLOCKED_STS_WIDTH   1 /* ISRC2_OVERCLOCKED_STS */
 
#define ARIZONA_ISRC1_OVERCLOCKED_STS   0x0001 /* ISRC1_OVERCLOCKED_STS */
 
#define ARIZONA_ISRC1_OVERCLOCKED_STS_MASK   0x0001 /* ISRC1_OVERCLOCKED_STS */
 
#define ARIZONA_ISRC1_OVERCLOCKED_STS_SHIFT   0 /* ISRC1_OVERCLOCKED_STS */
 
#define ARIZONA_ISRC1_OVERCLOCKED_STS_WIDTH   1 /* ISRC1_OVERCLOCKED_STS */
 
#define ARIZONA_AIF3_UNDERCLOCKED_STS   0x0400 /* AIF3_UNDERCLOCKED_STS */
 
#define ARIZONA_AIF3_UNDERCLOCKED_STS_MASK   0x0400 /* AIF3_UNDERCLOCKED_STS */
 
#define ARIZONA_AIF3_UNDERCLOCKED_STS_SHIFT   10 /* AIF3_UNDERCLOCKED_STS */
 
#define ARIZONA_AIF3_UNDERCLOCKED_STS_WIDTH   1 /* AIF3_UNDERCLOCKED_STS */
 
#define ARIZONA_AIF2_UNDERCLOCKED_STS   0x0200 /* AIF2_UNDERCLOCKED_STS */
 
#define ARIZONA_AIF2_UNDERCLOCKED_STS_MASK   0x0200 /* AIF2_UNDERCLOCKED_STS */
 
#define ARIZONA_AIF2_UNDERCLOCKED_STS_SHIFT   9 /* AIF2_UNDERCLOCKED_STS */
 
#define ARIZONA_AIF2_UNDERCLOCKED_STS_WIDTH   1 /* AIF2_UNDERCLOCKED_STS */
 
#define ARIZONA_AIF1_UNDERCLOCKED_STS   0x0100 /* AIF1_UNDERCLOCKED_STS */
 
#define ARIZONA_AIF1_UNDERCLOCKED_STS_MASK   0x0100 /* AIF1_UNDERCLOCKED_STS */
 
#define ARIZONA_AIF1_UNDERCLOCKED_STS_SHIFT   8 /* AIF1_UNDERCLOCKED_STS */
 
#define ARIZONA_AIF1_UNDERCLOCKED_STS_WIDTH   1 /* AIF1_UNDERCLOCKED_STS */
 
#define ARIZONA_ISRC2_UNDERCLOCKED_STS   0x0040 /* ISRC2_UNDERCLOCKED_STS */
 
#define ARIZONA_ISRC2_UNDERCLOCKED_STS_MASK   0x0040 /* ISRC2_UNDERCLOCKED_STS */
 
#define ARIZONA_ISRC2_UNDERCLOCKED_STS_SHIFT   6 /* ISRC2_UNDERCLOCKED_STS */
 
#define ARIZONA_ISRC2_UNDERCLOCKED_STS_WIDTH   1 /* ISRC2_UNDERCLOCKED_STS */
 
#define ARIZONA_ISRC1_UNDERCLOCKED_STS   0x0020 /* ISRC1_UNDERCLOCKED_STS */
 
#define ARIZONA_ISRC1_UNDERCLOCKED_STS_MASK   0x0020 /* ISRC1_UNDERCLOCKED_STS */
 
#define ARIZONA_ISRC1_UNDERCLOCKED_STS_SHIFT   5 /* ISRC1_UNDERCLOCKED_STS */
 
#define ARIZONA_ISRC1_UNDERCLOCKED_STS_WIDTH   1 /* ISRC1_UNDERCLOCKED_STS */
 
#define ARIZONA_FX_UNDERCLOCKED_STS   0x0010 /* FX_UNDERCLOCKED_STS */
 
#define ARIZONA_FX_UNDERCLOCKED_STS_MASK   0x0010 /* FX_UNDERCLOCKED_STS */
 
#define ARIZONA_FX_UNDERCLOCKED_STS_SHIFT   4 /* FX_UNDERCLOCKED_STS */
 
#define ARIZONA_FX_UNDERCLOCKED_STS_WIDTH   1 /* FX_UNDERCLOCKED_STS */
 
#define ARIZONA_ASRC_UNDERCLOCKED_STS   0x0008 /* ASRC_UNDERCLOCKED_STS */
 
#define ARIZONA_ASRC_UNDERCLOCKED_STS_MASK   0x0008 /* ASRC_UNDERCLOCKED_STS */
 
#define ARIZONA_ASRC_UNDERCLOCKED_STS_SHIFT   3 /* ASRC_UNDERCLOCKED_STS */
 
#define ARIZONA_ASRC_UNDERCLOCKED_STS_WIDTH   1 /* ASRC_UNDERCLOCKED_STS */
 
#define ARIZONA_DAC_UNDERCLOCKED_STS   0x0004 /* DAC_UNDERCLOCKED_STS */
 
#define ARIZONA_DAC_UNDERCLOCKED_STS_MASK   0x0004 /* DAC_UNDERCLOCKED_STS */
 
#define ARIZONA_DAC_UNDERCLOCKED_STS_SHIFT   2 /* DAC_UNDERCLOCKED_STS */
 
#define ARIZONA_DAC_UNDERCLOCKED_STS_WIDTH   1 /* DAC_UNDERCLOCKED_STS */
 
#define ARIZONA_ADC_UNDERCLOCKED_STS   0x0002 /* ADC_UNDERCLOCKED_STS */
 
#define ARIZONA_ADC_UNDERCLOCKED_STS_MASK   0x0002 /* ADC_UNDERCLOCKED_STS */
 
#define ARIZONA_ADC_UNDERCLOCKED_STS_SHIFT   1 /* ADC_UNDERCLOCKED_STS */
 
#define ARIZONA_ADC_UNDERCLOCKED_STS_WIDTH   1 /* ADC_UNDERCLOCKED_STS */
 
#define ARIZONA_MIXER_UNDERCLOCKED_STS   0x0001 /* MIXER_UNDERCLOCKED_STS */
 
#define ARIZONA_MIXER_UNDERCLOCKED_STS_MASK   0x0001 /* MIXER_UNDERCLOCKED_STS */
 
#define ARIZONA_MIXER_UNDERCLOCKED_STS_SHIFT   0 /* MIXER_UNDERCLOCKED_STS */
 
#define ARIZONA_MIXER_UNDERCLOCKED_STS_WIDTH   1 /* MIXER_UNDERCLOCKED_STS */
 
#define ARIZONA_IRQ2_STS   0x0002 /* IRQ2_STS */
 
#define ARIZONA_IRQ2_STS_MASK   0x0002 /* IRQ2_STS */
 
#define ARIZONA_IRQ2_STS_SHIFT   1 /* IRQ2_STS */
 
#define ARIZONA_IRQ2_STS_WIDTH   1 /* IRQ2_STS */
 
#define ARIZONA_IRQ1_STS   0x0001 /* IRQ1_STS */
 
#define ARIZONA_IRQ1_STS_MASK   0x0001 /* IRQ1_STS */
 
#define ARIZONA_IRQ1_STS_SHIFT   0 /* IRQ1_STS */
 
#define ARIZONA_IRQ1_STS_WIDTH   1 /* IRQ1_STS */
 
#define ARIZONA_DSP_IRQ2   0x0002 /* DSP_IRQ2 */
 
#define ARIZONA_DSP_IRQ2_MASK   0x0002 /* DSP_IRQ2 */
 
#define ARIZONA_DSP_IRQ2_SHIFT   1 /* DSP_IRQ2 */
 
#define ARIZONA_DSP_IRQ2_WIDTH   1 /* DSP_IRQ2 */
 
#define ARIZONA_DSP_IRQ1   0x0001 /* DSP_IRQ1 */
 
#define ARIZONA_DSP_IRQ1_MASK   0x0001 /* DSP_IRQ1 */
 
#define ARIZONA_DSP_IRQ1_SHIFT   0 /* DSP_IRQ1 */
 
#define ARIZONA_DSP_IRQ1_WIDTH   1 /* DSP_IRQ1 */
 
#define ARIZONA_GP5_FALL_TRIG_STS   0x0020 /* GP5_FALL_TRIG_STS */
 
#define ARIZONA_GP5_FALL_TRIG_STS_MASK   0x0020 /* GP5_FALL_TRIG_STS */
 
#define ARIZONA_GP5_FALL_TRIG_STS_SHIFT   5 /* GP5_FALL_TRIG_STS */
 
#define ARIZONA_GP5_FALL_TRIG_STS_WIDTH   1 /* GP5_FALL_TRIG_STS */
 
#define ARIZONA_GP5_RISE_TRIG_STS   0x0010 /* GP5_RISE_TRIG_STS */
 
#define ARIZONA_GP5_RISE_TRIG_STS_MASK   0x0010 /* GP5_RISE_TRIG_STS */
 
#define ARIZONA_GP5_RISE_TRIG_STS_SHIFT   4 /* GP5_RISE_TRIG_STS */
 
#define ARIZONA_GP5_RISE_TRIG_STS_WIDTH   1 /* GP5_RISE_TRIG_STS */
 
#define ARIZONA_JD1_FALL_TRIG_STS   0x0008 /* JD1_FALL_TRIG_STS */
 
#define ARIZONA_JD1_FALL_TRIG_STS_MASK   0x0008 /* JD1_FALL_TRIG_STS */
 
#define ARIZONA_JD1_FALL_TRIG_STS_SHIFT   3 /* JD1_FALL_TRIG_STS */
 
#define ARIZONA_JD1_FALL_TRIG_STS_WIDTH   1 /* JD1_FALL_TRIG_STS */
 
#define ARIZONA_JD1_RISE_TRIG_STS   0x0004 /* JD1_RISE_TRIG_STS */
 
#define ARIZONA_JD1_RISE_TRIG_STS_MASK   0x0004 /* JD1_RISE_TRIG_STS */
 
#define ARIZONA_JD1_RISE_TRIG_STS_SHIFT   2 /* JD1_RISE_TRIG_STS */
 
#define ARIZONA_JD1_RISE_TRIG_STS_WIDTH   1 /* JD1_RISE_TRIG_STS */
 
#define ARIZONA_JD2_FALL_TRIG_STS   0x0002 /* JD2_FALL_TRIG_STS */
 
#define ARIZONA_JD2_FALL_TRIG_STS_MASK   0x0002 /* JD2_FALL_TRIG_STS */
 
#define ARIZONA_JD2_FALL_TRIG_STS_SHIFT   1 /* JD2_FALL_TRIG_STS */
 
#define ARIZONA_JD2_FALL_TRIG_STS_WIDTH   1 /* JD2_FALL_TRIG_STS */
 
#define ARIZONA_JD2_RISE_TRIG_STS   0x0001 /* JD2_RISE_TRIG_STS */
 
#define ARIZONA_JD2_RISE_TRIG_STS_MASK   0x0001 /* JD2_RISE_TRIG_STS */
 
#define ARIZONA_JD2_RISE_TRIG_STS_SHIFT   0 /* JD2_RISE_TRIG_STS */
 
#define ARIZONA_JD2_RISE_TRIG_STS_WIDTH   1 /* JD2_RISE_TRIG_STS */
 
#define ARIZONA_GP5_FALL_EINT1   0x0020 /* GP5_FALL_EINT1 */
 
#define ARIZONA_GP5_FALL_EINT1_MASK   0x0020 /* GP5_FALL_EINT1 */
 
#define ARIZONA_GP5_FALL_EINT1_SHIFT   5 /* GP5_FALL_EINT1 */
 
#define ARIZONA_GP5_FALL_EINT1_WIDTH   1 /* GP5_FALL_EINT1 */
 
#define ARIZONA_GP5_RISE_EINT1   0x0010 /* GP5_RISE_EINT1 */
 
#define ARIZONA_GP5_RISE_EINT1_MASK   0x0010 /* GP5_RISE_EINT1 */
 
#define ARIZONA_GP5_RISE_EINT1_SHIFT   4 /* GP5_RISE_EINT1 */
 
#define ARIZONA_GP5_RISE_EINT1_WIDTH   1 /* GP5_RISE_EINT1 */
 
#define ARIZONA_JD1_FALL_EINT1   0x0008 /* JD1_FALL_EINT1 */
 
#define ARIZONA_JD1_FALL_EINT1_MASK   0x0008 /* JD1_FALL_EINT1 */
 
#define ARIZONA_JD1_FALL_EINT1_SHIFT   3 /* JD1_FALL_EINT1 */
 
#define ARIZONA_JD1_FALL_EINT1_WIDTH   1 /* JD1_FALL_EINT1 */
 
#define ARIZONA_JD1_RISE_EINT1   0x0004 /* JD1_RISE_EINT1 */
 
#define ARIZONA_JD1_RISE_EINT1_MASK   0x0004 /* JD1_RISE_EINT1 */
 
#define ARIZONA_JD1_RISE_EINT1_SHIFT   2 /* JD1_RISE_EINT1 */
 
#define ARIZONA_JD1_RISE_EINT1_WIDTH   1 /* JD1_RISE_EINT1 */
 
#define ARIZONA_JD2_FALL_EINT1   0x0002 /* JD2_FALL_EINT1 */
 
#define ARIZONA_JD2_FALL_EINT1_MASK   0x0002 /* JD2_FALL_EINT1 */
 
#define ARIZONA_JD2_FALL_EINT1_SHIFT   1 /* JD2_FALL_EINT1 */
 
#define ARIZONA_JD2_FALL_EINT1_WIDTH   1 /* JD2_FALL_EINT1 */
 
#define ARIZONA_JD2_RISE_EINT1   0x0001 /* JD2_RISE_EINT1 */
 
#define ARIZONA_JD2_RISE_EINT1_MASK   0x0001 /* JD2_RISE_EINT1 */
 
#define ARIZONA_JD2_RISE_EINT1_SHIFT   0 /* JD2_RISE_EINT1 */
 
#define ARIZONA_JD2_RISE_EINT1_WIDTH   1 /* JD2_RISE_EINT1 */
 
#define ARIZONA_GP5_FALL_EINT2   0x0020 /* GP5_FALL_EINT2 */
 
#define ARIZONA_GP5_FALL_EINT2_MASK   0x0020 /* GP5_FALL_EINT2 */
 
#define ARIZONA_GP5_FALL_EINT2_SHIFT   5 /* GP5_FALL_EINT2 */
 
#define ARIZONA_GP5_FALL_EINT2_WIDTH   1 /* GP5_FALL_EINT2 */
 
#define ARIZONA_GP5_RISE_EINT2   0x0010 /* GP5_RISE_EINT2 */
 
#define ARIZONA_GP5_RISE_EINT2_MASK   0x0010 /* GP5_RISE_EINT2 */
 
#define ARIZONA_GP5_RISE_EINT2_SHIFT   4 /* GP5_RISE_EINT2 */
 
#define ARIZONA_GP5_RISE_EINT2_WIDTH   1 /* GP5_RISE_EINT2 */
 
#define ARIZONA_JD1_FALL_EINT2   0x0008 /* JD1_FALL_EINT2 */
 
#define ARIZONA_JD1_FALL_EINT2_MASK   0x0008 /* JD1_FALL_EINT2 */
 
#define ARIZONA_JD1_FALL_EINT2_SHIFT   3 /* JD1_FALL_EINT2 */
 
#define ARIZONA_JD1_FALL_EINT2_WIDTH   1 /* JD1_FALL_EINT2 */
 
#define ARIZONA_JD1_RISE_EINT2   0x0004 /* JD1_RISE_EINT2 */
 
#define ARIZONA_JD1_RISE_EINT2_MASK   0x0004 /* JD1_RISE_EINT2 */
 
#define ARIZONA_JD1_RISE_EINT2_SHIFT   2 /* JD1_RISE_EINT2 */
 
#define ARIZONA_JD1_RISE_EINT2_WIDTH   1 /* JD1_RISE_EINT2 */
 
#define ARIZONA_JD2_FALL_EINT2   0x0002 /* JD2_FALL_EINT2 */
 
#define ARIZONA_JD2_FALL_EINT2_MASK   0x0002 /* JD2_FALL_EINT2 */
 
#define ARIZONA_JD2_FALL_EINT2_SHIFT   1 /* JD2_FALL_EINT2 */
 
#define ARIZONA_JD2_FALL_EINT2_WIDTH   1 /* JD2_FALL_EINT2 */
 
#define ARIZONA_JD2_RISE_EINT2   0x0001 /* JD2_RISE_EINT2 */
 
#define ARIZONA_JD2_RISE_EINT2_MASK   0x0001 /* JD2_RISE_EINT2 */
 
#define ARIZONA_JD2_RISE_EINT2_SHIFT   0 /* JD2_RISE_EINT2 */
 
#define ARIZONA_JD2_RISE_EINT2_WIDTH   1 /* JD2_RISE_EINT2 */
 
#define ARIZONA_IM_GP5_FALL_EINT1   0x0020 /* IM_GP5_FALL_EINT1 */
 
#define ARIZONA_IM_GP5_FALL_EINT1_MASK   0x0020 /* IM_GP5_FALL_EINT1 */
 
#define ARIZONA_IM_GP5_FALL_EINT1_SHIFT   5 /* IM_GP5_FALL_EINT1 */
 
#define ARIZONA_IM_GP5_FALL_EINT1_WIDTH   1 /* IM_GP5_FALL_EINT1 */
 
#define ARIZONA_IM_GP5_RISE_EINT1   0x0010 /* IM_GP5_RISE_EINT1 */
 
#define ARIZONA_IM_GP5_RISE_EINT1_MASK   0x0010 /* IM_GP5_RISE_EINT1 */
 
#define ARIZONA_IM_GP5_RISE_EINT1_SHIFT   4 /* IM_GP5_RISE_EINT1 */
 
#define ARIZONA_IM_GP5_RISE_EINT1_WIDTH   1 /* IM_GP5_RISE_EINT1 */
 
#define ARIZONA_IM_JD1_FALL_EINT1   0x0008 /* IM_JD1_FALL_EINT1 */
 
#define ARIZONA_IM_JD1_FALL_EINT1_MASK   0x0008 /* IM_JD1_FALL_EINT1 */
 
#define ARIZONA_IM_JD1_FALL_EINT1_SHIFT   3 /* IM_JD1_FALL_EINT1 */
 
#define ARIZONA_IM_JD1_FALL_EINT1_WIDTH   1 /* IM_JD1_FALL_EINT1 */
 
#define ARIZONA_IM_JD1_RISE_EINT1   0x0004 /* IM_JD1_RISE_EINT1 */
 
#define ARIZONA_IM_JD1_RISE_EINT1_MASK   0x0004 /* IM_JD1_RISE_EINT1 */
 
#define ARIZONA_IM_JD1_RISE_EINT1_SHIFT   2 /* IM_JD1_RISE_EINT1 */
 
#define ARIZONA_IM_JD1_RISE_EINT1_WIDTH   1 /* IM_JD1_RISE_EINT1 */
 
#define ARIZONA_IM_JD2_FALL_EINT1   0x0002 /* IM_JD2_FALL_EINT1 */
 
#define ARIZONA_IM_JD2_FALL_EINT1_MASK   0x0002 /* IM_JD2_FALL_EINT1 */
 
#define ARIZONA_IM_JD2_FALL_EINT1_SHIFT   1 /* IM_JD2_FALL_EINT1 */
 
#define ARIZONA_IM_JD2_FALL_EINT1_WIDTH   1 /* IM_JD2_FALL_EINT1 */
 
#define ARIZONA_IM_JD2_RISE_EINT1   0x0001 /* IM_JD2_RISE_EINT1 */
 
#define ARIZONA_IM_JD2_RISE_EINT1_MASK   0x0001 /* IM_JD2_RISE_EINT1 */
 
#define ARIZONA_IM_JD2_RISE_EINT1_SHIFT   0 /* IM_JD2_RISE_EINT1 */
 
#define ARIZONA_IM_JD2_RISE_EINT1_WIDTH   1 /* IM_JD2_RISE_EINT1 */
 
#define ARIZONA_IM_GP5_FALL_EINT2   0x0020 /* IM_GP5_FALL_EINT2 */
 
#define ARIZONA_IM_GP5_FALL_EINT2_MASK   0x0020 /* IM_GP5_FALL_EINT2 */
 
#define ARIZONA_IM_GP5_FALL_EINT2_SHIFT   5 /* IM_GP5_FALL_EINT2 */
 
#define ARIZONA_IM_GP5_FALL_EINT2_WIDTH   1 /* IM_GP5_FALL_EINT2 */
 
#define ARIZONA_IM_GP5_RISE_EINT2   0x0010 /* IM_GP5_RISE_EINT2 */
 
#define ARIZONA_IM_GP5_RISE_EINT2_MASK   0x0010 /* IM_GP5_RISE_EINT2 */
 
#define ARIZONA_IM_GP5_RISE_EINT2_SHIFT   4 /* IM_GP5_RISE_EINT2 */
 
#define ARIZONA_IM_GP5_RISE_EINT2_WIDTH   1 /* IM_GP5_RISE_EINT2 */
 
#define ARIZONA_IM_JD1_FALL_EINT2   0x0008 /* IM_JD1_FALL_EINT2 */
 
#define ARIZONA_IM_JD1_FALL_EINT2_MASK   0x0008 /* IM_JD1_FALL_EINT2 */
 
#define ARIZONA_IM_JD1_FALL_EINT2_SHIFT   3 /* IM_JD1_FALL_EINT2 */
 
#define ARIZONA_IM_JD1_FALL_EINT2_WIDTH   1 /* IM_JD1_FALL_EINT2 */
 
#define ARIZONA_IM_JD1_RISE_EINT2   0x0004 /* IM_JD1_RISE_EINT2 */
 
#define ARIZONA_IM_JD1_RISE_EINT2_MASK   0x0004 /* IM_JD1_RISE_EINT2 */
 
#define ARIZONA_IM_JD1_RISE_EINT2_SHIFT   2 /* IM_JD1_RISE_EINT2 */
 
#define ARIZONA_IM_JD1_RISE_EINT2_WIDTH   1 /* IM_JD1_RISE_EINT2 */
 
#define ARIZONA_IM_JD2_FALL_EINT2   0x0002 /* IM_JD2_FALL_EINT2 */
 
#define ARIZONA_IM_JD2_FALL_EINT2_MASK   0x0002 /* IM_JD2_FALL_EINT2 */
 
#define ARIZONA_IM_JD2_FALL_EINT2_SHIFT   1 /* IM_JD2_FALL_EINT2 */
 
#define ARIZONA_IM_JD2_FALL_EINT2_WIDTH   1 /* IM_JD2_FALL_EINT2 */
 
#define ARIZONA_IM_JD2_RISE_EINT2   0x0001 /* IM_JD2_RISE_EINT2 */
 
#define ARIZONA_IM_JD2_RISE_EINT2_MASK   0x0001 /* IM_JD2_RISE_EINT2 */
 
#define ARIZONA_IM_JD2_RISE_EINT2_SHIFT   0 /* IM_JD2_RISE_EINT2 */
 
#define ARIZONA_IM_JD2_RISE_EINT2_WIDTH   1 /* IM_JD2_RISE_EINT2 */
 
#define ARIZONA_GP5_STS   0x0004 /* GP5_STS */
 
#define ARIZONA_GP5_STS_MASK   0x0004 /* GP5_STS */
 
#define ARIZONA_GP5_STS_SHIFT   2 /* GP5_STS */
 
#define ARIZONA_GP5_STS_WIDTH   1 /* GP5_STS */
 
#define ARIZONA_JD2_STS   0x0002 /* JD2_STS */
 
#define ARIZONA_JD2_STS_MASK   0x0002 /* JD2_STS */
 
#define ARIZONA_JD2_STS_SHIFT   1 /* JD2_STS */
 
#define ARIZONA_JD2_STS_WIDTH   1 /* JD2_STS */
 
#define ARIZONA_JD1_STS   0x0001 /* JD1_STS */
 
#define ARIZONA_JD1_STS_MASK   0x0001 /* JD1_STS */
 
#define ARIZONA_JD1_STS_SHIFT   0 /* JD1_STS */
 
#define ARIZONA_JD1_STS_WIDTH   1 /* JD1_STS */
 
#define ARIZONA_JD2_DB   0x0002 /* JD2_DB */
 
#define ARIZONA_JD2_DB_MASK   0x0002 /* JD2_DB */
 
#define ARIZONA_JD2_DB_SHIFT   1 /* JD2_DB */
 
#define ARIZONA_JD2_DB_WIDTH   1 /* JD2_DB */
 
#define ARIZONA_JD1_DB   0x0001 /* JD1_DB */
 
#define ARIZONA_JD1_DB_MASK   0x0001 /* JD1_DB */
 
#define ARIZONA_JD1_DB_SHIFT   0 /* JD1_DB */
 
#define ARIZONA_JD1_DB_WIDTH   1 /* JD1_DB */
 
#define ARIZONA_FX_RATE_MASK   0x7800 /* FX_RATE - [14:11] */
 
#define ARIZONA_FX_RATE_SHIFT   11 /* FX_RATE - [14:11] */
 
#define ARIZONA_FX_RATE_WIDTH   4 /* FX_RATE - [14:11] */
 
#define ARIZONA_FX_STS_MASK   0xFFF0 /* FX_STS - [15:4] */
 
#define ARIZONA_FX_STS_SHIFT   4 /* FX_STS - [15:4] */
 
#define ARIZONA_FX_STS_WIDTH   12 /* FX_STS - [15:4] */
 
#define ARIZONA_EQ1_B1_GAIN_MASK   0xF800 /* EQ1_B1_GAIN - [15:11] */
 
#define ARIZONA_EQ1_B1_GAIN_SHIFT   11 /* EQ1_B1_GAIN - [15:11] */
 
#define ARIZONA_EQ1_B1_GAIN_WIDTH   5 /* EQ1_B1_GAIN - [15:11] */
 
#define ARIZONA_EQ1_B2_GAIN_MASK   0x07C0 /* EQ1_B2_GAIN - [10:6] */
 
#define ARIZONA_EQ1_B2_GAIN_SHIFT   6 /* EQ1_B2_GAIN - [10:6] */
 
#define ARIZONA_EQ1_B2_GAIN_WIDTH   5 /* EQ1_B2_GAIN - [10:6] */
 
#define ARIZONA_EQ1_B3_GAIN_MASK   0x003E /* EQ1_B3_GAIN - [5:1] */
 
#define ARIZONA_EQ1_B3_GAIN_SHIFT   1 /* EQ1_B3_GAIN - [5:1] */
 
#define ARIZONA_EQ1_B3_GAIN_WIDTH   5 /* EQ1_B3_GAIN - [5:1] */
 
#define ARIZONA_EQ1_ENA   0x0001 /* EQ1_ENA */
 
#define ARIZONA_EQ1_ENA_MASK   0x0001 /* EQ1_ENA */
 
#define ARIZONA_EQ1_ENA_SHIFT   0 /* EQ1_ENA */
 
#define ARIZONA_EQ1_ENA_WIDTH   1 /* EQ1_ENA */
 
#define ARIZONA_EQ1_B4_GAIN_MASK   0xF800 /* EQ1_B4_GAIN - [15:11] */
 
#define ARIZONA_EQ1_B4_GAIN_SHIFT   11 /* EQ1_B4_GAIN - [15:11] */
 
#define ARIZONA_EQ1_B4_GAIN_WIDTH   5 /* EQ1_B4_GAIN - [15:11] */
 
#define ARIZONA_EQ1_B5_GAIN_MASK   0x07C0 /* EQ1_B5_GAIN - [10:6] */
 
#define ARIZONA_EQ1_B5_GAIN_SHIFT   6 /* EQ1_B5_GAIN - [10:6] */
 
#define ARIZONA_EQ1_B5_GAIN_WIDTH   5 /* EQ1_B5_GAIN - [10:6] */
 
#define ARIZONA_EQ1_B1_MODE   0x0001 /* EQ1_B1_MODE */
 
#define ARIZONA_EQ1_B1_MODE_MASK   0x0001 /* EQ1_B1_MODE */
 
#define ARIZONA_EQ1_B1_MODE_SHIFT   0 /* EQ1_B1_MODE */
 
#define ARIZONA_EQ1_B1_MODE_WIDTH   1 /* EQ1_B1_MODE */
 
#define ARIZONA_EQ1_B1_A_MASK   0xFFFF /* EQ1_B1_A - [15:0] */
 
#define ARIZONA_EQ1_B1_A_SHIFT   0 /* EQ1_B1_A - [15:0] */
 
#define ARIZONA_EQ1_B1_A_WIDTH   16 /* EQ1_B1_A - [15:0] */
 
#define ARIZONA_EQ1_B1_B_MASK   0xFFFF /* EQ1_B1_B - [15:0] */
 
#define ARIZONA_EQ1_B1_B_SHIFT   0 /* EQ1_B1_B - [15:0] */
 
#define ARIZONA_EQ1_B1_B_WIDTH   16 /* EQ1_B1_B - [15:0] */
 
#define ARIZONA_EQ1_B1_PG_MASK   0xFFFF /* EQ1_B1_PG - [15:0] */
 
#define ARIZONA_EQ1_B1_PG_SHIFT   0 /* EQ1_B1_PG - [15:0] */
 
#define ARIZONA_EQ1_B1_PG_WIDTH   16 /* EQ1_B1_PG - [15:0] */
 
#define ARIZONA_EQ1_B2_A_MASK   0xFFFF /* EQ1_B2_A - [15:0] */
 
#define ARIZONA_EQ1_B2_A_SHIFT   0 /* EQ1_B2_A - [15:0] */
 
#define ARIZONA_EQ1_B2_A_WIDTH   16 /* EQ1_B2_A - [15:0] */
 
#define ARIZONA_EQ1_B2_B_MASK   0xFFFF /* EQ1_B2_B - [15:0] */
 
#define ARIZONA_EQ1_B2_B_SHIFT   0 /* EQ1_B2_B - [15:0] */
 
#define ARIZONA_EQ1_B2_B_WIDTH   16 /* EQ1_B2_B - [15:0] */
 
#define ARIZONA_EQ1_B2_C_MASK   0xFFFF /* EQ1_B2_C - [15:0] */
 
#define ARIZONA_EQ1_B2_C_SHIFT   0 /* EQ1_B2_C - [15:0] */
 
#define ARIZONA_EQ1_B2_C_WIDTH   16 /* EQ1_B2_C - [15:0] */
 
#define ARIZONA_EQ1_B2_PG_MASK   0xFFFF /* EQ1_B2_PG - [15:0] */
 
#define ARIZONA_EQ1_B2_PG_SHIFT   0 /* EQ1_B2_PG - [15:0] */
 
#define ARIZONA_EQ1_B2_PG_WIDTH   16 /* EQ1_B2_PG - [15:0] */
 
#define ARIZONA_EQ1_B3_A_MASK   0xFFFF /* EQ1_B3_A - [15:0] */
 
#define ARIZONA_EQ1_B3_A_SHIFT   0 /* EQ1_B3_A - [15:0] */
 
#define ARIZONA_EQ1_B3_A_WIDTH   16 /* EQ1_B3_A - [15:0] */
 
#define ARIZONA_EQ1_B3_B_MASK   0xFFFF /* EQ1_B3_B - [15:0] */
 
#define ARIZONA_EQ1_B3_B_SHIFT   0 /* EQ1_B3_B - [15:0] */
 
#define ARIZONA_EQ1_B3_B_WIDTH   16 /* EQ1_B3_B - [15:0] */
 
#define ARIZONA_EQ1_B3_C_MASK   0xFFFF /* EQ1_B3_C - [15:0] */
 
#define ARIZONA_EQ1_B3_C_SHIFT   0 /* EQ1_B3_C - [15:0] */
 
#define ARIZONA_EQ1_B3_C_WIDTH   16 /* EQ1_B3_C - [15:0] */
 
#define ARIZONA_EQ1_B3_PG_MASK   0xFFFF /* EQ1_B3_PG - [15:0] */
 
#define ARIZONA_EQ1_B3_PG_SHIFT   0 /* EQ1_B3_PG - [15:0] */
 
#define ARIZONA_EQ1_B3_PG_WIDTH   16 /* EQ1_B3_PG - [15:0] */
 
#define ARIZONA_EQ1_B4_A_MASK   0xFFFF /* EQ1_B4_A - [15:0] */
 
#define ARIZONA_EQ1_B4_A_SHIFT   0 /* EQ1_B4_A - [15:0] */
 
#define ARIZONA_EQ1_B4_A_WIDTH   16 /* EQ1_B4_A - [15:0] */
 
#define ARIZONA_EQ1_B4_B_MASK   0xFFFF /* EQ1_B4_B - [15:0] */
 
#define ARIZONA_EQ1_B4_B_SHIFT   0 /* EQ1_B4_B - [15:0] */
 
#define ARIZONA_EQ1_B4_B_WIDTH   16 /* EQ1_B4_B - [15:0] */
 
#define ARIZONA_EQ1_B4_C_MASK   0xFFFF /* EQ1_B4_C - [15:0] */
 
#define ARIZONA_EQ1_B4_C_SHIFT   0 /* EQ1_B4_C - [15:0] */
 
#define ARIZONA_EQ1_B4_C_WIDTH   16 /* EQ1_B4_C - [15:0] */
 
#define ARIZONA_EQ1_B4_PG_MASK   0xFFFF /* EQ1_B4_PG - [15:0] */
 
#define ARIZONA_EQ1_B4_PG_SHIFT   0 /* EQ1_B4_PG - [15:0] */
 
#define ARIZONA_EQ1_B4_PG_WIDTH   16 /* EQ1_B4_PG - [15:0] */
 
#define ARIZONA_EQ1_B5_A_MASK   0xFFFF /* EQ1_B5_A - [15:0] */
 
#define ARIZONA_EQ1_B5_A_SHIFT   0 /* EQ1_B5_A - [15:0] */
 
#define ARIZONA_EQ1_B5_A_WIDTH   16 /* EQ1_B5_A - [15:0] */
 
#define ARIZONA_EQ1_B5_B_MASK   0xFFFF /* EQ1_B5_B - [15:0] */
 
#define ARIZONA_EQ1_B5_B_SHIFT   0 /* EQ1_B5_B - [15:0] */
 
#define ARIZONA_EQ1_B5_B_WIDTH   16 /* EQ1_B5_B - [15:0] */
 
#define ARIZONA_EQ1_B5_PG_MASK   0xFFFF /* EQ1_B5_PG - [15:0] */
 
#define ARIZONA_EQ1_B5_PG_SHIFT   0 /* EQ1_B5_PG - [15:0] */
 
#define ARIZONA_EQ1_B5_PG_WIDTH   16 /* EQ1_B5_PG - [15:0] */
 
#define ARIZONA_EQ1_B1_C_MASK   0xFFFF /* EQ1_B1_C - [15:0] */
 
#define ARIZONA_EQ1_B1_C_SHIFT   0 /* EQ1_B1_C - [15:0] */
 
#define ARIZONA_EQ1_B1_C_WIDTH   16 /* EQ1_B1_C - [15:0] */
 
#define ARIZONA_EQ2_B1_GAIN_MASK   0xF800 /* EQ2_B1_GAIN - [15:11] */
 
#define ARIZONA_EQ2_B1_GAIN_SHIFT   11 /* EQ2_B1_GAIN - [15:11] */
 
#define ARIZONA_EQ2_B1_GAIN_WIDTH   5 /* EQ2_B1_GAIN - [15:11] */
 
#define ARIZONA_EQ2_B2_GAIN_MASK   0x07C0 /* EQ2_B2_GAIN - [10:6] */
 
#define ARIZONA_EQ2_B2_GAIN_SHIFT   6 /* EQ2_B2_GAIN - [10:6] */
 
#define ARIZONA_EQ2_B2_GAIN_WIDTH   5 /* EQ2_B2_GAIN - [10:6] */
 
#define ARIZONA_EQ2_B3_GAIN_MASK   0x003E /* EQ2_B3_GAIN - [5:1] */
 
#define ARIZONA_EQ2_B3_GAIN_SHIFT   1 /* EQ2_B3_GAIN - [5:1] */
 
#define ARIZONA_EQ2_B3_GAIN_WIDTH   5 /* EQ2_B3_GAIN - [5:1] */
 
#define ARIZONA_EQ2_ENA   0x0001 /* EQ2_ENA */
 
#define ARIZONA_EQ2_ENA_MASK   0x0001 /* EQ2_ENA */
 
#define ARIZONA_EQ2_ENA_SHIFT   0 /* EQ2_ENA */
 
#define ARIZONA_EQ2_ENA_WIDTH   1 /* EQ2_ENA */
 
#define ARIZONA_EQ2_B4_GAIN_MASK   0xF800 /* EQ2_B4_GAIN - [15:11] */
 
#define ARIZONA_EQ2_B4_GAIN_SHIFT   11 /* EQ2_B4_GAIN - [15:11] */
 
#define ARIZONA_EQ2_B4_GAIN_WIDTH   5 /* EQ2_B4_GAIN - [15:11] */
 
#define ARIZONA_EQ2_B5_GAIN_MASK   0x07C0 /* EQ2_B5_GAIN - [10:6] */
 
#define ARIZONA_EQ2_B5_GAIN_SHIFT   6 /* EQ2_B5_GAIN - [10:6] */
 
#define ARIZONA_EQ2_B5_GAIN_WIDTH   5 /* EQ2_B5_GAIN - [10:6] */
 
#define ARIZONA_EQ2_B1_MODE   0x0001 /* EQ2_B1_MODE */
 
#define ARIZONA_EQ2_B1_MODE_MASK   0x0001 /* EQ2_B1_MODE */
 
#define ARIZONA_EQ2_B1_MODE_SHIFT   0 /* EQ2_B1_MODE */
 
#define ARIZONA_EQ2_B1_MODE_WIDTH   1 /* EQ2_B1_MODE */
 
#define ARIZONA_EQ2_B1_A_MASK   0xFFFF /* EQ2_B1_A - [15:0] */
 
#define ARIZONA_EQ2_B1_A_SHIFT   0 /* EQ2_B1_A - [15:0] */
 
#define ARIZONA_EQ2_B1_A_WIDTH   16 /* EQ2_B1_A - [15:0] */
 
#define ARIZONA_EQ2_B1_B_MASK   0xFFFF /* EQ2_B1_B - [15:0] */
 
#define ARIZONA_EQ2_B1_B_SHIFT   0 /* EQ2_B1_B - [15:0] */
 
#define ARIZONA_EQ2_B1_B_WIDTH   16 /* EQ2_B1_B - [15:0] */
 
#define ARIZONA_EQ2_B1_PG_MASK   0xFFFF /* EQ2_B1_PG - [15:0] */
 
#define ARIZONA_EQ2_B1_PG_SHIFT   0 /* EQ2_B1_PG - [15:0] */
 
#define ARIZONA_EQ2_B1_PG_WIDTH   16 /* EQ2_B1_PG - [15:0] */
 
#define ARIZONA_EQ2_B2_A_MASK   0xFFFF /* EQ2_B2_A - [15:0] */
 
#define ARIZONA_EQ2_B2_A_SHIFT   0 /* EQ2_B2_A - [15:0] */
 
#define ARIZONA_EQ2_B2_A_WIDTH   16 /* EQ2_B2_A - [15:0] */
 
#define ARIZONA_EQ2_B2_B_MASK   0xFFFF /* EQ2_B2_B - [15:0] */
 
#define ARIZONA_EQ2_B2_B_SHIFT   0 /* EQ2_B2_B - [15:0] */
 
#define ARIZONA_EQ2_B2_B_WIDTH   16 /* EQ2_B2_B - [15:0] */
 
#define ARIZONA_EQ2_B2_C_MASK   0xFFFF /* EQ2_B2_C - [15:0] */
 
#define ARIZONA_EQ2_B2_C_SHIFT   0 /* EQ2_B2_C - [15:0] */
 
#define ARIZONA_EQ2_B2_C_WIDTH   16 /* EQ2_B2_C - [15:0] */
 
#define ARIZONA_EQ2_B2_PG_MASK   0xFFFF /* EQ2_B2_PG - [15:0] */
 
#define ARIZONA_EQ2_B2_PG_SHIFT   0 /* EQ2_B2_PG - [15:0] */
 
#define ARIZONA_EQ2_B2_PG_WIDTH   16 /* EQ2_B2_PG - [15:0] */
 
#define ARIZONA_EQ2_B3_A_MASK   0xFFFF /* EQ2_B3_A - [15:0] */
 
#define ARIZONA_EQ2_B3_A_SHIFT   0 /* EQ2_B3_A - [15:0] */
 
#define ARIZONA_EQ2_B3_A_WIDTH   16 /* EQ2_B3_A - [15:0] */
 
#define ARIZONA_EQ2_B3_B_MASK   0xFFFF /* EQ2_B3_B - [15:0] */
 
#define ARIZONA_EQ2_B3_B_SHIFT   0 /* EQ2_B3_B - [15:0] */
 
#define ARIZONA_EQ2_B3_B_WIDTH   16 /* EQ2_B3_B - [15:0] */
 
#define ARIZONA_EQ2_B3_C_MASK   0xFFFF /* EQ2_B3_C - [15:0] */
 
#define ARIZONA_EQ2_B3_C_SHIFT   0 /* EQ2_B3_C - [15:0] */
 
#define ARIZONA_EQ2_B3_C_WIDTH   16 /* EQ2_B3_C - [15:0] */
 
#define ARIZONA_EQ2_B3_PG_MASK   0xFFFF /* EQ2_B3_PG - [15:0] */
 
#define ARIZONA_EQ2_B3_PG_SHIFT   0 /* EQ2_B3_PG - [15:0] */
 
#define ARIZONA_EQ2_B3_PG_WIDTH   16 /* EQ2_B3_PG - [15:0] */
 
#define ARIZONA_EQ2_B4_A_MASK   0xFFFF /* EQ2_B4_A - [15:0] */
 
#define ARIZONA_EQ2_B4_A_SHIFT   0 /* EQ2_B4_A - [15:0] */
 
#define ARIZONA_EQ2_B4_A_WIDTH   16 /* EQ2_B4_A - [15:0] */
 
#define ARIZONA_EQ2_B4_B_MASK   0xFFFF /* EQ2_B4_B - [15:0] */
 
#define ARIZONA_EQ2_B4_B_SHIFT   0 /* EQ2_B4_B - [15:0] */
 
#define ARIZONA_EQ2_B4_B_WIDTH   16 /* EQ2_B4_B - [15:0] */
 
#define ARIZONA_EQ2_B4_C_MASK   0xFFFF /* EQ2_B4_C - [15:0] */
 
#define ARIZONA_EQ2_B4_C_SHIFT   0 /* EQ2_B4_C - [15:0] */
 
#define ARIZONA_EQ2_B4_C_WIDTH   16 /* EQ2_B4_C - [15:0] */
 
#define ARIZONA_EQ2_B4_PG_MASK   0xFFFF /* EQ2_B4_PG - [15:0] */
 
#define ARIZONA_EQ2_B4_PG_SHIFT   0 /* EQ2_B4_PG - [15:0] */
 
#define ARIZONA_EQ2_B4_PG_WIDTH   16 /* EQ2_B4_PG - [15:0] */
 
#define ARIZONA_EQ2_B5_A_MASK   0xFFFF /* EQ2_B5_A - [15:0] */
 
#define ARIZONA_EQ2_B5_A_SHIFT   0 /* EQ2_B5_A - [15:0] */
 
#define ARIZONA_EQ2_B5_A_WIDTH   16 /* EQ2_B5_A - [15:0] */
 
#define ARIZONA_EQ2_B5_B_MASK   0xFFFF /* EQ2_B5_B - [15:0] */
 
#define ARIZONA_EQ2_B5_B_SHIFT   0 /* EQ2_B5_B - [15:0] */
 
#define ARIZONA_EQ2_B5_B_WIDTH   16 /* EQ2_B5_B - [15:0] */
 
#define ARIZONA_EQ2_B5_PG_MASK   0xFFFF /* EQ2_B5_PG - [15:0] */
 
#define ARIZONA_EQ2_B5_PG_SHIFT   0 /* EQ2_B5_PG - [15:0] */
 
#define ARIZONA_EQ2_B5_PG_WIDTH   16 /* EQ2_B5_PG - [15:0] */
 
#define ARIZONA_EQ2_B1_C_MASK   0xFFFF /* EQ2_B1_C - [15:0] */
 
#define ARIZONA_EQ2_B1_C_SHIFT   0 /* EQ2_B1_C - [15:0] */
 
#define ARIZONA_EQ2_B1_C_WIDTH   16 /* EQ2_B1_C - [15:0] */
 
#define ARIZONA_EQ3_B1_GAIN_MASK   0xF800 /* EQ3_B1_GAIN - [15:11] */
 
#define ARIZONA_EQ3_B1_GAIN_SHIFT   11 /* EQ3_B1_GAIN - [15:11] */
 
#define ARIZONA_EQ3_B1_GAIN_WIDTH   5 /* EQ3_B1_GAIN - [15:11] */
 
#define ARIZONA_EQ3_B2_GAIN_MASK   0x07C0 /* EQ3_B2_GAIN - [10:6] */
 
#define ARIZONA_EQ3_B2_GAIN_SHIFT   6 /* EQ3_B2_GAIN - [10:6] */
 
#define ARIZONA_EQ3_B2_GAIN_WIDTH   5 /* EQ3_B2_GAIN - [10:6] */
 
#define ARIZONA_EQ3_B3_GAIN_MASK   0x003E /* EQ3_B3_GAIN - [5:1] */
 
#define ARIZONA_EQ3_B3_GAIN_SHIFT   1 /* EQ3_B3_GAIN - [5:1] */
 
#define ARIZONA_EQ3_B3_GAIN_WIDTH   5 /* EQ3_B3_GAIN - [5:1] */
 
#define ARIZONA_EQ3_ENA   0x0001 /* EQ3_ENA */
 
#define ARIZONA_EQ3_ENA_MASK   0x0001 /* EQ3_ENA */
 
#define ARIZONA_EQ3_ENA_SHIFT   0 /* EQ3_ENA */
 
#define ARIZONA_EQ3_ENA_WIDTH   1 /* EQ3_ENA */
 
#define ARIZONA_EQ3_B4_GAIN_MASK   0xF800 /* EQ3_B4_GAIN - [15:11] */
 
#define ARIZONA_EQ3_B4_GAIN_SHIFT   11 /* EQ3_B4_GAIN - [15:11] */
 
#define ARIZONA_EQ3_B4_GAIN_WIDTH   5 /* EQ3_B4_GAIN - [15:11] */
 
#define ARIZONA_EQ3_B5_GAIN_MASK   0x07C0 /* EQ3_B5_GAIN - [10:6] */
 
#define ARIZONA_EQ3_B5_GAIN_SHIFT   6 /* EQ3_B5_GAIN - [10:6] */
 
#define ARIZONA_EQ3_B5_GAIN_WIDTH   5 /* EQ3_B5_GAIN - [10:6] */
 
#define ARIZONA_EQ3_B1_MODE   0x0001 /* EQ3_B1_MODE */
 
#define ARIZONA_EQ3_B1_MODE_MASK   0x0001 /* EQ3_B1_MODE */
 
#define ARIZONA_EQ3_B1_MODE_SHIFT   0 /* EQ3_B1_MODE */
 
#define ARIZONA_EQ3_B1_MODE_WIDTH   1 /* EQ3_B1_MODE */
 
#define ARIZONA_EQ3_B1_A_MASK   0xFFFF /* EQ3_B1_A - [15:0] */
 
#define ARIZONA_EQ3_B1_A_SHIFT   0 /* EQ3_B1_A - [15:0] */
 
#define ARIZONA_EQ3_B1_A_WIDTH   16 /* EQ3_B1_A - [15:0] */
 
#define ARIZONA_EQ3_B1_B_MASK   0xFFFF /* EQ3_B1_B - [15:0] */
 
#define ARIZONA_EQ3_B1_B_SHIFT   0 /* EQ3_B1_B - [15:0] */
 
#define ARIZONA_EQ3_B1_B_WIDTH   16 /* EQ3_B1_B - [15:0] */
 
#define ARIZONA_EQ3_B1_PG_MASK   0xFFFF /* EQ3_B1_PG - [15:0] */
 
#define ARIZONA_EQ3_B1_PG_SHIFT   0 /* EQ3_B1_PG - [15:0] */
 
#define ARIZONA_EQ3_B1_PG_WIDTH   16 /* EQ3_B1_PG - [15:0] */
 
#define ARIZONA_EQ3_B2_A_MASK   0xFFFF /* EQ3_B2_A - [15:0] */
 
#define ARIZONA_EQ3_B2_A_SHIFT   0 /* EQ3_B2_A - [15:0] */
 
#define ARIZONA_EQ3_B2_A_WIDTH   16 /* EQ3_B2_A - [15:0] */
 
#define ARIZONA_EQ3_B2_B_MASK   0xFFFF /* EQ3_B2_B - [15:0] */
 
#define ARIZONA_EQ3_B2_B_SHIFT   0 /* EQ3_B2_B - [15:0] */
 
#define ARIZONA_EQ3_B2_B_WIDTH   16 /* EQ3_B2_B - [15:0] */
 
#define ARIZONA_EQ3_B2_C_MASK   0xFFFF /* EQ3_B2_C - [15:0] */
 
#define ARIZONA_EQ3_B2_C_SHIFT   0 /* EQ3_B2_C - [15:0] */
 
#define ARIZONA_EQ3_B2_C_WIDTH   16 /* EQ3_B2_C - [15:0] */
 
#define ARIZONA_EQ3_B2_PG_MASK   0xFFFF /* EQ3_B2_PG - [15:0] */
 
#define ARIZONA_EQ3_B2_PG_SHIFT   0 /* EQ3_B2_PG - [15:0] */
 
#define ARIZONA_EQ3_B2_PG_WIDTH   16 /* EQ3_B2_PG - [15:0] */
 
#define ARIZONA_EQ3_B3_A_MASK   0xFFFF /* EQ3_B3_A - [15:0] */
 
#define ARIZONA_EQ3_B3_A_SHIFT   0 /* EQ3_B3_A - [15:0] */
 
#define ARIZONA_EQ3_B3_A_WIDTH   16 /* EQ3_B3_A - [15:0] */
 
#define ARIZONA_EQ3_B3_B_MASK   0xFFFF /* EQ3_B3_B - [15:0] */
 
#define ARIZONA_EQ3_B3_B_SHIFT   0 /* EQ3_B3_B - [15:0] */
 
#define ARIZONA_EQ3_B3_B_WIDTH   16 /* EQ3_B3_B - [15:0] */
 
#define ARIZONA_EQ3_B3_C_MASK   0xFFFF /* EQ3_B3_C - [15:0] */
 
#define ARIZONA_EQ3_B3_C_SHIFT   0 /* EQ3_B3_C - [15:0] */
 
#define ARIZONA_EQ3_B3_C_WIDTH   16 /* EQ3_B3_C - [15:0] */
 
#define ARIZONA_EQ3_B3_PG_MASK   0xFFFF /* EQ3_B3_PG - [15:0] */
 
#define ARIZONA_EQ3_B3_PG_SHIFT   0 /* EQ3_B3_PG - [15:0] */
 
#define ARIZONA_EQ3_B3_PG_WIDTH   16 /* EQ3_B3_PG - [15:0] */
 
#define ARIZONA_EQ3_B4_A_MASK   0xFFFF /* EQ3_B4_A - [15:0] */
 
#define ARIZONA_EQ3_B4_A_SHIFT   0 /* EQ3_B4_A - [15:0] */
 
#define ARIZONA_EQ3_B4_A_WIDTH   16 /* EQ3_B4_A - [15:0] */
 
#define ARIZONA_EQ3_B4_B_MASK   0xFFFF /* EQ3_B4_B - [15:0] */
 
#define ARIZONA_EQ3_B4_B_SHIFT   0 /* EQ3_B4_B - [15:0] */
 
#define ARIZONA_EQ3_B4_B_WIDTH   16 /* EQ3_B4_B - [15:0] */
 
#define ARIZONA_EQ3_B4_C_MASK   0xFFFF /* EQ3_B4_C - [15:0] */
 
#define ARIZONA_EQ3_B4_C_SHIFT   0 /* EQ3_B4_C - [15:0] */
 
#define ARIZONA_EQ3_B4_C_WIDTH   16 /* EQ3_B4_C - [15:0] */
 
#define ARIZONA_EQ3_B4_PG_MASK   0xFFFF /* EQ3_B4_PG - [15:0] */
 
#define ARIZONA_EQ3_B4_PG_SHIFT   0 /* EQ3_B4_PG - [15:0] */
 
#define ARIZONA_EQ3_B4_PG_WIDTH   16 /* EQ3_B4_PG - [15:0] */
 
#define ARIZONA_EQ3_B5_A_MASK   0xFFFF /* EQ3_B5_A - [15:0] */
 
#define ARIZONA_EQ3_B5_A_SHIFT   0 /* EQ3_B5_A - [15:0] */
 
#define ARIZONA_EQ3_B5_A_WIDTH   16 /* EQ3_B5_A - [15:0] */
 
#define ARIZONA_EQ3_B5_B_MASK   0xFFFF /* EQ3_B5_B - [15:0] */
 
#define ARIZONA_EQ3_B5_B_SHIFT   0 /* EQ3_B5_B - [15:0] */
 
#define ARIZONA_EQ3_B5_B_WIDTH   16 /* EQ3_B5_B - [15:0] */
 
#define ARIZONA_EQ3_B5_PG_MASK   0xFFFF /* EQ3_B5_PG - [15:0] */
 
#define ARIZONA_EQ3_B5_PG_SHIFT   0 /* EQ3_B5_PG - [15:0] */
 
#define ARIZONA_EQ3_B5_PG_WIDTH   16 /* EQ3_B5_PG - [15:0] */
 
#define ARIZONA_EQ3_B1_C_MASK   0xFFFF /* EQ3_B1_C - [15:0] */
 
#define ARIZONA_EQ3_B1_C_SHIFT   0 /* EQ3_B1_C - [15:0] */
 
#define ARIZONA_EQ3_B1_C_WIDTH   16 /* EQ3_B1_C - [15:0] */
 
#define ARIZONA_EQ4_B1_GAIN_MASK   0xF800 /* EQ4_B1_GAIN - [15:11] */
 
#define ARIZONA_EQ4_B1_GAIN_SHIFT   11 /* EQ4_B1_GAIN - [15:11] */
 
#define ARIZONA_EQ4_B1_GAIN_WIDTH   5 /* EQ4_B1_GAIN - [15:11] */
 
#define ARIZONA_EQ4_B2_GAIN_MASK   0x07C0 /* EQ4_B2_GAIN - [10:6] */
 
#define ARIZONA_EQ4_B2_GAIN_SHIFT   6 /* EQ4_B2_GAIN - [10:6] */
 
#define ARIZONA_EQ4_B2_GAIN_WIDTH   5 /* EQ4_B2_GAIN - [10:6] */
 
#define ARIZONA_EQ4_B3_GAIN_MASK   0x003E /* EQ4_B3_GAIN - [5:1] */
 
#define ARIZONA_EQ4_B3_GAIN_SHIFT   1 /* EQ4_B3_GAIN - [5:1] */
 
#define ARIZONA_EQ4_B3_GAIN_WIDTH   5 /* EQ4_B3_GAIN - [5:1] */
 
#define ARIZONA_EQ4_ENA   0x0001 /* EQ4_ENA */
 
#define ARIZONA_EQ4_ENA_MASK   0x0001 /* EQ4_ENA */
 
#define ARIZONA_EQ4_ENA_SHIFT   0 /* EQ4_ENA */
 
#define ARIZONA_EQ4_ENA_WIDTH   1 /* EQ4_ENA */
 
#define ARIZONA_EQ4_B4_GAIN_MASK   0xF800 /* EQ4_B4_GAIN - [15:11] */
 
#define ARIZONA_EQ4_B4_GAIN_SHIFT   11 /* EQ4_B4_GAIN - [15:11] */
 
#define ARIZONA_EQ4_B4_GAIN_WIDTH   5 /* EQ4_B4_GAIN - [15:11] */
 
#define ARIZONA_EQ4_B5_GAIN_MASK   0x07C0 /* EQ4_B5_GAIN - [10:6] */
 
#define ARIZONA_EQ4_B5_GAIN_SHIFT   6 /* EQ4_B5_GAIN - [10:6] */
 
#define ARIZONA_EQ4_B5_GAIN_WIDTH   5 /* EQ4_B5_GAIN - [10:6] */
 
#define ARIZONA_EQ4_B1_MODE   0x0001 /* EQ4_B1_MODE */
 
#define ARIZONA_EQ4_B1_MODE_MASK   0x0001 /* EQ4_B1_MODE */
 
#define ARIZONA_EQ4_B1_MODE_SHIFT   0 /* EQ4_B1_MODE */
 
#define ARIZONA_EQ4_B1_MODE_WIDTH   1 /* EQ4_B1_MODE */
 
#define ARIZONA_EQ4_B1_A_MASK   0xFFFF /* EQ4_B1_A - [15:0] */
 
#define ARIZONA_EQ4_B1_A_SHIFT   0 /* EQ4_B1_A - [15:0] */
 
#define ARIZONA_EQ4_B1_A_WIDTH   16 /* EQ4_B1_A - [15:0] */
 
#define ARIZONA_EQ4_B1_B_MASK   0xFFFF /* EQ4_B1_B - [15:0] */
 
#define ARIZONA_EQ4_B1_B_SHIFT   0 /* EQ4_B1_B - [15:0] */
 
#define ARIZONA_EQ4_B1_B_WIDTH   16 /* EQ4_B1_B - [15:0] */
 
#define ARIZONA_EQ4_B1_PG_MASK   0xFFFF /* EQ4_B1_PG - [15:0] */
 
#define ARIZONA_EQ4_B1_PG_SHIFT   0 /* EQ4_B1_PG - [15:0] */
 
#define ARIZONA_EQ4_B1_PG_WIDTH   16 /* EQ4_B1_PG - [15:0] */
 
#define ARIZONA_EQ4_B2_A_MASK   0xFFFF /* EQ4_B2_A - [15:0] */
 
#define ARIZONA_EQ4_B2_A_SHIFT   0 /* EQ4_B2_A - [15:0] */
 
#define ARIZONA_EQ4_B2_A_WIDTH   16 /* EQ4_B2_A - [15:0] */
 
#define ARIZONA_EQ4_B2_B_MASK   0xFFFF /* EQ4_B2_B - [15:0] */
 
#define ARIZONA_EQ4_B2_B_SHIFT   0 /* EQ4_B2_B - [15:0] */
 
#define ARIZONA_EQ4_B2_B_WIDTH   16 /* EQ4_B2_B - [15:0] */
 
#define ARIZONA_EQ4_B2_C_MASK   0xFFFF /* EQ4_B2_C - [15:0] */
 
#define ARIZONA_EQ4_B2_C_SHIFT   0 /* EQ4_B2_C - [15:0] */
 
#define ARIZONA_EQ4_B2_C_WIDTH   16 /* EQ4_B2_C - [15:0] */
 
#define ARIZONA_EQ4_B2_PG_MASK   0xFFFF /* EQ4_B2_PG - [15:0] */
 
#define ARIZONA_EQ4_B2_PG_SHIFT   0 /* EQ4_B2_PG - [15:0] */
 
#define ARIZONA_EQ4_B2_PG_WIDTH   16 /* EQ4_B2_PG - [15:0] */
 
#define ARIZONA_EQ4_B3_A_MASK   0xFFFF /* EQ4_B3_A - [15:0] */
 
#define ARIZONA_EQ4_B3_A_SHIFT   0 /* EQ4_B3_A - [15:0] */
 
#define ARIZONA_EQ4_B3_A_WIDTH   16 /* EQ4_B3_A - [15:0] */
 
#define ARIZONA_EQ4_B3_B_MASK   0xFFFF /* EQ4_B3_B - [15:0] */
 
#define ARIZONA_EQ4_B3_B_SHIFT   0 /* EQ4_B3_B - [15:0] */
 
#define ARIZONA_EQ4_B3_B_WIDTH   16 /* EQ4_B3_B - [15:0] */
 
#define ARIZONA_EQ4_B3_C_MASK   0xFFFF /* EQ4_B3_C - [15:0] */
 
#define ARIZONA_EQ4_B3_C_SHIFT   0 /* EQ4_B3_C - [15:0] */
 
#define ARIZONA_EQ4_B3_C_WIDTH   16 /* EQ4_B3_C - [15:0] */
 
#define ARIZONA_EQ4_B3_PG_MASK   0xFFFF /* EQ4_B3_PG - [15:0] */
 
#define ARIZONA_EQ4_B3_PG_SHIFT   0 /* EQ4_B3_PG - [15:0] */
 
#define ARIZONA_EQ4_B3_PG_WIDTH   16 /* EQ4_B3_PG - [15:0] */
 
#define ARIZONA_EQ4_B4_A_MASK   0xFFFF /* EQ4_B4_A - [15:0] */
 
#define ARIZONA_EQ4_B4_A_SHIFT   0 /* EQ4_B4_A - [15:0] */
 
#define ARIZONA_EQ4_B4_A_WIDTH   16 /* EQ4_B4_A - [15:0] */
 
#define ARIZONA_EQ4_B4_B_MASK   0xFFFF /* EQ4_B4_B - [15:0] */
 
#define ARIZONA_EQ4_B4_B_SHIFT   0 /* EQ4_B4_B - [15:0] */
 
#define ARIZONA_EQ4_B4_B_WIDTH   16 /* EQ4_B4_B - [15:0] */
 
#define ARIZONA_EQ4_B4_C_MASK   0xFFFF /* EQ4_B4_C - [15:0] */
 
#define ARIZONA_EQ4_B4_C_SHIFT   0 /* EQ4_B4_C - [15:0] */
 
#define ARIZONA_EQ4_B4_C_WIDTH   16 /* EQ4_B4_C - [15:0] */
 
#define ARIZONA_EQ4_B4_PG_MASK   0xFFFF /* EQ4_B4_PG - [15:0] */
 
#define ARIZONA_EQ4_B4_PG_SHIFT   0 /* EQ4_B4_PG - [15:0] */
 
#define ARIZONA_EQ4_B4_PG_WIDTH   16 /* EQ4_B4_PG - [15:0] */
 
#define ARIZONA_EQ4_B5_A_MASK   0xFFFF /* EQ4_B5_A - [15:0] */
 
#define ARIZONA_EQ4_B5_A_SHIFT   0 /* EQ4_B5_A - [15:0] */
 
#define ARIZONA_EQ4_B5_A_WIDTH   16 /* EQ4_B5_A - [15:0] */
 
#define ARIZONA_EQ4_B5_B_MASK   0xFFFF /* EQ4_B5_B - [15:0] */
 
#define ARIZONA_EQ4_B5_B_SHIFT   0 /* EQ4_B5_B - [15:0] */
 
#define ARIZONA_EQ4_B5_B_WIDTH   16 /* EQ4_B5_B - [15:0] */
 
#define ARIZONA_EQ4_B5_PG_MASK   0xFFFF /* EQ4_B5_PG - [15:0] */
 
#define ARIZONA_EQ4_B5_PG_SHIFT   0 /* EQ4_B5_PG - [15:0] */
 
#define ARIZONA_EQ4_B5_PG_WIDTH   16 /* EQ4_B5_PG - [15:0] */
 
#define ARIZONA_EQ4_B1_C_MASK   0xFFFF /* EQ4_B1_C - [15:0] */
 
#define ARIZONA_EQ4_B1_C_SHIFT   0 /* EQ4_B1_C - [15:0] */
 
#define ARIZONA_EQ4_B1_C_WIDTH   16 /* EQ4_B1_C - [15:0] */
 
#define ARIZONA_DRC1_SIG_DET_RMS_MASK   0xF800 /* DRC1_SIG_DET_RMS - [15:11] */
 
#define ARIZONA_DRC1_SIG_DET_RMS_SHIFT   11 /* DRC1_SIG_DET_RMS - [15:11] */
 
#define ARIZONA_DRC1_SIG_DET_RMS_WIDTH   5 /* DRC1_SIG_DET_RMS - [15:11] */
 
#define ARIZONA_DRC1_SIG_DET_PK_MASK   0x0600 /* DRC1_SIG_DET_PK - [10:9] */
 
#define ARIZONA_DRC1_SIG_DET_PK_SHIFT   9 /* DRC1_SIG_DET_PK - [10:9] */
 
#define ARIZONA_DRC1_SIG_DET_PK_WIDTH   2 /* DRC1_SIG_DET_PK - [10:9] */
 
#define ARIZONA_DRC1_NG_ENA   0x0100 /* DRC1_NG_ENA */
 
#define ARIZONA_DRC1_NG_ENA_MASK   0x0100 /* DRC1_NG_ENA */
 
#define ARIZONA_DRC1_NG_ENA_SHIFT   8 /* DRC1_NG_ENA */
 
#define ARIZONA_DRC1_NG_ENA_WIDTH   1 /* DRC1_NG_ENA */
 
#define ARIZONA_DRC1_SIG_DET_MODE   0x0080 /* DRC1_SIG_DET_MODE */
 
#define ARIZONA_DRC1_SIG_DET_MODE_MASK   0x0080 /* DRC1_SIG_DET_MODE */
 
#define ARIZONA_DRC1_SIG_DET_MODE_SHIFT   7 /* DRC1_SIG_DET_MODE */
 
#define ARIZONA_DRC1_SIG_DET_MODE_WIDTH   1 /* DRC1_SIG_DET_MODE */
 
#define ARIZONA_DRC1_SIG_DET   0x0040 /* DRC1_SIG_DET */
 
#define ARIZONA_DRC1_SIG_DET_MASK   0x0040 /* DRC1_SIG_DET */
 
#define ARIZONA_DRC1_SIG_DET_SHIFT   6 /* DRC1_SIG_DET */
 
#define ARIZONA_DRC1_SIG_DET_WIDTH   1 /* DRC1_SIG_DET */
 
#define ARIZONA_DRC1_KNEE2_OP_ENA   0x0020 /* DRC1_KNEE2_OP_ENA */
 
#define ARIZONA_DRC1_KNEE2_OP_ENA_MASK   0x0020 /* DRC1_KNEE2_OP_ENA */
 
#define ARIZONA_DRC1_KNEE2_OP_ENA_SHIFT   5 /* DRC1_KNEE2_OP_ENA */
 
#define ARIZONA_DRC1_KNEE2_OP_ENA_WIDTH   1 /* DRC1_KNEE2_OP_ENA */
 
#define ARIZONA_DRC1_QR   0x0010 /* DRC1_QR */
 
#define ARIZONA_DRC1_QR_MASK   0x0010 /* DRC1_QR */
 
#define ARIZONA_DRC1_QR_SHIFT   4 /* DRC1_QR */
 
#define ARIZONA_DRC1_QR_WIDTH   1 /* DRC1_QR */
 
#define ARIZONA_DRC1_ANTICLIP   0x0008 /* DRC1_ANTICLIP */
 
#define ARIZONA_DRC1_ANTICLIP_MASK   0x0008 /* DRC1_ANTICLIP */
 
#define ARIZONA_DRC1_ANTICLIP_SHIFT   3 /* DRC1_ANTICLIP */
 
#define ARIZONA_DRC1_ANTICLIP_WIDTH   1 /* DRC1_ANTICLIP */
 
#define ARIZONA_DRC1L_ENA   0x0002 /* DRC1L_ENA */
 
#define ARIZONA_DRC1L_ENA_MASK   0x0002 /* DRC1L_ENA */
 
#define ARIZONA_DRC1L_ENA_SHIFT   1 /* DRC1L_ENA */
 
#define ARIZONA_DRC1L_ENA_WIDTH   1 /* DRC1L_ENA */
 
#define ARIZONA_DRC1R_ENA   0x0001 /* DRC1R_ENA */
 
#define ARIZONA_DRC1R_ENA_MASK   0x0001 /* DRC1R_ENA */
 
#define ARIZONA_DRC1R_ENA_SHIFT   0 /* DRC1R_ENA */
 
#define ARIZONA_DRC1R_ENA_WIDTH   1 /* DRC1R_ENA */
 
#define ARIZONA_DRC1_ATK_MASK   0x1E00 /* DRC1_ATK - [12:9] */
 
#define ARIZONA_DRC1_ATK_SHIFT   9 /* DRC1_ATK - [12:9] */
 
#define ARIZONA_DRC1_ATK_WIDTH   4 /* DRC1_ATK - [12:9] */
 
#define ARIZONA_DRC1_DCY_MASK   0x01E0 /* DRC1_DCY - [8:5] */
 
#define ARIZONA_DRC1_DCY_SHIFT   5 /* DRC1_DCY - [8:5] */
 
#define ARIZONA_DRC1_DCY_WIDTH   4 /* DRC1_DCY - [8:5] */
 
#define ARIZONA_DRC1_MINGAIN_MASK   0x001C /* DRC1_MINGAIN - [4:2] */
 
#define ARIZONA_DRC1_MINGAIN_SHIFT   2 /* DRC1_MINGAIN - [4:2] */
 
#define ARIZONA_DRC1_MINGAIN_WIDTH   3 /* DRC1_MINGAIN - [4:2] */
 
#define ARIZONA_DRC1_MAXGAIN_MASK   0x0003 /* DRC1_MAXGAIN - [1:0] */
 
#define ARIZONA_DRC1_MAXGAIN_SHIFT   0 /* DRC1_MAXGAIN - [1:0] */
 
#define ARIZONA_DRC1_MAXGAIN_WIDTH   2 /* DRC1_MAXGAIN - [1:0] */
 
#define ARIZONA_DRC1_NG_MINGAIN_MASK   0xF000 /* DRC1_NG_MINGAIN - [15:12] */
 
#define ARIZONA_DRC1_NG_MINGAIN_SHIFT   12 /* DRC1_NG_MINGAIN - [15:12] */
 
#define ARIZONA_DRC1_NG_MINGAIN_WIDTH   4 /* DRC1_NG_MINGAIN - [15:12] */
 
#define ARIZONA_DRC1_NG_EXP_MASK   0x0C00 /* DRC1_NG_EXP - [11:10] */
 
#define ARIZONA_DRC1_NG_EXP_SHIFT   10 /* DRC1_NG_EXP - [11:10] */
 
#define ARIZONA_DRC1_NG_EXP_WIDTH   2 /* DRC1_NG_EXP - [11:10] */
 
#define ARIZONA_DRC1_QR_THR_MASK   0x0300 /* DRC1_QR_THR - [9:8] */
 
#define ARIZONA_DRC1_QR_THR_SHIFT   8 /* DRC1_QR_THR - [9:8] */
 
#define ARIZONA_DRC1_QR_THR_WIDTH   2 /* DRC1_QR_THR - [9:8] */
 
#define ARIZONA_DRC1_QR_DCY_MASK   0x00C0 /* DRC1_QR_DCY - [7:6] */
 
#define ARIZONA_DRC1_QR_DCY_SHIFT   6 /* DRC1_QR_DCY - [7:6] */
 
#define ARIZONA_DRC1_QR_DCY_WIDTH   2 /* DRC1_QR_DCY - [7:6] */
 
#define ARIZONA_DRC1_HI_COMP_MASK   0x0038 /* DRC1_HI_COMP - [5:3] */
 
#define ARIZONA_DRC1_HI_COMP_SHIFT   3 /* DRC1_HI_COMP - [5:3] */
 
#define ARIZONA_DRC1_HI_COMP_WIDTH   3 /* DRC1_HI_COMP - [5:3] */
 
#define ARIZONA_DRC1_LO_COMP_MASK   0x0007 /* DRC1_LO_COMP - [2:0] */
 
#define ARIZONA_DRC1_LO_COMP_SHIFT   0 /* DRC1_LO_COMP - [2:0] */
 
#define ARIZONA_DRC1_LO_COMP_WIDTH   3 /* DRC1_LO_COMP - [2:0] */
 
#define ARIZONA_DRC1_KNEE_IP_MASK   0x07E0 /* DRC1_KNEE_IP - [10:5] */
 
#define ARIZONA_DRC1_KNEE_IP_SHIFT   5 /* DRC1_KNEE_IP - [10:5] */
 
#define ARIZONA_DRC1_KNEE_IP_WIDTH   6 /* DRC1_KNEE_IP - [10:5] */
 
#define ARIZONA_DRC1_KNEE_OP_MASK   0x001F /* DRC1_KNEE_OP - [4:0] */
 
#define ARIZONA_DRC1_KNEE_OP_SHIFT   0 /* DRC1_KNEE_OP - [4:0] */
 
#define ARIZONA_DRC1_KNEE_OP_WIDTH   5 /* DRC1_KNEE_OP - [4:0] */
 
#define ARIZONA_DRC1_KNEE2_IP_MASK   0x03E0 /* DRC1_KNEE2_IP - [9:5] */
 
#define ARIZONA_DRC1_KNEE2_IP_SHIFT   5 /* DRC1_KNEE2_IP - [9:5] */
 
#define ARIZONA_DRC1_KNEE2_IP_WIDTH   5 /* DRC1_KNEE2_IP - [9:5] */
 
#define ARIZONA_DRC1_KNEE2_OP_MASK   0x001F /* DRC1_KNEE2_OP - [4:0] */
 
#define ARIZONA_DRC1_KNEE2_OP_SHIFT   0 /* DRC1_KNEE2_OP - [4:0] */
 
#define ARIZONA_DRC1_KNEE2_OP_WIDTH   5 /* DRC1_KNEE2_OP - [4:0] */
 
#define ARIZONA_DRC2_SIG_DET_RMS_MASK   0xF800 /* DRC2_SIG_DET_RMS - [15:11] */
 
#define ARIZONA_DRC2_SIG_DET_RMS_SHIFT   11 /* DRC2_SIG_DET_RMS - [15:11] */
 
#define ARIZONA_DRC2_SIG_DET_RMS_WIDTH   5 /* DRC2_SIG_DET_RMS - [15:11] */
 
#define ARIZONA_DRC2_SIG_DET_PK_MASK   0x0600 /* DRC2_SIG_DET_PK - [10:9] */
 
#define ARIZONA_DRC2_SIG_DET_PK_SHIFT   9 /* DRC2_SIG_DET_PK - [10:9] */
 
#define ARIZONA_DRC2_SIG_DET_PK_WIDTH   2 /* DRC2_SIG_DET_PK - [10:9] */
 
#define ARIZONA_DRC2_NG_ENA   0x0100 /* DRC2_NG_ENA */
 
#define ARIZONA_DRC2_NG_ENA_MASK   0x0100 /* DRC2_NG_ENA */
 
#define ARIZONA_DRC2_NG_ENA_SHIFT   8 /* DRC2_NG_ENA */
 
#define ARIZONA_DRC2_NG_ENA_WIDTH   1 /* DRC2_NG_ENA */
 
#define ARIZONA_DRC2_SIG_DET_MODE   0x0080 /* DRC2_SIG_DET_MODE */
 
#define ARIZONA_DRC2_SIG_DET_MODE_MASK   0x0080 /* DRC2_SIG_DET_MODE */
 
#define ARIZONA_DRC2_SIG_DET_MODE_SHIFT   7 /* DRC2_SIG_DET_MODE */
 
#define ARIZONA_DRC2_SIG_DET_MODE_WIDTH   1 /* DRC2_SIG_DET_MODE */
 
#define ARIZONA_DRC2_SIG_DET   0x0040 /* DRC2_SIG_DET */
 
#define ARIZONA_DRC2_SIG_DET_MASK   0x0040 /* DRC2_SIG_DET */
 
#define ARIZONA_DRC2_SIG_DET_SHIFT   6 /* DRC2_SIG_DET */
 
#define ARIZONA_DRC2_SIG_DET_WIDTH   1 /* DRC2_SIG_DET */
 
#define ARIZONA_DRC2_KNEE2_OP_ENA   0x0020 /* DRC2_KNEE2_OP_ENA */
 
#define ARIZONA_DRC2_KNEE2_OP_ENA_MASK   0x0020 /* DRC2_KNEE2_OP_ENA */
 
#define ARIZONA_DRC2_KNEE2_OP_ENA_SHIFT   5 /* DRC2_KNEE2_OP_ENA */
 
#define ARIZONA_DRC2_KNEE2_OP_ENA_WIDTH   1 /* DRC2_KNEE2_OP_ENA */
 
#define ARIZONA_DRC2_QR   0x0010 /* DRC2_QR */
 
#define ARIZONA_DRC2_QR_MASK   0x0010 /* DRC2_QR */
 
#define ARIZONA_DRC2_QR_SHIFT   4 /* DRC2_QR */
 
#define ARIZONA_DRC2_QR_WIDTH   1 /* DRC2_QR */
 
#define ARIZONA_DRC2_ANTICLIP   0x0008 /* DRC2_ANTICLIP */
 
#define ARIZONA_DRC2_ANTICLIP_MASK   0x0008 /* DRC2_ANTICLIP */
 
#define ARIZONA_DRC2_ANTICLIP_SHIFT   3 /* DRC2_ANTICLIP */
 
#define ARIZONA_DRC2_ANTICLIP_WIDTH   1 /* DRC2_ANTICLIP */
 
#define ARIZONA_DRC2L_ENA   0x0002 /* DRC2L_ENA */
 
#define ARIZONA_DRC2L_ENA_MASK   0x0002 /* DRC2L_ENA */
 
#define ARIZONA_DRC2L_ENA_SHIFT   1 /* DRC2L_ENA */
 
#define ARIZONA_DRC2L_ENA_WIDTH   1 /* DRC2L_ENA */
 
#define ARIZONA_DRC2R_ENA   0x0001 /* DRC2R_ENA */
 
#define ARIZONA_DRC2R_ENA_MASK   0x0001 /* DRC2R_ENA */
 
#define ARIZONA_DRC2R_ENA_SHIFT   0 /* DRC2R_ENA */
 
#define ARIZONA_DRC2R_ENA_WIDTH   1 /* DRC2R_ENA */
 
#define ARIZONA_DRC2_ATK_MASK   0x1E00 /* DRC2_ATK - [12:9] */
 
#define ARIZONA_DRC2_ATK_SHIFT   9 /* DRC2_ATK - [12:9] */
 
#define ARIZONA_DRC2_ATK_WIDTH   4 /* DRC2_ATK - [12:9] */
 
#define ARIZONA_DRC2_DCY_MASK   0x01E0 /* DRC2_DCY - [8:5] */
 
#define ARIZONA_DRC2_DCY_SHIFT   5 /* DRC2_DCY - [8:5] */
 
#define ARIZONA_DRC2_DCY_WIDTH   4 /* DRC2_DCY - [8:5] */
 
#define ARIZONA_DRC2_MINGAIN_MASK   0x001C /* DRC2_MINGAIN - [4:2] */
 
#define ARIZONA_DRC2_MINGAIN_SHIFT   2 /* DRC2_MINGAIN - [4:2] */
 
#define ARIZONA_DRC2_MINGAIN_WIDTH   3 /* DRC2_MINGAIN - [4:2] */
 
#define ARIZONA_DRC2_MAXGAIN_MASK   0x0003 /* DRC2_MAXGAIN - [1:0] */
 
#define ARIZONA_DRC2_MAXGAIN_SHIFT   0 /* DRC2_MAXGAIN - [1:0] */
 
#define ARIZONA_DRC2_MAXGAIN_WIDTH   2 /* DRC2_MAXGAIN - [1:0] */
 
#define ARIZONA_DRC2_NG_MINGAIN_MASK   0xF000 /* DRC2_NG_MINGAIN - [15:12] */
 
#define ARIZONA_DRC2_NG_MINGAIN_SHIFT   12 /* DRC2_NG_MINGAIN - [15:12] */
 
#define ARIZONA_DRC2_NG_MINGAIN_WIDTH   4 /* DRC2_NG_MINGAIN - [15:12] */
 
#define ARIZONA_DRC2_NG_EXP_MASK   0x0C00 /* DRC2_NG_EXP - [11:10] */
 
#define ARIZONA_DRC2_NG_EXP_SHIFT   10 /* DRC2_NG_EXP - [11:10] */
 
#define ARIZONA_DRC2_NG_EXP_WIDTH   2 /* DRC2_NG_EXP - [11:10] */
 
#define ARIZONA_DRC2_QR_THR_MASK   0x0300 /* DRC2_QR_THR - [9:8] */
 
#define ARIZONA_DRC2_QR_THR_SHIFT   8 /* DRC2_QR_THR - [9:8] */
 
#define ARIZONA_DRC2_QR_THR_WIDTH   2 /* DRC2_QR_THR - [9:8] */
 
#define ARIZONA_DRC2_QR_DCY_MASK   0x00C0 /* DRC2_QR_DCY - [7:6] */
 
#define ARIZONA_DRC2_QR_DCY_SHIFT   6 /* DRC2_QR_DCY - [7:6] */
 
#define ARIZONA_DRC2_QR_DCY_WIDTH   2 /* DRC2_QR_DCY - [7:6] */
 
#define ARIZONA_DRC2_HI_COMP_MASK   0x0038 /* DRC2_HI_COMP - [5:3] */
 
#define ARIZONA_DRC2_HI_COMP_SHIFT   3 /* DRC2_HI_COMP - [5:3] */
 
#define ARIZONA_DRC2_HI_COMP_WIDTH   3 /* DRC2_HI_COMP - [5:3] */
 
#define ARIZONA_DRC2_LO_COMP_MASK   0x0007 /* DRC2_LO_COMP - [2:0] */
 
#define ARIZONA_DRC2_LO_COMP_SHIFT   0 /* DRC2_LO_COMP - [2:0] */
 
#define ARIZONA_DRC2_LO_COMP_WIDTH   3 /* DRC2_LO_COMP - [2:0] */
 
#define ARIZONA_DRC2_KNEE_IP_MASK   0x07E0 /* DRC2_KNEE_IP - [10:5] */
 
#define ARIZONA_DRC2_KNEE_IP_SHIFT   5 /* DRC2_KNEE_IP - [10:5] */
 
#define ARIZONA_DRC2_KNEE_IP_WIDTH   6 /* DRC2_KNEE_IP - [10:5] */
 
#define ARIZONA_DRC2_KNEE_OP_MASK   0x001F /* DRC2_KNEE_OP - [4:0] */
 
#define ARIZONA_DRC2_KNEE_OP_SHIFT   0 /* DRC2_KNEE_OP - [4:0] */
 
#define ARIZONA_DRC2_KNEE_OP_WIDTH   5 /* DRC2_KNEE_OP - [4:0] */
 
#define ARIZONA_DRC2_KNEE2_IP_MASK   0x03E0 /* DRC2_KNEE2_IP - [9:5] */
 
#define ARIZONA_DRC2_KNEE2_IP_SHIFT   5 /* DRC2_KNEE2_IP - [9:5] */
 
#define ARIZONA_DRC2_KNEE2_IP_WIDTH   5 /* DRC2_KNEE2_IP - [9:5] */
 
#define ARIZONA_DRC2_KNEE2_OP_MASK   0x001F /* DRC2_KNEE2_OP - [4:0] */
 
#define ARIZONA_DRC2_KNEE2_OP_SHIFT   0 /* DRC2_KNEE2_OP - [4:0] */
 
#define ARIZONA_DRC2_KNEE2_OP_WIDTH   5 /* DRC2_KNEE2_OP - [4:0] */
 
#define ARIZONA_LHPF1_MODE   0x0002 /* LHPF1_MODE */
 
#define ARIZONA_LHPF1_MODE_MASK   0x0002 /* LHPF1_MODE */
 
#define ARIZONA_LHPF1_MODE_SHIFT   1 /* LHPF1_MODE */
 
#define ARIZONA_LHPF1_MODE_WIDTH   1 /* LHPF1_MODE */
 
#define ARIZONA_LHPF1_ENA   0x0001 /* LHPF1_ENA */
 
#define ARIZONA_LHPF1_ENA_MASK   0x0001 /* LHPF1_ENA */
 
#define ARIZONA_LHPF1_ENA_SHIFT   0 /* LHPF1_ENA */
 
#define ARIZONA_LHPF1_ENA_WIDTH   1 /* LHPF1_ENA */
 
#define ARIZONA_LHPF1_COEFF_MASK   0xFFFF /* LHPF1_COEFF - [15:0] */
 
#define ARIZONA_LHPF1_COEFF_SHIFT   0 /* LHPF1_COEFF - [15:0] */
 
#define ARIZONA_LHPF1_COEFF_WIDTH   16 /* LHPF1_COEFF - [15:0] */
 
#define ARIZONA_LHPF2_MODE   0x0002 /* LHPF2_MODE */
 
#define ARIZONA_LHPF2_MODE_MASK   0x0002 /* LHPF2_MODE */
 
#define ARIZONA_LHPF2_MODE_SHIFT   1 /* LHPF2_MODE */
 
#define ARIZONA_LHPF2_MODE_WIDTH   1 /* LHPF2_MODE */
 
#define ARIZONA_LHPF2_ENA   0x0001 /* LHPF2_ENA */
 
#define ARIZONA_LHPF2_ENA_MASK   0x0001 /* LHPF2_ENA */
 
#define ARIZONA_LHPF2_ENA_SHIFT   0 /* LHPF2_ENA */
 
#define ARIZONA_LHPF2_ENA_WIDTH   1 /* LHPF2_ENA */
 
#define ARIZONA_LHPF2_COEFF_MASK   0xFFFF /* LHPF2_COEFF - [15:0] */
 
#define ARIZONA_LHPF2_COEFF_SHIFT   0 /* LHPF2_COEFF - [15:0] */
 
#define ARIZONA_LHPF2_COEFF_WIDTH   16 /* LHPF2_COEFF - [15:0] */
 
#define ARIZONA_LHPF3_MODE   0x0002 /* LHPF3_MODE */
 
#define ARIZONA_LHPF3_MODE_MASK   0x0002 /* LHPF3_MODE */
 
#define ARIZONA_LHPF3_MODE_SHIFT   1 /* LHPF3_MODE */
 
#define ARIZONA_LHPF3_MODE_WIDTH   1 /* LHPF3_MODE */
 
#define ARIZONA_LHPF3_ENA   0x0001 /* LHPF3_ENA */
 
#define ARIZONA_LHPF3_ENA_MASK   0x0001 /* LHPF3_ENA */
 
#define ARIZONA_LHPF3_ENA_SHIFT   0 /* LHPF3_ENA */
 
#define ARIZONA_LHPF3_ENA_WIDTH   1 /* LHPF3_ENA */
 
#define ARIZONA_LHPF3_COEFF_MASK   0xFFFF /* LHPF3_COEFF - [15:0] */
 
#define ARIZONA_LHPF3_COEFF_SHIFT   0 /* LHPF3_COEFF - [15:0] */
 
#define ARIZONA_LHPF3_COEFF_WIDTH   16 /* LHPF3_COEFF - [15:0] */
 
#define ARIZONA_LHPF4_MODE   0x0002 /* LHPF4_MODE */
 
#define ARIZONA_LHPF4_MODE_MASK   0x0002 /* LHPF4_MODE */
 
#define ARIZONA_LHPF4_MODE_SHIFT   1 /* LHPF4_MODE */
 
#define ARIZONA_LHPF4_MODE_WIDTH   1 /* LHPF4_MODE */
 
#define ARIZONA_LHPF4_ENA   0x0001 /* LHPF4_ENA */
 
#define ARIZONA_LHPF4_ENA_MASK   0x0001 /* LHPF4_ENA */
 
#define ARIZONA_LHPF4_ENA_SHIFT   0 /* LHPF4_ENA */
 
#define ARIZONA_LHPF4_ENA_WIDTH   1 /* LHPF4_ENA */
 
#define ARIZONA_LHPF4_COEFF_MASK   0xFFFF /* LHPF4_COEFF - [15:0] */
 
#define ARIZONA_LHPF4_COEFF_SHIFT   0 /* LHPF4_COEFF - [15:0] */
 
#define ARIZONA_LHPF4_COEFF_WIDTH   16 /* LHPF4_COEFF - [15:0] */
 
#define ARIZONA_ASRC2L_ENA   0x0008 /* ASRC2L_ENA */
 
#define ARIZONA_ASRC2L_ENA_MASK   0x0008 /* ASRC2L_ENA */
 
#define ARIZONA_ASRC2L_ENA_SHIFT   3 /* ASRC2L_ENA */
 
#define ARIZONA_ASRC2L_ENA_WIDTH   1 /* ASRC2L_ENA */
 
#define ARIZONA_ASRC2R_ENA   0x0004 /* ASRC2R_ENA */
 
#define ARIZONA_ASRC2R_ENA_MASK   0x0004 /* ASRC2R_ENA */
 
#define ARIZONA_ASRC2R_ENA_SHIFT   2 /* ASRC2R_ENA */
 
#define ARIZONA_ASRC2R_ENA_WIDTH   1 /* ASRC2R_ENA */
 
#define ARIZONA_ASRC1L_ENA   0x0002 /* ASRC1L_ENA */
 
#define ARIZONA_ASRC1L_ENA_MASK   0x0002 /* ASRC1L_ENA */
 
#define ARIZONA_ASRC1L_ENA_SHIFT   1 /* ASRC1L_ENA */
 
#define ARIZONA_ASRC1L_ENA_WIDTH   1 /* ASRC1L_ENA */
 
#define ARIZONA_ASRC1R_ENA   0x0001 /* ASRC1R_ENA */
 
#define ARIZONA_ASRC1R_ENA_MASK   0x0001 /* ASRC1R_ENA */
 
#define ARIZONA_ASRC1R_ENA_SHIFT   0 /* ASRC1R_ENA */
 
#define ARIZONA_ASRC1R_ENA_WIDTH   1 /* ASRC1R_ENA */
 
#define ARIZONA_ASRC_RATE1_MASK   0x7800 /* ASRC_RATE1 - [14:11] */
 
#define ARIZONA_ASRC_RATE1_SHIFT   11 /* ASRC_RATE1 - [14:11] */
 
#define ARIZONA_ASRC_RATE1_WIDTH   4 /* ASRC_RATE1 - [14:11] */
 
#define ARIZONA_ASRC_RATE2_MASK   0x7800 /* ASRC_RATE2 - [14:11] */
 
#define ARIZONA_ASRC_RATE2_SHIFT   11 /* ASRC_RATE2 - [14:11] */
 
#define ARIZONA_ASRC_RATE2_WIDTH   4 /* ASRC_RATE2 - [14:11] */
 
#define ARIZONA_ISRC1_FSH_MASK   0x7800 /* ISRC1_FSH - [14:11] */
 
#define ARIZONA_ISRC1_FSH_SHIFT   11 /* ISRC1_FSH - [14:11] */
 
#define ARIZONA_ISRC1_FSH_WIDTH   4 /* ISRC1_FSH - [14:11] */
 
#define ARIZONA_ISRC1_CLK_SEL_MASK   0x0700 /* ISRC1_CLK_SEL - [10:8] */
 
#define ARIZONA_ISRC1_CLK_SEL_SHIFT   8 /* ISRC1_CLK_SEL - [10:8] */
 
#define ARIZONA_ISRC1_CLK_SEL_WIDTH   3 /* ISRC1_CLK_SEL - [10:8] */
 
#define ARIZONA_ISRC1_FSL_MASK   0x7800 /* ISRC1_FSL - [14:11] */
 
#define ARIZONA_ISRC1_FSL_SHIFT   11 /* ISRC1_FSL - [14:11] */
 
#define ARIZONA_ISRC1_FSL_WIDTH   4 /* ISRC1_FSL - [14:11] */
 
#define ARIZONA_ISRC1_INT0_ENA   0x8000 /* ISRC1_INT0_ENA */
 
#define ARIZONA_ISRC1_INT0_ENA_MASK   0x8000 /* ISRC1_INT0_ENA */
 
#define ARIZONA_ISRC1_INT0_ENA_SHIFT   15 /* ISRC1_INT0_ENA */
 
#define ARIZONA_ISRC1_INT0_ENA_WIDTH   1 /* ISRC1_INT0_ENA */
 
#define ARIZONA_ISRC1_INT1_ENA   0x4000 /* ISRC1_INT1_ENA */
 
#define ARIZONA_ISRC1_INT1_ENA_MASK   0x4000 /* ISRC1_INT1_ENA */
 
#define ARIZONA_ISRC1_INT1_ENA_SHIFT   14 /* ISRC1_INT1_ENA */
 
#define ARIZONA_ISRC1_INT1_ENA_WIDTH   1 /* ISRC1_INT1_ENA */
 
#define ARIZONA_ISRC1_INT2_ENA   0x2000 /* ISRC1_INT2_ENA */
 
#define ARIZONA_ISRC1_INT2_ENA_MASK   0x2000 /* ISRC1_INT2_ENA */
 
#define ARIZONA_ISRC1_INT2_ENA_SHIFT   13 /* ISRC1_INT2_ENA */
 
#define ARIZONA_ISRC1_INT2_ENA_WIDTH   1 /* ISRC1_INT2_ENA */
 
#define ARIZONA_ISRC1_INT3_ENA   0x1000 /* ISRC1_INT3_ENA */
 
#define ARIZONA_ISRC1_INT3_ENA_MASK   0x1000 /* ISRC1_INT3_ENA */
 
#define ARIZONA_ISRC1_INT3_ENA_SHIFT   12 /* ISRC1_INT3_ENA */
 
#define ARIZONA_ISRC1_INT3_ENA_WIDTH   1 /* ISRC1_INT3_ENA */
 
#define ARIZONA_ISRC1_DEC0_ENA   0x0200 /* ISRC1_DEC0_ENA */
 
#define ARIZONA_ISRC1_DEC0_ENA_MASK   0x0200 /* ISRC1_DEC0_ENA */
 
#define ARIZONA_ISRC1_DEC0_ENA_SHIFT   9 /* ISRC1_DEC0_ENA */
 
#define ARIZONA_ISRC1_DEC0_ENA_WIDTH   1 /* ISRC1_DEC0_ENA */
 
#define ARIZONA_ISRC1_DEC1_ENA   0x0100 /* ISRC1_DEC1_ENA */
 
#define ARIZONA_ISRC1_DEC1_ENA_MASK   0x0100 /* ISRC1_DEC1_ENA */
 
#define ARIZONA_ISRC1_DEC1_ENA_SHIFT   8 /* ISRC1_DEC1_ENA */
 
#define ARIZONA_ISRC1_DEC1_ENA_WIDTH   1 /* ISRC1_DEC1_ENA */
 
#define ARIZONA_ISRC1_DEC2_ENA   0x0080 /* ISRC1_DEC2_ENA */
 
#define ARIZONA_ISRC1_DEC2_ENA_MASK   0x0080 /* ISRC1_DEC2_ENA */
 
#define ARIZONA_ISRC1_DEC2_ENA_SHIFT   7 /* ISRC1_DEC2_ENA */
 
#define ARIZONA_ISRC1_DEC2_ENA_WIDTH   1 /* ISRC1_DEC2_ENA */
 
#define ARIZONA_ISRC1_DEC3_ENA   0x0040 /* ISRC1_DEC3_ENA */
 
#define ARIZONA_ISRC1_DEC3_ENA_MASK   0x0040 /* ISRC1_DEC3_ENA */
 
#define ARIZONA_ISRC1_DEC3_ENA_SHIFT   6 /* ISRC1_DEC3_ENA */
 
#define ARIZONA_ISRC1_DEC3_ENA_WIDTH   1 /* ISRC1_DEC3_ENA */
 
#define ARIZONA_ISRC1_NOTCH_ENA   0x0001 /* ISRC1_NOTCH_ENA */
 
#define ARIZONA_ISRC1_NOTCH_ENA_MASK   0x0001 /* ISRC1_NOTCH_ENA */
 
#define ARIZONA_ISRC1_NOTCH_ENA_SHIFT   0 /* ISRC1_NOTCH_ENA */
 
#define ARIZONA_ISRC1_NOTCH_ENA_WIDTH   1 /* ISRC1_NOTCH_ENA */
 
#define ARIZONA_ISRC2_FSH_MASK   0x7800 /* ISRC2_FSH - [14:11] */
 
#define ARIZONA_ISRC2_FSH_SHIFT   11 /* ISRC2_FSH - [14:11] */
 
#define ARIZONA_ISRC2_FSH_WIDTH   4 /* ISRC2_FSH - [14:11] */
 
#define ARIZONA_ISRC2_CLK_SEL_MASK   0x0700 /* ISRC2_CLK_SEL - [10:8] */
 
#define ARIZONA_ISRC2_CLK_SEL_SHIFT   8 /* ISRC2_CLK_SEL - [10:8] */
 
#define ARIZONA_ISRC2_CLK_SEL_WIDTH   3 /* ISRC2_CLK_SEL - [10:8] */
 
#define ARIZONA_ISRC2_FSL_MASK   0x7800 /* ISRC2_FSL - [14:11] */
 
#define ARIZONA_ISRC2_FSL_SHIFT   11 /* ISRC2_FSL - [14:11] */
 
#define ARIZONA_ISRC2_FSL_WIDTH   4 /* ISRC2_FSL - [14:11] */
 
#define ARIZONA_ISRC2_INT0_ENA   0x8000 /* ISRC2_INT0_ENA */
 
#define ARIZONA_ISRC2_INT0_ENA_MASK   0x8000 /* ISRC2_INT0_ENA */
 
#define ARIZONA_ISRC2_INT0_ENA_SHIFT   15 /* ISRC2_INT0_ENA */
 
#define ARIZONA_ISRC2_INT0_ENA_WIDTH   1 /* ISRC2_INT0_ENA */
 
#define ARIZONA_ISRC2_INT1_ENA   0x4000 /* ISRC2_INT1_ENA */
 
#define ARIZONA_ISRC2_INT1_ENA_MASK   0x4000 /* ISRC2_INT1_ENA */
 
#define ARIZONA_ISRC2_INT1_ENA_SHIFT   14 /* ISRC2_INT1_ENA */
 
#define ARIZONA_ISRC2_INT1_ENA_WIDTH   1 /* ISRC2_INT1_ENA */
 
#define ARIZONA_ISRC2_INT2_ENA   0x2000 /* ISRC2_INT2_ENA */
 
#define ARIZONA_ISRC2_INT2_ENA_MASK   0x2000 /* ISRC2_INT2_ENA */
 
#define ARIZONA_ISRC2_INT2_ENA_SHIFT   13 /* ISRC2_INT2_ENA */
 
#define ARIZONA_ISRC2_INT2_ENA_WIDTH   1 /* ISRC2_INT2_ENA */
 
#define ARIZONA_ISRC2_INT3_ENA   0x1000 /* ISRC2_INT3_ENA */
 
#define ARIZONA_ISRC2_INT3_ENA_MASK   0x1000 /* ISRC2_INT3_ENA */
 
#define ARIZONA_ISRC2_INT3_ENA_SHIFT   12 /* ISRC2_INT3_ENA */
 
#define ARIZONA_ISRC2_INT3_ENA_WIDTH   1 /* ISRC2_INT3_ENA */
 
#define ARIZONA_ISRC2_DEC0_ENA   0x0200 /* ISRC2_DEC0_ENA */
 
#define ARIZONA_ISRC2_DEC0_ENA_MASK   0x0200 /* ISRC2_DEC0_ENA */
 
#define ARIZONA_ISRC2_DEC0_ENA_SHIFT   9 /* ISRC2_DEC0_ENA */
 
#define ARIZONA_ISRC2_DEC0_ENA_WIDTH   1 /* ISRC2_DEC0_ENA */
 
#define ARIZONA_ISRC2_DEC1_ENA   0x0100 /* ISRC2_DEC1_ENA */
 
#define ARIZONA_ISRC2_DEC1_ENA_MASK   0x0100 /* ISRC2_DEC1_ENA */
 
#define ARIZONA_ISRC2_DEC1_ENA_SHIFT   8 /* ISRC2_DEC1_ENA */
 
#define ARIZONA_ISRC2_DEC1_ENA_WIDTH   1 /* ISRC2_DEC1_ENA */
 
#define ARIZONA_ISRC2_DEC2_ENA   0x0080 /* ISRC2_DEC2_ENA */
 
#define ARIZONA_ISRC2_DEC2_ENA_MASK   0x0080 /* ISRC2_DEC2_ENA */
 
#define ARIZONA_ISRC2_DEC2_ENA_SHIFT   7 /* ISRC2_DEC2_ENA */
 
#define ARIZONA_ISRC2_DEC2_ENA_WIDTH   1 /* ISRC2_DEC2_ENA */
 
#define ARIZONA_ISRC2_DEC3_ENA   0x0040 /* ISRC2_DEC3_ENA */
 
#define ARIZONA_ISRC2_DEC3_ENA_MASK   0x0040 /* ISRC2_DEC3_ENA */
 
#define ARIZONA_ISRC2_DEC3_ENA_SHIFT   6 /* ISRC2_DEC3_ENA */
 
#define ARIZONA_ISRC2_DEC3_ENA_WIDTH   1 /* ISRC2_DEC3_ENA */
 
#define ARIZONA_ISRC2_NOTCH_ENA   0x0001 /* ISRC2_NOTCH_ENA */
 
#define ARIZONA_ISRC2_NOTCH_ENA_MASK   0x0001 /* ISRC2_NOTCH_ENA */
 
#define ARIZONA_ISRC2_NOTCH_ENA_SHIFT   0 /* ISRC2_NOTCH_ENA */
 
#define ARIZONA_ISRC2_NOTCH_ENA_WIDTH   1 /* ISRC2_NOTCH_ENA */
 
#define ARIZONA_ISRC3_FSH_MASK   0x7800 /* ISRC3_FSH - [14:11] */
 
#define ARIZONA_ISRC3_FSH_SHIFT   11 /* ISRC3_FSH - [14:11] */
 
#define ARIZONA_ISRC3_FSH_WIDTH   4 /* ISRC3_FSH - [14:11] */
 
#define ARIZONA_ISRC3_CLK_SEL_MASK   0x0700 /* ISRC3_CLK_SEL - [10:8] */
 
#define ARIZONA_ISRC3_CLK_SEL_SHIFT   8 /* ISRC3_CLK_SEL - [10:8] */
 
#define ARIZONA_ISRC3_CLK_SEL_WIDTH   3 /* ISRC3_CLK_SEL - [10:8] */
 
#define ARIZONA_ISRC3_FSL_MASK   0x7800 /* ISRC3_FSL - [14:11] */
 
#define ARIZONA_ISRC3_FSL_SHIFT   11 /* ISRC3_FSL - [14:11] */
 
#define ARIZONA_ISRC3_FSL_WIDTH   4 /* ISRC3_FSL - [14:11] */
 
#define ARIZONA_ISRC3_INT0_ENA   0x8000 /* ISRC3_INT0_ENA */
 
#define ARIZONA_ISRC3_INT0_ENA_MASK   0x8000 /* ISRC3_INT0_ENA */
 
#define ARIZONA_ISRC3_INT0_ENA_SHIFT   15 /* ISRC3_INT0_ENA */
 
#define ARIZONA_ISRC3_INT0_ENA_WIDTH   1 /* ISRC3_INT0_ENA */
 
#define ARIZONA_ISRC3_INT1_ENA   0x4000 /* ISRC3_INT1_ENA */
 
#define ARIZONA_ISRC3_INT1_ENA_MASK   0x4000 /* ISRC3_INT1_ENA */
 
#define ARIZONA_ISRC3_INT1_ENA_SHIFT   14 /* ISRC3_INT1_ENA */
 
#define ARIZONA_ISRC3_INT1_ENA_WIDTH   1 /* ISRC3_INT1_ENA */
 
#define ARIZONA_ISRC3_INT2_ENA   0x2000 /* ISRC3_INT2_ENA */
 
#define ARIZONA_ISRC3_INT2_ENA_MASK   0x2000 /* ISRC3_INT2_ENA */
 
#define ARIZONA_ISRC3_INT2_ENA_SHIFT   13 /* ISRC3_INT2_ENA */
 
#define ARIZONA_ISRC3_INT2_ENA_WIDTH   1 /* ISRC3_INT2_ENA */
 
#define ARIZONA_ISRC3_INT3_ENA   0x1000 /* ISRC3_INT3_ENA */
 
#define ARIZONA_ISRC3_INT3_ENA_MASK   0x1000 /* ISRC3_INT3_ENA */
 
#define ARIZONA_ISRC3_INT3_ENA_SHIFT   12 /* ISRC3_INT3_ENA */
 
#define ARIZONA_ISRC3_INT3_ENA_WIDTH   1 /* ISRC3_INT3_ENA */
 
#define ARIZONA_ISRC3_DEC0_ENA   0x0200 /* ISRC3_DEC0_ENA */
 
#define ARIZONA_ISRC3_DEC0_ENA_MASK   0x0200 /* ISRC3_DEC0_ENA */
 
#define ARIZONA_ISRC3_DEC0_ENA_SHIFT   9 /* ISRC3_DEC0_ENA */
 
#define ARIZONA_ISRC3_DEC0_ENA_WIDTH   1 /* ISRC3_DEC0_ENA */
 
#define ARIZONA_ISRC3_DEC1_ENA   0x0100 /* ISRC3_DEC1_ENA */
 
#define ARIZONA_ISRC3_DEC1_ENA_MASK   0x0100 /* ISRC3_DEC1_ENA */
 
#define ARIZONA_ISRC3_DEC1_ENA_SHIFT   8 /* ISRC3_DEC1_ENA */
 
#define ARIZONA_ISRC3_DEC1_ENA_WIDTH   1 /* ISRC3_DEC1_ENA */
 
#define ARIZONA_ISRC3_DEC2_ENA   0x0080 /* ISRC3_DEC2_ENA */
 
#define ARIZONA_ISRC3_DEC2_ENA_MASK   0x0080 /* ISRC3_DEC2_ENA */
 
#define ARIZONA_ISRC3_DEC2_ENA_SHIFT   7 /* ISRC3_DEC2_ENA */
 
#define ARIZONA_ISRC3_DEC2_ENA_WIDTH   1 /* ISRC3_DEC2_ENA */
 
#define ARIZONA_ISRC3_DEC3_ENA   0x0040 /* ISRC3_DEC3_ENA */
 
#define ARIZONA_ISRC3_DEC3_ENA_MASK   0x0040 /* ISRC3_DEC3_ENA */
 
#define ARIZONA_ISRC3_DEC3_ENA_SHIFT   6 /* ISRC3_DEC3_ENA */
 
#define ARIZONA_ISRC3_DEC3_ENA_WIDTH   1 /* ISRC3_DEC3_ENA */
 
#define ARIZONA_ISRC3_NOTCH_ENA   0x0001 /* ISRC3_NOTCH_ENA */
 
#define ARIZONA_ISRC3_NOTCH_ENA_MASK   0x0001 /* ISRC3_NOTCH_ENA */
 
#define ARIZONA_ISRC3_NOTCH_ENA_SHIFT   0 /* ISRC3_NOTCH_ENA */
 
#define ARIZONA_ISRC3_NOTCH_ENA_WIDTH   1 /* ISRC3_NOTCH_ENA */
 
#define ARIZONA_DSP1_RATE_MASK   0x7800 /* DSP1_RATE - [14:11] */
 
#define ARIZONA_DSP1_RATE_SHIFT   11 /* DSP1_RATE - [14:11] */
 
#define ARIZONA_DSP1_RATE_WIDTH   4 /* DSP1_RATE - [14:11] */
 
#define ARIZONA_DSP1_MEM_ENA   0x0010 /* DSP1_MEM_ENA */
 
#define ARIZONA_DSP1_MEM_ENA_MASK   0x0010 /* DSP1_MEM_ENA */
 
#define ARIZONA_DSP1_MEM_ENA_SHIFT   4 /* DSP1_MEM_ENA */
 
#define ARIZONA_DSP1_MEM_ENA_WIDTH   1 /* DSP1_MEM_ENA */
 
#define ARIZONA_DSP1_SYS_ENA   0x0004 /* DSP1_SYS_ENA */
 
#define ARIZONA_DSP1_SYS_ENA_MASK   0x0004 /* DSP1_SYS_ENA */
 
#define ARIZONA_DSP1_SYS_ENA_SHIFT   2 /* DSP1_SYS_ENA */
 
#define ARIZONA_DSP1_SYS_ENA_WIDTH   1 /* DSP1_SYS_ENA */
 
#define ARIZONA_DSP1_CORE_ENA   0x0002 /* DSP1_CORE_ENA */
 
#define ARIZONA_DSP1_CORE_ENA_MASK   0x0002 /* DSP1_CORE_ENA */
 
#define ARIZONA_DSP1_CORE_ENA_SHIFT   1 /* DSP1_CORE_ENA */
 
#define ARIZONA_DSP1_CORE_ENA_WIDTH   1 /* DSP1_CORE_ENA */
 
#define ARIZONA_DSP1_START   0x0001 /* DSP1_START */
 
#define ARIZONA_DSP1_START_MASK   0x0001 /* DSP1_START */
 
#define ARIZONA_DSP1_START_SHIFT   0 /* DSP1_START */
 
#define ARIZONA_DSP1_START_WIDTH   1 /* DSP1_START */
 
#define ARIZONA_DSP1_CLK_SEL_MASK   0x0007 /* DSP1_CLK_SEL - [2:0] */
 
#define ARIZONA_DSP1_CLK_SEL_SHIFT   0 /* DSP1_CLK_SEL - [2:0] */
 
#define ARIZONA_DSP1_CLK_SEL_WIDTH   3 /* DSP1_CLK_SEL - [2:0] */
 
#define ARIZONA_DSP1_RAM_RDY   0x0001 /* DSP1_RAM_RDY */
 
#define ARIZONA_DSP1_RAM_RDY_MASK   0x0001 /* DSP1_RAM_RDY */
 
#define ARIZONA_DSP1_RAM_RDY_SHIFT   0 /* DSP1_RAM_RDY */
 
#define ARIZONA_DSP1_RAM_RDY_WIDTH   1 /* DSP1_RAM_RDY */
 
#define ARIZONA_DSP1_PING_FULL   0x8000 /* DSP1_PING_FULL */
 
#define ARIZONA_DSP1_PING_FULL_MASK   0x8000 /* DSP1_PING_FULL */
 
#define ARIZONA_DSP1_PING_FULL_SHIFT   15 /* DSP1_PING_FULL */
 
#define ARIZONA_DSP1_PING_FULL_WIDTH   1 /* DSP1_PING_FULL */
 
#define ARIZONA_DSP1_PONG_FULL   0x4000 /* DSP1_PONG_FULL */
 
#define ARIZONA_DSP1_PONG_FULL_MASK   0x4000 /* DSP1_PONG_FULL */
 
#define ARIZONA_DSP1_PONG_FULL_SHIFT   14 /* DSP1_PONG_FULL */
 
#define ARIZONA_DSP1_PONG_FULL_WIDTH   1 /* DSP1_PONG_FULL */
 
#define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_MASK   0x00FF /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */
 
#define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_SHIFT   0 /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */
 
#define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_WIDTH   8 /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */
 

Macro Definition Documentation

#define ARIZONA_ACCDET_MODE_MASK   0x0003 /* ACCDET_MODE - [1:0] */

Definition at line 2014 of file registers.h.

#define ARIZONA_ACCDET_MODE_SHIFT   0 /* ACCDET_MODE - [1:0] */

Definition at line 2015 of file registers.h.

#define ARIZONA_ACCDET_MODE_WIDTH   2 /* ACCDET_MODE - [1:0] */

Definition at line 2016 of file registers.h.

#define ARIZONA_ACCDET_SRC   0x2000 /* ACCDET_SRC */

Definition at line 2010 of file registers.h.

#define ARIZONA_ACCDET_SRC_MASK   0x2000 /* ACCDET_SRC */

Definition at line 2011 of file registers.h.

#define ARIZONA_ACCDET_SRC_SHIFT   13 /* ACCDET_SRC */

Definition at line 2012 of file registers.h.

#define ARIZONA_ACCDET_SRC_WIDTH   1 /* ACCDET_SRC */

Definition at line 2013 of file registers.h.

#define ARIZONA_ACCESSORY_DETECT_MODE_1   0x293

Definition at line 117 of file registers.h.

#define ARIZONA_ADC_DIGITAL_VOLUME_1L   0x311

Definition at line 131 of file registers.h.

#define ARIZONA_ADC_DIGITAL_VOLUME_1R   0x315

Definition at line 134 of file registers.h.

#define ARIZONA_ADC_DIGITAL_VOLUME_2L   0x319

Definition at line 137 of file registers.h.

#define ARIZONA_ADC_DIGITAL_VOLUME_2R   0x31D

Definition at line 140 of file registers.h.

#define ARIZONA_ADC_DIGITAL_VOLUME_3L   0x321

Definition at line 143 of file registers.h.

#define ARIZONA_ADC_DIGITAL_VOLUME_3R   0x325

Definition at line 146 of file registers.h.

#define ARIZONA_ADC_DIGITAL_VOLUME_4L   0x329

Definition at line 149 of file registers.h.

#define ARIZONA_ADC_DIGITAL_VOLUME_4R   0x32D

Definition at line 151 of file registers.h.

#define ARIZONA_ADC_OVERCLOCKED_STS   0x0100 /* ADC_OVERCLOCKED_STS */

Definition at line 5073 of file registers.h.

#define ARIZONA_ADC_OVERCLOCKED_STS_MASK   0x0100 /* ADC_OVERCLOCKED_STS */

Definition at line 5074 of file registers.h.

#define ARIZONA_ADC_OVERCLOCKED_STS_SHIFT   8 /* ADC_OVERCLOCKED_STS */

Definition at line 5075 of file registers.h.

#define ARIZONA_ADC_OVERCLOCKED_STS_WIDTH   1 /* ADC_OVERCLOCKED_STS */

Definition at line 5076 of file registers.h.

#define ARIZONA_ADC_UNDERCLOCKED_STS   0x0002 /* ADC_UNDERCLOCKED_STS */

Definition at line 5189 of file registers.h.

#define ARIZONA_ADC_UNDERCLOCKED_STS_MASK   0x0002 /* ADC_UNDERCLOCKED_STS */

Definition at line 5190 of file registers.h.

#define ARIZONA_ADC_UNDERCLOCKED_STS_SHIFT   1 /* ADC_UNDERCLOCKED_STS */

Definition at line 5191 of file registers.h.

#define ARIZONA_ADC_UNDERCLOCKED_STS_WIDTH   1 /* ADC_UNDERCLOCKED_STS */

Definition at line 5192 of file registers.h.

#define ARIZONA_ADDR_PD   0x0001 /* ADDR_PD */

Definition at line 4072 of file registers.h.

#define ARIZONA_ADDR_PD_MASK   0x0001 /* ADDR_PD */

Definition at line 4073 of file registers.h.

#define ARIZONA_ADDR_PD_SHIFT   0 /* ADDR_PD */

Definition at line 4074 of file registers.h.

#define ARIZONA_ADDR_PD_WIDTH   1 /* ADDR_PD */

Definition at line 4075 of file registers.h.

#define ARIZONA_ADSP2_1_OVERCLOCKED_STS   0x0008 /* ADSP2_1_OVERCLOCKED_STS */

Definition at line 5141 of file registers.h.

#define ARIZONA_ADSP2_1_OVERCLOCKED_STS_MASK   0x0008 /* ADSP2_1_OVERCLOCKED_STS */

Definition at line 5142 of file registers.h.

#define ARIZONA_ADSP2_1_OVERCLOCKED_STS_SHIFT   3 /* ADSP2_1_OVERCLOCKED_STS */

Definition at line 5143 of file registers.h.

#define ARIZONA_ADSP2_1_OVERCLOCKED_STS_WIDTH   1 /* ADSP2_1_OVERCLOCKED_STS */

Definition at line 5144 of file registers.h.

#define ARIZONA_ADSP2_IRQ0   0xD41

Definition at line 850 of file registers.h.

#define ARIZONA_AEC_COMP_COEFF_1   0x0002 /* AEC_COMP_COEFF */

Definition at line 3137 of file registers.h.

#define ARIZONA_AEC_COMP_COEFF_1_MASK   0x0002 /* AEC_COMP_COEFF */

Definition at line 3138 of file registers.h.

#define ARIZONA_AEC_COMP_COEFF_1_SHIFT   1 /* AEC_COMP_COEFF */

Definition at line 3139 of file registers.h.

#define ARIZONA_AEC_COMP_COEFF_1_WIDTH   1 /* AEC_COMP_COEFF */

Definition at line 3140 of file registers.h.

#define ARIZONA_AEC_COMP_COEFF_MASK   0xFFFF /* AEC_COMP_COEFF - [15:0] */

Definition at line 3130 of file registers.h.

#define ARIZONA_AEC_COMP_COEFF_SEL   0x0001 /* AEC_COMP_COEFF_SEL */

Definition at line 3141 of file registers.h.

#define ARIZONA_AEC_COMP_COEFF_SEL_MASK   0x0001 /* AEC_COMP_COEFF_SEL */

Definition at line 3142 of file registers.h.

#define ARIZONA_AEC_COMP_COEFF_SEL_SHIFT   0 /* AEC_COMP_COEFF_SEL */

Definition at line 3143 of file registers.h.

#define ARIZONA_AEC_COMP_COEFF_SEL_WIDTH   1 /* AEC_COMP_COEFF_SEL */

Definition at line 3144 of file registers.h.

#define ARIZONA_AEC_COMP_COEFF_SHIFT   0 /* AEC_COMP_COEFF - [15:0] */

Definition at line 3131 of file registers.h.

#define ARIZONA_AEC_COMP_COEFF_WIDTH   16 /* AEC_COMP_COEFF - [15:0] */

Definition at line 3132 of file registers.h.

#define ARIZONA_AEC_ENA_STS   0x0002 /* AEC_ENA_STS */

Definition at line 3031 of file registers.h.

#define ARIZONA_AEC_ENA_STS_MASK   0x0002 /* AEC_ENA_STS */

Definition at line 3032 of file registers.h.

#define ARIZONA_AEC_ENA_STS_SHIFT   1 /* AEC_ENA_STS */

Definition at line 3033 of file registers.h.

#define ARIZONA_AEC_ENA_STS_WIDTH   1 /* AEC_ENA_STS */

Definition at line 3034 of file registers.h.

#define ARIZONA_AEC_LOOPBACK_ENA   0x0001 /* AEC_LOOPBACK_ENA */

Definition at line 3035 of file registers.h.

#define ARIZONA_AEC_LOOPBACK_ENA_MASK   0x0001 /* AEC_LOOPBACK_ENA */

Definition at line 3036 of file registers.h.

#define ARIZONA_AEC_LOOPBACK_ENA_SHIFT   0 /* AEC_LOOPBACK_ENA */

Definition at line 3037 of file registers.h.

#define ARIZONA_AEC_LOOPBACK_ENA_WIDTH   1 /* AEC_LOOPBACK_ENA */

Definition at line 3038 of file registers.h.

#define ARIZONA_AEC_LOOPBACK_SRC_MASK   0x003C /* AEC_LOOPBACK_SRC - [5:2] */

Definition at line 3028 of file registers.h.

#define ARIZONA_AEC_LOOPBACK_SRC_SHIFT   2 /* AEC_LOOPBACK_SRC - [5:2] */

Definition at line 3029 of file registers.h.

#define ARIZONA_AEC_LOOPBACK_SRC_WIDTH   4 /* AEC_LOOPBACK_SRC - [5:2] */

Definition at line 3030 of file registers.h.

#define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS   0x0010 /* AIF1_ASYNC_OVERCLOCKED_STS */

Definition at line 5089 of file registers.h.

#define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS_MASK   0x0010 /* AIF1_ASYNC_OVERCLOCKED_STS */

Definition at line 5090 of file registers.h.

#define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS_SHIFT   4 /* AIF1_ASYNC_OVERCLOCKED_STS */

Definition at line 5091 of file registers.h.

#define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS_WIDTH   1 /* AIF1_ASYNC_OVERCLOCKED_STS */

Definition at line 5092 of file registers.h.

#define ARIZONA_AIF1_BCLK_CTRL   0x500

Definition at line 216 of file registers.h.

#define ARIZONA_AIF1_BCLK_FRC   0x0040 /* AIF1_BCLK_FRC */

Definition at line 3153 of file registers.h.

#define ARIZONA_AIF1_BCLK_FRC_MASK   0x0040 /* AIF1_BCLK_FRC */

Definition at line 3154 of file registers.h.

#define ARIZONA_AIF1_BCLK_FRC_SHIFT   6 /* AIF1_BCLK_FRC */

Definition at line 3155 of file registers.h.

#define ARIZONA_AIF1_BCLK_FRC_WIDTH   1 /* AIF1_BCLK_FRC */

Definition at line 3156 of file registers.h.

#define ARIZONA_AIF1_BCLK_FREQ_MASK   0x001F /* AIF1_BCLK_FREQ - [4:0] */

Definition at line 3161 of file registers.h.

#define ARIZONA_AIF1_BCLK_FREQ_SHIFT   0 /* AIF1_BCLK_FREQ - [4:0] */

Definition at line 3162 of file registers.h.

#define ARIZONA_AIF1_BCLK_FREQ_WIDTH   5 /* AIF1_BCLK_FREQ - [4:0] */

Definition at line 3163 of file registers.h.

#define ARIZONA_AIF1_BCLK_INV   0x0080 /* AIF1_BCLK_INV */

Definition at line 3149 of file registers.h.

#define ARIZONA_AIF1_BCLK_INV_MASK   0x0080 /* AIF1_BCLK_INV */

Definition at line 3150 of file registers.h.

#define ARIZONA_AIF1_BCLK_INV_SHIFT   7 /* AIF1_BCLK_INV */

Definition at line 3151 of file registers.h.

#define ARIZONA_AIF1_BCLK_INV_WIDTH   1 /* AIF1_BCLK_INV */

Definition at line 3152 of file registers.h.

#define ARIZONA_AIF1_BCLK_MSTR   0x0020 /* AIF1_BCLK_MSTR */

Definition at line 3157 of file registers.h.

#define ARIZONA_AIF1_BCLK_MSTR_MASK   0x0020 /* AIF1_BCLK_MSTR */

Definition at line 3158 of file registers.h.

#define ARIZONA_AIF1_BCLK_MSTR_SHIFT   5 /* AIF1_BCLK_MSTR */

Definition at line 3159 of file registers.h.

#define ARIZONA_AIF1_BCLK_MSTR_WIDTH   1 /* AIF1_BCLK_MSTR */

Definition at line 3160 of file registers.h.

#define ARIZONA_AIF1_ERR_EINT1   0x1000 /* AIF1_ERR_EINT1 */

Definition at line 4332 of file registers.h.

#define ARIZONA_AIF1_ERR_EINT1_MASK   0x1000 /* AIF1_ERR_EINT1 */

Definition at line 4333 of file registers.h.

#define ARIZONA_AIF1_ERR_EINT1_SHIFT   12 /* AIF1_ERR_EINT1 */

Definition at line 4334 of file registers.h.

#define ARIZONA_AIF1_ERR_EINT1_WIDTH   1 /* AIF1_ERR_EINT1 */

Definition at line 4335 of file registers.h.

#define ARIZONA_AIF1_ERR_EINT2   0x1000 /* AIF1_ERR_EINT2 */

Definition at line 4676 of file registers.h.

#define ARIZONA_AIF1_ERR_EINT2_MASK   0x1000 /* AIF1_ERR_EINT2 */

Definition at line 4677 of file registers.h.

#define ARIZONA_AIF1_ERR_EINT2_SHIFT   12 /* AIF1_ERR_EINT2 */

Definition at line 4678 of file registers.h.

#define ARIZONA_AIF1_ERR_EINT2_WIDTH   1 /* AIF1_ERR_EINT2 */

Definition at line 4679 of file registers.h.

#define ARIZONA_AIF1_ERR_STS   0x1000 /* AIF1_ERR_STS */

Definition at line 5001 of file registers.h.

#define ARIZONA_AIF1_ERR_STS_MASK   0x1000 /* AIF1_ERR_STS */

Definition at line 5002 of file registers.h.

#define ARIZONA_AIF1_ERR_STS_SHIFT   12 /* AIF1_ERR_STS */

Definition at line 5003 of file registers.h.

#define ARIZONA_AIF1_ERR_STS_WIDTH   1 /* AIF1_ERR_STS */

Definition at line 5004 of file registers.h.

#define ARIZONA_AIF1_FMT_MASK   0x0007 /* AIF1_FMT - [2:0] */

Definition at line 3219 of file registers.h.

#define ARIZONA_AIF1_FMT_SHIFT   0 /* AIF1_FMT - [2:0] */

Definition at line 3220 of file registers.h.

#define ARIZONA_AIF1_FMT_WIDTH   3 /* AIF1_FMT - [2:0] */

Definition at line 3221 of file registers.h.

#define ARIZONA_AIF1_FORCE_WRITE   0x51B

Definition at line 243 of file registers.h.

#define ARIZONA_AIF1_FORMAT   0x504

Definition at line 220 of file registers.h.

#define ARIZONA_AIF1_FRAME_CTRL_1   0x507

Definition at line 223 of file registers.h.

#define ARIZONA_AIF1_FRAME_CTRL_10   0x510

Definition at line 232 of file registers.h.

#define ARIZONA_AIF1_FRAME_CTRL_11   0x511

Definition at line 233 of file registers.h.

#define ARIZONA_AIF1_FRAME_CTRL_12   0x512

Definition at line 234 of file registers.h.

#define ARIZONA_AIF1_FRAME_CTRL_13   0x513

Definition at line 235 of file registers.h.

#define ARIZONA_AIF1_FRAME_CTRL_14   0x514

Definition at line 236 of file registers.h.

#define ARIZONA_AIF1_FRAME_CTRL_15   0x515

Definition at line 237 of file registers.h.

#define ARIZONA_AIF1_FRAME_CTRL_16   0x516

Definition at line 238 of file registers.h.

#define ARIZONA_AIF1_FRAME_CTRL_17   0x517

Definition at line 239 of file registers.h.

#define ARIZONA_AIF1_FRAME_CTRL_18   0x518

Definition at line 240 of file registers.h.

#define ARIZONA_AIF1_FRAME_CTRL_2   0x508

Definition at line 224 of file registers.h.

#define ARIZONA_AIF1_FRAME_CTRL_3   0x509

Definition at line 225 of file registers.h.

#define ARIZONA_AIF1_FRAME_CTRL_4   0x50A

Definition at line 226 of file registers.h.

#define ARIZONA_AIF1_FRAME_CTRL_5   0x50B

Definition at line 227 of file registers.h.

#define ARIZONA_AIF1_FRAME_CTRL_6   0x50C

Definition at line 228 of file registers.h.

#define ARIZONA_AIF1_FRAME_CTRL_7   0x50D

Definition at line 229 of file registers.h.

#define ARIZONA_AIF1_FRAME_CTRL_8   0x50E

Definition at line 230 of file registers.h.

#define ARIZONA_AIF1_FRAME_CTRL_9   0x50F

Definition at line 231 of file registers.h.

#define ARIZONA_AIF1_FRC_WR   0x0001 /* AIF1_FRC_WR */

Definition at line 3444 of file registers.h.

#define ARIZONA_AIF1_FRC_WR_MASK   0x0001 /* AIF1_FRC_WR */

Definition at line 3445 of file registers.h.

#define ARIZONA_AIF1_FRC_WR_SHIFT   0 /* AIF1_FRC_WR */

Definition at line 3446 of file registers.h.

#define ARIZONA_AIF1_FRC_WR_WIDTH   1 /* AIF1_FRC_WR */

Definition at line 3447 of file registers.h.

#define ARIZONA_AIF1_RATE_CTRL   0x503

Definition at line 219 of file registers.h.

#define ARIZONA_AIF1_RATE_MASK   0x7800 /* AIF1_RATE - [14:11] */

Definition at line 3208 of file registers.h.

#define ARIZONA_AIF1_RATE_SHIFT   11 /* AIF1_RATE - [14:11] */

Definition at line 3209 of file registers.h.

#define ARIZONA_AIF1_RATE_WIDTH   4 /* AIF1_RATE - [14:11] */

Definition at line 3210 of file registers.h.

#define ARIZONA_AIF1_RX_BCLK_RATE   0x506

Definition at line 222 of file registers.h.

#define ARIZONA_AIF1_RX_ENABLES   0x51A

Definition at line 242 of file registers.h.

#define ARIZONA_AIF1_RX_PIN_CTRL   0x502

Definition at line 218 of file registers.h.

#define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS   0x0002 /* AIF1_SYNC_OVERCLOCKED_STS */

Definition at line 5101 of file registers.h.

#define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS_MASK   0x0002 /* AIF1_SYNC_OVERCLOCKED_STS */

Definition at line 5102 of file registers.h.

#define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS_SHIFT   1 /* AIF1_SYNC_OVERCLOCKED_STS */

Definition at line 5103 of file registers.h.

#define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS_WIDTH   1 /* AIF1_SYNC_OVERCLOCKED_STS */

Definition at line 5104 of file registers.h.

#define ARIZONA_AIF1_TRI   0x0040 /* AIF1_TRI */

Definition at line 3211 of file registers.h.

#define ARIZONA_AIF1_TRI_MASK   0x0040 /* AIF1_TRI */

Definition at line 3212 of file registers.h.

#define ARIZONA_AIF1_TRI_SHIFT   6 /* AIF1_TRI */

Definition at line 3213 of file registers.h.

#define ARIZONA_AIF1_TRI_WIDTH   1 /* AIF1_TRI */

Definition at line 3214 of file registers.h.

#define ARIZONA_AIF1_TX_BCLK_RATE   0x505

Definition at line 221 of file registers.h.

#define ARIZONA_AIF1_TX_ENABLES   0x519

Definition at line 241 of file registers.h.

#define ARIZONA_AIF1_TX_PIN_CTRL   0x501

Definition at line 217 of file registers.h.

#define ARIZONA_AIF1_UNDERCLOCKED_STS   0x0100 /* AIF1_UNDERCLOCKED_STS */

Definition at line 5165 of file registers.h.

#define ARIZONA_AIF1_UNDERCLOCKED_STS_MASK   0x0100 /* AIF1_UNDERCLOCKED_STS */

Definition at line 5166 of file registers.h.

#define ARIZONA_AIF1_UNDERCLOCKED_STS_SHIFT   8 /* AIF1_UNDERCLOCKED_STS */

Definition at line 5167 of file registers.h.

#define ARIZONA_AIF1_UNDERCLOCKED_STS_WIDTH   1 /* AIF1_UNDERCLOCKED_STS */

Definition at line 5168 of file registers.h.

#define ARIZONA_AIF1BCLK_PD   0x0004 /* AIF1BCLK_PD */

Definition at line 4112 of file registers.h.

#define ARIZONA_AIF1BCLK_PD_MASK   0x0004 /* AIF1BCLK_PD */

Definition at line 4113 of file registers.h.

#define ARIZONA_AIF1BCLK_PD_SHIFT   2 /* AIF1BCLK_PD */

Definition at line 4114 of file registers.h.

#define ARIZONA_AIF1BCLK_PD_WIDTH   1 /* AIF1BCLK_PD */

Definition at line 4115 of file registers.h.

#define ARIZONA_AIF1BCLK_PU   0x0008 /* AIF1BCLK_PU */

Definition at line 4108 of file registers.h.

#define ARIZONA_AIF1BCLK_PU_MASK   0x0008 /* AIF1BCLK_PU */

Definition at line 4109 of file registers.h.

#define ARIZONA_AIF1BCLK_PU_SHIFT   3 /* AIF1BCLK_PU */

Definition at line 4110 of file registers.h.

#define ARIZONA_AIF1BCLK_PU_WIDTH   1 /* AIF1BCLK_PU */

Definition at line 4111 of file registers.h.

#define ARIZONA_AIF1RX1_ENA   0x0001 /* AIF1RX1_ENA */

Definition at line 3436 of file registers.h.

#define ARIZONA_AIF1RX1_ENA_MASK   0x0001 /* AIF1RX1_ENA */

Definition at line 3437 of file registers.h.

#define ARIZONA_AIF1RX1_ENA_SHIFT   0 /* AIF1RX1_ENA */

Definition at line 3438 of file registers.h.

#define ARIZONA_AIF1RX1_ENA_WIDTH   1 /* AIF1RX1_ENA */

Definition at line 3439 of file registers.h.

#define ARIZONA_AIF1RX1_SLOT_MASK   0x003F /* AIF1RX1_SLOT - [5:0] */

Definition at line 3316 of file registers.h.

#define ARIZONA_AIF1RX1_SLOT_SHIFT   0 /* AIF1RX1_SLOT - [5:0] */

Definition at line 3317 of file registers.h.

#define ARIZONA_AIF1RX1_SLOT_WIDTH   6 /* AIF1RX1_SLOT - [5:0] */

Definition at line 3318 of file registers.h.

#define ARIZONA_AIF1RX2_ENA   0x0002 /* AIF1RX2_ENA */

Definition at line 3432 of file registers.h.

#define ARIZONA_AIF1RX2_ENA_MASK   0x0002 /* AIF1RX2_ENA */

Definition at line 3433 of file registers.h.

#define ARIZONA_AIF1RX2_ENA_SHIFT   1 /* AIF1RX2_ENA */

Definition at line 3434 of file registers.h.

#define ARIZONA_AIF1RX2_ENA_WIDTH   1 /* AIF1RX2_ENA */

Definition at line 3435 of file registers.h.

#define ARIZONA_AIF1RX2_SLOT_MASK   0x003F /* AIF1RX2_SLOT - [5:0] */

Definition at line 3323 of file registers.h.

#define ARIZONA_AIF1RX2_SLOT_SHIFT   0 /* AIF1RX2_SLOT - [5:0] */

Definition at line 3324 of file registers.h.

#define ARIZONA_AIF1RX2_SLOT_WIDTH   6 /* AIF1RX2_SLOT - [5:0] */

Definition at line 3325 of file registers.h.

#define ARIZONA_AIF1RX3_ENA   0x0004 /* AIF1RX3_ENA */

Definition at line 3428 of file registers.h.

#define ARIZONA_AIF1RX3_ENA_MASK   0x0004 /* AIF1RX3_ENA */

Definition at line 3429 of file registers.h.

#define ARIZONA_AIF1RX3_ENA_SHIFT   2 /* AIF1RX3_ENA */

Definition at line 3430 of file registers.h.

#define ARIZONA_AIF1RX3_ENA_WIDTH   1 /* AIF1RX3_ENA */

Definition at line 3431 of file registers.h.

#define ARIZONA_AIF1RX3_SLOT_MASK   0x003F /* AIF1RX3_SLOT - [5:0] */

Definition at line 3330 of file registers.h.

#define ARIZONA_AIF1RX3_SLOT_SHIFT   0 /* AIF1RX3_SLOT - [5:0] */

Definition at line 3331 of file registers.h.

#define ARIZONA_AIF1RX3_SLOT_WIDTH   6 /* AIF1RX3_SLOT - [5:0] */

Definition at line 3332 of file registers.h.

#define ARIZONA_AIF1RX4_ENA   0x0008 /* AIF1RX4_ENA */

Definition at line 3424 of file registers.h.

#define ARIZONA_AIF1RX4_ENA_MASK   0x0008 /* AIF1RX4_ENA */

Definition at line 3425 of file registers.h.

#define ARIZONA_AIF1RX4_ENA_SHIFT   3 /* AIF1RX4_ENA */

Definition at line 3426 of file registers.h.

#define ARIZONA_AIF1RX4_ENA_WIDTH   1 /* AIF1RX4_ENA */

Definition at line 3427 of file registers.h.

#define ARIZONA_AIF1RX4_SLOT_MASK   0x003F /* AIF1RX4_SLOT - [5:0] */

Definition at line 3337 of file registers.h.

#define ARIZONA_AIF1RX4_SLOT_SHIFT   0 /* AIF1RX4_SLOT - [5:0] */

Definition at line 3338 of file registers.h.

#define ARIZONA_AIF1RX4_SLOT_WIDTH   6 /* AIF1RX4_SLOT - [5:0] */

Definition at line 3339 of file registers.h.

#define ARIZONA_AIF1RX5_ENA   0x0010 /* AIF1RX5_ENA */

Definition at line 3420 of file registers.h.

#define ARIZONA_AIF1RX5_ENA_MASK   0x0010 /* AIF1RX5_ENA */

Definition at line 3421 of file registers.h.

#define ARIZONA_AIF1RX5_ENA_SHIFT   4 /* AIF1RX5_ENA */

Definition at line 3422 of file registers.h.

#define ARIZONA_AIF1RX5_ENA_WIDTH   1 /* AIF1RX5_ENA */

Definition at line 3423 of file registers.h.

#define ARIZONA_AIF1RX5_SLOT_MASK   0x003F /* AIF1RX5_SLOT - [5:0] */

Definition at line 3344 of file registers.h.

#define ARIZONA_AIF1RX5_SLOT_SHIFT   0 /* AIF1RX5_SLOT - [5:0] */

Definition at line 3345 of file registers.h.

#define ARIZONA_AIF1RX5_SLOT_WIDTH   6 /* AIF1RX5_SLOT - [5:0] */

Definition at line 3346 of file registers.h.

#define ARIZONA_AIF1RX6_ENA   0x0020 /* AIF1RX6_ENA */

Definition at line 3416 of file registers.h.

#define ARIZONA_AIF1RX6_ENA_MASK   0x0020 /* AIF1RX6_ENA */

Definition at line 3417 of file registers.h.

#define ARIZONA_AIF1RX6_ENA_SHIFT   5 /* AIF1RX6_ENA */

Definition at line 3418 of file registers.h.

#define ARIZONA_AIF1RX6_ENA_WIDTH   1 /* AIF1RX6_ENA */

Definition at line 3419 of file registers.h.

#define ARIZONA_AIF1RX6_SLOT_MASK   0x003F /* AIF1RX6_SLOT - [5:0] */

Definition at line 3351 of file registers.h.

#define ARIZONA_AIF1RX6_SLOT_SHIFT   0 /* AIF1RX6_SLOT - [5:0] */

Definition at line 3352 of file registers.h.

#define ARIZONA_AIF1RX6_SLOT_WIDTH   6 /* AIF1RX6_SLOT - [5:0] */

Definition at line 3353 of file registers.h.

#define ARIZONA_AIF1RX7_ENA   0x0040 /* AIF1RX7_ENA */

Definition at line 3412 of file registers.h.

#define ARIZONA_AIF1RX7_ENA_MASK   0x0040 /* AIF1RX7_ENA */

Definition at line 3413 of file registers.h.

#define ARIZONA_AIF1RX7_ENA_SHIFT   6 /* AIF1RX7_ENA */

Definition at line 3414 of file registers.h.

#define ARIZONA_AIF1RX7_ENA_WIDTH   1 /* AIF1RX7_ENA */

Definition at line 3415 of file registers.h.

#define ARIZONA_AIF1RX7_SLOT_MASK   0x003F /* AIF1RX7_SLOT - [5:0] */

Definition at line 3358 of file registers.h.

#define ARIZONA_AIF1RX7_SLOT_SHIFT   0 /* AIF1RX7_SLOT - [5:0] */

Definition at line 3359 of file registers.h.

#define ARIZONA_AIF1RX7_SLOT_WIDTH   6 /* AIF1RX7_SLOT - [5:0] */

Definition at line 3360 of file registers.h.

#define ARIZONA_AIF1RX8_ENA   0x0080 /* AIF1RX8_ENA */

Definition at line 3408 of file registers.h.

#define ARIZONA_AIF1RX8_ENA_MASK   0x0080 /* AIF1RX8_ENA */

Definition at line 3409 of file registers.h.

#define ARIZONA_AIF1RX8_ENA_SHIFT   7 /* AIF1RX8_ENA */

Definition at line 3410 of file registers.h.

#define ARIZONA_AIF1RX8_ENA_WIDTH   1 /* AIF1RX8_ENA */

Definition at line 3411 of file registers.h.

#define ARIZONA_AIF1RX8_SLOT_MASK   0x003F /* AIF1RX8_SLOT - [5:0] */

Definition at line 3365 of file registers.h.

#define ARIZONA_AIF1RX8_SLOT_SHIFT   0 /* AIF1RX8_SLOT - [5:0] */

Definition at line 3366 of file registers.h.

#define ARIZONA_AIF1RX8_SLOT_WIDTH   6 /* AIF1RX8_SLOT - [5:0] */

Definition at line 3367 of file registers.h.

#define ARIZONA_AIF1RX_BCPF_MASK   0x1FFF /* AIF1RX_BCPF - [12:0] */

Definition at line 3233 of file registers.h.

#define ARIZONA_AIF1RX_BCPF_SHIFT   0 /* AIF1RX_BCPF - [12:0] */

Definition at line 3234 of file registers.h.

#define ARIZONA_AIF1RX_BCPF_WIDTH   13 /* AIF1RX_BCPF - [12:0] */

Definition at line 3235 of file registers.h.

#define ARIZONA_AIF1RX_LRCLK_FRC   0x0002 /* AIF1RX_LRCLK_FRC */

Definition at line 3196 of file registers.h.

#define ARIZONA_AIF1RX_LRCLK_FRC_MASK   0x0002 /* AIF1RX_LRCLK_FRC */

Definition at line 3197 of file registers.h.

#define ARIZONA_AIF1RX_LRCLK_FRC_SHIFT   1 /* AIF1RX_LRCLK_FRC */

Definition at line 3198 of file registers.h.

#define ARIZONA_AIF1RX_LRCLK_FRC_WIDTH   1 /* AIF1RX_LRCLK_FRC */

Definition at line 3199 of file registers.h.

#define ARIZONA_AIF1RX_LRCLK_INV   0x0004 /* AIF1RX_LRCLK_INV */

Definition at line 3192 of file registers.h.

#define ARIZONA_AIF1RX_LRCLK_INV_MASK   0x0004 /* AIF1RX_LRCLK_INV */

Definition at line 3193 of file registers.h.

#define ARIZONA_AIF1RX_LRCLK_INV_SHIFT   2 /* AIF1RX_LRCLK_INV */

Definition at line 3194 of file registers.h.

#define ARIZONA_AIF1RX_LRCLK_INV_WIDTH   1 /* AIF1RX_LRCLK_INV */

Definition at line 3195 of file registers.h.

#define ARIZONA_AIF1RX_LRCLK_MSTR   0x0001 /* AIF1RX_LRCLK_MSTR */

Definition at line 3200 of file registers.h.

#define ARIZONA_AIF1RX_LRCLK_MSTR_MASK   0x0001 /* AIF1RX_LRCLK_MSTR */

Definition at line 3201 of file registers.h.

#define ARIZONA_AIF1RX_LRCLK_MSTR_SHIFT   0 /* AIF1RX_LRCLK_MSTR */

Definition at line 3202 of file registers.h.

#define ARIZONA_AIF1RX_LRCLK_MSTR_WIDTH   1 /* AIF1RX_LRCLK_MSTR */

Definition at line 3203 of file registers.h.

#define ARIZONA_AIF1RX_SLOT_LEN_MASK   0x00FF /* AIF1RX_SLOT_LEN - [7:0] */

Definition at line 3253 of file registers.h.

#define ARIZONA_AIF1RX_SLOT_LEN_SHIFT   0 /* AIF1RX_SLOT_LEN - [7:0] */

Definition at line 3254 of file registers.h.

#define ARIZONA_AIF1RX_SLOT_LEN_WIDTH   8 /* AIF1RX_SLOT_LEN - [7:0] */

Definition at line 3255 of file registers.h.

#define ARIZONA_AIF1RX_WL_MASK   0x3F00 /* AIF1RX_WL - [13:8] */

Definition at line 3250 of file registers.h.

#define ARIZONA_AIF1RX_WL_SHIFT   8 /* AIF1RX_WL - [13:8] */

Definition at line 3251 of file registers.h.

#define ARIZONA_AIF1RX_WL_WIDTH   6 /* AIF1RX_WL - [13:8] */

Definition at line 3252 of file registers.h.

#define ARIZONA_AIF1RXDAT_PD   0x0001 /* AIF1RXDAT_PD */

Definition at line 4120 of file registers.h.

#define ARIZONA_AIF1RXDAT_PD_MASK   0x0001 /* AIF1RXDAT_PD */

Definition at line 4121 of file registers.h.

#define ARIZONA_AIF1RXDAT_PD_SHIFT   0 /* AIF1RXDAT_PD */

Definition at line 4122 of file registers.h.

#define ARIZONA_AIF1RXDAT_PD_WIDTH   1 /* AIF1RXDAT_PD */

Definition at line 4123 of file registers.h.

#define ARIZONA_AIF1RXDAT_PU   0x0002 /* AIF1RXDAT_PU */

Definition at line 4116 of file registers.h.

#define ARIZONA_AIF1RXDAT_PU_MASK   0x0002 /* AIF1RXDAT_PU */

Definition at line 4117 of file registers.h.

#define ARIZONA_AIF1RXDAT_PU_SHIFT   1 /* AIF1RXDAT_PU */

Definition at line 4118 of file registers.h.

#define ARIZONA_AIF1RXDAT_PU_WIDTH   1 /* AIF1RXDAT_PU */

Definition at line 4119 of file registers.h.

#define ARIZONA_AIF1RXLRCLK_PD   0x0010 /* AIF1RXLRCLK_PD */

Definition at line 4104 of file registers.h.

#define ARIZONA_AIF1RXLRCLK_PD_MASK   0x0010 /* AIF1RXLRCLK_PD */

Definition at line 4105 of file registers.h.

#define ARIZONA_AIF1RXLRCLK_PD_SHIFT   4 /* AIF1RXLRCLK_PD */

Definition at line 4106 of file registers.h.

#define ARIZONA_AIF1RXLRCLK_PD_WIDTH   1 /* AIF1RXLRCLK_PD */

Definition at line 4107 of file registers.h.

#define ARIZONA_AIF1RXLRCLK_PU   0x0020 /* AIF1RXLRCLK_PU */

Definition at line 4100 of file registers.h.

#define ARIZONA_AIF1RXLRCLK_PU_MASK   0x0020 /* AIF1RXLRCLK_PU */

Definition at line 4101 of file registers.h.

#define ARIZONA_AIF1RXLRCLK_PU_SHIFT   5 /* AIF1RXLRCLK_PU */

Definition at line 4102 of file registers.h.

#define ARIZONA_AIF1RXLRCLK_PU_WIDTH   1 /* AIF1RXLRCLK_PU */

Definition at line 4103 of file registers.h.

#define ARIZONA_AIF1TX1_ENA   0x0001 /* AIF1TX1_ENA */

Definition at line 3400 of file registers.h.

#define ARIZONA_AIF1TX1_ENA_MASK   0x0001 /* AIF1TX1_ENA */

Definition at line 3401 of file registers.h.

#define ARIZONA_AIF1TX1_ENA_SHIFT   0 /* AIF1TX1_ENA */

Definition at line 3402 of file registers.h.

#define ARIZONA_AIF1TX1_ENA_WIDTH   1 /* AIF1TX1_ENA */

Definition at line 3403 of file registers.h.

#define ARIZONA_AIF1TX1_SLOT_MASK   0x003F /* AIF1TX1_SLOT - [5:0] */

Definition at line 3260 of file registers.h.

#define ARIZONA_AIF1TX1_SLOT_SHIFT   0 /* AIF1TX1_SLOT - [5:0] */

Definition at line 3261 of file registers.h.

#define ARIZONA_AIF1TX1_SLOT_WIDTH   6 /* AIF1TX1_SLOT - [5:0] */

Definition at line 3262 of file registers.h.

#define ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE   0x700

Definition at line 417 of file registers.h.

#define ARIZONA_AIF1TX1MIX_INPUT_1_VOLUME   0x701

Definition at line 418 of file registers.h.

#define ARIZONA_AIF1TX1MIX_INPUT_2_SOURCE   0x702

Definition at line 419 of file registers.h.

#define ARIZONA_AIF1TX1MIX_INPUT_2_VOLUME   0x703

Definition at line 420 of file registers.h.

#define ARIZONA_AIF1TX1MIX_INPUT_3_SOURCE   0x704

Definition at line 421 of file registers.h.

#define ARIZONA_AIF1TX1MIX_INPUT_3_VOLUME   0x705

Definition at line 422 of file registers.h.

#define ARIZONA_AIF1TX1MIX_INPUT_4_SOURCE   0x706

Definition at line 423 of file registers.h.

#define ARIZONA_AIF1TX1MIX_INPUT_4_VOLUME   0x707

Definition at line 424 of file registers.h.

#define ARIZONA_AIF1TX2_ENA   0x0002 /* AIF1TX2_ENA */

Definition at line 3396 of file registers.h.

#define ARIZONA_AIF1TX2_ENA_MASK   0x0002 /* AIF1TX2_ENA */

Definition at line 3397 of file registers.h.

#define ARIZONA_AIF1TX2_ENA_SHIFT   1 /* AIF1TX2_ENA */

Definition at line 3398 of file registers.h.

#define ARIZONA_AIF1TX2_ENA_WIDTH   1 /* AIF1TX2_ENA */

Definition at line 3399 of file registers.h.

#define ARIZONA_AIF1TX2_SLOT_MASK   0x003F /* AIF1TX2_SLOT - [5:0] */

Definition at line 3267 of file registers.h.

#define ARIZONA_AIF1TX2_SLOT_SHIFT   0 /* AIF1TX2_SLOT - [5:0] */

Definition at line 3268 of file registers.h.

#define ARIZONA_AIF1TX2_SLOT_WIDTH   6 /* AIF1TX2_SLOT - [5:0] */

Definition at line 3269 of file registers.h.

#define ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE   0x708

Definition at line 425 of file registers.h.

#define ARIZONA_AIF1TX2MIX_INPUT_1_VOLUME   0x709

Definition at line 426 of file registers.h.

#define ARIZONA_AIF1TX2MIX_INPUT_2_SOURCE   0x70A

Definition at line 427 of file registers.h.

#define ARIZONA_AIF1TX2MIX_INPUT_2_VOLUME   0x70B

Definition at line 428 of file registers.h.

#define ARIZONA_AIF1TX2MIX_INPUT_3_SOURCE   0x70C

Definition at line 429 of file registers.h.

#define ARIZONA_AIF1TX2MIX_INPUT_3_VOLUME   0x70D

Definition at line 430 of file registers.h.

#define ARIZONA_AIF1TX2MIX_INPUT_4_SOURCE   0x70E

Definition at line 431 of file registers.h.

#define ARIZONA_AIF1TX2MIX_INPUT_4_VOLUME   0x70F

Definition at line 432 of file registers.h.

#define ARIZONA_AIF1TX3_ENA   0x0004 /* AIF1TX3_ENA */

Definition at line 3392 of file registers.h.

#define ARIZONA_AIF1TX3_ENA_MASK   0x0004 /* AIF1TX3_ENA */

Definition at line 3393 of file registers.h.

#define ARIZONA_AIF1TX3_ENA_SHIFT   2 /* AIF1TX3_ENA */

Definition at line 3394 of file registers.h.

#define ARIZONA_AIF1TX3_ENA_WIDTH   1 /* AIF1TX3_ENA */

Definition at line 3395 of file registers.h.

#define ARIZONA_AIF1TX3_SLOT_MASK   0x003F /* AIF1TX3_SLOT - [5:0] */

Definition at line 3274 of file registers.h.

#define ARIZONA_AIF1TX3_SLOT_SHIFT   0 /* AIF1TX3_SLOT - [5:0] */

Definition at line 3275 of file registers.h.

#define ARIZONA_AIF1TX3_SLOT_WIDTH   6 /* AIF1TX3_SLOT - [5:0] */

Definition at line 3276 of file registers.h.

#define ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE   0x710

Definition at line 433 of file registers.h.

#define ARIZONA_AIF1TX3MIX_INPUT_1_VOLUME   0x711

Definition at line 434 of file registers.h.

#define ARIZONA_AIF1TX3MIX_INPUT_2_SOURCE   0x712

Definition at line 435 of file registers.h.

#define ARIZONA_AIF1TX3MIX_INPUT_2_VOLUME   0x713

Definition at line 436 of file registers.h.

#define ARIZONA_AIF1TX3MIX_INPUT_3_SOURCE   0x714

Definition at line 437 of file registers.h.

#define ARIZONA_AIF1TX3MIX_INPUT_3_VOLUME   0x715

Definition at line 438 of file registers.h.

#define ARIZONA_AIF1TX3MIX_INPUT_4_SOURCE   0x716

Definition at line 439 of file registers.h.

#define ARIZONA_AIF1TX3MIX_INPUT_4_VOLUME   0x717

Definition at line 440 of file registers.h.

#define ARIZONA_AIF1TX4_ENA   0x0008 /* AIF1TX4_ENA */

Definition at line 3388 of file registers.h.

#define ARIZONA_AIF1TX4_ENA_MASK   0x0008 /* AIF1TX4_ENA */

Definition at line 3389 of file registers.h.

#define ARIZONA_AIF1TX4_ENA_SHIFT   3 /* AIF1TX4_ENA */

Definition at line 3390 of file registers.h.

#define ARIZONA_AIF1TX4_ENA_WIDTH   1 /* AIF1TX4_ENA */

Definition at line 3391 of file registers.h.

#define ARIZONA_AIF1TX4_SLOT_MASK   0x003F /* AIF1TX4_SLOT - [5:0] */

Definition at line 3281 of file registers.h.

#define ARIZONA_AIF1TX4_SLOT_SHIFT   0 /* AIF1TX4_SLOT - [5:0] */

Definition at line 3282 of file registers.h.

#define ARIZONA_AIF1TX4_SLOT_WIDTH   6 /* AIF1TX4_SLOT - [5:0] */

Definition at line 3283 of file registers.h.

#define ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE   0x718

Definition at line 441 of file registers.h.

#define ARIZONA_AIF1TX4MIX_INPUT_1_VOLUME   0x719

Definition at line 442 of file registers.h.

#define ARIZONA_AIF1TX4MIX_INPUT_2_SOURCE   0x71A

Definition at line 443 of file registers.h.

#define ARIZONA_AIF1TX4MIX_INPUT_2_VOLUME   0x71B

Definition at line 444 of file registers.h.

#define ARIZONA_AIF1TX4MIX_INPUT_3_SOURCE   0x71C

Definition at line 445 of file registers.h.

#define ARIZONA_AIF1TX4MIX_INPUT_3_VOLUME   0x71D

Definition at line 446 of file registers.h.

#define ARIZONA_AIF1TX4MIX_INPUT_4_SOURCE   0x71E

Definition at line 447 of file registers.h.

#define ARIZONA_AIF1TX4MIX_INPUT_4_VOLUME   0x71F

Definition at line 448 of file registers.h.

#define ARIZONA_AIF1TX5_ENA   0x0010 /* AIF1TX5_ENA */

Definition at line 3384 of file registers.h.

#define ARIZONA_AIF1TX5_ENA_MASK   0x0010 /* AIF1TX5_ENA */

Definition at line 3385 of file registers.h.

#define ARIZONA_AIF1TX5_ENA_SHIFT   4 /* AIF1TX5_ENA */

Definition at line 3386 of file registers.h.

#define ARIZONA_AIF1TX5_ENA_WIDTH   1 /* AIF1TX5_ENA */

Definition at line 3387 of file registers.h.

#define ARIZONA_AIF1TX5_SLOT_MASK   0x003F /* AIF1TX5_SLOT - [5:0] */

Definition at line 3288 of file registers.h.

#define ARIZONA_AIF1TX5_SLOT_SHIFT   0 /* AIF1TX5_SLOT - [5:0] */

Definition at line 3289 of file registers.h.

#define ARIZONA_AIF1TX5_SLOT_WIDTH   6 /* AIF1TX5_SLOT - [5:0] */

Definition at line 3290 of file registers.h.

#define ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE   0x720

Definition at line 449 of file registers.h.

#define ARIZONA_AIF1TX5MIX_INPUT_1_VOLUME   0x721

Definition at line 450 of file registers.h.

#define ARIZONA_AIF1TX5MIX_INPUT_2_SOURCE   0x722

Definition at line 451 of file registers.h.

#define ARIZONA_AIF1TX5MIX_INPUT_2_VOLUME   0x723

Definition at line 452 of file registers.h.

#define ARIZONA_AIF1TX5MIX_INPUT_3_SOURCE   0x724

Definition at line 453 of file registers.h.

#define ARIZONA_AIF1TX5MIX_INPUT_3_VOLUME   0x725

Definition at line 454 of file registers.h.

#define ARIZONA_AIF1TX5MIX_INPUT_4_SOURCE   0x726

Definition at line 455 of file registers.h.

#define ARIZONA_AIF1TX5MIX_INPUT_4_VOLUME   0x727

Definition at line 456 of file registers.h.

#define ARIZONA_AIF1TX6_ENA   0x0020 /* AIF1TX6_ENA */

Definition at line 3380 of file registers.h.

#define ARIZONA_AIF1TX6_ENA_MASK   0x0020 /* AIF1TX6_ENA */

Definition at line 3381 of file registers.h.

#define ARIZONA_AIF1TX6_ENA_SHIFT   5 /* AIF1TX6_ENA */

Definition at line 3382 of file registers.h.

#define ARIZONA_AIF1TX6_ENA_WIDTH   1 /* AIF1TX6_ENA */

Definition at line 3383 of file registers.h.

#define ARIZONA_AIF1TX6_SLOT_MASK   0x003F /* AIF1TX6_SLOT - [5:0] */

Definition at line 3295 of file registers.h.

#define ARIZONA_AIF1TX6_SLOT_SHIFT   0 /* AIF1TX6_SLOT - [5:0] */

Definition at line 3296 of file registers.h.

#define ARIZONA_AIF1TX6_SLOT_WIDTH   6 /* AIF1TX6_SLOT - [5:0] */

Definition at line 3297 of file registers.h.

#define ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE   0x728

Definition at line 457 of file registers.h.

#define ARIZONA_AIF1TX6MIX_INPUT_1_VOLUME   0x729

Definition at line 458 of file registers.h.

#define ARIZONA_AIF1TX6MIX_INPUT_2_SOURCE   0x72A

Definition at line 459 of file registers.h.

#define ARIZONA_AIF1TX6MIX_INPUT_2_VOLUME   0x72B

Definition at line 460 of file registers.h.

#define ARIZONA_AIF1TX6MIX_INPUT_3_SOURCE   0x72C

Definition at line 461 of file registers.h.

#define ARIZONA_AIF1TX6MIX_INPUT_3_VOLUME   0x72D

Definition at line 462 of file registers.h.

#define ARIZONA_AIF1TX6MIX_INPUT_4_SOURCE   0x72E

Definition at line 463 of file registers.h.

#define ARIZONA_AIF1TX6MIX_INPUT_4_VOLUME   0x72F

Definition at line 464 of file registers.h.

#define ARIZONA_AIF1TX7_ENA   0x0040 /* AIF1TX7_ENA */

Definition at line 3376 of file registers.h.

#define ARIZONA_AIF1TX7_ENA_MASK   0x0040 /* AIF1TX7_ENA */

Definition at line 3377 of file registers.h.

#define ARIZONA_AIF1TX7_ENA_SHIFT   6 /* AIF1TX7_ENA */

Definition at line 3378 of file registers.h.

#define ARIZONA_AIF1TX7_ENA_WIDTH   1 /* AIF1TX7_ENA */

Definition at line 3379 of file registers.h.

#define ARIZONA_AIF1TX7_SLOT_MASK   0x003F /* AIF1TX7_SLOT - [5:0] */

Definition at line 3302 of file registers.h.

#define ARIZONA_AIF1TX7_SLOT_SHIFT   0 /* AIF1TX7_SLOT - [5:0] */

Definition at line 3303 of file registers.h.

#define ARIZONA_AIF1TX7_SLOT_WIDTH   6 /* AIF1TX7_SLOT - [5:0] */

Definition at line 3304 of file registers.h.

#define ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE   0x730

Definition at line 465 of file registers.h.

#define ARIZONA_AIF1TX7MIX_INPUT_1_VOLUME   0x731

Definition at line 466 of file registers.h.

#define ARIZONA_AIF1TX7MIX_INPUT_2_SOURCE   0x732

Definition at line 467 of file registers.h.

#define ARIZONA_AIF1TX7MIX_INPUT_2_VOLUME   0x733

Definition at line 468 of file registers.h.

#define ARIZONA_AIF1TX7MIX_INPUT_3_SOURCE   0x734

Definition at line 469 of file registers.h.

#define ARIZONA_AIF1TX7MIX_INPUT_3_VOLUME   0x735

Definition at line 470 of file registers.h.

#define ARIZONA_AIF1TX7MIX_INPUT_4_SOURCE   0x736

Definition at line 471 of file registers.h.

#define ARIZONA_AIF1TX7MIX_INPUT_4_VOLUME   0x737

Definition at line 472 of file registers.h.

#define ARIZONA_AIF1TX8_ENA   0x0080 /* AIF1TX8_ENA */

Definition at line 3372 of file registers.h.

#define ARIZONA_AIF1TX8_ENA_MASK   0x0080 /* AIF1TX8_ENA */

Definition at line 3373 of file registers.h.

#define ARIZONA_AIF1TX8_ENA_SHIFT   7 /* AIF1TX8_ENA */

Definition at line 3374 of file registers.h.

#define ARIZONA_AIF1TX8_ENA_WIDTH   1 /* AIF1TX8_ENA */

Definition at line 3375 of file registers.h.

#define ARIZONA_AIF1TX8_SLOT_MASK   0x003F /* AIF1TX8_SLOT - [5:0] */

Definition at line 3309 of file registers.h.

#define ARIZONA_AIF1TX8_SLOT_SHIFT   0 /* AIF1TX8_SLOT - [5:0] */

Definition at line 3310 of file registers.h.

#define ARIZONA_AIF1TX8_SLOT_WIDTH   6 /* AIF1TX8_SLOT - [5:0] */

Definition at line 3311 of file registers.h.

#define ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE   0x738

Definition at line 473 of file registers.h.

#define ARIZONA_AIF1TX8MIX_INPUT_1_VOLUME   0x739

Definition at line 474 of file registers.h.

#define ARIZONA_AIF1TX8MIX_INPUT_2_SOURCE   0x73A

Definition at line 475 of file registers.h.

#define ARIZONA_AIF1TX8MIX_INPUT_2_VOLUME   0x73B

Definition at line 476 of file registers.h.

#define ARIZONA_AIF1TX8MIX_INPUT_3_SOURCE   0x73C

Definition at line 477 of file registers.h.

#define ARIZONA_AIF1TX8MIX_INPUT_3_VOLUME   0x73D

Definition at line 478 of file registers.h.

#define ARIZONA_AIF1TX8MIX_INPUT_4_SOURCE   0x73E

Definition at line 479 of file registers.h.

#define ARIZONA_AIF1TX8MIX_INPUT_4_VOLUME   0x73F

Definition at line 480 of file registers.h.

#define ARIZONA_AIF1TX_BCPF_MASK   0x1FFF /* AIF1TX_BCPF - [12:0] */

Definition at line 3226 of file registers.h.

#define ARIZONA_AIF1TX_BCPF_SHIFT   0 /* AIF1TX_BCPF - [12:0] */

Definition at line 3227 of file registers.h.

#define ARIZONA_AIF1TX_BCPF_WIDTH   13 /* AIF1TX_BCPF - [12:0] */

Definition at line 3228 of file registers.h.

#define ARIZONA_AIF1TX_DAT_TRI   0x0020 /* AIF1TX_DAT_TRI */

Definition at line 3168 of file registers.h.

#define ARIZONA_AIF1TX_DAT_TRI_MASK   0x0020 /* AIF1TX_DAT_TRI */

Definition at line 3169 of file registers.h.

#define ARIZONA_AIF1TX_DAT_TRI_SHIFT   5 /* AIF1TX_DAT_TRI */

Definition at line 3170 of file registers.h.

#define ARIZONA_AIF1TX_DAT_TRI_WIDTH   1 /* AIF1TX_DAT_TRI */

Definition at line 3171 of file registers.h.

#define ARIZONA_AIF1TX_LRCLK_FRC   0x0002 /* AIF1TX_LRCLK_FRC */

Definition at line 3180 of file registers.h.

#define ARIZONA_AIF1TX_LRCLK_FRC_MASK   0x0002 /* AIF1TX_LRCLK_FRC */

Definition at line 3181 of file registers.h.

#define ARIZONA_AIF1TX_LRCLK_FRC_SHIFT   1 /* AIF1TX_LRCLK_FRC */

Definition at line 3182 of file registers.h.

#define ARIZONA_AIF1TX_LRCLK_FRC_WIDTH   1 /* AIF1TX_LRCLK_FRC */

Definition at line 3183 of file registers.h.

#define ARIZONA_AIF1TX_LRCLK_INV   0x0004 /* AIF1TX_LRCLK_INV */

Definition at line 3176 of file registers.h.

#define ARIZONA_AIF1TX_LRCLK_INV_MASK   0x0004 /* AIF1TX_LRCLK_INV */

Definition at line 3177 of file registers.h.

#define ARIZONA_AIF1TX_LRCLK_INV_SHIFT   2 /* AIF1TX_LRCLK_INV */

Definition at line 3178 of file registers.h.

#define ARIZONA_AIF1TX_LRCLK_INV_WIDTH   1 /* AIF1TX_LRCLK_INV */

Definition at line 3179 of file registers.h.

#define ARIZONA_AIF1TX_LRCLK_MSTR   0x0001 /* AIF1TX_LRCLK_MSTR */

Definition at line 3184 of file registers.h.

#define ARIZONA_AIF1TX_LRCLK_MSTR_MASK   0x0001 /* AIF1TX_LRCLK_MSTR */

Definition at line 3185 of file registers.h.

#define ARIZONA_AIF1TX_LRCLK_MSTR_SHIFT   0 /* AIF1TX_LRCLK_MSTR */

Definition at line 3186 of file registers.h.

#define ARIZONA_AIF1TX_LRCLK_MSTR_WIDTH   1 /* AIF1TX_LRCLK_MSTR */

Definition at line 3187 of file registers.h.

#define ARIZONA_AIF1TX_LRCLK_SRC   0x0008 /* AIF1TX_LRCLK_SRC */

Definition at line 3172 of file registers.h.

#define ARIZONA_AIF1TX_LRCLK_SRC_MASK   0x0008 /* AIF1TX_LRCLK_SRC */

Definition at line 3173 of file registers.h.

#define ARIZONA_AIF1TX_LRCLK_SRC_SHIFT   3 /* AIF1TX_LRCLK_SRC */

Definition at line 3174 of file registers.h.

#define ARIZONA_AIF1TX_LRCLK_SRC_WIDTH   1 /* AIF1TX_LRCLK_SRC */

Definition at line 3175 of file registers.h.

#define ARIZONA_AIF1TX_SLOT_LEN_MASK   0x00FF /* AIF1TX_SLOT_LEN - [7:0] */

Definition at line 3243 of file registers.h.

#define ARIZONA_AIF1TX_SLOT_LEN_SHIFT   0 /* AIF1TX_SLOT_LEN - [7:0] */

Definition at line 3244 of file registers.h.

#define ARIZONA_AIF1TX_SLOT_LEN_WIDTH   8 /* AIF1TX_SLOT_LEN - [7:0] */

Definition at line 3245 of file registers.h.

#define ARIZONA_AIF1TX_WL_MASK   0x3F00 /* AIF1TX_WL - [13:8] */

Definition at line 3240 of file registers.h.

#define ARIZONA_AIF1TX_WL_SHIFT   8 /* AIF1TX_WL - [13:8] */

Definition at line 3241 of file registers.h.

#define ARIZONA_AIF1TX_WL_WIDTH   6 /* AIF1TX_WL - [13:8] */

Definition at line 3242 of file registers.h.

#define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS   0x0020 /* AIF2_ASYNC_OVERCLOCKED_STS */

Definition at line 5085 of file registers.h.

#define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS_MASK   0x0020 /* AIF2_ASYNC_OVERCLOCKED_STS */

Definition at line 5086 of file registers.h.

#define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS_SHIFT   5 /* AIF2_ASYNC_OVERCLOCKED_STS */

Definition at line 5087 of file registers.h.

#define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS_WIDTH   1 /* AIF2_ASYNC_OVERCLOCKED_STS */

Definition at line 5088 of file registers.h.

#define ARIZONA_AIF2_BCLK_CTRL   0x540

Definition at line 244 of file registers.h.

#define ARIZONA_AIF2_BCLK_FRC   0x0040 /* AIF2_BCLK_FRC */

Definition at line 3456 of file registers.h.

#define ARIZONA_AIF2_BCLK_FRC_MASK   0x0040 /* AIF2_BCLK_FRC */

Definition at line 3457 of file registers.h.

#define ARIZONA_AIF2_BCLK_FRC_SHIFT   6 /* AIF2_BCLK_FRC */

Definition at line 3458 of file registers.h.

#define ARIZONA_AIF2_BCLK_FRC_WIDTH   1 /* AIF2_BCLK_FRC */

Definition at line 3459 of file registers.h.

#define ARIZONA_AIF2_BCLK_FREQ_MASK   0x001F /* AIF2_BCLK_FREQ - [4:0] */

Definition at line 3464 of file registers.h.

#define ARIZONA_AIF2_BCLK_FREQ_SHIFT   0 /* AIF2_BCLK_FREQ - [4:0] */

Definition at line 3465 of file registers.h.

#define ARIZONA_AIF2_BCLK_FREQ_WIDTH   5 /* AIF2_BCLK_FREQ - [4:0] */

Definition at line 3466 of file registers.h.

#define ARIZONA_AIF2_BCLK_INV   0x0080 /* AIF2_BCLK_INV */

Definition at line 3452 of file registers.h.

#define ARIZONA_AIF2_BCLK_INV_MASK   0x0080 /* AIF2_BCLK_INV */

Definition at line 3453 of file registers.h.

#define ARIZONA_AIF2_BCLK_INV_SHIFT   7 /* AIF2_BCLK_INV */

Definition at line 3454 of file registers.h.

#define ARIZONA_AIF2_BCLK_INV_WIDTH   1 /* AIF2_BCLK_INV */

Definition at line 3455 of file registers.h.

#define ARIZONA_AIF2_BCLK_MSTR   0x0020 /* AIF2_BCLK_MSTR */

Definition at line 3460 of file registers.h.

#define ARIZONA_AIF2_BCLK_MSTR_MASK   0x0020 /* AIF2_BCLK_MSTR */

Definition at line 3461 of file registers.h.

#define ARIZONA_AIF2_BCLK_MSTR_SHIFT   5 /* AIF2_BCLK_MSTR */

Definition at line 3462 of file registers.h.

#define ARIZONA_AIF2_BCLK_MSTR_WIDTH   1 /* AIF2_BCLK_MSTR */

Definition at line 3463 of file registers.h.

#define ARIZONA_AIF2_ERR_EINT1   0x2000 /* AIF2_ERR_EINT1 */

Definition at line 4328 of file registers.h.

#define ARIZONA_AIF2_ERR_EINT1_MASK   0x2000 /* AIF2_ERR_EINT1 */

Definition at line 4329 of file registers.h.

#define ARIZONA_AIF2_ERR_EINT1_SHIFT   13 /* AIF2_ERR_EINT1 */

Definition at line 4330 of file registers.h.

#define ARIZONA_AIF2_ERR_EINT1_WIDTH   1 /* AIF2_ERR_EINT1 */

Definition at line 4331 of file registers.h.

#define ARIZONA_AIF2_ERR_EINT2   0x2000 /* AIF2_ERR_EINT2 */

Definition at line 4672 of file registers.h.

#define ARIZONA_AIF2_ERR_EINT2_MASK   0x2000 /* AIF2_ERR_EINT2 */

Definition at line 4673 of file registers.h.

#define ARIZONA_AIF2_ERR_EINT2_SHIFT   13 /* AIF2_ERR_EINT2 */

Definition at line 4674 of file registers.h.

#define ARIZONA_AIF2_ERR_EINT2_WIDTH   1 /* AIF2_ERR_EINT2 */

Definition at line 4675 of file registers.h.

#define ARIZONA_AIF2_ERR_STS   0x2000 /* AIF2_ERR_STS */

Definition at line 4997 of file registers.h.

#define ARIZONA_AIF2_ERR_STS_MASK   0x2000 /* AIF2_ERR_STS */

Definition at line 4998 of file registers.h.

#define ARIZONA_AIF2_ERR_STS_SHIFT   13 /* AIF2_ERR_STS */

Definition at line 4999 of file registers.h.

#define ARIZONA_AIF2_ERR_STS_WIDTH   1 /* AIF2_ERR_STS */

Definition at line 5000 of file registers.h.

#define ARIZONA_AIF2_FMT_MASK   0x0007 /* AIF2_FMT - [2:0] */

Definition at line 3522 of file registers.h.

#define ARIZONA_AIF2_FMT_SHIFT   0 /* AIF2_FMT - [2:0] */

Definition at line 3523 of file registers.h.

#define ARIZONA_AIF2_FMT_WIDTH   3 /* AIF2_FMT - [2:0] */

Definition at line 3524 of file registers.h.

#define ARIZONA_AIF2_FORCE_WRITE   0x55B

Definition at line 259 of file registers.h.

#define ARIZONA_AIF2_FORMAT   0x544

Definition at line 248 of file registers.h.

#define ARIZONA_AIF2_FRAME_CTRL_1   0x547

Definition at line 251 of file registers.h.

#define ARIZONA_AIF2_FRAME_CTRL_11   0x551

Definition at line 255 of file registers.h.

#define ARIZONA_AIF2_FRAME_CTRL_12   0x552

Definition at line 256 of file registers.h.

#define ARIZONA_AIF2_FRAME_CTRL_2   0x548

Definition at line 252 of file registers.h.

#define ARIZONA_AIF2_FRAME_CTRL_3   0x549

Definition at line 253 of file registers.h.

#define ARIZONA_AIF2_FRAME_CTRL_4   0x54A

Definition at line 254 of file registers.h.

#define ARIZONA_AIF2_FRC_WR   0x0001 /* AIF2_FRC_WR */

Definition at line 3615 of file registers.h.

#define ARIZONA_AIF2_FRC_WR_MASK   0x0001 /* AIF2_FRC_WR */

Definition at line 3616 of file registers.h.

#define ARIZONA_AIF2_FRC_WR_SHIFT   0 /* AIF2_FRC_WR */

Definition at line 3617 of file registers.h.

#define ARIZONA_AIF2_FRC_WR_WIDTH   1 /* AIF2_FRC_WR */

Definition at line 3618 of file registers.h.

#define ARIZONA_AIF2_RATE_CTRL   0x543

Definition at line 247 of file registers.h.

#define ARIZONA_AIF2_RATE_MASK   0x7800 /* AIF2_RATE - [14:11] */

Definition at line 3511 of file registers.h.

#define ARIZONA_AIF2_RATE_SHIFT   11 /* AIF2_RATE - [14:11] */

Definition at line 3512 of file registers.h.

#define ARIZONA_AIF2_RATE_WIDTH   4 /* AIF2_RATE - [14:11] */

Definition at line 3513 of file registers.h.

#define ARIZONA_AIF2_RX_BCLK_RATE   0x546

Definition at line 250 of file registers.h.

#define ARIZONA_AIF2_RX_ENABLES   0x55A

Definition at line 258 of file registers.h.

#define ARIZONA_AIF2_RX_PIN_CTRL   0x542

Definition at line 246 of file registers.h.

#define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS   0x0004 /* AIF2_SYNC_OVERCLOCKED_STS */

Definition at line 5097 of file registers.h.

#define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS_MASK   0x0004 /* AIF2_SYNC_OVERCLOCKED_STS */

Definition at line 5098 of file registers.h.

#define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS_SHIFT   2 /* AIF2_SYNC_OVERCLOCKED_STS */

Definition at line 5099 of file registers.h.

#define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS_WIDTH   1 /* AIF2_SYNC_OVERCLOCKED_STS */

Definition at line 5100 of file registers.h.

#define ARIZONA_AIF2_TRI   0x0040 /* AIF2_TRI */

Definition at line 3514 of file registers.h.

#define ARIZONA_AIF2_TRI_MASK   0x0040 /* AIF2_TRI */

Definition at line 3515 of file registers.h.

#define ARIZONA_AIF2_TRI_SHIFT   6 /* AIF2_TRI */

Definition at line 3516 of file registers.h.

#define ARIZONA_AIF2_TRI_WIDTH   1 /* AIF2_TRI */

Definition at line 3517 of file registers.h.

#define ARIZONA_AIF2_TX_BCLK_RATE   0x545

Definition at line 249 of file registers.h.

#define ARIZONA_AIF2_TX_ENABLES   0x559

Definition at line 257 of file registers.h.

#define ARIZONA_AIF2_TX_PIN_CTRL   0x541

Definition at line 245 of file registers.h.

#define ARIZONA_AIF2_UNDERCLOCKED_STS   0x0200 /* AIF2_UNDERCLOCKED_STS */

Definition at line 5161 of file registers.h.

#define ARIZONA_AIF2_UNDERCLOCKED_STS_MASK   0x0200 /* AIF2_UNDERCLOCKED_STS */

Definition at line 5162 of file registers.h.

#define ARIZONA_AIF2_UNDERCLOCKED_STS_SHIFT   9 /* AIF2_UNDERCLOCKED_STS */

Definition at line 5163 of file registers.h.

#define ARIZONA_AIF2_UNDERCLOCKED_STS_WIDTH   1 /* AIF2_UNDERCLOCKED_STS */

Definition at line 5164 of file registers.h.

#define ARIZONA_AIF2BCLK_PD   0x0004 /* AIF2BCLK_PD */

Definition at line 4140 of file registers.h.

#define ARIZONA_AIF2BCLK_PD_MASK   0x0004 /* AIF2BCLK_PD */

Definition at line 4141 of file registers.h.

#define ARIZONA_AIF2BCLK_PD_SHIFT   2 /* AIF2BCLK_PD */

Definition at line 4142 of file registers.h.

#define ARIZONA_AIF2BCLK_PD_WIDTH   1 /* AIF2BCLK_PD */

Definition at line 4143 of file registers.h.

#define ARIZONA_AIF2BCLK_PU   0x0008 /* AIF2BCLK_PU */

Definition at line 4136 of file registers.h.

#define ARIZONA_AIF2BCLK_PU_MASK   0x0008 /* AIF2BCLK_PU */

Definition at line 4137 of file registers.h.

#define ARIZONA_AIF2BCLK_PU_SHIFT   3 /* AIF2BCLK_PU */

Definition at line 4138 of file registers.h.

#define ARIZONA_AIF2BCLK_PU_WIDTH   1 /* AIF2BCLK_PU */

Definition at line 4139 of file registers.h.

#define ARIZONA_AIF2RX1_ENA   0x0001 /* AIF2RX1_ENA */

Definition at line 3607 of file registers.h.

#define ARIZONA_AIF2RX1_ENA_MASK   0x0001 /* AIF2RX1_ENA */

Definition at line 3608 of file registers.h.

#define ARIZONA_AIF2RX1_ENA_SHIFT   0 /* AIF2RX1_ENA */

Definition at line 3609 of file registers.h.

#define ARIZONA_AIF2RX1_ENA_WIDTH   1 /* AIF2RX1_ENA */

Definition at line 3610 of file registers.h.

#define ARIZONA_AIF2RX1_SLOT_MASK   0x003F /* AIF2RX1_SLOT - [5:0] */

Definition at line 3577 of file registers.h.

#define ARIZONA_AIF2RX1_SLOT_SHIFT   0 /* AIF2RX1_SLOT - [5:0] */

Definition at line 3578 of file registers.h.

#define ARIZONA_AIF2RX1_SLOT_WIDTH   6 /* AIF2RX1_SLOT - [5:0] */

Definition at line 3579 of file registers.h.

#define ARIZONA_AIF2RX2_ENA   0x0002 /* AIF2RX2_ENA */

Definition at line 3603 of file registers.h.

#define ARIZONA_AIF2RX2_ENA_MASK   0x0002 /* AIF2RX2_ENA */

Definition at line 3604 of file registers.h.

#define ARIZONA_AIF2RX2_ENA_SHIFT   1 /* AIF2RX2_ENA */

Definition at line 3605 of file registers.h.

#define ARIZONA_AIF2RX2_ENA_WIDTH   1 /* AIF2RX2_ENA */

Definition at line 3606 of file registers.h.

#define ARIZONA_AIF2RX2_SLOT_MASK   0x003F /* AIF2RX2_SLOT - [5:0] */

Definition at line 3584 of file registers.h.

#define ARIZONA_AIF2RX2_SLOT_SHIFT   0 /* AIF2RX2_SLOT - [5:0] */

Definition at line 3585 of file registers.h.

#define ARIZONA_AIF2RX2_SLOT_WIDTH   6 /* AIF2RX2_SLOT - [5:0] */

Definition at line 3586 of file registers.h.

#define ARIZONA_AIF2RX_BCPF_MASK   0x1FFF /* AIF2RX_BCPF - [12:0] */

Definition at line 3536 of file registers.h.

#define ARIZONA_AIF2RX_BCPF_SHIFT   0 /* AIF2RX_BCPF - [12:0] */

Definition at line 3537 of file registers.h.

#define ARIZONA_AIF2RX_BCPF_WIDTH   13 /* AIF2RX_BCPF - [12:0] */

Definition at line 3538 of file registers.h.

#define ARIZONA_AIF2RX_LRCLK_FRC   0x0002 /* AIF2RX_LRCLK_FRC */

Definition at line 3499 of file registers.h.

#define ARIZONA_AIF2RX_LRCLK_FRC_MASK   0x0002 /* AIF2RX_LRCLK_FRC */

Definition at line 3500 of file registers.h.

#define ARIZONA_AIF2RX_LRCLK_FRC_SHIFT   1 /* AIF2RX_LRCLK_FRC */

Definition at line 3501 of file registers.h.

#define ARIZONA_AIF2RX_LRCLK_FRC_WIDTH   1 /* AIF2RX_LRCLK_FRC */

Definition at line 3502 of file registers.h.

#define ARIZONA_AIF2RX_LRCLK_INV   0x0004 /* AIF2RX_LRCLK_INV */

Definition at line 3495 of file registers.h.

#define ARIZONA_AIF2RX_LRCLK_INV_MASK   0x0004 /* AIF2RX_LRCLK_INV */

Definition at line 3496 of file registers.h.

#define ARIZONA_AIF2RX_LRCLK_INV_SHIFT   2 /* AIF2RX_LRCLK_INV */

Definition at line 3497 of file registers.h.

#define ARIZONA_AIF2RX_LRCLK_INV_WIDTH   1 /* AIF2RX_LRCLK_INV */

Definition at line 3498 of file registers.h.

#define ARIZONA_AIF2RX_LRCLK_MSTR   0x0001 /* AIF2RX_LRCLK_MSTR */

Definition at line 3503 of file registers.h.

#define ARIZONA_AIF2RX_LRCLK_MSTR_MASK   0x0001 /* AIF2RX_LRCLK_MSTR */

Definition at line 3504 of file registers.h.

#define ARIZONA_AIF2RX_LRCLK_MSTR_SHIFT   0 /* AIF2RX_LRCLK_MSTR */

Definition at line 3505 of file registers.h.

#define ARIZONA_AIF2RX_LRCLK_MSTR_WIDTH   1 /* AIF2RX_LRCLK_MSTR */

Definition at line 3506 of file registers.h.

#define ARIZONA_AIF2RX_SLOT_LEN_MASK   0x00FF /* AIF2RX_SLOT_LEN - [7:0] */

Definition at line 3556 of file registers.h.

#define ARIZONA_AIF2RX_SLOT_LEN_SHIFT   0 /* AIF2RX_SLOT_LEN - [7:0] */

Definition at line 3557 of file registers.h.

#define ARIZONA_AIF2RX_SLOT_LEN_WIDTH   8 /* AIF2RX_SLOT_LEN - [7:0] */

Definition at line 3558 of file registers.h.

#define ARIZONA_AIF2RX_WL_MASK   0x3F00 /* AIF2RX_WL - [13:8] */

Definition at line 3553 of file registers.h.

#define ARIZONA_AIF2RX_WL_SHIFT   8 /* AIF2RX_WL - [13:8] */

Definition at line 3554 of file registers.h.

#define ARIZONA_AIF2RX_WL_WIDTH   6 /* AIF2RX_WL - [13:8] */

Definition at line 3555 of file registers.h.

#define ARIZONA_AIF2RXDAT_PD   0x0001 /* AIF2RXDAT_PD */

Definition at line 4148 of file registers.h.

#define ARIZONA_AIF2RXDAT_PD_MASK   0x0001 /* AIF2RXDAT_PD */

Definition at line 4149 of file registers.h.

#define ARIZONA_AIF2RXDAT_PD_SHIFT   0 /* AIF2RXDAT_PD */

Definition at line 4150 of file registers.h.

#define ARIZONA_AIF2RXDAT_PD_WIDTH   1 /* AIF2RXDAT_PD */

Definition at line 4151 of file registers.h.

#define ARIZONA_AIF2RXDAT_PU   0x0002 /* AIF2RXDAT_PU */

Definition at line 4144 of file registers.h.

#define ARIZONA_AIF2RXDAT_PU_MASK   0x0002 /* AIF2RXDAT_PU */

Definition at line 4145 of file registers.h.

#define ARIZONA_AIF2RXDAT_PU_SHIFT   1 /* AIF2RXDAT_PU */

Definition at line 4146 of file registers.h.

#define ARIZONA_AIF2RXDAT_PU_WIDTH   1 /* AIF2RXDAT_PU */

Definition at line 4147 of file registers.h.

#define ARIZONA_AIF2RXLRCLK_PD   0x0010 /* AIF2RXLRCLK_PD */

Definition at line 4132 of file registers.h.

#define ARIZONA_AIF2RXLRCLK_PD_MASK   0x0010 /* AIF2RXLRCLK_PD */

Definition at line 4133 of file registers.h.

#define ARIZONA_AIF2RXLRCLK_PD_SHIFT   4 /* AIF2RXLRCLK_PD */

Definition at line 4134 of file registers.h.

#define ARIZONA_AIF2RXLRCLK_PD_WIDTH   1 /* AIF2RXLRCLK_PD */

Definition at line 4135 of file registers.h.

#define ARIZONA_AIF2RXLRCLK_PU   0x0020 /* AIF2RXLRCLK_PU */

Definition at line 4128 of file registers.h.

#define ARIZONA_AIF2RXLRCLK_PU_MASK   0x0020 /* AIF2RXLRCLK_PU */

Definition at line 4129 of file registers.h.

#define ARIZONA_AIF2RXLRCLK_PU_SHIFT   5 /* AIF2RXLRCLK_PU */

Definition at line 4130 of file registers.h.

#define ARIZONA_AIF2RXLRCLK_PU_WIDTH   1 /* AIF2RXLRCLK_PU */

Definition at line 4131 of file registers.h.

#define ARIZONA_AIF2TX1_ENA   0x0001 /* AIF2TX1_ENA */

Definition at line 3595 of file registers.h.

#define ARIZONA_AIF2TX1_ENA_MASK   0x0001 /* AIF2TX1_ENA */

Definition at line 3596 of file registers.h.

#define ARIZONA_AIF2TX1_ENA_SHIFT   0 /* AIF2TX1_ENA */

Definition at line 3597 of file registers.h.

#define ARIZONA_AIF2TX1_ENA_WIDTH   1 /* AIF2TX1_ENA */

Definition at line 3598 of file registers.h.

#define ARIZONA_AIF2TX1_SLOT_MASK   0x003F /* AIF2TX1_SLOT - [5:0] */

Definition at line 3563 of file registers.h.

#define ARIZONA_AIF2TX1_SLOT_SHIFT   0 /* AIF2TX1_SLOT - [5:0] */

Definition at line 3564 of file registers.h.

#define ARIZONA_AIF2TX1_SLOT_WIDTH   6 /* AIF2TX1_SLOT - [5:0] */

Definition at line 3565 of file registers.h.

#define ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE   0x740

Definition at line 481 of file registers.h.

#define ARIZONA_AIF2TX1MIX_INPUT_1_VOLUME   0x741

Definition at line 482 of file registers.h.

#define ARIZONA_AIF2TX1MIX_INPUT_2_SOURCE   0x742

Definition at line 483 of file registers.h.

#define ARIZONA_AIF2TX1MIX_INPUT_2_VOLUME   0x743

Definition at line 484 of file registers.h.

#define ARIZONA_AIF2TX1MIX_INPUT_3_SOURCE   0x744

Definition at line 485 of file registers.h.

#define ARIZONA_AIF2TX1MIX_INPUT_3_VOLUME   0x745

Definition at line 486 of file registers.h.

#define ARIZONA_AIF2TX1MIX_INPUT_4_SOURCE   0x746

Definition at line 487 of file registers.h.

#define ARIZONA_AIF2TX1MIX_INPUT_4_VOLUME   0x747

Definition at line 488 of file registers.h.

#define ARIZONA_AIF2TX2_ENA   0x0002 /* AIF2TX2_ENA */

Definition at line 3591 of file registers.h.

#define ARIZONA_AIF2TX2_ENA_MASK   0x0002 /* AIF2TX2_ENA */

Definition at line 3592 of file registers.h.

#define ARIZONA_AIF2TX2_ENA_SHIFT   1 /* AIF2TX2_ENA */

Definition at line 3593 of file registers.h.

#define ARIZONA_AIF2TX2_ENA_WIDTH   1 /* AIF2TX2_ENA */

Definition at line 3594 of file registers.h.

#define ARIZONA_AIF2TX2_SLOT_MASK   0x003F /* AIF2TX2_SLOT - [5:0] */

Definition at line 3570 of file registers.h.

#define ARIZONA_AIF2TX2_SLOT_SHIFT   0 /* AIF2TX2_SLOT - [5:0] */

Definition at line 3571 of file registers.h.

#define ARIZONA_AIF2TX2_SLOT_WIDTH   6 /* AIF2TX2_SLOT - [5:0] */

Definition at line 3572 of file registers.h.

#define ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE   0x748

Definition at line 489 of file registers.h.

#define ARIZONA_AIF2TX2MIX_INPUT_1_VOLUME   0x749

Definition at line 490 of file registers.h.

#define ARIZONA_AIF2TX2MIX_INPUT_2_SOURCE   0x74A

Definition at line 491 of file registers.h.

#define ARIZONA_AIF2TX2MIX_INPUT_2_VOLUME   0x74B

Definition at line 492 of file registers.h.

#define ARIZONA_AIF2TX2MIX_INPUT_3_SOURCE   0x74C

Definition at line 493 of file registers.h.

#define ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME   0x74D

Definition at line 494 of file registers.h.

#define ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE   0x74E

Definition at line 495 of file registers.h.

#define ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME   0x74F

Definition at line 496 of file registers.h.

#define ARIZONA_AIF2TX_BCPF_MASK   0x1FFF /* AIF2TX_BCPF - [12:0] */

Definition at line 3529 of file registers.h.

#define ARIZONA_AIF2TX_BCPF_SHIFT   0 /* AIF2TX_BCPF - [12:0] */

Definition at line 3530 of file registers.h.

#define ARIZONA_AIF2TX_BCPF_WIDTH   13 /* AIF2TX_BCPF - [12:0] */

Definition at line 3531 of file registers.h.

#define ARIZONA_AIF2TX_DAT_TRI   0x0020 /* AIF2TX_DAT_TRI */

Definition at line 3471 of file registers.h.

#define ARIZONA_AIF2TX_DAT_TRI_MASK   0x0020 /* AIF2TX_DAT_TRI */

Definition at line 3472 of file registers.h.

#define ARIZONA_AIF2TX_DAT_TRI_SHIFT   5 /* AIF2TX_DAT_TRI */

Definition at line 3473 of file registers.h.

#define ARIZONA_AIF2TX_DAT_TRI_WIDTH   1 /* AIF2TX_DAT_TRI */

Definition at line 3474 of file registers.h.

#define ARIZONA_AIF2TX_LRCLK_FRC   0x0002 /* AIF2TX_LRCLK_FRC */

Definition at line 3483 of file registers.h.

#define ARIZONA_AIF2TX_LRCLK_FRC_MASK   0x0002 /* AIF2TX_LRCLK_FRC */

Definition at line 3484 of file registers.h.

#define ARIZONA_AIF2TX_LRCLK_FRC_SHIFT   1 /* AIF2TX_LRCLK_FRC */

Definition at line 3485 of file registers.h.

#define ARIZONA_AIF2TX_LRCLK_FRC_WIDTH   1 /* AIF2TX_LRCLK_FRC */

Definition at line 3486 of file registers.h.

#define ARIZONA_AIF2TX_LRCLK_INV   0x0004 /* AIF2TX_LRCLK_INV */

Definition at line 3479 of file registers.h.

#define ARIZONA_AIF2TX_LRCLK_INV_MASK   0x0004 /* AIF2TX_LRCLK_INV */

Definition at line 3480 of file registers.h.

#define ARIZONA_AIF2TX_LRCLK_INV_SHIFT   2 /* AIF2TX_LRCLK_INV */

Definition at line 3481 of file registers.h.

#define ARIZONA_AIF2TX_LRCLK_INV_WIDTH   1 /* AIF2TX_LRCLK_INV */

Definition at line 3482 of file registers.h.

#define ARIZONA_AIF2TX_LRCLK_MSTR   0x0001 /* AIF2TX_LRCLK_MSTR */

Definition at line 3487 of file registers.h.

#define ARIZONA_AIF2TX_LRCLK_MSTR_MASK   0x0001 /* AIF2TX_LRCLK_MSTR */

Definition at line 3488 of file registers.h.

#define ARIZONA_AIF2TX_LRCLK_MSTR_SHIFT   0 /* AIF2TX_LRCLK_MSTR */

Definition at line 3489 of file registers.h.

#define ARIZONA_AIF2TX_LRCLK_MSTR_WIDTH   1 /* AIF2TX_LRCLK_MSTR */

Definition at line 3490 of file registers.h.

#define ARIZONA_AIF2TX_LRCLK_SRC   0x0008 /* AIF2TX_LRCLK_SRC */

Definition at line 3475 of file registers.h.

#define ARIZONA_AIF2TX_LRCLK_SRC_MASK   0x0008 /* AIF2TX_LRCLK_SRC */

Definition at line 3476 of file registers.h.

#define ARIZONA_AIF2TX_LRCLK_SRC_SHIFT   3 /* AIF2TX_LRCLK_SRC */

Definition at line 3477 of file registers.h.

#define ARIZONA_AIF2TX_LRCLK_SRC_WIDTH   1 /* AIF2TX_LRCLK_SRC */

Definition at line 3478 of file registers.h.

#define ARIZONA_AIF2TX_SLOT_LEN_MASK   0x00FF /* AIF2TX_SLOT_LEN - [7:0] */

Definition at line 3546 of file registers.h.

#define ARIZONA_AIF2TX_SLOT_LEN_SHIFT   0 /* AIF2TX_SLOT_LEN - [7:0] */

Definition at line 3547 of file registers.h.

#define ARIZONA_AIF2TX_SLOT_LEN_WIDTH   8 /* AIF2TX_SLOT_LEN - [7:0] */

Definition at line 3548 of file registers.h.

#define ARIZONA_AIF2TX_WL_MASK   0x3F00 /* AIF2TX_WL - [13:8] */

Definition at line 3543 of file registers.h.

#define ARIZONA_AIF2TX_WL_SHIFT   8 /* AIF2TX_WL - [13:8] */

Definition at line 3544 of file registers.h.

#define ARIZONA_AIF2TX_WL_WIDTH   6 /* AIF2TX_WL - [13:8] */

Definition at line 3545 of file registers.h.

#define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS   0x0040 /* AIF3_ASYNC_OVERCLOCKED_STS */

Definition at line 5081 of file registers.h.

#define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS_MASK   0x0040 /* AIF3_ASYNC_OVERCLOCKED_STS */

Definition at line 5082 of file registers.h.

#define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS_SHIFT   6 /* AIF3_ASYNC_OVERCLOCKED_STS */

Definition at line 5083 of file registers.h.

#define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS_WIDTH   1 /* AIF3_ASYNC_OVERCLOCKED_STS */

Definition at line 5084 of file registers.h.

#define ARIZONA_AIF3_BCLK_CTRL   0x580

Definition at line 260 of file registers.h.

#define ARIZONA_AIF3_BCLK_FRC   0x0040 /* AIF3_BCLK_FRC */

Definition at line 3627 of file registers.h.

#define ARIZONA_AIF3_BCLK_FRC_MASK   0x0040 /* AIF3_BCLK_FRC */

Definition at line 3628 of file registers.h.

#define ARIZONA_AIF3_BCLK_FRC_SHIFT   6 /* AIF3_BCLK_FRC */

Definition at line 3629 of file registers.h.

#define ARIZONA_AIF3_BCLK_FRC_WIDTH   1 /* AIF3_BCLK_FRC */

Definition at line 3630 of file registers.h.

#define ARIZONA_AIF3_BCLK_FREQ_MASK   0x001F /* AIF3_BCLK_FREQ - [4:0] */

Definition at line 3635 of file registers.h.

#define ARIZONA_AIF3_BCLK_FREQ_SHIFT   0 /* AIF3_BCLK_FREQ - [4:0] */

Definition at line 3636 of file registers.h.

#define ARIZONA_AIF3_BCLK_FREQ_WIDTH   5 /* AIF3_BCLK_FREQ - [4:0] */

Definition at line 3637 of file registers.h.

#define ARIZONA_AIF3_BCLK_INV   0x0080 /* AIF3_BCLK_INV */

Definition at line 3623 of file registers.h.

#define ARIZONA_AIF3_BCLK_INV_MASK   0x0080 /* AIF3_BCLK_INV */

Definition at line 3624 of file registers.h.

#define ARIZONA_AIF3_BCLK_INV_SHIFT   7 /* AIF3_BCLK_INV */

Definition at line 3625 of file registers.h.

#define ARIZONA_AIF3_BCLK_INV_WIDTH   1 /* AIF3_BCLK_INV */

Definition at line 3626 of file registers.h.

#define ARIZONA_AIF3_BCLK_MSTR   0x0020 /* AIF3_BCLK_MSTR */

Definition at line 3631 of file registers.h.

#define ARIZONA_AIF3_BCLK_MSTR_MASK   0x0020 /* AIF3_BCLK_MSTR */

Definition at line 3632 of file registers.h.

#define ARIZONA_AIF3_BCLK_MSTR_SHIFT   5 /* AIF3_BCLK_MSTR */

Definition at line 3633 of file registers.h.

#define ARIZONA_AIF3_BCLK_MSTR_WIDTH   1 /* AIF3_BCLK_MSTR */

Definition at line 3634 of file registers.h.

#define ARIZONA_AIF3_ERR_EINT1   0x4000 /* AIF3_ERR_EINT1 */

Definition at line 4324 of file registers.h.

#define ARIZONA_AIF3_ERR_EINT1_MASK   0x4000 /* AIF3_ERR_EINT1 */

Definition at line 4325 of file registers.h.

#define ARIZONA_AIF3_ERR_EINT1_SHIFT   14 /* AIF3_ERR_EINT1 */

Definition at line 4326 of file registers.h.

#define ARIZONA_AIF3_ERR_EINT1_WIDTH   1 /* AIF3_ERR_EINT1 */

Definition at line 4327 of file registers.h.

#define ARIZONA_AIF3_ERR_EINT2   0x4000 /* AIF3_ERR_EINT2 */

Definition at line 4668 of file registers.h.

#define ARIZONA_AIF3_ERR_EINT2_MASK   0x4000 /* AIF3_ERR_EINT2 */

Definition at line 4669 of file registers.h.

#define ARIZONA_AIF3_ERR_EINT2_SHIFT   14 /* AIF3_ERR_EINT2 */

Definition at line 4670 of file registers.h.

#define ARIZONA_AIF3_ERR_EINT2_WIDTH   1 /* AIF3_ERR_EINT2 */

Definition at line 4671 of file registers.h.

#define ARIZONA_AIF3_ERR_STS   0x4000 /* AIF3_ERR_STS */

Definition at line 4993 of file registers.h.

#define ARIZONA_AIF3_ERR_STS_MASK   0x4000 /* AIF3_ERR_STS */

Definition at line 4994 of file registers.h.

#define ARIZONA_AIF3_ERR_STS_SHIFT   14 /* AIF3_ERR_STS */

Definition at line 4995 of file registers.h.

#define ARIZONA_AIF3_ERR_STS_WIDTH   1 /* AIF3_ERR_STS */

Definition at line 4996 of file registers.h.

#define ARIZONA_AIF3_FMT_MASK   0x0007 /* AIF3_FMT - [2:0] */

Definition at line 3693 of file registers.h.

#define ARIZONA_AIF3_FMT_SHIFT   0 /* AIF3_FMT - [2:0] */

Definition at line 3694 of file registers.h.

#define ARIZONA_AIF3_FMT_WIDTH   3 /* AIF3_FMT - [2:0] */

Definition at line 3695 of file registers.h.

#define ARIZONA_AIF3_FORCE_WRITE   0x59B

Definition at line 275 of file registers.h.

#define ARIZONA_AIF3_FORMAT   0x584

Definition at line 264 of file registers.h.

#define ARIZONA_AIF3_FRAME_CTRL_1   0x587

Definition at line 267 of file registers.h.

#define ARIZONA_AIF3_FRAME_CTRL_11   0x591

Definition at line 271 of file registers.h.

#define ARIZONA_AIF3_FRAME_CTRL_12   0x592

Definition at line 272 of file registers.h.

#define ARIZONA_AIF3_FRAME_CTRL_2   0x588

Definition at line 268 of file registers.h.

#define ARIZONA_AIF3_FRAME_CTRL_3   0x589

Definition at line 269 of file registers.h.

#define ARIZONA_AIF3_FRAME_CTRL_4   0x58A

Definition at line 270 of file registers.h.

#define ARIZONA_AIF3_FRC_WR   0x0001 /* AIF3_FRC_WR */

Definition at line 3786 of file registers.h.

#define ARIZONA_AIF3_FRC_WR_MASK   0x0001 /* AIF3_FRC_WR */

Definition at line 3787 of file registers.h.

#define ARIZONA_AIF3_FRC_WR_SHIFT   0 /* AIF3_FRC_WR */

Definition at line 3788 of file registers.h.

#define ARIZONA_AIF3_FRC_WR_WIDTH   1 /* AIF3_FRC_WR */

Definition at line 3789 of file registers.h.

#define ARIZONA_AIF3_RATE_CTRL   0x583

Definition at line 263 of file registers.h.

#define ARIZONA_AIF3_RATE_MASK   0x7800 /* AIF3_RATE - [14:11] */

Definition at line 3682 of file registers.h.

#define ARIZONA_AIF3_RATE_SHIFT   11 /* AIF3_RATE - [14:11] */

Definition at line 3683 of file registers.h.

#define ARIZONA_AIF3_RATE_WIDTH   4 /* AIF3_RATE - [14:11] */

Definition at line 3684 of file registers.h.

#define ARIZONA_AIF3_RX_BCLK_RATE   0x586

Definition at line 266 of file registers.h.

#define ARIZONA_AIF3_RX_ENABLES   0x59A

Definition at line 274 of file registers.h.

#define ARIZONA_AIF3_RX_PIN_CTRL   0x582

Definition at line 262 of file registers.h.

#define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS   0x0008 /* AIF3_SYNC_OVERCLOCKED_STS */

Definition at line 5093 of file registers.h.

#define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS_MASK   0x0008 /* AIF3_SYNC_OVERCLOCKED_STS */

Definition at line 5094 of file registers.h.

#define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS_SHIFT   3 /* AIF3_SYNC_OVERCLOCKED_STS */

Definition at line 5095 of file registers.h.

#define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS_WIDTH   1 /* AIF3_SYNC_OVERCLOCKED_STS */

Definition at line 5096 of file registers.h.

#define ARIZONA_AIF3_TRI   0x0040 /* AIF3_TRI */

Definition at line 3685 of file registers.h.

#define ARIZONA_AIF3_TRI_MASK   0x0040 /* AIF3_TRI */

Definition at line 3686 of file registers.h.

#define ARIZONA_AIF3_TRI_SHIFT   6 /* AIF3_TRI */

Definition at line 3687 of file registers.h.

#define ARIZONA_AIF3_TRI_WIDTH   1 /* AIF3_TRI */

Definition at line 3688 of file registers.h.

#define ARIZONA_AIF3_TX_BCLK_RATE   0x585

Definition at line 265 of file registers.h.

#define ARIZONA_AIF3_TX_ENABLES   0x599

Definition at line 273 of file registers.h.

#define ARIZONA_AIF3_TX_PIN_CTRL   0x581

Definition at line 261 of file registers.h.

#define ARIZONA_AIF3_UNDERCLOCKED_STS   0x0400 /* AIF3_UNDERCLOCKED_STS */

Definition at line 5157 of file registers.h.

#define ARIZONA_AIF3_UNDERCLOCKED_STS_MASK   0x0400 /* AIF3_UNDERCLOCKED_STS */

Definition at line 5158 of file registers.h.

#define ARIZONA_AIF3_UNDERCLOCKED_STS_SHIFT   10 /* AIF3_UNDERCLOCKED_STS */

Definition at line 5159 of file registers.h.

#define ARIZONA_AIF3_UNDERCLOCKED_STS_WIDTH   1 /* AIF3_UNDERCLOCKED_STS */

Definition at line 5160 of file registers.h.

#define ARIZONA_AIF3BCLK_PD   0x0004 /* AIF3BCLK_PD */

Definition at line 4168 of file registers.h.

#define ARIZONA_AIF3BCLK_PD_MASK   0x0004 /* AIF3BCLK_PD */

Definition at line 4169 of file registers.h.

#define ARIZONA_AIF3BCLK_PD_SHIFT   2 /* AIF3BCLK_PD */

Definition at line 4170 of file registers.h.

#define ARIZONA_AIF3BCLK_PD_WIDTH   1 /* AIF3BCLK_PD */

Definition at line 4171 of file registers.h.

#define ARIZONA_AIF3BCLK_PU   0x0008 /* AIF3BCLK_PU */

Definition at line 4164 of file registers.h.

#define ARIZONA_AIF3BCLK_PU_MASK   0x0008 /* AIF3BCLK_PU */

Definition at line 4165 of file registers.h.

#define ARIZONA_AIF3BCLK_PU_SHIFT   3 /* AIF3BCLK_PU */

Definition at line 4166 of file registers.h.

#define ARIZONA_AIF3BCLK_PU_WIDTH   1 /* AIF3BCLK_PU */

Definition at line 4167 of file registers.h.

#define ARIZONA_AIF3RX1_ENA   0x0001 /* AIF3RX1_ENA */

Definition at line 3778 of file registers.h.

#define ARIZONA_AIF3RX1_ENA_MASK   0x0001 /* AIF3RX1_ENA */

Definition at line 3779 of file registers.h.

#define ARIZONA_AIF3RX1_ENA_SHIFT   0 /* AIF3RX1_ENA */

Definition at line 3780 of file registers.h.

#define ARIZONA_AIF3RX1_ENA_WIDTH   1 /* AIF3RX1_ENA */

Definition at line 3781 of file registers.h.

#define ARIZONA_AIF3RX1_SLOT_MASK   0x003F /* AIF3RX1_SLOT - [5:0] */

Definition at line 3748 of file registers.h.

#define ARIZONA_AIF3RX1_SLOT_SHIFT   0 /* AIF3RX1_SLOT - [5:0] */

Definition at line 3749 of file registers.h.

#define ARIZONA_AIF3RX1_SLOT_WIDTH   6 /* AIF3RX1_SLOT - [5:0] */

Definition at line 3750 of file registers.h.

#define ARIZONA_AIF3RX2_ENA   0x0002 /* AIF3RX2_ENA */

Definition at line 3774 of file registers.h.

#define ARIZONA_AIF3RX2_ENA_MASK   0x0002 /* AIF3RX2_ENA */

Definition at line 3775 of file registers.h.

#define ARIZONA_AIF3RX2_ENA_SHIFT   1 /* AIF3RX2_ENA */

Definition at line 3776 of file registers.h.

#define ARIZONA_AIF3RX2_ENA_WIDTH   1 /* AIF3RX2_ENA */

Definition at line 3777 of file registers.h.

#define ARIZONA_AIF3RX2_SLOT_MASK   0x003F /* AIF3RX2_SLOT - [5:0] */

Definition at line 3755 of file registers.h.

#define ARIZONA_AIF3RX2_SLOT_SHIFT   0 /* AIF3RX2_SLOT - [5:0] */

Definition at line 3756 of file registers.h.

#define ARIZONA_AIF3RX2_SLOT_WIDTH   6 /* AIF3RX2_SLOT - [5:0] */

Definition at line 3757 of file registers.h.

#define ARIZONA_AIF3RX_BCPF_MASK   0x1FFF /* AIF3RX_BCPF - [12:0] */

Definition at line 3707 of file registers.h.

#define ARIZONA_AIF3RX_BCPF_SHIFT   0 /* AIF3RX_BCPF - [12:0] */

Definition at line 3708 of file registers.h.

#define ARIZONA_AIF3RX_BCPF_WIDTH   13 /* AIF3RX_BCPF - [12:0] */

Definition at line 3709 of file registers.h.

#define ARIZONA_AIF3RX_LRCLK_FRC   0x0002 /* AIF3RX_LRCLK_FRC */

Definition at line 3670 of file registers.h.

#define ARIZONA_AIF3RX_LRCLK_FRC_MASK   0x0002 /* AIF3RX_LRCLK_FRC */

Definition at line 3671 of file registers.h.

#define ARIZONA_AIF3RX_LRCLK_FRC_SHIFT   1 /* AIF3RX_LRCLK_FRC */

Definition at line 3672 of file registers.h.

#define ARIZONA_AIF3RX_LRCLK_FRC_WIDTH   1 /* AIF3RX_LRCLK_FRC */

Definition at line 3673 of file registers.h.

#define ARIZONA_AIF3RX_LRCLK_INV   0x0004 /* AIF3RX_LRCLK_INV */

Definition at line 3666 of file registers.h.

#define ARIZONA_AIF3RX_LRCLK_INV_MASK   0x0004 /* AIF3RX_LRCLK_INV */

Definition at line 3667 of file registers.h.

#define ARIZONA_AIF3RX_LRCLK_INV_SHIFT   2 /* AIF3RX_LRCLK_INV */

Definition at line 3668 of file registers.h.

#define ARIZONA_AIF3RX_LRCLK_INV_WIDTH   1 /* AIF3RX_LRCLK_INV */

Definition at line 3669 of file registers.h.

#define ARIZONA_AIF3RX_LRCLK_MSTR   0x0001 /* AIF3RX_LRCLK_MSTR */

Definition at line 3674 of file registers.h.

#define ARIZONA_AIF3RX_LRCLK_MSTR_MASK   0x0001 /* AIF3RX_LRCLK_MSTR */

Definition at line 3675 of file registers.h.

#define ARIZONA_AIF3RX_LRCLK_MSTR_SHIFT   0 /* AIF3RX_LRCLK_MSTR */

Definition at line 3676 of file registers.h.

#define ARIZONA_AIF3RX_LRCLK_MSTR_WIDTH   1 /* AIF3RX_LRCLK_MSTR */

Definition at line 3677 of file registers.h.

#define ARIZONA_AIF3RX_SLOT_LEN_MASK   0x00FF /* AIF3RX_SLOT_LEN - [7:0] */

Definition at line 3727 of file registers.h.

#define ARIZONA_AIF3RX_SLOT_LEN_SHIFT   0 /* AIF3RX_SLOT_LEN - [7:0] */

Definition at line 3728 of file registers.h.

#define ARIZONA_AIF3RX_SLOT_LEN_WIDTH   8 /* AIF3RX_SLOT_LEN - [7:0] */

Definition at line 3729 of file registers.h.

#define ARIZONA_AIF3RX_WL_MASK   0x3F00 /* AIF3RX_WL - [13:8] */

Definition at line 3724 of file registers.h.

#define ARIZONA_AIF3RX_WL_SHIFT   8 /* AIF3RX_WL - [13:8] */

Definition at line 3725 of file registers.h.

#define ARIZONA_AIF3RX_WL_WIDTH   6 /* AIF3RX_WL - [13:8] */

Definition at line 3726 of file registers.h.

#define ARIZONA_AIF3RXDAT_PD   0x0001 /* AIF3RXDAT_PD */

Definition at line 4176 of file registers.h.

#define ARIZONA_AIF3RXDAT_PD_MASK   0x0001 /* AIF3RXDAT_PD */

Definition at line 4177 of file registers.h.

#define ARIZONA_AIF3RXDAT_PD_SHIFT   0 /* AIF3RXDAT_PD */

Definition at line 4178 of file registers.h.

#define ARIZONA_AIF3RXDAT_PD_WIDTH   1 /* AIF3RXDAT_PD */

Definition at line 4179 of file registers.h.

#define ARIZONA_AIF3RXDAT_PU   0x0002 /* AIF3RXDAT_PU */

Definition at line 4172 of file registers.h.

#define ARIZONA_AIF3RXDAT_PU_MASK   0x0002 /* AIF3RXDAT_PU */

Definition at line 4173 of file registers.h.

#define ARIZONA_AIF3RXDAT_PU_SHIFT   1 /* AIF3RXDAT_PU */

Definition at line 4174 of file registers.h.

#define ARIZONA_AIF3RXDAT_PU_WIDTH   1 /* AIF3RXDAT_PU */

Definition at line 4175 of file registers.h.

#define ARIZONA_AIF3RXLRCLK_PD   0x0010 /* AIF3RXLRCLK_PD */

Definition at line 4160 of file registers.h.

#define ARIZONA_AIF3RXLRCLK_PD_MASK   0x0010 /* AIF3RXLRCLK_PD */

Definition at line 4161 of file registers.h.

#define ARIZONA_AIF3RXLRCLK_PD_SHIFT   4 /* AIF3RXLRCLK_PD */

Definition at line 4162 of file registers.h.

#define ARIZONA_AIF3RXLRCLK_PD_WIDTH   1 /* AIF3RXLRCLK_PD */

Definition at line 4163 of file registers.h.

#define ARIZONA_AIF3RXLRCLK_PU   0x0020 /* AIF3RXLRCLK_PU */

Definition at line 4156 of file registers.h.

#define ARIZONA_AIF3RXLRCLK_PU_MASK   0x0020 /* AIF3RXLRCLK_PU */

Definition at line 4157 of file registers.h.

#define ARIZONA_AIF3RXLRCLK_PU_SHIFT   5 /* AIF3RXLRCLK_PU */

Definition at line 4158 of file registers.h.

#define ARIZONA_AIF3RXLRCLK_PU_WIDTH   1 /* AIF3RXLRCLK_PU */

Definition at line 4159 of file registers.h.

#define ARIZONA_AIF3TX1_ENA   0x0001 /* AIF3TX1_ENA */

Definition at line 3766 of file registers.h.

#define ARIZONA_AIF3TX1_ENA_MASK   0x0001 /* AIF3TX1_ENA */

Definition at line 3767 of file registers.h.

#define ARIZONA_AIF3TX1_ENA_SHIFT   0 /* AIF3TX1_ENA */

Definition at line 3768 of file registers.h.

#define ARIZONA_AIF3TX1_ENA_WIDTH   1 /* AIF3TX1_ENA */

Definition at line 3769 of file registers.h.

#define ARIZONA_AIF3TX1_SLOT_MASK   0x003F /* AIF3TX1_SLOT - [5:0] */

Definition at line 3734 of file registers.h.

#define ARIZONA_AIF3TX1_SLOT_SHIFT   0 /* AIF3TX1_SLOT - [5:0] */

Definition at line 3735 of file registers.h.

#define ARIZONA_AIF3TX1_SLOT_WIDTH   6 /* AIF3TX1_SLOT - [5:0] */

Definition at line 3736 of file registers.h.

#define ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE   0x780

Definition at line 497 of file registers.h.

#define ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME   0x781

Definition at line 498 of file registers.h.

#define ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE   0x782

Definition at line 499 of file registers.h.

#define ARIZONA_AIF3TX1MIX_INPUT_2_VOLUME   0x783

Definition at line 500 of file registers.h.

#define ARIZONA_AIF3TX1MIX_INPUT_3_SOURCE   0x784

Definition at line 501 of file registers.h.

#define ARIZONA_AIF3TX1MIX_INPUT_3_VOLUME   0x785

Definition at line 502 of file registers.h.

#define ARIZONA_AIF3TX1MIX_INPUT_4_SOURCE   0x786

Definition at line 503 of file registers.h.

#define ARIZONA_AIF3TX1MIX_INPUT_4_VOLUME   0x787

Definition at line 504 of file registers.h.

#define ARIZONA_AIF3TX2_ENA   0x0002 /* AIF3TX2_ENA */

Definition at line 3762 of file registers.h.

#define ARIZONA_AIF3TX2_ENA_MASK   0x0002 /* AIF3TX2_ENA */

Definition at line 3763 of file registers.h.

#define ARIZONA_AIF3TX2_ENA_SHIFT   1 /* AIF3TX2_ENA */

Definition at line 3764 of file registers.h.

#define ARIZONA_AIF3TX2_ENA_WIDTH   1 /* AIF3TX2_ENA */

Definition at line 3765 of file registers.h.

#define ARIZONA_AIF3TX2_SLOT_MASK   0x003F /* AIF3TX2_SLOT - [5:0] */

Definition at line 3741 of file registers.h.

#define ARIZONA_AIF3TX2_SLOT_SHIFT   0 /* AIF3TX2_SLOT - [5:0] */

Definition at line 3742 of file registers.h.

#define ARIZONA_AIF3TX2_SLOT_WIDTH   6 /* AIF3TX2_SLOT - [5:0] */

Definition at line 3743 of file registers.h.

#define ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE   0x788

Definition at line 505 of file registers.h.

#define ARIZONA_AIF3TX2MIX_INPUT_1_VOLUME   0x789

Definition at line 506 of file registers.h.

#define ARIZONA_AIF3TX2MIX_INPUT_2_SOURCE   0x78A

Definition at line 507 of file registers.h.

#define ARIZONA_AIF3TX2MIX_INPUT_2_VOLUME   0x78B

Definition at line 508 of file registers.h.

#define ARIZONA_AIF3TX2MIX_INPUT_3_SOURCE   0x78C

Definition at line 509 of file registers.h.

#define ARIZONA_AIF3TX2MIX_INPUT_3_VOLUME   0x78D

Definition at line 510 of file registers.h.

#define ARIZONA_AIF3TX2MIX_INPUT_4_SOURCE   0x78E

Definition at line 511 of file registers.h.

#define ARIZONA_AIF3TX2MIX_INPUT_4_VOLUME   0x78F

Definition at line 512 of file registers.h.

#define ARIZONA_AIF3TX_BCPF_MASK   0x1FFF /* AIF3TX_BCPF - [12:0] */

Definition at line 3700 of file registers.h.

#define ARIZONA_AIF3TX_BCPF_SHIFT   0 /* AIF3TX_BCPF - [12:0] */

Definition at line 3701 of file registers.h.

#define ARIZONA_AIF3TX_BCPF_WIDTH   13 /* AIF3TX_BCPF - [12:0] */

Definition at line 3702 of file registers.h.

#define ARIZONA_AIF3TX_DAT_TRI   0x0020 /* AIF3TX_DAT_TRI */

Definition at line 3642 of file registers.h.

#define ARIZONA_AIF3TX_DAT_TRI_MASK   0x0020 /* AIF3TX_DAT_TRI */

Definition at line 3643 of file registers.h.

#define ARIZONA_AIF3TX_DAT_TRI_SHIFT   5 /* AIF3TX_DAT_TRI */

Definition at line 3644 of file registers.h.

#define ARIZONA_AIF3TX_DAT_TRI_WIDTH   1 /* AIF3TX_DAT_TRI */

Definition at line 3645 of file registers.h.

#define ARIZONA_AIF3TX_LRCLK_FRC   0x0002 /* AIF3TX_LRCLK_FRC */

Definition at line 3654 of file registers.h.

#define ARIZONA_AIF3TX_LRCLK_FRC_MASK   0x0002 /* AIF3TX_LRCLK_FRC */

Definition at line 3655 of file registers.h.

#define ARIZONA_AIF3TX_LRCLK_FRC_SHIFT   1 /* AIF3TX_LRCLK_FRC */

Definition at line 3656 of file registers.h.

#define ARIZONA_AIF3TX_LRCLK_FRC_WIDTH   1 /* AIF3TX_LRCLK_FRC */

Definition at line 3657 of file registers.h.

#define ARIZONA_AIF3TX_LRCLK_INV   0x0004 /* AIF3TX_LRCLK_INV */

Definition at line 3650 of file registers.h.

#define ARIZONA_AIF3TX_LRCLK_INV_MASK   0x0004 /* AIF3TX_LRCLK_INV */

Definition at line 3651 of file registers.h.

#define ARIZONA_AIF3TX_LRCLK_INV_SHIFT   2 /* AIF3TX_LRCLK_INV */

Definition at line 3652 of file registers.h.

#define ARIZONA_AIF3TX_LRCLK_INV_WIDTH   1 /* AIF3TX_LRCLK_INV */

Definition at line 3653 of file registers.h.

#define ARIZONA_AIF3TX_LRCLK_MSTR   0x0001 /* AIF3TX_LRCLK_MSTR */

Definition at line 3658 of file registers.h.

#define ARIZONA_AIF3TX_LRCLK_MSTR_MASK   0x0001 /* AIF3TX_LRCLK_MSTR */

Definition at line 3659 of file registers.h.

#define ARIZONA_AIF3TX_LRCLK_MSTR_SHIFT   0 /* AIF3TX_LRCLK_MSTR */

Definition at line 3660 of file registers.h.

#define ARIZONA_AIF3TX_LRCLK_MSTR_WIDTH   1 /* AIF3TX_LRCLK_MSTR */

Definition at line 3661 of file registers.h.

#define ARIZONA_AIF3TX_LRCLK_SRC   0x0008 /* AIF3TX_LRCLK_SRC */

Definition at line 3646 of file registers.h.

#define ARIZONA_AIF3TX_LRCLK_SRC_MASK   0x0008 /* AIF3TX_LRCLK_SRC */

Definition at line 3647 of file registers.h.

#define ARIZONA_AIF3TX_LRCLK_SRC_SHIFT   3 /* AIF3TX_LRCLK_SRC */

Definition at line 3648 of file registers.h.

#define ARIZONA_AIF3TX_LRCLK_SRC_WIDTH   1 /* AIF3TX_LRCLK_SRC */

Definition at line 3649 of file registers.h.

#define ARIZONA_AIF3TX_SLOT_LEN_MASK   0x00FF /* AIF3TX_SLOT_LEN - [7:0] */

Definition at line 3717 of file registers.h.

#define ARIZONA_AIF3TX_SLOT_LEN_SHIFT   0 /* AIF3TX_SLOT_LEN - [7:0] */

Definition at line 3718 of file registers.h.

#define ARIZONA_AIF3TX_SLOT_LEN_WIDTH   8 /* AIF3TX_SLOT_LEN - [7:0] */

Definition at line 3719 of file registers.h.

#define ARIZONA_AIF3TX_WL_MASK   0x3F00 /* AIF3TX_WL - [13:8] */

Definition at line 3714 of file registers.h.

#define ARIZONA_AIF3TX_WL_SHIFT   8 /* AIF3TX_WL - [13:8] */

Definition at line 3715 of file registers.h.

#define ARIZONA_AIF3TX_WL_WIDTH   6 /* AIF3TX_WL - [13:8] */

Definition at line 3716 of file registers.h.

#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1   0x68

Definition at line 45 of file registers.h.

#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2   0x69

Definition at line 46 of file registers.h.

#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3   0x6A

Definition at line 47 of file registers.h.

#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4   0x6B

Definition at line 48 of file registers.h.

#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5   0x6C

Definition at line 49 of file registers.h.

#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6   0x6D

Definition at line 50 of file registers.h.

#define ARIZONA_ANC_SRC   0xF01

Definition at line 976 of file registers.h.

#define ARIZONA_AOD_IRQ1   0xD51

Definition at line 852 of file registers.h.

#define ARIZONA_AOD_IRQ2   0xD52

Definition at line 853 of file registers.h.

#define ARIZONA_AOD_IRQ_MASK_IRQ1   0xD53

Definition at line 854 of file registers.h.

#define ARIZONA_AOD_IRQ_MASK_IRQ2   0xD54

Definition at line 855 of file registers.h.

#define ARIZONA_AOD_IRQ_RAW_STATUS   0xD55

Definition at line 856 of file registers.h.

#define ARIZONA_AOD_WKUP_AND_TRIG   0xD50

Definition at line 851 of file registers.h.

#define ARIZONA_ASRC1_LOCK_EINT1   0x0080 /* ASRC1_LOCK_EINT1 */

Definition at line 4288 of file registers.h.

#define ARIZONA_ASRC1_LOCK_EINT1_MASK   0x0080 /* ASRC1_LOCK_EINT1 */

Definition at line 4289 of file registers.h.

#define ARIZONA_ASRC1_LOCK_EINT1_SHIFT   7 /* ASRC1_LOCK_EINT1 */

Definition at line 4290 of file registers.h.

#define ARIZONA_ASRC1_LOCK_EINT1_WIDTH   1 /* ASRC1_LOCK_EINT1 */

Definition at line 4291 of file registers.h.

#define ARIZONA_ASRC1_LOCK_EINT2   0x0080 /* ASRC1_LOCK_EINT2 */

Definition at line 4632 of file registers.h.

#define ARIZONA_ASRC1_LOCK_EINT2_MASK   0x0080 /* ASRC1_LOCK_EINT2 */

Definition at line 4633 of file registers.h.

#define ARIZONA_ASRC1_LOCK_EINT2_SHIFT   7 /* ASRC1_LOCK_EINT2 */

Definition at line 4634 of file registers.h.

#define ARIZONA_ASRC1_LOCK_EINT2_WIDTH   1 /* ASRC1_LOCK_EINT2 */

Definition at line 4635 of file registers.h.

#define ARIZONA_ASRC1_LOCK_STS   0x0080 /* ASRC1_LOCK_STS */

Definition at line 4957 of file registers.h.

#define ARIZONA_ASRC1_LOCK_STS_MASK   0x0080 /* ASRC1_LOCK_STS */

Definition at line 4958 of file registers.h.

#define ARIZONA_ASRC1_LOCK_STS_SHIFT   7 /* ASRC1_LOCK_STS */

Definition at line 4959 of file registers.h.

#define ARIZONA_ASRC1_LOCK_STS_WIDTH   1 /* ASRC1_LOCK_STS */

Definition at line 4960 of file registers.h.

#define ARIZONA_ASRC1L_ENA   0x0002 /* ASRC1L_ENA */

Definition at line 6347 of file registers.h.

#define ARIZONA_ASRC1L_ENA_MASK   0x0002 /* ASRC1L_ENA */

Definition at line 6348 of file registers.h.

#define ARIZONA_ASRC1L_ENA_SHIFT   1 /* ASRC1L_ENA */

Definition at line 6349 of file registers.h.

#define ARIZONA_ASRC1L_ENA_WIDTH   1 /* ASRC1L_ENA */

Definition at line 6350 of file registers.h.

#define ARIZONA_ASRC1LMIX_INPUT_1_SOURCE   0xA80

Definition at line 761 of file registers.h.

#define ARIZONA_ASRC1R_ENA   0x0001 /* ASRC1R_ENA */

Definition at line 6351 of file registers.h.

#define ARIZONA_ASRC1R_ENA_MASK   0x0001 /* ASRC1R_ENA */

Definition at line 6352 of file registers.h.

#define ARIZONA_ASRC1R_ENA_SHIFT   0 /* ASRC1R_ENA */

Definition at line 6353 of file registers.h.

#define ARIZONA_ASRC1R_ENA_WIDTH   1 /* ASRC1R_ENA */

Definition at line 6354 of file registers.h.

#define ARIZONA_ASRC1RMIX_INPUT_1_SOURCE   0xA88

Definition at line 762 of file registers.h.

#define ARIZONA_ASRC2_LOCK_EINT1   0x0100 /* ASRC2_LOCK_EINT1 */

Definition at line 4284 of file registers.h.

#define ARIZONA_ASRC2_LOCK_EINT1_MASK   0x0100 /* ASRC2_LOCK_EINT1 */

Definition at line 4285 of file registers.h.

#define ARIZONA_ASRC2_LOCK_EINT1_SHIFT   8 /* ASRC2_LOCK_EINT1 */

Definition at line 4286 of file registers.h.

#define ARIZONA_ASRC2_LOCK_EINT1_WIDTH   1 /* ASRC2_LOCK_EINT1 */

Definition at line 4287 of file registers.h.

#define ARIZONA_ASRC2_LOCK_EINT2   0x0100 /* ASRC2_LOCK_EINT2 */

Definition at line 4628 of file registers.h.

#define ARIZONA_ASRC2_LOCK_EINT2_MASK   0x0100 /* ASRC2_LOCK_EINT2 */

Definition at line 4629 of file registers.h.

#define ARIZONA_ASRC2_LOCK_EINT2_SHIFT   8 /* ASRC2_LOCK_EINT2 */

Definition at line 4630 of file registers.h.

#define ARIZONA_ASRC2_LOCK_EINT2_WIDTH   1 /* ASRC2_LOCK_EINT2 */

Definition at line 4631 of file registers.h.

#define ARIZONA_ASRC2_LOCK_STS   0x0100 /* ASRC2_LOCK_STS */

Definition at line 4953 of file registers.h.

#define ARIZONA_ASRC2_LOCK_STS_MASK   0x0100 /* ASRC2_LOCK_STS */

Definition at line 4954 of file registers.h.

#define ARIZONA_ASRC2_LOCK_STS_SHIFT   8 /* ASRC2_LOCK_STS */

Definition at line 4955 of file registers.h.

#define ARIZONA_ASRC2_LOCK_STS_WIDTH   1 /* ASRC2_LOCK_STS */

Definition at line 4956 of file registers.h.

#define ARIZONA_ASRC2L_ENA   0x0008 /* ASRC2L_ENA */

Definition at line 6339 of file registers.h.

#define ARIZONA_ASRC2L_ENA_MASK   0x0008 /* ASRC2L_ENA */

Definition at line 6340 of file registers.h.

#define ARIZONA_ASRC2L_ENA_SHIFT   3 /* ASRC2L_ENA */

Definition at line 6341 of file registers.h.

#define ARIZONA_ASRC2L_ENA_WIDTH   1 /* ASRC2L_ENA */

Definition at line 6342 of file registers.h.

#define ARIZONA_ASRC2LMIX_INPUT_1_SOURCE   0xA90

Definition at line 763 of file registers.h.

#define ARIZONA_ASRC2R_ENA   0x0004 /* ASRC2R_ENA */

Definition at line 6343 of file registers.h.

#define ARIZONA_ASRC2R_ENA_MASK   0x0004 /* ASRC2R_ENA */

Definition at line 6344 of file registers.h.

#define ARIZONA_ASRC2R_ENA_SHIFT   2 /* ASRC2R_ENA */

Definition at line 6345 of file registers.h.

#define ARIZONA_ASRC2R_ENA_WIDTH   1 /* ASRC2R_ENA */

Definition at line 6346 of file registers.h.

#define ARIZONA_ASRC2RMIX_INPUT_1_SOURCE   0xA98

Definition at line 764 of file registers.h.

#define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS   0x1000 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */

Definition at line 5125 of file registers.h.

#define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_MASK   0x1000 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */

Definition at line 5126 of file registers.h.

#define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_SHIFT   12 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */

Definition at line 5127 of file registers.h.

#define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_WIDTH   1 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */

Definition at line 5128 of file registers.h.

#define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS   0x0800 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */

Definition at line 5129 of file registers.h.

#define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_MASK   0x0800 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */

Definition at line 5130 of file registers.h.

#define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_SHIFT   11 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */

Definition at line 5131 of file registers.h.

#define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_WIDTH   1 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */

Definition at line 5132 of file registers.h.

#define ARIZONA_ASRC_CFG_ERR_EINT1   0x8000 /* ASRC_CFG_ERR_EINT1 */

Definition at line 4320 of file registers.h.

#define ARIZONA_ASRC_CFG_ERR_EINT1_MASK   0x8000 /* ASRC_CFG_ERR_EINT1 */

Definition at line 4321 of file registers.h.

#define ARIZONA_ASRC_CFG_ERR_EINT1_SHIFT   15 /* ASRC_CFG_ERR_EINT1 */

Definition at line 4322 of file registers.h.

#define ARIZONA_ASRC_CFG_ERR_EINT1_WIDTH   1 /* ASRC_CFG_ERR_EINT1 */

Definition at line 4323 of file registers.h.

#define ARIZONA_ASRC_CFG_ERR_EINT2   0x8000 /* ASRC_CFG_ERR_EINT2 */

Definition at line 4664 of file registers.h.

#define ARIZONA_ASRC_CFG_ERR_EINT2_MASK   0x8000 /* ASRC_CFG_ERR_EINT2 */

Definition at line 4665 of file registers.h.

#define ARIZONA_ASRC_CFG_ERR_EINT2_SHIFT   15 /* ASRC_CFG_ERR_EINT2 */

Definition at line 4666 of file registers.h.

#define ARIZONA_ASRC_CFG_ERR_EINT2_WIDTH   1 /* ASRC_CFG_ERR_EINT2 */

Definition at line 4667 of file registers.h.

#define ARIZONA_ASRC_CFG_ERR_STS   0x8000 /* ASRC_CFG_ERR_STS */

Definition at line 4989 of file registers.h.

#define ARIZONA_ASRC_CFG_ERR_STS_MASK   0x8000 /* ASRC_CFG_ERR_STS */

Definition at line 4990 of file registers.h.

#define ARIZONA_ASRC_CFG_ERR_STS_SHIFT   15 /* ASRC_CFG_ERR_STS */

Definition at line 4991 of file registers.h.

#define ARIZONA_ASRC_CFG_ERR_STS_WIDTH   1 /* ASRC_CFG_ERR_STS */

Definition at line 4992 of file registers.h.

#define ARIZONA_ASRC_ENABLE   0xEE0

Definition at line 962 of file registers.h.

#define ARIZONA_ASRC_RATE1   0xEE2

Definition at line 964 of file registers.h.

#define ARIZONA_ASRC_RATE1_MASK   0x7800 /* ASRC_RATE1 - [14:11] */

Definition at line 6359 of file registers.h.

#define ARIZONA_ASRC_RATE1_SHIFT   11 /* ASRC_RATE1 - [14:11] */

Definition at line 6360 of file registers.h.

#define ARIZONA_ASRC_RATE1_WIDTH   4 /* ASRC_RATE1 - [14:11] */

Definition at line 6361 of file registers.h.

#define ARIZONA_ASRC_RATE2   0xEE3

Definition at line 965 of file registers.h.

#define ARIZONA_ASRC_RATE2_MASK   0x7800 /* ASRC_RATE2 - [14:11] */

Definition at line 6366 of file registers.h.

#define ARIZONA_ASRC_RATE2_SHIFT   11 /* ASRC_RATE2 - [14:11] */

Definition at line 6367 of file registers.h.

#define ARIZONA_ASRC_RATE2_WIDTH   4 /* ASRC_RATE2 - [14:11] */

Definition at line 6368 of file registers.h.

#define ARIZONA_ASRC_STATUS   0xEE1

Definition at line 963 of file registers.h.

#define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS   0x0400 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */

Definition at line 5133 of file registers.h.

#define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_MASK   0x0400 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */

Definition at line 5134 of file registers.h.

#define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_SHIFT   10 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */

Definition at line 5135 of file registers.h.

#define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_WIDTH   1 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */

Definition at line 5136 of file registers.h.

#define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS   0x0200 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */

Definition at line 5137 of file registers.h.

#define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_MASK   0x0200 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */

Definition at line 5138 of file registers.h.

#define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_SHIFT   9 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */

Definition at line 5139 of file registers.h.

#define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_WIDTH   1 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */

Definition at line 5140 of file registers.h.

#define ARIZONA_ASRC_UNDERCLOCKED_STS   0x0008 /* ASRC_UNDERCLOCKED_STS */

Definition at line 5181 of file registers.h.

#define ARIZONA_ASRC_UNDERCLOCKED_STS_MASK   0x0008 /* ASRC_UNDERCLOCKED_STS */

Definition at line 5182 of file registers.h.

#define ARIZONA_ASRC_UNDERCLOCKED_STS_SHIFT   3 /* ASRC_UNDERCLOCKED_STS */

Definition at line 5183 of file registers.h.

#define ARIZONA_ASRC_UNDERCLOCKED_STS_WIDTH   1 /* ASRC_UNDERCLOCKED_STS */

Definition at line 5184 of file registers.h.

#define ARIZONA_ASYNC_CLK_ENA   0x0040 /* ASYNC_CLK_ENA */

Definition at line 1483 of file registers.h.

#define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1   0x0200 /* ASYNC_CLK_ENA_LOW_EINT1 */

Definition at line 4344 of file registers.h.

#define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1_MASK   0x0200 /* ASYNC_CLK_ENA_LOW_EINT1 */

Definition at line 4345 of file registers.h.

#define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1_SHIFT   9 /* ASYNC_CLK_ENA_LOW_EINT1 */

Definition at line 4346 of file registers.h.

#define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1_WIDTH   1 /* ASYNC_CLK_ENA_LOW_EINT1 */

Definition at line 4347 of file registers.h.

#define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2   0x0200 /* ASYNC_CLK_ENA_LOW_EINT2 */

Definition at line 4688 of file registers.h.

#define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2_MASK   0x0200 /* ASYNC_CLK_ENA_LOW_EINT2 */

Definition at line 4689 of file registers.h.

#define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2_SHIFT   9 /* ASYNC_CLK_ENA_LOW_EINT2 */

Definition at line 4690 of file registers.h.

#define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2_WIDTH   1 /* ASYNC_CLK_ENA_LOW_EINT2 */

Definition at line 4691 of file registers.h.

#define ARIZONA_ASYNC_CLK_ENA_LOW_STS   0x0200 /* ASYNC_CLK_ENA_LOW_STS */

Definition at line 5013 of file registers.h.

#define ARIZONA_ASYNC_CLK_ENA_LOW_STS_MASK   0x0200 /* ASYNC_CLK_ENA_LOW_STS */

Definition at line 5014 of file registers.h.

#define ARIZONA_ASYNC_CLK_ENA_LOW_STS_SHIFT   9 /* ASYNC_CLK_ENA_LOW_STS */

Definition at line 5015 of file registers.h.

#define ARIZONA_ASYNC_CLK_ENA_LOW_STS_WIDTH   1 /* ASYNC_CLK_ENA_LOW_STS */

Definition at line 5016 of file registers.h.

#define ARIZONA_ASYNC_CLK_ENA_MASK   0x0040 /* ASYNC_CLK_ENA */

Definition at line 1484 of file registers.h.

#define ARIZONA_ASYNC_CLK_ENA_SHIFT   6 /* ASYNC_CLK_ENA */

Definition at line 1485 of file registers.h.

#define ARIZONA_ASYNC_CLK_ENA_WIDTH   1 /* ASYNC_CLK_ENA */

Definition at line 1486 of file registers.h.

#define ARIZONA_ASYNC_CLK_FREQ_MASK   0x0700 /* ASYNC_CLK_FREQ - [10:8] */

Definition at line 1480 of file registers.h.

#define ARIZONA_ASYNC_CLK_FREQ_SHIFT   8 /* ASYNC_CLK_FREQ - [10:8] */

Definition at line 1481 of file registers.h.

#define ARIZONA_ASYNC_CLK_FREQ_WIDTH   3 /* ASYNC_CLK_FREQ - [10:8] */

Definition at line 1482 of file registers.h.

#define ARIZONA_ASYNC_CLK_SRC_MASK   0x000F /* ASYNC_CLK_SRC - [3:0] */

Definition at line 1487 of file registers.h.

#define ARIZONA_ASYNC_CLK_SRC_SHIFT   0 /* ASYNC_CLK_SRC - [3:0] */

Definition at line 1488 of file registers.h.

#define ARIZONA_ASYNC_CLK_SRC_WIDTH   4 /* ASYNC_CLK_SRC - [3:0] */

Definition at line 1489 of file registers.h.

#define ARIZONA_ASYNC_CLOCK_1   0x112

Definition at line 69 of file registers.h.

#define ARIZONA_ASYNC_SAMPLE_RATE_1   0x113

Definition at line 70 of file registers.h.

#define ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS   0x11B

Definition at line 71 of file registers.h.

#define ARIZONA_ASYNC_SAMPLE_RATE_MASK   0x001F /* ASYNC_SAMPLE_RATE - [4:0] */

Definition at line 1494 of file registers.h.

#define ARIZONA_ASYNC_SAMPLE_RATE_SHIFT   0 /* ASYNC_SAMPLE_RATE - [4:0] */

Definition at line 1495 of file registers.h.

#define ARIZONA_ASYNC_SAMPLE_RATE_STS_MASK   0x001F /* ASYNC_SAMPLE_RATE_STS - [4:0] */

Definition at line 1501 of file registers.h.

#define ARIZONA_ASYNC_SAMPLE_RATE_STS_SHIFT   0 /* ASYNC_SAMPLE_RATE_STS - [4:0] */

Definition at line 1502 of file registers.h.

#define ARIZONA_ASYNC_SAMPLE_RATE_STS_WIDTH   5 /* ASYNC_SAMPLE_RATE_STS - [4:0] */

Definition at line 1503 of file registers.h.

#define ARIZONA_ASYNC_SAMPLE_RATE_WIDTH   5 /* ASYNC_SAMPLE_RATE - [4:0] */

Definition at line 1496 of file registers.h.

#define ARIZONA_BOOT_DONE_EINT1   0x0100 /* BOOT_DONE_EINT1 */

Definition at line 4364 of file registers.h.

#define ARIZONA_BOOT_DONE_EINT1_MASK   0x0100 /* BOOT_DONE_EINT1 */

Definition at line 4365 of file registers.h.

#define ARIZONA_BOOT_DONE_EINT1_SHIFT   8 /* BOOT_DONE_EINT1 */

Definition at line 4366 of file registers.h.

#define ARIZONA_BOOT_DONE_EINT1_WIDTH   1 /* BOOT_DONE_EINT1 */

Definition at line 4367 of file registers.h.

#define ARIZONA_BOOT_DONE_EINT2   0x0100 /* BOOT_DONE_EINT2 */

Definition at line 4708 of file registers.h.

#define ARIZONA_BOOT_DONE_EINT2_MASK   0x0100 /* BOOT_DONE_EINT2 */

Definition at line 4709 of file registers.h.

#define ARIZONA_BOOT_DONE_EINT2_SHIFT   8 /* BOOT_DONE_EINT2 */

Definition at line 4710 of file registers.h.

#define ARIZONA_BOOT_DONE_EINT2_WIDTH   1 /* BOOT_DONE_EINT2 */

Definition at line 4711 of file registers.h.

#define ARIZONA_BOOT_DONE_STS   0x0100 /* BOOT_DONE_STS */

Definition at line 5033 of file registers.h.

#define ARIZONA_BOOT_DONE_STS_MASK   0x0100 /* BOOT_DONE_STS */

Definition at line 5034 of file registers.h.

#define ARIZONA_BOOT_DONE_STS_SHIFT   8 /* BOOT_DONE_STS */

Definition at line 5035 of file registers.h.

#define ARIZONA_BOOT_DONE_STS_WIDTH   1 /* BOOT_DONE_STS */

Definition at line 5036 of file registers.h.

#define ARIZONA_CLK_32K_ENA   0x0040 /* CLK_32K_ENA */

Definition at line 1409 of file registers.h.

#define ARIZONA_CLK_32K_ENA_MASK   0x0040 /* CLK_32K_ENA */

Definition at line 1410 of file registers.h.

#define ARIZONA_CLK_32K_ENA_SHIFT   6 /* CLK_32K_ENA */

Definition at line 1411 of file registers.h.

#define ARIZONA_CLK_32K_ENA_WIDTH   1 /* CLK_32K_ENA */

Definition at line 1412 of file registers.h.

#define ARIZONA_CLK_32K_SRC_MASK   0x0003 /* CLK_32K_SRC - [1:0] */

Definition at line 1413 of file registers.h.

#define ARIZONA_CLK_32K_SRC_SHIFT   0 /* CLK_32K_SRC - [1:0] */

Definition at line 1414 of file registers.h.

#define ARIZONA_CLK_32K_SRC_WIDTH   2 /* CLK_32K_SRC - [1:0] */

Definition at line 1415 of file registers.h.

#define ARIZONA_CLKGEN_ERR_ASYNC_EINT1   0x0001 /* CLKGEN_ERR_ASYNC_EINT1 */

Definition at line 4312 of file registers.h.

#define ARIZONA_CLKGEN_ERR_ASYNC_EINT1_MASK   0x0001 /* CLKGEN_ERR_ASYNC_EINT1 */

Definition at line 4313 of file registers.h.

#define ARIZONA_CLKGEN_ERR_ASYNC_EINT1_SHIFT   0 /* CLKGEN_ERR_ASYNC_EINT1 */

Definition at line 4314 of file registers.h.

#define ARIZONA_CLKGEN_ERR_ASYNC_EINT1_WIDTH   1 /* CLKGEN_ERR_ASYNC_EINT1 */

Definition at line 4315 of file registers.h.

#define ARIZONA_CLKGEN_ERR_ASYNC_EINT2   0x0001 /* CLKGEN_ERR_ASYNC_EINT2 */

Definition at line 4656 of file registers.h.

#define ARIZONA_CLKGEN_ERR_ASYNC_EINT2_MASK   0x0001 /* CLKGEN_ERR_ASYNC_EINT2 */

Definition at line 4657 of file registers.h.

#define ARIZONA_CLKGEN_ERR_ASYNC_EINT2_SHIFT   0 /* CLKGEN_ERR_ASYNC_EINT2 */

Definition at line 4658 of file registers.h.

#define ARIZONA_CLKGEN_ERR_ASYNC_EINT2_WIDTH   1 /* CLKGEN_ERR_ASYNC_EINT2 */

Definition at line 4659 of file registers.h.

#define ARIZONA_CLKGEN_ERR_ASYNC_STS   0x0001 /* CLKGEN_ERR_ASYNC_STS */

Definition at line 4981 of file registers.h.

#define ARIZONA_CLKGEN_ERR_ASYNC_STS_MASK   0x0001 /* CLKGEN_ERR_ASYNC_STS */

Definition at line 4982 of file registers.h.

#define ARIZONA_CLKGEN_ERR_ASYNC_STS_SHIFT   0 /* CLKGEN_ERR_ASYNC_STS */

Definition at line 4983 of file registers.h.

#define ARIZONA_CLKGEN_ERR_ASYNC_STS_WIDTH   1 /* CLKGEN_ERR_ASYNC_STS */

Definition at line 4984 of file registers.h.

#define ARIZONA_CLKGEN_ERR_EINT1   0x0002 /* CLKGEN_ERR_EINT1 */

Definition at line 4308 of file registers.h.

#define ARIZONA_CLKGEN_ERR_EINT1_MASK   0x0002 /* CLKGEN_ERR_EINT1 */

Definition at line 4309 of file registers.h.

#define ARIZONA_CLKGEN_ERR_EINT1_SHIFT   1 /* CLKGEN_ERR_EINT1 */

Definition at line 4310 of file registers.h.

#define ARIZONA_CLKGEN_ERR_EINT1_WIDTH   1 /* CLKGEN_ERR_EINT1 */

Definition at line 4311 of file registers.h.

#define ARIZONA_CLKGEN_ERR_EINT2   0x0002 /* CLKGEN_ERR_EINT2 */

Definition at line 4652 of file registers.h.

#define ARIZONA_CLKGEN_ERR_EINT2_MASK   0x0002 /* CLKGEN_ERR_EINT2 */

Definition at line 4653 of file registers.h.

#define ARIZONA_CLKGEN_ERR_EINT2_SHIFT   1 /* CLKGEN_ERR_EINT2 */

Definition at line 4654 of file registers.h.

#define ARIZONA_CLKGEN_ERR_EINT2_WIDTH   1 /* CLKGEN_ERR_EINT2 */

Definition at line 4655 of file registers.h.

#define ARIZONA_CLKGEN_ERR_STS   0x0002 /* CLKGEN_ERR_STS */

Definition at line 4977 of file registers.h.

#define ARIZONA_CLKGEN_ERR_STS_MASK   0x0002 /* CLKGEN_ERR_STS */

Definition at line 4978 of file registers.h.

#define ARIZONA_CLKGEN_ERR_STS_SHIFT   1 /* CLKGEN_ERR_STS */

Definition at line 4979 of file registers.h.

#define ARIZONA_CLKGEN_ERR_STS_WIDTH   1 /* CLKGEN_ERR_STS */

Definition at line 4980 of file registers.h.

#define ARIZONA_CLOCK_32K_1   0x100

Definition at line 61 of file registers.h.

#define ARIZONA_CLOCK_CONTROL   0xF00

Definition at line 975 of file registers.h.

#define ARIZONA_COMFORT_NOISE_GENERATOR   0x70

Definition at line 51 of file registers.h.

#define ARIZONA_CPMIC_BYPASS   0x0002 /* CPMIC_BYPASS */

Definition at line 1859 of file registers.h.

#define ARIZONA_CPMIC_BYPASS_MASK   0x0002 /* CPMIC_BYPASS */

Definition at line 1860 of file registers.h.

#define ARIZONA_CPMIC_BYPASS_SHIFT   1 /* CPMIC_BYPASS */

Definition at line 1861 of file registers.h.

#define ARIZONA_CPMIC_BYPASS_WIDTH   1 /* CPMIC_BYPASS */

Definition at line 1862 of file registers.h.

#define ARIZONA_CPMIC_DISCH   0x0004 /* CPMIC_DISCH */

Definition at line 1855 of file registers.h.

#define ARIZONA_CPMIC_DISCH_MASK   0x0004 /* CPMIC_DISCH */

Definition at line 1856 of file registers.h.

#define ARIZONA_CPMIC_DISCH_SHIFT   2 /* CPMIC_DISCH */

Definition at line 1857 of file registers.h.

#define ARIZONA_CPMIC_DISCH_WIDTH   1 /* CPMIC_DISCH */

Definition at line 1858 of file registers.h.

#define ARIZONA_CPMIC_ENA   0x0001 /* CPMIC_ENA */

Definition at line 1863 of file registers.h.

#define ARIZONA_CPMIC_ENA_MASK   0x0001 /* CPMIC_ENA */

Definition at line 1864 of file registers.h.

#define ARIZONA_CPMIC_ENA_SHIFT   0 /* CPMIC_ENA */

Definition at line 1865 of file registers.h.

#define ARIZONA_CPMIC_ENA_WIDTH   1 /* CPMIC_ENA */

Definition at line 1866 of file registers.h.

#define ARIZONA_CTRL_IF_I2C1_CFG_1   0x09

Definition at line 22 of file registers.h.

#define ARIZONA_CTRL_IF_I2C1_CFG_2   0x0B

Definition at line 24 of file registers.h.

#define ARIZONA_CTRL_IF_I2C2_CFG_1   0x0A

Definition at line 23 of file registers.h.

#define ARIZONA_CTRL_IF_I2C2_CFG_2   0x0C

Definition at line 25 of file registers.h.

#define ARIZONA_CTRL_IF_SPI_CFG_1   0x08

Definition at line 21 of file registers.h.

#define ARIZONA_CTRL_IF_STATUS_1   0x0D

Definition at line 26 of file registers.h.

#define ARIZONA_CTRLIF_ERR_EINT1   0x0800 /* CTRLIF_ERR_EINT1 */

Definition at line 4336 of file registers.h.

#define ARIZONA_CTRLIF_ERR_EINT1_MASK   0x0800 /* CTRLIF_ERR_EINT1 */

Definition at line 4337 of file registers.h.

#define ARIZONA_CTRLIF_ERR_EINT1_SHIFT   11 /* CTRLIF_ERR_EINT1 */

Definition at line 4338 of file registers.h.

#define ARIZONA_CTRLIF_ERR_EINT1_WIDTH   1 /* CTRLIF_ERR_EINT1 */

Definition at line 4339 of file registers.h.

#define ARIZONA_CTRLIF_ERR_EINT2   0x0800 /* CTRLIF_ERR_EINT2 */

Definition at line 4680 of file registers.h.

#define ARIZONA_CTRLIF_ERR_EINT2_MASK   0x0800 /* CTRLIF_ERR_EINT2 */

Definition at line 4681 of file registers.h.

#define ARIZONA_CTRLIF_ERR_EINT2_SHIFT   11 /* CTRLIF_ERR_EINT2 */

Definition at line 4682 of file registers.h.

#define ARIZONA_CTRLIF_ERR_EINT2_WIDTH   1 /* CTRLIF_ERR_EINT2 */

Definition at line 4683 of file registers.h.

#define ARIZONA_CTRLIF_ERR_STS   0x0800 /* CTRLIF_ERR_STS */

Definition at line 5005 of file registers.h.

#define ARIZONA_CTRLIF_ERR_STS_MASK   0x0800 /* CTRLIF_ERR_STS */

Definition at line 5006 of file registers.h.

#define ARIZONA_CTRLIF_ERR_STS_SHIFT   11 /* CTRLIF_ERR_STS */

Definition at line 5007 of file registers.h.

#define ARIZONA_CTRLIF_ERR_STS_WIDTH   1 /* CTRLIF_ERR_STS */

Definition at line 5008 of file registers.h.

#define ARIZONA_DAC_AEC_CONTROL_1   0x450

Definition at line 206 of file registers.h.

#define ARIZONA_DAC_COMP_1   0x4DC

Definition at line 212 of file registers.h.

#define ARIZONA_DAC_COMP_2   0x4DD

Definition at line 213 of file registers.h.

#define ARIZONA_DAC_COMP_3   0x4DE

Definition at line 214 of file registers.h.

#define ARIZONA_DAC_COMP_4   0x4DF

Definition at line 215 of file registers.h.

#define ARIZONA_DAC_DIGITAL_VOLUME_1L   0x411

Definition at line 159 of file registers.h.

#define ARIZONA_DAC_DIGITAL_VOLUME_1R   0x415

Definition at line 163 of file registers.h.

#define ARIZONA_DAC_DIGITAL_VOLUME_2L   0x419

Definition at line 167 of file registers.h.

#define ARIZONA_DAC_DIGITAL_VOLUME_2R   0x41D

Definition at line 171 of file registers.h.

#define ARIZONA_DAC_DIGITAL_VOLUME_3L   0x421

Definition at line 175 of file registers.h.

#define ARIZONA_DAC_DIGITAL_VOLUME_3R   0x425

Definition at line 179 of file registers.h.

#define ARIZONA_DAC_DIGITAL_VOLUME_4L   0x429

Definition at line 183 of file registers.h.

#define ARIZONA_DAC_DIGITAL_VOLUME_4R   0x42D

Definition at line 187 of file registers.h.

#define ARIZONA_DAC_DIGITAL_VOLUME_5L   0x431

Definition at line 191 of file registers.h.

#define ARIZONA_DAC_DIGITAL_VOLUME_5R   0x435

Definition at line 195 of file registers.h.

#define ARIZONA_DAC_DIGITAL_VOLUME_6L   0x439

Definition at line 199 of file registers.h.

#define ARIZONA_DAC_DIGITAL_VOLUME_6R   0x43D

Definition at line 203 of file registers.h.

#define ARIZONA_DAC_SYS_OVERCLOCKED_STS   0x0400 /* DAC_SYS_OVERCLOCKED_STS */

Definition at line 5065 of file registers.h.

#define ARIZONA_DAC_SYS_OVERCLOCKED_STS_MASK   0x0400 /* DAC_SYS_OVERCLOCKED_STS */

Definition at line 5066 of file registers.h.

#define ARIZONA_DAC_SYS_OVERCLOCKED_STS_SHIFT   10 /* DAC_SYS_OVERCLOCKED_STS */

Definition at line 5067 of file registers.h.

#define ARIZONA_DAC_SYS_OVERCLOCKED_STS_WIDTH   1 /* DAC_SYS_OVERCLOCKED_STS */

Definition at line 5068 of file registers.h.

#define ARIZONA_DAC_UNDERCLOCKED_STS   0x0004 /* DAC_UNDERCLOCKED_STS */

Definition at line 5185 of file registers.h.

#define ARIZONA_DAC_UNDERCLOCKED_STS_MASK   0x0004 /* DAC_UNDERCLOCKED_STS */

Definition at line 5186 of file registers.h.

#define ARIZONA_DAC_UNDERCLOCKED_STS_SHIFT   2 /* DAC_UNDERCLOCKED_STS */

Definition at line 5187 of file registers.h.

#define ARIZONA_DAC_UNDERCLOCKED_STS_WIDTH   1 /* DAC_UNDERCLOCKED_STS */

Definition at line 5188 of file registers.h.

#define ARIZONA_DAC_VOLUME_LIMIT_1L   0x412

Definition at line 160 of file registers.h.

#define ARIZONA_DAC_VOLUME_LIMIT_1R   0x416

Definition at line 164 of file registers.h.

#define ARIZONA_DAC_VOLUME_LIMIT_2L   0x41A

Definition at line 168 of file registers.h.

#define ARIZONA_DAC_VOLUME_LIMIT_2R   0x41E

Definition at line 172 of file registers.h.

#define ARIZONA_DAC_VOLUME_LIMIT_3L   0x422

Definition at line 176 of file registers.h.

#define ARIZONA_DAC_VOLUME_LIMIT_3R   0x426

Definition at line 180 of file registers.h.

#define ARIZONA_DAC_VOLUME_LIMIT_5L   0x432

Definition at line 192 of file registers.h.

#define ARIZONA_DAC_VOLUME_LIMIT_5R   0x436

Definition at line 196 of file registers.h.

#define ARIZONA_DAC_VOLUME_LIMIT_6L   0x43A

Definition at line 200 of file registers.h.

#define ARIZONA_DAC_VOLUME_LIMIT_6R   0x43E

Definition at line 204 of file registers.h.

#define ARIZONA_DAC_WARP_OVERCLOCKED_STS   0x0200 /* DAC_WARP_OVERCLOCKED_STS */

Definition at line 5069 of file registers.h.

#define ARIZONA_DAC_WARP_OVERCLOCKED_STS_MASK   0x0200 /* DAC_WARP_OVERCLOCKED_STS */

Definition at line 5070 of file registers.h.

#define ARIZONA_DAC_WARP_OVERCLOCKED_STS_SHIFT   9 /* DAC_WARP_OVERCLOCKED_STS */

Definition at line 5071 of file registers.h.

#define ARIZONA_DAC_WARP_OVERCLOCKED_STS_WIDTH   1 /* DAC_WARP_OVERCLOCKED_STS */

Definition at line 5072 of file registers.h.

#define ARIZONA_DCS_DAC_DONE_EINT1   0x0080 /* DCS_DAC_DONE_EINT1 */

Definition at line 4368 of file registers.h.

#define ARIZONA_DCS_DAC_DONE_EINT1_MASK   0x0080 /* DCS_DAC_DONE_EINT1 */

Definition at line 4369 of file registers.h.

#define ARIZONA_DCS_DAC_DONE_EINT1_SHIFT   7 /* DCS_DAC_DONE_EINT1 */

Definition at line 4370 of file registers.h.

#define ARIZONA_DCS_DAC_DONE_EINT1_WIDTH   1 /* DCS_DAC_DONE_EINT1 */

Definition at line 4371 of file registers.h.

#define ARIZONA_DCS_DAC_DONE_EINT2   0x0080 /* DCS_DAC_DONE_EINT2 */

Definition at line 4712 of file registers.h.

#define ARIZONA_DCS_DAC_DONE_EINT2_MASK   0x0080 /* DCS_DAC_DONE_EINT2 */

Definition at line 4713 of file registers.h.

#define ARIZONA_DCS_DAC_DONE_EINT2_SHIFT   7 /* DCS_DAC_DONE_EINT2 */

Definition at line 4714 of file registers.h.

#define ARIZONA_DCS_DAC_DONE_EINT2_WIDTH   1 /* DCS_DAC_DONE_EINT2 */

Definition at line 4715 of file registers.h.

#define ARIZONA_DCS_DAC_DONE_STS   0x0080 /* DCS_DAC_DONE_STS */

Definition at line 5037 of file registers.h.

#define ARIZONA_DCS_DAC_DONE_STS_MASK   0x0080 /* DCS_DAC_DONE_STS */

Definition at line 5038 of file registers.h.

#define ARIZONA_DCS_DAC_DONE_STS_SHIFT   7 /* DCS_DAC_DONE_STS */

Definition at line 5039 of file registers.h.

#define ARIZONA_DCS_DAC_DONE_STS_WIDTH   1 /* DCS_DAC_DONE_STS */

Definition at line 5040 of file registers.h.

#define ARIZONA_DCS_HP_DONE_EINT1   0x0040 /* DCS_HP_DONE_EINT1 */

Definition at line 4372 of file registers.h.

#define ARIZONA_DCS_HP_DONE_EINT1_MASK   0x0040 /* DCS_HP_DONE_EINT1 */

Definition at line 4373 of file registers.h.

#define ARIZONA_DCS_HP_DONE_EINT1_SHIFT   6 /* DCS_HP_DONE_EINT1 */

Definition at line 4374 of file registers.h.

#define ARIZONA_DCS_HP_DONE_EINT1_WIDTH   1 /* DCS_HP_DONE_EINT1 */

Definition at line 4375 of file registers.h.

#define ARIZONA_DCS_HP_DONE_EINT2   0x0040 /* DCS_HP_DONE_EINT2 */

Definition at line 4716 of file registers.h.

#define ARIZONA_DCS_HP_DONE_EINT2_MASK   0x0040 /* DCS_HP_DONE_EINT2 */

Definition at line 4717 of file registers.h.

#define ARIZONA_DCS_HP_DONE_EINT2_SHIFT   6 /* DCS_HP_DONE_EINT2 */

Definition at line 4718 of file registers.h.

#define ARIZONA_DCS_HP_DONE_EINT2_WIDTH   1 /* DCS_HP_DONE_EINT2 */

Definition at line 4719 of file registers.h.

#define ARIZONA_DCS_HP_DONE_STS   0x0040 /* DCS_HP_DONE_STS */

Definition at line 5041 of file registers.h.

#define ARIZONA_DCS_HP_DONE_STS_MASK   0x0040 /* DCS_HP_DONE_STS */

Definition at line 5042 of file registers.h.

#define ARIZONA_DCS_HP_DONE_STS_SHIFT   6 /* DCS_HP_DONE_STS */

Definition at line 5043 of file registers.h.

#define ARIZONA_DCS_HP_DONE_STS_WIDTH   1 /* DCS_HP_DONE_STS */

Definition at line 5044 of file registers.h.

#define ARIZONA_DEVICE_REVISION   0x01

Definition at line 20 of file registers.h.

#define ARIZONA_DEVICE_REVISION_MASK   0x00FF /* DEVICE_REVISION - [7:0] */

Definition at line 1009 of file registers.h.

#define ARIZONA_DEVICE_REVISION_SHIFT   0 /* DEVICE_REVISION - [7:0] */

Definition at line 1010 of file registers.h.

#define ARIZONA_DEVICE_REVISION_WIDTH   8 /* DEVICE_REVISION - [7:0] */

Definition at line 1011 of file registers.h.

#define ARIZONA_DMIC1L_CONTROL   0x312

Definition at line 132 of file registers.h.

#define ARIZONA_DMIC1R_CONTROL   0x316

Definition at line 135 of file registers.h.

#define ARIZONA_DMIC2L_CONTROL   0x31A

Definition at line 138 of file registers.h.

#define ARIZONA_DMIC2R_CONTROL   0x31E

Definition at line 141 of file registers.h.

#define ARIZONA_DMIC3L_CONTROL   0x322

Definition at line 144 of file registers.h.

#define ARIZONA_DMIC3R_CONTROL   0x326

Definition at line 147 of file registers.h.

#define ARIZONA_DMIC4L_CONTROL   0x32A

Definition at line 150 of file registers.h.

#define ARIZONA_DMIC4R_CONTROL   0x32E

Definition at line 152 of file registers.h.

#define ARIZONA_DMICDAT1_PD   0x0001 /* DMICDAT1_PD */

Definition at line 4092 of file registers.h.

#define ARIZONA_DMICDAT1_PD_MASK   0x0001 /* DMICDAT1_PD */

Definition at line 4093 of file registers.h.

#define ARIZONA_DMICDAT1_PD_SHIFT   0 /* DMICDAT1_PD */

Definition at line 4094 of file registers.h.

#define ARIZONA_DMICDAT1_PD_WIDTH   1 /* DMICDAT1_PD */

Definition at line 4095 of file registers.h.

#define ARIZONA_DMICDAT2_PD   0x0002 /* DMICDAT2_PD */

Definition at line 4088 of file registers.h.

#define ARIZONA_DMICDAT2_PD_MASK   0x0002 /* DMICDAT2_PD */

Definition at line 4089 of file registers.h.

#define ARIZONA_DMICDAT2_PD_SHIFT   1 /* DMICDAT2_PD */

Definition at line 4090 of file registers.h.

#define ARIZONA_DMICDAT2_PD_WIDTH   1 /* DMICDAT2_PD */

Definition at line 4091 of file registers.h.

#define ARIZONA_DMICDAT3_PD   0x0004 /* DMICDAT3_PD */

Definition at line 4084 of file registers.h.

#define ARIZONA_DMICDAT3_PD_MASK   0x0004 /* DMICDAT3_PD */

Definition at line 4085 of file registers.h.

#define ARIZONA_DMICDAT3_PD_SHIFT   2 /* DMICDAT3_PD */

Definition at line 4086 of file registers.h.

#define ARIZONA_DMICDAT3_PD_WIDTH   1 /* DMICDAT3_PD */

Definition at line 4087 of file registers.h.

#define ARIZONA_DMICDAT4_PD   0x0008 /* DMICDAT4_PD */

Definition at line 4080 of file registers.h.

#define ARIZONA_DMICDAT4_PD_MASK   0x0008 /* DMICDAT4_PD */

Definition at line 4081 of file registers.h.

#define ARIZONA_DMICDAT4_PD_SHIFT   3 /* DMICDAT4_PD */

Definition at line 4082 of file registers.h.

#define ARIZONA_DMICDAT4_PD_WIDTH   1 /* DMICDAT4_PD */

Definition at line 4083 of file registers.h.

#define ARIZONA_DRC1_ANTICLIP   0x0008 /* DRC1_ANTICLIP */

Definition at line 6089 of file registers.h.

#define ARIZONA_DRC1_ANTICLIP_MASK   0x0008 /* DRC1_ANTICLIP */

Definition at line 6090 of file registers.h.

#define ARIZONA_DRC1_ANTICLIP_SHIFT   3 /* DRC1_ANTICLIP */

Definition at line 6091 of file registers.h.

#define ARIZONA_DRC1_ANTICLIP_WIDTH   1 /* DRC1_ANTICLIP */

Definition at line 6092 of file registers.h.

#define ARIZONA_DRC1_ATK_MASK   0x1E00 /* DRC1_ATK - [12:9] */

Definition at line 6105 of file registers.h.

#define ARIZONA_DRC1_ATK_SHIFT   9 /* DRC1_ATK - [12:9] */

Definition at line 6106 of file registers.h.

#define ARIZONA_DRC1_ATK_WIDTH   4 /* DRC1_ATK - [12:9] */

Definition at line 6107 of file registers.h.

#define ARIZONA_DRC1_CTRL1   0xE80

Definition at line 944 of file registers.h.

#define ARIZONA_DRC1_CTRL2   0xE81

Definition at line 945 of file registers.h.

#define ARIZONA_DRC1_CTRL3   0xE82

Definition at line 946 of file registers.h.

#define ARIZONA_DRC1_CTRL4   0xE83

Definition at line 947 of file registers.h.

#define ARIZONA_DRC1_CTRL5   0xE84

Definition at line 948 of file registers.h.

#define ARIZONA_DRC1_DCY_MASK   0x01E0 /* DRC1_DCY - [8:5] */

Definition at line 6108 of file registers.h.

#define ARIZONA_DRC1_DCY_SHIFT   5 /* DRC1_DCY - [8:5] */

Definition at line 6109 of file registers.h.

#define ARIZONA_DRC1_DCY_WIDTH   4 /* DRC1_DCY - [8:5] */

Definition at line 6110 of file registers.h.

#define ARIZONA_DRC1_HI_COMP_MASK   0x0038 /* DRC1_HI_COMP - [5:3] */

Definition at line 6133 of file registers.h.

#define ARIZONA_DRC1_HI_COMP_SHIFT   3 /* DRC1_HI_COMP - [5:3] */

Definition at line 6134 of file registers.h.

#define ARIZONA_DRC1_HI_COMP_WIDTH   3 /* DRC1_HI_COMP - [5:3] */

Definition at line 6135 of file registers.h.

#define ARIZONA_DRC1_KNEE2_IP_MASK   0x03E0 /* DRC1_KNEE2_IP - [9:5] */

Definition at line 6153 of file registers.h.

#define ARIZONA_DRC1_KNEE2_IP_SHIFT   5 /* DRC1_KNEE2_IP - [9:5] */

Definition at line 6154 of file registers.h.

#define ARIZONA_DRC1_KNEE2_IP_WIDTH   5 /* DRC1_KNEE2_IP - [9:5] */

Definition at line 6155 of file registers.h.

#define ARIZONA_DRC1_KNEE2_OP_ENA   0x0020 /* DRC1_KNEE2_OP_ENA */

Definition at line 6081 of file registers.h.

#define ARIZONA_DRC1_KNEE2_OP_ENA_MASK   0x0020 /* DRC1_KNEE2_OP_ENA */

Definition at line 6082 of file registers.h.

#define ARIZONA_DRC1_KNEE2_OP_ENA_SHIFT   5 /* DRC1_KNEE2_OP_ENA */

Definition at line 6083 of file registers.h.

#define ARIZONA_DRC1_KNEE2_OP_ENA_WIDTH   1 /* DRC1_KNEE2_OP_ENA */

Definition at line 6084 of file registers.h.

#define ARIZONA_DRC1_KNEE2_OP_MASK   0x001F /* DRC1_KNEE2_OP - [4:0] */

Definition at line 6156 of file registers.h.

#define ARIZONA_DRC1_KNEE2_OP_SHIFT   0 /* DRC1_KNEE2_OP - [4:0] */

Definition at line 6157 of file registers.h.

#define ARIZONA_DRC1_KNEE2_OP_WIDTH   5 /* DRC1_KNEE2_OP - [4:0] */

Definition at line 6158 of file registers.h.

#define ARIZONA_DRC1_KNEE_IP_MASK   0x07E0 /* DRC1_KNEE_IP - [10:5] */

Definition at line 6143 of file registers.h.

#define ARIZONA_DRC1_KNEE_IP_SHIFT   5 /* DRC1_KNEE_IP - [10:5] */

Definition at line 6144 of file registers.h.

#define ARIZONA_DRC1_KNEE_IP_WIDTH   6 /* DRC1_KNEE_IP - [10:5] */

Definition at line 6145 of file registers.h.

#define ARIZONA_DRC1_KNEE_OP_MASK   0x001F /* DRC1_KNEE_OP - [4:0] */

Definition at line 6146 of file registers.h.

#define ARIZONA_DRC1_KNEE_OP_SHIFT   0 /* DRC1_KNEE_OP - [4:0] */

Definition at line 6147 of file registers.h.

#define ARIZONA_DRC1_KNEE_OP_WIDTH   5 /* DRC1_KNEE_OP - [4:0] */

Definition at line 6148 of file registers.h.

#define ARIZONA_DRC1_LO_COMP_MASK   0x0007 /* DRC1_LO_COMP - [2:0] */

Definition at line 6136 of file registers.h.

#define ARIZONA_DRC1_LO_COMP_SHIFT   0 /* DRC1_LO_COMP - [2:0] */

Definition at line 6137 of file registers.h.

#define ARIZONA_DRC1_LO_COMP_WIDTH   3 /* DRC1_LO_COMP - [2:0] */

Definition at line 6138 of file registers.h.

#define ARIZONA_DRC1_MAXGAIN_MASK   0x0003 /* DRC1_MAXGAIN - [1:0] */

Definition at line 6114 of file registers.h.

#define ARIZONA_DRC1_MAXGAIN_SHIFT   0 /* DRC1_MAXGAIN - [1:0] */

Definition at line 6115 of file registers.h.

#define ARIZONA_DRC1_MAXGAIN_WIDTH   2 /* DRC1_MAXGAIN - [1:0] */

Definition at line 6116 of file registers.h.

#define ARIZONA_DRC1_MINGAIN_MASK   0x001C /* DRC1_MINGAIN - [4:2] */

Definition at line 6111 of file registers.h.

#define ARIZONA_DRC1_MINGAIN_SHIFT   2 /* DRC1_MINGAIN - [4:2] */

Definition at line 6112 of file registers.h.

#define ARIZONA_DRC1_MINGAIN_WIDTH   3 /* DRC1_MINGAIN - [4:2] */

Definition at line 6113 of file registers.h.

#define ARIZONA_DRC1_NG_ENA   0x0100 /* DRC1_NG_ENA */

Definition at line 6069 of file registers.h.

#define ARIZONA_DRC1_NG_ENA_MASK   0x0100 /* DRC1_NG_ENA */

Definition at line 6070 of file registers.h.

#define ARIZONA_DRC1_NG_ENA_SHIFT   8 /* DRC1_NG_ENA */

Definition at line 6071 of file registers.h.

#define ARIZONA_DRC1_NG_ENA_WIDTH   1 /* DRC1_NG_ENA */

Definition at line 6072 of file registers.h.

#define ARIZONA_DRC1_NG_EXP_MASK   0x0C00 /* DRC1_NG_EXP - [11:10] */

Definition at line 6124 of file registers.h.

#define ARIZONA_DRC1_NG_EXP_SHIFT   10 /* DRC1_NG_EXP - [11:10] */

Definition at line 6125 of file registers.h.

#define ARIZONA_DRC1_NG_EXP_WIDTH   2 /* DRC1_NG_EXP - [11:10] */

Definition at line 6126 of file registers.h.

#define ARIZONA_DRC1_NG_MINGAIN_MASK   0xF000 /* DRC1_NG_MINGAIN - [15:12] */

Definition at line 6121 of file registers.h.

#define ARIZONA_DRC1_NG_MINGAIN_SHIFT   12 /* DRC1_NG_MINGAIN - [15:12] */

Definition at line 6122 of file registers.h.

#define ARIZONA_DRC1_NG_MINGAIN_WIDTH   4 /* DRC1_NG_MINGAIN - [15:12] */

Definition at line 6123 of file registers.h.

#define ARIZONA_DRC1_QR   0x0010 /* DRC1_QR */

Definition at line 6085 of file registers.h.

#define ARIZONA_DRC1_QR_DCY_MASK   0x00C0 /* DRC1_QR_DCY - [7:6] */

Definition at line 6130 of file registers.h.

#define ARIZONA_DRC1_QR_DCY_SHIFT   6 /* DRC1_QR_DCY - [7:6] */

Definition at line 6131 of file registers.h.

#define ARIZONA_DRC1_QR_DCY_WIDTH   2 /* DRC1_QR_DCY - [7:6] */

Definition at line 6132 of file registers.h.

#define ARIZONA_DRC1_QR_MASK   0x0010 /* DRC1_QR */

Definition at line 6086 of file registers.h.

#define ARIZONA_DRC1_QR_SHIFT   4 /* DRC1_QR */

Definition at line 6087 of file registers.h.

#define ARIZONA_DRC1_QR_THR_MASK   0x0300 /* DRC1_QR_THR - [9:8] */

Definition at line 6127 of file registers.h.

#define ARIZONA_DRC1_QR_THR_SHIFT   8 /* DRC1_QR_THR - [9:8] */

Definition at line 6128 of file registers.h.

#define ARIZONA_DRC1_QR_THR_WIDTH   2 /* DRC1_QR_THR - [9:8] */

Definition at line 6129 of file registers.h.

#define ARIZONA_DRC1_QR_WIDTH   1 /* DRC1_QR */

Definition at line 6088 of file registers.h.

#define ARIZONA_DRC1_SIG_DET   0x0040 /* DRC1_SIG_DET */

Definition at line 6077 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_EINT1   0x0200 /* DRC1_SIG_DET_EINT1 */

Definition at line 4280 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_EINT1_MASK   0x0200 /* DRC1_SIG_DET_EINT1 */

Definition at line 4281 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_EINT1_SHIFT   9 /* DRC1_SIG_DET_EINT1 */

Definition at line 4282 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_EINT1_WIDTH   1 /* DRC1_SIG_DET_EINT1 */

Definition at line 4283 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_EINT2   0x0200 /* DRC1_SIG_DET_EINT2 */

Definition at line 4624 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_EINT2_MASK   0x0200 /* DRC1_SIG_DET_EINT2 */

Definition at line 4625 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_EINT2_SHIFT   9 /* DRC1_SIG_DET_EINT2 */

Definition at line 4626 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_EINT2_WIDTH   1 /* DRC1_SIG_DET_EINT2 */

Definition at line 4627 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_MASK   0x0040 /* DRC1_SIG_DET */

Definition at line 6078 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_MODE   0x0080 /* DRC1_SIG_DET_MODE */

Definition at line 6073 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_MODE_MASK   0x0080 /* DRC1_SIG_DET_MODE */

Definition at line 6074 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_MODE_SHIFT   7 /* DRC1_SIG_DET_MODE */

Definition at line 6075 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_MODE_WIDTH   1 /* DRC1_SIG_DET_MODE */

Definition at line 6076 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_PK_MASK   0x0600 /* DRC1_SIG_DET_PK - [10:9] */

Definition at line 6066 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_PK_SHIFT   9 /* DRC1_SIG_DET_PK - [10:9] */

Definition at line 6067 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_PK_WIDTH   2 /* DRC1_SIG_DET_PK - [10:9] */

Definition at line 6068 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_RMS_MASK   0xF800 /* DRC1_SIG_DET_RMS - [15:11] */

Definition at line 6063 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_RMS_SHIFT   11 /* DRC1_SIG_DET_RMS - [15:11] */

Definition at line 6064 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_RMS_WIDTH   5 /* DRC1_SIG_DET_RMS - [15:11] */

Definition at line 6065 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_SHIFT   6 /* DRC1_SIG_DET */

Definition at line 6079 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_STS   0x0200 /* DRC1_SIG_DET_STS */

Definition at line 4949 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_STS_MASK   0x0200 /* DRC1_SIG_DET_STS */

Definition at line 4950 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_STS_SHIFT   9 /* DRC1_SIG_DET_STS */

Definition at line 4951 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_STS_WIDTH   1 /* DRC1_SIG_DET_STS */

Definition at line 4952 of file registers.h.

#define ARIZONA_DRC1_SIG_DET_WIDTH   1 /* DRC1_SIG_DET */

Definition at line 6080 of file registers.h.

#define ARIZONA_DRC1L_ENA   0x0002 /* DRC1L_ENA */

Definition at line 6093 of file registers.h.

#define ARIZONA_DRC1L_ENA_MASK   0x0002 /* DRC1L_ENA */

Definition at line 6094 of file registers.h.

#define ARIZONA_DRC1L_ENA_SHIFT   1 /* DRC1L_ENA */

Definition at line 6095 of file registers.h.

#define ARIZONA_DRC1L_ENA_WIDTH   1 /* DRC1L_ENA */

Definition at line 6096 of file registers.h.

#define ARIZONA_DRC1LMIX_INPUT_1_SOURCE   0x8C0

Definition at line 609 of file registers.h.

#define ARIZONA_DRC1LMIX_INPUT_1_VOLUME   0x8C1

Definition at line 610 of file registers.h.

#define ARIZONA_DRC1LMIX_INPUT_2_SOURCE   0x8C2

Definition at line 611 of file registers.h.

#define ARIZONA_DRC1LMIX_INPUT_2_VOLUME   0x8C3

Definition at line 612 of file registers.h.

#define ARIZONA_DRC1LMIX_INPUT_3_SOURCE   0x8C4

Definition at line 613 of file registers.h.

#define ARIZONA_DRC1LMIX_INPUT_3_VOLUME   0x8C5

Definition at line 614 of file registers.h.

#define ARIZONA_DRC1LMIX_INPUT_4_SOURCE   0x8C6

Definition at line 615 of file registers.h.

#define ARIZONA_DRC1LMIX_INPUT_4_VOLUME   0x8C7

Definition at line 616 of file registers.h.

#define ARIZONA_DRC1R_ENA   0x0001 /* DRC1R_ENA */

Definition at line 6097 of file registers.h.

#define ARIZONA_DRC1R_ENA_MASK   0x0001 /* DRC1R_ENA */

Definition at line 6098 of file registers.h.

#define ARIZONA_DRC1R_ENA_SHIFT   0 /* DRC1R_ENA */

Definition at line 6099 of file registers.h.

#define ARIZONA_DRC1R_ENA_WIDTH   1 /* DRC1R_ENA */

Definition at line 6100 of file registers.h.

#define ARIZONA_DRC1RMIX_INPUT_1_SOURCE   0x8C8

Definition at line 617 of file registers.h.

#define ARIZONA_DRC1RMIX_INPUT_1_VOLUME   0x8C9

Definition at line 618 of file registers.h.

#define ARIZONA_DRC1RMIX_INPUT_2_SOURCE   0x8CA

Definition at line 619 of file registers.h.

#define ARIZONA_DRC1RMIX_INPUT_2_VOLUME   0x8CB

Definition at line 620 of file registers.h.

#define ARIZONA_DRC1RMIX_INPUT_3_SOURCE   0x8CC

Definition at line 621 of file registers.h.

#define ARIZONA_DRC1RMIX_INPUT_3_VOLUME   0x8CD

Definition at line 622 of file registers.h.

#define ARIZONA_DRC1RMIX_INPUT_4_SOURCE   0x8CE

Definition at line 623 of file registers.h.

#define ARIZONA_DRC1RMIX_INPUT_4_VOLUME   0x8CF

Definition at line 624 of file registers.h.

#define ARIZONA_DRC2_ANTICLIP   0x0008 /* DRC2_ANTICLIP */

Definition at line 6189 of file registers.h.

#define ARIZONA_DRC2_ANTICLIP_MASK   0x0008 /* DRC2_ANTICLIP */

Definition at line 6190 of file registers.h.

#define ARIZONA_DRC2_ANTICLIP_SHIFT   3 /* DRC2_ANTICLIP */

Definition at line 6191 of file registers.h.

#define ARIZONA_DRC2_ANTICLIP_WIDTH   1 /* DRC2_ANTICLIP */

Definition at line 6192 of file registers.h.

#define ARIZONA_DRC2_ATK_MASK   0x1E00 /* DRC2_ATK - [12:9] */

Definition at line 6205 of file registers.h.

#define ARIZONA_DRC2_ATK_SHIFT   9 /* DRC2_ATK - [12:9] */

Definition at line 6206 of file registers.h.

#define ARIZONA_DRC2_ATK_WIDTH   4 /* DRC2_ATK - [12:9] */

Definition at line 6207 of file registers.h.

#define ARIZONA_DRC2_CTRL1   0xE89

Definition at line 949 of file registers.h.

#define ARIZONA_DRC2_CTRL2   0xE8A

Definition at line 950 of file registers.h.

#define ARIZONA_DRC2_CTRL3   0xE8B

Definition at line 951 of file registers.h.

#define ARIZONA_DRC2_CTRL4   0xE8C

Definition at line 952 of file registers.h.

#define ARIZONA_DRC2_CTRL5   0xE8D

Definition at line 953 of file registers.h.

#define ARIZONA_DRC2_DCY_MASK   0x01E0 /* DRC2_DCY - [8:5] */

Definition at line 6208 of file registers.h.

#define ARIZONA_DRC2_DCY_SHIFT   5 /* DRC2_DCY - [8:5] */

Definition at line 6209 of file registers.h.

#define ARIZONA_DRC2_DCY_WIDTH   4 /* DRC2_DCY - [8:5] */

Definition at line 6210 of file registers.h.

#define ARIZONA_DRC2_HI_COMP_MASK   0x0038 /* DRC2_HI_COMP - [5:3] */

Definition at line 6233 of file registers.h.

#define ARIZONA_DRC2_HI_COMP_SHIFT   3 /* DRC2_HI_COMP - [5:3] */

Definition at line 6234 of file registers.h.

#define ARIZONA_DRC2_HI_COMP_WIDTH   3 /* DRC2_HI_COMP - [5:3] */

Definition at line 6235 of file registers.h.

#define ARIZONA_DRC2_KNEE2_IP_MASK   0x03E0 /* DRC2_KNEE2_IP - [9:5] */

Definition at line 6253 of file registers.h.

#define ARIZONA_DRC2_KNEE2_IP_SHIFT   5 /* DRC2_KNEE2_IP - [9:5] */

Definition at line 6254 of file registers.h.

#define ARIZONA_DRC2_KNEE2_IP_WIDTH   5 /* DRC2_KNEE2_IP - [9:5] */

Definition at line 6255 of file registers.h.

#define ARIZONA_DRC2_KNEE2_OP_ENA   0x0020 /* DRC2_KNEE2_OP_ENA */

Definition at line 6181 of file registers.h.

#define ARIZONA_DRC2_KNEE2_OP_ENA_MASK   0x0020 /* DRC2_KNEE2_OP_ENA */

Definition at line 6182 of file registers.h.

#define ARIZONA_DRC2_KNEE2_OP_ENA_SHIFT   5 /* DRC2_KNEE2_OP_ENA */

Definition at line 6183 of file registers.h.

#define ARIZONA_DRC2_KNEE2_OP_ENA_WIDTH   1 /* DRC2_KNEE2_OP_ENA */

Definition at line 6184 of file registers.h.

#define ARIZONA_DRC2_KNEE2_OP_MASK   0x001F /* DRC2_KNEE2_OP - [4:0] */

Definition at line 6256 of file registers.h.

#define ARIZONA_DRC2_KNEE2_OP_SHIFT   0 /* DRC2_KNEE2_OP - [4:0] */

Definition at line 6257 of file registers.h.

#define ARIZONA_DRC2_KNEE2_OP_WIDTH   5 /* DRC2_KNEE2_OP - [4:0] */

Definition at line 6258 of file registers.h.

#define ARIZONA_DRC2_KNEE_IP_MASK   0x07E0 /* DRC2_KNEE_IP - [10:5] */

Definition at line 6243 of file registers.h.

#define ARIZONA_DRC2_KNEE_IP_SHIFT   5 /* DRC2_KNEE_IP - [10:5] */

Definition at line 6244 of file registers.h.

#define ARIZONA_DRC2_KNEE_IP_WIDTH   6 /* DRC2_KNEE_IP - [10:5] */

Definition at line 6245 of file registers.h.

#define ARIZONA_DRC2_KNEE_OP_MASK   0x001F /* DRC2_KNEE_OP - [4:0] */

Definition at line 6246 of file registers.h.

#define ARIZONA_DRC2_KNEE_OP_SHIFT   0 /* DRC2_KNEE_OP - [4:0] */

Definition at line 6247 of file registers.h.

#define ARIZONA_DRC2_KNEE_OP_WIDTH   5 /* DRC2_KNEE_OP - [4:0] */

Definition at line 6248 of file registers.h.

#define ARIZONA_DRC2_LO_COMP_MASK   0x0007 /* DRC2_LO_COMP - [2:0] */

Definition at line 6236 of file registers.h.

#define ARIZONA_DRC2_LO_COMP_SHIFT   0 /* DRC2_LO_COMP - [2:0] */

Definition at line 6237 of file registers.h.

#define ARIZONA_DRC2_LO_COMP_WIDTH   3 /* DRC2_LO_COMP - [2:0] */

Definition at line 6238 of file registers.h.

#define ARIZONA_DRC2_MAXGAIN_MASK   0x0003 /* DRC2_MAXGAIN - [1:0] */

Definition at line 6214 of file registers.h.

#define ARIZONA_DRC2_MAXGAIN_SHIFT   0 /* DRC2_MAXGAIN - [1:0] */

Definition at line 6215 of file registers.h.

#define ARIZONA_DRC2_MAXGAIN_WIDTH   2 /* DRC2_MAXGAIN - [1:0] */

Definition at line 6216 of file registers.h.

#define ARIZONA_DRC2_MINGAIN_MASK   0x001C /* DRC2_MINGAIN - [4:2] */

Definition at line 6211 of file registers.h.

#define ARIZONA_DRC2_MINGAIN_SHIFT   2 /* DRC2_MINGAIN - [4:2] */

Definition at line 6212 of file registers.h.

#define ARIZONA_DRC2_MINGAIN_WIDTH   3 /* DRC2_MINGAIN - [4:2] */

Definition at line 6213 of file registers.h.

#define ARIZONA_DRC2_NG_ENA   0x0100 /* DRC2_NG_ENA */

Definition at line 6169 of file registers.h.

#define ARIZONA_DRC2_NG_ENA_MASK   0x0100 /* DRC2_NG_ENA */

Definition at line 6170 of file registers.h.

#define ARIZONA_DRC2_NG_ENA_SHIFT   8 /* DRC2_NG_ENA */

Definition at line 6171 of file registers.h.

#define ARIZONA_DRC2_NG_ENA_WIDTH   1 /* DRC2_NG_ENA */

Definition at line 6172 of file registers.h.

#define ARIZONA_DRC2_NG_EXP_MASK   0x0C00 /* DRC2_NG_EXP - [11:10] */

Definition at line 6224 of file registers.h.

#define ARIZONA_DRC2_NG_EXP_SHIFT   10 /* DRC2_NG_EXP - [11:10] */

Definition at line 6225 of file registers.h.

#define ARIZONA_DRC2_NG_EXP_WIDTH   2 /* DRC2_NG_EXP - [11:10] */

Definition at line 6226 of file registers.h.

#define ARIZONA_DRC2_NG_MINGAIN_MASK   0xF000 /* DRC2_NG_MINGAIN - [15:12] */

Definition at line 6221 of file registers.h.

#define ARIZONA_DRC2_NG_MINGAIN_SHIFT   12 /* DRC2_NG_MINGAIN - [15:12] */

Definition at line 6222 of file registers.h.

#define ARIZONA_DRC2_NG_MINGAIN_WIDTH   4 /* DRC2_NG_MINGAIN - [15:12] */

Definition at line 6223 of file registers.h.

#define ARIZONA_DRC2_QR   0x0010 /* DRC2_QR */

Definition at line 6185 of file registers.h.

#define ARIZONA_DRC2_QR_DCY_MASK   0x00C0 /* DRC2_QR_DCY - [7:6] */

Definition at line 6230 of file registers.h.

#define ARIZONA_DRC2_QR_DCY_SHIFT   6 /* DRC2_QR_DCY - [7:6] */

Definition at line 6231 of file registers.h.

#define ARIZONA_DRC2_QR_DCY_WIDTH   2 /* DRC2_QR_DCY - [7:6] */

Definition at line 6232 of file registers.h.

#define ARIZONA_DRC2_QR_MASK   0x0010 /* DRC2_QR */

Definition at line 6186 of file registers.h.

#define ARIZONA_DRC2_QR_SHIFT   4 /* DRC2_QR */

Definition at line 6187 of file registers.h.

#define ARIZONA_DRC2_QR_THR_MASK   0x0300 /* DRC2_QR_THR - [9:8] */

Definition at line 6227 of file registers.h.

#define ARIZONA_DRC2_QR_THR_SHIFT   8 /* DRC2_QR_THR - [9:8] */

Definition at line 6228 of file registers.h.

#define ARIZONA_DRC2_QR_THR_WIDTH   2 /* DRC2_QR_THR - [9:8] */

Definition at line 6229 of file registers.h.

#define ARIZONA_DRC2_QR_WIDTH   1 /* DRC2_QR */

Definition at line 6188 of file registers.h.

#define ARIZONA_DRC2_SIG_DET   0x0040 /* DRC2_SIG_DET */

Definition at line 6177 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_EINT1   0x0400 /* DRC2_SIG_DET_EINT1 */

Definition at line 4276 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_EINT1_MASK   0x0400 /* DRC2_SIG_DET_EINT1 */

Definition at line 4277 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_EINT1_SHIFT   10 /* DRC2_SIG_DET_EINT1 */

Definition at line 4278 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_EINT1_WIDTH   1 /* DRC2_SIG_DET_EINT1 */

Definition at line 4279 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_EINT2   0x0400 /* DRC2_SIG_DET_EINT2 */

Definition at line 4620 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_EINT2_MASK   0x0400 /* DRC2_SIG_DET_EINT2 */

Definition at line 4621 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_EINT2_SHIFT   10 /* DRC2_SIG_DET_EINT2 */

Definition at line 4622 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_EINT2_WIDTH   1 /* DRC2_SIG_DET_EINT2 */

Definition at line 4623 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_MASK   0x0040 /* DRC2_SIG_DET */

Definition at line 6178 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_MODE   0x0080 /* DRC2_SIG_DET_MODE */

Definition at line 6173 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_MODE_MASK   0x0080 /* DRC2_SIG_DET_MODE */

Definition at line 6174 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_MODE_SHIFT   7 /* DRC2_SIG_DET_MODE */

Definition at line 6175 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_MODE_WIDTH   1 /* DRC2_SIG_DET_MODE */

Definition at line 6176 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_PK_MASK   0x0600 /* DRC2_SIG_DET_PK - [10:9] */

Definition at line 6166 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_PK_SHIFT   9 /* DRC2_SIG_DET_PK - [10:9] */

Definition at line 6167 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_PK_WIDTH   2 /* DRC2_SIG_DET_PK - [10:9] */

Definition at line 6168 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_RMS_MASK   0xF800 /* DRC2_SIG_DET_RMS - [15:11] */

Definition at line 6163 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_RMS_SHIFT   11 /* DRC2_SIG_DET_RMS - [15:11] */

Definition at line 6164 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_RMS_WIDTH   5 /* DRC2_SIG_DET_RMS - [15:11] */

Definition at line 6165 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_SHIFT   6 /* DRC2_SIG_DET */

Definition at line 6179 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_STS   0x0400 /* DRC2_SIG_DET_STS */

Definition at line 4945 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_STS_MASK   0x0400 /* DRC2_SIG_DET_STS */

Definition at line 4946 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_STS_SHIFT   10 /* DRC2_SIG_DET_STS */

Definition at line 4947 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_STS_WIDTH   1 /* DRC2_SIG_DET_STS */

Definition at line 4948 of file registers.h.

#define ARIZONA_DRC2_SIG_DET_WIDTH   1 /* DRC2_SIG_DET */

Definition at line 6180 of file registers.h.

#define ARIZONA_DRC2L_ENA   0x0002 /* DRC2L_ENA */

Definition at line 6193 of file registers.h.

#define ARIZONA_DRC2L_ENA_MASK   0x0002 /* DRC2L_ENA */

Definition at line 6194 of file registers.h.

#define ARIZONA_DRC2L_ENA_SHIFT   1 /* DRC2L_ENA */

Definition at line 6195 of file registers.h.

#define ARIZONA_DRC2L_ENA_WIDTH   1 /* DRC2L_ENA */

Definition at line 6196 of file registers.h.

#define ARIZONA_DRC2LMIX_INPUT_1_SOURCE   0x8D0

Definition at line 625 of file registers.h.

#define ARIZONA_DRC2LMIX_INPUT_1_VOLUME   0x8D1

Definition at line 626 of file registers.h.

#define ARIZONA_DRC2LMIX_INPUT_2_SOURCE   0x8D2

Definition at line 627 of file registers.h.

#define ARIZONA_DRC2LMIX_INPUT_2_VOLUME   0x8D3

Definition at line 628 of file registers.h.

#define ARIZONA_DRC2LMIX_INPUT_3_SOURCE   0x8D4

Definition at line 629 of file registers.h.

#define ARIZONA_DRC2LMIX_INPUT_3_VOLUME   0x8D5

Definition at line 630 of file registers.h.

#define ARIZONA_DRC2LMIX_INPUT_4_SOURCE   0x8D6

Definition at line 631 of file registers.h.

#define ARIZONA_DRC2LMIX_INPUT_4_VOLUME   0x8D7

Definition at line 632 of file registers.h.

#define ARIZONA_DRC2R_ENA   0x0001 /* DRC2R_ENA */

Definition at line 6197 of file registers.h.

#define ARIZONA_DRC2R_ENA_MASK   0x0001 /* DRC2R_ENA */

Definition at line 6198 of file registers.h.

#define ARIZONA_DRC2R_ENA_SHIFT   0 /* DRC2R_ENA */

Definition at line 6199 of file registers.h.

#define ARIZONA_DRC2R_ENA_WIDTH   1 /* DRC2R_ENA */

Definition at line 6200 of file registers.h.

#define ARIZONA_DRC2RMIX_INPUT_1_SOURCE   0x8D8

Definition at line 633 of file registers.h.

#define ARIZONA_DRC2RMIX_INPUT_1_VOLUME   0x8D9

Definition at line 634 of file registers.h.

#define ARIZONA_DRC2RMIX_INPUT_2_SOURCE   0x8DA

Definition at line 635 of file registers.h.

#define ARIZONA_DRC2RMIX_INPUT_2_VOLUME   0x8DB

Definition at line 636 of file registers.h.

#define ARIZONA_DRC2RMIX_INPUT_3_SOURCE   0x8DC

Definition at line 637 of file registers.h.

#define ARIZONA_DRC2RMIX_INPUT_3_VOLUME   0x8DD

Definition at line 638 of file registers.h.

#define ARIZONA_DRC2RMIX_INPUT_4_SOURCE   0x8DE

Definition at line 639 of file registers.h.

#define ARIZONA_DRC2RMIX_INPUT_4_VOLUME   0x8DF

Definition at line 640 of file registers.h.

#define ARIZONA_DSP1_CLK_SEL_MASK   0x0007 /* DSP1_CLK_SEL - [2:0] */

Definition at line 6567 of file registers.h.

#define ARIZONA_DSP1_CLK_SEL_SHIFT   0 /* DSP1_CLK_SEL - [2:0] */

Definition at line 6568 of file registers.h.

#define ARIZONA_DSP1_CLK_SEL_WIDTH   3 /* DSP1_CLK_SEL - [2:0] */

Definition at line 6569 of file registers.h.

#define ARIZONA_DSP1_CLOCKING_1   0x1101

Definition at line 979 of file registers.h.

#define ARIZONA_DSP1_CONTROL_1   0x1100

Definition at line 978 of file registers.h.

#define ARIZONA_DSP1_CORE_ENA   0x0002 /* DSP1_CORE_ENA */

Definition at line 6555 of file registers.h.

#define ARIZONA_DSP1_CORE_ENA_MASK   0x0002 /* DSP1_CORE_ENA */

Definition at line 6556 of file registers.h.

#define ARIZONA_DSP1_CORE_ENA_SHIFT   1 /* DSP1_CORE_ENA */

Definition at line 6557 of file registers.h.

#define ARIZONA_DSP1_CORE_ENA_WIDTH   1 /* DSP1_CORE_ENA */

Definition at line 6558 of file registers.h.

#define ARIZONA_DSP1_MEM_ENA   0x0010 /* DSP1_MEM_ENA */

Definition at line 6547 of file registers.h.

#define ARIZONA_DSP1_MEM_ENA_MASK   0x0010 /* DSP1_MEM_ENA */

Definition at line 6548 of file registers.h.

#define ARIZONA_DSP1_MEM_ENA_SHIFT   4 /* DSP1_MEM_ENA */

Definition at line 6549 of file registers.h.

#define ARIZONA_DSP1_MEM_ENA_WIDTH   1 /* DSP1_MEM_ENA */

Definition at line 6550 of file registers.h.

#define ARIZONA_DSP1_PING_FULL   0x8000 /* DSP1_PING_FULL */

Definition at line 6582 of file registers.h.

#define ARIZONA_DSP1_PING_FULL_MASK   0x8000 /* DSP1_PING_FULL */

Definition at line 6583 of file registers.h.

#define ARIZONA_DSP1_PING_FULL_SHIFT   15 /* DSP1_PING_FULL */

Definition at line 6584 of file registers.h.

#define ARIZONA_DSP1_PING_FULL_WIDTH   1 /* DSP1_PING_FULL */

Definition at line 6585 of file registers.h.

#define ARIZONA_DSP1_PONG_FULL   0x4000 /* DSP1_PONG_FULL */

Definition at line 6586 of file registers.h.

#define ARIZONA_DSP1_PONG_FULL_MASK   0x4000 /* DSP1_PONG_FULL */

Definition at line 6587 of file registers.h.

#define ARIZONA_DSP1_PONG_FULL_SHIFT   14 /* DSP1_PONG_FULL */

Definition at line 6588 of file registers.h.

#define ARIZONA_DSP1_PONG_FULL_WIDTH   1 /* DSP1_PONG_FULL */

Definition at line 6589 of file registers.h.

#define ARIZONA_DSP1_RAM_RDY   0x0001 /* DSP1_RAM_RDY */

Definition at line 6574 of file registers.h.

#define ARIZONA_DSP1_RAM_RDY_EINT1   0x0100 /* DSP1_RAM_RDY_EINT1 */

Definition at line 4216 of file registers.h.

#define ARIZONA_DSP1_RAM_RDY_EINT1_MASK   0x0100 /* DSP1_RAM_RDY_EINT1 */

Definition at line 4217 of file registers.h.

#define ARIZONA_DSP1_RAM_RDY_EINT1_SHIFT   8 /* DSP1_RAM_RDY_EINT1 */

Definition at line 4218 of file registers.h.

#define ARIZONA_DSP1_RAM_RDY_EINT1_WIDTH   1 /* DSP1_RAM_RDY_EINT1 */

Definition at line 4219 of file registers.h.

#define ARIZONA_DSP1_RAM_RDY_EINT2   0x0100 /* DSP1_RAM_RDY_EINT2 */

Definition at line 4584 of file registers.h.

#define ARIZONA_DSP1_RAM_RDY_EINT2_MASK   0x0100 /* DSP1_RAM_RDY_EINT2 */

Definition at line 4585 of file registers.h.

#define ARIZONA_DSP1_RAM_RDY_EINT2_SHIFT   8 /* DSP1_RAM_RDY_EINT2 */

Definition at line 4586 of file registers.h.

#define ARIZONA_DSP1_RAM_RDY_EINT2_WIDTH   1 /* DSP1_RAM_RDY_EINT2 */

Definition at line 4587 of file registers.h.

#define ARIZONA_DSP1_RAM_RDY_MASK   0x0001 /* DSP1_RAM_RDY */

Definition at line 6575 of file registers.h.

#define ARIZONA_DSP1_RAM_RDY_SHIFT   0 /* DSP1_RAM_RDY */

Definition at line 6576 of file registers.h.

#define ARIZONA_DSP1_RAM_RDY_STS   0x0100 /* DSP1_RAM_RDY_STS */

Definition at line 4909 of file registers.h.

#define ARIZONA_DSP1_RAM_RDY_STS_MASK   0x0100 /* DSP1_RAM_RDY_STS */

Definition at line 4910 of file registers.h.

#define ARIZONA_DSP1_RAM_RDY_STS_SHIFT   8 /* DSP1_RAM_RDY_STS */

Definition at line 4911 of file registers.h.

#define ARIZONA_DSP1_RAM_RDY_STS_WIDTH   1 /* DSP1_RAM_RDY_STS */

Definition at line 4912 of file registers.h.

#define ARIZONA_DSP1_RAM_RDY_WIDTH   1 /* DSP1_RAM_RDY */

Definition at line 6577 of file registers.h.

#define ARIZONA_DSP1_RATE_MASK   0x7800 /* DSP1_RATE - [14:11] */

Definition at line 6544 of file registers.h.

#define ARIZONA_DSP1_RATE_SHIFT   11 /* DSP1_RATE - [14:11] */

Definition at line 6545 of file registers.h.

#define ARIZONA_DSP1_RATE_WIDTH   4 /* DSP1_RATE - [14:11] */

Definition at line 6546 of file registers.h.

#define ARIZONA_DSP1_START   0x0001 /* DSP1_START */

Definition at line 6559 of file registers.h.

#define ARIZONA_DSP1_START_MASK   0x0001 /* DSP1_START */

Definition at line 6560 of file registers.h.

#define ARIZONA_DSP1_START_SHIFT   0 /* DSP1_START */

Definition at line 6561 of file registers.h.

#define ARIZONA_DSP1_START_WIDTH   1 /* DSP1_START */

Definition at line 6562 of file registers.h.

#define ARIZONA_DSP1_STATUS_1   0x1104

Definition at line 980 of file registers.h.

#define ARIZONA_DSP1_STATUS_2   0x1105

Definition at line 981 of file registers.h.

#define ARIZONA_DSP1_SYS_ENA   0x0004 /* DSP1_SYS_ENA */

Definition at line 6551 of file registers.h.

#define ARIZONA_DSP1_SYS_ENA_MASK   0x0004 /* DSP1_SYS_ENA */

Definition at line 6552 of file registers.h.

#define ARIZONA_DSP1_SYS_ENA_SHIFT   2 /* DSP1_SYS_ENA */

Definition at line 6553 of file registers.h.

#define ARIZONA_DSP1_SYS_ENA_WIDTH   1 /* DSP1_SYS_ENA */

Definition at line 6554 of file registers.h.

#define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_MASK   0x00FF /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */

Definition at line 6590 of file registers.h.

#define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_SHIFT   0 /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */

Definition at line 6591 of file registers.h.

#define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_WIDTH   8 /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */

Definition at line 6592 of file registers.h.

#define ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE   0x950

Definition at line 689 of file registers.h.

#define ARIZONA_DSP1AUX2MIX_INPUT_1_SOURCE   0x958

Definition at line 690 of file registers.h.

#define ARIZONA_DSP1AUX3MIX_INPUT_1_SOURCE   0x960

Definition at line 691 of file registers.h.

#define ARIZONA_DSP1AUX4MIX_INPUT_1_SOURCE   0x968

Definition at line 692 of file registers.h.

#define ARIZONA_DSP1AUX5MIX_INPUT_1_SOURCE   0x970

Definition at line 693 of file registers.h.

#define ARIZONA_DSP1AUX6MIX_INPUT_1_SOURCE   0x978

Definition at line 694 of file registers.h.

#define ARIZONA_DSP1LMIX_INPUT_1_SOURCE   0x940

Definition at line 673 of file registers.h.

#define ARIZONA_DSP1LMIX_INPUT_1_VOLUME   0x941

Definition at line 674 of file registers.h.

#define ARIZONA_DSP1LMIX_INPUT_2_SOURCE   0x942

Definition at line 675 of file registers.h.

#define ARIZONA_DSP1LMIX_INPUT_2_VOLUME   0x943

Definition at line 676 of file registers.h.

#define ARIZONA_DSP1LMIX_INPUT_3_SOURCE   0x944

Definition at line 677 of file registers.h.

#define ARIZONA_DSP1LMIX_INPUT_3_VOLUME   0x945

Definition at line 678 of file registers.h.

#define ARIZONA_DSP1LMIX_INPUT_4_SOURCE   0x946

Definition at line 679 of file registers.h.

#define ARIZONA_DSP1LMIX_INPUT_4_VOLUME   0x947

Definition at line 680 of file registers.h.

#define ARIZONA_DSP1RMIX_INPUT_1_SOURCE   0x948

Definition at line 681 of file registers.h.

#define ARIZONA_DSP1RMIX_INPUT_1_VOLUME   0x949

Definition at line 682 of file registers.h.

#define ARIZONA_DSP1RMIX_INPUT_2_SOURCE   0x94A

Definition at line 683 of file registers.h.

#define ARIZONA_DSP1RMIX_INPUT_2_VOLUME   0x94B

Definition at line 684 of file registers.h.

#define ARIZONA_DSP1RMIX_INPUT_3_SOURCE   0x94C

Definition at line 685 of file registers.h.

#define ARIZONA_DSP1RMIX_INPUT_3_VOLUME   0x94D

Definition at line 686 of file registers.h.

#define ARIZONA_DSP1RMIX_INPUT_4_SOURCE   0x94E

Definition at line 687 of file registers.h.

#define ARIZONA_DSP1RMIX_INPUT_4_VOLUME   0x94F

Definition at line 688 of file registers.h.

#define ARIZONA_DSP2_CLOCKING_1   0x1201

Definition at line 983 of file registers.h.

#define ARIZONA_DSP2_CONTROL_1   0x1200

Definition at line 982 of file registers.h.

#define ARIZONA_DSP2_RAM_RDY_EINT1   0x0200 /* DSP2_RAM_RDY_EINT1 */

Definition at line 4212 of file registers.h.

#define ARIZONA_DSP2_RAM_RDY_EINT1_MASK   0x0200 /* DSP2_RAM_RDY_EINT1 */

Definition at line 4213 of file registers.h.

#define ARIZONA_DSP2_RAM_RDY_EINT1_SHIFT   9 /* DSP2_RAM_RDY_EINT1 */

Definition at line 4214 of file registers.h.

#define ARIZONA_DSP2_RAM_RDY_EINT1_WIDTH   1 /* DSP2_RAM_RDY_EINT1 */

Definition at line 4215 of file registers.h.

#define ARIZONA_DSP2_STATUS_1   0x1204

Definition at line 984 of file registers.h.

#define ARIZONA_DSP2_STATUS_2   0x1205

Definition at line 985 of file registers.h.

#define ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE   0x990

Definition at line 711 of file registers.h.

#define ARIZONA_DSP2AUX2MIX_INPUT_1_SOURCE   0x998

Definition at line 712 of file registers.h.

#define ARIZONA_DSP2AUX3MIX_INPUT_1_SOURCE   0x9A0

Definition at line 713 of file registers.h.

#define ARIZONA_DSP2AUX4MIX_INPUT_1_SOURCE   0x9A8

Definition at line 714 of file registers.h.

#define ARIZONA_DSP2AUX5MIX_INPUT_1_SOURCE   0x9B0

Definition at line 715 of file registers.h.

#define ARIZONA_DSP2AUX6MIX_INPUT_1_SOURCE   0x9B8

Definition at line 716 of file registers.h.

#define ARIZONA_DSP2LMIX_INPUT_1_SOURCE   0x980

Definition at line 695 of file registers.h.

#define ARIZONA_DSP2LMIX_INPUT_1_VOLUME   0x981

Definition at line 696 of file registers.h.

#define ARIZONA_DSP2LMIX_INPUT_2_SOURCE   0x982

Definition at line 697 of file registers.h.

#define ARIZONA_DSP2LMIX_INPUT_2_VOLUME   0x983

Definition at line 698 of file registers.h.

#define ARIZONA_DSP2LMIX_INPUT_3_SOURCE   0x984

Definition at line 699 of file registers.h.

#define ARIZONA_DSP2LMIX_INPUT_3_VOLUME   0x985

Definition at line 700 of file registers.h.

#define ARIZONA_DSP2LMIX_INPUT_4_SOURCE   0x986

Definition at line 701 of file registers.h.

#define ARIZONA_DSP2LMIX_INPUT_4_VOLUME   0x987

Definition at line 702 of file registers.h.

#define ARIZONA_DSP2RMIX_INPUT_1_SOURCE   0x988

Definition at line 703 of file registers.h.

#define ARIZONA_DSP2RMIX_INPUT_1_VOLUME   0x989

Definition at line 704 of file registers.h.

#define ARIZONA_DSP2RMIX_INPUT_2_SOURCE   0x98A

Definition at line 705 of file registers.h.

#define ARIZONA_DSP2RMIX_INPUT_2_VOLUME   0x98B

Definition at line 706 of file registers.h.

#define ARIZONA_DSP2RMIX_INPUT_3_SOURCE   0x98C

Definition at line 707 of file registers.h.

#define ARIZONA_DSP2RMIX_INPUT_3_VOLUME   0x98D

Definition at line 708 of file registers.h.

#define ARIZONA_DSP2RMIX_INPUT_4_SOURCE   0x98E

Definition at line 709 of file registers.h.

#define ARIZONA_DSP2RMIX_INPUT_4_VOLUME   0x98F

Definition at line 710 of file registers.h.

#define ARIZONA_DSP3_CLOCKING_1   0x1301

Definition at line 987 of file registers.h.

#define ARIZONA_DSP3_CONTROL_1   0x1300

Definition at line 986 of file registers.h.

#define ARIZONA_DSP3_RAM_RDY_EINT1   0x0400 /* DSP3_RAM_RDY_EINT1 */

Definition at line 4208 of file registers.h.

#define ARIZONA_DSP3_RAM_RDY_EINT1_MASK   0x0400 /* DSP3_RAM_RDY_EINT1 */

Definition at line 4209 of file registers.h.

#define ARIZONA_DSP3_RAM_RDY_EINT1_SHIFT   10 /* DSP3_RAM_RDY_EINT1 */

Definition at line 4210 of file registers.h.

#define ARIZONA_DSP3_RAM_RDY_EINT1_WIDTH   1 /* DSP3_RAM_RDY_EINT1 */

Definition at line 4211 of file registers.h.

#define ARIZONA_DSP3_STATUS_1   0x1304

Definition at line 988 of file registers.h.

#define ARIZONA_DSP3_STATUS_2   0x1305

Definition at line 989 of file registers.h.

#define ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE   0x9D0

Definition at line 733 of file registers.h.

#define ARIZONA_DSP3AUX2MIX_INPUT_1_SOURCE   0x9D8

Definition at line 734 of file registers.h.

#define ARIZONA_DSP3AUX3MIX_INPUT_1_SOURCE   0x9E0

Definition at line 735 of file registers.h.

#define ARIZONA_DSP3AUX4MIX_INPUT_1_SOURCE   0x9E8

Definition at line 736 of file registers.h.

#define ARIZONA_DSP3AUX5MIX_INPUT_1_SOURCE   0x9F0

Definition at line 737 of file registers.h.

#define ARIZONA_DSP3AUX6MIX_INPUT_1_SOURCE   0x9F8

Definition at line 738 of file registers.h.

#define ARIZONA_DSP3LMIX_INPUT_1_SOURCE   0x9C0

Definition at line 717 of file registers.h.

#define ARIZONA_DSP3LMIX_INPUT_1_VOLUME   0x9C1

Definition at line 718 of file registers.h.

#define ARIZONA_DSP3LMIX_INPUT_2_SOURCE   0x9C2

Definition at line 719 of file registers.h.

#define ARIZONA_DSP3LMIX_INPUT_2_VOLUME   0x9C3

Definition at line 720 of file registers.h.

#define ARIZONA_DSP3LMIX_INPUT_3_SOURCE   0x9C4

Definition at line 721 of file registers.h.

#define ARIZONA_DSP3LMIX_INPUT_3_VOLUME   0x9C5

Definition at line 722 of file registers.h.

#define ARIZONA_DSP3LMIX_INPUT_4_SOURCE   0x9C6

Definition at line 723 of file registers.h.

#define ARIZONA_DSP3LMIX_INPUT_4_VOLUME   0x9C7

Definition at line 724 of file registers.h.

#define ARIZONA_DSP3RMIX_INPUT_1_SOURCE   0x9C8

Definition at line 725 of file registers.h.

#define ARIZONA_DSP3RMIX_INPUT_1_VOLUME   0x9C9

Definition at line 726 of file registers.h.

#define ARIZONA_DSP3RMIX_INPUT_2_SOURCE   0x9CA

Definition at line 727 of file registers.h.

#define ARIZONA_DSP3RMIX_INPUT_2_VOLUME   0x9CB

Definition at line 728 of file registers.h.

#define ARIZONA_DSP3RMIX_INPUT_3_SOURCE   0x9CC

Definition at line 729 of file registers.h.

#define ARIZONA_DSP3RMIX_INPUT_3_VOLUME   0x9CD

Definition at line 730 of file registers.h.

#define ARIZONA_DSP3RMIX_INPUT_4_SOURCE   0x9CE

Definition at line 731 of file registers.h.

#define ARIZONA_DSP3RMIX_INPUT_4_VOLUME   0x9CF

Definition at line 732 of file registers.h.

#define ARIZONA_DSP4_CLOCKING_1   0x1401

Definition at line 991 of file registers.h.

#define ARIZONA_DSP4_CONTROL_1   0x1400

Definition at line 990 of file registers.h.

#define ARIZONA_DSP4_RAM_RDY_EINT1   0x0800 /* DSP4_RAM_RDY_EINT1 */

Definition at line 4204 of file registers.h.

#define ARIZONA_DSP4_RAM_RDY_EINT1_MASK   0x0800 /* DSP4_RAM_RDY_EINT1 */

Definition at line 4205 of file registers.h.

#define ARIZONA_DSP4_RAM_RDY_EINT1_SHIFT   11 /* DSP4_RAM_RDY_EINT1 */

Definition at line 4206 of file registers.h.

#define ARIZONA_DSP4_RAM_RDY_EINT1_WIDTH   1 /* DSP4_RAM_RDY_EINT1 */

Definition at line 4207 of file registers.h.

#define ARIZONA_DSP4_STATUS_1   0x1404

Definition at line 992 of file registers.h.

#define ARIZONA_DSP4_STATUS_2   0x1405

Definition at line 993 of file registers.h.

#define ARIZONA_DSP4AUX1MIX_INPUT_1_SOURCE   0xA10

Definition at line 755 of file registers.h.

#define ARIZONA_DSP4AUX2MIX_INPUT_1_SOURCE   0xA18

Definition at line 756 of file registers.h.

#define ARIZONA_DSP4AUX3MIX_INPUT_1_SOURCE   0xA20

Definition at line 757 of file registers.h.

#define ARIZONA_DSP4AUX4MIX_INPUT_1_SOURCE   0xA28

Definition at line 758 of file registers.h.

#define ARIZONA_DSP4AUX5MIX_INPUT_1_SOURCE   0xA30

Definition at line 759 of file registers.h.

#define ARIZONA_DSP4AUX6MIX_INPUT_1_SOURCE   0xA38

Definition at line 760 of file registers.h.

#define ARIZONA_DSP4LMIX_INPUT_1_SOURCE   0xA00

Definition at line 739 of file registers.h.

#define ARIZONA_DSP4LMIX_INPUT_1_VOLUME   0xA01

Definition at line 740 of file registers.h.

#define ARIZONA_DSP4LMIX_INPUT_2_SOURCE   0xA02

Definition at line 741 of file registers.h.

#define ARIZONA_DSP4LMIX_INPUT_2_VOLUME   0xA03

Definition at line 742 of file registers.h.

#define ARIZONA_DSP4LMIX_INPUT_3_SOURCE   0xA04

Definition at line 743 of file registers.h.

#define ARIZONA_DSP4LMIX_INPUT_3_VOLUME   0xA05

Definition at line 744 of file registers.h.

#define ARIZONA_DSP4LMIX_INPUT_4_SOURCE   0xA06

Definition at line 745 of file registers.h.

#define ARIZONA_DSP4LMIX_INPUT_4_VOLUME   0xA07

Definition at line 746 of file registers.h.

#define ARIZONA_DSP4RMIX_INPUT_1_SOURCE   0xA08

Definition at line 747 of file registers.h.

#define ARIZONA_DSP4RMIX_INPUT_1_VOLUME   0xA09

Definition at line 748 of file registers.h.

#define ARIZONA_DSP4RMIX_INPUT_2_SOURCE   0xA0A

Definition at line 749 of file registers.h.

#define ARIZONA_DSP4RMIX_INPUT_2_VOLUME   0xA0B

Definition at line 750 of file registers.h.

#define ARIZONA_DSP4RMIX_INPUT_3_SOURCE   0xA0C

Definition at line 751 of file registers.h.

#define ARIZONA_DSP4RMIX_INPUT_3_VOLUME   0xA0D

Definition at line 752 of file registers.h.

#define ARIZONA_DSP4RMIX_INPUT_4_SOURCE   0xA0E

Definition at line 753 of file registers.h.

#define ARIZONA_DSP4RMIX_INPUT_4_VOLUME   0xA0F

Definition at line 754 of file registers.h.

#define ARIZONA_DSP_IRQ1   0x0001 /* DSP_IRQ1 */

Definition at line 5217 of file registers.h.

#define ARIZONA_DSP_IRQ1_EINT1   0x0001 /* DSP_IRQ1_EINT1 */

Definition at line 4248 of file registers.h.

#define ARIZONA_DSP_IRQ1_EINT1_MASK   0x0001 /* DSP_IRQ1_EINT1 */

Definition at line 4249 of file registers.h.

#define ARIZONA_DSP_IRQ1_EINT1_SHIFT   0 /* DSP_IRQ1_EINT1 */

Definition at line 4250 of file registers.h.

#define ARIZONA_DSP_IRQ1_EINT1_WIDTH   1 /* DSP_IRQ1_EINT1 */

Definition at line 4251 of file registers.h.

#define ARIZONA_DSP_IRQ1_EINT2   0x0001 /* DSP_IRQ1_EINT2 */

Definition at line 4592 of file registers.h.

#define ARIZONA_DSP_IRQ1_EINT2_MASK   0x0001 /* DSP_IRQ1_EINT2 */

Definition at line 4593 of file registers.h.

#define ARIZONA_DSP_IRQ1_EINT2_SHIFT   0 /* DSP_IRQ1_EINT2 */

Definition at line 4594 of file registers.h.

#define ARIZONA_DSP_IRQ1_EINT2_WIDTH   1 /* DSP_IRQ1_EINT2 */

Definition at line 4595 of file registers.h.

#define ARIZONA_DSP_IRQ1_MASK   0x0001 /* DSP_IRQ1 */

Definition at line 5218 of file registers.h.

#define ARIZONA_DSP_IRQ1_SHIFT   0 /* DSP_IRQ1 */

Definition at line 5219 of file registers.h.

#define ARIZONA_DSP_IRQ1_STS   0x0001 /* DSP_IRQ1_STS */

Definition at line 4917 of file registers.h.

#define ARIZONA_DSP_IRQ1_STS_MASK   0x0001 /* DSP_IRQ1_STS */

Definition at line 4918 of file registers.h.

#define ARIZONA_DSP_IRQ1_STS_SHIFT   0 /* DSP_IRQ1_STS */

Definition at line 4919 of file registers.h.

#define ARIZONA_DSP_IRQ1_STS_WIDTH   1 /* DSP_IRQ1_STS */

Definition at line 4920 of file registers.h.

#define ARIZONA_DSP_IRQ1_WIDTH   1 /* DSP_IRQ1 */

Definition at line 5220 of file registers.h.

#define ARIZONA_DSP_IRQ2   0x0002 /* DSP_IRQ2 */

Definition at line 5213 of file registers.h.

#define ARIZONA_DSP_IRQ2_EINT1   0x0002 /* DSP_IRQ2_EINT1 */

Definition at line 4244 of file registers.h.

#define ARIZONA_DSP_IRQ2_EINT1_MASK   0x0002 /* DSP_IRQ2_EINT1 */

Definition at line 4245 of file registers.h.

#define ARIZONA_DSP_IRQ2_EINT1_SHIFT   1 /* DSP_IRQ2_EINT1 */

Definition at line 4246 of file registers.h.

#define ARIZONA_DSP_IRQ2_EINT1_WIDTH   1 /* DSP_IRQ2_EINT1 */

Definition at line 4247 of file registers.h.

#define ARIZONA_DSP_IRQ2_EINT2   0x0002 /* DSP_IRQ2_EINT2 */

Definition at line 4588 of file registers.h.

#define ARIZONA_DSP_IRQ2_EINT2_MASK   0x0002 /* DSP_IRQ2_EINT2 */

Definition at line 4589 of file registers.h.

#define ARIZONA_DSP_IRQ2_EINT2_SHIFT   1 /* DSP_IRQ2_EINT2 */

Definition at line 4590 of file registers.h.

#define ARIZONA_DSP_IRQ2_EINT2_WIDTH   1 /* DSP_IRQ2_EINT2 */

Definition at line 4591 of file registers.h.

#define ARIZONA_DSP_IRQ2_MASK   0x0002 /* DSP_IRQ2 */

Definition at line 5214 of file registers.h.

#define ARIZONA_DSP_IRQ2_SHIFT   1 /* DSP_IRQ2 */

Definition at line 5215 of file registers.h.

#define ARIZONA_DSP_IRQ2_STS   0x0002 /* DSP_IRQ2_STS */

Definition at line 4913 of file registers.h.

#define ARIZONA_DSP_IRQ2_STS_MASK   0x0002 /* DSP_IRQ2_STS */

Definition at line 4914 of file registers.h.

#define ARIZONA_DSP_IRQ2_STS_SHIFT   1 /* DSP_IRQ2_STS */

Definition at line 4915 of file registers.h.

#define ARIZONA_DSP_IRQ2_STS_WIDTH   1 /* DSP_IRQ2_STS */

Definition at line 4916 of file registers.h.

#define ARIZONA_DSP_IRQ2_WIDTH   1 /* DSP_IRQ2 */

Definition at line 5216 of file registers.h.

#define ARIZONA_DSP_IRQ3_EINT1   0x0004 /* DSP_IRQ3_EINT1 */

Definition at line 4240 of file registers.h.

#define ARIZONA_DSP_IRQ3_EINT1_MASK   0x0004 /* DSP_IRQ3_EINT1 */

Definition at line 4241 of file registers.h.

#define ARIZONA_DSP_IRQ3_EINT1_SHIFT   2 /* DSP_IRQ3_EINT1 */

Definition at line 4242 of file registers.h.

#define ARIZONA_DSP_IRQ3_EINT1_WIDTH   1 /* DSP_IRQ3_EINT1 */

Definition at line 4243 of file registers.h.

#define ARIZONA_DSP_IRQ4_EINT1   0x0008 /* DSP_IRQ4_EINT1 */

Definition at line 4236 of file registers.h.

#define ARIZONA_DSP_IRQ4_EINT1_MASK   0x0008 /* DSP_IRQ4_EINT1 */

Definition at line 4237 of file registers.h.

#define ARIZONA_DSP_IRQ4_EINT1_SHIFT   3 /* DSP_IRQ4_EINT1 */

Definition at line 4238 of file registers.h.

#define ARIZONA_DSP_IRQ4_EINT1_WIDTH   1 /* DSP_IRQ4_EINT1 */

Definition at line 4239 of file registers.h.

#define ARIZONA_DSP_IRQ5_EINT1   0x0010 /* DSP_IRQ5_EINT1 */

Definition at line 4232 of file registers.h.

#define ARIZONA_DSP_IRQ5_EINT1_MASK   0x0010 /* DSP_IRQ5_EINT1 */

Definition at line 4233 of file registers.h.

#define ARIZONA_DSP_IRQ5_EINT1_SHIFT   4 /* DSP_IRQ5_EINT1 */

Definition at line 4234 of file registers.h.

#define ARIZONA_DSP_IRQ5_EINT1_WIDTH   1 /* DSP_IRQ5_EINT1 */

Definition at line 4235 of file registers.h.

#define ARIZONA_DSP_IRQ6_EINT1   0x0020 /* DSP_IRQ6_EINT1 */

Definition at line 4228 of file registers.h.

#define ARIZONA_DSP_IRQ6_EINT1_MASK   0x0020 /* DSP_IRQ6_EINT1 */

Definition at line 4229 of file registers.h.

#define ARIZONA_DSP_IRQ6_EINT1_SHIFT   5 /* DSP_IRQ6_EINT1 */

Definition at line 4230 of file registers.h.

#define ARIZONA_DSP_IRQ6_EINT1_WIDTH   1 /* DSP_IRQ6_EINT1 */

Definition at line 4231 of file registers.h.

#define ARIZONA_DSP_IRQ7_EINT1   0x0040 /* DSP_IRQ7_EINT1 */

Definition at line 4224 of file registers.h.

#define ARIZONA_DSP_IRQ7_EINT1_MASK   0x0040 /* DSP_IRQ7_EINT1 */

Definition at line 4225 of file registers.h.

#define ARIZONA_DSP_IRQ7_EINT1_SHIFT   6 /* DSP_IRQ7_EINT1 */

Definition at line 4226 of file registers.h.

#define ARIZONA_DSP_IRQ7_EINT1_WIDTH   1 /* DSP_IRQ7_EINT1 */

Definition at line 4227 of file registers.h.

#define ARIZONA_DSP_IRQ8_EINT1   0x0080 /* DSP_IRQ8_EINT1 */

Definition at line 4220 of file registers.h.

#define ARIZONA_DSP_IRQ8_EINT1_MASK   0x0080 /* DSP_IRQ8_EINT1 */

Definition at line 4221 of file registers.h.

#define ARIZONA_DSP_IRQ8_EINT1_SHIFT   7 /* DSP_IRQ8_EINT1 */

Definition at line 4222 of file registers.h.

#define ARIZONA_DSP_IRQ8_EINT1_WIDTH   1 /* DSP_IRQ8_EINT1 */

Definition at line 4223 of file registers.h.

#define ARIZONA_DSP_STATUS   0xF02

Definition at line 977 of file registers.h.

#define ARIZONA_EQ1_1   0xE10

Definition at line 860 of file registers.h.

#define ARIZONA_EQ1_10   0xE19

Definition at line 869 of file registers.h.

#define ARIZONA_EQ1_11   0xE1A

Definition at line 870 of file registers.h.

#define ARIZONA_EQ1_12   0xE1B

Definition at line 871 of file registers.h.

#define ARIZONA_EQ1_13   0xE1C

Definition at line 872 of file registers.h.

#define ARIZONA_EQ1_14   0xE1D

Definition at line 873 of file registers.h.

#define ARIZONA_EQ1_15   0xE1E

Definition at line 874 of file registers.h.

#define ARIZONA_EQ1_16   0xE1F

Definition at line 875 of file registers.h.

#define ARIZONA_EQ1_17   0xE20

Definition at line 876 of file registers.h.

#define ARIZONA_EQ1_18   0xE21

Definition at line 877 of file registers.h.

#define ARIZONA_EQ1_19   0xE22

Definition at line 878 of file registers.h.

#define ARIZONA_EQ1_2   0xE11

Definition at line 861 of file registers.h.

#define ARIZONA_EQ1_20   0xE23

Definition at line 879 of file registers.h.

#define ARIZONA_EQ1_21   0xE24

Definition at line 880 of file registers.h.

#define ARIZONA_EQ1_3   0xE12

Definition at line 862 of file registers.h.

#define ARIZONA_EQ1_4   0xE13

Definition at line 863 of file registers.h.

#define ARIZONA_EQ1_5   0xE14

Definition at line 864 of file registers.h.

#define ARIZONA_EQ1_6   0xE15

Definition at line 865 of file registers.h.

#define ARIZONA_EQ1_7   0xE16

Definition at line 866 of file registers.h.

#define ARIZONA_EQ1_8   0xE17

Definition at line 867 of file registers.h.

#define ARIZONA_EQ1_9   0xE18

Definition at line 868 of file registers.h.

#define ARIZONA_EQ1_B1_A_MASK   0xFFFF /* EQ1_B1_A - [15:0] */

Definition at line 5438 of file registers.h.

#define ARIZONA_EQ1_B1_A_SHIFT   0 /* EQ1_B1_A - [15:0] */

Definition at line 5439 of file registers.h.

#define ARIZONA_EQ1_B1_A_WIDTH   16 /* EQ1_B1_A - [15:0] */

Definition at line 5440 of file registers.h.

#define ARIZONA_EQ1_B1_B_MASK   0xFFFF /* EQ1_B1_B - [15:0] */

Definition at line 5445 of file registers.h.

#define ARIZONA_EQ1_B1_B_SHIFT   0 /* EQ1_B1_B - [15:0] */

Definition at line 5446 of file registers.h.

#define ARIZONA_EQ1_B1_B_WIDTH   16 /* EQ1_B1_B - [15:0] */

Definition at line 5447 of file registers.h.

#define ARIZONA_EQ1_B1_C_MASK   0xFFFF /* EQ1_B1_C - [15:0] */

Definition at line 5564 of file registers.h.

#define ARIZONA_EQ1_B1_C_SHIFT   0 /* EQ1_B1_C - [15:0] */

Definition at line 5565 of file registers.h.

#define ARIZONA_EQ1_B1_C_WIDTH   16 /* EQ1_B1_C - [15:0] */

Definition at line 5566 of file registers.h.

#define ARIZONA_EQ1_B1_GAIN_MASK   0xF800 /* EQ1_B1_GAIN - [15:11] */

Definition at line 5407 of file registers.h.

#define ARIZONA_EQ1_B1_GAIN_SHIFT   11 /* EQ1_B1_GAIN - [15:11] */

Definition at line 5408 of file registers.h.

#define ARIZONA_EQ1_B1_GAIN_WIDTH   5 /* EQ1_B1_GAIN - [15:11] */

Definition at line 5409 of file registers.h.

#define ARIZONA_EQ1_B1_MODE   0x0001 /* EQ1_B1_MODE */

Definition at line 5430 of file registers.h.

#define ARIZONA_EQ1_B1_MODE_MASK   0x0001 /* EQ1_B1_MODE */

Definition at line 5431 of file registers.h.

#define ARIZONA_EQ1_B1_MODE_SHIFT   0 /* EQ1_B1_MODE */

Definition at line 5432 of file registers.h.

#define ARIZONA_EQ1_B1_MODE_WIDTH   1 /* EQ1_B1_MODE */

Definition at line 5433 of file registers.h.

#define ARIZONA_EQ1_B1_PG_MASK   0xFFFF /* EQ1_B1_PG - [15:0] */

Definition at line 5452 of file registers.h.

#define ARIZONA_EQ1_B1_PG_SHIFT   0 /* EQ1_B1_PG - [15:0] */

Definition at line 5453 of file registers.h.

#define ARIZONA_EQ1_B1_PG_WIDTH   16 /* EQ1_B1_PG - [15:0] */

Definition at line 5454 of file registers.h.

#define ARIZONA_EQ1_B2_A_MASK   0xFFFF /* EQ1_B2_A - [15:0] */

Definition at line 5459 of file registers.h.

#define ARIZONA_EQ1_B2_A_SHIFT   0 /* EQ1_B2_A - [15:0] */

Definition at line 5460 of file registers.h.

#define ARIZONA_EQ1_B2_A_WIDTH   16 /* EQ1_B2_A - [15:0] */

Definition at line 5461 of file registers.h.

#define ARIZONA_EQ1_B2_B_MASK   0xFFFF /* EQ1_B2_B - [15:0] */

Definition at line 5466 of file registers.h.

#define ARIZONA_EQ1_B2_B_SHIFT   0 /* EQ1_B2_B - [15:0] */

Definition at line 5467 of file registers.h.

#define ARIZONA_EQ1_B2_B_WIDTH   16 /* EQ1_B2_B - [15:0] */

Definition at line 5468 of file registers.h.

#define ARIZONA_EQ1_B2_C_MASK   0xFFFF /* EQ1_B2_C - [15:0] */

Definition at line 5473 of file registers.h.

#define ARIZONA_EQ1_B2_C_SHIFT   0 /* EQ1_B2_C - [15:0] */

Definition at line 5474 of file registers.h.

#define ARIZONA_EQ1_B2_C_WIDTH   16 /* EQ1_B2_C - [15:0] */

Definition at line 5475 of file registers.h.

#define ARIZONA_EQ1_B2_GAIN_MASK   0x07C0 /* EQ1_B2_GAIN - [10:6] */

Definition at line 5410 of file registers.h.

#define ARIZONA_EQ1_B2_GAIN_SHIFT   6 /* EQ1_B2_GAIN - [10:6] */

Definition at line 5411 of file registers.h.

#define ARIZONA_EQ1_B2_GAIN_WIDTH   5 /* EQ1_B2_GAIN - [10:6] */

Definition at line 5412 of file registers.h.

#define ARIZONA_EQ1_B2_PG_MASK   0xFFFF /* EQ1_B2_PG - [15:0] */

Definition at line 5480 of file registers.h.

#define ARIZONA_EQ1_B2_PG_SHIFT   0 /* EQ1_B2_PG - [15:0] */

Definition at line 5481 of file registers.h.

#define ARIZONA_EQ1_B2_PG_WIDTH   16 /* EQ1_B2_PG - [15:0] */

Definition at line 5482 of file registers.h.

#define ARIZONA_EQ1_B3_A_MASK   0xFFFF /* EQ1_B3_A - [15:0] */

Definition at line 5487 of file registers.h.

#define ARIZONA_EQ1_B3_A_SHIFT   0 /* EQ1_B3_A - [15:0] */

Definition at line 5488 of file registers.h.

#define ARIZONA_EQ1_B3_A_WIDTH   16 /* EQ1_B3_A - [15:0] */

Definition at line 5489 of file registers.h.

#define ARIZONA_EQ1_B3_B_MASK   0xFFFF /* EQ1_B3_B - [15:0] */

Definition at line 5494 of file registers.h.

#define ARIZONA_EQ1_B3_B_SHIFT   0 /* EQ1_B3_B - [15:0] */

Definition at line 5495 of file registers.h.

#define ARIZONA_EQ1_B3_B_WIDTH   16 /* EQ1_B3_B - [15:0] */

Definition at line 5496 of file registers.h.

#define ARIZONA_EQ1_B3_C_MASK   0xFFFF /* EQ1_B3_C - [15:0] */

Definition at line 5501 of file registers.h.

#define ARIZONA_EQ1_B3_C_SHIFT   0 /* EQ1_B3_C - [15:0] */

Definition at line 5502 of file registers.h.

#define ARIZONA_EQ1_B3_C_WIDTH   16 /* EQ1_B3_C - [15:0] */

Definition at line 5503 of file registers.h.

#define ARIZONA_EQ1_B3_GAIN_MASK   0x003E /* EQ1_B3_GAIN - [5:1] */

Definition at line 5413 of file registers.h.

#define ARIZONA_EQ1_B3_GAIN_SHIFT   1 /* EQ1_B3_GAIN - [5:1] */

Definition at line 5414 of file registers.h.

#define ARIZONA_EQ1_B3_GAIN_WIDTH   5 /* EQ1_B3_GAIN - [5:1] */

Definition at line 5415 of file registers.h.

#define ARIZONA_EQ1_B3_PG_MASK   0xFFFF /* EQ1_B3_PG - [15:0] */

Definition at line 5508 of file registers.h.

#define ARIZONA_EQ1_B3_PG_SHIFT   0 /* EQ1_B3_PG - [15:0] */

Definition at line 5509 of file registers.h.

#define ARIZONA_EQ1_B3_PG_WIDTH   16 /* EQ1_B3_PG - [15:0] */

Definition at line 5510 of file registers.h.

#define ARIZONA_EQ1_B4_A_MASK   0xFFFF /* EQ1_B4_A - [15:0] */

Definition at line 5515 of file registers.h.

#define ARIZONA_EQ1_B4_A_SHIFT   0 /* EQ1_B4_A - [15:0] */

Definition at line 5516 of file registers.h.

#define ARIZONA_EQ1_B4_A_WIDTH   16 /* EQ1_B4_A - [15:0] */

Definition at line 5517 of file registers.h.

#define ARIZONA_EQ1_B4_B_MASK   0xFFFF /* EQ1_B4_B - [15:0] */

Definition at line 5522 of file registers.h.

#define ARIZONA_EQ1_B4_B_SHIFT   0 /* EQ1_B4_B - [15:0] */

Definition at line 5523 of file registers.h.

#define ARIZONA_EQ1_B4_B_WIDTH   16 /* EQ1_B4_B - [15:0] */

Definition at line 5524 of file registers.h.

#define ARIZONA_EQ1_B4_C_MASK   0xFFFF /* EQ1_B4_C - [15:0] */

Definition at line 5529 of file registers.h.

#define ARIZONA_EQ1_B4_C_SHIFT   0 /* EQ1_B4_C - [15:0] */

Definition at line 5530 of file registers.h.

#define ARIZONA_EQ1_B4_C_WIDTH   16 /* EQ1_B4_C - [15:0] */

Definition at line 5531 of file registers.h.

#define ARIZONA_EQ1_B4_GAIN_MASK   0xF800 /* EQ1_B4_GAIN - [15:11] */

Definition at line 5424 of file registers.h.

#define ARIZONA_EQ1_B4_GAIN_SHIFT   11 /* EQ1_B4_GAIN - [15:11] */

Definition at line 5425 of file registers.h.

#define ARIZONA_EQ1_B4_GAIN_WIDTH   5 /* EQ1_B4_GAIN - [15:11] */

Definition at line 5426 of file registers.h.

#define ARIZONA_EQ1_B4_PG_MASK   0xFFFF /* EQ1_B4_PG - [15:0] */

Definition at line 5536 of file registers.h.

#define ARIZONA_EQ1_B4_PG_SHIFT   0 /* EQ1_B4_PG - [15:0] */

Definition at line 5537 of file registers.h.

#define ARIZONA_EQ1_B4_PG_WIDTH   16 /* EQ1_B4_PG - [15:0] */

Definition at line 5538 of file registers.h.

#define ARIZONA_EQ1_B5_A_MASK   0xFFFF /* EQ1_B5_A - [15:0] */

Definition at line 5543 of file registers.h.

#define ARIZONA_EQ1_B5_A_SHIFT   0 /* EQ1_B5_A - [15:0] */

Definition at line 5544 of file registers.h.

#define ARIZONA_EQ1_B5_A_WIDTH   16 /* EQ1_B5_A - [15:0] */

Definition at line 5545 of file registers.h.

#define ARIZONA_EQ1_B5_B_MASK   0xFFFF /* EQ1_B5_B - [15:0] */

Definition at line 5550 of file registers.h.

#define ARIZONA_EQ1_B5_B_SHIFT   0 /* EQ1_B5_B - [15:0] */

Definition at line 5551 of file registers.h.

#define ARIZONA_EQ1_B5_B_WIDTH   16 /* EQ1_B5_B - [15:0] */

Definition at line 5552 of file registers.h.

#define ARIZONA_EQ1_B5_GAIN_MASK   0x07C0 /* EQ1_B5_GAIN - [10:6] */

Definition at line 5427 of file registers.h.

#define ARIZONA_EQ1_B5_GAIN_SHIFT   6 /* EQ1_B5_GAIN - [10:6] */

Definition at line 5428 of file registers.h.

#define ARIZONA_EQ1_B5_GAIN_WIDTH   5 /* EQ1_B5_GAIN - [10:6] */

Definition at line 5429 of file registers.h.

#define ARIZONA_EQ1_B5_PG_MASK   0xFFFF /* EQ1_B5_PG - [15:0] */

Definition at line 5557 of file registers.h.

#define ARIZONA_EQ1_B5_PG_SHIFT   0 /* EQ1_B5_PG - [15:0] */

Definition at line 5558 of file registers.h.

#define ARIZONA_EQ1_B5_PG_WIDTH   16 /* EQ1_B5_PG - [15:0] */

Definition at line 5559 of file registers.h.

#define ARIZONA_EQ1_ENA   0x0001 /* EQ1_ENA */

Definition at line 5416 of file registers.h.

#define ARIZONA_EQ1_ENA_MASK   0x0001 /* EQ1_ENA */

Definition at line 5417 of file registers.h.

#define ARIZONA_EQ1_ENA_SHIFT   0 /* EQ1_ENA */

Definition at line 5418 of file registers.h.

#define ARIZONA_EQ1_ENA_WIDTH   1 /* EQ1_ENA */

Definition at line 5419 of file registers.h.

#define ARIZONA_EQ1MIX_INPUT_1_SOURCE   0x880

Definition at line 577 of file registers.h.

#define ARIZONA_EQ1MIX_INPUT_1_VOLUME   0x881

Definition at line 578 of file registers.h.

#define ARIZONA_EQ1MIX_INPUT_2_SOURCE   0x882

Definition at line 579 of file registers.h.

#define ARIZONA_EQ1MIX_INPUT_2_VOLUME   0x883

Definition at line 580 of file registers.h.

#define ARIZONA_EQ1MIX_INPUT_3_SOURCE   0x884

Definition at line 581 of file registers.h.

#define ARIZONA_EQ1MIX_INPUT_3_VOLUME   0x885

Definition at line 582 of file registers.h.

#define ARIZONA_EQ1MIX_INPUT_4_SOURCE   0x886

Definition at line 583 of file registers.h.

#define ARIZONA_EQ1MIX_INPUT_4_VOLUME   0x887

Definition at line 584 of file registers.h.

#define ARIZONA_EQ2_1   0xE26

Definition at line 881 of file registers.h.

#define ARIZONA_EQ2_10   0xE2F

Definition at line 890 of file registers.h.

#define ARIZONA_EQ2_11   0xE30

Definition at line 891 of file registers.h.

#define ARIZONA_EQ2_12   0xE31

Definition at line 892 of file registers.h.

#define ARIZONA_EQ2_13   0xE32

Definition at line 893 of file registers.h.

#define ARIZONA_EQ2_14   0xE33

Definition at line 894 of file registers.h.

#define ARIZONA_EQ2_15   0xE34

Definition at line 895 of file registers.h.

#define ARIZONA_EQ2_16   0xE35

Definition at line 896 of file registers.h.

#define ARIZONA_EQ2_17   0xE36

Definition at line 897 of file registers.h.

#define ARIZONA_EQ2_18   0xE37

Definition at line 898 of file registers.h.

#define ARIZONA_EQ2_19   0xE38

Definition at line 899 of file registers.h.

#define ARIZONA_EQ2_2   0xE27

Definition at line 882 of file registers.h.

#define ARIZONA_EQ2_20   0xE39

Definition at line 900 of file registers.h.

#define ARIZONA_EQ2_21   0xE3A

Definition at line 901 of file registers.h.

#define ARIZONA_EQ2_3   0xE28

Definition at line 883 of file registers.h.

#define ARIZONA_EQ2_4   0xE29

Definition at line 884 of file registers.h.

#define ARIZONA_EQ2_5   0xE2A

Definition at line 885 of file registers.h.

#define ARIZONA_EQ2_6   0xE2B

Definition at line 886 of file registers.h.

#define ARIZONA_EQ2_7   0xE2C

Definition at line 887 of file registers.h.

#define ARIZONA_EQ2_8   0xE2D

Definition at line 888 of file registers.h.

#define ARIZONA_EQ2_9   0xE2E

Definition at line 889 of file registers.h.

#define ARIZONA_EQ2_B1_A_MASK   0xFFFF /* EQ2_B1_A - [15:0] */

Definition at line 5602 of file registers.h.

#define ARIZONA_EQ2_B1_A_SHIFT   0 /* EQ2_B1_A - [15:0] */

Definition at line 5603 of file registers.h.

#define ARIZONA_EQ2_B1_A_WIDTH   16 /* EQ2_B1_A - [15:0] */

Definition at line 5604 of file registers.h.

#define ARIZONA_EQ2_B1_B_MASK   0xFFFF /* EQ2_B1_B - [15:0] */

Definition at line 5609 of file registers.h.

#define ARIZONA_EQ2_B1_B_SHIFT   0 /* EQ2_B1_B - [15:0] */

Definition at line 5610 of file registers.h.

#define ARIZONA_EQ2_B1_B_WIDTH   16 /* EQ2_B1_B - [15:0] */

Definition at line 5611 of file registers.h.

#define ARIZONA_EQ2_B1_C_MASK   0xFFFF /* EQ2_B1_C - [15:0] */

Definition at line 5728 of file registers.h.

#define ARIZONA_EQ2_B1_C_SHIFT   0 /* EQ2_B1_C - [15:0] */

Definition at line 5729 of file registers.h.

#define ARIZONA_EQ2_B1_C_WIDTH   16 /* EQ2_B1_C - [15:0] */

Definition at line 5730 of file registers.h.

#define ARIZONA_EQ2_B1_GAIN_MASK   0xF800 /* EQ2_B1_GAIN - [15:11] */

Definition at line 5571 of file registers.h.

#define ARIZONA_EQ2_B1_GAIN_SHIFT   11 /* EQ2_B1_GAIN - [15:11] */

Definition at line 5572 of file registers.h.

#define ARIZONA_EQ2_B1_GAIN_WIDTH   5 /* EQ2_B1_GAIN - [15:11] */

Definition at line 5573 of file registers.h.

#define ARIZONA_EQ2_B1_MODE   0x0001 /* EQ2_B1_MODE */

Definition at line 5594 of file registers.h.

#define ARIZONA_EQ2_B1_MODE_MASK   0x0001 /* EQ2_B1_MODE */

Definition at line 5595 of file registers.h.

#define ARIZONA_EQ2_B1_MODE_SHIFT   0 /* EQ2_B1_MODE */

Definition at line 5596 of file registers.h.

#define ARIZONA_EQ2_B1_MODE_WIDTH   1 /* EQ2_B1_MODE */

Definition at line 5597 of file registers.h.

#define ARIZONA_EQ2_B1_PG_MASK   0xFFFF /* EQ2_B1_PG - [15:0] */

Definition at line 5616 of file registers.h.

#define ARIZONA_EQ2_B1_PG_SHIFT   0 /* EQ2_B1_PG - [15:0] */

Definition at line 5617 of file registers.h.

#define ARIZONA_EQ2_B1_PG_WIDTH   16 /* EQ2_B1_PG - [15:0] */

Definition at line 5618 of file registers.h.

#define ARIZONA_EQ2_B2_A_MASK   0xFFFF /* EQ2_B2_A - [15:0] */

Definition at line 5623 of file registers.h.

#define ARIZONA_EQ2_B2_A_SHIFT   0 /* EQ2_B2_A - [15:0] */

Definition at line 5624 of file registers.h.

#define ARIZONA_EQ2_B2_A_WIDTH   16 /* EQ2_B2_A - [15:0] */

Definition at line 5625 of file registers.h.

#define ARIZONA_EQ2_B2_B_MASK   0xFFFF /* EQ2_B2_B - [15:0] */

Definition at line 5630 of file registers.h.

#define ARIZONA_EQ2_B2_B_SHIFT   0 /* EQ2_B2_B - [15:0] */

Definition at line 5631 of file registers.h.

#define ARIZONA_EQ2_B2_B_WIDTH   16 /* EQ2_B2_B - [15:0] */

Definition at line 5632 of file registers.h.

#define ARIZONA_EQ2_B2_C_MASK   0xFFFF /* EQ2_B2_C - [15:0] */

Definition at line 5637 of file registers.h.

#define ARIZONA_EQ2_B2_C_SHIFT   0 /* EQ2_B2_C - [15:0] */

Definition at line 5638 of file registers.h.

#define ARIZONA_EQ2_B2_C_WIDTH   16 /* EQ2_B2_C - [15:0] */

Definition at line 5639 of file registers.h.

#define ARIZONA_EQ2_B2_GAIN_MASK   0x07C0 /* EQ2_B2_GAIN - [10:6] */

Definition at line 5574 of file registers.h.

#define ARIZONA_EQ2_B2_GAIN_SHIFT   6 /* EQ2_B2_GAIN - [10:6] */

Definition at line 5575 of file registers.h.

#define ARIZONA_EQ2_B2_GAIN_WIDTH   5 /* EQ2_B2_GAIN - [10:6] */

Definition at line 5576 of file registers.h.

#define ARIZONA_EQ2_B2_PG_MASK   0xFFFF /* EQ2_B2_PG - [15:0] */

Definition at line 5644 of file registers.h.

#define ARIZONA_EQ2_B2_PG_SHIFT   0 /* EQ2_B2_PG - [15:0] */

Definition at line 5645 of file registers.h.

#define ARIZONA_EQ2_B2_PG_WIDTH   16 /* EQ2_B2_PG - [15:0] */

Definition at line 5646 of file registers.h.

#define ARIZONA_EQ2_B3_A_MASK   0xFFFF /* EQ2_B3_A - [15:0] */

Definition at line 5651 of file registers.h.

#define ARIZONA_EQ2_B3_A_SHIFT   0 /* EQ2_B3_A - [15:0] */

Definition at line 5652 of file registers.h.

#define ARIZONA_EQ2_B3_A_WIDTH   16 /* EQ2_B3_A - [15:0] */

Definition at line 5653 of file registers.h.

#define ARIZONA_EQ2_B3_B_MASK   0xFFFF /* EQ2_B3_B - [15:0] */

Definition at line 5658 of file registers.h.

#define ARIZONA_EQ2_B3_B_SHIFT   0 /* EQ2_B3_B - [15:0] */

Definition at line 5659 of file registers.h.

#define ARIZONA_EQ2_B3_B_WIDTH   16 /* EQ2_B3_B - [15:0] */

Definition at line 5660 of file registers.h.

#define ARIZONA_EQ2_B3_C_MASK   0xFFFF /* EQ2_B3_C - [15:0] */

Definition at line 5665 of file registers.h.

#define ARIZONA_EQ2_B3_C_SHIFT   0 /* EQ2_B3_C - [15:0] */

Definition at line 5666 of file registers.h.

#define ARIZONA_EQ2_B3_C_WIDTH   16 /* EQ2_B3_C - [15:0] */

Definition at line 5667 of file registers.h.

#define ARIZONA_EQ2_B3_GAIN_MASK   0x003E /* EQ2_B3_GAIN - [5:1] */

Definition at line 5577 of file registers.h.

#define ARIZONA_EQ2_B3_GAIN_SHIFT   1 /* EQ2_B3_GAIN - [5:1] */

Definition at line 5578 of file registers.h.

#define ARIZONA_EQ2_B3_GAIN_WIDTH   5 /* EQ2_B3_GAIN - [5:1] */

Definition at line 5579 of file registers.h.

#define ARIZONA_EQ2_B3_PG_MASK   0xFFFF /* EQ2_B3_PG - [15:0] */

Definition at line 5672 of file registers.h.

#define ARIZONA_EQ2_B3_PG_SHIFT   0 /* EQ2_B3_PG - [15:0] */

Definition at line 5673 of file registers.h.

#define ARIZONA_EQ2_B3_PG_WIDTH   16 /* EQ2_B3_PG - [15:0] */

Definition at line 5674 of file registers.h.

#define ARIZONA_EQ2_B4_A_MASK   0xFFFF /* EQ2_B4_A - [15:0] */

Definition at line 5679 of file registers.h.

#define ARIZONA_EQ2_B4_A_SHIFT   0 /* EQ2_B4_A - [15:0] */

Definition at line 5680 of file registers.h.

#define ARIZONA_EQ2_B4_A_WIDTH   16 /* EQ2_B4_A - [15:0] */

Definition at line 5681 of file registers.h.

#define ARIZONA_EQ2_B4_B_MASK   0xFFFF /* EQ2_B4_B - [15:0] */

Definition at line 5686 of file registers.h.

#define ARIZONA_EQ2_B4_B_SHIFT   0 /* EQ2_B4_B - [15:0] */

Definition at line 5687 of file registers.h.

#define ARIZONA_EQ2_B4_B_WIDTH   16 /* EQ2_B4_B - [15:0] */

Definition at line 5688 of file registers.h.

#define ARIZONA_EQ2_B4_C_MASK   0xFFFF /* EQ2_B4_C - [15:0] */

Definition at line 5693 of file registers.h.

#define ARIZONA_EQ2_B4_C_SHIFT   0 /* EQ2_B4_C - [15:0] */

Definition at line 5694 of file registers.h.

#define ARIZONA_EQ2_B4_C_WIDTH   16 /* EQ2_B4_C - [15:0] */

Definition at line 5695 of file registers.h.

#define ARIZONA_EQ2_B4_GAIN_MASK   0xF800 /* EQ2_B4_GAIN - [15:11] */

Definition at line 5588 of file registers.h.

#define ARIZONA_EQ2_B4_GAIN_SHIFT   11 /* EQ2_B4_GAIN - [15:11] */

Definition at line 5589 of file registers.h.

#define ARIZONA_EQ2_B4_GAIN_WIDTH   5 /* EQ2_B4_GAIN - [15:11] */

Definition at line 5590 of file registers.h.

#define ARIZONA_EQ2_B4_PG_MASK   0xFFFF /* EQ2_B4_PG - [15:0] */

Definition at line 5700 of file registers.h.

#define ARIZONA_EQ2_B4_PG_SHIFT   0 /* EQ2_B4_PG - [15:0] */

Definition at line 5701 of file registers.h.

#define ARIZONA_EQ2_B4_PG_WIDTH   16 /* EQ2_B4_PG - [15:0] */

Definition at line 5702 of file registers.h.

#define ARIZONA_EQ2_B5_A_MASK   0xFFFF /* EQ2_B5_A - [15:0] */

Definition at line 5707 of file registers.h.

#define ARIZONA_EQ2_B5_A_SHIFT   0 /* EQ2_B5_A - [15:0] */

Definition at line 5708 of file registers.h.

#define ARIZONA_EQ2_B5_A_WIDTH   16 /* EQ2_B5_A - [15:0] */

Definition at line 5709 of file registers.h.

#define ARIZONA_EQ2_B5_B_MASK   0xFFFF /* EQ2_B5_B - [15:0] */

Definition at line 5714 of file registers.h.

#define ARIZONA_EQ2_B5_B_SHIFT   0 /* EQ2_B5_B - [15:0] */

Definition at line 5715 of file registers.h.

#define ARIZONA_EQ2_B5_B_WIDTH   16 /* EQ2_B5_B - [15:0] */

Definition at line 5716 of file registers.h.

#define ARIZONA_EQ2_B5_GAIN_MASK   0x07C0 /* EQ2_B5_GAIN - [10:6] */

Definition at line 5591 of file registers.h.

#define ARIZONA_EQ2_B5_GAIN_SHIFT   6 /* EQ2_B5_GAIN - [10:6] */

Definition at line 5592 of file registers.h.

#define ARIZONA_EQ2_B5_GAIN_WIDTH   5 /* EQ2_B5_GAIN - [10:6] */

Definition at line 5593 of file registers.h.

#define ARIZONA_EQ2_B5_PG_MASK   0xFFFF /* EQ2_B5_PG - [15:0] */

Definition at line 5721 of file registers.h.

#define ARIZONA_EQ2_B5_PG_SHIFT   0 /* EQ2_B5_PG - [15:0] */

Definition at line 5722 of file registers.h.

#define ARIZONA_EQ2_B5_PG_WIDTH   16 /* EQ2_B5_PG - [15:0] */

Definition at line 5723 of file registers.h.

#define ARIZONA_EQ2_ENA   0x0001 /* EQ2_ENA */

Definition at line 5580 of file registers.h.

#define ARIZONA_EQ2_ENA_MASK   0x0001 /* EQ2_ENA */

Definition at line 5581 of file registers.h.

#define ARIZONA_EQ2_ENA_SHIFT   0 /* EQ2_ENA */

Definition at line 5582 of file registers.h.

#define ARIZONA_EQ2_ENA_WIDTH   1 /* EQ2_ENA */

Definition at line 5583 of file registers.h.

#define ARIZONA_EQ2MIX_INPUT_1_SOURCE   0x888

Definition at line 585 of file registers.h.

#define ARIZONA_EQ2MIX_INPUT_1_VOLUME   0x889

Definition at line 586 of file registers.h.

#define ARIZONA_EQ2MIX_INPUT_2_SOURCE   0x88A

Definition at line 587 of file registers.h.

#define ARIZONA_EQ2MIX_INPUT_2_VOLUME   0x88B

Definition at line 588 of file registers.h.

#define ARIZONA_EQ2MIX_INPUT_3_SOURCE   0x88C

Definition at line 589 of file registers.h.

#define ARIZONA_EQ2MIX_INPUT_3_VOLUME   0x88D

Definition at line 590 of file registers.h.

#define ARIZONA_EQ2MIX_INPUT_4_SOURCE   0x88E

Definition at line 591 of file registers.h.

#define ARIZONA_EQ2MIX_INPUT_4_VOLUME   0x88F

Definition at line 592 of file registers.h.

#define ARIZONA_EQ3_1   0xE3C

Definition at line 902 of file registers.h.

#define ARIZONA_EQ3_10   0xE45

Definition at line 911 of file registers.h.

#define ARIZONA_EQ3_11   0xE46

Definition at line 912 of file registers.h.

#define ARIZONA_EQ3_12   0xE47

Definition at line 913 of file registers.h.

#define ARIZONA_EQ3_13   0xE48

Definition at line 914 of file registers.h.

#define ARIZONA_EQ3_14   0xE49

Definition at line 915 of file registers.h.

#define ARIZONA_EQ3_15   0xE4A

Definition at line 916 of file registers.h.

#define ARIZONA_EQ3_16   0xE4B

Definition at line 917 of file registers.h.

#define ARIZONA_EQ3_17   0xE4C

Definition at line 918 of file registers.h.

#define ARIZONA_EQ3_18   0xE4D

Definition at line 919 of file registers.h.

#define ARIZONA_EQ3_19   0xE4E

Definition at line 920 of file registers.h.

#define ARIZONA_EQ3_2   0xE3D

Definition at line 903 of file registers.h.

#define ARIZONA_EQ3_20   0xE4F

Definition at line 921 of file registers.h.

#define ARIZONA_EQ3_21   0xE50

Definition at line 922 of file registers.h.

#define ARIZONA_EQ3_3   0xE3E

Definition at line 904 of file registers.h.

#define ARIZONA_EQ3_4   0xE3F

Definition at line 905 of file registers.h.

#define ARIZONA_EQ3_5   0xE40

Definition at line 906 of file registers.h.

#define ARIZONA_EQ3_6   0xE41

Definition at line 907 of file registers.h.

#define ARIZONA_EQ3_7   0xE42

Definition at line 908 of file registers.h.

#define ARIZONA_EQ3_8   0xE43

Definition at line 909 of file registers.h.

#define ARIZONA_EQ3_9   0xE44

Definition at line 910 of file registers.h.

#define ARIZONA_EQ3_B1_A_MASK   0xFFFF /* EQ3_B1_A - [15:0] */

Definition at line 5766 of file registers.h.

#define ARIZONA_EQ3_B1_A_SHIFT   0 /* EQ3_B1_A - [15:0] */

Definition at line 5767 of file registers.h.

#define ARIZONA_EQ3_B1_A_WIDTH   16 /* EQ3_B1_A - [15:0] */

Definition at line 5768 of file registers.h.

#define ARIZONA_EQ3_B1_B_MASK   0xFFFF /* EQ3_B1_B - [15:0] */

Definition at line 5773 of file registers.h.

#define ARIZONA_EQ3_B1_B_SHIFT   0 /* EQ3_B1_B - [15:0] */

Definition at line 5774 of file registers.h.

#define ARIZONA_EQ3_B1_B_WIDTH   16 /* EQ3_B1_B - [15:0] */

Definition at line 5775 of file registers.h.

#define ARIZONA_EQ3_B1_C_MASK   0xFFFF /* EQ3_B1_C - [15:0] */

Definition at line 5892 of file registers.h.

#define ARIZONA_EQ3_B1_C_SHIFT   0 /* EQ3_B1_C - [15:0] */

Definition at line 5893 of file registers.h.

#define ARIZONA_EQ3_B1_C_WIDTH   16 /* EQ3_B1_C - [15:0] */

Definition at line 5894 of file registers.h.

#define ARIZONA_EQ3_B1_GAIN_MASK   0xF800 /* EQ3_B1_GAIN - [15:11] */

Definition at line 5735 of file registers.h.

#define ARIZONA_EQ3_B1_GAIN_SHIFT   11 /* EQ3_B1_GAIN - [15:11] */

Definition at line 5736 of file registers.h.

#define ARIZONA_EQ3_B1_GAIN_WIDTH   5 /* EQ3_B1_GAIN - [15:11] */

Definition at line 5737 of file registers.h.

#define ARIZONA_EQ3_B1_MODE   0x0001 /* EQ3_B1_MODE */

Definition at line 5758 of file registers.h.

#define ARIZONA_EQ3_B1_MODE_MASK   0x0001 /* EQ3_B1_MODE */

Definition at line 5759 of file registers.h.

#define ARIZONA_EQ3_B1_MODE_SHIFT   0 /* EQ3_B1_MODE */

Definition at line 5760 of file registers.h.

#define ARIZONA_EQ3_B1_MODE_WIDTH   1 /* EQ3_B1_MODE */

Definition at line 5761 of file registers.h.

#define ARIZONA_EQ3_B1_PG_MASK   0xFFFF /* EQ3_B1_PG - [15:0] */

Definition at line 5780 of file registers.h.

#define ARIZONA_EQ3_B1_PG_SHIFT   0 /* EQ3_B1_PG - [15:0] */

Definition at line 5781 of file registers.h.

#define ARIZONA_EQ3_B1_PG_WIDTH   16 /* EQ3_B1_PG - [15:0] */

Definition at line 5782 of file registers.h.

#define ARIZONA_EQ3_B2_A_MASK   0xFFFF /* EQ3_B2_A - [15:0] */

Definition at line 5787 of file registers.h.

#define ARIZONA_EQ3_B2_A_SHIFT   0 /* EQ3_B2_A - [15:0] */

Definition at line 5788 of file registers.h.

#define ARIZONA_EQ3_B2_A_WIDTH   16 /* EQ3_B2_A - [15:0] */

Definition at line 5789 of file registers.h.

#define ARIZONA_EQ3_B2_B_MASK   0xFFFF /* EQ3_B2_B - [15:0] */

Definition at line 5794 of file registers.h.

#define ARIZONA_EQ3_B2_B_SHIFT   0 /* EQ3_B2_B - [15:0] */

Definition at line 5795 of file registers.h.

#define ARIZONA_EQ3_B2_B_WIDTH   16 /* EQ3_B2_B - [15:0] */

Definition at line 5796 of file registers.h.

#define ARIZONA_EQ3_B2_C_MASK   0xFFFF /* EQ3_B2_C - [15:0] */

Definition at line 5801 of file registers.h.

#define ARIZONA_EQ3_B2_C_SHIFT   0 /* EQ3_B2_C - [15:0] */

Definition at line 5802 of file registers.h.

#define ARIZONA_EQ3_B2_C_WIDTH   16 /* EQ3_B2_C - [15:0] */

Definition at line 5803 of file registers.h.

#define ARIZONA_EQ3_B2_GAIN_MASK   0x07C0 /* EQ3_B2_GAIN - [10:6] */

Definition at line 5738 of file registers.h.

#define ARIZONA_EQ3_B2_GAIN_SHIFT   6 /* EQ3_B2_GAIN - [10:6] */

Definition at line 5739 of file registers.h.

#define ARIZONA_EQ3_B2_GAIN_WIDTH   5 /* EQ3_B2_GAIN - [10:6] */

Definition at line 5740 of file registers.h.

#define ARIZONA_EQ3_B2_PG_MASK   0xFFFF /* EQ3_B2_PG - [15:0] */

Definition at line 5808 of file registers.h.

#define ARIZONA_EQ3_B2_PG_SHIFT   0 /* EQ3_B2_PG - [15:0] */

Definition at line 5809 of file registers.h.

#define ARIZONA_EQ3_B2_PG_WIDTH   16 /* EQ3_B2_PG - [15:0] */

Definition at line 5810 of file registers.h.

#define ARIZONA_EQ3_B3_A_MASK   0xFFFF /* EQ3_B3_A - [15:0] */

Definition at line 5815 of file registers.h.

#define ARIZONA_EQ3_B3_A_SHIFT   0 /* EQ3_B3_A - [15:0] */

Definition at line 5816 of file registers.h.

#define ARIZONA_EQ3_B3_A_WIDTH   16 /* EQ3_B3_A - [15:0] */

Definition at line 5817 of file registers.h.

#define ARIZONA_EQ3_B3_B_MASK   0xFFFF /* EQ3_B3_B - [15:0] */

Definition at line 5822 of file registers.h.

#define ARIZONA_EQ3_B3_B_SHIFT   0 /* EQ3_B3_B - [15:0] */

Definition at line 5823 of file registers.h.

#define ARIZONA_EQ3_B3_B_WIDTH   16 /* EQ3_B3_B - [15:0] */

Definition at line 5824 of file registers.h.

#define ARIZONA_EQ3_B3_C_MASK   0xFFFF /* EQ3_B3_C - [15:0] */

Definition at line 5829 of file registers.h.

#define ARIZONA_EQ3_B3_C_SHIFT   0 /* EQ3_B3_C - [15:0] */

Definition at line 5830 of file registers.h.

#define ARIZONA_EQ3_B3_C_WIDTH   16 /* EQ3_B3_C - [15:0] */

Definition at line 5831 of file registers.h.

#define ARIZONA_EQ3_B3_GAIN_MASK   0x003E /* EQ3_B3_GAIN - [5:1] */

Definition at line 5741 of file registers.h.

#define ARIZONA_EQ3_B3_GAIN_SHIFT   1 /* EQ3_B3_GAIN - [5:1] */

Definition at line 5742 of file registers.h.

#define ARIZONA_EQ3_B3_GAIN_WIDTH   5 /* EQ3_B3_GAIN - [5:1] */

Definition at line 5743 of file registers.h.

#define ARIZONA_EQ3_B3_PG_MASK   0xFFFF /* EQ3_B3_PG - [15:0] */

Definition at line 5836 of file registers.h.

#define ARIZONA_EQ3_B3_PG_SHIFT   0 /* EQ3_B3_PG - [15:0] */

Definition at line 5837 of file registers.h.

#define ARIZONA_EQ3_B3_PG_WIDTH   16 /* EQ3_B3_PG - [15:0] */

Definition at line 5838 of file registers.h.

#define ARIZONA_EQ3_B4_A_MASK   0xFFFF /* EQ3_B4_A - [15:0] */

Definition at line 5843 of file registers.h.

#define ARIZONA_EQ3_B4_A_SHIFT   0 /* EQ3_B4_A - [15:0] */

Definition at line 5844 of file registers.h.

#define ARIZONA_EQ3_B4_A_WIDTH   16 /* EQ3_B4_A - [15:0] */

Definition at line 5845 of file registers.h.

#define ARIZONA_EQ3_B4_B_MASK   0xFFFF /* EQ3_B4_B - [15:0] */

Definition at line 5850 of file registers.h.

#define ARIZONA_EQ3_B4_B_SHIFT   0 /* EQ3_B4_B - [15:0] */

Definition at line 5851 of file registers.h.

#define ARIZONA_EQ3_B4_B_WIDTH   16 /* EQ3_B4_B - [15:0] */

Definition at line 5852 of file registers.h.

#define ARIZONA_EQ3_B4_C_MASK   0xFFFF /* EQ3_B4_C - [15:0] */

Definition at line 5857 of file registers.h.

#define ARIZONA_EQ3_B4_C_SHIFT   0 /* EQ3_B4_C - [15:0] */

Definition at line 5858 of file registers.h.

#define ARIZONA_EQ3_B4_C_WIDTH   16 /* EQ3_B4_C - [15:0] */

Definition at line 5859 of file registers.h.

#define ARIZONA_EQ3_B4_GAIN_MASK   0xF800 /* EQ3_B4_GAIN - [15:11] */

Definition at line 5752 of file registers.h.

#define ARIZONA_EQ3_B4_GAIN_SHIFT   11 /* EQ3_B4_GAIN - [15:11] */

Definition at line 5753 of file registers.h.

#define ARIZONA_EQ3_B4_GAIN_WIDTH   5 /* EQ3_B4_GAIN - [15:11] */

Definition at line 5754 of file registers.h.

#define ARIZONA_EQ3_B4_PG_MASK   0xFFFF /* EQ3_B4_PG - [15:0] */

Definition at line 5864 of file registers.h.

#define ARIZONA_EQ3_B4_PG_SHIFT   0 /* EQ3_B4_PG - [15:0] */

Definition at line 5865 of file registers.h.

#define ARIZONA_EQ3_B4_PG_WIDTH   16 /* EQ3_B4_PG - [15:0] */

Definition at line 5866 of file registers.h.

#define ARIZONA_EQ3_B5_A_MASK   0xFFFF /* EQ3_B5_A - [15:0] */

Definition at line 5871 of file registers.h.

#define ARIZONA_EQ3_B5_A_SHIFT   0 /* EQ3_B5_A - [15:0] */

Definition at line 5872 of file registers.h.

#define ARIZONA_EQ3_B5_A_WIDTH   16 /* EQ3_B5_A - [15:0] */

Definition at line 5873 of file registers.h.

#define ARIZONA_EQ3_B5_B_MASK   0xFFFF /* EQ3_B5_B - [15:0] */

Definition at line 5878 of file registers.h.

#define ARIZONA_EQ3_B5_B_SHIFT   0 /* EQ3_B5_B - [15:0] */

Definition at line 5879 of file registers.h.

#define ARIZONA_EQ3_B5_B_WIDTH   16 /* EQ3_B5_B - [15:0] */

Definition at line 5880 of file registers.h.

#define ARIZONA_EQ3_B5_GAIN_MASK   0x07C0 /* EQ3_B5_GAIN - [10:6] */

Definition at line 5755 of file registers.h.

#define ARIZONA_EQ3_B5_GAIN_SHIFT   6 /* EQ3_B5_GAIN - [10:6] */

Definition at line 5756 of file registers.h.

#define ARIZONA_EQ3_B5_GAIN_WIDTH   5 /* EQ3_B5_GAIN - [10:6] */

Definition at line 5757 of file registers.h.

#define ARIZONA_EQ3_B5_PG_MASK   0xFFFF /* EQ3_B5_PG - [15:0] */

Definition at line 5885 of file registers.h.

#define ARIZONA_EQ3_B5_PG_SHIFT   0 /* EQ3_B5_PG - [15:0] */

Definition at line 5886 of file registers.h.

#define ARIZONA_EQ3_B5_PG_WIDTH   16 /* EQ3_B5_PG - [15:0] */

Definition at line 5887 of file registers.h.

#define ARIZONA_EQ3_ENA   0x0001 /* EQ3_ENA */

Definition at line 5744 of file registers.h.

#define ARIZONA_EQ3_ENA_MASK   0x0001 /* EQ3_ENA */

Definition at line 5745 of file registers.h.

#define ARIZONA_EQ3_ENA_SHIFT   0 /* EQ3_ENA */

Definition at line 5746 of file registers.h.

#define ARIZONA_EQ3_ENA_WIDTH   1 /* EQ3_ENA */

Definition at line 5747 of file registers.h.

#define ARIZONA_EQ3MIX_INPUT_1_SOURCE   0x890

Definition at line 593 of file registers.h.

#define ARIZONA_EQ3MIX_INPUT_1_VOLUME   0x891

Definition at line 594 of file registers.h.

#define ARIZONA_EQ3MIX_INPUT_2_SOURCE   0x892

Definition at line 595 of file registers.h.

#define ARIZONA_EQ3MIX_INPUT_2_VOLUME   0x893

Definition at line 596 of file registers.h.

#define ARIZONA_EQ3MIX_INPUT_3_SOURCE   0x894

Definition at line 597 of file registers.h.

#define ARIZONA_EQ3MIX_INPUT_3_VOLUME   0x895

Definition at line 598 of file registers.h.

#define ARIZONA_EQ3MIX_INPUT_4_SOURCE   0x896

Definition at line 599 of file registers.h.

#define ARIZONA_EQ3MIX_INPUT_4_VOLUME   0x897

Definition at line 600 of file registers.h.

#define ARIZONA_EQ4_1   0xE52

Definition at line 923 of file registers.h.

#define ARIZONA_EQ4_10   0xE5B

Definition at line 932 of file registers.h.

#define ARIZONA_EQ4_11   0xE5C

Definition at line 933 of file registers.h.

#define ARIZONA_EQ4_12   0xE5D

Definition at line 934 of file registers.h.

#define ARIZONA_EQ4_13   0xE5E

Definition at line 935 of file registers.h.

#define ARIZONA_EQ4_14   0xE5F

Definition at line 936 of file registers.h.

#define ARIZONA_EQ4_15   0xE60

Definition at line 937 of file registers.h.

#define ARIZONA_EQ4_16   0xE61

Definition at line 938 of file registers.h.

#define ARIZONA_EQ4_17   0xE62

Definition at line 939 of file registers.h.

#define ARIZONA_EQ4_18   0xE63

Definition at line 940 of file registers.h.

#define ARIZONA_EQ4_19   0xE64

Definition at line 941 of file registers.h.

#define ARIZONA_EQ4_2   0xE53

Definition at line 924 of file registers.h.

#define ARIZONA_EQ4_20   0xE65

Definition at line 942 of file registers.h.

#define ARIZONA_EQ4_21   0xE66

Definition at line 943 of file registers.h.

#define ARIZONA_EQ4_3   0xE54

Definition at line 925 of file registers.h.

#define ARIZONA_EQ4_4   0xE55

Definition at line 926 of file registers.h.

#define ARIZONA_EQ4_5   0xE56

Definition at line 927 of file registers.h.

#define ARIZONA_EQ4_6   0xE57

Definition at line 928 of file registers.h.

#define ARIZONA_EQ4_7   0xE58

Definition at line 929 of file registers.h.

#define ARIZONA_EQ4_8   0xE59

Definition at line 930 of file registers.h.

#define ARIZONA_EQ4_9   0xE5A

Definition at line 931 of file registers.h.

#define ARIZONA_EQ4_B1_A_MASK   0xFFFF /* EQ4_B1_A - [15:0] */

Definition at line 5930 of file registers.h.

#define ARIZONA_EQ4_B1_A_SHIFT   0 /* EQ4_B1_A - [15:0] */

Definition at line 5931 of file registers.h.

#define ARIZONA_EQ4_B1_A_WIDTH   16 /* EQ4_B1_A - [15:0] */

Definition at line 5932 of file registers.h.

#define ARIZONA_EQ4_B1_B_MASK   0xFFFF /* EQ4_B1_B - [15:0] */

Definition at line 5937 of file registers.h.

#define ARIZONA_EQ4_B1_B_SHIFT   0 /* EQ4_B1_B - [15:0] */

Definition at line 5938 of file registers.h.

#define ARIZONA_EQ4_B1_B_WIDTH   16 /* EQ4_B1_B - [15:0] */

Definition at line 5939 of file registers.h.

#define ARIZONA_EQ4_B1_C_MASK   0xFFFF /* EQ4_B1_C - [15:0] */

Definition at line 6056 of file registers.h.

#define ARIZONA_EQ4_B1_C_SHIFT   0 /* EQ4_B1_C - [15:0] */

Definition at line 6057 of file registers.h.

#define ARIZONA_EQ4_B1_C_WIDTH   16 /* EQ4_B1_C - [15:0] */

Definition at line 6058 of file registers.h.

#define ARIZONA_EQ4_B1_GAIN_MASK   0xF800 /* EQ4_B1_GAIN - [15:11] */

Definition at line 5899 of file registers.h.

#define ARIZONA_EQ4_B1_GAIN_SHIFT   11 /* EQ4_B1_GAIN - [15:11] */

Definition at line 5900 of file registers.h.

#define ARIZONA_EQ4_B1_GAIN_WIDTH   5 /* EQ4_B1_GAIN - [15:11] */

Definition at line 5901 of file registers.h.

#define ARIZONA_EQ4_B1_MODE   0x0001 /* EQ4_B1_MODE */

Definition at line 5922 of file registers.h.

#define ARIZONA_EQ4_B1_MODE_MASK   0x0001 /* EQ4_B1_MODE */

Definition at line 5923 of file registers.h.

#define ARIZONA_EQ4_B1_MODE_SHIFT   0 /* EQ4_B1_MODE */

Definition at line 5924 of file registers.h.

#define ARIZONA_EQ4_B1_MODE_WIDTH   1 /* EQ4_B1_MODE */

Definition at line 5925 of file registers.h.

#define ARIZONA_EQ4_B1_PG_MASK   0xFFFF /* EQ4_B1_PG - [15:0] */

Definition at line 5944 of file registers.h.

#define ARIZONA_EQ4_B1_PG_SHIFT   0 /* EQ4_B1_PG - [15:0] */

Definition at line 5945 of file registers.h.

#define ARIZONA_EQ4_B1_PG_WIDTH   16 /* EQ4_B1_PG - [15:0] */

Definition at line 5946 of file registers.h.

#define ARIZONA_EQ4_B2_A_MASK   0xFFFF /* EQ4_B2_A - [15:0] */

Definition at line 5951 of file registers.h.

#define ARIZONA_EQ4_B2_A_SHIFT   0 /* EQ4_B2_A - [15:0] */

Definition at line 5952 of file registers.h.

#define ARIZONA_EQ4_B2_A_WIDTH   16 /* EQ4_B2_A - [15:0] */

Definition at line 5953 of file registers.h.

#define ARIZONA_EQ4_B2_B_MASK   0xFFFF /* EQ4_B2_B - [15:0] */

Definition at line 5958 of file registers.h.

#define ARIZONA_EQ4_B2_B_SHIFT   0 /* EQ4_B2_B - [15:0] */

Definition at line 5959 of file registers.h.

#define ARIZONA_EQ4_B2_B_WIDTH   16 /* EQ4_B2_B - [15:0] */

Definition at line 5960 of file registers.h.

#define ARIZONA_EQ4_B2_C_MASK   0xFFFF /* EQ4_B2_C - [15:0] */

Definition at line 5965 of file registers.h.

#define ARIZONA_EQ4_B2_C_SHIFT   0 /* EQ4_B2_C - [15:0] */

Definition at line 5966 of file registers.h.

#define ARIZONA_EQ4_B2_C_WIDTH   16 /* EQ4_B2_C - [15:0] */

Definition at line 5967 of file registers.h.

#define ARIZONA_EQ4_B2_GAIN_MASK   0x07C0 /* EQ4_B2_GAIN - [10:6] */

Definition at line 5902 of file registers.h.

#define ARIZONA_EQ4_B2_GAIN_SHIFT   6 /* EQ4_B2_GAIN - [10:6] */

Definition at line 5903 of file registers.h.

#define ARIZONA_EQ4_B2_GAIN_WIDTH   5 /* EQ4_B2_GAIN - [10:6] */

Definition at line 5904 of file registers.h.

#define ARIZONA_EQ4_B2_PG_MASK   0xFFFF /* EQ4_B2_PG - [15:0] */

Definition at line 5972 of file registers.h.

#define ARIZONA_EQ4_B2_PG_SHIFT   0 /* EQ4_B2_PG - [15:0] */

Definition at line 5973 of file registers.h.

#define ARIZONA_EQ4_B2_PG_WIDTH   16 /* EQ4_B2_PG - [15:0] */

Definition at line 5974 of file registers.h.

#define ARIZONA_EQ4_B3_A_MASK   0xFFFF /* EQ4_B3_A - [15:0] */

Definition at line 5979 of file registers.h.

#define ARIZONA_EQ4_B3_A_SHIFT   0 /* EQ4_B3_A - [15:0] */

Definition at line 5980 of file registers.h.

#define ARIZONA_EQ4_B3_A_WIDTH   16 /* EQ4_B3_A - [15:0] */

Definition at line 5981 of file registers.h.

#define ARIZONA_EQ4_B3_B_MASK   0xFFFF /* EQ4_B3_B - [15:0] */

Definition at line 5986 of file registers.h.

#define ARIZONA_EQ4_B3_B_SHIFT   0 /* EQ4_B3_B - [15:0] */

Definition at line 5987 of file registers.h.

#define ARIZONA_EQ4_B3_B_WIDTH   16 /* EQ4_B3_B - [15:0] */

Definition at line 5988 of file registers.h.

#define ARIZONA_EQ4_B3_C_MASK   0xFFFF /* EQ4_B3_C - [15:0] */

Definition at line 5993 of file registers.h.

#define ARIZONA_EQ4_B3_C_SHIFT   0 /* EQ4_B3_C - [15:0] */

Definition at line 5994 of file registers.h.

#define ARIZONA_EQ4_B3_C_WIDTH   16 /* EQ4_B3_C - [15:0] */

Definition at line 5995 of file registers.h.

#define ARIZONA_EQ4_B3_GAIN_MASK   0x003E /* EQ4_B3_GAIN - [5:1] */

Definition at line 5905 of file registers.h.

#define ARIZONA_EQ4_B3_GAIN_SHIFT   1 /* EQ4_B3_GAIN - [5:1] */

Definition at line 5906 of file registers.h.

#define ARIZONA_EQ4_B3_GAIN_WIDTH   5 /* EQ4_B3_GAIN - [5:1] */

Definition at line 5907 of file registers.h.

#define ARIZONA_EQ4_B3_PG_MASK   0xFFFF /* EQ4_B3_PG - [15:0] */

Definition at line 6000 of file registers.h.

#define ARIZONA_EQ4_B3_PG_SHIFT   0 /* EQ4_B3_PG - [15:0] */

Definition at line 6001 of file registers.h.

#define ARIZONA_EQ4_B3_PG_WIDTH   16 /* EQ4_B3_PG - [15:0] */

Definition at line 6002 of file registers.h.

#define ARIZONA_EQ4_B4_A_MASK   0xFFFF /* EQ4_B4_A - [15:0] */

Definition at line 6007 of file registers.h.

#define ARIZONA_EQ4_B4_A_SHIFT   0 /* EQ4_B4_A - [15:0] */

Definition at line 6008 of file registers.h.

#define ARIZONA_EQ4_B4_A_WIDTH   16 /* EQ4_B4_A - [15:0] */

Definition at line 6009 of file registers.h.

#define ARIZONA_EQ4_B4_B_MASK   0xFFFF /* EQ4_B4_B - [15:0] */

Definition at line 6014 of file registers.h.

#define ARIZONA_EQ4_B4_B_SHIFT   0 /* EQ4_B4_B - [15:0] */

Definition at line 6015 of file registers.h.

#define ARIZONA_EQ4_B4_B_WIDTH   16 /* EQ4_B4_B - [15:0] */

Definition at line 6016 of file registers.h.

#define ARIZONA_EQ4_B4_C_MASK   0xFFFF /* EQ4_B4_C - [15:0] */

Definition at line 6021 of file registers.h.

#define ARIZONA_EQ4_B4_C_SHIFT   0 /* EQ4_B4_C - [15:0] */

Definition at line 6022 of file registers.h.

#define ARIZONA_EQ4_B4_C_WIDTH   16 /* EQ4_B4_C - [15:0] */

Definition at line 6023 of file registers.h.

#define ARIZONA_EQ4_B4_GAIN_MASK   0xF800 /* EQ4_B4_GAIN - [15:11] */

Definition at line 5916 of file registers.h.

#define ARIZONA_EQ4_B4_GAIN_SHIFT   11 /* EQ4_B4_GAIN - [15:11] */

Definition at line 5917 of file registers.h.

#define ARIZONA_EQ4_B4_GAIN_WIDTH   5 /* EQ4_B4_GAIN - [15:11] */

Definition at line 5918 of file registers.h.

#define ARIZONA_EQ4_B4_PG_MASK   0xFFFF /* EQ4_B4_PG - [15:0] */

Definition at line 6028 of file registers.h.

#define ARIZONA_EQ4_B4_PG_SHIFT   0 /* EQ4_B4_PG - [15:0] */

Definition at line 6029 of file registers.h.

#define ARIZONA_EQ4_B4_PG_WIDTH   16 /* EQ4_B4_PG - [15:0] */

Definition at line 6030 of file registers.h.

#define ARIZONA_EQ4_B5_A_MASK   0xFFFF /* EQ4_B5_A - [15:0] */

Definition at line 6035 of file registers.h.

#define ARIZONA_EQ4_B5_A_SHIFT   0 /* EQ4_B5_A - [15:0] */

Definition at line 6036 of file registers.h.

#define ARIZONA_EQ4_B5_A_WIDTH   16 /* EQ4_B5_A - [15:0] */

Definition at line 6037 of file registers.h.

#define ARIZONA_EQ4_B5_B_MASK   0xFFFF /* EQ4_B5_B - [15:0] */

Definition at line 6042 of file registers.h.

#define ARIZONA_EQ4_B5_B_SHIFT   0 /* EQ4_B5_B - [15:0] */

Definition at line 6043 of file registers.h.

#define ARIZONA_EQ4_B5_B_WIDTH   16 /* EQ4_B5_B - [15:0] */

Definition at line 6044 of file registers.h.

#define ARIZONA_EQ4_B5_GAIN_MASK   0x07C0 /* EQ4_B5_GAIN - [10:6] */

Definition at line 5919 of file registers.h.

#define ARIZONA_EQ4_B5_GAIN_SHIFT   6 /* EQ4_B5_GAIN - [10:6] */

Definition at line 5920 of file registers.h.

#define ARIZONA_EQ4_B5_GAIN_WIDTH   5 /* EQ4_B5_GAIN - [10:6] */

Definition at line 5921 of file registers.h.

#define ARIZONA_EQ4_B5_PG_MASK   0xFFFF /* EQ4_B5_PG - [15:0] */

Definition at line 6049 of file registers.h.

#define ARIZONA_EQ4_B5_PG_SHIFT   0 /* EQ4_B5_PG - [15:0] */

Definition at line 6050 of file registers.h.

#define ARIZONA_EQ4_B5_PG_WIDTH   16 /* EQ4_B5_PG - [15:0] */

Definition at line 6051 of file registers.h.

#define ARIZONA_EQ4_ENA   0x0001 /* EQ4_ENA */

Definition at line 5908 of file registers.h.

#define ARIZONA_EQ4_ENA_MASK   0x0001 /* EQ4_ENA */

Definition at line 5909 of file registers.h.

#define ARIZONA_EQ4_ENA_SHIFT   0 /* EQ4_ENA */

Definition at line 5910 of file registers.h.

#define ARIZONA_EQ4_ENA_WIDTH   1 /* EQ4_ENA */

Definition at line 5911 of file registers.h.

#define ARIZONA_EQ4MIX_INPUT_1_SOURCE   0x898

Definition at line 601 of file registers.h.

#define ARIZONA_EQ4MIX_INPUT_1_VOLUME   0x899

Definition at line 602 of file registers.h.

#define ARIZONA_EQ4MIX_INPUT_2_SOURCE   0x89A

Definition at line 603 of file registers.h.

#define ARIZONA_EQ4MIX_INPUT_2_VOLUME   0x89B

Definition at line 604 of file registers.h.

#define ARIZONA_EQ4MIX_INPUT_3_SOURCE   0x89C

Definition at line 605 of file registers.h.

#define ARIZONA_EQ4MIX_INPUT_3_VOLUME   0x89D

Definition at line 606 of file registers.h.

#define ARIZONA_EQ4MIX_INPUT_4_SOURCE   0x89E

Definition at line 607 of file registers.h.

#define ARIZONA_EQ4MIX_INPUT_4_VOLUME   0x89F

Definition at line 608 of file registers.h.

#define ARIZONA_FLL1_CLK_REF_DIV_MASK   0x00C0 /* FLL1_CLK_REF_DIV - [7:6] */

Definition at line 1626 of file registers.h.

#define ARIZONA_FLL1_CLK_REF_DIV_SHIFT   6 /* FLL1_CLK_REF_DIV - [7:6] */

Definition at line 1627 of file registers.h.

#define ARIZONA_FLL1_CLK_REF_DIV_WIDTH   2 /* FLL1_CLK_REF_DIV - [7:6] */

Definition at line 1628 of file registers.h.

#define ARIZONA_FLL1_CLK_REF_SRC_MASK   0x000F /* FLL1_CLK_REF_SRC - [3:0] */

Definition at line 1629 of file registers.h.

#define ARIZONA_FLL1_CLK_REF_SRC_SHIFT   0 /* FLL1_CLK_REF_SRC - [3:0] */

Definition at line 1630 of file registers.h.

#define ARIZONA_FLL1_CLK_REF_SRC_WIDTH   4 /* FLL1_CLK_REF_SRC - [3:0] */

Definition at line 1631 of file registers.h.

#define ARIZONA_FLL1_CLK_SYNC_DIV_MASK   0x00C0 /* FLL1_CLK_SYNC_DIV - [7:6] */

Definition at line 1683 of file registers.h.

#define ARIZONA_FLL1_CLK_SYNC_DIV_SHIFT   6 /* FLL1_CLK_SYNC_DIV - [7:6] */

Definition at line 1684 of file registers.h.

#define ARIZONA_FLL1_CLK_SYNC_DIV_WIDTH   2 /* FLL1_CLK_SYNC_DIV - [7:6] */

Definition at line 1685 of file registers.h.

#define ARIZONA_FLL1_CLK_SYNC_SRC_MASK   0x000F /* FLL1_CLK_SYNC_SRC - [3:0] */

Definition at line 1686 of file registers.h.

#define ARIZONA_FLL1_CLK_SYNC_SRC_SHIFT   0 /* FLL1_CLK_SYNC_SRC - [3:0] */

Definition at line 1687 of file registers.h.

#define ARIZONA_FLL1_CLK_SYNC_SRC_WIDTH   4 /* FLL1_CLK_SYNC_SRC - [3:0] */

Definition at line 1688 of file registers.h.

#define ARIZONA_FLL1_CLOCK_OK_EINT1   0x0001 /* FLL1_CLOCK_OK_EINT1 */

Definition at line 4380 of file registers.h.

#define ARIZONA_FLL1_CLOCK_OK_EINT1_MASK   0x0001 /* FLL1_CLOCK_OK_EINT1 */

Definition at line 4381 of file registers.h.

#define ARIZONA_FLL1_CLOCK_OK_EINT1_SHIFT   0 /* FLL1_CLOCK_OK_EINT1 */

Definition at line 4382 of file registers.h.

#define ARIZONA_FLL1_CLOCK_OK_EINT1_WIDTH   1 /* FLL1_CLOCK_OK_EINT1 */

Definition at line 4383 of file registers.h.

#define ARIZONA_FLL1_CLOCK_OK_EINT2   0x0001 /* FLL1_CLOCK_OK_EINT2 */

Definition at line 4724 of file registers.h.

#define ARIZONA_FLL1_CLOCK_OK_EINT2_MASK   0x0001 /* FLL1_CLOCK_OK_EINT2 */

Definition at line 4725 of file registers.h.

#define ARIZONA_FLL1_CLOCK_OK_EINT2_SHIFT   0 /* FLL1_CLOCK_OK_EINT2 */

Definition at line 4726 of file registers.h.

#define ARIZONA_FLL1_CLOCK_OK_EINT2_WIDTH   1 /* FLL1_CLOCK_OK_EINT2 */

Definition at line 4727 of file registers.h.

#define ARIZONA_FLL1_CLOCK_OK_STS   0x0001 /* FLL1_CLOCK_OK_STS */

Definition at line 5049 of file registers.h.

#define ARIZONA_FLL1_CLOCK_OK_STS_MASK   0x0001 /* FLL1_CLOCK_OK_STS */

Definition at line 5050 of file registers.h.

#define ARIZONA_FLL1_CLOCK_OK_STS_SHIFT   0 /* FLL1_CLOCK_OK_STS */

Definition at line 5051 of file registers.h.

#define ARIZONA_FLL1_CLOCK_OK_STS_WIDTH   1 /* FLL1_CLOCK_OK_STS */

Definition at line 5052 of file registers.h.

#define ARIZONA_FLL1_CONTROL_1   0x171

Definition at line 79 of file registers.h.

#define ARIZONA_FLL1_CONTROL_2   0x172

Definition at line 80 of file registers.h.

#define ARIZONA_FLL1_CONTROL_3   0x173

Definition at line 81 of file registers.h.

#define ARIZONA_FLL1_CONTROL_4   0x174

Definition at line 82 of file registers.h.

#define ARIZONA_FLL1_CONTROL_5   0x175

Definition at line 83 of file registers.h.

#define ARIZONA_FLL1_CONTROL_6   0x176

Definition at line 84 of file registers.h.

#define ARIZONA_FLL1_CTRL_UPD   0x8000 /* FLL1_CTRL_UPD */

Definition at line 1591 of file registers.h.

#define ARIZONA_FLL1_CTRL_UPD_MASK   0x8000 /* FLL1_CTRL_UPD */

Definition at line 1592 of file registers.h.

#define ARIZONA_FLL1_CTRL_UPD_SHIFT   15 /* FLL1_CTRL_UPD */

Definition at line 1593 of file registers.h.

#define ARIZONA_FLL1_CTRL_UPD_WIDTH   1 /* FLL1_CTRL_UPD */

Definition at line 1594 of file registers.h.

#define ARIZONA_FLL1_ENA   0x0001 /* FLL1_ENA */

Definition at line 1583 of file registers.h.

#define ARIZONA_FLL1_ENA_MASK   0x0001 /* FLL1_ENA */

Definition at line 1584 of file registers.h.

#define ARIZONA_FLL1_ENA_SHIFT   0 /* FLL1_ENA */

Definition at line 1585 of file registers.h.

#define ARIZONA_FLL1_ENA_WIDTH   1 /* FLL1_ENA */

Definition at line 1586 of file registers.h.

#define ARIZONA_FLL1_FRATIO_MASK   0x0700 /* FLL1_FRATIO - [10:8] */

Definition at line 1616 of file registers.h.

#define ARIZONA_FLL1_FRATIO_SHIFT   8 /* FLL1_FRATIO - [10:8] */

Definition at line 1617 of file registers.h.

#define ARIZONA_FLL1_FRATIO_WIDTH   3 /* FLL1_FRATIO - [10:8] */

Definition at line 1618 of file registers.h.

#define ARIZONA_FLL1_FRC_INTEG_UPD   0x8000 /* FLL1_FRC_INTEG_UPD */

Definition at line 1636 of file registers.h.

#define ARIZONA_FLL1_FRC_INTEG_UPD_MASK   0x8000 /* FLL1_FRC_INTEG_UPD */

Definition at line 1637 of file registers.h.

#define ARIZONA_FLL1_FRC_INTEG_UPD_SHIFT   15 /* FLL1_FRC_INTEG_UPD */

Definition at line 1638 of file registers.h.

#define ARIZONA_FLL1_FRC_INTEG_UPD_WIDTH   1 /* FLL1_FRC_INTEG_UPD */

Definition at line 1639 of file registers.h.

#define ARIZONA_FLL1_FRC_INTEG_VAL_MASK   0x0FFF /* FLL1_FRC_INTEG_VAL - [11:0] */

Definition at line 1640 of file registers.h.

#define ARIZONA_FLL1_FRC_INTEG_VAL_SHIFT   0 /* FLL1_FRC_INTEG_VAL - [11:0] */

Definition at line 1641 of file registers.h.

#define ARIZONA_FLL1_FRC_INTEG_VAL_WIDTH   12 /* FLL1_FRC_INTEG_VAL - [11:0] */

Definition at line 1642 of file registers.h.

#define ARIZONA_FLL1_FREERUN   0x0002 /* FLL1_FREERUN */

Definition at line 1579 of file registers.h.

#define ARIZONA_FLL1_FREERUN_MASK   0x0002 /* FLL1_FREERUN */

Definition at line 1580 of file registers.h.

#define ARIZONA_FLL1_FREERUN_SHIFT   1 /* FLL1_FREERUN */

Definition at line 1581 of file registers.h.

#define ARIZONA_FLL1_FREERUN_WIDTH   1 /* FLL1_FREERUN */

Definition at line 1582 of file registers.h.

#define ARIZONA_FLL1_GPDIV_ENA   0x0001 /* FLL1_GPDIV_ENA */

Definition at line 1709 of file registers.h.

#define ARIZONA_FLL1_GPDIV_ENA_MASK   0x0001 /* FLL1_GPDIV_ENA */

Definition at line 1710 of file registers.h.

#define ARIZONA_FLL1_GPDIV_ENA_SHIFT   0 /* FLL1_GPDIV_ENA */

Definition at line 1711 of file registers.h.

#define ARIZONA_FLL1_GPDIV_ENA_WIDTH   1 /* FLL1_GPDIV_ENA */

Definition at line 1712 of file registers.h.

#define ARIZONA_FLL1_GPDIV_MASK   0x00FE /* FLL1_GPDIV - [7:1] */

Definition at line 1706 of file registers.h.

#define ARIZONA_FLL1_GPDIV_SHIFT   1 /* FLL1_GPDIV - [7:1] */

Definition at line 1707 of file registers.h.

#define ARIZONA_FLL1_GPDIV_WIDTH   7 /* FLL1_GPDIV - [7:1] */

Definition at line 1708 of file registers.h.

#define ARIZONA_FLL1_GPIO_CLOCK   0x18A

Definition at line 94 of file registers.h.

#define ARIZONA_FLL1_LAMBDA_MASK   0xFFFF /* FLL1_LAMBDA - [15:0] */

Definition at line 1609 of file registers.h.

#define ARIZONA_FLL1_LAMBDA_SHIFT   0 /* FLL1_LAMBDA - [15:0] */

Definition at line 1610 of file registers.h.

#define ARIZONA_FLL1_LAMBDA_WIDTH   16 /* FLL1_LAMBDA - [15:0] */

Definition at line 1611 of file registers.h.

#define ARIZONA_FLL1_LOCK_EINT1   0x0004 /* FLL1_LOCK_EINT1 */

Definition at line 4304 of file registers.h.

#define ARIZONA_FLL1_LOCK_EINT1_MASK   0x0004 /* FLL1_LOCK_EINT1 */

Definition at line 4305 of file registers.h.

#define ARIZONA_FLL1_LOCK_EINT1_SHIFT   2 /* FLL1_LOCK_EINT1 */

Definition at line 4306 of file registers.h.

#define ARIZONA_FLL1_LOCK_EINT1_WIDTH   1 /* FLL1_LOCK_EINT1 */

Definition at line 4307 of file registers.h.

#define ARIZONA_FLL1_LOCK_EINT2   0x0004 /* FLL1_LOCK_EINT2 */

Definition at line 4648 of file registers.h.

#define ARIZONA_FLL1_LOCK_EINT2_MASK   0x0004 /* FLL1_LOCK_EINT2 */

Definition at line 4649 of file registers.h.

#define ARIZONA_FLL1_LOCK_EINT2_SHIFT   2 /* FLL1_LOCK_EINT2 */

Definition at line 4650 of file registers.h.

#define ARIZONA_FLL1_LOCK_EINT2_WIDTH   1 /* FLL1_LOCK_EINT2 */

Definition at line 4651 of file registers.h.

#define ARIZONA_FLL1_LOCK_STS   0x0004 /* FLL1_LOCK_STS */

Definition at line 4973 of file registers.h.

#define ARIZONA_FLL1_LOCK_STS_MASK   0x0004 /* FLL1_LOCK_STS */

Definition at line 4974 of file registers.h.

#define ARIZONA_FLL1_LOCK_STS_SHIFT   2 /* FLL1_LOCK_STS */

Definition at line 4975 of file registers.h.

#define ARIZONA_FLL1_LOCK_STS_WIDTH   1 /* FLL1_LOCK_STS */

Definition at line 4976 of file registers.h.

#define ARIZONA_FLL1_LOOP_FILTER_TEST_1   0x177

Definition at line 85 of file registers.h.

#define ARIZONA_FLL1_N_MASK   0x03FF /* FLL1_N - [9:0] */

Definition at line 1595 of file registers.h.

#define ARIZONA_FLL1_N_SHIFT   0 /* FLL1_N - [9:0] */

Definition at line 1596 of file registers.h.

#define ARIZONA_FLL1_N_WIDTH   10 /* FLL1_N - [9:0] */

Definition at line 1597 of file registers.h.

#define ARIZONA_FLL1_NCO_TEST_0   0x178

Definition at line 86 of file registers.h.

#define ARIZONA_FLL1_OUTDIV_MASK   0x000E /* FLL1_OUTDIV - [3:1] */

Definition at line 1619 of file registers.h.

#define ARIZONA_FLL1_OUTDIV_SHIFT   1 /* FLL1_OUTDIV - [3:1] */

Definition at line 1620 of file registers.h.

#define ARIZONA_FLL1_OUTDIV_WIDTH   3 /* FLL1_OUTDIV - [3:1] */

Definition at line 1621 of file registers.h.

#define ARIZONA_FLL1_SPREAD_SPECTRUM   0x189

Definition at line 93 of file registers.h.

#define ARIZONA_FLL1_SS_AMPL_MASK   0x0030 /* FLL1_SS_AMPL - [5:4] */

Definition at line 1693 of file registers.h.

#define ARIZONA_FLL1_SS_AMPL_SHIFT   4 /* FLL1_SS_AMPL - [5:4] */

Definition at line 1694 of file registers.h.

#define ARIZONA_FLL1_SS_AMPL_WIDTH   2 /* FLL1_SS_AMPL - [5:4] */

Definition at line 1695 of file registers.h.

#define ARIZONA_FLL1_SS_FREQ_MASK   0x000C /* FLL1_SS_FREQ - [3:2] */

Definition at line 1696 of file registers.h.

#define ARIZONA_FLL1_SS_FREQ_SHIFT   2 /* FLL1_SS_FREQ - [3:2] */

Definition at line 1697 of file registers.h.

#define ARIZONA_FLL1_SS_FREQ_WIDTH   2 /* FLL1_SS_FREQ - [3:2] */

Definition at line 1698 of file registers.h.

#define ARIZONA_FLL1_SS_SEL_MASK   0x0003 /* FLL1_SS_SEL - [1:0] */

Definition at line 1699 of file registers.h.

#define ARIZONA_FLL1_SS_SEL_SHIFT   0 /* FLL1_SS_SEL - [1:0] */

Definition at line 1700 of file registers.h.

#define ARIZONA_FLL1_SS_SEL_WIDTH   2 /* FLL1_SS_SEL - [1:0] */

Definition at line 1701 of file registers.h.

#define ARIZONA_FLL1_SYNC_ENA   0x0001 /* FLL1_SYNC_ENA */

Definition at line 1647 of file registers.h.

#define ARIZONA_FLL1_SYNC_ENA_MASK   0x0001 /* FLL1_SYNC_ENA */

Definition at line 1648 of file registers.h.

#define ARIZONA_FLL1_SYNC_ENA_SHIFT   0 /* FLL1_SYNC_ENA */

Definition at line 1649 of file registers.h.

#define ARIZONA_FLL1_SYNC_ENA_WIDTH   1 /* FLL1_SYNC_ENA */

Definition at line 1650 of file registers.h.

#define ARIZONA_FLL1_SYNC_FRATIO_MASK   0x0700 /* FLL1_SYNC_FRATIO - [10:8] */

Definition at line 1676 of file registers.h.

#define ARIZONA_FLL1_SYNC_FRATIO_SHIFT   8 /* FLL1_SYNC_FRATIO - [10:8] */

Definition at line 1677 of file registers.h.

#define ARIZONA_FLL1_SYNC_FRATIO_WIDTH   3 /* FLL1_SYNC_FRATIO - [10:8] */

Definition at line 1678 of file registers.h.

#define ARIZONA_FLL1_SYNC_LAMBDA_MASK   0xFFFF /* FLL1_SYNC_LAMBDA - [15:0] */

Definition at line 1669 of file registers.h.

#define ARIZONA_FLL1_SYNC_LAMBDA_SHIFT   0 /* FLL1_SYNC_LAMBDA - [15:0] */

Definition at line 1670 of file registers.h.

#define ARIZONA_FLL1_SYNC_LAMBDA_WIDTH   16 /* FLL1_SYNC_LAMBDA - [15:0] */

Definition at line 1671 of file registers.h.

#define ARIZONA_FLL1_SYNC_N_MASK   0x03FF /* FLL1_SYNC_N - [9:0] */

Definition at line 1655 of file registers.h.

#define ARIZONA_FLL1_SYNC_N_SHIFT   0 /* FLL1_SYNC_N - [9:0] */

Definition at line 1656 of file registers.h.

#define ARIZONA_FLL1_SYNC_N_WIDTH   10 /* FLL1_SYNC_N - [9:0] */

Definition at line 1657 of file registers.h.

#define ARIZONA_FLL1_SYNC_THETA_MASK   0xFFFF /* FLL1_SYNC_THETA - [15:0] */

Definition at line 1662 of file registers.h.

#define ARIZONA_FLL1_SYNC_THETA_SHIFT   0 /* FLL1_SYNC_THETA - [15:0] */

Definition at line 1663 of file registers.h.

#define ARIZONA_FLL1_SYNC_THETA_WIDTH   16 /* FLL1_SYNC_THETA - [15:0] */

Definition at line 1664 of file registers.h.

#define ARIZONA_FLL1_SYNCHRONISER_1   0x181

Definition at line 87 of file registers.h.

#define ARIZONA_FLL1_SYNCHRONISER_2   0x182

Definition at line 88 of file registers.h.

#define ARIZONA_FLL1_SYNCHRONISER_3   0x183

Definition at line 89 of file registers.h.

#define ARIZONA_FLL1_SYNCHRONISER_4   0x184

Definition at line 90 of file registers.h.

#define ARIZONA_FLL1_SYNCHRONISER_5   0x185

Definition at line 91 of file registers.h.

#define ARIZONA_FLL1_SYNCHRONISER_6   0x186

Definition at line 92 of file registers.h.

#define ARIZONA_FLL1_THETA_MASK   0xFFFF /* FLL1_THETA - [15:0] */

Definition at line 1602 of file registers.h.

#define ARIZONA_FLL1_THETA_SHIFT   0 /* FLL1_THETA - [15:0] */

Definition at line 1603 of file registers.h.

#define ARIZONA_FLL1_THETA_WIDTH   16 /* FLL1_THETA - [15:0] */

Definition at line 1604 of file registers.h.

#define ARIZONA_FLL2_CLK_REF_DIV_MASK   0x00C0 /* FLL2_CLK_REF_DIV - [7:6] */

Definition at line 1764 of file registers.h.

#define ARIZONA_FLL2_CLK_REF_DIV_SHIFT   6 /* FLL2_CLK_REF_DIV - [7:6] */

Definition at line 1765 of file registers.h.

#define ARIZONA_FLL2_CLK_REF_DIV_WIDTH   2 /* FLL2_CLK_REF_DIV - [7:6] */

Definition at line 1766 of file registers.h.

#define ARIZONA_FLL2_CLK_REF_SRC_MASK   0x000F /* FLL2_CLK_REF_SRC - [3:0] */

Definition at line 1767 of file registers.h.

#define ARIZONA_FLL2_CLK_REF_SRC_SHIFT   0 /* FLL2_CLK_REF_SRC - [3:0] */

Definition at line 1768 of file registers.h.

#define ARIZONA_FLL2_CLK_REF_SRC_WIDTH   4 /* FLL2_CLK_REF_SRC - [3:0] */

Definition at line 1769 of file registers.h.

#define ARIZONA_FLL2_CLK_SYNC_DIV_MASK   0x00C0 /* FLL2_CLK_SYNC_DIV - [7:6] */

Definition at line 1821 of file registers.h.

#define ARIZONA_FLL2_CLK_SYNC_DIV_SHIFT   6 /* FLL2_CLK_SYNC_DIV - [7:6] */

Definition at line 1822 of file registers.h.

#define ARIZONA_FLL2_CLK_SYNC_DIV_WIDTH   2 /* FLL2_CLK_SYNC_DIV - [7:6] */

Definition at line 1823 of file registers.h.

#define ARIZONA_FLL2_CLK_SYNC_SRC_MASK   0x000F /* FLL2_CLK_SYNC_SRC - [3:0] */

Definition at line 1824 of file registers.h.

#define ARIZONA_FLL2_CLK_SYNC_SRC_SHIFT   0 /* FLL2_CLK_SYNC_SRC - [3:0] */

Definition at line 1825 of file registers.h.

#define ARIZONA_FLL2_CLK_SYNC_SRC_WIDTH   4 /* FLL2_CLK_SYNC_SRC - [3:0] */

Definition at line 1826 of file registers.h.

#define ARIZONA_FLL2_CLOCK_OK_EINT1   0x0002 /* FLL2_CLOCK_OK_EINT1 */

Definition at line 4376 of file registers.h.

#define ARIZONA_FLL2_CLOCK_OK_EINT1_MASK   0x0002 /* FLL2_CLOCK_OK_EINT1 */

Definition at line 4377 of file registers.h.

#define ARIZONA_FLL2_CLOCK_OK_EINT1_SHIFT   1 /* FLL2_CLOCK_OK_EINT1 */

Definition at line 4378 of file registers.h.

#define ARIZONA_FLL2_CLOCK_OK_EINT1_WIDTH   1 /* FLL2_CLOCK_OK_EINT1 */

Definition at line 4379 of file registers.h.

#define ARIZONA_FLL2_CLOCK_OK_EINT2   0x0002 /* FLL2_CLOCK_OK_EINT2 */

Definition at line 4720 of file registers.h.

#define ARIZONA_FLL2_CLOCK_OK_EINT2_MASK   0x0002 /* FLL2_CLOCK_OK_EINT2 */

Definition at line 4721 of file registers.h.

#define ARIZONA_FLL2_CLOCK_OK_EINT2_SHIFT   1 /* FLL2_CLOCK_OK_EINT2 */

Definition at line 4722 of file registers.h.

#define ARIZONA_FLL2_CLOCK_OK_EINT2_WIDTH   1 /* FLL2_CLOCK_OK_EINT2 */

Definition at line 4723 of file registers.h.

#define ARIZONA_FLL2_CLOCK_OK_STS   0x0002 /* FLL2_CLOCK_OK_STS */

Definition at line 5045 of file registers.h.

#define ARIZONA_FLL2_CLOCK_OK_STS_MASK   0x0002 /* FLL2_CLOCK_OK_STS */

Definition at line 5046 of file registers.h.

#define ARIZONA_FLL2_CLOCK_OK_STS_SHIFT   1 /* FLL2_CLOCK_OK_STS */

Definition at line 5047 of file registers.h.

#define ARIZONA_FLL2_CLOCK_OK_STS_WIDTH   1 /* FLL2_CLOCK_OK_STS */

Definition at line 5048 of file registers.h.

#define ARIZONA_FLL2_CONTROL_1   0x191

Definition at line 95 of file registers.h.

#define ARIZONA_FLL2_CONTROL_2   0x192

Definition at line 96 of file registers.h.

#define ARIZONA_FLL2_CONTROL_3   0x193

Definition at line 97 of file registers.h.

#define ARIZONA_FLL2_CONTROL_4   0x194

Definition at line 98 of file registers.h.

#define ARIZONA_FLL2_CONTROL_5   0x195

Definition at line 99 of file registers.h.

#define ARIZONA_FLL2_CONTROL_6   0x196

Definition at line 100 of file registers.h.

#define ARIZONA_FLL2_CTRL_UPD   0x8000 /* FLL2_CTRL_UPD */

Definition at line 1729 of file registers.h.

#define ARIZONA_FLL2_CTRL_UPD_MASK   0x8000 /* FLL2_CTRL_UPD */

Definition at line 1730 of file registers.h.

#define ARIZONA_FLL2_CTRL_UPD_SHIFT   15 /* FLL2_CTRL_UPD */

Definition at line 1731 of file registers.h.

#define ARIZONA_FLL2_CTRL_UPD_WIDTH   1 /* FLL2_CTRL_UPD */

Definition at line 1732 of file registers.h.

#define ARIZONA_FLL2_ENA   0x0001 /* FLL2_ENA */

Definition at line 1721 of file registers.h.

#define ARIZONA_FLL2_ENA_MASK   0x0001 /* FLL2_ENA */

Definition at line 1722 of file registers.h.

#define ARIZONA_FLL2_ENA_SHIFT   0 /* FLL2_ENA */

Definition at line 1723 of file registers.h.

#define ARIZONA_FLL2_ENA_WIDTH   1 /* FLL2_ENA */

Definition at line 1724 of file registers.h.

#define ARIZONA_FLL2_FRATIO_MASK   0x0700 /* FLL2_FRATIO - [10:8] */

Definition at line 1754 of file registers.h.

#define ARIZONA_FLL2_FRATIO_SHIFT   8 /* FLL2_FRATIO - [10:8] */

Definition at line 1755 of file registers.h.

#define ARIZONA_FLL2_FRATIO_WIDTH   3 /* FLL2_FRATIO - [10:8] */

Definition at line 1756 of file registers.h.

#define ARIZONA_FLL2_FRC_INTEG_UPD   0x8000 /* FLL2_FRC_INTEG_UPD */

Definition at line 1774 of file registers.h.

#define ARIZONA_FLL2_FRC_INTEG_UPD_MASK   0x8000 /* FLL2_FRC_INTEG_UPD */

Definition at line 1775 of file registers.h.

#define ARIZONA_FLL2_FRC_INTEG_UPD_SHIFT   15 /* FLL2_FRC_INTEG_UPD */

Definition at line 1776 of file registers.h.

#define ARIZONA_FLL2_FRC_INTEG_UPD_WIDTH   1 /* FLL2_FRC_INTEG_UPD */

Definition at line 1777 of file registers.h.

#define ARIZONA_FLL2_FRC_INTEG_VAL_MASK   0x0FFF /* FLL2_FRC_INTEG_VAL - [11:0] */

Definition at line 1778 of file registers.h.

#define ARIZONA_FLL2_FRC_INTEG_VAL_SHIFT   0 /* FLL2_FRC_INTEG_VAL - [11:0] */

Definition at line 1779 of file registers.h.

#define ARIZONA_FLL2_FRC_INTEG_VAL_WIDTH   12 /* FLL2_FRC_INTEG_VAL - [11:0] */

Definition at line 1780 of file registers.h.

#define ARIZONA_FLL2_FREERUN   0x0002 /* FLL2_FREERUN */

Definition at line 1717 of file registers.h.

#define ARIZONA_FLL2_FREERUN_MASK   0x0002 /* FLL2_FREERUN */

Definition at line 1718 of file registers.h.

#define ARIZONA_FLL2_FREERUN_SHIFT   1 /* FLL2_FREERUN */

Definition at line 1719 of file registers.h.

#define ARIZONA_FLL2_FREERUN_WIDTH   1 /* FLL2_FREERUN */

Definition at line 1720 of file registers.h.

#define ARIZONA_FLL2_GPDIV_ENA   0x0001 /* FLL2_GPDIV_ENA */

Definition at line 1847 of file registers.h.

#define ARIZONA_FLL2_GPDIV_ENA_MASK   0x0001 /* FLL2_GPDIV_ENA */

Definition at line 1848 of file registers.h.

#define ARIZONA_FLL2_GPDIV_ENA_SHIFT   0 /* FLL2_GPDIV_ENA */

Definition at line 1849 of file registers.h.

#define ARIZONA_FLL2_GPDIV_ENA_WIDTH   1 /* FLL2_GPDIV_ENA */

Definition at line 1850 of file registers.h.

#define ARIZONA_FLL2_GPDIV_MASK   0x00FE /* FLL2_GPDIV - [7:1] */

Definition at line 1844 of file registers.h.

#define ARIZONA_FLL2_GPDIV_SHIFT   1 /* FLL2_GPDIV - [7:1] */

Definition at line 1845 of file registers.h.

#define ARIZONA_FLL2_GPDIV_WIDTH   7 /* FLL2_GPDIV - [7:1] */

Definition at line 1846 of file registers.h.

#define ARIZONA_FLL2_GPIO_CLOCK   0x1AA

Definition at line 110 of file registers.h.

#define ARIZONA_FLL2_LAMBDA_MASK   0xFFFF /* FLL2_LAMBDA - [15:0] */

Definition at line 1747 of file registers.h.

#define ARIZONA_FLL2_LAMBDA_SHIFT   0 /* FLL2_LAMBDA - [15:0] */

Definition at line 1748 of file registers.h.

#define ARIZONA_FLL2_LAMBDA_WIDTH   16 /* FLL2_LAMBDA - [15:0] */

Definition at line 1749 of file registers.h.

#define ARIZONA_FLL2_LOCK_EINT1   0x0008 /* FLL2_LOCK_EINT1 */

Definition at line 4300 of file registers.h.

#define ARIZONA_FLL2_LOCK_EINT1_MASK   0x0008 /* FLL2_LOCK_EINT1 */

Definition at line 4301 of file registers.h.

#define ARIZONA_FLL2_LOCK_EINT1_SHIFT   3 /* FLL2_LOCK_EINT1 */

Definition at line 4302 of file registers.h.

#define ARIZONA_FLL2_LOCK_EINT1_WIDTH   1 /* FLL2_LOCK_EINT1 */

Definition at line 4303 of file registers.h.

#define ARIZONA_FLL2_LOCK_EINT2   0x0008 /* FLL2_LOCK_EINT2 */

Definition at line 4644 of file registers.h.

#define ARIZONA_FLL2_LOCK_EINT2_MASK   0x0008 /* FLL2_LOCK_EINT2 */

Definition at line 4645 of file registers.h.

#define ARIZONA_FLL2_LOCK_EINT2_SHIFT   3 /* FLL2_LOCK_EINT2 */

Definition at line 4646 of file registers.h.

#define ARIZONA_FLL2_LOCK_EINT2_WIDTH   1 /* FLL2_LOCK_EINT2 */

Definition at line 4647 of file registers.h.

#define ARIZONA_FLL2_LOCK_STS   0x0008 /* FLL2_LOCK_STS */

Definition at line 4969 of file registers.h.

#define ARIZONA_FLL2_LOCK_STS_MASK   0x0008 /* FLL2_LOCK_STS */

Definition at line 4970 of file registers.h.

#define ARIZONA_FLL2_LOCK_STS_SHIFT   3 /* FLL2_LOCK_STS */

Definition at line 4971 of file registers.h.

#define ARIZONA_FLL2_LOCK_STS_WIDTH   1 /* FLL2_LOCK_STS */

Definition at line 4972 of file registers.h.

#define ARIZONA_FLL2_LOOP_FILTER_TEST_1   0x197

Definition at line 101 of file registers.h.

#define ARIZONA_FLL2_N_MASK   0x03FF /* FLL2_N - [9:0] */

Definition at line 1733 of file registers.h.

#define ARIZONA_FLL2_N_SHIFT   0 /* FLL2_N - [9:0] */

Definition at line 1734 of file registers.h.

#define ARIZONA_FLL2_N_WIDTH   10 /* FLL2_N - [9:0] */

Definition at line 1735 of file registers.h.

#define ARIZONA_FLL2_NCO_TEST_0   0x198

Definition at line 102 of file registers.h.

#define ARIZONA_FLL2_OUTDIV_MASK   0x000E /* FLL2_OUTDIV - [3:1] */

Definition at line 1757 of file registers.h.

#define ARIZONA_FLL2_OUTDIV_SHIFT   1 /* FLL2_OUTDIV - [3:1] */

Definition at line 1758 of file registers.h.

#define ARIZONA_FLL2_OUTDIV_WIDTH   3 /* FLL2_OUTDIV - [3:1] */

Definition at line 1759 of file registers.h.

#define ARIZONA_FLL2_SPREAD_SPECTRUM   0x1A9

Definition at line 109 of file registers.h.

#define ARIZONA_FLL2_SS_AMPL_MASK   0x0030 /* FLL2_SS_AMPL - [5:4] */

Definition at line 1831 of file registers.h.

#define ARIZONA_FLL2_SS_AMPL_SHIFT   4 /* FLL2_SS_AMPL - [5:4] */

Definition at line 1832 of file registers.h.

#define ARIZONA_FLL2_SS_AMPL_WIDTH   2 /* FLL2_SS_AMPL - [5:4] */

Definition at line 1833 of file registers.h.

#define ARIZONA_FLL2_SS_FREQ_MASK   0x000C /* FLL2_SS_FREQ - [3:2] */

Definition at line 1834 of file registers.h.

#define ARIZONA_FLL2_SS_FREQ_SHIFT   2 /* FLL2_SS_FREQ - [3:2] */

Definition at line 1835 of file registers.h.

#define ARIZONA_FLL2_SS_FREQ_WIDTH   2 /* FLL2_SS_FREQ - [3:2] */

Definition at line 1836 of file registers.h.

#define ARIZONA_FLL2_SS_SEL_MASK   0x0003 /* FLL2_SS_SEL - [1:0] */

Definition at line 1837 of file registers.h.

#define ARIZONA_FLL2_SS_SEL_SHIFT   0 /* FLL2_SS_SEL - [1:0] */

Definition at line 1838 of file registers.h.

#define ARIZONA_FLL2_SS_SEL_WIDTH   2 /* FLL2_SS_SEL - [1:0] */

Definition at line 1839 of file registers.h.

#define ARIZONA_FLL2_SYNC_ENA   0x0001 /* FLL2_SYNC_ENA */

Definition at line 1785 of file registers.h.

#define ARIZONA_FLL2_SYNC_ENA_MASK   0x0001 /* FLL2_SYNC_ENA */

Definition at line 1786 of file registers.h.

#define ARIZONA_FLL2_SYNC_ENA_SHIFT   0 /* FLL2_SYNC_ENA */

Definition at line 1787 of file registers.h.

#define ARIZONA_FLL2_SYNC_ENA_WIDTH   1 /* FLL2_SYNC_ENA */

Definition at line 1788 of file registers.h.

#define ARIZONA_FLL2_SYNC_FRATIO_MASK   0x0700 /* FLL2_SYNC_FRATIO - [10:8] */

Definition at line 1814 of file registers.h.

#define ARIZONA_FLL2_SYNC_FRATIO_SHIFT   8 /* FLL2_SYNC_FRATIO - [10:8] */

Definition at line 1815 of file registers.h.

#define ARIZONA_FLL2_SYNC_FRATIO_WIDTH   3 /* FLL2_SYNC_FRATIO - [10:8] */

Definition at line 1816 of file registers.h.

#define ARIZONA_FLL2_SYNC_LAMBDA_MASK   0xFFFF /* FLL2_SYNC_LAMBDA - [15:0] */

Definition at line 1807 of file registers.h.

#define ARIZONA_FLL2_SYNC_LAMBDA_SHIFT   0 /* FLL2_SYNC_LAMBDA - [15:0] */

Definition at line 1808 of file registers.h.

#define ARIZONA_FLL2_SYNC_LAMBDA_WIDTH   16 /* FLL2_SYNC_LAMBDA - [15:0] */

Definition at line 1809 of file registers.h.

#define ARIZONA_FLL2_SYNC_N_MASK   0x03FF /* FLL2_SYNC_N - [9:0] */

Definition at line 1793 of file registers.h.

#define ARIZONA_FLL2_SYNC_N_SHIFT   0 /* FLL2_SYNC_N - [9:0] */

Definition at line 1794 of file registers.h.

#define ARIZONA_FLL2_SYNC_N_WIDTH   10 /* FLL2_SYNC_N - [9:0] */

Definition at line 1795 of file registers.h.

#define ARIZONA_FLL2_SYNC_THETA_MASK   0xFFFF /* FLL2_SYNC_THETA - [15:0] */

Definition at line 1800 of file registers.h.

#define ARIZONA_FLL2_SYNC_THETA_SHIFT   0 /* FLL2_SYNC_THETA - [15:0] */

Definition at line 1801 of file registers.h.

#define ARIZONA_FLL2_SYNC_THETA_WIDTH   16 /* FLL2_SYNC_THETA - [15:0] */

Definition at line 1802 of file registers.h.

#define ARIZONA_FLL2_SYNCHRONISER_1   0x1A1

Definition at line 103 of file registers.h.

#define ARIZONA_FLL2_SYNCHRONISER_2   0x1A2

Definition at line 104 of file registers.h.

#define ARIZONA_FLL2_SYNCHRONISER_3   0x1A3

Definition at line 105 of file registers.h.

#define ARIZONA_FLL2_SYNCHRONISER_4   0x1A4

Definition at line 106 of file registers.h.

#define ARIZONA_FLL2_SYNCHRONISER_5   0x1A5

Definition at line 107 of file registers.h.

#define ARIZONA_FLL2_SYNCHRONISER_6   0x1A6

Definition at line 108 of file registers.h.

#define ARIZONA_FLL2_THETA_MASK   0xFFFF /* FLL2_THETA - [15:0] */

Definition at line 1740 of file registers.h.

#define ARIZONA_FLL2_THETA_SHIFT   0 /* FLL2_THETA - [15:0] */

Definition at line 1741 of file registers.h.

#define ARIZONA_FLL2_THETA_WIDTH   16 /* FLL2_THETA - [15:0] */

Definition at line 1742 of file registers.h.

#define ARIZONA_FRAMER_REF_GEAR_MASK   0x000F /* FRAMER_REF_GEAR - [3:0] */

Definition at line 3798 of file registers.h.

#define ARIZONA_FRAMER_REF_GEAR_SHIFT   0 /* FRAMER_REF_GEAR - [3:0] */

Definition at line 3799 of file registers.h.

#define ARIZONA_FRAMER_REF_GEAR_WIDTH   4 /* FRAMER_REF_GEAR - [3:0] */

Definition at line 3800 of file registers.h.

#define ARIZONA_FX_CORE_OVERCLOCKED_STS   0x1000 /* FX_CORE_OVERCLOCKED_STS */

Definition at line 5061 of file registers.h.

#define ARIZONA_FX_CORE_OVERCLOCKED_STS_MASK   0x1000 /* FX_CORE_OVERCLOCKED_STS */

Definition at line 5062 of file registers.h.

#define ARIZONA_FX_CORE_OVERCLOCKED_STS_SHIFT   12 /* FX_CORE_OVERCLOCKED_STS */

Definition at line 5063 of file registers.h.

#define ARIZONA_FX_CORE_OVERCLOCKED_STS_WIDTH   1 /* FX_CORE_OVERCLOCKED_STS */

Definition at line 5064 of file registers.h.

#define ARIZONA_FX_CTRL1   0xE00

Definition at line 858 of file registers.h.

#define ARIZONA_FX_CTRL2   0xE01

Definition at line 859 of file registers.h.

#define ARIZONA_FX_RATE_MASK   0x7800 /* FX_RATE - [14:11] */

Definition at line 5393 of file registers.h.

#define ARIZONA_FX_RATE_SHIFT   11 /* FX_RATE - [14:11] */

Definition at line 5394 of file registers.h.

#define ARIZONA_FX_RATE_WIDTH   4 /* FX_RATE - [14:11] */

Definition at line 5395 of file registers.h.

#define ARIZONA_FX_STS_MASK   0xFFF0 /* FX_STS - [15:4] */

Definition at line 5400 of file registers.h.

#define ARIZONA_FX_STS_SHIFT   4 /* FX_STS - [15:4] */

Definition at line 5401 of file registers.h.

#define ARIZONA_FX_STS_WIDTH   12 /* FX_STS - [15:4] */

Definition at line 5402 of file registers.h.

#define ARIZONA_FX_UNDERCLOCKED_STS   0x0010 /* FX_UNDERCLOCKED_STS */

Definition at line 5177 of file registers.h.

#define ARIZONA_FX_UNDERCLOCKED_STS_MASK   0x0010 /* FX_UNDERCLOCKED_STS */

Definition at line 5178 of file registers.h.

#define ARIZONA_FX_UNDERCLOCKED_STS_SHIFT   4 /* FX_UNDERCLOCKED_STS */

Definition at line 5179 of file registers.h.

#define ARIZONA_FX_UNDERCLOCKED_STS_WIDTH   1 /* FX_UNDERCLOCKED_STS */

Definition at line 5180 of file registers.h.

#define ARIZONA_GP1_EINT1   0x0001 /* GP1_EINT1 */

Definition at line 4196 of file registers.h.

#define ARIZONA_GP1_EINT1_MASK   0x0001 /* GP1_EINT1 */

Definition at line 4197 of file registers.h.

#define ARIZONA_GP1_EINT1_SHIFT   0 /* GP1_EINT1 */

Definition at line 4198 of file registers.h.

#define ARIZONA_GP1_EINT1_WIDTH   1 /* GP1_EINT1 */

Definition at line 4199 of file registers.h.

#define ARIZONA_GP1_EINT2   0x0001 /* GP1_EINT2 */

Definition at line 4576 of file registers.h.

#define ARIZONA_GP1_EINT2_MASK   0x0001 /* GP1_EINT2 */

Definition at line 4577 of file registers.h.

#define ARIZONA_GP1_EINT2_SHIFT   0 /* GP1_EINT2 */

Definition at line 4578 of file registers.h.

#define ARIZONA_GP1_EINT2_WIDTH   1 /* GP1_EINT2 */

Definition at line 4579 of file registers.h.

#define ARIZONA_GP2_EINT1   0x0002 /* GP2_EINT1 */

Definition at line 4192 of file registers.h.

#define ARIZONA_GP2_EINT1_MASK   0x0002 /* GP2_EINT1 */

Definition at line 4193 of file registers.h.

#define ARIZONA_GP2_EINT1_SHIFT   1 /* GP2_EINT1 */

Definition at line 4194 of file registers.h.

#define ARIZONA_GP2_EINT1_WIDTH   1 /* GP2_EINT1 */

Definition at line 4195 of file registers.h.

#define ARIZONA_GP2_EINT2   0x0002 /* GP2_EINT2 */

Definition at line 4572 of file registers.h.

#define ARIZONA_GP2_EINT2_MASK   0x0002 /* GP2_EINT2 */

Definition at line 4573 of file registers.h.

#define ARIZONA_GP2_EINT2_SHIFT   1 /* GP2_EINT2 */

Definition at line 4574 of file registers.h.

#define ARIZONA_GP2_EINT2_WIDTH   1 /* GP2_EINT2 */

Definition at line 4575 of file registers.h.

#define ARIZONA_GP3_EINT1   0x0004 /* GP3_EINT1 */

Definition at line 4188 of file registers.h.

#define ARIZONA_GP3_EINT1_MASK   0x0004 /* GP3_EINT1 */

Definition at line 4189 of file registers.h.

#define ARIZONA_GP3_EINT1_SHIFT   2 /* GP3_EINT1 */

Definition at line 4190 of file registers.h.

#define ARIZONA_GP3_EINT1_WIDTH   1 /* GP3_EINT1 */

Definition at line 4191 of file registers.h.

#define ARIZONA_GP3_EINT2   0x0004 /* GP3_EINT2 */

Definition at line 4568 of file registers.h.

#define ARIZONA_GP3_EINT2_MASK   0x0004 /* GP3_EINT2 */

Definition at line 4569 of file registers.h.

#define ARIZONA_GP3_EINT2_SHIFT   2 /* GP3_EINT2 */

Definition at line 4570 of file registers.h.

#define ARIZONA_GP3_EINT2_WIDTH   1 /* GP3_EINT2 */

Definition at line 4571 of file registers.h.

#define ARIZONA_GP4_EINT1   0x0008 /* GP4_EINT1 */

Definition at line 4184 of file registers.h.

#define ARIZONA_GP4_EINT1_MASK   0x0008 /* GP4_EINT1 */

Definition at line 4185 of file registers.h.

#define ARIZONA_GP4_EINT1_SHIFT   3 /* GP4_EINT1 */

Definition at line 4186 of file registers.h.

#define ARIZONA_GP4_EINT1_WIDTH   1 /* GP4_EINT1 */

Definition at line 4187 of file registers.h.

#define ARIZONA_GP4_EINT2   0x0008 /* GP4_EINT2 */

Definition at line 4564 of file registers.h.

#define ARIZONA_GP4_EINT2_MASK   0x0008 /* GP4_EINT2 */

Definition at line 4565 of file registers.h.

#define ARIZONA_GP4_EINT2_SHIFT   3 /* GP4_EINT2 */

Definition at line 4566 of file registers.h.

#define ARIZONA_GP4_EINT2_WIDTH   1 /* GP4_EINT2 */

Definition at line 4567 of file registers.h.

#define ARIZONA_GP5_FALL_EINT1   0x0020 /* GP5_FALL_EINT1 */

Definition at line 5253 of file registers.h.

#define ARIZONA_GP5_FALL_EINT1_MASK   0x0020 /* GP5_FALL_EINT1 */

Definition at line 5254 of file registers.h.

#define ARIZONA_GP5_FALL_EINT1_SHIFT   5 /* GP5_FALL_EINT1 */

Definition at line 5255 of file registers.h.

#define ARIZONA_GP5_FALL_EINT1_WIDTH   1 /* GP5_FALL_EINT1 */

Definition at line 5256 of file registers.h.

#define ARIZONA_GP5_FALL_EINT2   0x0020 /* GP5_FALL_EINT2 */

Definition at line 5281 of file registers.h.

#define ARIZONA_GP5_FALL_EINT2_MASK   0x0020 /* GP5_FALL_EINT2 */

Definition at line 5282 of file registers.h.

#define ARIZONA_GP5_FALL_EINT2_SHIFT   5 /* GP5_FALL_EINT2 */

Definition at line 5283 of file registers.h.

#define ARIZONA_GP5_FALL_EINT2_WIDTH   1 /* GP5_FALL_EINT2 */

Definition at line 5284 of file registers.h.

#define ARIZONA_GP5_FALL_TRIG_STS   0x0020 /* GP5_FALL_TRIG_STS */

Definition at line 5225 of file registers.h.

#define ARIZONA_GP5_FALL_TRIG_STS_MASK   0x0020 /* GP5_FALL_TRIG_STS */

Definition at line 5226 of file registers.h.

#define ARIZONA_GP5_FALL_TRIG_STS_SHIFT   5 /* GP5_FALL_TRIG_STS */

Definition at line 5227 of file registers.h.

#define ARIZONA_GP5_FALL_TRIG_STS_WIDTH   1 /* GP5_FALL_TRIG_STS */

Definition at line 5228 of file registers.h.

#define ARIZONA_GP5_RISE_EINT1   0x0010 /* GP5_RISE_EINT1 */

Definition at line 5257 of file registers.h.

#define ARIZONA_GP5_RISE_EINT1_MASK   0x0010 /* GP5_RISE_EINT1 */

Definition at line 5258 of file registers.h.

#define ARIZONA_GP5_RISE_EINT1_SHIFT   4 /* GP5_RISE_EINT1 */

Definition at line 5259 of file registers.h.

#define ARIZONA_GP5_RISE_EINT1_WIDTH   1 /* GP5_RISE_EINT1 */

Definition at line 5260 of file registers.h.

#define ARIZONA_GP5_RISE_EINT2   0x0010 /* GP5_RISE_EINT2 */

Definition at line 5285 of file registers.h.

#define ARIZONA_GP5_RISE_EINT2_MASK   0x0010 /* GP5_RISE_EINT2 */

Definition at line 5286 of file registers.h.

#define ARIZONA_GP5_RISE_EINT2_SHIFT   4 /* GP5_RISE_EINT2 */

Definition at line 5287 of file registers.h.

#define ARIZONA_GP5_RISE_EINT2_WIDTH   1 /* GP5_RISE_EINT2 */

Definition at line 5288 of file registers.h.

#define ARIZONA_GP5_RISE_TRIG_STS   0x0010 /* GP5_RISE_TRIG_STS */

Definition at line 5229 of file registers.h.

#define ARIZONA_GP5_RISE_TRIG_STS_MASK   0x0010 /* GP5_RISE_TRIG_STS */

Definition at line 5230 of file registers.h.

#define ARIZONA_GP5_RISE_TRIG_STS_SHIFT   4 /* GP5_RISE_TRIG_STS */

Definition at line 5231 of file registers.h.

#define ARIZONA_GP5_RISE_TRIG_STS_WIDTH   1 /* GP5_RISE_TRIG_STS */

Definition at line 5232 of file registers.h.

#define ARIZONA_GP5_STS   0x0004 /* GP5_STS */

Definition at line 5365 of file registers.h.

#define ARIZONA_GP5_STS_MASK   0x0004 /* GP5_STS */

Definition at line 5366 of file registers.h.

#define ARIZONA_GP5_STS_SHIFT   2 /* GP5_STS */

Definition at line 5367 of file registers.h.

#define ARIZONA_GP5_STS_WIDTH   1 /* GP5_STS */

Definition at line 5368 of file registers.h.

#define ARIZONA_GP_DBTIME_MASK   0xF000 /* GP_DBTIME - [15:12] */

Definition at line 4041 of file registers.h.

#define ARIZONA_GP_DBTIME_SHIFT   12 /* GP_DBTIME - [15:12] */

Definition at line 4042 of file registers.h.

#define ARIZONA_GP_DBTIME_WIDTH   4 /* GP_DBTIME - [15:12] */

Definition at line 4043 of file registers.h.

#define ARIZONA_GPIO1_CTRL   0xC00

Definition at line 795 of file registers.h.

#define ARIZONA_GPIO2_CTRL   0xC01

Definition at line 796 of file registers.h.

#define ARIZONA_GPIO3_CTRL   0xC02

Definition at line 797 of file registers.h.

#define ARIZONA_GPIO4_CTRL   0xC03

Definition at line 798 of file registers.h.

#define ARIZONA_GPIO5_CTRL   0xC04

Definition at line 799 of file registers.h.

#define ARIZONA_GPIO_DEBOUNCE_CONFIG   0xC10

Definition at line 801 of file registers.h.

#define ARIZONA_HAP_ACT   0x0002 /* HAP_ACT */

Definition at line 1344 of file registers.h.

#define ARIZONA_HAP_ACT_MASK   0x0002 /* HAP_ACT */

Definition at line 1345 of file registers.h.

#define ARIZONA_HAP_ACT_SHIFT   1 /* HAP_ACT */

Definition at line 1346 of file registers.h.

#define ARIZONA_HAP_ACT_WIDTH   1 /* HAP_ACT */

Definition at line 1347 of file registers.h.

#define ARIZONA_HAP_CTRL_MASK   0x000C /* HAP_CTRL - [3:2] */

Definition at line 1341 of file registers.h.

#define ARIZONA_HAP_CTRL_SHIFT   2 /* HAP_CTRL - [3:2] */

Definition at line 1342 of file registers.h.

#define ARIZONA_HAP_CTRL_WIDTH   2 /* HAP_CTRL - [3:2] */

Definition at line 1343 of file registers.h.

#define ARIZONA_HAP_RATE_MASK   0x7800 /* HAP_RATE - [14:11] */

Definition at line 1334 of file registers.h.

#define ARIZONA_HAP_RATE_SHIFT   11 /* HAP_RATE - [14:11] */

Definition at line 1335 of file registers.h.

#define ARIZONA_HAP_RATE_WIDTH   4 /* HAP_RATE - [14:11] */

Definition at line 1336 of file registers.h.

#define ARIZONA_HAPTICS_CONTROL_1   0x90

Definition at line 52 of file registers.h.

#define ARIZONA_HAPTICS_CONTROL_2   0x91

Definition at line 53 of file registers.h.

#define ARIZONA_HAPTICS_PHASE_1_DURATION   0x93

Definition at line 55 of file registers.h.

#define ARIZONA_HAPTICS_PHASE_1_INTENSITY   0x92

Definition at line 54 of file registers.h.

#define ARIZONA_HAPTICS_PHASE_2_DURATION   0x95

Definition at line 57 of file registers.h.

#define ARIZONA_HAPTICS_PHASE_2_INTENSITY   0x94

Definition at line 56 of file registers.h.

#define ARIZONA_HAPTICS_PHASE_3_DURATION   0x97

Definition at line 59 of file registers.h.

#define ARIZONA_HAPTICS_PHASE_3_INTENSITY   0x96

Definition at line 58 of file registers.h.

#define ARIZONA_HAPTICS_STATUS   0x98

Definition at line 60 of file registers.h.

#define ARIZONA_HEADPHONE_DETECT_1   0x29B

Definition at line 118 of file registers.h.

#define ARIZONA_HEADPHONE_DETECT_2   0x29C

Definition at line 119 of file registers.h.

#define ARIZONA_HP_CLK_DIV_MASK   0x0018 /* HP_CLK_DIV - [4:3] */

Definition at line 2028 of file registers.h.

#define ARIZONA_HP_CLK_DIV_SHIFT   3 /* HP_CLK_DIV - [4:3] */

Definition at line 2029 of file registers.h.

#define ARIZONA_HP_CLK_DIV_WIDTH   2 /* HP_CLK_DIV - [4:3] */

Definition at line 2030 of file registers.h.

#define ARIZONA_HP_DONE   0x0080 /* HP_DONE */

Definition at line 2047 of file registers.h.

#define ARIZONA_HP_DONE_MASK   0x0080 /* HP_DONE */

Definition at line 2048 of file registers.h.

#define ARIZONA_HP_DONE_SHIFT   7 /* HP_DONE */

Definition at line 2049 of file registers.h.

#define ARIZONA_HP_DONE_WIDTH   1 /* HP_DONE */

Definition at line 2050 of file registers.h.

#define ARIZONA_HP_HOLDTIME_MASK   0x00E0 /* HP_HOLDTIME - [7:5] */

Definition at line 2025 of file registers.h.

#define ARIZONA_HP_HOLDTIME_SHIFT   5 /* HP_HOLDTIME - [7:5] */

Definition at line 2026 of file registers.h.

#define ARIZONA_HP_HOLDTIME_WIDTH   3 /* HP_HOLDTIME - [7:5] */

Definition at line 2027 of file registers.h.

#define ARIZONA_HP_IDAC_STEER   0x0004 /* HP_IDAC_STEER */

Definition at line 2031 of file registers.h.

#define ARIZONA_HP_IDAC_STEER_MASK   0x0004 /* HP_IDAC_STEER */

Definition at line 2032 of file registers.h.

#define ARIZONA_HP_IDAC_STEER_SHIFT   2 /* HP_IDAC_STEER */

Definition at line 2033 of file registers.h.

#define ARIZONA_HP_IDAC_STEER_WIDTH   1 /* HP_IDAC_STEER */

Definition at line 2034 of file registers.h.

#define ARIZONA_HP_LVL_MASK   0x007F /* HP_LVL - [6:0] */

Definition at line 2051 of file registers.h.

#define ARIZONA_HP_LVL_SHIFT   0 /* HP_LVL - [6:0] */

Definition at line 2052 of file registers.h.

#define ARIZONA_HP_LVL_WIDTH   7 /* HP_LVL - [6:0] */

Definition at line 2053 of file registers.h.

#define ARIZONA_HP_POLL   0x0001 /* HP_POLL */

Definition at line 2039 of file registers.h.

#define ARIZONA_HP_POLL_MASK   0x0001 /* HP_POLL */

Definition at line 2040 of file registers.h.

#define ARIZONA_HP_POLL_SHIFT   0 /* HP_POLL */

Definition at line 2041 of file registers.h.

#define ARIZONA_HP_POLL_WIDTH   1 /* HP_POLL */

Definition at line 2042 of file registers.h.

#define ARIZONA_HP_RATE   0x0002 /* HP_RATE */

Definition at line 2035 of file registers.h.

#define ARIZONA_HP_RATE_MASK   0x0002 /* HP_RATE */

Definition at line 2036 of file registers.h.

#define ARIZONA_HP_RATE_SHIFT   1 /* HP_RATE */

Definition at line 2037 of file registers.h.

#define ARIZONA_HP_RATE_WIDTH   1 /* HP_RATE */

Definition at line 2038 of file registers.h.

#define ARIZONA_HP_STEP_SIZE   0x0100 /* HP_STEP_SIZE */

Definition at line 2021 of file registers.h.

#define ARIZONA_HP_STEP_SIZE_MASK   0x0100 /* HP_STEP_SIZE */

Definition at line 2022 of file registers.h.

#define ARIZONA_HP_STEP_SIZE_SHIFT   8 /* HP_STEP_SIZE */

Definition at line 2023 of file registers.h.

#define ARIZONA_HP_STEP_SIZE_WIDTH   1 /* HP_STEP_SIZE */

Definition at line 2024 of file registers.h.

#define ARIZONA_HPDET_EINT1   0x2000 /* HPDET_EINT1 */

Definition at line 4264 of file registers.h.

#define ARIZONA_HPDET_EINT1_MASK   0x2000 /* HPDET_EINT1 */

Definition at line 4265 of file registers.h.

#define ARIZONA_HPDET_EINT1_SHIFT   13 /* HPDET_EINT1 */

Definition at line 4266 of file registers.h.

#define ARIZONA_HPDET_EINT1_WIDTH   1 /* HPDET_EINT1 */

Definition at line 4267 of file registers.h.

#define ARIZONA_HPDET_EINT2   0x2000 /* HPDET_EINT2 */

Definition at line 4608 of file registers.h.

#define ARIZONA_HPDET_EINT2_MASK   0x2000 /* HPDET_EINT2 */

Definition at line 4609 of file registers.h.

#define ARIZONA_HPDET_EINT2_SHIFT   13 /* HPDET_EINT2 */

Definition at line 4610 of file registers.h.

#define ARIZONA_HPDET_EINT2_WIDTH   1 /* HPDET_EINT2 */

Definition at line 4611 of file registers.h.

#define ARIZONA_HPDET_STS   0x2000 /* HPDET_STS */

Definition at line 4933 of file registers.h.

#define ARIZONA_HPDET_STS_MASK   0x2000 /* HPDET_STS */

Definition at line 4934 of file registers.h.

#define ARIZONA_HPDET_STS_SHIFT   13 /* HPDET_STS */

Definition at line 4935 of file registers.h.

#define ARIZONA_HPDET_STS_WIDTH   1 /* HPDET_STS */

Definition at line 4936 of file registers.h.

#define ARIZONA_HPLP1MIX_INPUT_1_SOURCE   0x900

Definition at line 641 of file registers.h.

#define ARIZONA_HPLP1MIX_INPUT_1_VOLUME   0x901

Definition at line 642 of file registers.h.

#define ARIZONA_HPLP1MIX_INPUT_2_SOURCE   0x902

Definition at line 643 of file registers.h.

#define ARIZONA_HPLP1MIX_INPUT_2_VOLUME   0x903

Definition at line 644 of file registers.h.

#define ARIZONA_HPLP1MIX_INPUT_3_SOURCE   0x904

Definition at line 645 of file registers.h.

#define ARIZONA_HPLP1MIX_INPUT_3_VOLUME   0x905

Definition at line 646 of file registers.h.

#define ARIZONA_HPLP1MIX_INPUT_4_SOURCE   0x906

Definition at line 647 of file registers.h.

#define ARIZONA_HPLP1MIX_INPUT_4_VOLUME   0x907

Definition at line 648 of file registers.h.

#define ARIZONA_HPLP2MIX_INPUT_1_SOURCE   0x908

Definition at line 649 of file registers.h.

#define ARIZONA_HPLP2MIX_INPUT_1_VOLUME   0x909

Definition at line 650 of file registers.h.

#define ARIZONA_HPLP2MIX_INPUT_2_SOURCE   0x90A

Definition at line 651 of file registers.h.

#define ARIZONA_HPLP2MIX_INPUT_2_VOLUME   0x90B

Definition at line 652 of file registers.h.

#define ARIZONA_HPLP2MIX_INPUT_3_SOURCE   0x90C

Definition at line 653 of file registers.h.

#define ARIZONA_HPLP2MIX_INPUT_3_VOLUME   0x90D

Definition at line 654 of file registers.h.

#define ARIZONA_HPLP2MIX_INPUT_4_SOURCE   0x90E

Definition at line 655 of file registers.h.

#define ARIZONA_HPLP2MIX_INPUT_4_VOLUME   0x90F

Definition at line 656 of file registers.h.

#define ARIZONA_HPLP3MIX_INPUT_1_SOURCE   0x910

Definition at line 657 of file registers.h.

#define ARIZONA_HPLP3MIX_INPUT_1_VOLUME   0x911

Definition at line 658 of file registers.h.

#define ARIZONA_HPLP3MIX_INPUT_2_SOURCE   0x912

Definition at line 659 of file registers.h.

#define ARIZONA_HPLP3MIX_INPUT_2_VOLUME   0x913

Definition at line 660 of file registers.h.

#define ARIZONA_HPLP3MIX_INPUT_3_SOURCE   0x914

Definition at line 661 of file registers.h.

#define ARIZONA_HPLP3MIX_INPUT_3_VOLUME   0x915

Definition at line 662 of file registers.h.

#define ARIZONA_HPLP3MIX_INPUT_4_SOURCE   0x916

Definition at line 663 of file registers.h.

#define ARIZONA_HPLP3MIX_INPUT_4_VOLUME   0x917

Definition at line 664 of file registers.h.

#define ARIZONA_HPLP4MIX_INPUT_1_SOURCE   0x918

Definition at line 665 of file registers.h.

#define ARIZONA_HPLP4MIX_INPUT_1_VOLUME   0x919

Definition at line 666 of file registers.h.

#define ARIZONA_HPLP4MIX_INPUT_2_SOURCE   0x91A

Definition at line 667 of file registers.h.

#define ARIZONA_HPLP4MIX_INPUT_2_VOLUME   0x91B

Definition at line 668 of file registers.h.

#define ARIZONA_HPLP4MIX_INPUT_3_SOURCE   0x91C

Definition at line 669 of file registers.h.

#define ARIZONA_HPLP4MIX_INPUT_3_VOLUME   0x91D

Definition at line 670 of file registers.h.

#define ARIZONA_HPLP4MIX_INPUT_4_SOURCE   0x91E

Definition at line 671 of file registers.h.

#define ARIZONA_HPLP4MIX_INPUT_4_VOLUME   0x91F

Definition at line 672 of file registers.h.

#define ARIZONA_HPLPF1_1   0xEC0

Definition at line 954 of file registers.h.

#define ARIZONA_HPLPF1_2   0xEC1

Definition at line 955 of file registers.h.

#define ARIZONA_HPLPF2_1   0xEC4

Definition at line 956 of file registers.h.

#define ARIZONA_HPLPF2_2   0xEC5

Definition at line 957 of file registers.h.

#define ARIZONA_HPLPF3_1   0xEC8

Definition at line 958 of file registers.h.

#define ARIZONA_HPLPF3_2   0xEC9

Definition at line 959 of file registers.h.

#define ARIZONA_HPLPF4_1   0xECC

Definition at line 960 of file registers.h.

#define ARIZONA_HPLPF4_2   0xECD

Definition at line 961 of file registers.h.

#define ARIZONA_I2C1_AUTO_INC_MASK   0x0003 /* I2C1_AUTO_INC - [1:0] */

Definition at line 1031 of file registers.h.

#define ARIZONA_I2C1_AUTO_INC_SHIFT   0 /* I2C1_AUTO_INC - [1:0] */

Definition at line 1032 of file registers.h.

#define ARIZONA_I2C1_AUTO_INC_WIDTH   2 /* I2C1_AUTO_INC - [1:0] */

Definition at line 1033 of file registers.h.

#define ARIZONA_I2C1_BUSY   0x0020 /* I2C1_BUSY */

Definition at line 1038 of file registers.h.

#define ARIZONA_I2C1_BUSY_MASK   0x0020 /* I2C1_BUSY */

Definition at line 1039 of file registers.h.

#define ARIZONA_I2C1_BUSY_SHIFT   5 /* I2C1_BUSY */

Definition at line 1040 of file registers.h.

#define ARIZONA_I2C1_BUSY_WIDTH   1 /* I2C1_BUSY */

Definition at line 1041 of file registers.h.

#define ARIZONA_IM_AIF1_ERR_EINT1   0x1000 /* IM_AIF1_ERR_EINT1 */

Definition at line 4500 of file registers.h.

#define ARIZONA_IM_AIF1_ERR_EINT1_MASK   0x1000 /* IM_AIF1_ERR_EINT1 */

Definition at line 4501 of file registers.h.

#define ARIZONA_IM_AIF1_ERR_EINT1_SHIFT   12 /* IM_AIF1_ERR_EINT1 */

Definition at line 4502 of file registers.h.

#define ARIZONA_IM_AIF1_ERR_EINT1_WIDTH   1 /* IM_AIF1_ERR_EINT1 */

Definition at line 4503 of file registers.h.

#define ARIZONA_IM_AIF1_ERR_EINT2   0x1000 /* IM_AIF1_ERR_EINT2 */

Definition at line 4844 of file registers.h.

#define ARIZONA_IM_AIF1_ERR_EINT2_MASK   0x1000 /* IM_AIF1_ERR_EINT2 */

Definition at line 4845 of file registers.h.

#define ARIZONA_IM_AIF1_ERR_EINT2_SHIFT   12 /* IM_AIF1_ERR_EINT2 */

Definition at line 4846 of file registers.h.

#define ARIZONA_IM_AIF1_ERR_EINT2_WIDTH   1 /* IM_AIF1_ERR_EINT2 */

Definition at line 4847 of file registers.h.

#define ARIZONA_IM_AIF2_ERR_EINT1   0x2000 /* IM_AIF2_ERR_EINT1 */

Definition at line 4496 of file registers.h.

#define ARIZONA_IM_AIF2_ERR_EINT1_MASK   0x2000 /* IM_AIF2_ERR_EINT1 */

Definition at line 4497 of file registers.h.

#define ARIZONA_IM_AIF2_ERR_EINT1_SHIFT   13 /* IM_AIF2_ERR_EINT1 */

Definition at line 4498 of file registers.h.

#define ARIZONA_IM_AIF2_ERR_EINT1_WIDTH   1 /* IM_AIF2_ERR_EINT1 */

Definition at line 4499 of file registers.h.

#define ARIZONA_IM_AIF2_ERR_EINT2   0x2000 /* IM_AIF2_ERR_EINT2 */

Definition at line 4840 of file registers.h.

#define ARIZONA_IM_AIF2_ERR_EINT2_MASK   0x2000 /* IM_AIF2_ERR_EINT2 */

Definition at line 4841 of file registers.h.

#define ARIZONA_IM_AIF2_ERR_EINT2_SHIFT   13 /* IM_AIF2_ERR_EINT2 */

Definition at line 4842 of file registers.h.

#define ARIZONA_IM_AIF2_ERR_EINT2_WIDTH   1 /* IM_AIF2_ERR_EINT2 */

Definition at line 4843 of file registers.h.

#define ARIZONA_IM_AIF3_ERR_EINT1   0x4000 /* IM_AIF3_ERR_EINT1 */

Definition at line 4492 of file registers.h.

#define ARIZONA_IM_AIF3_ERR_EINT1_MASK   0x4000 /* IM_AIF3_ERR_EINT1 */

Definition at line 4493 of file registers.h.

#define ARIZONA_IM_AIF3_ERR_EINT1_SHIFT   14 /* IM_AIF3_ERR_EINT1 */

Definition at line 4494 of file registers.h.

#define ARIZONA_IM_AIF3_ERR_EINT1_WIDTH   1 /* IM_AIF3_ERR_EINT1 */

Definition at line 4495 of file registers.h.

#define ARIZONA_IM_AIF3_ERR_EINT2   0x4000 /* IM_AIF3_ERR_EINT2 */

Definition at line 4836 of file registers.h.

#define ARIZONA_IM_AIF3_ERR_EINT2_MASK   0x4000 /* IM_AIF3_ERR_EINT2 */

Definition at line 4837 of file registers.h.

#define ARIZONA_IM_AIF3_ERR_EINT2_SHIFT   14 /* IM_AIF3_ERR_EINT2 */

Definition at line 4838 of file registers.h.

#define ARIZONA_IM_AIF3_ERR_EINT2_WIDTH   1 /* IM_AIF3_ERR_EINT2 */

Definition at line 4839 of file registers.h.

#define ARIZONA_IM_ASRC1_LOCK_EINT1   0x0080 /* IM_ASRC1_LOCK_EINT1 */

Definition at line 4456 of file registers.h.

#define ARIZONA_IM_ASRC1_LOCK_EINT1_MASK   0x0080 /* IM_ASRC1_LOCK_EINT1 */

Definition at line 4457 of file registers.h.

#define ARIZONA_IM_ASRC1_LOCK_EINT1_SHIFT   7 /* IM_ASRC1_LOCK_EINT1 */

Definition at line 4458 of file registers.h.

#define ARIZONA_IM_ASRC1_LOCK_EINT1_WIDTH   1 /* IM_ASRC1_LOCK_EINT1 */

Definition at line 4459 of file registers.h.

#define ARIZONA_IM_ASRC1_LOCK_EINT2   0x0080 /* IM_ASRC1_LOCK_EINT2 */

Definition at line 4800 of file registers.h.

#define ARIZONA_IM_ASRC1_LOCK_EINT2_MASK   0x0080 /* IM_ASRC1_LOCK_EINT2 */

Definition at line 4801 of file registers.h.

#define ARIZONA_IM_ASRC1_LOCK_EINT2_SHIFT   7 /* IM_ASRC1_LOCK_EINT2 */

Definition at line 4802 of file registers.h.

#define ARIZONA_IM_ASRC1_LOCK_EINT2_WIDTH   1 /* IM_ASRC1_LOCK_EINT2 */

Definition at line 4803 of file registers.h.

#define ARIZONA_IM_ASRC2_LOCK_EINT1   0x0100 /* IM_ASRC2_LOCK_EINT1 */

Definition at line 4452 of file registers.h.

#define ARIZONA_IM_ASRC2_LOCK_EINT1_MASK   0x0100 /* IM_ASRC2_LOCK_EINT1 */

Definition at line 4453 of file registers.h.

#define ARIZONA_IM_ASRC2_LOCK_EINT1_SHIFT   8 /* IM_ASRC2_LOCK_EINT1 */

Definition at line 4454 of file registers.h.

#define ARIZONA_IM_ASRC2_LOCK_EINT1_WIDTH   1 /* IM_ASRC2_LOCK_EINT1 */

Definition at line 4455 of file registers.h.

#define ARIZONA_IM_ASRC2_LOCK_EINT2   0x0100 /* IM_ASRC2_LOCK_EINT2 */

Definition at line 4796 of file registers.h.

#define ARIZONA_IM_ASRC2_LOCK_EINT2_MASK   0x0100 /* IM_ASRC2_LOCK_EINT2 */

Definition at line 4797 of file registers.h.

#define ARIZONA_IM_ASRC2_LOCK_EINT2_SHIFT   8 /* IM_ASRC2_LOCK_EINT2 */

Definition at line 4798 of file registers.h.

#define ARIZONA_IM_ASRC2_LOCK_EINT2_WIDTH   1 /* IM_ASRC2_LOCK_EINT2 */

Definition at line 4799 of file registers.h.

#define ARIZONA_IM_ASRC_CFG_ERR_EINT1   0x8000 /* IM_ASRC_CFG_ERR_EINT1 */

Definition at line 4488 of file registers.h.

#define ARIZONA_IM_ASRC_CFG_ERR_EINT1_MASK   0x8000 /* IM_ASRC_CFG_ERR_EINT1 */

Definition at line 4489 of file registers.h.

#define ARIZONA_IM_ASRC_CFG_ERR_EINT1_SHIFT   15 /* IM_ASRC_CFG_ERR_EINT1 */

Definition at line 4490 of file registers.h.

#define ARIZONA_IM_ASRC_CFG_ERR_EINT1_WIDTH   1 /* IM_ASRC_CFG_ERR_EINT1 */

Definition at line 4491 of file registers.h.

#define ARIZONA_IM_ASRC_CFG_ERR_EINT2   0x8000 /* IM_ASRC_CFG_ERR_EINT2 */

Definition at line 4832 of file registers.h.

#define ARIZONA_IM_ASRC_CFG_ERR_EINT2_MASK   0x8000 /* IM_ASRC_CFG_ERR_EINT2 */

Definition at line 4833 of file registers.h.

#define ARIZONA_IM_ASRC_CFG_ERR_EINT2_SHIFT   15 /* IM_ASRC_CFG_ERR_EINT2 */

Definition at line 4834 of file registers.h.

#define ARIZONA_IM_ASRC_CFG_ERR_EINT2_WIDTH   1 /* IM_ASRC_CFG_ERR_EINT2 */

Definition at line 4835 of file registers.h.

#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1   0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */

Definition at line 4512 of file registers.h.

#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_MASK   0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */

Definition at line 4513 of file registers.h.

#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_SHIFT   9 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */

Definition at line 4514 of file registers.h.

#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_WIDTH   1 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */

Definition at line 4515 of file registers.h.

#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2   0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */

Definition at line 4856 of file registers.h.

#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_MASK   0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */

Definition at line 4857 of file registers.h.

#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_SHIFT   9 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */

Definition at line 4858 of file registers.h.

#define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_WIDTH   1 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */

Definition at line 4859 of file registers.h.

#define ARIZONA_IM_BOOT_DONE_EINT1   0x0100 /* IM_BOOT_DONE_EINT1 */

Definition at line 4532 of file registers.h.

#define ARIZONA_IM_BOOT_DONE_EINT1_MASK   0x0100 /* IM_BOOT_DONE_EINT1 */

Definition at line 4533 of file registers.h.

#define ARIZONA_IM_BOOT_DONE_EINT1_SHIFT   8 /* IM_BOOT_DONE_EINT1 */

Definition at line 4534 of file registers.h.

#define ARIZONA_IM_BOOT_DONE_EINT1_WIDTH   1 /* IM_BOOT_DONE_EINT1 */

Definition at line 4535 of file registers.h.

#define ARIZONA_IM_BOOT_DONE_EINT2   0x0100 /* IM_BOOT_DONE_EINT2 */

Definition at line 4877 of file registers.h.

#define ARIZONA_IM_BOOT_DONE_EINT2_MASK   0x0100 /* IM_BOOT_DONE_EINT2 */

Definition at line 4878 of file registers.h.

#define ARIZONA_IM_BOOT_DONE_EINT2_SHIFT   8 /* IM_BOOT_DONE_EINT2 */

Definition at line 4879 of file registers.h.

#define ARIZONA_IM_BOOT_DONE_EINT2_WIDTH   1 /* IM_BOOT_DONE_EINT2 */

Definition at line 4880 of file registers.h.

#define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1   0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT1 */

Definition at line 4480 of file registers.h.

#define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1_MASK   0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT1 */

Definition at line 4481 of file registers.h.

#define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1_SHIFT   0 /* IM_CLKGEN_ERR_ASYNC_EINT1 */

Definition at line 4482 of file registers.h.

#define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1_WIDTH   1 /* IM_CLKGEN_ERR_ASYNC_EINT1 */

Definition at line 4483 of file registers.h.

#define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2   0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT2 */

Definition at line 4824 of file registers.h.

#define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2_MASK   0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT2 */

Definition at line 4825 of file registers.h.

#define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2_SHIFT   0 /* IM_CLKGEN_ERR_ASYNC_EINT2 */

Definition at line 4826 of file registers.h.

#define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2_WIDTH   1 /* IM_CLKGEN_ERR_ASYNC_EINT2 */

Definition at line 4827 of file registers.h.

#define ARIZONA_IM_CLKGEN_ERR_EINT1   0x0002 /* IM_CLKGEN_ERR_EINT1 */

Definition at line 4476 of file registers.h.

#define ARIZONA_IM_CLKGEN_ERR_EINT1_MASK   0x0002 /* IM_CLKGEN_ERR_EINT1 */

Definition at line 4477 of file registers.h.

#define ARIZONA_IM_CLKGEN_ERR_EINT1_SHIFT   1 /* IM_CLKGEN_ERR_EINT1 */

Definition at line 4478 of file registers.h.

#define ARIZONA_IM_CLKGEN_ERR_EINT1_WIDTH   1 /* IM_CLKGEN_ERR_EINT1 */

Definition at line 4479 of file registers.h.

#define ARIZONA_IM_CLKGEN_ERR_EINT2   0x0002 /* IM_CLKGEN_ERR_EINT2 */

Definition at line 4820 of file registers.h.

#define ARIZONA_IM_CLKGEN_ERR_EINT2_MASK   0x0002 /* IM_CLKGEN_ERR_EINT2 */

Definition at line 4821 of file registers.h.

#define ARIZONA_IM_CLKGEN_ERR_EINT2_SHIFT   1 /* IM_CLKGEN_ERR_EINT2 */

Definition at line 4822 of file registers.h.

#define ARIZONA_IM_CLKGEN_ERR_EINT2_WIDTH   1 /* IM_CLKGEN_ERR_EINT2 */

Definition at line 4823 of file registers.h.

#define ARIZONA_IM_CTRLIF_ERR_EINT1   0x0800 /* IM_CTRLIF_ERR_EINT1 */

Definition at line 4504 of file registers.h.

#define ARIZONA_IM_CTRLIF_ERR_EINT1_MASK   0x0800 /* IM_CTRLIF_ERR_EINT1 */

Definition at line 4505 of file registers.h.

#define ARIZONA_IM_CTRLIF_ERR_EINT1_SHIFT   11 /* IM_CTRLIF_ERR_EINT1 */

Definition at line 4506 of file registers.h.

#define ARIZONA_IM_CTRLIF_ERR_EINT1_WIDTH   1 /* IM_CTRLIF_ERR_EINT1 */

Definition at line 4507 of file registers.h.

#define ARIZONA_IM_CTRLIF_ERR_EINT2   0x0800 /* IM_CTRLIF_ERR_EINT2 */

Definition at line 4848 of file registers.h.

#define ARIZONA_IM_CTRLIF_ERR_EINT2_MASK   0x0800 /* IM_CTRLIF_ERR_EINT2 */

Definition at line 4849 of file registers.h.

#define ARIZONA_IM_CTRLIF_ERR_EINT2_SHIFT   11 /* IM_CTRLIF_ERR_EINT2 */

Definition at line 4850 of file registers.h.

#define ARIZONA_IM_CTRLIF_ERR_EINT2_WIDTH   1 /* IM_CTRLIF_ERR_EINT2 */

Definition at line 4851 of file registers.h.

#define ARIZONA_IM_DCS_DAC_DONE_EINT1   0x0080 /* IM_DCS_DAC_DONE_EINT1 */

Definition at line 4536 of file registers.h.

#define ARIZONA_IM_DCS_DAC_DONE_EINT1_MASK   0x0080 /* IM_DCS_DAC_DONE_EINT1 */

Definition at line 4537 of file registers.h.

#define ARIZONA_IM_DCS_DAC_DONE_EINT1_SHIFT   7 /* IM_DCS_DAC_DONE_EINT1 */

Definition at line 4538 of file registers.h.

#define ARIZONA_IM_DCS_DAC_DONE_EINT1_WIDTH   1 /* IM_DCS_DAC_DONE_EINT1 */

Definition at line 4539 of file registers.h.

#define ARIZONA_IM_DCS_DAC_DONE_EINT2   0x0080 /* IM_DCS_DAC_DONE_EINT2 */

Definition at line 4881 of file registers.h.

#define ARIZONA_IM_DCS_DAC_DONE_EINT2_MASK   0x0080 /* IM_DCS_DAC_DONE_EINT2 */

Definition at line 4882 of file registers.h.

#define ARIZONA_IM_DCS_DAC_DONE_EINT2_SHIFT   7 /* IM_DCS_DAC_DONE_EINT2 */

Definition at line 4883 of file registers.h.

#define ARIZONA_IM_DCS_DAC_DONE_EINT2_WIDTH   1 /* IM_DCS_DAC_DONE_EINT2 */

Definition at line 4884 of file registers.h.

#define ARIZONA_IM_DCS_HP_DONE_EINT1   0x0040 /* IM_DCS_HP_DONE_EINT1 */

Definition at line 4540 of file registers.h.

#define ARIZONA_IM_DCS_HP_DONE_EINT1_MASK   0x0040 /* IM_DCS_HP_DONE_EINT1 */

Definition at line 4541 of file registers.h.

#define ARIZONA_IM_DCS_HP_DONE_EINT1_SHIFT   6 /* IM_DCS_HP_DONE_EINT1 */

Definition at line 4542 of file registers.h.

#define ARIZONA_IM_DCS_HP_DONE_EINT1_WIDTH   1 /* IM_DCS_HP_DONE_EINT1 */

Definition at line 4543 of file registers.h.

#define ARIZONA_IM_DCS_HP_DONE_EINT2   0x0040 /* IM_DCS_HP_DONE_EINT2 */

Definition at line 4885 of file registers.h.

#define ARIZONA_IM_DCS_HP_DONE_EINT2_MASK   0x0040 /* IM_DCS_HP_DONE_EINT2 */

Definition at line 4886 of file registers.h.

#define ARIZONA_IM_DCS_HP_DONE_EINT2_SHIFT   6 /* IM_DCS_HP_DONE_EINT2 */

Definition at line 4887 of file registers.h.

#define ARIZONA_IM_DCS_HP_DONE_EINT2_WIDTH   1 /* IM_DCS_HP_DONE_EINT2 */

Definition at line 4888 of file registers.h.

#define ARIZONA_IM_DRC1_SIG_DET_EINT1   0x0200 /* IM_DRC1_SIG_DET_EINT1 */

Definition at line 4448 of file registers.h.

#define ARIZONA_IM_DRC1_SIG_DET_EINT1_MASK   0x0200 /* IM_DRC1_SIG_DET_EINT1 */

Definition at line 4449 of file registers.h.

#define ARIZONA_IM_DRC1_SIG_DET_EINT1_SHIFT   9 /* IM_DRC1_SIG_DET_EINT1 */

Definition at line 4450 of file registers.h.

#define ARIZONA_IM_DRC1_SIG_DET_EINT1_WIDTH   1 /* IM_DRC1_SIG_DET_EINT1 */

Definition at line 4451 of file registers.h.

#define ARIZONA_IM_DRC1_SIG_DET_EINT2   0x0200 /* IM_DRC1_SIG_DET_EINT2 */

Definition at line 4792 of file registers.h.

#define ARIZONA_IM_DRC1_SIG_DET_EINT2_MASK   0x0200 /* IM_DRC1_SIG_DET_EINT2 */

Definition at line 4793 of file registers.h.

#define ARIZONA_IM_DRC1_SIG_DET_EINT2_SHIFT   9 /* IM_DRC1_SIG_DET_EINT2 */

Definition at line 4794 of file registers.h.

#define ARIZONA_IM_DRC1_SIG_DET_EINT2_WIDTH   1 /* IM_DRC1_SIG_DET_EINT2 */

Definition at line 4795 of file registers.h.

#define ARIZONA_IM_DRC2_SIG_DET_EINT1   0x0400 /* IM_DRC2_SIG_DET_EINT1 */

Definition at line 4444 of file registers.h.

#define ARIZONA_IM_DRC2_SIG_DET_EINT1_MASK   0x0400 /* IM_DRC2_SIG_DET_EINT1 */

Definition at line 4445 of file registers.h.

#define ARIZONA_IM_DRC2_SIG_DET_EINT1_SHIFT   10 /* IM_DRC2_SIG_DET_EINT1 */

Definition at line 4446 of file registers.h.

#define ARIZONA_IM_DRC2_SIG_DET_EINT1_WIDTH   1 /* IM_DRC2_SIG_DET_EINT1 */

Definition at line 4447 of file registers.h.

#define ARIZONA_IM_DRC2_SIG_DET_EINT2   0x0400 /* IM_DRC2_SIG_DET_EINT2 */

Definition at line 4788 of file registers.h.

#define ARIZONA_IM_DRC2_SIG_DET_EINT2_MASK   0x0400 /* IM_DRC2_SIG_DET_EINT2 */

Definition at line 4789 of file registers.h.

#define ARIZONA_IM_DRC2_SIG_DET_EINT2_SHIFT   10 /* IM_DRC2_SIG_DET_EINT2 */

Definition at line 4790 of file registers.h.

#define ARIZONA_IM_DRC2_SIG_DET_EINT2_WIDTH   1 /* IM_DRC2_SIG_DET_EINT2 */

Definition at line 4791 of file registers.h.

#define ARIZONA_IM_DSP1_RAM_RDY_EINT1   0x0100 /* IM_DSP1_RAM_RDY_EINT1 */

Definition at line 4408 of file registers.h.

#define ARIZONA_IM_DSP1_RAM_RDY_EINT1_MASK   0x0100 /* IM_DSP1_RAM_RDY_EINT1 */

Definition at line 4409 of file registers.h.

#define ARIZONA_IM_DSP1_RAM_RDY_EINT1_SHIFT   8 /* IM_DSP1_RAM_RDY_EINT1 */

Definition at line 4410 of file registers.h.

#define ARIZONA_IM_DSP1_RAM_RDY_EINT1_WIDTH   1 /* IM_DSP1_RAM_RDY_EINT1 */

Definition at line 4411 of file registers.h.

#define ARIZONA_IM_DSP1_RAM_RDY_EINT2   0x0100 /* IM_DSP1_RAM_RDY_EINT2 */

Definition at line 4752 of file registers.h.

#define ARIZONA_IM_DSP1_RAM_RDY_EINT2_MASK   0x0100 /* IM_DSP1_RAM_RDY_EINT2 */

Definition at line 4753 of file registers.h.

#define ARIZONA_IM_DSP1_RAM_RDY_EINT2_SHIFT   8 /* IM_DSP1_RAM_RDY_EINT2 */

Definition at line 4754 of file registers.h.

#define ARIZONA_IM_DSP1_RAM_RDY_EINT2_WIDTH   1 /* IM_DSP1_RAM_RDY_EINT2 */

Definition at line 4755 of file registers.h.

#define ARIZONA_IM_DSP_IRQ1_EINT1   0x0001 /* IM_DSP_IRQ1_EINT1 */

Definition at line 4416 of file registers.h.

#define ARIZONA_IM_DSP_IRQ1_EINT1_MASK   0x0001 /* IM_DSP_IRQ1_EINT1 */

Definition at line 4417 of file registers.h.

#define ARIZONA_IM_DSP_IRQ1_EINT1_SHIFT   0 /* IM_DSP_IRQ1_EINT1 */

Definition at line 4418 of file registers.h.

#define ARIZONA_IM_DSP_IRQ1_EINT1_WIDTH   1 /* IM_DSP_IRQ1_EINT1 */

Definition at line 4419 of file registers.h.

#define ARIZONA_IM_DSP_IRQ1_EINT2   0x0001 /* IM_DSP_IRQ1_EINT2 */

Definition at line 4760 of file registers.h.

#define ARIZONA_IM_DSP_IRQ1_EINT2_MASK   0x0001 /* IM_DSP_IRQ1_EINT2 */

Definition at line 4761 of file registers.h.

#define ARIZONA_IM_DSP_IRQ1_EINT2_SHIFT   0 /* IM_DSP_IRQ1_EINT2 */

Definition at line 4762 of file registers.h.

#define ARIZONA_IM_DSP_IRQ1_EINT2_WIDTH   1 /* IM_DSP_IRQ1_EINT2 */

Definition at line 4763 of file registers.h.

#define ARIZONA_IM_DSP_IRQ2_EINT1   0x0002 /* IM_DSP_IRQ2_EINT1 */

Definition at line 4412 of file registers.h.

#define ARIZONA_IM_DSP_IRQ2_EINT1_MASK   0x0002 /* IM_DSP_IRQ2_EINT1 */

Definition at line 4413 of file registers.h.

#define ARIZONA_IM_DSP_IRQ2_EINT1_SHIFT   1 /* IM_DSP_IRQ2_EINT1 */

Definition at line 4414 of file registers.h.

#define ARIZONA_IM_DSP_IRQ2_EINT1_WIDTH   1 /* IM_DSP_IRQ2_EINT1 */

Definition at line 4415 of file registers.h.

#define ARIZONA_IM_DSP_IRQ2_EINT2   0x0002 /* IM_DSP_IRQ2_EINT2 */

Definition at line 4756 of file registers.h.

#define ARIZONA_IM_DSP_IRQ2_EINT2_MASK   0x0002 /* IM_DSP_IRQ2_EINT2 */

Definition at line 4757 of file registers.h.

#define ARIZONA_IM_DSP_IRQ2_EINT2_SHIFT   1 /* IM_DSP_IRQ2_EINT2 */

Definition at line 4758 of file registers.h.

#define ARIZONA_IM_DSP_IRQ2_EINT2_WIDTH   1 /* IM_DSP_IRQ2_EINT2 */

Definition at line 4759 of file registers.h.

#define ARIZONA_IM_FLL1_CLOCK_OK_EINT1   0x0001 /* IM_FLL1_CLOCK_OK_EINT1 */

Definition at line 4548 of file registers.h.

#define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_MASK   0x0001 /* IM_FLL1_CLOCK_OK_EINT1 */

Definition at line 4549 of file registers.h.

#define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_SHIFT   0 /* IM_FLL1_CLOCK_OK_EINT1 */

Definition at line 4550 of file registers.h.

#define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_WIDTH   1 /* IM_FLL1_CLOCK_OK_EINT1 */

Definition at line 4551 of file registers.h.

#define ARIZONA_IM_FLL1_CLOCK_OK_EINT2   0x0001 /* IM_FLL1_CLOCK_OK_EINT2 */

Definition at line 4893 of file registers.h.

#define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_MASK   0x0001 /* IM_FLL1_CLOCK_OK_EINT2 */

Definition at line 4894 of file registers.h.

#define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_SHIFT   0 /* IM_FLL1_CLOCK_OK_EINT2 */

Definition at line 4895 of file registers.h.

#define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_WIDTH   1 /* IM_FLL1_CLOCK_OK_EINT2 */

Definition at line 4896 of file registers.h.

#define ARIZONA_IM_FLL1_LOCK_EINT1   0x0004 /* IM_FLL1_LOCK_EINT1 */

Definition at line 4472 of file registers.h.

#define ARIZONA_IM_FLL1_LOCK_EINT1_MASK   0x0004 /* IM_FLL1_LOCK_EINT1 */

Definition at line 4473 of file registers.h.

#define ARIZONA_IM_FLL1_LOCK_EINT1_SHIFT   2 /* IM_FLL1_LOCK_EINT1 */

Definition at line 4474 of file registers.h.

#define ARIZONA_IM_FLL1_LOCK_EINT1_WIDTH   1 /* IM_FLL1_LOCK_EINT1 */

Definition at line 4475 of file registers.h.

#define ARIZONA_IM_FLL1_LOCK_EINT2   0x0004 /* IM_FLL1_LOCK_EINT2 */

Definition at line 4816 of file registers.h.

#define ARIZONA_IM_FLL1_LOCK_EINT2_MASK   0x0004 /* IM_FLL1_LOCK_EINT2 */

Definition at line 4817 of file registers.h.

#define ARIZONA_IM_FLL1_LOCK_EINT2_SHIFT   2 /* IM_FLL1_LOCK_EINT2 */

Definition at line 4818 of file registers.h.

#define ARIZONA_IM_FLL1_LOCK_EINT2_WIDTH   1 /* IM_FLL1_LOCK_EINT2 */

Definition at line 4819 of file registers.h.

#define ARIZONA_IM_FLL2_CLOCK_OK_EINT1   0x0002 /* IM_FLL2_CLOCK_OK_EINT1 */

Definition at line 4544 of file registers.h.

#define ARIZONA_IM_FLL2_CLOCK_OK_EINT1_MASK   0x0002 /* IM_FLL2_CLOCK_OK_EINT1 */

Definition at line 4545 of file registers.h.

#define ARIZONA_IM_FLL2_CLOCK_OK_EINT1_SHIFT   1 /* IM_FLL2_CLOCK_OK_EINT1 */

Definition at line 4546 of file registers.h.

#define ARIZONA_IM_FLL2_CLOCK_OK_EINT1_WIDTH   1 /* IM_FLL2_CLOCK_OK_EINT1 */

Definition at line 4547 of file registers.h.

#define ARIZONA_IM_FLL2_CLOCK_OK_EINT2   0x0002 /* IM_FLL2_CLOCK_OK_EINT2 */

Definition at line 4889 of file registers.h.

#define ARIZONA_IM_FLL2_CLOCK_OK_EINT2_MASK   0x0002 /* IM_FLL2_CLOCK_OK_EINT2 */

Definition at line 4890 of file registers.h.

#define ARIZONA_IM_FLL2_CLOCK_OK_EINT2_SHIFT   1 /* IM_FLL2_CLOCK_OK_EINT2 */

Definition at line 4891 of file registers.h.

#define ARIZONA_IM_FLL2_CLOCK_OK_EINT2_WIDTH   1 /* IM_FLL2_CLOCK_OK_EINT2 */

Definition at line 4892 of file registers.h.

#define ARIZONA_IM_FLL2_LOCK_EINT1   0x0008 /* IM_FLL2_LOCK_EINT1 */

Definition at line 4468 of file registers.h.

#define ARIZONA_IM_FLL2_LOCK_EINT1_MASK   0x0008 /* IM_FLL2_LOCK_EINT1 */

Definition at line 4469 of file registers.h.

#define ARIZONA_IM_FLL2_LOCK_EINT1_SHIFT   3 /* IM_FLL2_LOCK_EINT1 */

Definition at line 4470 of file registers.h.

#define ARIZONA_IM_FLL2_LOCK_EINT1_WIDTH   1 /* IM_FLL2_LOCK_EINT1 */

Definition at line 4471 of file registers.h.

#define ARIZONA_IM_FLL2_LOCK_EINT2   0x0008 /* IM_FLL2_LOCK_EINT2 */

Definition at line 4812 of file registers.h.

#define ARIZONA_IM_FLL2_LOCK_EINT2_MASK   0x0008 /* IM_FLL2_LOCK_EINT2 */

Definition at line 4813 of file registers.h.

#define ARIZONA_IM_FLL2_LOCK_EINT2_SHIFT   3 /* IM_FLL2_LOCK_EINT2 */

Definition at line 4814 of file registers.h.

#define ARIZONA_IM_FLL2_LOCK_EINT2_WIDTH   1 /* IM_FLL2_LOCK_EINT2 */

Definition at line 4815 of file registers.h.

#define ARIZONA_IM_GP1_EINT1   0x0001 /* IM_GP1_EINT1 */

Definition at line 4400 of file registers.h.

#define ARIZONA_IM_GP1_EINT1_MASK   0x0001 /* IM_GP1_EINT1 */

Definition at line 4401 of file registers.h.

#define ARIZONA_IM_GP1_EINT1_SHIFT   0 /* IM_GP1_EINT1 */

Definition at line 4402 of file registers.h.

#define ARIZONA_IM_GP1_EINT1_WIDTH   1 /* IM_GP1_EINT1 */

Definition at line 4403 of file registers.h.

#define ARIZONA_IM_GP1_EINT2   0x0001 /* IM_GP1_EINT2 */

Definition at line 4744 of file registers.h.

#define ARIZONA_IM_GP1_EINT2_MASK   0x0001 /* IM_GP1_EINT2 */

Definition at line 4745 of file registers.h.

#define ARIZONA_IM_GP1_EINT2_SHIFT   0 /* IM_GP1_EINT2 */

Definition at line 4746 of file registers.h.

#define ARIZONA_IM_GP1_EINT2_WIDTH   1 /* IM_GP1_EINT2 */

Definition at line 4747 of file registers.h.

#define ARIZONA_IM_GP2_EINT1   0x0002 /* IM_GP2_EINT1 */

Definition at line 4396 of file registers.h.

#define ARIZONA_IM_GP2_EINT1_MASK   0x0002 /* IM_GP2_EINT1 */

Definition at line 4397 of file registers.h.

#define ARIZONA_IM_GP2_EINT1_SHIFT   1 /* IM_GP2_EINT1 */

Definition at line 4398 of file registers.h.

#define ARIZONA_IM_GP2_EINT1_WIDTH   1 /* IM_GP2_EINT1 */

Definition at line 4399 of file registers.h.

#define ARIZONA_IM_GP2_EINT2   0x0002 /* IM_GP2_EINT2 */

Definition at line 4740 of file registers.h.

#define ARIZONA_IM_GP2_EINT2_MASK   0x0002 /* IM_GP2_EINT2 */

Definition at line 4741 of file registers.h.

#define ARIZONA_IM_GP2_EINT2_SHIFT   1 /* IM_GP2_EINT2 */

Definition at line 4742 of file registers.h.

#define ARIZONA_IM_GP2_EINT2_WIDTH   1 /* IM_GP2_EINT2 */

Definition at line 4743 of file registers.h.

#define ARIZONA_IM_GP3_EINT1   0x0004 /* IM_GP3_EINT1 */

Definition at line 4392 of file registers.h.

#define ARIZONA_IM_GP3_EINT1_MASK   0x0004 /* IM_GP3_EINT1 */

Definition at line 4393 of file registers.h.

#define ARIZONA_IM_GP3_EINT1_SHIFT   2 /* IM_GP3_EINT1 */

Definition at line 4394 of file registers.h.

#define ARIZONA_IM_GP3_EINT1_WIDTH   1 /* IM_GP3_EINT1 */

Definition at line 4395 of file registers.h.

#define ARIZONA_IM_GP3_EINT2   0x0004 /* IM_GP3_EINT2 */

Definition at line 4736 of file registers.h.

#define ARIZONA_IM_GP3_EINT2_MASK   0x0004 /* IM_GP3_EINT2 */

Definition at line 4737 of file registers.h.

#define ARIZONA_IM_GP3_EINT2_SHIFT   2 /* IM_GP3_EINT2 */

Definition at line 4738 of file registers.h.

#define ARIZONA_IM_GP3_EINT2_WIDTH   1 /* IM_GP3_EINT2 */

Definition at line 4739 of file registers.h.

#define ARIZONA_IM_GP4_EINT1   0x0008 /* IM_GP4_EINT1 */

Definition at line 4388 of file registers.h.

#define ARIZONA_IM_GP4_EINT1_MASK   0x0008 /* IM_GP4_EINT1 */

Definition at line 4389 of file registers.h.

#define ARIZONA_IM_GP4_EINT1_SHIFT   3 /* IM_GP4_EINT1 */

Definition at line 4390 of file registers.h.

#define ARIZONA_IM_GP4_EINT1_WIDTH   1 /* IM_GP4_EINT1 */

Definition at line 4391 of file registers.h.

#define ARIZONA_IM_GP4_EINT2   0x0008 /* IM_GP4_EINT2 */

Definition at line 4732 of file registers.h.

#define ARIZONA_IM_GP4_EINT2_MASK   0x0008 /* IM_GP4_EINT2 */

Definition at line 4733 of file registers.h.

#define ARIZONA_IM_GP4_EINT2_SHIFT   3 /* IM_GP4_EINT2 */

Definition at line 4734 of file registers.h.

#define ARIZONA_IM_GP4_EINT2_WIDTH   1 /* IM_GP4_EINT2 */

Definition at line 4735 of file registers.h.

#define ARIZONA_IM_GP5_FALL_EINT1   0x0020 /* IM_GP5_FALL_EINT1 */

Definition at line 5309 of file registers.h.

#define ARIZONA_IM_GP5_FALL_EINT1_MASK   0x0020 /* IM_GP5_FALL_EINT1 */

Definition at line 5310 of file registers.h.

#define ARIZONA_IM_GP5_FALL_EINT1_SHIFT   5 /* IM_GP5_FALL_EINT1 */

Definition at line 5311 of file registers.h.

#define ARIZONA_IM_GP5_FALL_EINT1_WIDTH   1 /* IM_GP5_FALL_EINT1 */

Definition at line 5312 of file registers.h.

#define ARIZONA_IM_GP5_FALL_EINT2   0x0020 /* IM_GP5_FALL_EINT2 */

Definition at line 5337 of file registers.h.

#define ARIZONA_IM_GP5_FALL_EINT2_MASK   0x0020 /* IM_GP5_FALL_EINT2 */

Definition at line 5338 of file registers.h.

#define ARIZONA_IM_GP5_FALL_EINT2_SHIFT   5 /* IM_GP5_FALL_EINT2 */

Definition at line 5339 of file registers.h.

#define ARIZONA_IM_GP5_FALL_EINT2_WIDTH   1 /* IM_GP5_FALL_EINT2 */

Definition at line 5340 of file registers.h.

#define ARIZONA_IM_GP5_RISE_EINT1   0x0010 /* IM_GP5_RISE_EINT1 */

Definition at line 5313 of file registers.h.

#define ARIZONA_IM_GP5_RISE_EINT1_MASK   0x0010 /* IM_GP5_RISE_EINT1 */

Definition at line 5314 of file registers.h.

#define ARIZONA_IM_GP5_RISE_EINT1_SHIFT   4 /* IM_GP5_RISE_EINT1 */

Definition at line 5315 of file registers.h.

#define ARIZONA_IM_GP5_RISE_EINT1_WIDTH   1 /* IM_GP5_RISE_EINT1 */

Definition at line 5316 of file registers.h.

#define ARIZONA_IM_GP5_RISE_EINT2   0x0010 /* IM_GP5_RISE_EINT2 */

Definition at line 5341 of file registers.h.

#define ARIZONA_IM_GP5_RISE_EINT2_MASK   0x0010 /* IM_GP5_RISE_EINT2 */

Definition at line 5342 of file registers.h.

#define ARIZONA_IM_GP5_RISE_EINT2_SHIFT   4 /* IM_GP5_RISE_EINT2 */

Definition at line 5343 of file registers.h.

#define ARIZONA_IM_GP5_RISE_EINT2_WIDTH   1 /* IM_GP5_RISE_EINT2 */

Definition at line 5344 of file registers.h.

#define ARIZONA_IM_HPDET_EINT1   0x2000 /* IM_HPDET_EINT1 */

Definition at line 4432 of file registers.h.

#define ARIZONA_IM_HPDET_EINT1_MASK   0x2000 /* IM_HPDET_EINT1 */

Definition at line 4433 of file registers.h.

#define ARIZONA_IM_HPDET_EINT1_SHIFT   13 /* IM_HPDET_EINT1 */

Definition at line 4434 of file registers.h.

#define ARIZONA_IM_HPDET_EINT1_WIDTH   1 /* IM_HPDET_EINT1 */

Definition at line 4435 of file registers.h.

#define ARIZONA_IM_HPDET_EINT2   0x2000 /* IM_HPDET_EINT2 */

Definition at line 4776 of file registers.h.

#define ARIZONA_IM_HPDET_EINT2_MASK   0x2000 /* IM_HPDET_EINT2 */

Definition at line 4777 of file registers.h.

#define ARIZONA_IM_HPDET_EINT2_SHIFT   13 /* IM_HPDET_EINT2 */

Definition at line 4778 of file registers.h.

#define ARIZONA_IM_HPDET_EINT2_WIDTH   1 /* IM_HPDET_EINT2 */

Definition at line 4779 of file registers.h.

#define ARIZONA_IM_IRQ1   0x0001 /* IM_IRQ1 */

Definition at line 4556 of file registers.h.

#define ARIZONA_IM_IRQ1_MASK   0x0001 /* IM_IRQ1 */

Definition at line 4557 of file registers.h.

#define ARIZONA_IM_IRQ1_SHIFT   0 /* IM_IRQ1 */

Definition at line 4558 of file registers.h.

#define ARIZONA_IM_IRQ1_WIDTH   1 /* IM_IRQ1 */

Definition at line 4559 of file registers.h.

#define ARIZONA_IM_IRQ2   0x0001 /* IM_IRQ2 */

Definition at line 4901 of file registers.h.

#define ARIZONA_IM_IRQ2_MASK   0x0001 /* IM_IRQ2 */

Definition at line 4902 of file registers.h.

#define ARIZONA_IM_IRQ2_SHIFT   0 /* IM_IRQ2 */

Definition at line 4903 of file registers.h.

#define ARIZONA_IM_IRQ2_WIDTH   1 /* IM_IRQ2 */

Definition at line 4904 of file registers.h.

#define ARIZONA_IM_ISRC1_CFG_ERR_EINT1   0x0080 /* IM_ISRC1_CFG_ERR_EINT1 */

Definition at line 4520 of file registers.h.

#define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_MASK   0x0080 /* IM_ISRC1_CFG_ERR_EINT1 */

Definition at line 4521 of file registers.h.

#define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_SHIFT   7 /* IM_ISRC1_CFG_ERR_EINT1 */

Definition at line 4522 of file registers.h.

#define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_WIDTH   1 /* IM_ISRC1_CFG_ERR_EINT1 */

Definition at line 4523 of file registers.h.

#define ARIZONA_IM_ISRC1_CFG_ERR_EINT2   0x0080 /* IM_ISRC1_CFG_ERR_EINT2 */

Definition at line 4864 of file registers.h.

#define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_MASK   0x0080 /* IM_ISRC1_CFG_ERR_EINT2 */

Definition at line 4865 of file registers.h.

#define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_SHIFT   7 /* IM_ISRC1_CFG_ERR_EINT2 */

Definition at line 4866 of file registers.h.

#define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_WIDTH   1 /* IM_ISRC1_CFG_ERR_EINT2 */

Definition at line 4867 of file registers.h.

#define ARIZONA_IM_ISRC2_CFG_ERR_EINT1   0x0040 /* IM_ISRC2_CFG_ERR_EINT1 */

Definition at line 4524 of file registers.h.

#define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_MASK   0x0040 /* IM_ISRC2_CFG_ERR_EINT1 */

Definition at line 4525 of file registers.h.

#define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_SHIFT   6 /* IM_ISRC2_CFG_ERR_EINT1 */

Definition at line 4526 of file registers.h.

#define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_WIDTH   1 /* IM_ISRC2_CFG_ERR_EINT1 */

Definition at line 4527 of file registers.h.

#define ARIZONA_IM_ISRC2_CFG_ERR_EINT2   0x0040 /* IM_ISRC2_CFG_ERR_EINT2 */

Definition at line 4868 of file registers.h.

#define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_MASK   0x0040 /* IM_ISRC2_CFG_ERR_EINT2 */

Definition at line 4869 of file registers.h.

#define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_SHIFT   6 /* IM_ISRC2_CFG_ERR_EINT2 */

Definition at line 4870 of file registers.h.

#define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_WIDTH   1 /* IM_ISRC2_CFG_ERR_EINT2 */

Definition at line 4871 of file registers.h.

#define ARIZONA_IM_JD1_FALL_EINT1   0x0008 /* IM_JD1_FALL_EINT1 */

Definition at line 5317 of file registers.h.

#define ARIZONA_IM_JD1_FALL_EINT1_MASK   0x0008 /* IM_JD1_FALL_EINT1 */

Definition at line 5318 of file registers.h.

#define ARIZONA_IM_JD1_FALL_EINT1_SHIFT   3 /* IM_JD1_FALL_EINT1 */

Definition at line 5319 of file registers.h.

#define ARIZONA_IM_JD1_FALL_EINT1_WIDTH   1 /* IM_JD1_FALL_EINT1 */

Definition at line 5320 of file registers.h.

#define ARIZONA_IM_JD1_FALL_EINT2   0x0008 /* IM_JD1_FALL_EINT2 */

Definition at line 5345 of file registers.h.

#define ARIZONA_IM_JD1_FALL_EINT2_MASK   0x0008 /* IM_JD1_FALL_EINT2 */

Definition at line 5346 of file registers.h.

#define ARIZONA_IM_JD1_FALL_EINT2_SHIFT   3 /* IM_JD1_FALL_EINT2 */

Definition at line 5347 of file registers.h.

#define ARIZONA_IM_JD1_FALL_EINT2_WIDTH   1 /* IM_JD1_FALL_EINT2 */

Definition at line 5348 of file registers.h.

#define ARIZONA_IM_JD1_RISE_EINT1   0x0004 /* IM_JD1_RISE_EINT1 */

Definition at line 5321 of file registers.h.

#define ARIZONA_IM_JD1_RISE_EINT1_MASK   0x0004 /* IM_JD1_RISE_EINT1 */

Definition at line 5322 of file registers.h.

#define ARIZONA_IM_JD1_RISE_EINT1_SHIFT   2 /* IM_JD1_RISE_EINT1 */

Definition at line 5323 of file registers.h.

#define ARIZONA_IM_JD1_RISE_EINT1_WIDTH   1 /* IM_JD1_RISE_EINT1 */

Definition at line 5324 of file registers.h.

#define ARIZONA_IM_JD1_RISE_EINT2   0x0004 /* IM_JD1_RISE_EINT2 */

Definition at line 5349 of file registers.h.

#define ARIZONA_IM_JD1_RISE_EINT2_MASK   0x0004 /* IM_JD1_RISE_EINT2 */

Definition at line 5350 of file registers.h.

#define ARIZONA_IM_JD1_RISE_EINT2_SHIFT   2 /* IM_JD1_RISE_EINT2 */

Definition at line 5351 of file registers.h.

#define ARIZONA_IM_JD1_RISE_EINT2_WIDTH   1 /* IM_JD1_RISE_EINT2 */

Definition at line 5352 of file registers.h.

#define ARIZONA_IM_JD2_FALL_EINT1   0x0002 /* IM_JD2_FALL_EINT1 */

Definition at line 5325 of file registers.h.

#define ARIZONA_IM_JD2_FALL_EINT1_MASK   0x0002 /* IM_JD2_FALL_EINT1 */

Definition at line 5326 of file registers.h.

#define ARIZONA_IM_JD2_FALL_EINT1_SHIFT   1 /* IM_JD2_FALL_EINT1 */

Definition at line 5327 of file registers.h.

#define ARIZONA_IM_JD2_FALL_EINT1_WIDTH   1 /* IM_JD2_FALL_EINT1 */

Definition at line 5328 of file registers.h.

#define ARIZONA_IM_JD2_FALL_EINT2   0x0002 /* IM_JD2_FALL_EINT2 */

Definition at line 5353 of file registers.h.

#define ARIZONA_IM_JD2_FALL_EINT2_MASK   0x0002 /* IM_JD2_FALL_EINT2 */

Definition at line 5354 of file registers.h.

#define ARIZONA_IM_JD2_FALL_EINT2_SHIFT   1 /* IM_JD2_FALL_EINT2 */

Definition at line 5355 of file registers.h.

#define ARIZONA_IM_JD2_FALL_EINT2_WIDTH   1 /* IM_JD2_FALL_EINT2 */

Definition at line 5356 of file registers.h.

#define ARIZONA_IM_JD2_RISE_EINT1   0x0001 /* IM_JD2_RISE_EINT1 */

Definition at line 5329 of file registers.h.

#define ARIZONA_IM_JD2_RISE_EINT1_MASK   0x0001 /* IM_JD2_RISE_EINT1 */

Definition at line 5330 of file registers.h.

#define ARIZONA_IM_JD2_RISE_EINT1_SHIFT   0 /* IM_JD2_RISE_EINT1 */

Definition at line 5331 of file registers.h.

#define ARIZONA_IM_JD2_RISE_EINT1_WIDTH   1 /* IM_JD2_RISE_EINT1 */

Definition at line 5332 of file registers.h.

#define ARIZONA_IM_JD2_RISE_EINT2   0x0001 /* IM_JD2_RISE_EINT2 */

Definition at line 5357 of file registers.h.

#define ARIZONA_IM_JD2_RISE_EINT2_MASK   0x0001 /* IM_JD2_RISE_EINT2 */

Definition at line 5358 of file registers.h.

#define ARIZONA_IM_JD2_RISE_EINT2_SHIFT   0 /* IM_JD2_RISE_EINT2 */

Definition at line 5359 of file registers.h.

#define ARIZONA_IM_JD2_RISE_EINT2_WIDTH   1 /* IM_JD2_RISE_EINT2 */

Definition at line 5360 of file registers.h.

#define ARIZONA_IM_MICDET_EINT1   0x1000 /* IM_MICDET_EINT1 */

Definition at line 4436 of file registers.h.

#define ARIZONA_IM_MICDET_EINT1_MASK   0x1000 /* IM_MICDET_EINT1 */

Definition at line 4437 of file registers.h.

#define ARIZONA_IM_MICDET_EINT1_SHIFT   12 /* IM_MICDET_EINT1 */

Definition at line 4438 of file registers.h.

#define ARIZONA_IM_MICDET_EINT1_WIDTH   1 /* IM_MICDET_EINT1 */

Definition at line 4439 of file registers.h.

#define ARIZONA_IM_MICDET_EINT2   0x1000 /* IM_MICDET_EINT2 */

Definition at line 4780 of file registers.h.

#define ARIZONA_IM_MICDET_EINT2_MASK   0x1000 /* IM_MICDET_EINT2 */

Definition at line 4781 of file registers.h.

#define ARIZONA_IM_MICDET_EINT2_SHIFT   12 /* IM_MICDET_EINT2 */

Definition at line 4782 of file registers.h.

#define ARIZONA_IM_MICDET_EINT2_WIDTH   1 /* IM_MICDET_EINT2 */

Definition at line 4783 of file registers.h.

#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1   0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */

Definition at line 4508 of file registers.h.

#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_MASK   0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */

Definition at line 4509 of file registers.h.

#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_SHIFT   10 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */

Definition at line 4510 of file registers.h.

#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_WIDTH   1 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */

Definition at line 4511 of file registers.h.

#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2   0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */

Definition at line 4852 of file registers.h.

#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_MASK   0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */

Definition at line 4853 of file registers.h.

#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_SHIFT   10 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */

Definition at line 4854 of file registers.h.

#define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_WIDTH   1 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */

Definition at line 4855 of file registers.h.

#define ARIZONA_IM_OVERCLOCKED_EINT1   0x0020 /* IM_OVERCLOCKED_EINT1 */

Definition at line 4464 of file registers.h.

#define ARIZONA_IM_OVERCLOCKED_EINT1_MASK   0x0020 /* IM_OVERCLOCKED_EINT1 */

Definition at line 4465 of file registers.h.

#define ARIZONA_IM_OVERCLOCKED_EINT1_SHIFT   5 /* IM_OVERCLOCKED_EINT1 */

Definition at line 4466 of file registers.h.

#define ARIZONA_IM_OVERCLOCKED_EINT1_WIDTH   1 /* IM_OVERCLOCKED_EINT1 */

Definition at line 4467 of file registers.h.

#define ARIZONA_IM_OVERCLOCKED_EINT2   0x0020 /* IM_OVERCLOCKED_EINT2 */

Definition at line 4808 of file registers.h.

#define ARIZONA_IM_OVERCLOCKED_EINT2_MASK   0x0020 /* IM_OVERCLOCKED_EINT2 */

Definition at line 4809 of file registers.h.

#define ARIZONA_IM_OVERCLOCKED_EINT2_SHIFT   5 /* IM_OVERCLOCKED_EINT2 */

Definition at line 4810 of file registers.h.

#define ARIZONA_IM_OVERCLOCKED_EINT2_WIDTH   1 /* IM_OVERCLOCKED_EINT2 */

Definition at line 4811 of file registers.h.

#define ARIZONA_IM_SPK_SHUTDOWN_EINT1   0x4000 /* IM_SPK_SHUTDOWN_EINT1 */

Definition at line 4428 of file registers.h.

#define ARIZONA_IM_SPK_SHUTDOWN_EINT1_MASK   0x4000 /* IM_SPK_SHUTDOWN_EINT1 */

Definition at line 4429 of file registers.h.

#define ARIZONA_IM_SPK_SHUTDOWN_EINT1_SHIFT   14 /* IM_SPK_SHUTDOWN_EINT1 */

Definition at line 4430 of file registers.h.

#define ARIZONA_IM_SPK_SHUTDOWN_EINT1_WIDTH   1 /* IM_SPK_SHUTDOWN_EINT1 */

Definition at line 4431 of file registers.h.

#define ARIZONA_IM_SPK_SHUTDOWN_EINT2   0x4000 /* IM_SPK_SHUTDOWN_EINT2 */

Definition at line 4772 of file registers.h.

#define ARIZONA_IM_SPK_SHUTDOWN_EINT2_MASK   0x4000 /* IM_SPK_SHUTDOWN_EINT2 */

Definition at line 4773 of file registers.h.

#define ARIZONA_IM_SPK_SHUTDOWN_EINT2_SHIFT   14 /* IM_SPK_SHUTDOWN_EINT2 */

Definition at line 4774 of file registers.h.

#define ARIZONA_IM_SPK_SHUTDOWN_EINT2_WIDTH   1 /* IM_SPK_SHUTDOWN_EINT2 */

Definition at line 4775 of file registers.h.

#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1   0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT1 */

Definition at line 4424 of file registers.h.

#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1_MASK   0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT1 */

Definition at line 4425 of file registers.h.

#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1_SHIFT   15 /* IM_SPK_SHUTDOWN_WARN_EINT1 */

Definition at line 4426 of file registers.h.

#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1_WIDTH   1 /* IM_SPK_SHUTDOWN_WARN_EINT1 */

Definition at line 4427 of file registers.h.

#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2   0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT2 */

Definition at line 4768 of file registers.h.

#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2_MASK   0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT2 */

Definition at line 4769 of file registers.h.

#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2_SHIFT   15 /* IM_SPK_SHUTDOWN_WARN_EINT2 */

Definition at line 4770 of file registers.h.

#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2_WIDTH   1 /* IM_SPK_SHUTDOWN_WARN_EINT2 */

Definition at line 4771 of file registers.h.

#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1   0x0100 /* IM_SYSCLK_ENA_LOW_EINT1 */

Definition at line 4516 of file registers.h.

#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_MASK   0x0100 /* IM_SYSCLK_ENA_LOW_EINT1 */

Definition at line 4517 of file registers.h.

#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_SHIFT   8 /* IM_SYSCLK_ENA_LOW_EINT1 */

Definition at line 4518 of file registers.h.

#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_WIDTH   1 /* IM_SYSCLK_ENA_LOW_EINT1 */

Definition at line 4519 of file registers.h.

#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2   0x0100 /* IM_SYSCLK_ENA_LOW_EINT2 */

Definition at line 4860 of file registers.h.

#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_MASK   0x0100 /* IM_SYSCLK_ENA_LOW_EINT2 */

Definition at line 4861 of file registers.h.

#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_SHIFT   8 /* IM_SYSCLK_ENA_LOW_EINT2 */

Definition at line 4862 of file registers.h.

#define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_WIDTH   1 /* IM_SYSCLK_ENA_LOW_EINT2 */

Definition at line 4863 of file registers.h.

#define ARIZONA_IM_UNDERCLOCKED_EINT1   0x0040 /* IM_UNDERCLOCKED_EINT1 */

Definition at line 4460 of file registers.h.

#define ARIZONA_IM_UNDERCLOCKED_EINT1_MASK   0x0040 /* IM_UNDERCLOCKED_EINT1 */

Definition at line 4461 of file registers.h.

#define ARIZONA_IM_UNDERCLOCKED_EINT1_SHIFT   6 /* IM_UNDERCLOCKED_EINT1 */

Definition at line 4462 of file registers.h.

#define ARIZONA_IM_UNDERCLOCKED_EINT1_WIDTH   1 /* IM_UNDERCLOCKED_EINT1 */

Definition at line 4463 of file registers.h.

#define ARIZONA_IM_UNDERCLOCKED_EINT2   0x0040 /* IM_UNDERCLOCKED_EINT2 */

Definition at line 4804 of file registers.h.

#define ARIZONA_IM_UNDERCLOCKED_EINT2_MASK   0x0040 /* IM_UNDERCLOCKED_EINT2 */

Definition at line 4805 of file registers.h.

#define ARIZONA_IM_UNDERCLOCKED_EINT2_SHIFT   6 /* IM_UNDERCLOCKED_EINT2 */

Definition at line 4806 of file registers.h.

#define ARIZONA_IM_UNDERCLOCKED_EINT2_WIDTH   1 /* IM_UNDERCLOCKED_EINT2 */

Definition at line 4807 of file registers.h.

#define ARIZONA_IM_WSEQ_DONE_EINT1   0x0800 /* IM_WSEQ_DONE_EINT1 */

Definition at line 4440 of file registers.h.

#define ARIZONA_IM_WSEQ_DONE_EINT1_MASK   0x0800 /* IM_WSEQ_DONE_EINT1 */

Definition at line 4441 of file registers.h.

#define ARIZONA_IM_WSEQ_DONE_EINT1_SHIFT   11 /* IM_WSEQ_DONE_EINT1 */

Definition at line 4442 of file registers.h.

#define ARIZONA_IM_WSEQ_DONE_EINT1_WIDTH   1 /* IM_WSEQ_DONE_EINT1 */

Definition at line 4443 of file registers.h.

#define ARIZONA_IM_WSEQ_DONE_EINT2   0x0800 /* IM_WSEQ_DONE_EINT2 */

Definition at line 4784 of file registers.h.

#define ARIZONA_IM_WSEQ_DONE_EINT2_MASK   0x0800 /* IM_WSEQ_DONE_EINT2 */

Definition at line 4785 of file registers.h.

#define ARIZONA_IM_WSEQ_DONE_EINT2_SHIFT   11 /* IM_WSEQ_DONE_EINT2 */

Definition at line 4786 of file registers.h.

#define ARIZONA_IM_WSEQ_DONE_EINT2_WIDTH   1 /* IM_WSEQ_DONE_EINT2 */

Definition at line 4787 of file registers.h.

#define ARIZONA_IN1_DMIC_SUP_MASK   0x1800 /* IN1_DMIC_SUP - [12:11] */

Definition at line 2188 of file registers.h.

#define ARIZONA_IN1_DMIC_SUP_SHIFT   11 /* IN1_DMIC_SUP - [12:11] */

Definition at line 2189 of file registers.h.

#define ARIZONA_IN1_DMIC_SUP_WIDTH   2 /* IN1_DMIC_SUP - [12:11] */

Definition at line 2190 of file registers.h.

#define ARIZONA_IN1_DMICL_DLY_MASK   0x003F /* IN1_DMICL_DLY - [5:0] */

Definition at line 2216 of file registers.h.

#define ARIZONA_IN1_DMICL_DLY_SHIFT   0 /* IN1_DMICL_DLY - [5:0] */

Definition at line 2217 of file registers.h.

#define ARIZONA_IN1_DMICL_DLY_WIDTH   6 /* IN1_DMICL_DLY - [5:0] */

Definition at line 2218 of file registers.h.

#define ARIZONA_IN1_DMICR_DLY_MASK   0x003F /* IN1_DMICR_DLY - [5:0] */

Definition at line 2245 of file registers.h.

#define ARIZONA_IN1_DMICR_DLY_SHIFT   0 /* IN1_DMICR_DLY - [5:0] */

Definition at line 2246 of file registers.h.

#define ARIZONA_IN1_DMICR_DLY_WIDTH   6 /* IN1_DMICR_DLY - [5:0] */

Definition at line 2247 of file registers.h.

#define ARIZONA_IN1_MODE_MASK   0x0600 /* IN1_MODE - [10:9] */

Definition at line 2191 of file registers.h.

#define ARIZONA_IN1_MODE_SHIFT   9 /* IN1_MODE - [10:9] */

Definition at line 2192 of file registers.h.

#define ARIZONA_IN1_MODE_WIDTH   2 /* IN1_MODE - [10:9] */

Definition at line 2193 of file registers.h.

#define ARIZONA_IN1_OSR_MASK   0x6000 /* IN1_OSR - [14:13] */

Definition at line 2185 of file registers.h.

#define ARIZONA_IN1_OSR_SHIFT   13 /* IN1_OSR - [14:13] */

Definition at line 2186 of file registers.h.

#define ARIZONA_IN1_OSR_WIDTH   2 /* IN1_OSR - [14:13] */

Definition at line 2187 of file registers.h.

#define ARIZONA_IN1L_CONTROL   0x310

Definition at line 130 of file registers.h.

#define ARIZONA_IN1L_DIG_VOL_MASK   0x00FF /* IN1L_DIG_VOL - [7:0] */

Definition at line 2209 of file registers.h.

#define ARIZONA_IN1L_DIG_VOL_SHIFT   0 /* IN1L_DIG_VOL - [7:0] */

Definition at line 2210 of file registers.h.

#define ARIZONA_IN1L_DIG_VOL_WIDTH   8 /* IN1L_DIG_VOL - [7:0] */

Definition at line 2211 of file registers.h.

#define ARIZONA_IN1L_ENA   0x0002 /* IN1L_ENA */

Definition at line 2156 of file registers.h.

#define ARIZONA_IN1L_ENA_MASK   0x0002 /* IN1L_ENA */

Definition at line 2157 of file registers.h.

#define ARIZONA_IN1L_ENA_SHIFT   1 /* IN1L_ENA */

Definition at line 2158 of file registers.h.

#define ARIZONA_IN1L_ENA_WIDTH   1 /* IN1L_ENA */

Definition at line 2159 of file registers.h.

#define ARIZONA_IN1L_MUTE   0x0100 /* IN1L_MUTE */

Definition at line 2205 of file registers.h.

#define ARIZONA_IN1L_MUTE_MASK   0x0100 /* IN1L_MUTE */

Definition at line 2206 of file registers.h.

#define ARIZONA_IN1L_MUTE_SHIFT   8 /* IN1L_MUTE */

Definition at line 2207 of file registers.h.

#define ARIZONA_IN1L_MUTE_WIDTH   1 /* IN1L_MUTE */

Definition at line 2208 of file registers.h.

#define ARIZONA_IN1L_PGA_VOL_MASK   0x00FE /* IN1L_PGA_VOL - [7:1] */

Definition at line 2194 of file registers.h.

#define ARIZONA_IN1L_PGA_VOL_SHIFT   1 /* IN1L_PGA_VOL - [7:1] */

Definition at line 2195 of file registers.h.

#define ARIZONA_IN1L_PGA_VOL_WIDTH   7 /* IN1L_PGA_VOL - [7:1] */

Definition at line 2196 of file registers.h.

#define ARIZONA_IN1R_CONTROL   0x314

Definition at line 133 of file registers.h.

#define ARIZONA_IN1R_DIG_VOL_MASK   0x00FF /* IN1R_DIG_VOL - [7:0] */

Definition at line 2238 of file registers.h.

#define ARIZONA_IN1R_DIG_VOL_SHIFT   0 /* IN1R_DIG_VOL - [7:0] */

Definition at line 2239 of file registers.h.

#define ARIZONA_IN1R_DIG_VOL_WIDTH   8 /* IN1R_DIG_VOL - [7:0] */

Definition at line 2240 of file registers.h.

#define ARIZONA_IN1R_ENA   0x0001 /* IN1R_ENA */

Definition at line 2160 of file registers.h.

#define ARIZONA_IN1R_ENA_MASK   0x0001 /* IN1R_ENA */

Definition at line 2161 of file registers.h.

#define ARIZONA_IN1R_ENA_SHIFT   0 /* IN1R_ENA */

Definition at line 2162 of file registers.h.

#define ARIZONA_IN1R_ENA_WIDTH   1 /* IN1R_ENA */

Definition at line 2163 of file registers.h.

#define ARIZONA_IN1R_MUTE   0x0100 /* IN1R_MUTE */

Definition at line 2234 of file registers.h.

#define ARIZONA_IN1R_MUTE_MASK   0x0100 /* IN1R_MUTE */

Definition at line 2235 of file registers.h.

#define ARIZONA_IN1R_MUTE_SHIFT   8 /* IN1R_MUTE */

Definition at line 2236 of file registers.h.

#define ARIZONA_IN1R_MUTE_WIDTH   1 /* IN1R_MUTE */

Definition at line 2237 of file registers.h.

#define ARIZONA_IN1R_PGA_VOL_MASK   0x00FE /* IN1R_PGA_VOL - [7:1] */

Definition at line 2223 of file registers.h.

#define ARIZONA_IN1R_PGA_VOL_SHIFT   1 /* IN1R_PGA_VOL - [7:1] */

Definition at line 2224 of file registers.h.

#define ARIZONA_IN1R_PGA_VOL_WIDTH   7 /* IN1R_PGA_VOL - [7:1] */

Definition at line 2225 of file registers.h.

#define ARIZONA_IN2_DMIC_SUP_MASK   0x1800 /* IN2_DMIC_SUP - [12:11] */

Definition at line 2255 of file registers.h.

#define ARIZONA_IN2_DMIC_SUP_SHIFT   11 /* IN2_DMIC_SUP - [12:11] */

Definition at line 2256 of file registers.h.

#define ARIZONA_IN2_DMIC_SUP_WIDTH   2 /* IN2_DMIC_SUP - [12:11] */

Definition at line 2257 of file registers.h.

#define ARIZONA_IN2_DMICL_DLY_MASK   0x003F /* IN2_DMICL_DLY - [5:0] */

Definition at line 2283 of file registers.h.

#define ARIZONA_IN2_DMICL_DLY_SHIFT   0 /* IN2_DMICL_DLY - [5:0] */

Definition at line 2284 of file registers.h.

#define ARIZONA_IN2_DMICL_DLY_WIDTH   6 /* IN2_DMICL_DLY - [5:0] */

Definition at line 2285 of file registers.h.

#define ARIZONA_IN2_DMICR_DLY_MASK   0x003F /* IN2_DMICR_DLY - [5:0] */

Definition at line 2312 of file registers.h.

#define ARIZONA_IN2_DMICR_DLY_SHIFT   0 /* IN2_DMICR_DLY - [5:0] */

Definition at line 2313 of file registers.h.

#define ARIZONA_IN2_DMICR_DLY_WIDTH   6 /* IN2_DMICR_DLY - [5:0] */

Definition at line 2314 of file registers.h.

#define ARIZONA_IN2_MODE_MASK   0x0600 /* IN2_MODE - [10:9] */

Definition at line 2258 of file registers.h.

#define ARIZONA_IN2_MODE_SHIFT   9 /* IN2_MODE - [10:9] */

Definition at line 2259 of file registers.h.

#define ARIZONA_IN2_MODE_WIDTH   2 /* IN2_MODE - [10:9] */

Definition at line 2260 of file registers.h.

#define ARIZONA_IN2_OSR_MASK   0x6000 /* IN2_OSR - [14:13] */

Definition at line 2252 of file registers.h.

#define ARIZONA_IN2_OSR_SHIFT   13 /* IN2_OSR - [14:13] */

Definition at line 2253 of file registers.h.

#define ARIZONA_IN2_OSR_WIDTH   2 /* IN2_OSR - [14:13] */

Definition at line 2254 of file registers.h.

#define ARIZONA_IN2L_CONTROL   0x318

Definition at line 136 of file registers.h.

#define ARIZONA_IN2L_DIG_VOL_MASK   0x00FF /* IN2L_DIG_VOL - [7:0] */

Definition at line 2276 of file registers.h.

#define ARIZONA_IN2L_DIG_VOL_SHIFT   0 /* IN2L_DIG_VOL - [7:0] */

Definition at line 2277 of file registers.h.

#define ARIZONA_IN2L_DIG_VOL_WIDTH   8 /* IN2L_DIG_VOL - [7:0] */

Definition at line 2278 of file registers.h.

#define ARIZONA_IN2L_ENA   0x0008 /* IN2L_ENA */

Definition at line 2148 of file registers.h.

#define ARIZONA_IN2L_ENA_MASK   0x0008 /* IN2L_ENA */

Definition at line 2149 of file registers.h.

#define ARIZONA_IN2L_ENA_SHIFT   3 /* IN2L_ENA */

Definition at line 2150 of file registers.h.

#define ARIZONA_IN2L_ENA_WIDTH   1 /* IN2L_ENA */

Definition at line 2151 of file registers.h.

#define ARIZONA_IN2L_MUTE   0x0100 /* IN2L_MUTE */

Definition at line 2272 of file registers.h.

#define ARIZONA_IN2L_MUTE_MASK   0x0100 /* IN2L_MUTE */

Definition at line 2273 of file registers.h.

#define ARIZONA_IN2L_MUTE_SHIFT   8 /* IN2L_MUTE */

Definition at line 2274 of file registers.h.

#define ARIZONA_IN2L_MUTE_WIDTH   1 /* IN2L_MUTE */

Definition at line 2275 of file registers.h.

#define ARIZONA_IN2L_PGA_VOL_MASK   0x00FE /* IN2L_PGA_VOL - [7:1] */

Definition at line 2261 of file registers.h.

#define ARIZONA_IN2L_PGA_VOL_SHIFT   1 /* IN2L_PGA_VOL - [7:1] */

Definition at line 2262 of file registers.h.

#define ARIZONA_IN2L_PGA_VOL_WIDTH   7 /* IN2L_PGA_VOL - [7:1] */

Definition at line 2263 of file registers.h.

#define ARIZONA_IN2R_CONTROL   0x31C

Definition at line 139 of file registers.h.

#define ARIZONA_IN2R_DIG_VOL_MASK   0x00FF /* IN2R_DIG_VOL - [7:0] */

Definition at line 2305 of file registers.h.

#define ARIZONA_IN2R_DIG_VOL_SHIFT   0 /* IN2R_DIG_VOL - [7:0] */

Definition at line 2306 of file registers.h.

#define ARIZONA_IN2R_DIG_VOL_WIDTH   8 /* IN2R_DIG_VOL - [7:0] */

Definition at line 2307 of file registers.h.

#define ARIZONA_IN2R_ENA   0x0004 /* IN2R_ENA */

Definition at line 2152 of file registers.h.

#define ARIZONA_IN2R_ENA_MASK   0x0004 /* IN2R_ENA */

Definition at line 2153 of file registers.h.

#define ARIZONA_IN2R_ENA_SHIFT   2 /* IN2R_ENA */

Definition at line 2154 of file registers.h.

#define ARIZONA_IN2R_ENA_WIDTH   1 /* IN2R_ENA */

Definition at line 2155 of file registers.h.

#define ARIZONA_IN2R_MUTE   0x0100 /* IN2R_MUTE */

Definition at line 2301 of file registers.h.

#define ARIZONA_IN2R_MUTE_MASK   0x0100 /* IN2R_MUTE */

Definition at line 2302 of file registers.h.

#define ARIZONA_IN2R_MUTE_SHIFT   8 /* IN2R_MUTE */

Definition at line 2303 of file registers.h.

#define ARIZONA_IN2R_MUTE_WIDTH   1 /* IN2R_MUTE */

Definition at line 2304 of file registers.h.

#define ARIZONA_IN2R_PGA_VOL_MASK   0x00FE /* IN2R_PGA_VOL - [7:1] */

Definition at line 2290 of file registers.h.

#define ARIZONA_IN2R_PGA_VOL_SHIFT   1 /* IN2R_PGA_VOL - [7:1] */

Definition at line 2291 of file registers.h.

#define ARIZONA_IN2R_PGA_VOL_WIDTH   7 /* IN2R_PGA_VOL - [7:1] */

Definition at line 2292 of file registers.h.

#define ARIZONA_IN3_DMIC_SUP_MASK   0x1800 /* IN3_DMIC_SUP - [12:11] */

Definition at line 2322 of file registers.h.

#define ARIZONA_IN3_DMIC_SUP_SHIFT   11 /* IN3_DMIC_SUP - [12:11] */

Definition at line 2323 of file registers.h.

#define ARIZONA_IN3_DMIC_SUP_WIDTH   2 /* IN3_DMIC_SUP - [12:11] */

Definition at line 2324 of file registers.h.

#define ARIZONA_IN3_DMICL_DLY_MASK   0x003F /* IN3_DMICL_DLY - [5:0] */

Definition at line 2350 of file registers.h.

#define ARIZONA_IN3_DMICL_DLY_SHIFT   0 /* IN3_DMICL_DLY - [5:0] */

Definition at line 2351 of file registers.h.

#define ARIZONA_IN3_DMICL_DLY_WIDTH   6 /* IN3_DMICL_DLY - [5:0] */

Definition at line 2352 of file registers.h.

#define ARIZONA_IN3_DMICR_DLY_MASK   0x003F /* IN3_DMICR_DLY - [5:0] */

Definition at line 2379 of file registers.h.

#define ARIZONA_IN3_DMICR_DLY_SHIFT   0 /* IN3_DMICR_DLY - [5:0] */

Definition at line 2380 of file registers.h.

#define ARIZONA_IN3_DMICR_DLY_WIDTH   6 /* IN3_DMICR_DLY - [5:0] */

Definition at line 2381 of file registers.h.

#define ARIZONA_IN3_MODE_MASK   0x0600 /* IN3_MODE - [10:9] */

Definition at line 2325 of file registers.h.

#define ARIZONA_IN3_MODE_SHIFT   9 /* IN3_MODE - [10:9] */

Definition at line 2326 of file registers.h.

#define ARIZONA_IN3_MODE_WIDTH   2 /* IN3_MODE - [10:9] */

Definition at line 2327 of file registers.h.

#define ARIZONA_IN3_OSR_MASK   0x6000 /* IN3_OSR - [14:13] */

Definition at line 2319 of file registers.h.

#define ARIZONA_IN3_OSR_SHIFT   13 /* IN3_OSR - [14:13] */

Definition at line 2320 of file registers.h.

#define ARIZONA_IN3_OSR_WIDTH   2 /* IN3_OSR - [14:13] */

Definition at line 2321 of file registers.h.

#define ARIZONA_IN3L_CONTROL   0x320

Definition at line 142 of file registers.h.

#define ARIZONA_IN3L_DIG_VOL_MASK   0x00FF /* IN3L_DIG_VOL - [7:0] */

Definition at line 2343 of file registers.h.

#define ARIZONA_IN3L_DIG_VOL_SHIFT   0 /* IN3L_DIG_VOL - [7:0] */

Definition at line 2344 of file registers.h.

#define ARIZONA_IN3L_DIG_VOL_WIDTH   8 /* IN3L_DIG_VOL - [7:0] */

Definition at line 2345 of file registers.h.

#define ARIZONA_IN3L_ENA   0x0020 /* IN3L_ENA */

Definition at line 2140 of file registers.h.

#define ARIZONA_IN3L_ENA_MASK   0x0020 /* IN3L_ENA */

Definition at line 2141 of file registers.h.

#define ARIZONA_IN3L_ENA_SHIFT   5 /* IN3L_ENA */

Definition at line 2142 of file registers.h.

#define ARIZONA_IN3L_ENA_WIDTH   1 /* IN3L_ENA */

Definition at line 2143 of file registers.h.

#define ARIZONA_IN3L_MUTE   0x0100 /* IN3L_MUTE */

Definition at line 2339 of file registers.h.

#define ARIZONA_IN3L_MUTE_MASK   0x0100 /* IN3L_MUTE */

Definition at line 2340 of file registers.h.

#define ARIZONA_IN3L_MUTE_SHIFT   8 /* IN3L_MUTE */

Definition at line 2341 of file registers.h.

#define ARIZONA_IN3L_MUTE_WIDTH   1 /* IN3L_MUTE */

Definition at line 2342 of file registers.h.

#define ARIZONA_IN3L_PGA_VOL_MASK   0x00FE /* IN3L_PGA_VOL - [7:1] */

Definition at line 2328 of file registers.h.

#define ARIZONA_IN3L_PGA_VOL_SHIFT   1 /* IN3L_PGA_VOL - [7:1] */

Definition at line 2329 of file registers.h.

#define ARIZONA_IN3L_PGA_VOL_WIDTH   7 /* IN3L_PGA_VOL - [7:1] */

Definition at line 2330 of file registers.h.

#define ARIZONA_IN3R_CONTROL   0x324

Definition at line 145 of file registers.h.

#define ARIZONA_IN3R_DIG_VOL_MASK   0x00FF /* IN3R_DIG_VOL - [7:0] */

Definition at line 2372 of file registers.h.

#define ARIZONA_IN3R_DIG_VOL_SHIFT   0 /* IN3R_DIG_VOL - [7:0] */

Definition at line 2373 of file registers.h.

#define ARIZONA_IN3R_DIG_VOL_WIDTH   8 /* IN3R_DIG_VOL - [7:0] */

Definition at line 2374 of file registers.h.

#define ARIZONA_IN3R_ENA   0x0010 /* IN3R_ENA */

Definition at line 2144 of file registers.h.

#define ARIZONA_IN3R_ENA_MASK   0x0010 /* IN3R_ENA */

Definition at line 2145 of file registers.h.

#define ARIZONA_IN3R_ENA_SHIFT   4 /* IN3R_ENA */

Definition at line 2146 of file registers.h.

#define ARIZONA_IN3R_ENA_WIDTH   1 /* IN3R_ENA */

Definition at line 2147 of file registers.h.

#define ARIZONA_IN3R_MUTE   0x0100 /* IN3R_MUTE */

Definition at line 2368 of file registers.h.

#define ARIZONA_IN3R_MUTE_MASK   0x0100 /* IN3R_MUTE */

Definition at line 2369 of file registers.h.

#define ARIZONA_IN3R_MUTE_SHIFT   8 /* IN3R_MUTE */

Definition at line 2370 of file registers.h.

#define ARIZONA_IN3R_MUTE_WIDTH   1 /* IN3R_MUTE */

Definition at line 2371 of file registers.h.

#define ARIZONA_IN3R_PGA_VOL_MASK   0x00FE /* IN3R_PGA_VOL - [7:1] */

Definition at line 2357 of file registers.h.

#define ARIZONA_IN3R_PGA_VOL_SHIFT   1 /* IN3R_PGA_VOL - [7:1] */

Definition at line 2358 of file registers.h.

#define ARIZONA_IN3R_PGA_VOL_WIDTH   7 /* IN3R_PGA_VOL - [7:1] */

Definition at line 2359 of file registers.h.

#define ARIZONA_IN4_DMIC_SUP_MASK   0x1800 /* IN4_DMIC_SUP - [12:11] */

Definition at line 2389 of file registers.h.

#define ARIZONA_IN4_DMIC_SUP_SHIFT   11 /* IN4_DMIC_SUP - [12:11] */

Definition at line 2390 of file registers.h.

#define ARIZONA_IN4_DMIC_SUP_WIDTH   2 /* IN4_DMIC_SUP - [12:11] */

Definition at line 2391 of file registers.h.

#define ARIZONA_IN4_OSR_MASK   0x6000 /* IN4_OSR - [14:13] */

Definition at line 2386 of file registers.h.

#define ARIZONA_IN4_OSR_SHIFT   13 /* IN4_OSR - [14:13] */

Definition at line 2387 of file registers.h.

#define ARIZONA_IN4_OSR_WIDTH   2 /* IN4_OSR - [14:13] */

Definition at line 2388 of file registers.h.

#define ARIZONA_IN4L_CONTROL   0x328

Definition at line 148 of file registers.h.

#define ARIZONA_IN4L_DIG_VOL_MASK   0x00FF /* IN4L_DIG_VOL - [7:0] */

Definition at line 2404 of file registers.h.

#define ARIZONA_IN4L_DIG_VOL_SHIFT   0 /* IN4L_DIG_VOL - [7:0] */

Definition at line 2405 of file registers.h.

#define ARIZONA_IN4L_DIG_VOL_WIDTH   8 /* IN4L_DIG_VOL - [7:0] */

Definition at line 2406 of file registers.h.

#define ARIZONA_IN4L_DMIC_DLY_MASK   0x003F /* IN4L_DMIC_DLY - [5:0] */

Definition at line 2411 of file registers.h.

#define ARIZONA_IN4L_DMIC_DLY_SHIFT   0 /* IN4L_DMIC_DLY - [5:0] */

Definition at line 2412 of file registers.h.

#define ARIZONA_IN4L_DMIC_DLY_WIDTH   6 /* IN4L_DMIC_DLY - [5:0] */

Definition at line 2413 of file registers.h.

#define ARIZONA_IN4L_ENA   0x0080 /* IN4L_ENA */

Definition at line 2132 of file registers.h.

#define ARIZONA_IN4L_ENA_MASK   0x0080 /* IN4L_ENA */

Definition at line 2133 of file registers.h.

#define ARIZONA_IN4L_ENA_SHIFT   7 /* IN4L_ENA */

Definition at line 2134 of file registers.h.

#define ARIZONA_IN4L_ENA_WIDTH   1 /* IN4L_ENA */

Definition at line 2135 of file registers.h.

#define ARIZONA_IN4L_MUTE   0x0100 /* IN4L_MUTE */

Definition at line 2400 of file registers.h.

#define ARIZONA_IN4L_MUTE_MASK   0x0100 /* IN4L_MUTE */

Definition at line 2401 of file registers.h.

#define ARIZONA_IN4L_MUTE_SHIFT   8 /* IN4L_MUTE */

Definition at line 2402 of file registers.h.

#define ARIZONA_IN4L_MUTE_WIDTH   1 /* IN4L_MUTE */

Definition at line 2403 of file registers.h.

#define ARIZONA_IN4R_DIG_VOL_MASK   0x00FF /* IN4R_DIG_VOL - [7:0] */

Definition at line 2426 of file registers.h.

#define ARIZONA_IN4R_DIG_VOL_SHIFT   0 /* IN4R_DIG_VOL - [7:0] */

Definition at line 2427 of file registers.h.

#define ARIZONA_IN4R_DIG_VOL_WIDTH   8 /* IN4R_DIG_VOL - [7:0] */

Definition at line 2428 of file registers.h.

#define ARIZONA_IN4R_DMIC_DLY_MASK   0x003F /* IN4R_DMIC_DLY - [5:0] */

Definition at line 2433 of file registers.h.

#define ARIZONA_IN4R_DMIC_DLY_SHIFT   0 /* IN4R_DMIC_DLY - [5:0] */

Definition at line 2434 of file registers.h.

#define ARIZONA_IN4R_DMIC_DLY_WIDTH   6 /* IN4R_DMIC_DLY - [5:0] */

Definition at line 2435 of file registers.h.

#define ARIZONA_IN4R_ENA   0x0040 /* IN4R_ENA */

Definition at line 2136 of file registers.h.

#define ARIZONA_IN4R_ENA_MASK   0x0040 /* IN4R_ENA */

Definition at line 2137 of file registers.h.

#define ARIZONA_IN4R_ENA_SHIFT   6 /* IN4R_ENA */

Definition at line 2138 of file registers.h.

#define ARIZONA_IN4R_ENA_WIDTH   1 /* IN4R_ENA */

Definition at line 2139 of file registers.h.

#define ARIZONA_IN4R_MUTE   0x0100 /* IN4R_MUTE */

Definition at line 2422 of file registers.h.

#define ARIZONA_IN4R_MUTE_MASK   0x0100 /* IN4R_MUTE */

Definition at line 2423 of file registers.h.

#define ARIZONA_IN4R_MUTE_SHIFT   8 /* IN4R_MUTE */

Definition at line 2424 of file registers.h.

#define ARIZONA_IN4R_MUTE_WIDTH   1 /* IN4R_MUTE */

Definition at line 2425 of file registers.h.

#define ARIZONA_IN_RATE_MASK   0x7800 /* IN_RATE - [14:11] */

Definition at line 2168 of file registers.h.

#define ARIZONA_IN_RATE_SHIFT   11 /* IN_RATE - [14:11] */

Definition at line 2169 of file registers.h.

#define ARIZONA_IN_RATE_WIDTH   4 /* IN_RATE - [14:11] */

Definition at line 2170 of file registers.h.

#define ARIZONA_IN_VD_RAMP_MASK   0x0070 /* IN_VD_RAMP - [6:4] */

Definition at line 2175 of file registers.h.

#define ARIZONA_IN_VD_RAMP_SHIFT   4 /* IN_VD_RAMP - [6:4] */

Definition at line 2176 of file registers.h.

#define ARIZONA_IN_VD_RAMP_WIDTH   3 /* IN_VD_RAMP - [6:4] */

Definition at line 2177 of file registers.h.

#define ARIZONA_IN_VI_RAMP_MASK   0x0007 /* IN_VI_RAMP - [2:0] */

Definition at line 2178 of file registers.h.

#define ARIZONA_IN_VI_RAMP_SHIFT   0 /* IN_VI_RAMP - [2:0] */

Definition at line 2179 of file registers.h.

#define ARIZONA_IN_VI_RAMP_WIDTH   3 /* IN_VI_RAMP - [2:0] */

Definition at line 2180 of file registers.h.

#define ARIZONA_IN_VU   0x0200 /* IN_VU */

Definition at line 2418 of file registers.h.

#define ARIZONA_IN_VU   0x0200 /* IN_VU */

Definition at line 2418 of file registers.h.

#define ARIZONA_IN_VU   0x0200 /* IN_VU */

Definition at line 2418 of file registers.h.

#define ARIZONA_IN_VU   0x0200 /* IN_VU */

Definition at line 2418 of file registers.h.

#define ARIZONA_IN_VU   0x0200 /* IN_VU */

Definition at line 2418 of file registers.h.

#define ARIZONA_IN_VU   0x0200 /* IN_VU */

Definition at line 2418 of file registers.h.

#define ARIZONA_IN_VU   0x0200 /* IN_VU */

Definition at line 2418 of file registers.h.

#define ARIZONA_IN_VU   0x0200 /* IN_VU */

Definition at line 2418 of file registers.h.

#define ARIZONA_IN_VU_MASK   0x0200 /* IN_VU */

Definition at line 2419 of file registers.h.

#define ARIZONA_IN_VU_MASK   0x0200 /* IN_VU */

Definition at line 2419 of file registers.h.

#define ARIZONA_IN_VU_MASK   0x0200 /* IN_VU */

Definition at line 2419 of file registers.h.

#define ARIZONA_IN_VU_MASK   0x0200 /* IN_VU */

Definition at line 2419 of file registers.h.

#define ARIZONA_IN_VU_MASK   0x0200 /* IN_VU */

Definition at line 2419 of file registers.h.

#define ARIZONA_IN_VU_MASK   0x0200 /* IN_VU */

Definition at line 2419 of file registers.h.

#define ARIZONA_IN_VU_MASK   0x0200 /* IN_VU */

Definition at line 2419 of file registers.h.

#define ARIZONA_IN_VU_MASK   0x0200 /* IN_VU */

Definition at line 2419 of file registers.h.

#define ARIZONA_IN_VU_SHIFT   9 /* IN_VU */

Definition at line 2420 of file registers.h.

#define ARIZONA_IN_VU_SHIFT   9 /* IN_VU */

Definition at line 2420 of file registers.h.

#define ARIZONA_IN_VU_SHIFT   9 /* IN_VU */

Definition at line 2420 of file registers.h.

#define ARIZONA_IN_VU_SHIFT   9 /* IN_VU */

Definition at line 2420 of file registers.h.

#define ARIZONA_IN_VU_SHIFT   9 /* IN_VU */

Definition at line 2420 of file registers.h.

#define ARIZONA_IN_VU_SHIFT   9 /* IN_VU */

Definition at line 2420 of file registers.h.

#define ARIZONA_IN_VU_SHIFT   9 /* IN_VU */

Definition at line 2420 of file registers.h.

#define ARIZONA_IN_VU_SHIFT   9 /* IN_VU */

Definition at line 2420 of file registers.h.

#define ARIZONA_IN_VU_WIDTH   1 /* IN_VU */

Definition at line 2421 of file registers.h.

#define ARIZONA_IN_VU_WIDTH   1 /* IN_VU */

Definition at line 2421 of file registers.h.

#define ARIZONA_IN_VU_WIDTH   1 /* IN_VU */

Definition at line 2421 of file registers.h.

#define ARIZONA_IN_VU_WIDTH   1 /* IN_VU */

Definition at line 2421 of file registers.h.

#define ARIZONA_IN_VU_WIDTH   1 /* IN_VU */

Definition at line 2421 of file registers.h.

#define ARIZONA_IN_VU_WIDTH   1 /* IN_VU */

Definition at line 2421 of file registers.h.

#define ARIZONA_IN_VU_WIDTH   1 /* IN_VU */

Definition at line 2421 of file registers.h.

#define ARIZONA_IN_VU_WIDTH   1 /* IN_VU */

Definition at line 2421 of file registers.h.

#define ARIZONA_INPUT_ENABLES   0x300

Definition at line 126 of file registers.h.

#define ARIZONA_INPUT_ENABLES_STATUS   0x301

Definition at line 127 of file registers.h.

#define ARIZONA_INPUT_RATE   0x308

Definition at line 128 of file registers.h.

#define ARIZONA_INPUT_VOLUME_RAMP   0x309

Definition at line 129 of file registers.h.

#define ARIZONA_INTERRUPT_CONTROL   0xD0F

Definition at line 830 of file registers.h.

#define ARIZONA_INTERRUPT_RAW_STATUS_2   0xD20

Definition at line 842 of file registers.h.

#define ARIZONA_INTERRUPT_RAW_STATUS_3   0xD21

Definition at line 843 of file registers.h.

#define ARIZONA_INTERRUPT_RAW_STATUS_4   0xD22

Definition at line 844 of file registers.h.

#define ARIZONA_INTERRUPT_RAW_STATUS_5   0xD23

Definition at line 845 of file registers.h.

#define ARIZONA_INTERRUPT_RAW_STATUS_6   0xD24

Definition at line 846 of file registers.h.

#define ARIZONA_INTERRUPT_RAW_STATUS_7   0xD25

Definition at line 847 of file registers.h.

#define ARIZONA_INTERRUPT_RAW_STATUS_8   0xD26

Definition at line 848 of file registers.h.

#define ARIZONA_INTERRUPT_STATUS_1   0xD00

Definition at line 820 of file registers.h.

#define ARIZONA_INTERRUPT_STATUS_1_MASK   0xD08

Definition at line 825 of file registers.h.

#define ARIZONA_INTERRUPT_STATUS_2   0xD01

Definition at line 821 of file registers.h.

#define ARIZONA_INTERRUPT_STATUS_2_MASK   0xD09

Definition at line 826 of file registers.h.

#define ARIZONA_INTERRUPT_STATUS_3   0xD02

Definition at line 822 of file registers.h.

#define ARIZONA_INTERRUPT_STATUS_3_MASK   0xD0A

Definition at line 827 of file registers.h.

#define ARIZONA_INTERRUPT_STATUS_4   0xD03

Definition at line 823 of file registers.h.

#define ARIZONA_INTERRUPT_STATUS_4_MASK   0xD0B

Definition at line 828 of file registers.h.

#define ARIZONA_INTERRUPT_STATUS_5   0xD04

Definition at line 824 of file registers.h.

#define ARIZONA_INTERRUPT_STATUS_5_MASK   0xD0C

Definition at line 829 of file registers.h.

#define ARIZONA_IRQ1_STS   0x0001 /* IRQ1_STS */

Definition at line 5205 of file registers.h.

#define ARIZONA_IRQ1_STS_MASK   0x0001 /* IRQ1_STS */

Definition at line 5206 of file registers.h.

#define ARIZONA_IRQ1_STS_SHIFT   0 /* IRQ1_STS */

Definition at line 5207 of file registers.h.

#define ARIZONA_IRQ1_STS_WIDTH   1 /* IRQ1_STS */

Definition at line 5208 of file registers.h.

#define ARIZONA_IRQ2_CONTROL   0xD1F

Definition at line 841 of file registers.h.

#define ARIZONA_IRQ2_STATUS_1   0xD10

Definition at line 831 of file registers.h.

#define ARIZONA_IRQ2_STATUS_1_MASK   0xD18

Definition at line 836 of file registers.h.

#define ARIZONA_IRQ2_STATUS_2   0xD11

Definition at line 832 of file registers.h.

#define ARIZONA_IRQ2_STATUS_2_MASK   0xD19

Definition at line 837 of file registers.h.

#define ARIZONA_IRQ2_STATUS_3   0xD12

Definition at line 833 of file registers.h.

#define ARIZONA_IRQ2_STATUS_3_MASK   0xD1A

Definition at line 838 of file registers.h.

#define ARIZONA_IRQ2_STATUS_4   0xD13

Definition at line 834 of file registers.h.

#define ARIZONA_IRQ2_STATUS_4_MASK   0xD1B

Definition at line 839 of file registers.h.

#define ARIZONA_IRQ2_STATUS_5   0xD14

Definition at line 835 of file registers.h.

#define ARIZONA_IRQ2_STATUS_5_MASK   0xD1C

Definition at line 840 of file registers.h.

#define ARIZONA_IRQ2_STS   0x0002 /* IRQ2_STS */

Definition at line 5201 of file registers.h.

#define ARIZONA_IRQ2_STS_MASK   0x0002 /* IRQ2_STS */

Definition at line 5202 of file registers.h.

#define ARIZONA_IRQ2_STS_SHIFT   1 /* IRQ2_STS */

Definition at line 5203 of file registers.h.

#define ARIZONA_IRQ2_STS_WIDTH   1 /* IRQ2_STS */

Definition at line 5204 of file registers.h.

#define ARIZONA_IRQ_CTRL_1   0xC0F

Definition at line 800 of file registers.h.

#define ARIZONA_IRQ_OP_CFG   0x0200 /* IRQ_OP_CFG */

Definition at line 4033 of file registers.h.

#define ARIZONA_IRQ_OP_CFG_MASK   0x0200 /* IRQ_OP_CFG */

Definition at line 4034 of file registers.h.

#define ARIZONA_IRQ_OP_CFG_SHIFT   9 /* IRQ_OP_CFG */

Definition at line 4035 of file registers.h.

#define ARIZONA_IRQ_OP_CFG_WIDTH   1 /* IRQ_OP_CFG */

Definition at line 4036 of file registers.h.

#define ARIZONA_IRQ_PIN_STATUS   0xD40

Definition at line 849 of file registers.h.

#define ARIZONA_IRQ_POL   0x0400 /* IRQ_POL */

Definition at line 4029 of file registers.h.

#define ARIZONA_IRQ_POL_MASK   0x0400 /* IRQ_POL */

Definition at line 4030 of file registers.h.

#define ARIZONA_IRQ_POL_SHIFT   10 /* IRQ_POL */

Definition at line 4031 of file registers.h.

#define ARIZONA_IRQ_POL_WIDTH   1 /* IRQ_POL */

Definition at line 4032 of file registers.h.

#define ARIZONA_ISOLATE_DCVDD1   0x0001 /* ISOLATE_DCVDD1 */

Definition at line 2112 of file registers.h.

#define ARIZONA_ISOLATE_DCVDD1_MASK   0x0001 /* ISOLATE_DCVDD1 */

Definition at line 2113 of file registers.h.

#define ARIZONA_ISOLATE_DCVDD1_SHIFT   0 /* ISOLATE_DCVDD1 */

Definition at line 2114 of file registers.h.

#define ARIZONA_ISOLATE_DCVDD1_WIDTH   1 /* ISOLATE_DCVDD1 */

Definition at line 2115 of file registers.h.

#define ARIZONA_ISOLATION_CONTROL   0x2CB

Definition at line 124 of file registers.h.

#define ARIZONA_ISRC1_CFG_ERR_EINT1   0x0080 /* ISRC1_CFG_ERR_EINT1 */

Definition at line 4352 of file registers.h.

#define ARIZONA_ISRC1_CFG_ERR_EINT1_MASK   0x0080 /* ISRC1_CFG_ERR_EINT1 */

Definition at line 4353 of file registers.h.

#define ARIZONA_ISRC1_CFG_ERR_EINT1_SHIFT   7 /* ISRC1_CFG_ERR_EINT1 */

Definition at line 4354 of file registers.h.

#define ARIZONA_ISRC1_CFG_ERR_EINT1_WIDTH   1 /* ISRC1_CFG_ERR_EINT1 */

Definition at line 4355 of file registers.h.

#define ARIZONA_ISRC1_CFG_ERR_EINT2   0x0080 /* ISRC1_CFG_ERR_EINT2 */

Definition at line 4696 of file registers.h.

#define ARIZONA_ISRC1_CFG_ERR_EINT2_MASK   0x0080 /* ISRC1_CFG_ERR_EINT2 */

Definition at line 4697 of file registers.h.

#define ARIZONA_ISRC1_CFG_ERR_EINT2_SHIFT   7 /* ISRC1_CFG_ERR_EINT2 */

Definition at line 4698 of file registers.h.

#define ARIZONA_ISRC1_CFG_ERR_EINT2_WIDTH   1 /* ISRC1_CFG_ERR_EINT2 */

Definition at line 4699 of file registers.h.

#define ARIZONA_ISRC1_CFG_ERR_STS   0x0080 /* ISRC1_CFG_ERR_STS */

Definition at line 5021 of file registers.h.

#define ARIZONA_ISRC1_CFG_ERR_STS_MASK   0x0080 /* ISRC1_CFG_ERR_STS */

Definition at line 5022 of file registers.h.

#define ARIZONA_ISRC1_CFG_ERR_STS_SHIFT   7 /* ISRC1_CFG_ERR_STS */

Definition at line 5023 of file registers.h.

#define ARIZONA_ISRC1_CFG_ERR_STS_WIDTH   1 /* ISRC1_CFG_ERR_STS */

Definition at line 5024 of file registers.h.

#define ARIZONA_ISRC1_CLK_SEL_MASK   0x0700 /* ISRC1_CLK_SEL - [10:8] */

Definition at line 6376 of file registers.h.

#define ARIZONA_ISRC1_CLK_SEL_SHIFT   8 /* ISRC1_CLK_SEL - [10:8] */

Definition at line 6377 of file registers.h.

#define ARIZONA_ISRC1_CLK_SEL_WIDTH   3 /* ISRC1_CLK_SEL - [10:8] */

Definition at line 6378 of file registers.h.

#define ARIZONA_ISRC1_DEC0_ENA   0x0200 /* ISRC1_DEC0_ENA */

Definition at line 6406 of file registers.h.

#define ARIZONA_ISRC1_DEC0_ENA_MASK   0x0200 /* ISRC1_DEC0_ENA */

Definition at line 6407 of file registers.h.

#define ARIZONA_ISRC1_DEC0_ENA_SHIFT   9 /* ISRC1_DEC0_ENA */

Definition at line 6408 of file registers.h.

#define ARIZONA_ISRC1_DEC0_ENA_WIDTH   1 /* ISRC1_DEC0_ENA */

Definition at line 6409 of file registers.h.

#define ARIZONA_ISRC1_DEC1_ENA   0x0100 /* ISRC1_DEC1_ENA */

Definition at line 6410 of file registers.h.

#define ARIZONA_ISRC1_DEC1_ENA_MASK   0x0100 /* ISRC1_DEC1_ENA */

Definition at line 6411 of file registers.h.

#define ARIZONA_ISRC1_DEC1_ENA_SHIFT   8 /* ISRC1_DEC1_ENA */

Definition at line 6412 of file registers.h.

#define ARIZONA_ISRC1_DEC1_ENA_WIDTH   1 /* ISRC1_DEC1_ENA */

Definition at line 6413 of file registers.h.

#define ARIZONA_ISRC1_DEC2_ENA   0x0080 /* ISRC1_DEC2_ENA */

Definition at line 6414 of file registers.h.

#define ARIZONA_ISRC1_DEC2_ENA_MASK   0x0080 /* ISRC1_DEC2_ENA */

Definition at line 6415 of file registers.h.

#define ARIZONA_ISRC1_DEC2_ENA_SHIFT   7 /* ISRC1_DEC2_ENA */

Definition at line 6416 of file registers.h.

#define ARIZONA_ISRC1_DEC2_ENA_WIDTH   1 /* ISRC1_DEC2_ENA */

Definition at line 6417 of file registers.h.

#define ARIZONA_ISRC1_DEC3_ENA   0x0040 /* ISRC1_DEC3_ENA */

Definition at line 6418 of file registers.h.

#define ARIZONA_ISRC1_DEC3_ENA_MASK   0x0040 /* ISRC1_DEC3_ENA */

Definition at line 6419 of file registers.h.

#define ARIZONA_ISRC1_DEC3_ENA_SHIFT   6 /* ISRC1_DEC3_ENA */

Definition at line 6420 of file registers.h.

#define ARIZONA_ISRC1_DEC3_ENA_WIDTH   1 /* ISRC1_DEC3_ENA */

Definition at line 6421 of file registers.h.

#define ARIZONA_ISRC1_FSH_MASK   0x7800 /* ISRC1_FSH - [14:11] */

Definition at line 6373 of file registers.h.

#define ARIZONA_ISRC1_FSH_SHIFT   11 /* ISRC1_FSH - [14:11] */

Definition at line 6374 of file registers.h.

#define ARIZONA_ISRC1_FSH_WIDTH   4 /* ISRC1_FSH - [14:11] */

Definition at line 6375 of file registers.h.

#define ARIZONA_ISRC1_FSL_MASK   0x7800 /* ISRC1_FSL - [14:11] */

Definition at line 6383 of file registers.h.

#define ARIZONA_ISRC1_FSL_SHIFT   11 /* ISRC1_FSL - [14:11] */

Definition at line 6384 of file registers.h.

#define ARIZONA_ISRC1_FSL_WIDTH   4 /* ISRC1_FSL - [14:11] */

Definition at line 6385 of file registers.h.

#define ARIZONA_ISRC1_INT0_ENA   0x8000 /* ISRC1_INT0_ENA */

Definition at line 6390 of file registers.h.

#define ARIZONA_ISRC1_INT0_ENA_MASK   0x8000 /* ISRC1_INT0_ENA */

Definition at line 6391 of file registers.h.

#define ARIZONA_ISRC1_INT0_ENA_SHIFT   15 /* ISRC1_INT0_ENA */

Definition at line 6392 of file registers.h.

#define ARIZONA_ISRC1_INT0_ENA_WIDTH   1 /* ISRC1_INT0_ENA */

Definition at line 6393 of file registers.h.

#define ARIZONA_ISRC1_INT1_ENA   0x4000 /* ISRC1_INT1_ENA */

Definition at line 6394 of file registers.h.

#define ARIZONA_ISRC1_INT1_ENA_MASK   0x4000 /* ISRC1_INT1_ENA */

Definition at line 6395 of file registers.h.

#define ARIZONA_ISRC1_INT1_ENA_SHIFT   14 /* ISRC1_INT1_ENA */

Definition at line 6396 of file registers.h.

#define ARIZONA_ISRC1_INT1_ENA_WIDTH   1 /* ISRC1_INT1_ENA */

Definition at line 6397 of file registers.h.

#define ARIZONA_ISRC1_INT2_ENA   0x2000 /* ISRC1_INT2_ENA */

Definition at line 6398 of file registers.h.

#define ARIZONA_ISRC1_INT2_ENA_MASK   0x2000 /* ISRC1_INT2_ENA */

Definition at line 6399 of file registers.h.

#define ARIZONA_ISRC1_INT2_ENA_SHIFT   13 /* ISRC1_INT2_ENA */

Definition at line 6400 of file registers.h.

#define ARIZONA_ISRC1_INT2_ENA_WIDTH   1 /* ISRC1_INT2_ENA */

Definition at line 6401 of file registers.h.

#define ARIZONA_ISRC1_INT3_ENA   0x1000 /* ISRC1_INT3_ENA */

Definition at line 6402 of file registers.h.

#define ARIZONA_ISRC1_INT3_ENA_MASK   0x1000 /* ISRC1_INT3_ENA */

Definition at line 6403 of file registers.h.

#define ARIZONA_ISRC1_INT3_ENA_SHIFT   12 /* ISRC1_INT3_ENA */

Definition at line 6404 of file registers.h.

#define ARIZONA_ISRC1_INT3_ENA_WIDTH   1 /* ISRC1_INT3_ENA */

Definition at line 6405 of file registers.h.

#define ARIZONA_ISRC1_NOTCH_ENA   0x0001 /* ISRC1_NOTCH_ENA */

Definition at line 6422 of file registers.h.

#define ARIZONA_ISRC1_NOTCH_ENA_MASK   0x0001 /* ISRC1_NOTCH_ENA */

Definition at line 6423 of file registers.h.

#define ARIZONA_ISRC1_NOTCH_ENA_SHIFT   0 /* ISRC1_NOTCH_ENA */

Definition at line 6424 of file registers.h.

#define ARIZONA_ISRC1_NOTCH_ENA_WIDTH   1 /* ISRC1_NOTCH_ENA */

Definition at line 6425 of file registers.h.

#define ARIZONA_ISRC1_OVERCLOCKED_STS   0x0001 /* ISRC1_OVERCLOCKED_STS */

Definition at line 5149 of file registers.h.

#define ARIZONA_ISRC1_OVERCLOCKED_STS_MASK   0x0001 /* ISRC1_OVERCLOCKED_STS */

Definition at line 5150 of file registers.h.

#define ARIZONA_ISRC1_OVERCLOCKED_STS_SHIFT   0 /* ISRC1_OVERCLOCKED_STS */

Definition at line 5151 of file registers.h.

#define ARIZONA_ISRC1_OVERCLOCKED_STS_WIDTH   1 /* ISRC1_OVERCLOCKED_STS */

Definition at line 5152 of file registers.h.

#define ARIZONA_ISRC1_UNDERCLOCKED_STS   0x0020 /* ISRC1_UNDERCLOCKED_STS */

Definition at line 5173 of file registers.h.

#define ARIZONA_ISRC1_UNDERCLOCKED_STS_MASK   0x0020 /* ISRC1_UNDERCLOCKED_STS */

Definition at line 5174 of file registers.h.

#define ARIZONA_ISRC1_UNDERCLOCKED_STS_SHIFT   5 /* ISRC1_UNDERCLOCKED_STS */

Definition at line 5175 of file registers.h.

#define ARIZONA_ISRC1_UNDERCLOCKED_STS_WIDTH   1 /* ISRC1_UNDERCLOCKED_STS */

Definition at line 5176 of file registers.h.

#define ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE   0xB00

Definition at line 765 of file registers.h.

#define ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE   0xB08

Definition at line 766 of file registers.h.

#define ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE   0xB10

Definition at line 767 of file registers.h.

#define ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE   0xB18

Definition at line 768 of file registers.h.

#define ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE   0xB20

Definition at line 769 of file registers.h.

#define ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE   0xB28

Definition at line 770 of file registers.h.

#define ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE   0xB30

Definition at line 777 of file registers.h.

#define ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE   0xB30

Definition at line 777 of file registers.h.

#define ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE   0xB38

Definition at line 778 of file registers.h.

#define ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE   0xB38

Definition at line 778 of file registers.h.

#define ARIZONA_ISRC2_CFG_ERR_EINT1   0x0040 /* ISRC2_CFG_ERR_EINT1 */

Definition at line 4356 of file registers.h.

#define ARIZONA_ISRC2_CFG_ERR_EINT1_MASK   0x0040 /* ISRC2_CFG_ERR_EINT1 */

Definition at line 4357 of file registers.h.

#define ARIZONA_ISRC2_CFG_ERR_EINT1_SHIFT   6 /* ISRC2_CFG_ERR_EINT1 */

Definition at line 4358 of file registers.h.

#define ARIZONA_ISRC2_CFG_ERR_EINT1_WIDTH   1 /* ISRC2_CFG_ERR_EINT1 */

Definition at line 4359 of file registers.h.

#define ARIZONA_ISRC2_CFG_ERR_EINT2   0x0040 /* ISRC2_CFG_ERR_EINT2 */

Definition at line 4700 of file registers.h.

#define ARIZONA_ISRC2_CFG_ERR_EINT2_MASK   0x0040 /* ISRC2_CFG_ERR_EINT2 */

Definition at line 4701 of file registers.h.

#define ARIZONA_ISRC2_CFG_ERR_EINT2_SHIFT   6 /* ISRC2_CFG_ERR_EINT2 */

Definition at line 4702 of file registers.h.

#define ARIZONA_ISRC2_CFG_ERR_EINT2_WIDTH   1 /* ISRC2_CFG_ERR_EINT2 */

Definition at line 4703 of file registers.h.

#define ARIZONA_ISRC2_CFG_ERR_STS   0x0040 /* ISRC2_CFG_ERR_STS */

Definition at line 5025 of file registers.h.

#define ARIZONA_ISRC2_CFG_ERR_STS_MASK   0x0040 /* ISRC2_CFG_ERR_STS */

Definition at line 5026 of file registers.h.

#define ARIZONA_ISRC2_CFG_ERR_STS_SHIFT   6 /* ISRC2_CFG_ERR_STS */

Definition at line 5027 of file registers.h.

#define ARIZONA_ISRC2_CFG_ERR_STS_WIDTH   1 /* ISRC2_CFG_ERR_STS */

Definition at line 5028 of file registers.h.

#define ARIZONA_ISRC2_CLK_SEL_MASK   0x0700 /* ISRC2_CLK_SEL - [10:8] */

Definition at line 6433 of file registers.h.

#define ARIZONA_ISRC2_CLK_SEL_SHIFT   8 /* ISRC2_CLK_SEL - [10:8] */

Definition at line 6434 of file registers.h.

#define ARIZONA_ISRC2_CLK_SEL_WIDTH   3 /* ISRC2_CLK_SEL - [10:8] */

Definition at line 6435 of file registers.h.

#define ARIZONA_ISRC2_DEC0_ENA   0x0200 /* ISRC2_DEC0_ENA */

Definition at line 6463 of file registers.h.

#define ARIZONA_ISRC2_DEC0_ENA_MASK   0x0200 /* ISRC2_DEC0_ENA */

Definition at line 6464 of file registers.h.

#define ARIZONA_ISRC2_DEC0_ENA_SHIFT   9 /* ISRC2_DEC0_ENA */

Definition at line 6465 of file registers.h.

#define ARIZONA_ISRC2_DEC0_ENA_WIDTH   1 /* ISRC2_DEC0_ENA */

Definition at line 6466 of file registers.h.

#define ARIZONA_ISRC2_DEC1_ENA   0x0100 /* ISRC2_DEC1_ENA */

Definition at line 6467 of file registers.h.

#define ARIZONA_ISRC2_DEC1_ENA_MASK   0x0100 /* ISRC2_DEC1_ENA */

Definition at line 6468 of file registers.h.

#define ARIZONA_ISRC2_DEC1_ENA_SHIFT   8 /* ISRC2_DEC1_ENA */

Definition at line 6469 of file registers.h.

#define ARIZONA_ISRC2_DEC1_ENA_WIDTH   1 /* ISRC2_DEC1_ENA */

Definition at line 6470 of file registers.h.

#define ARIZONA_ISRC2_DEC2_ENA   0x0080 /* ISRC2_DEC2_ENA */

Definition at line 6471 of file registers.h.

#define ARIZONA_ISRC2_DEC2_ENA_MASK   0x0080 /* ISRC2_DEC2_ENA */

Definition at line 6472 of file registers.h.

#define ARIZONA_ISRC2_DEC2_ENA_SHIFT   7 /* ISRC2_DEC2_ENA */

Definition at line 6473 of file registers.h.

#define ARIZONA_ISRC2_DEC2_ENA_WIDTH   1 /* ISRC2_DEC2_ENA */

Definition at line 6474 of file registers.h.

#define ARIZONA_ISRC2_DEC3_ENA   0x0040 /* ISRC2_DEC3_ENA */

Definition at line 6475 of file registers.h.

#define ARIZONA_ISRC2_DEC3_ENA_MASK   0x0040 /* ISRC2_DEC3_ENA */

Definition at line 6476 of file registers.h.

#define ARIZONA_ISRC2_DEC3_ENA_SHIFT   6 /* ISRC2_DEC3_ENA */

Definition at line 6477 of file registers.h.

#define ARIZONA_ISRC2_DEC3_ENA_WIDTH   1 /* ISRC2_DEC3_ENA */

Definition at line 6478 of file registers.h.

#define ARIZONA_ISRC2_FSH_MASK   0x7800 /* ISRC2_FSH - [14:11] */

Definition at line 6430 of file registers.h.

#define ARIZONA_ISRC2_FSH_SHIFT   11 /* ISRC2_FSH - [14:11] */

Definition at line 6431 of file registers.h.

#define ARIZONA_ISRC2_FSH_WIDTH   4 /* ISRC2_FSH - [14:11] */

Definition at line 6432 of file registers.h.

#define ARIZONA_ISRC2_FSL_MASK   0x7800 /* ISRC2_FSL - [14:11] */

Definition at line 6440 of file registers.h.

#define ARIZONA_ISRC2_FSL_SHIFT   11 /* ISRC2_FSL - [14:11] */

Definition at line 6441 of file registers.h.

#define ARIZONA_ISRC2_FSL_WIDTH   4 /* ISRC2_FSL - [14:11] */

Definition at line 6442 of file registers.h.

#define ARIZONA_ISRC2_INT0_ENA   0x8000 /* ISRC2_INT0_ENA */

Definition at line 6447 of file registers.h.

#define ARIZONA_ISRC2_INT0_ENA_MASK   0x8000 /* ISRC2_INT0_ENA */

Definition at line 6448 of file registers.h.

#define ARIZONA_ISRC2_INT0_ENA_SHIFT   15 /* ISRC2_INT0_ENA */

Definition at line 6449 of file registers.h.

#define ARIZONA_ISRC2_INT0_ENA_WIDTH   1 /* ISRC2_INT0_ENA */

Definition at line 6450 of file registers.h.

#define ARIZONA_ISRC2_INT1_ENA   0x4000 /* ISRC2_INT1_ENA */

Definition at line 6451 of file registers.h.

#define ARIZONA_ISRC2_INT1_ENA_MASK   0x4000 /* ISRC2_INT1_ENA */

Definition at line 6452 of file registers.h.

#define ARIZONA_ISRC2_INT1_ENA_SHIFT   14 /* ISRC2_INT1_ENA */

Definition at line 6453 of file registers.h.

#define ARIZONA_ISRC2_INT1_ENA_WIDTH   1 /* ISRC2_INT1_ENA */

Definition at line 6454 of file registers.h.

#define ARIZONA_ISRC2_INT2_ENA   0x2000 /* ISRC2_INT2_ENA */

Definition at line 6455 of file registers.h.

#define ARIZONA_ISRC2_INT2_ENA_MASK   0x2000 /* ISRC2_INT2_ENA */

Definition at line 6456 of file registers.h.

#define ARIZONA_ISRC2_INT2_ENA_SHIFT   13 /* ISRC2_INT2_ENA */

Definition at line 6457 of file registers.h.

#define ARIZONA_ISRC2_INT2_ENA_WIDTH   1 /* ISRC2_INT2_ENA */

Definition at line 6458 of file registers.h.

#define ARIZONA_ISRC2_INT3_ENA   0x1000 /* ISRC2_INT3_ENA */

Definition at line 6459 of file registers.h.

#define ARIZONA_ISRC2_INT3_ENA_MASK   0x1000 /* ISRC2_INT3_ENA */

Definition at line 6460 of file registers.h.

#define ARIZONA_ISRC2_INT3_ENA_SHIFT   12 /* ISRC2_INT3_ENA */

Definition at line 6461 of file registers.h.

#define ARIZONA_ISRC2_INT3_ENA_WIDTH   1 /* ISRC2_INT3_ENA */

Definition at line 6462 of file registers.h.

#define ARIZONA_ISRC2_NOTCH_ENA   0x0001 /* ISRC2_NOTCH_ENA */

Definition at line 6479 of file registers.h.

#define ARIZONA_ISRC2_NOTCH_ENA_MASK   0x0001 /* ISRC2_NOTCH_ENA */

Definition at line 6480 of file registers.h.

#define ARIZONA_ISRC2_NOTCH_ENA_SHIFT   0 /* ISRC2_NOTCH_ENA */

Definition at line 6481 of file registers.h.

#define ARIZONA_ISRC2_NOTCH_ENA_WIDTH   1 /* ISRC2_NOTCH_ENA */

Definition at line 6482 of file registers.h.

#define ARIZONA_ISRC2_OVERCLOCKED_STS   0x0002 /* ISRC2_OVERCLOCKED_STS */

Definition at line 5145 of file registers.h.

#define ARIZONA_ISRC2_OVERCLOCKED_STS_MASK   0x0002 /* ISRC2_OVERCLOCKED_STS */

Definition at line 5146 of file registers.h.

#define ARIZONA_ISRC2_OVERCLOCKED_STS_SHIFT   1 /* ISRC2_OVERCLOCKED_STS */

Definition at line 5147 of file registers.h.

#define ARIZONA_ISRC2_OVERCLOCKED_STS_WIDTH   1 /* ISRC2_OVERCLOCKED_STS */

Definition at line 5148 of file registers.h.

#define ARIZONA_ISRC2_UNDERCLOCKED_STS   0x0040 /* ISRC2_UNDERCLOCKED_STS */

Definition at line 5169 of file registers.h.

#define ARIZONA_ISRC2_UNDERCLOCKED_STS_MASK   0x0040 /* ISRC2_UNDERCLOCKED_STS */

Definition at line 5170 of file registers.h.

#define ARIZONA_ISRC2_UNDERCLOCKED_STS_SHIFT   6 /* ISRC2_UNDERCLOCKED_STS */

Definition at line 5171 of file registers.h.

#define ARIZONA_ISRC2_UNDERCLOCKED_STS_WIDTH   1 /* ISRC2_UNDERCLOCKED_STS */

Definition at line 5172 of file registers.h.

#define ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE   0xB40

Definition at line 779 of file registers.h.

#define ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE   0xB40

Definition at line 779 of file registers.h.

#define ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE   0xB48

Definition at line 780 of file registers.h.

#define ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE   0xB48

Definition at line 780 of file registers.h.

#define ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE   0xB50

Definition at line 781 of file registers.h.

#define ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE   0xB58

Definition at line 782 of file registers.h.

#define ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE   0xB60

Definition at line 783 of file registers.h.

#define ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE   0xB60

Definition at line 783 of file registers.h.

#define ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE   0xB68

Definition at line 784 of file registers.h.

#define ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE   0xB68

Definition at line 784 of file registers.h.

#define ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE   0xB70

Definition at line 785 of file registers.h.

#define ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE   0xB78

Definition at line 786 of file registers.h.

#define ARIZONA_ISRC3_CLK_SEL_MASK   0x0700 /* ISRC3_CLK_SEL - [10:8] */

Definition at line 6490 of file registers.h.

#define ARIZONA_ISRC3_CLK_SEL_SHIFT   8 /* ISRC3_CLK_SEL - [10:8] */

Definition at line 6491 of file registers.h.

#define ARIZONA_ISRC3_CLK_SEL_WIDTH   3 /* ISRC3_CLK_SEL - [10:8] */

Definition at line 6492 of file registers.h.

#define ARIZONA_ISRC3_DEC0_ENA   0x0200 /* ISRC3_DEC0_ENA */

Definition at line 6520 of file registers.h.

#define ARIZONA_ISRC3_DEC0_ENA_MASK   0x0200 /* ISRC3_DEC0_ENA */

Definition at line 6521 of file registers.h.

#define ARIZONA_ISRC3_DEC0_ENA_SHIFT   9 /* ISRC3_DEC0_ENA */

Definition at line 6522 of file registers.h.

#define ARIZONA_ISRC3_DEC0_ENA_WIDTH   1 /* ISRC3_DEC0_ENA */

Definition at line 6523 of file registers.h.

#define ARIZONA_ISRC3_DEC1_ENA   0x0100 /* ISRC3_DEC1_ENA */

Definition at line 6524 of file registers.h.

#define ARIZONA_ISRC3_DEC1_ENA_MASK   0x0100 /* ISRC3_DEC1_ENA */

Definition at line 6525 of file registers.h.

#define ARIZONA_ISRC3_DEC1_ENA_SHIFT   8 /* ISRC3_DEC1_ENA */

Definition at line 6526 of file registers.h.

#define ARIZONA_ISRC3_DEC1_ENA_WIDTH   1 /* ISRC3_DEC1_ENA */

Definition at line 6527 of file registers.h.

#define ARIZONA_ISRC3_DEC2_ENA   0x0080 /* ISRC3_DEC2_ENA */

Definition at line 6528 of file registers.h.

#define ARIZONA_ISRC3_DEC2_ENA_MASK   0x0080 /* ISRC3_DEC2_ENA */

Definition at line 6529 of file registers.h.

#define ARIZONA_ISRC3_DEC2_ENA_SHIFT   7 /* ISRC3_DEC2_ENA */

Definition at line 6530 of file registers.h.

#define ARIZONA_ISRC3_DEC2_ENA_WIDTH   1 /* ISRC3_DEC2_ENA */

Definition at line 6531 of file registers.h.

#define ARIZONA_ISRC3_DEC3_ENA   0x0040 /* ISRC3_DEC3_ENA */

Definition at line 6532 of file registers.h.

#define ARIZONA_ISRC3_DEC3_ENA_MASK   0x0040 /* ISRC3_DEC3_ENA */

Definition at line 6533 of file registers.h.

#define ARIZONA_ISRC3_DEC3_ENA_SHIFT   6 /* ISRC3_DEC3_ENA */

Definition at line 6534 of file registers.h.

#define ARIZONA_ISRC3_DEC3_ENA_WIDTH   1 /* ISRC3_DEC3_ENA */

Definition at line 6535 of file registers.h.

#define ARIZONA_ISRC3_FSH_MASK   0x7800 /* ISRC3_FSH - [14:11] */

Definition at line 6487 of file registers.h.

#define ARIZONA_ISRC3_FSH_SHIFT   11 /* ISRC3_FSH - [14:11] */

Definition at line 6488 of file registers.h.

#define ARIZONA_ISRC3_FSH_WIDTH   4 /* ISRC3_FSH - [14:11] */

Definition at line 6489 of file registers.h.

#define ARIZONA_ISRC3_FSL_MASK   0x7800 /* ISRC3_FSL - [14:11] */

Definition at line 6497 of file registers.h.

#define ARIZONA_ISRC3_FSL_SHIFT   11 /* ISRC3_FSL - [14:11] */

Definition at line 6498 of file registers.h.

#define ARIZONA_ISRC3_FSL_WIDTH   4 /* ISRC3_FSL - [14:11] */

Definition at line 6499 of file registers.h.

#define ARIZONA_ISRC3_INT0_ENA   0x8000 /* ISRC3_INT0_ENA */

Definition at line 6504 of file registers.h.

#define ARIZONA_ISRC3_INT0_ENA_MASK   0x8000 /* ISRC3_INT0_ENA */

Definition at line 6505 of file registers.h.

#define ARIZONA_ISRC3_INT0_ENA_SHIFT   15 /* ISRC3_INT0_ENA */

Definition at line 6506 of file registers.h.

#define ARIZONA_ISRC3_INT0_ENA_WIDTH   1 /* ISRC3_INT0_ENA */

Definition at line 6507 of file registers.h.

#define ARIZONA_ISRC3_INT1_ENA   0x4000 /* ISRC3_INT1_ENA */

Definition at line 6508 of file registers.h.

#define ARIZONA_ISRC3_INT1_ENA_MASK   0x4000 /* ISRC3_INT1_ENA */

Definition at line 6509 of file registers.h.

#define ARIZONA_ISRC3_INT1_ENA_SHIFT   14 /* ISRC3_INT1_ENA */

Definition at line 6510 of file registers.h.

#define ARIZONA_ISRC3_INT1_ENA_WIDTH   1 /* ISRC3_INT1_ENA */

Definition at line 6511 of file registers.h.

#define ARIZONA_ISRC3_INT2_ENA   0x2000 /* ISRC3_INT2_ENA */

Definition at line 6512 of file registers.h.

#define ARIZONA_ISRC3_INT2_ENA_MASK   0x2000 /* ISRC3_INT2_ENA */

Definition at line 6513 of file registers.h.

#define ARIZONA_ISRC3_INT2_ENA_SHIFT   13 /* ISRC3_INT2_ENA */

Definition at line 6514 of file registers.h.

#define ARIZONA_ISRC3_INT2_ENA_WIDTH   1 /* ISRC3_INT2_ENA */

Definition at line 6515 of file registers.h.

#define ARIZONA_ISRC3_INT3_ENA   0x1000 /* ISRC3_INT3_ENA */

Definition at line 6516 of file registers.h.

#define ARIZONA_ISRC3_INT3_ENA_MASK   0x1000 /* ISRC3_INT3_ENA */

Definition at line 6517 of file registers.h.

#define ARIZONA_ISRC3_INT3_ENA_SHIFT   12 /* ISRC3_INT3_ENA */

Definition at line 6518 of file registers.h.

#define ARIZONA_ISRC3_INT3_ENA_WIDTH   1 /* ISRC3_INT3_ENA */

Definition at line 6519 of file registers.h.

#define ARIZONA_ISRC3_NOTCH_ENA   0x0001 /* ISRC3_NOTCH_ENA */

Definition at line 6536 of file registers.h.

#define ARIZONA_ISRC3_NOTCH_ENA_MASK   0x0001 /* ISRC3_NOTCH_ENA */

Definition at line 6537 of file registers.h.

#define ARIZONA_ISRC3_NOTCH_ENA_SHIFT   0 /* ISRC3_NOTCH_ENA */

Definition at line 6538 of file registers.h.

#define ARIZONA_ISRC3_NOTCH_ENA_WIDTH   1 /* ISRC3_NOTCH_ENA */

Definition at line 6539 of file registers.h.

#define ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE   0xB80

Definition at line 787 of file registers.h.

#define ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE   0xB88

Definition at line 788 of file registers.h.

#define ARIZONA_ISRC3DEC3MIX_INPUT_1_SOURCE   0xB90

Definition at line 789 of file registers.h.

#define ARIZONA_ISRC3DEC4MIX_INPUT_1_SOURCE   0xB98

Definition at line 790 of file registers.h.

#define ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE   0xBA0

Definition at line 791 of file registers.h.

#define ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE   0xBA8

Definition at line 792 of file registers.h.

#define ARIZONA_ISRC3INT3MIX_INPUT_1_SOURCE   0xBB0

Definition at line 793 of file registers.h.

#define ARIZONA_ISRC3INT4MIX_INPUT_1_SOURCE   0xBB8

Definition at line 794 of file registers.h.

#define ARIZONA_ISRC_1_CTRL_1   0xEF0

Definition at line 966 of file registers.h.

#define ARIZONA_ISRC_1_CTRL_2   0xEF1

Definition at line 967 of file registers.h.

#define ARIZONA_ISRC_1_CTRL_3   0xEF2

Definition at line 968 of file registers.h.

#define ARIZONA_ISRC_2_CTRL_1   0xEF3

Definition at line 969 of file registers.h.

#define ARIZONA_ISRC_2_CTRL_2   0xEF4

Definition at line 970 of file registers.h.

#define ARIZONA_ISRC_2_CTRL_3   0xEF5

Definition at line 971 of file registers.h.

#define ARIZONA_ISRC_3_CTRL_1   0xEF6

Definition at line 972 of file registers.h.

#define ARIZONA_ISRC_3_CTRL_2   0xEF7

Definition at line 973 of file registers.h.

#define ARIZONA_ISRC_3_CTRL_3   0xEF8

Definition at line 974 of file registers.h.

#define ARIZONA_JACK_DETECT_ANALOGUE   0x2D3

Definition at line 125 of file registers.h.

#define ARIZONA_JACK_DETECT_DEBOUNCE   0xD56

Definition at line 857 of file registers.h.

#define ARIZONA_JD1_DB   0x0001 /* JD1_DB */

Definition at line 5385 of file registers.h.

#define ARIZONA_JD1_DB_MASK   0x0001 /* JD1_DB */

Definition at line 5386 of file registers.h.

#define ARIZONA_JD1_DB_SHIFT   0 /* JD1_DB */

Definition at line 5387 of file registers.h.

#define ARIZONA_JD1_DB_WIDTH   1 /* JD1_DB */

Definition at line 5388 of file registers.h.

#define ARIZONA_JD1_ENA   0x0001 /* JD1_ENA */

Definition at line 2124 of file registers.h.

#define ARIZONA_JD1_ENA_MASK   0x0001 /* JD1_ENA */

Definition at line 2125 of file registers.h.

#define ARIZONA_JD1_ENA_SHIFT   0 /* JD1_ENA */

Definition at line 2126 of file registers.h.

#define ARIZONA_JD1_ENA_WIDTH   1 /* JD1_ENA */

Definition at line 2127 of file registers.h.

#define ARIZONA_JD1_FALL_EINT1   0x0008 /* JD1_FALL_EINT1 */

Definition at line 5261 of file registers.h.

#define ARIZONA_JD1_FALL_EINT1_MASK   0x0008 /* JD1_FALL_EINT1 */

Definition at line 5262 of file registers.h.

#define ARIZONA_JD1_FALL_EINT1_SHIFT   3 /* JD1_FALL_EINT1 */

Definition at line 5263 of file registers.h.

#define ARIZONA_JD1_FALL_EINT1_WIDTH   1 /* JD1_FALL_EINT1 */

Definition at line 5264 of file registers.h.

#define ARIZONA_JD1_FALL_EINT2   0x0008 /* JD1_FALL_EINT2 */

Definition at line 5289 of file registers.h.

#define ARIZONA_JD1_FALL_EINT2_MASK   0x0008 /* JD1_FALL_EINT2 */

Definition at line 5290 of file registers.h.

#define ARIZONA_JD1_FALL_EINT2_SHIFT   3 /* JD1_FALL_EINT2 */

Definition at line 5291 of file registers.h.

#define ARIZONA_JD1_FALL_EINT2_WIDTH   1 /* JD1_FALL_EINT2 */

Definition at line 5292 of file registers.h.

#define ARIZONA_JD1_FALL_TRIG_STS   0x0008 /* JD1_FALL_TRIG_STS */

Definition at line 5233 of file registers.h.

#define ARIZONA_JD1_FALL_TRIG_STS_MASK   0x0008 /* JD1_FALL_TRIG_STS */

Definition at line 5234 of file registers.h.

#define ARIZONA_JD1_FALL_TRIG_STS_SHIFT   3 /* JD1_FALL_TRIG_STS */

Definition at line 5235 of file registers.h.

#define ARIZONA_JD1_FALL_TRIG_STS_WIDTH   1 /* JD1_FALL_TRIG_STS */

Definition at line 5236 of file registers.h.

#define ARIZONA_JD1_RISE_EINT1   0x0004 /* JD1_RISE_EINT1 */

Definition at line 5265 of file registers.h.

#define ARIZONA_JD1_RISE_EINT1_MASK   0x0004 /* JD1_RISE_EINT1 */

Definition at line 5266 of file registers.h.

#define ARIZONA_JD1_RISE_EINT1_SHIFT   2 /* JD1_RISE_EINT1 */

Definition at line 5267 of file registers.h.

#define ARIZONA_JD1_RISE_EINT1_WIDTH   1 /* JD1_RISE_EINT1 */

Definition at line 5268 of file registers.h.

#define ARIZONA_JD1_RISE_EINT2   0x0004 /* JD1_RISE_EINT2 */

Definition at line 5293 of file registers.h.

#define ARIZONA_JD1_RISE_EINT2_MASK   0x0004 /* JD1_RISE_EINT2 */

Definition at line 5294 of file registers.h.

#define ARIZONA_JD1_RISE_EINT2_SHIFT   2 /* JD1_RISE_EINT2 */

Definition at line 5295 of file registers.h.

#define ARIZONA_JD1_RISE_EINT2_WIDTH   1 /* JD1_RISE_EINT2 */

Definition at line 5296 of file registers.h.

#define ARIZONA_JD1_RISE_TRIG_STS   0x0004 /* JD1_RISE_TRIG_STS */

Definition at line 5237 of file registers.h.

#define ARIZONA_JD1_RISE_TRIG_STS_MASK   0x0004 /* JD1_RISE_TRIG_STS */

Definition at line 5238 of file registers.h.

#define ARIZONA_JD1_RISE_TRIG_STS_SHIFT   2 /* JD1_RISE_TRIG_STS */

Definition at line 5239 of file registers.h.

#define ARIZONA_JD1_RISE_TRIG_STS_WIDTH   1 /* JD1_RISE_TRIG_STS */

Definition at line 5240 of file registers.h.

#define ARIZONA_JD1_STS   0x0001 /* JD1_STS */

Definition at line 5373 of file registers.h.

#define ARIZONA_JD1_STS_MASK   0x0001 /* JD1_STS */

Definition at line 5374 of file registers.h.

#define ARIZONA_JD1_STS_SHIFT   0 /* JD1_STS */

Definition at line 5375 of file registers.h.

#define ARIZONA_JD1_STS_WIDTH   1 /* JD1_STS */

Definition at line 5376 of file registers.h.

#define ARIZONA_JD2_DB   0x0002 /* JD2_DB */

Definition at line 5381 of file registers.h.

#define ARIZONA_JD2_DB_MASK   0x0002 /* JD2_DB */

Definition at line 5382 of file registers.h.

#define ARIZONA_JD2_DB_SHIFT   1 /* JD2_DB */

Definition at line 5383 of file registers.h.

#define ARIZONA_JD2_DB_WIDTH   1 /* JD2_DB */

Definition at line 5384 of file registers.h.

#define ARIZONA_JD2_ENA   0x0002 /* JD2_ENA */

Definition at line 2120 of file registers.h.

#define ARIZONA_JD2_ENA_MASK   0x0002 /* JD2_ENA */

Definition at line 2121 of file registers.h.

#define ARIZONA_JD2_ENA_SHIFT   1 /* JD2_ENA */

Definition at line 2122 of file registers.h.

#define ARIZONA_JD2_ENA_WIDTH   1 /* JD2_ENA */

Definition at line 2123 of file registers.h.

#define ARIZONA_JD2_FALL_EINT1   0x0002 /* JD2_FALL_EINT1 */

Definition at line 5269 of file registers.h.

#define ARIZONA_JD2_FALL_EINT1_MASK   0x0002 /* JD2_FALL_EINT1 */

Definition at line 5270 of file registers.h.

#define ARIZONA_JD2_FALL_EINT1_SHIFT   1 /* JD2_FALL_EINT1 */

Definition at line 5271 of file registers.h.

#define ARIZONA_JD2_FALL_EINT1_WIDTH   1 /* JD2_FALL_EINT1 */

Definition at line 5272 of file registers.h.

#define ARIZONA_JD2_FALL_EINT2   0x0002 /* JD2_FALL_EINT2 */

Definition at line 5297 of file registers.h.

#define ARIZONA_JD2_FALL_EINT2_MASK   0x0002 /* JD2_FALL_EINT2 */

Definition at line 5298 of file registers.h.

#define ARIZONA_JD2_FALL_EINT2_SHIFT   1 /* JD2_FALL_EINT2 */

Definition at line 5299 of file registers.h.

#define ARIZONA_JD2_FALL_EINT2_WIDTH   1 /* JD2_FALL_EINT2 */

Definition at line 5300 of file registers.h.

#define ARIZONA_JD2_FALL_TRIG_STS   0x0002 /* JD2_FALL_TRIG_STS */

Definition at line 5241 of file registers.h.

#define ARIZONA_JD2_FALL_TRIG_STS_MASK   0x0002 /* JD2_FALL_TRIG_STS */

Definition at line 5242 of file registers.h.

#define ARIZONA_JD2_FALL_TRIG_STS_SHIFT   1 /* JD2_FALL_TRIG_STS */

Definition at line 5243 of file registers.h.

#define ARIZONA_JD2_FALL_TRIG_STS_WIDTH   1 /* JD2_FALL_TRIG_STS */

Definition at line 5244 of file registers.h.

#define ARIZONA_JD2_RISE_EINT1   0x0001 /* JD2_RISE_EINT1 */

Definition at line 5273 of file registers.h.

#define ARIZONA_JD2_RISE_EINT1_MASK   0x0001 /* JD2_RISE_EINT1 */

Definition at line 5274 of file registers.h.

#define ARIZONA_JD2_RISE_EINT1_SHIFT   0 /* JD2_RISE_EINT1 */

Definition at line 5275 of file registers.h.

#define ARIZONA_JD2_RISE_EINT1_WIDTH   1 /* JD2_RISE_EINT1 */

Definition at line 5276 of file registers.h.

#define ARIZONA_JD2_RISE_EINT2   0x0001 /* JD2_RISE_EINT2 */

Definition at line 5301 of file registers.h.

#define ARIZONA_JD2_RISE_EINT2_MASK   0x0001 /* JD2_RISE_EINT2 */

Definition at line 5302 of file registers.h.

#define ARIZONA_JD2_RISE_EINT2_SHIFT   0 /* JD2_RISE_EINT2 */

Definition at line 5303 of file registers.h.

#define ARIZONA_JD2_RISE_EINT2_WIDTH   1 /* JD2_RISE_EINT2 */

Definition at line 5304 of file registers.h.

#define ARIZONA_JD2_RISE_TRIG_STS   0x0001 /* JD2_RISE_TRIG_STS */

Definition at line 5245 of file registers.h.

#define ARIZONA_JD2_RISE_TRIG_STS_MASK   0x0001 /* JD2_RISE_TRIG_STS */

Definition at line 5246 of file registers.h.

#define ARIZONA_JD2_RISE_TRIG_STS_SHIFT   0 /* JD2_RISE_TRIG_STS */

Definition at line 5247 of file registers.h.

#define ARIZONA_JD2_RISE_TRIG_STS_WIDTH   1 /* JD2_RISE_TRIG_STS */

Definition at line 5248 of file registers.h.

#define ARIZONA_JD2_STS   0x0002 /* JD2_STS */

Definition at line 5369 of file registers.h.

#define ARIZONA_JD2_STS_MASK   0x0002 /* JD2_STS */

Definition at line 5370 of file registers.h.

#define ARIZONA_JD2_STS_SHIFT   1 /* JD2_STS */

Definition at line 5371 of file registers.h.

#define ARIZONA_JD2_STS_WIDTH   1 /* JD2_STS */

Definition at line 5372 of file registers.h.

#define ARIZONA_LDO1_BYPASS   0x0002 /* LDO1_BYPASS */

Definition at line 1882 of file registers.h.

#define ARIZONA_LDO1_BYPASS_MASK   0x0002 /* LDO1_BYPASS */

Definition at line 1883 of file registers.h.

#define ARIZONA_LDO1_BYPASS_SHIFT   1 /* LDO1_BYPASS */

Definition at line 1884 of file registers.h.

#define ARIZONA_LDO1_BYPASS_WIDTH   1 /* LDO1_BYPASS */

Definition at line 1885 of file registers.h.

#define ARIZONA_LDO1_CONTROL_1   0x210

Definition at line 112 of file registers.h.

#define ARIZONA_LDO1_DISCH   0x0004 /* LDO1_DISCH */

Definition at line 1878 of file registers.h.

#define ARIZONA_LDO1_DISCH_MASK   0x0004 /* LDO1_DISCH */

Definition at line 1879 of file registers.h.

#define ARIZONA_LDO1_DISCH_SHIFT   2 /* LDO1_DISCH */

Definition at line 1880 of file registers.h.

#define ARIZONA_LDO1_DISCH_WIDTH   1 /* LDO1_DISCH */

Definition at line 1881 of file registers.h.

#define ARIZONA_LDO1_ENA   0x0001 /* LDO1_ENA */

Definition at line 1886 of file registers.h.

#define ARIZONA_LDO1_ENA_MASK   0x0001 /* LDO1_ENA */

Definition at line 1887 of file registers.h.

#define ARIZONA_LDO1_ENA_SHIFT   0 /* LDO1_ENA */

Definition at line 1888 of file registers.h.

#define ARIZONA_LDO1_ENA_WIDTH   1 /* LDO1_ENA */

Definition at line 1889 of file registers.h.

#define ARIZONA_LDO1_FAST   0x0010 /* LDO1_FAST */

Definition at line 1874 of file registers.h.

#define ARIZONA_LDO1_FAST_MASK   0x0010 /* LDO1_FAST */

Definition at line 1875 of file registers.h.

#define ARIZONA_LDO1_FAST_SHIFT   4 /* LDO1_FAST */

Definition at line 1876 of file registers.h.

#define ARIZONA_LDO1_FAST_WIDTH   1 /* LDO1_FAST */

Definition at line 1877 of file registers.h.

#define ARIZONA_LDO1_VSEL_MASK   0x07E0 /* LDO1_VSEL - [10:5] */

Definition at line 1871 of file registers.h.

#define ARIZONA_LDO1_VSEL_SHIFT   5 /* LDO1_VSEL - [10:5] */

Definition at line 1872 of file registers.h.

#define ARIZONA_LDO1_VSEL_WIDTH   6 /* LDO1_VSEL - [10:5] */

Definition at line 1873 of file registers.h.

#define ARIZONA_LDO1ENA_PD   0x8000 /* LDO1ENA_PD */

Definition at line 4048 of file registers.h.

#define ARIZONA_LDO1ENA_PD_MASK   0x8000 /* LDO1ENA_PD */

Definition at line 4049 of file registers.h.

#define ARIZONA_LDO1ENA_PD_SHIFT   15 /* LDO1ENA_PD */

Definition at line 4050 of file registers.h.

#define ARIZONA_LDO1ENA_PD_WIDTH   1 /* LDO1ENA_PD */

Definition at line 4051 of file registers.h.

#define ARIZONA_LDO2_BYPASS   0x0002 /* LDO2_BYPASS */

Definition at line 1905 of file registers.h.

#define ARIZONA_LDO2_BYPASS_MASK   0x0002 /* LDO2_BYPASS */

Definition at line 1906 of file registers.h.

#define ARIZONA_LDO2_BYPASS_SHIFT   1 /* LDO2_BYPASS */

Definition at line 1907 of file registers.h.

#define ARIZONA_LDO2_BYPASS_WIDTH   1 /* LDO2_BYPASS */

Definition at line 1908 of file registers.h.

#define ARIZONA_LDO2_CONTROL_1   0x213

Definition at line 113 of file registers.h.

#define ARIZONA_LDO2_DISCH   0x0004 /* LDO2_DISCH */

Definition at line 1901 of file registers.h.

#define ARIZONA_LDO2_DISCH_MASK   0x0004 /* LDO2_DISCH */

Definition at line 1902 of file registers.h.

#define ARIZONA_LDO2_DISCH_SHIFT   2 /* LDO2_DISCH */

Definition at line 1903 of file registers.h.

#define ARIZONA_LDO2_DISCH_WIDTH   1 /* LDO2_DISCH */

Definition at line 1904 of file registers.h.

#define ARIZONA_LDO2_ENA   0x0001 /* LDO2_ENA */

Definition at line 1909 of file registers.h.

#define ARIZONA_LDO2_ENA_MASK   0x0001 /* LDO2_ENA */

Definition at line 1910 of file registers.h.

#define ARIZONA_LDO2_ENA_SHIFT   0 /* LDO2_ENA */

Definition at line 1911 of file registers.h.

#define ARIZONA_LDO2_ENA_WIDTH   1 /* LDO2_ENA */

Definition at line 1912 of file registers.h.

#define ARIZONA_LDO2_FAST   0x0010 /* LDO2_FAST */

Definition at line 1897 of file registers.h.

#define ARIZONA_LDO2_FAST_MASK   0x0010 /* LDO2_FAST */

Definition at line 1898 of file registers.h.

#define ARIZONA_LDO2_FAST_SHIFT   4 /* LDO2_FAST */

Definition at line 1899 of file registers.h.

#define ARIZONA_LDO2_FAST_WIDTH   1 /* LDO2_FAST */

Definition at line 1900 of file registers.h.

#define ARIZONA_LDO2_VSEL_MASK   0x07E0 /* LDO2_VSEL - [10:5] */

Definition at line 1894 of file registers.h.

#define ARIZONA_LDO2_VSEL_SHIFT   5 /* LDO2_VSEL - [10:5] */

Definition at line 1895 of file registers.h.

#define ARIZONA_LDO2_VSEL_WIDTH   6 /* LDO2_VSEL - [10:5] */

Definition at line 1896 of file registers.h.

#define ARIZONA_LHPF1_COEFF_MASK   0xFFFF /* LHPF1_COEFF - [15:0] */

Definition at line 6275 of file registers.h.

#define ARIZONA_LHPF1_COEFF_SHIFT   0 /* LHPF1_COEFF - [15:0] */

Definition at line 6276 of file registers.h.

#define ARIZONA_LHPF1_COEFF_WIDTH   16 /* LHPF1_COEFF - [15:0] */

Definition at line 6277 of file registers.h.

#define ARIZONA_LHPF1_ENA   0x0001 /* LHPF1_ENA */

Definition at line 6267 of file registers.h.

#define ARIZONA_LHPF1_ENA_MASK   0x0001 /* LHPF1_ENA */

Definition at line 6268 of file registers.h.

#define ARIZONA_LHPF1_ENA_SHIFT   0 /* LHPF1_ENA */

Definition at line 6269 of file registers.h.

#define ARIZONA_LHPF1_ENA_WIDTH   1 /* LHPF1_ENA */

Definition at line 6270 of file registers.h.

#define ARIZONA_LHPF1_MODE   0x0002 /* LHPF1_MODE */

Definition at line 6263 of file registers.h.

#define ARIZONA_LHPF1_MODE_MASK   0x0002 /* LHPF1_MODE */

Definition at line 6264 of file registers.h.

#define ARIZONA_LHPF1_MODE_SHIFT   1 /* LHPF1_MODE */

Definition at line 6265 of file registers.h.

#define ARIZONA_LHPF1_MODE_WIDTH   1 /* LHPF1_MODE */

Definition at line 6266 of file registers.h.

#define ARIZONA_LHPF2_COEFF_MASK   0xFFFF /* LHPF2_COEFF - [15:0] */

Definition at line 6294 of file registers.h.

#define ARIZONA_LHPF2_COEFF_SHIFT   0 /* LHPF2_COEFF - [15:0] */

Definition at line 6295 of file registers.h.

#define ARIZONA_LHPF2_COEFF_WIDTH   16 /* LHPF2_COEFF - [15:0] */

Definition at line 6296 of file registers.h.

#define ARIZONA_LHPF2_ENA   0x0001 /* LHPF2_ENA */

Definition at line 6286 of file registers.h.

#define ARIZONA_LHPF2_ENA_MASK   0x0001 /* LHPF2_ENA */

Definition at line 6287 of file registers.h.

#define ARIZONA_LHPF2_ENA_SHIFT   0 /* LHPF2_ENA */

Definition at line 6288 of file registers.h.

#define ARIZONA_LHPF2_ENA_WIDTH   1 /* LHPF2_ENA */

Definition at line 6289 of file registers.h.

#define ARIZONA_LHPF2_MODE   0x0002 /* LHPF2_MODE */

Definition at line 6282 of file registers.h.

#define ARIZONA_LHPF2_MODE_MASK   0x0002 /* LHPF2_MODE */

Definition at line 6283 of file registers.h.

#define ARIZONA_LHPF2_MODE_SHIFT   1 /* LHPF2_MODE */

Definition at line 6284 of file registers.h.

#define ARIZONA_LHPF2_MODE_WIDTH   1 /* LHPF2_MODE */

Definition at line 6285 of file registers.h.

#define ARIZONA_LHPF3_COEFF_MASK   0xFFFF /* LHPF3_COEFF - [15:0] */

Definition at line 6313 of file registers.h.

#define ARIZONA_LHPF3_COEFF_SHIFT   0 /* LHPF3_COEFF - [15:0] */

Definition at line 6314 of file registers.h.

#define ARIZONA_LHPF3_COEFF_WIDTH   16 /* LHPF3_COEFF - [15:0] */

Definition at line 6315 of file registers.h.

#define ARIZONA_LHPF3_ENA   0x0001 /* LHPF3_ENA */

Definition at line 6305 of file registers.h.

#define ARIZONA_LHPF3_ENA_MASK   0x0001 /* LHPF3_ENA */

Definition at line 6306 of file registers.h.

#define ARIZONA_LHPF3_ENA_SHIFT   0 /* LHPF3_ENA */

Definition at line 6307 of file registers.h.

#define ARIZONA_LHPF3_ENA_WIDTH   1 /* LHPF3_ENA */

Definition at line 6308 of file registers.h.

#define ARIZONA_LHPF3_MODE   0x0002 /* LHPF3_MODE */

Definition at line 6301 of file registers.h.

#define ARIZONA_LHPF3_MODE_MASK   0x0002 /* LHPF3_MODE */

Definition at line 6302 of file registers.h.

#define ARIZONA_LHPF3_MODE_SHIFT   1 /* LHPF3_MODE */

Definition at line 6303 of file registers.h.

#define ARIZONA_LHPF3_MODE_WIDTH   1 /* LHPF3_MODE */

Definition at line 6304 of file registers.h.

#define ARIZONA_LHPF4_COEFF_MASK   0xFFFF /* LHPF4_COEFF - [15:0] */

Definition at line 6332 of file registers.h.

#define ARIZONA_LHPF4_COEFF_SHIFT   0 /* LHPF4_COEFF - [15:0] */

Definition at line 6333 of file registers.h.

#define ARIZONA_LHPF4_COEFF_WIDTH   16 /* LHPF4_COEFF - [15:0] */

Definition at line 6334 of file registers.h.

#define ARIZONA_LHPF4_ENA   0x0001 /* LHPF4_ENA */

Definition at line 6324 of file registers.h.

#define ARIZONA_LHPF4_ENA_MASK   0x0001 /* LHPF4_ENA */

Definition at line 6325 of file registers.h.

#define ARIZONA_LHPF4_ENA_SHIFT   0 /* LHPF4_ENA */

Definition at line 6326 of file registers.h.

#define ARIZONA_LHPF4_ENA_WIDTH   1 /* LHPF4_ENA */

Definition at line 6327 of file registers.h.

#define ARIZONA_LHPF4_MODE   0x0002 /* LHPF4_MODE */

Definition at line 6320 of file registers.h.

#define ARIZONA_LHPF4_MODE_MASK   0x0002 /* LHPF4_MODE */

Definition at line 6321 of file registers.h.

#define ARIZONA_LHPF4_MODE_SHIFT   1 /* LHPF4_MODE */

Definition at line 6322 of file registers.h.

#define ARIZONA_LHPF4_MODE_WIDTH   1 /* LHPF4_MODE */

Definition at line 6323 of file registers.h.

#define ARIZONA_LOAD_DEFAULTS   0x0002 /* LOAD_DEFAULTS */

Definition at line 1080 of file registers.h.

#define ARIZONA_LOAD_DEFAULTS_MASK   0x0002 /* LOAD_DEFAULTS */

Definition at line 1081 of file registers.h.

#define ARIZONA_LOAD_DEFAULTS_SHIFT   1 /* LOAD_DEFAULTS */

Definition at line 1082 of file registers.h.

#define ARIZONA_LOAD_DEFAULTS_WIDTH   1 /* LOAD_DEFAULTS */

Definition at line 1083 of file registers.h.

#define ARIZONA_LRA_FREQ_MASK   0x7FFF /* LRA_FREQ - [14:0] */

Definition at line 1352 of file registers.h.

#define ARIZONA_LRA_FREQ_SHIFT   0 /* LRA_FREQ - [14:0] */

Definition at line 1353 of file registers.h.

#define ARIZONA_LRA_FREQ_WIDTH   15 /* LRA_FREQ - [14:0] */

Definition at line 1354 of file registers.h.

#define ARIZONA_LRCLK_SRC_MASK   0x000E /* LRCLK_SRC - [3:1] */

Definition at line 1540 of file registers.h.

#define ARIZONA_LRCLK_SRC_SHIFT   1 /* LRCLK_SRC - [3:1] */

Definition at line 1541 of file registers.h.

#define ARIZONA_LRCLK_SRC_WIDTH   3 /* LRCLK_SRC - [3:1] */

Definition at line 1542 of file registers.h.

#define ARIZONA_MCLK1_PD   0x1000 /* MCLK1_PD */

Definition at line 4064 of file registers.h.

#define ARIZONA_MCLK1_PD_MASK   0x1000 /* MCLK1_PD */

Definition at line 4065 of file registers.h.

#define ARIZONA_MCLK1_PD_SHIFT   12 /* MCLK1_PD */

Definition at line 4066 of file registers.h.

#define ARIZONA_MCLK1_PD_WIDTH   1 /* MCLK1_PD */

Definition at line 4067 of file registers.h.

#define ARIZONA_MCLK2_PD   0x2000 /* MCLK2_PD */

Definition at line 4052 of file registers.h.

#define ARIZONA_MCLK2_PD_MASK   0x2000 /* MCLK2_PD */

Definition at line 4053 of file registers.h.

#define ARIZONA_MCLK2_PD_SHIFT   13 /* MCLK2_PD */

Definition at line 4054 of file registers.h.

#define ARIZONA_MCLK2_PD_WIDTH   1 /* MCLK2_PD */

Definition at line 4055 of file registers.h.

#define ARIZONA_MIC_BIAS_CTRL_1   0x218

Definition at line 114 of file registers.h.

#define ARIZONA_MIC_BIAS_CTRL_2   0x219

Definition at line 115 of file registers.h.

#define ARIZONA_MIC_BIAS_CTRL_3   0x21A

Definition at line 116 of file registers.h.

#define ARIZONA_MIC_CHARGE_PUMP_1   0x200

Definition at line 111 of file registers.h.

#define ARIZONA_MIC_DETECT_1   0x2A3

Definition at line 120 of file registers.h.

#define ARIZONA_MIC_DETECT_2   0x2A4

Definition at line 121 of file registers.h.

#define ARIZONA_MIC_DETECT_3   0x2A5

Definition at line 122 of file registers.h.

#define ARIZONA_MIC_NOISE_MIX_CONTROL_1   0x2C3

Definition at line 123 of file registers.h.

#define ARIZONA_MICB1_BYPASS   0x0002 /* MICB1_BYPASS */

Definition at line 1936 of file registers.h.

#define ARIZONA_MICB1_BYPASS_MASK   0x0002 /* MICB1_BYPASS */

Definition at line 1937 of file registers.h.

#define ARIZONA_MICB1_BYPASS_SHIFT   1 /* MICB1_BYPASS */

Definition at line 1938 of file registers.h.

#define ARIZONA_MICB1_BYPASS_WIDTH   1 /* MICB1_BYPASS */

Definition at line 1939 of file registers.h.

#define ARIZONA_MICB1_DISCH   0x0004 /* MICB1_DISCH */

Definition at line 1932 of file registers.h.

#define ARIZONA_MICB1_DISCH_MASK   0x0004 /* MICB1_DISCH */

Definition at line 1933 of file registers.h.

#define ARIZONA_MICB1_DISCH_SHIFT   2 /* MICB1_DISCH */

Definition at line 1934 of file registers.h.

#define ARIZONA_MICB1_DISCH_WIDTH   1 /* MICB1_DISCH */

Definition at line 1935 of file registers.h.

#define ARIZONA_MICB1_ENA   0x0001 /* MICB1_ENA */

Definition at line 1940 of file registers.h.

#define ARIZONA_MICB1_ENA_MASK   0x0001 /* MICB1_ENA */

Definition at line 1941 of file registers.h.

#define ARIZONA_MICB1_ENA_SHIFT   0 /* MICB1_ENA */

Definition at line 1942 of file registers.h.

#define ARIZONA_MICB1_ENA_WIDTH   1 /* MICB1_ENA */

Definition at line 1943 of file registers.h.

#define ARIZONA_MICB1_EXT_CAP   0x8000 /* MICB1_EXT_CAP */

Definition at line 1917 of file registers.h.

#define ARIZONA_MICB1_EXT_CAP_MASK   0x8000 /* MICB1_EXT_CAP */

Definition at line 1918 of file registers.h.

#define ARIZONA_MICB1_EXT_CAP_SHIFT   15 /* MICB1_EXT_CAP */

Definition at line 1919 of file registers.h.

#define ARIZONA_MICB1_EXT_CAP_WIDTH   1 /* MICB1_EXT_CAP */

Definition at line 1920 of file registers.h.

#define ARIZONA_MICB1_FAST   0x0010 /* MICB1_FAST */

Definition at line 1924 of file registers.h.

#define ARIZONA_MICB1_FAST_MASK   0x0010 /* MICB1_FAST */

Definition at line 1925 of file registers.h.

#define ARIZONA_MICB1_FAST_SHIFT   4 /* MICB1_FAST */

Definition at line 1926 of file registers.h.

#define ARIZONA_MICB1_FAST_WIDTH   1 /* MICB1_FAST */

Definition at line 1927 of file registers.h.

#define ARIZONA_MICB1_LVL_MASK   0x01E0 /* MICB1_LVL - [8:5] */

Definition at line 1921 of file registers.h.

#define ARIZONA_MICB1_LVL_SHIFT   5 /* MICB1_LVL - [8:5] */

Definition at line 1922 of file registers.h.

#define ARIZONA_MICB1_LVL_WIDTH   4 /* MICB1_LVL - [8:5] */

Definition at line 1923 of file registers.h.

#define ARIZONA_MICB1_RATE   0x0008 /* MICB1_RATE */

Definition at line 1928 of file registers.h.

#define ARIZONA_MICB1_RATE_MASK   0x0008 /* MICB1_RATE */

Definition at line 1929 of file registers.h.

#define ARIZONA_MICB1_RATE_SHIFT   3 /* MICB1_RATE */

Definition at line 1930 of file registers.h.

#define ARIZONA_MICB1_RATE_WIDTH   1 /* MICB1_RATE */

Definition at line 1931 of file registers.h.

#define ARIZONA_MICB2_BYPASS   0x0002 /* MICB2_BYPASS */

Definition at line 1967 of file registers.h.

#define ARIZONA_MICB2_BYPASS_MASK   0x0002 /* MICB2_BYPASS */

Definition at line 1968 of file registers.h.

#define ARIZONA_MICB2_BYPASS_SHIFT   1 /* MICB2_BYPASS */

Definition at line 1969 of file registers.h.

#define ARIZONA_MICB2_BYPASS_WIDTH   1 /* MICB2_BYPASS */

Definition at line 1970 of file registers.h.

#define ARIZONA_MICB2_DISCH   0x0004 /* MICB2_DISCH */

Definition at line 1963 of file registers.h.

#define ARIZONA_MICB2_DISCH_MASK   0x0004 /* MICB2_DISCH */

Definition at line 1964 of file registers.h.

#define ARIZONA_MICB2_DISCH_SHIFT   2 /* MICB2_DISCH */

Definition at line 1965 of file registers.h.

#define ARIZONA_MICB2_DISCH_WIDTH   1 /* MICB2_DISCH */

Definition at line 1966 of file registers.h.

#define ARIZONA_MICB2_ENA   0x0001 /* MICB2_ENA */

Definition at line 1971 of file registers.h.

#define ARIZONA_MICB2_ENA_MASK   0x0001 /* MICB2_ENA */

Definition at line 1972 of file registers.h.

#define ARIZONA_MICB2_ENA_SHIFT   0 /* MICB2_ENA */

Definition at line 1973 of file registers.h.

#define ARIZONA_MICB2_ENA_WIDTH   1 /* MICB2_ENA */

Definition at line 1974 of file registers.h.

#define ARIZONA_MICB2_EXT_CAP   0x8000 /* MICB2_EXT_CAP */

Definition at line 1948 of file registers.h.

#define ARIZONA_MICB2_EXT_CAP_MASK   0x8000 /* MICB2_EXT_CAP */

Definition at line 1949 of file registers.h.

#define ARIZONA_MICB2_EXT_CAP_SHIFT   15 /* MICB2_EXT_CAP */

Definition at line 1950 of file registers.h.

#define ARIZONA_MICB2_EXT_CAP_WIDTH   1 /* MICB2_EXT_CAP */

Definition at line 1951 of file registers.h.

#define ARIZONA_MICB2_FAST   0x0010 /* MICB2_FAST */

Definition at line 1955 of file registers.h.

#define ARIZONA_MICB2_FAST_MASK   0x0010 /* MICB2_FAST */

Definition at line 1956 of file registers.h.

#define ARIZONA_MICB2_FAST_SHIFT   4 /* MICB2_FAST */

Definition at line 1957 of file registers.h.

#define ARIZONA_MICB2_FAST_WIDTH   1 /* MICB2_FAST */

Definition at line 1958 of file registers.h.

#define ARIZONA_MICB2_LVL_MASK   0x01E0 /* MICB2_LVL - [8:5] */

Definition at line 1952 of file registers.h.

#define ARIZONA_MICB2_LVL_SHIFT   5 /* MICB2_LVL - [8:5] */

Definition at line 1953 of file registers.h.

#define ARIZONA_MICB2_LVL_WIDTH   4 /* MICB2_LVL - [8:5] */

Definition at line 1954 of file registers.h.

#define ARIZONA_MICB2_RATE   0x0008 /* MICB2_RATE */

Definition at line 1959 of file registers.h.

#define ARIZONA_MICB2_RATE_MASK   0x0008 /* MICB2_RATE */

Definition at line 1960 of file registers.h.

#define ARIZONA_MICB2_RATE_SHIFT   3 /* MICB2_RATE */

Definition at line 1961 of file registers.h.

#define ARIZONA_MICB2_RATE_WIDTH   1 /* MICB2_RATE */

Definition at line 1962 of file registers.h.

#define ARIZONA_MICB3_BYPASS   0x0002 /* MICB3_BYPASS */

Definition at line 1998 of file registers.h.

#define ARIZONA_MICB3_BYPASS_MASK   0x0002 /* MICB3_BYPASS */

Definition at line 1999 of file registers.h.

#define ARIZONA_MICB3_BYPASS_SHIFT   1 /* MICB3_BYPASS */

Definition at line 2000 of file registers.h.

#define ARIZONA_MICB3_BYPASS_WIDTH   1 /* MICB3_BYPASS */

Definition at line 2001 of file registers.h.

#define ARIZONA_MICB3_DISCH   0x0004 /* MICB3_DISCH */

Definition at line 1994 of file registers.h.

#define ARIZONA_MICB3_DISCH_MASK   0x0004 /* MICB3_DISCH */

Definition at line 1995 of file registers.h.

#define ARIZONA_MICB3_DISCH_SHIFT   2 /* MICB3_DISCH */

Definition at line 1996 of file registers.h.

#define ARIZONA_MICB3_DISCH_WIDTH   1 /* MICB3_DISCH */

Definition at line 1997 of file registers.h.

#define ARIZONA_MICB3_ENA   0x0001 /* MICB3_ENA */

Definition at line 2002 of file registers.h.

#define ARIZONA_MICB3_ENA_MASK   0x0001 /* MICB3_ENA */

Definition at line 2003 of file registers.h.

#define ARIZONA_MICB3_ENA_SHIFT   0 /* MICB3_ENA */

Definition at line 2004 of file registers.h.

#define ARIZONA_MICB3_ENA_WIDTH   1 /* MICB3_ENA */

Definition at line 2005 of file registers.h.

#define ARIZONA_MICB3_EXT_CAP   0x8000 /* MICB3_EXT_CAP */

Definition at line 1979 of file registers.h.

#define ARIZONA_MICB3_EXT_CAP_MASK   0x8000 /* MICB3_EXT_CAP */

Definition at line 1980 of file registers.h.

#define ARIZONA_MICB3_EXT_CAP_SHIFT   15 /* MICB3_EXT_CAP */

Definition at line 1981 of file registers.h.

#define ARIZONA_MICB3_EXT_CAP_WIDTH   1 /* MICB3_EXT_CAP */

Definition at line 1982 of file registers.h.

#define ARIZONA_MICB3_FAST   0x0010 /* MICB3_FAST */

Definition at line 1986 of file registers.h.

#define ARIZONA_MICB3_FAST_MASK   0x0010 /* MICB3_FAST */

Definition at line 1987 of file registers.h.

#define ARIZONA_MICB3_FAST_SHIFT   4 /* MICB3_FAST */

Definition at line 1988 of file registers.h.

#define ARIZONA_MICB3_FAST_WIDTH   1 /* MICB3_FAST */

Definition at line 1989 of file registers.h.

#define ARIZONA_MICB3_LVL_MASK   0x01E0 /* MICB3_LVL - [8:5] */

Definition at line 1983 of file registers.h.

#define ARIZONA_MICB3_LVL_SHIFT   5 /* MICB3_LVL - [8:5] */

Definition at line 1984 of file registers.h.

#define ARIZONA_MICB3_LVL_WIDTH   4 /* MICB3_LVL - [8:5] */

Definition at line 1985 of file registers.h.

#define ARIZONA_MICB3_RATE   0x0008 /* MICB3_RATE */

Definition at line 1990 of file registers.h.

#define ARIZONA_MICB3_RATE_MASK   0x0008 /* MICB3_RATE */

Definition at line 1991 of file registers.h.

#define ARIZONA_MICB3_RATE_SHIFT   3 /* MICB3_RATE */

Definition at line 1992 of file registers.h.

#define ARIZONA_MICB3_RATE_WIDTH   1 /* MICB3_RATE */

Definition at line 1993 of file registers.h.

#define ARIZONA_MICD_BIAS_SRC_MASK   0x0030 /* MICD_BIAS_SRC - [5:4] */

Definition at line 2064 of file registers.h.

#define ARIZONA_MICD_BIAS_SRC_SHIFT   4 /* MICD_BIAS_SRC - [5:4] */

Definition at line 2065 of file registers.h.

#define ARIZONA_MICD_BIAS_SRC_WIDTH   2 /* MICD_BIAS_SRC - [5:4] */

Definition at line 2066 of file registers.h.

#define ARIZONA_MICD_BIAS_STARTTIME_MASK   0xF000 /* MICD_BIAS_STARTTIME - [15:12] */

Definition at line 2058 of file registers.h.

#define ARIZONA_MICD_BIAS_STARTTIME_SHIFT   12 /* MICD_BIAS_STARTTIME - [15:12] */

Definition at line 2059 of file registers.h.

#define ARIZONA_MICD_BIAS_STARTTIME_WIDTH   4 /* MICD_BIAS_STARTTIME - [15:12] */

Definition at line 2060 of file registers.h.

#define ARIZONA_MICD_DBTIME   0x0002 /* MICD_DBTIME */

Definition at line 2067 of file registers.h.

#define ARIZONA_MICD_DBTIME_MASK   0x0002 /* MICD_DBTIME */

Definition at line 2068 of file registers.h.

#define ARIZONA_MICD_DBTIME_SHIFT   1 /* MICD_DBTIME */

Definition at line 2069 of file registers.h.

#define ARIZONA_MICD_DBTIME_WIDTH   1 /* MICD_DBTIME */

Definition at line 2070 of file registers.h.

#define ARIZONA_MICD_ENA   0x0001 /* MICD_ENA */

Definition at line 2071 of file registers.h.

#define ARIZONA_MICD_ENA_MASK   0x0001 /* MICD_ENA */

Definition at line 2072 of file registers.h.

#define ARIZONA_MICD_ENA_SHIFT   0 /* MICD_ENA */

Definition at line 2073 of file registers.h.

#define ARIZONA_MICD_ENA_WIDTH   1 /* MICD_ENA */

Definition at line 2074 of file registers.h.

#define ARIZONA_MICD_LVL_MASK   0x07FC /* MICD_LVL - [10:2] */

Definition at line 2086 of file registers.h.

#define ARIZONA_MICD_LVL_SEL_MASK   0x00FF /* MICD_LVL_SEL - [7:0] */

Definition at line 2079 of file registers.h.

#define ARIZONA_MICD_LVL_SEL_SHIFT   0 /* MICD_LVL_SEL - [7:0] */

Definition at line 2080 of file registers.h.

#define ARIZONA_MICD_LVL_SEL_WIDTH   8 /* MICD_LVL_SEL - [7:0] */

Definition at line 2081 of file registers.h.

#define ARIZONA_MICD_LVL_SHIFT   2 /* MICD_LVL - [10:2] */

Definition at line 2087 of file registers.h.

#define ARIZONA_MICD_LVL_WIDTH   9 /* MICD_LVL - [10:2] */

Definition at line 2088 of file registers.h.

#define ARIZONA_MICD_PD   0x0100 /* MICD_PD */

Definition at line 4068 of file registers.h.

#define ARIZONA_MICD_PD_MASK   0x0100 /* MICD_PD */

Definition at line 4069 of file registers.h.

#define ARIZONA_MICD_PD_SHIFT   8 /* MICD_PD */

Definition at line 4070 of file registers.h.

#define ARIZONA_MICD_PD_WIDTH   1 /* MICD_PD */

Definition at line 4071 of file registers.h.

#define ARIZONA_MICD_RATE_MASK   0x0F00 /* MICD_RATE - [11:8] */

Definition at line 2061 of file registers.h.

#define ARIZONA_MICD_RATE_SHIFT   8 /* MICD_RATE - [11:8] */

Definition at line 2062 of file registers.h.

#define ARIZONA_MICD_RATE_WIDTH   4 /* MICD_RATE - [11:8] */

Definition at line 2063 of file registers.h.

#define ARIZONA_MICD_STS   0x0001 /* MICD_STS */

Definition at line 2093 of file registers.h.

#define ARIZONA_MICD_STS_MASK   0x0001 /* MICD_STS */

Definition at line 2094 of file registers.h.

#define ARIZONA_MICD_STS_SHIFT   0 /* MICD_STS */

Definition at line 2095 of file registers.h.

#define ARIZONA_MICD_STS_WIDTH   1 /* MICD_STS */

Definition at line 2096 of file registers.h.

#define ARIZONA_MICD_VALID   0x0002 /* MICD_VALID */

Definition at line 2089 of file registers.h.

#define ARIZONA_MICD_VALID_MASK   0x0002 /* MICD_VALID */

Definition at line 2090 of file registers.h.

#define ARIZONA_MICD_VALID_SHIFT   1 /* MICD_VALID */

Definition at line 2091 of file registers.h.

#define ARIZONA_MICD_VALID_WIDTH   1 /* MICD_VALID */

Definition at line 2092 of file registers.h.

#define ARIZONA_MICDET_EINT1   0x1000 /* MICDET_EINT1 */

Definition at line 4268 of file registers.h.

#define ARIZONA_MICDET_EINT1_MASK   0x1000 /* MICDET_EINT1 */

Definition at line 4269 of file registers.h.

#define ARIZONA_MICDET_EINT1_SHIFT   12 /* MICDET_EINT1 */

Definition at line 4270 of file registers.h.

#define ARIZONA_MICDET_EINT1_WIDTH   1 /* MICDET_EINT1 */

Definition at line 4271 of file registers.h.

#define ARIZONA_MICDET_EINT2   0x1000 /* MICDET_EINT2 */

Definition at line 4612 of file registers.h.

#define ARIZONA_MICDET_EINT2_MASK   0x1000 /* MICDET_EINT2 */

Definition at line 4613 of file registers.h.

#define ARIZONA_MICDET_EINT2_SHIFT   12 /* MICDET_EINT2 */

Definition at line 4614 of file registers.h.

#define ARIZONA_MICDET_EINT2_WIDTH   1 /* MICDET_EINT2 */

Definition at line 4615 of file registers.h.

#define ARIZONA_MICDET_STS   0x1000 /* MICDET_STS */

Definition at line 4937 of file registers.h.

#define ARIZONA_MICDET_STS_MASK   0x1000 /* MICDET_STS */

Definition at line 4938 of file registers.h.

#define ARIZONA_MICDET_STS_SHIFT   12 /* MICDET_STS */

Definition at line 4939 of file registers.h.

#define ARIZONA_MICDET_STS_WIDTH   1 /* MICDET_STS */

Definition at line 4940 of file registers.h.

#define ARIZONA_MICMIX_INPUT_1_SOURCE   0x660

Definition at line 305 of file registers.h.

#define ARIZONA_MICMIX_INPUT_1_VOLUME   0x661

Definition at line 306 of file registers.h.

#define ARIZONA_MICMIX_INPUT_2_SOURCE   0x662

Definition at line 307 of file registers.h.

#define ARIZONA_MICMIX_INPUT_2_VOLUME   0x663

Definition at line 308 of file registers.h.

#define ARIZONA_MICMIX_INPUT_3_SOURCE   0x664

Definition at line 309 of file registers.h.

#define ARIZONA_MICMIX_INPUT_3_VOLUME   0x665

Definition at line 310 of file registers.h.

#define ARIZONA_MICMIX_INPUT_4_SOURCE   0x666

Definition at line 311 of file registers.h.

#define ARIZONA_MICMIX_INPUT_4_VOLUME   0x667

Definition at line 312 of file registers.h.

#define ARIZONA_MICMUTE_MIX_ENA   0x0040 /* MICMUTE_MIX_ENA */

Definition at line 2104 of file registers.h.

#define ARIZONA_MICMUTE_MIX_ENA_MASK   0x0040 /* MICMUTE_MIX_ENA */

Definition at line 2105 of file registers.h.

#define ARIZONA_MICMUTE_MIX_ENA_SHIFT   6 /* MICMUTE_MIX_ENA */

Definition at line 2106 of file registers.h.

#define ARIZONA_MICMUTE_MIX_ENA_WIDTH   1 /* MICMUTE_MIX_ENA */

Definition at line 2107 of file registers.h.

#define ARIZONA_MICMUTE_RATE_MASK   0x7800 /* MICMUTE_RATE - [14:11] */

Definition at line 2101 of file registers.h.

#define ARIZONA_MICMUTE_RATE_SHIFT   11 /* MICMUTE_RATE - [14:11] */

Definition at line 2102 of file registers.h.

#define ARIZONA_MICMUTE_RATE_WIDTH   4 /* MICMUTE_RATE - [14:11] */

Definition at line 2103 of file registers.h.

#define ARIZONA_MISC_PAD_CTRL_1   0xC20

Definition at line 802 of file registers.h.

#define ARIZONA_MISC_PAD_CTRL_10   0xC33

Definition at line 811 of file registers.h.

#define ARIZONA_MISC_PAD_CTRL_11   0xC34

Definition at line 812 of file registers.h.

#define ARIZONA_MISC_PAD_CTRL_12   0xC35

Definition at line 813 of file registers.h.

#define ARIZONA_MISC_PAD_CTRL_13   0xC36

Definition at line 814 of file registers.h.

#define ARIZONA_MISC_PAD_CTRL_14   0xC37

Definition at line 815 of file registers.h.

#define ARIZONA_MISC_PAD_CTRL_15   0xC38

Definition at line 816 of file registers.h.

#define ARIZONA_MISC_PAD_CTRL_16   0xC39

Definition at line 817 of file registers.h.

#define ARIZONA_MISC_PAD_CTRL_17   0xC3A

Definition at line 818 of file registers.h.

#define ARIZONA_MISC_PAD_CTRL_18   0xC3B

Definition at line 819 of file registers.h.

#define ARIZONA_MISC_PAD_CTRL_2   0xC21

Definition at line 803 of file registers.h.

#define ARIZONA_MISC_PAD_CTRL_3   0xC22

Definition at line 804 of file registers.h.

#define ARIZONA_MISC_PAD_CTRL_4   0xC23

Definition at line 805 of file registers.h.

#define ARIZONA_MISC_PAD_CTRL_5   0xC24

Definition at line 806 of file registers.h.

#define ARIZONA_MISC_PAD_CTRL_6   0xC25

Definition at line 807 of file registers.h.

#define ARIZONA_MISC_PAD_CTRL_7   0xC30

Definition at line 808 of file registers.h.

#define ARIZONA_MISC_PAD_CTRL_8   0xC31

Definition at line 809 of file registers.h.

#define ARIZONA_MISC_PAD_CTRL_9   0xC32

Definition at line 810 of file registers.h.

#define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1   0x0400 /* MIXER_DROPPED_SAMPLE_EINT1 */

Definition at line 4340 of file registers.h.

#define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1_MASK   0x0400 /* MIXER_DROPPED_SAMPLE_EINT1 */

Definition at line 4341 of file registers.h.

#define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1_SHIFT   10 /* MIXER_DROPPED_SAMPLE_EINT1 */

Definition at line 4342 of file registers.h.

#define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1_WIDTH   1 /* MIXER_DROPPED_SAMPLE_EINT1 */

Definition at line 4343 of file registers.h.

#define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2   0x0400 /* MIXER_DROPPED_SAMPLE_EINT2 */

Definition at line 4684 of file registers.h.

#define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2_MASK   0x0400 /* MIXER_DROPPED_SAMPLE_EINT2 */

Definition at line 4685 of file registers.h.

#define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2_SHIFT   10 /* MIXER_DROPPED_SAMPLE_EINT2 */

Definition at line 4686 of file registers.h.

#define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2_WIDTH   1 /* MIXER_DROPPED_SAMPLE_EINT2 */

Definition at line 4687 of file registers.h.

#define ARIZONA_MIXER_DROPPED_SAMPLE_STS   0x0400 /* MIXER_DROPPED_SAMPLE_STS */

Definition at line 5009 of file registers.h.

#define ARIZONA_MIXER_DROPPED_SAMPLE_STS_MASK   0x0400 /* MIXER_DROPPED_SAMPLE_STS */

Definition at line 5010 of file registers.h.

#define ARIZONA_MIXER_DROPPED_SAMPLE_STS_SHIFT   10 /* MIXER_DROPPED_SAMPLE_STS */

Definition at line 5011 of file registers.h.

#define ARIZONA_MIXER_DROPPED_SAMPLE_STS_WIDTH   1 /* MIXER_DROPPED_SAMPLE_STS */

Definition at line 5012 of file registers.h.

#define ARIZONA_MIXER_OVERCLOCKED_STS   0x0080 /* MIXER_OVERCLOCKED_STS */

Definition at line 5077 of file registers.h.

#define ARIZONA_MIXER_OVERCLOCKED_STS_MASK   0x0080 /* MIXER_OVERCLOCKED_STS */

Definition at line 5078 of file registers.h.

#define ARIZONA_MIXER_OVERCLOCKED_STS_SHIFT   7 /* MIXER_OVERCLOCKED_STS */

Definition at line 5079 of file registers.h.

#define ARIZONA_MIXER_OVERCLOCKED_STS_WIDTH   1 /* MIXER_OVERCLOCKED_STS */

Definition at line 5080 of file registers.h.

#define ARIZONA_MIXER_UNDERCLOCKED_STS   0x0001 /* MIXER_UNDERCLOCKED_STS */

Definition at line 5193 of file registers.h.

#define ARIZONA_MIXER_UNDERCLOCKED_STS_MASK   0x0001 /* MIXER_UNDERCLOCKED_STS */

Definition at line 5194 of file registers.h.

#define ARIZONA_MIXER_UNDERCLOCKED_STS_SHIFT   0 /* MIXER_UNDERCLOCKED_STS */

Definition at line 5195 of file registers.h.

#define ARIZONA_MIXER_UNDERCLOCKED_STS_WIDTH   1 /* MIXER_UNDERCLOCKED_STS */

Definition at line 5196 of file registers.h.

#define ARIZONA_NGATE_ENA   0x0001 /* NGATE_ENA */

Definition at line 3049 of file registers.h.

#define ARIZONA_NGATE_ENA_MASK   0x0001 /* NGATE_ENA */

Definition at line 3050 of file registers.h.

#define ARIZONA_NGATE_ENA_SHIFT   0 /* NGATE_ENA */

Definition at line 3051 of file registers.h.

#define ARIZONA_NGATE_ENA_WIDTH   1 /* NGATE_ENA */

Definition at line 3052 of file registers.h.

#define ARIZONA_NGATE_HOLD_MASK   0x0030 /* NGATE_HOLD - [5:4] */

Definition at line 3043 of file registers.h.

#define ARIZONA_NGATE_HOLD_SHIFT   4 /* NGATE_HOLD - [5:4] */

Definition at line 3044 of file registers.h.

#define ARIZONA_NGATE_HOLD_WIDTH   2 /* NGATE_HOLD - [5:4] */

Definition at line 3045 of file registers.h.

#define ARIZONA_NGATE_THR_MASK   0x000E /* NGATE_THR - [3:1] */

Definition at line 3046 of file registers.h.

#define ARIZONA_NGATE_THR_SHIFT   1 /* NGATE_THR - [3:1] */

Definition at line 3047 of file registers.h.

#define ARIZONA_NGATE_THR_WIDTH   3 /* NGATE_THR - [3:1] */

Definition at line 3048 of file registers.h.

#define ARIZONA_NOISE_GATE_CONTROL   0x458

Definition at line 207 of file registers.h.

#define ARIZONA_NOISE_GATE_SELECT_1L   0x413

Definition at line 161 of file registers.h.

#define ARIZONA_NOISE_GATE_SELECT_1R   0x417

Definition at line 165 of file registers.h.

#define ARIZONA_NOISE_GATE_SELECT_2L   0x41B

Definition at line 169 of file registers.h.

#define ARIZONA_NOISE_GATE_SELECT_2R   0x41F

Definition at line 173 of file registers.h.

#define ARIZONA_NOISE_GATE_SELECT_3L   0x423

Definition at line 177 of file registers.h.

#define ARIZONA_NOISE_GATE_SELECT_3R   0x427

Definition at line 181 of file registers.h.

#define ARIZONA_NOISE_GATE_SELECT_4L   0x42B

Definition at line 185 of file registers.h.

#define ARIZONA_NOISE_GATE_SELECT_4R   0x42F

Definition at line 189 of file registers.h.

#define ARIZONA_NOISE_GATE_SELECT_5L   0x433

Definition at line 193 of file registers.h.

#define ARIZONA_NOISE_GATE_SELECT_5R   0x437

Definition at line 197 of file registers.h.

#define ARIZONA_NOISE_GATE_SELECT_6L   0x43B

Definition at line 201 of file registers.h.

#define ARIZONA_NOISE_GATE_SELECT_6R   0x43F

Definition at line 205 of file registers.h.

#define ARIZONA_NOISE_GEN_ENA   0x0020 /* NOISE_GEN_ENA */

Definition at line 1323 of file registers.h.

#define ARIZONA_NOISE_GEN_ENA_MASK   0x0020 /* NOISE_GEN_ENA */

Definition at line 1324 of file registers.h.

#define ARIZONA_NOISE_GEN_ENA_SHIFT   5 /* NOISE_GEN_ENA */

Definition at line 1325 of file registers.h.

#define ARIZONA_NOISE_GEN_ENA_WIDTH   1 /* NOISE_GEN_ENA */

Definition at line 1326 of file registers.h.

#define ARIZONA_NOISE_GEN_GAIN_MASK   0x001F /* NOISE_GEN_GAIN - [4:0] */

Definition at line 1327 of file registers.h.

#define ARIZONA_NOISE_GEN_GAIN_SHIFT   0 /* NOISE_GEN_GAIN - [4:0] */

Definition at line 1328 of file registers.h.

#define ARIZONA_NOISE_GEN_GAIN_WIDTH   5 /* NOISE_GEN_GAIN - [4:0] */

Definition at line 1329 of file registers.h.

#define ARIZONA_NOISE_GEN_RATE_MASK   0x7800 /* NOISE_GEN_RATE - [14:11] */

Definition at line 1320 of file registers.h.

#define ARIZONA_NOISE_GEN_RATE_SHIFT   11 /* NOISE_GEN_RATE - [14:11] */

Definition at line 1321 of file registers.h.

#define ARIZONA_NOISE_GEN_RATE_WIDTH   4 /* NOISE_GEN_RATE - [14:11] */

Definition at line 1322 of file registers.h.

#define ARIZONA_NOISEMIX_INPUT_1_SOURCE   0x668

Definition at line 313 of file registers.h.

#define ARIZONA_NOISEMIX_INPUT_1_VOLUME   0x669

Definition at line 314 of file registers.h.

#define ARIZONA_NOISEMIX_INPUT_2_SOURCE   0x66A

Definition at line 315 of file registers.h.

#define ARIZONA_NOISEMIX_INPUT_2_VOLUME   0x66B

Definition at line 316 of file registers.h.

#define ARIZONA_NOISEMIX_INPUT_3_SOURCE   0x66C

Definition at line 317 of file registers.h.

#define ARIZONA_NOISEMIX_INPUT_3_VOLUME   0x66D

Definition at line 318 of file registers.h.

#define ARIZONA_NOISEMIX_INPUT_4_SOURCE   0x66E

Definition at line 319 of file registers.h.

#define ARIZONA_NOISEMIX_INPUT_4_VOLUME   0x66F

Definition at line 320 of file registers.h.

#define ARIZONA_ONESHOT_STS   0x0001 /* ONESHOT_STS */

Definition at line 1401 of file registers.h.

#define ARIZONA_ONESHOT_STS_MASK   0x0001 /* ONESHOT_STS */

Definition at line 1402 of file registers.h.

#define ARIZONA_ONESHOT_STS_SHIFT   0 /* ONESHOT_STS */

Definition at line 1403 of file registers.h.

#define ARIZONA_ONESHOT_STS_WIDTH   1 /* ONESHOT_STS */

Definition at line 1404 of file registers.h.

#define ARIZONA_ONESHOT_TRIG   0x0010 /* ONESHOT_TRIG */

Definition at line 1337 of file registers.h.

#define ARIZONA_ONESHOT_TRIG_MASK   0x0010 /* ONESHOT_TRIG */

Definition at line 1338 of file registers.h.

#define ARIZONA_ONESHOT_TRIG_SHIFT   4 /* ONESHOT_TRIG */

Definition at line 1339 of file registers.h.

#define ARIZONA_ONESHOT_TRIG_WIDTH   1 /* ONESHOT_TRIG */

Definition at line 1340 of file registers.h.

#define ARIZONA_OPCLK_ASYNC_DIV_MASK   0x00F8 /* OPCLK_ASYNC_DIV - [7:3] */

Definition at line 1526 of file registers.h.

#define ARIZONA_OPCLK_ASYNC_DIV_SHIFT   3 /* OPCLK_ASYNC_DIV - [7:3] */

Definition at line 1527 of file registers.h.

#define ARIZONA_OPCLK_ASYNC_DIV_WIDTH   5 /* OPCLK_ASYNC_DIV - [7:3] */

Definition at line 1528 of file registers.h.

#define ARIZONA_OPCLK_ASYNC_ENA   0x8000 /* OPCLK_ASYNC_ENA */

Definition at line 1522 of file registers.h.

#define ARIZONA_OPCLK_ASYNC_ENA_MASK   0x8000 /* OPCLK_ASYNC_ENA */

Definition at line 1523 of file registers.h.

#define ARIZONA_OPCLK_ASYNC_ENA_SHIFT   15 /* OPCLK_ASYNC_ENA */

Definition at line 1524 of file registers.h.

#define ARIZONA_OPCLK_ASYNC_ENA_WIDTH   1 /* OPCLK_ASYNC_ENA */

Definition at line 1525 of file registers.h.

#define ARIZONA_OPCLK_ASYNC_SEL_MASK   0x0007 /* OPCLK_ASYNC_SEL - [2:0] */

Definition at line 1529 of file registers.h.

#define ARIZONA_OPCLK_ASYNC_SEL_SHIFT   0 /* OPCLK_ASYNC_SEL - [2:0] */

Definition at line 1530 of file registers.h.

#define ARIZONA_OPCLK_ASYNC_SEL_WIDTH   3 /* OPCLK_ASYNC_SEL - [2:0] */

Definition at line 1531 of file registers.h.

#define ARIZONA_OPCLK_DIV_MASK   0x00F8 /* OPCLK_DIV - [7:3] */

Definition at line 1512 of file registers.h.

#define ARIZONA_OPCLK_DIV_SHIFT   3 /* OPCLK_DIV - [7:3] */

Definition at line 1513 of file registers.h.

#define ARIZONA_OPCLK_DIV_WIDTH   5 /* OPCLK_DIV - [7:3] */

Definition at line 1514 of file registers.h.

#define ARIZONA_OPCLK_ENA   0x8000 /* OPCLK_ENA */

Definition at line 1508 of file registers.h.

#define ARIZONA_OPCLK_ENA_MASK   0x8000 /* OPCLK_ENA */

Definition at line 1509 of file registers.h.

#define ARIZONA_OPCLK_ENA_SHIFT   15 /* OPCLK_ENA */

Definition at line 1510 of file registers.h.

#define ARIZONA_OPCLK_ENA_WIDTH   1 /* OPCLK_ENA */

Definition at line 1511 of file registers.h.

#define ARIZONA_OPCLK_SEL_MASK   0x0007 /* OPCLK_SEL - [2:0] */

Definition at line 1515 of file registers.h.

#define ARIZONA_OPCLK_SEL_SHIFT   0 /* OPCLK_SEL - [2:0] */

Definition at line 1516 of file registers.h.

#define ARIZONA_OPCLK_SEL_WIDTH   3 /* OPCLK_SEL - [2:0] */

Definition at line 1517 of file registers.h.

#define ARIZONA_OUT1_LP_MODE   0x8000 /* OUT1_LP_MODE */

Definition at line 2537 of file registers.h.

#define ARIZONA_OUT1_LP_MODE_MASK   0x8000 /* OUT1_LP_MODE */

Definition at line 2538 of file registers.h.

#define ARIZONA_OUT1_LP_MODE_SHIFT   15 /* OUT1_LP_MODE */

Definition at line 2539 of file registers.h.

#define ARIZONA_OUT1_LP_MODE_WIDTH   1 /* OUT1_LP_MODE */

Definition at line 2540 of file registers.h.

#define ARIZONA_OUT1_MONO   0x1000 /* OUT1_MONO */

Definition at line 2545 of file registers.h.

#define ARIZONA_OUT1_MONO_MASK   0x1000 /* OUT1_MONO */

Definition at line 2546 of file registers.h.

#define ARIZONA_OUT1_MONO_SHIFT   12 /* OUT1_MONO */

Definition at line 2547 of file registers.h.

#define ARIZONA_OUT1_MONO_WIDTH   1 /* OUT1_MONO */

Definition at line 2548 of file registers.h.

#define ARIZONA_OUT1_OSR   0x2000 /* OUT1_OSR */

Definition at line 2541 of file registers.h.

#define ARIZONA_OUT1_OSR_MASK   0x2000 /* OUT1_OSR */

Definition at line 2542 of file registers.h.

#define ARIZONA_OUT1_OSR_SHIFT   13 /* OUT1_OSR */

Definition at line 2543 of file registers.h.

#define ARIZONA_OUT1_OSR_WIDTH   1 /* OUT1_OSR */

Definition at line 2544 of file registers.h.

#define ARIZONA_OUT1L_ANC_SRC_MASK   0x0C00 /* OUT1L_ANC_SRC - [11:10] */

Definition at line 2549 of file registers.h.

#define ARIZONA_OUT1L_ANC_SRC_SHIFT   10 /* OUT1L_ANC_SRC - [11:10] */

Definition at line 2550 of file registers.h.

#define ARIZONA_OUT1L_ANC_SRC_WIDTH   2 /* OUT1L_ANC_SRC - [11:10] */

Definition at line 2551 of file registers.h.

#define ARIZONA_OUT1L_ENA   0x0002 /* OUT1L_ENA */

Definition at line 2480 of file registers.h.

#define ARIZONA_OUT1L_ENA_MASK   0x0002 /* OUT1L_ENA */

Definition at line 2481 of file registers.h.

#define ARIZONA_OUT1L_ENA_SHIFT   1 /* OUT1L_ENA */

Definition at line 2482 of file registers.h.

#define ARIZONA_OUT1L_ENA_WIDTH   1 /* OUT1L_ENA */

Definition at line 2483 of file registers.h.

#define ARIZONA_OUT1L_MUTE   0x0100 /* OUT1L_MUTE */

Definition at line 2563 of file registers.h.

#define ARIZONA_OUT1L_MUTE_MASK   0x0100 /* OUT1L_MUTE */

Definition at line 2564 of file registers.h.

#define ARIZONA_OUT1L_MUTE_SHIFT   8 /* OUT1L_MUTE */

Definition at line 2565 of file registers.h.

#define ARIZONA_OUT1L_MUTE_WIDTH   1 /* OUT1L_MUTE */

Definition at line 2566 of file registers.h.

#define ARIZONA_OUT1L_NGATE_SRC_MASK   0x0FFF /* OUT1L_NGATE_SRC - [11:0] */

Definition at line 2581 of file registers.h.

#define ARIZONA_OUT1L_NGATE_SRC_SHIFT   0 /* OUT1L_NGATE_SRC - [11:0] */

Definition at line 2582 of file registers.h.

#define ARIZONA_OUT1L_NGATE_SRC_WIDTH   12 /* OUT1L_NGATE_SRC - [11:0] */

Definition at line 2583 of file registers.h.

#define ARIZONA_OUT1L_PGA_VOL_MASK   0x00FE /* OUT1L_PGA_VOL - [7:1] */

Definition at line 2552 of file registers.h.

#define ARIZONA_OUT1L_PGA_VOL_SHIFT   1 /* OUT1L_PGA_VOL - [7:1] */

Definition at line 2553 of file registers.h.

#define ARIZONA_OUT1L_PGA_VOL_WIDTH   7 /* OUT1L_PGA_VOL - [7:1] */

Definition at line 2554 of file registers.h.

#define ARIZONA_OUT1L_VOL_LIM_MASK   0x00FF /* OUT1L_VOL_LIM - [7:0] */

Definition at line 2574 of file registers.h.

#define ARIZONA_OUT1L_VOL_LIM_SHIFT   0 /* OUT1L_VOL_LIM - [7:0] */

Definition at line 2575 of file registers.h.

#define ARIZONA_OUT1L_VOL_LIM_WIDTH   8 /* OUT1L_VOL_LIM - [7:0] */

Definition at line 2576 of file registers.h.

#define ARIZONA_OUT1L_VOL_MASK   0x00FF /* OUT1L_VOL - [7:0] */

Definition at line 2567 of file registers.h.

#define ARIZONA_OUT1L_VOL_SHIFT   0 /* OUT1L_VOL - [7:0] */

Definition at line 2568 of file registers.h.

#define ARIZONA_OUT1L_VOL_WIDTH   8 /* OUT1L_VOL - [7:0] */

Definition at line 2569 of file registers.h.

#define ARIZONA_OUT1LMIX_INPUT_1_SOURCE   0x680

Definition at line 321 of file registers.h.

#define ARIZONA_OUT1LMIX_INPUT_1_VOLUME   0x681

Definition at line 322 of file registers.h.

#define ARIZONA_OUT1LMIX_INPUT_2_SOURCE   0x682

Definition at line 323 of file registers.h.

#define ARIZONA_OUT1LMIX_INPUT_2_VOLUME   0x683

Definition at line 324 of file registers.h.

#define ARIZONA_OUT1LMIX_INPUT_3_SOURCE   0x684

Definition at line 325 of file registers.h.

#define ARIZONA_OUT1LMIX_INPUT_3_VOLUME   0x685

Definition at line 326 of file registers.h.

#define ARIZONA_OUT1LMIX_INPUT_4_SOURCE   0x686

Definition at line 327 of file registers.h.

#define ARIZONA_OUT1LMIX_INPUT_4_VOLUME   0x687

Definition at line 328 of file registers.h.

#define ARIZONA_OUT1R_ANC_SRC_MASK   0x0C00 /* OUT1R_ANC_SRC - [11:10] */

Definition at line 2588 of file registers.h.

#define ARIZONA_OUT1R_ANC_SRC_SHIFT   10 /* OUT1R_ANC_SRC - [11:10] */

Definition at line 2589 of file registers.h.

#define ARIZONA_OUT1R_ANC_SRC_WIDTH   2 /* OUT1R_ANC_SRC - [11:10] */

Definition at line 2590 of file registers.h.

#define ARIZONA_OUT1R_ENA   0x0001 /* OUT1R_ENA */

Definition at line 2484 of file registers.h.

#define ARIZONA_OUT1R_ENA_MASK   0x0001 /* OUT1R_ENA */

Definition at line 2485 of file registers.h.

#define ARIZONA_OUT1R_ENA_SHIFT   0 /* OUT1R_ENA */

Definition at line 2486 of file registers.h.

#define ARIZONA_OUT1R_ENA_WIDTH   1 /* OUT1R_ENA */

Definition at line 2487 of file registers.h.

#define ARIZONA_OUT1R_MUTE   0x0100 /* OUT1R_MUTE */

Definition at line 2602 of file registers.h.

#define ARIZONA_OUT1R_MUTE_MASK   0x0100 /* OUT1R_MUTE */

Definition at line 2603 of file registers.h.

#define ARIZONA_OUT1R_MUTE_SHIFT   8 /* OUT1R_MUTE */

Definition at line 2604 of file registers.h.

#define ARIZONA_OUT1R_MUTE_WIDTH   1 /* OUT1R_MUTE */

Definition at line 2605 of file registers.h.

#define ARIZONA_OUT1R_NGATE_SRC_MASK   0x0FFF /* OUT1R_NGATE_SRC - [11:0] */

Definition at line 2620 of file registers.h.

#define ARIZONA_OUT1R_NGATE_SRC_SHIFT   0 /* OUT1R_NGATE_SRC - [11:0] */

Definition at line 2621 of file registers.h.

#define ARIZONA_OUT1R_NGATE_SRC_WIDTH   12 /* OUT1R_NGATE_SRC - [11:0] */

Definition at line 2622 of file registers.h.

#define ARIZONA_OUT1R_PGA_VOL_MASK   0x00FE /* OUT1R_PGA_VOL - [7:1] */

Definition at line 2591 of file registers.h.

#define ARIZONA_OUT1R_PGA_VOL_SHIFT   1 /* OUT1R_PGA_VOL - [7:1] */

Definition at line 2592 of file registers.h.

#define ARIZONA_OUT1R_PGA_VOL_WIDTH   7 /* OUT1R_PGA_VOL - [7:1] */

Definition at line 2593 of file registers.h.

#define ARIZONA_OUT1R_VOL_LIM_MASK   0x00FF /* OUT1R_VOL_LIM - [7:0] */

Definition at line 2613 of file registers.h.

#define ARIZONA_OUT1R_VOL_LIM_SHIFT   0 /* OUT1R_VOL_LIM - [7:0] */

Definition at line 2614 of file registers.h.

#define ARIZONA_OUT1R_VOL_LIM_WIDTH   8 /* OUT1R_VOL_LIM - [7:0] */

Definition at line 2615 of file registers.h.

#define ARIZONA_OUT1R_VOL_MASK   0x00FF /* OUT1R_VOL - [7:0] */

Definition at line 2606 of file registers.h.

#define ARIZONA_OUT1R_VOL_SHIFT   0 /* OUT1R_VOL - [7:0] */

Definition at line 2607 of file registers.h.

#define ARIZONA_OUT1R_VOL_WIDTH   8 /* OUT1R_VOL - [7:0] */

Definition at line 2608 of file registers.h.

#define ARIZONA_OUT1RMIX_INPUT_1_SOURCE   0x688

Definition at line 329 of file registers.h.

#define ARIZONA_OUT1RMIX_INPUT_1_VOLUME   0x689

Definition at line 330 of file registers.h.

#define ARIZONA_OUT1RMIX_INPUT_2_SOURCE   0x68A

Definition at line 331 of file registers.h.

#define ARIZONA_OUT1RMIX_INPUT_2_VOLUME   0x68B

Definition at line 332 of file registers.h.

#define ARIZONA_OUT1RMIX_INPUT_3_SOURCE   0x68C

Definition at line 333 of file registers.h.

#define ARIZONA_OUT1RMIX_INPUT_3_VOLUME   0x68D

Definition at line 334 of file registers.h.

#define ARIZONA_OUT1RMIX_INPUT_4_SOURCE   0x68E

Definition at line 335 of file registers.h.

#define ARIZONA_OUT1RMIX_INPUT_4_VOLUME   0x68F

Definition at line 336 of file registers.h.

#define ARIZONA_OUT2_LP_MODE   0x8000 /* OUT2_LP_MODE */

Definition at line 2627 of file registers.h.

#define ARIZONA_OUT2_LP_MODE_MASK   0x8000 /* OUT2_LP_MODE */

Definition at line 2628 of file registers.h.

#define ARIZONA_OUT2_LP_MODE_SHIFT   15 /* OUT2_LP_MODE */

Definition at line 2629 of file registers.h.

#define ARIZONA_OUT2_LP_MODE_WIDTH   1 /* OUT2_LP_MODE */

Definition at line 2630 of file registers.h.

#define ARIZONA_OUT2_MONO   0x1000 /* OUT2_MONO */

Definition at line 2635 of file registers.h.

#define ARIZONA_OUT2_MONO_MASK   0x1000 /* OUT2_MONO */

Definition at line 2636 of file registers.h.

#define ARIZONA_OUT2_MONO_SHIFT   12 /* OUT2_MONO */

Definition at line 2637 of file registers.h.

#define ARIZONA_OUT2_MONO_WIDTH   1 /* OUT2_MONO */

Definition at line 2638 of file registers.h.

#define ARIZONA_OUT2_OSR   0x2000 /* OUT2_OSR */

Definition at line 2631 of file registers.h.

#define ARIZONA_OUT2_OSR_MASK   0x2000 /* OUT2_OSR */

Definition at line 2632 of file registers.h.

#define ARIZONA_OUT2_OSR_SHIFT   13 /* OUT2_OSR */

Definition at line 2633 of file registers.h.

#define ARIZONA_OUT2_OSR_WIDTH   1 /* OUT2_OSR */

Definition at line 2634 of file registers.h.

#define ARIZONA_OUT2L_ANC_SRC_MASK   0x0C00 /* OUT2L_ANC_SRC - [11:10] */

Definition at line 2639 of file registers.h.

#define ARIZONA_OUT2L_ANC_SRC_SHIFT   10 /* OUT2L_ANC_SRC - [11:10] */

Definition at line 2640 of file registers.h.

#define ARIZONA_OUT2L_ANC_SRC_WIDTH   2 /* OUT2L_ANC_SRC - [11:10] */

Definition at line 2641 of file registers.h.

#define ARIZONA_OUT2L_ENA   0x0008 /* OUT2L_ENA */

Definition at line 2472 of file registers.h.

#define ARIZONA_OUT2L_ENA_MASK   0x0008 /* OUT2L_ENA */

Definition at line 2473 of file registers.h.

#define ARIZONA_OUT2L_ENA_SHIFT   3 /* OUT2L_ENA */

Definition at line 2474 of file registers.h.

#define ARIZONA_OUT2L_ENA_WIDTH   1 /* OUT2L_ENA */

Definition at line 2475 of file registers.h.

#define ARIZONA_OUT2L_MUTE   0x0100 /* OUT2L_MUTE */

Definition at line 2653 of file registers.h.

#define ARIZONA_OUT2L_MUTE_MASK   0x0100 /* OUT2L_MUTE */

Definition at line 2654 of file registers.h.

#define ARIZONA_OUT2L_MUTE_SHIFT   8 /* OUT2L_MUTE */

Definition at line 2655 of file registers.h.

#define ARIZONA_OUT2L_MUTE_WIDTH   1 /* OUT2L_MUTE */

Definition at line 2656 of file registers.h.

#define ARIZONA_OUT2L_NGATE_SRC_MASK   0x0FFF /* OUT2L_NGATE_SRC - [11:0] */

Definition at line 2671 of file registers.h.

#define ARIZONA_OUT2L_NGATE_SRC_SHIFT   0 /* OUT2L_NGATE_SRC - [11:0] */

Definition at line 2672 of file registers.h.

#define ARIZONA_OUT2L_NGATE_SRC_WIDTH   12 /* OUT2L_NGATE_SRC - [11:0] */

Definition at line 2673 of file registers.h.

#define ARIZONA_OUT2L_PGA_VOL_MASK   0x00FE /* OUT2L_PGA_VOL - [7:1] */

Definition at line 2642 of file registers.h.

#define ARIZONA_OUT2L_PGA_VOL_SHIFT   1 /* OUT2L_PGA_VOL - [7:1] */

Definition at line 2643 of file registers.h.

#define ARIZONA_OUT2L_PGA_VOL_WIDTH   7 /* OUT2L_PGA_VOL - [7:1] */

Definition at line 2644 of file registers.h.

#define ARIZONA_OUT2L_VOL_LIM_MASK   0x00FF /* OUT2L_VOL_LIM - [7:0] */

Definition at line 2664 of file registers.h.

#define ARIZONA_OUT2L_VOL_LIM_SHIFT   0 /* OUT2L_VOL_LIM - [7:0] */

Definition at line 2665 of file registers.h.

#define ARIZONA_OUT2L_VOL_LIM_WIDTH   8 /* OUT2L_VOL_LIM - [7:0] */

Definition at line 2666 of file registers.h.

#define ARIZONA_OUT2L_VOL_MASK   0x00FF /* OUT2L_VOL - [7:0] */

Definition at line 2657 of file registers.h.

#define ARIZONA_OUT2L_VOL_SHIFT   0 /* OUT2L_VOL - [7:0] */

Definition at line 2658 of file registers.h.

#define ARIZONA_OUT2L_VOL_WIDTH   8 /* OUT2L_VOL - [7:0] */

Definition at line 2659 of file registers.h.

#define ARIZONA_OUT2LMIX_INPUT_1_SOURCE   0x690

Definition at line 337 of file registers.h.

#define ARIZONA_OUT2LMIX_INPUT_1_VOLUME   0x691

Definition at line 338 of file registers.h.

#define ARIZONA_OUT2LMIX_INPUT_2_SOURCE   0x692

Definition at line 339 of file registers.h.

#define ARIZONA_OUT2LMIX_INPUT_2_VOLUME   0x693

Definition at line 340 of file registers.h.

#define ARIZONA_OUT2LMIX_INPUT_3_SOURCE   0x694

Definition at line 341 of file registers.h.

#define ARIZONA_OUT2LMIX_INPUT_3_VOLUME   0x695

Definition at line 342 of file registers.h.

#define ARIZONA_OUT2LMIX_INPUT_4_SOURCE   0x696

Definition at line 343 of file registers.h.

#define ARIZONA_OUT2LMIX_INPUT_4_VOLUME   0x697

Definition at line 344 of file registers.h.

#define ARIZONA_OUT2R_ANC_SRC_MASK   0x0C00 /* OUT2R_ANC_SRC - [11:10] */

Definition at line 2678 of file registers.h.

#define ARIZONA_OUT2R_ANC_SRC_SHIFT   10 /* OUT2R_ANC_SRC - [11:10] */

Definition at line 2679 of file registers.h.

#define ARIZONA_OUT2R_ANC_SRC_WIDTH   2 /* OUT2R_ANC_SRC - [11:10] */

Definition at line 2680 of file registers.h.

#define ARIZONA_OUT2R_ENA   0x0004 /* OUT2R_ENA */

Definition at line 2476 of file registers.h.

#define ARIZONA_OUT2R_ENA_MASK   0x0004 /* OUT2R_ENA */

Definition at line 2477 of file registers.h.

#define ARIZONA_OUT2R_ENA_SHIFT   2 /* OUT2R_ENA */

Definition at line 2478 of file registers.h.

#define ARIZONA_OUT2R_ENA_WIDTH   1 /* OUT2R_ENA */

Definition at line 2479 of file registers.h.

#define ARIZONA_OUT2R_MUTE   0x0100 /* OUT2R_MUTE */

Definition at line 2692 of file registers.h.

#define ARIZONA_OUT2R_MUTE_MASK   0x0100 /* OUT2R_MUTE */

Definition at line 2693 of file registers.h.

#define ARIZONA_OUT2R_MUTE_SHIFT   8 /* OUT2R_MUTE */

Definition at line 2694 of file registers.h.

#define ARIZONA_OUT2R_MUTE_WIDTH   1 /* OUT2R_MUTE */

Definition at line 2695 of file registers.h.

#define ARIZONA_OUT2R_NGATE_SRC_MASK   0x0FFF /* OUT2R_NGATE_SRC - [11:0] */

Definition at line 2710 of file registers.h.

#define ARIZONA_OUT2R_NGATE_SRC_SHIFT   0 /* OUT2R_NGATE_SRC - [11:0] */

Definition at line 2711 of file registers.h.

#define ARIZONA_OUT2R_NGATE_SRC_WIDTH   12 /* OUT2R_NGATE_SRC - [11:0] */

Definition at line 2712 of file registers.h.

#define ARIZONA_OUT2R_PGA_VOL_MASK   0x00FE /* OUT2R_PGA_VOL - [7:1] */

Definition at line 2681 of file registers.h.

#define ARIZONA_OUT2R_PGA_VOL_SHIFT   1 /* OUT2R_PGA_VOL - [7:1] */

Definition at line 2682 of file registers.h.

#define ARIZONA_OUT2R_PGA_VOL_WIDTH   7 /* OUT2R_PGA_VOL - [7:1] */

Definition at line 2683 of file registers.h.

#define ARIZONA_OUT2R_VOL_LIM_MASK   0x00FF /* OUT2R_VOL_LIM - [7:0] */

Definition at line 2703 of file registers.h.

#define ARIZONA_OUT2R_VOL_LIM_SHIFT   0 /* OUT2R_VOL_LIM - [7:0] */

Definition at line 2704 of file registers.h.

#define ARIZONA_OUT2R_VOL_LIM_WIDTH   8 /* OUT2R_VOL_LIM - [7:0] */

Definition at line 2705 of file registers.h.

#define ARIZONA_OUT2R_VOL_MASK   0x00FF /* OUT2R_VOL - [7:0] */

Definition at line 2696 of file registers.h.

#define ARIZONA_OUT2R_VOL_SHIFT   0 /* OUT2R_VOL - [7:0] */

Definition at line 2697 of file registers.h.

#define ARIZONA_OUT2R_VOL_WIDTH   8 /* OUT2R_VOL - [7:0] */

Definition at line 2698 of file registers.h.

#define ARIZONA_OUT2RMIX_INPUT_1_SOURCE   0x698

Definition at line 345 of file registers.h.

#define ARIZONA_OUT2RMIX_INPUT_1_VOLUME   0x699

Definition at line 346 of file registers.h.

#define ARIZONA_OUT2RMIX_INPUT_2_SOURCE   0x69A

Definition at line 347 of file registers.h.

#define ARIZONA_OUT2RMIX_INPUT_2_VOLUME   0x69B

Definition at line 348 of file registers.h.

#define ARIZONA_OUT2RMIX_INPUT_3_SOURCE   0x69C

Definition at line 349 of file registers.h.

#define ARIZONA_OUT2RMIX_INPUT_3_VOLUME   0x69D

Definition at line 350 of file registers.h.

#define ARIZONA_OUT2RMIX_INPUT_4_SOURCE   0x69E

Definition at line 351 of file registers.h.

#define ARIZONA_OUT2RMIX_INPUT_4_VOLUME   0x69F

Definition at line 352 of file registers.h.

#define ARIZONA_OUT3_LP_MODE   0x8000 /* OUT3_LP_MODE */

Definition at line 2717 of file registers.h.

#define ARIZONA_OUT3_LP_MODE_MASK   0x8000 /* OUT3_LP_MODE */

Definition at line 2718 of file registers.h.

#define ARIZONA_OUT3_LP_MODE_SHIFT   15 /* OUT3_LP_MODE */

Definition at line 2719 of file registers.h.

#define ARIZONA_OUT3_LP_MODE_WIDTH   1 /* OUT3_LP_MODE */

Definition at line 2720 of file registers.h.

#define ARIZONA_OUT3_MONO   0x1000 /* OUT3_MONO */

Definition at line 2725 of file registers.h.

#define ARIZONA_OUT3_MONO_MASK   0x1000 /* OUT3_MONO */

Definition at line 2726 of file registers.h.

#define ARIZONA_OUT3_MONO_SHIFT   12 /* OUT3_MONO */

Definition at line 2727 of file registers.h.

#define ARIZONA_OUT3_MONO_WIDTH   1 /* OUT3_MONO */

Definition at line 2728 of file registers.h.

#define ARIZONA_OUT3_NGATE_SRC_MASK   0x0FFF /* OUT3_NGATE_SRC - [11:0] */

Definition at line 2761 of file registers.h.

#define ARIZONA_OUT3_NGATE_SRC_SHIFT   0 /* OUT3_NGATE_SRC - [11:0] */

Definition at line 2762 of file registers.h.

#define ARIZONA_OUT3_NGATE_SRC_WIDTH   12 /* OUT3_NGATE_SRC - [11:0] */

Definition at line 2763 of file registers.h.

#define ARIZONA_OUT3_OSR   0x2000 /* OUT3_OSR */

Definition at line 2721 of file registers.h.

#define ARIZONA_OUT3_OSR_MASK   0x2000 /* OUT3_OSR */

Definition at line 2722 of file registers.h.

#define ARIZONA_OUT3_OSR_SHIFT   13 /* OUT3_OSR */

Definition at line 2723 of file registers.h.

#define ARIZONA_OUT3_OSR_WIDTH   1 /* OUT3_OSR */

Definition at line 2724 of file registers.h.

#define ARIZONA_OUT3L_ANC_SRC_MASK   0x0C00 /* OUT3L_ANC_SRC - [11:10] */

Definition at line 2729 of file registers.h.

#define ARIZONA_OUT3L_ANC_SRC_SHIFT   10 /* OUT3L_ANC_SRC - [11:10] */

Definition at line 2730 of file registers.h.

#define ARIZONA_OUT3L_ANC_SRC_WIDTH   2 /* OUT3L_ANC_SRC - [11:10] */

Definition at line 2731 of file registers.h.

#define ARIZONA_OUT3L_ENA   0x0020 /* OUT3L_ENA */

Definition at line 2464 of file registers.h.

#define ARIZONA_OUT3L_ENA_MASK   0x0020 /* OUT3L_ENA */

Definition at line 2465 of file registers.h.

#define ARIZONA_OUT3L_ENA_SHIFT   5 /* OUT3L_ENA */

Definition at line 2466 of file registers.h.

#define ARIZONA_OUT3L_ENA_WIDTH   1 /* OUT3L_ENA */

Definition at line 2467 of file registers.h.

#define ARIZONA_OUT3L_MUTE   0x0100 /* OUT3L_MUTE */

Definition at line 2743 of file registers.h.

#define ARIZONA_OUT3L_MUTE_MASK   0x0100 /* OUT3L_MUTE */

Definition at line 2744 of file registers.h.

#define ARIZONA_OUT3L_MUTE_SHIFT   8 /* OUT3L_MUTE */

Definition at line 2745 of file registers.h.

#define ARIZONA_OUT3L_MUTE_WIDTH   1 /* OUT3L_MUTE */

Definition at line 2746 of file registers.h.

#define ARIZONA_OUT3L_PGA_VOL_MASK   0x00FE /* OUT3L_PGA_VOL - [7:1] */

Definition at line 2732 of file registers.h.

#define ARIZONA_OUT3L_PGA_VOL_SHIFT   1 /* OUT3L_PGA_VOL - [7:1] */

Definition at line 2733 of file registers.h.

#define ARIZONA_OUT3L_PGA_VOL_WIDTH   7 /* OUT3L_PGA_VOL - [7:1] */

Definition at line 2734 of file registers.h.

#define ARIZONA_OUT3L_VOL_LIM_MASK   0x00FF /* OUT3L_VOL_LIM - [7:0] */

Definition at line 2754 of file registers.h.

#define ARIZONA_OUT3L_VOL_LIM_SHIFT   0 /* OUT3L_VOL_LIM - [7:0] */

Definition at line 2755 of file registers.h.

#define ARIZONA_OUT3L_VOL_LIM_WIDTH   8 /* OUT3L_VOL_LIM - [7:0] */

Definition at line 2756 of file registers.h.

#define ARIZONA_OUT3L_VOL_MASK   0x00FF /* OUT3L_VOL - [7:0] */

Definition at line 2747 of file registers.h.

#define ARIZONA_OUT3L_VOL_SHIFT   0 /* OUT3L_VOL - [7:0] */

Definition at line 2748 of file registers.h.

#define ARIZONA_OUT3L_VOL_WIDTH   8 /* OUT3L_VOL - [7:0] */

Definition at line 2749 of file registers.h.

#define ARIZONA_OUT3LMIX_INPUT_1_SOURCE   0x6A0

Definition at line 353 of file registers.h.

#define ARIZONA_OUT3LMIX_INPUT_1_VOLUME   0x6A1

Definition at line 354 of file registers.h.

#define ARIZONA_OUT3LMIX_INPUT_2_SOURCE   0x6A2

Definition at line 355 of file registers.h.

#define ARIZONA_OUT3LMIX_INPUT_2_VOLUME   0x6A3

Definition at line 356 of file registers.h.

#define ARIZONA_OUT3LMIX_INPUT_3_SOURCE   0x6A4

Definition at line 357 of file registers.h.

#define ARIZONA_OUT3LMIX_INPUT_3_VOLUME   0x6A5

Definition at line 358 of file registers.h.

#define ARIZONA_OUT3LMIX_INPUT_4_SOURCE   0x6A6

Definition at line 359 of file registers.h.

#define ARIZONA_OUT3LMIX_INPUT_4_VOLUME   0x6A7

Definition at line 360 of file registers.h.

#define ARIZONA_OUT3R_ANC_SRC_MASK   0x0C00 /* OUT3R_ANC_SRC - [11:10] */

Definition at line 2790 of file registers.h.

#define ARIZONA_OUT3R_ANC_SRC_SHIFT   10 /* OUT3R_ANC_SRC - [11:10] */

Definition at line 2791 of file registers.h.

#define ARIZONA_OUT3R_ANC_SRC_WIDTH   2 /* OUT3R_ANC_SRC - [11:10] */

Definition at line 2792 of file registers.h.

#define ARIZONA_OUT3R_ENA   0x0010 /* OUT3R_ENA */

Definition at line 2468 of file registers.h.

#define ARIZONA_OUT3R_ENA_MASK   0x0010 /* OUT3R_ENA */

Definition at line 2469 of file registers.h.

#define ARIZONA_OUT3R_ENA_SHIFT   4 /* OUT3R_ENA */

Definition at line 2470 of file registers.h.

#define ARIZONA_OUT3R_ENA_WIDTH   1 /* OUT3R_ENA */

Definition at line 2471 of file registers.h.

#define ARIZONA_OUT3R_MUTE   0x0100 /* OUT3R_MUTE */

Definition at line 2779 of file registers.h.

#define ARIZONA_OUT3R_MUTE_MASK   0x0100 /* OUT3R_MUTE */

Definition at line 2780 of file registers.h.

#define ARIZONA_OUT3R_MUTE_SHIFT   8 /* OUT3R_MUTE */

Definition at line 2781 of file registers.h.

#define ARIZONA_OUT3R_MUTE_WIDTH   1 /* OUT3R_MUTE */

Definition at line 2782 of file registers.h.

#define ARIZONA_OUT3R_PGA_VOL_MASK   0x00FE /* OUT3R_PGA_VOL - [7:1] */

Definition at line 2768 of file registers.h.

#define ARIZONA_OUT3R_PGA_VOL_SHIFT   1 /* OUT3R_PGA_VOL - [7:1] */

Definition at line 2769 of file registers.h.

#define ARIZONA_OUT3R_PGA_VOL_WIDTH   7 /* OUT3R_PGA_VOL - [7:1] */

Definition at line 2770 of file registers.h.

#define ARIZONA_OUT3R_VOL_LIM_MASK   0x00FF /* OUT3R_VOL_LIM - [7:0] */

Definition at line 2793 of file registers.h.

#define ARIZONA_OUT3R_VOL_LIM_SHIFT   0 /* OUT3R_VOL_LIM - [7:0] */

Definition at line 2794 of file registers.h.

#define ARIZONA_OUT3R_VOL_LIM_WIDTH   8 /* OUT3R_VOL_LIM - [7:0] */

Definition at line 2795 of file registers.h.

#define ARIZONA_OUT3R_VOL_MASK   0x00FF /* OUT3R_VOL - [7:0] */

Definition at line 2783 of file registers.h.

#define ARIZONA_OUT3R_VOL_SHIFT   0 /* OUT3R_VOL - [7:0] */

Definition at line 2784 of file registers.h.

#define ARIZONA_OUT3R_VOL_WIDTH   8 /* OUT3R_VOL - [7:0] */

Definition at line 2785 of file registers.h.

#define ARIZONA_OUT3RMIX_INPUT_1_SOURCE   0x6A8

Definition at line 361 of file registers.h.

#define ARIZONA_OUT3RMIX_INPUT_1_VOLUME   0x6A9

Definition at line 362 of file registers.h.

#define ARIZONA_OUT3RMIX_INPUT_2_SOURCE   0x6AA

Definition at line 363 of file registers.h.

#define ARIZONA_OUT3RMIX_INPUT_2_VOLUME   0x6AB

Definition at line 364 of file registers.h.

#define ARIZONA_OUT3RMIX_INPUT_3_SOURCE   0x6AC

Definition at line 365 of file registers.h.

#define ARIZONA_OUT3RMIX_INPUT_3_VOLUME   0x6AD

Definition at line 366 of file registers.h.

#define ARIZONA_OUT3RMIX_INPUT_4_SOURCE   0x6AE

Definition at line 367 of file registers.h.

#define ARIZONA_OUT3RMIX_INPUT_4_VOLUME   0x6AF

Definition at line 368 of file registers.h.

#define ARIZONA_OUT4_OSR   0x2000 /* OUT4_OSR */

Definition at line 2800 of file registers.h.

#define ARIZONA_OUT4_OSR_MASK   0x2000 /* OUT4_OSR */

Definition at line 2801 of file registers.h.

#define ARIZONA_OUT4_OSR_SHIFT   13 /* OUT4_OSR */

Definition at line 2802 of file registers.h.

#define ARIZONA_OUT4_OSR_WIDTH   1 /* OUT4_OSR */

Definition at line 2803 of file registers.h.

#define ARIZONA_OUT4L_ANC_SRC_MASK   0x0C00 /* OUT4L_ANC_SRC - [11:10] */

Definition at line 2804 of file registers.h.

#define ARIZONA_OUT4L_ANC_SRC_SHIFT   10 /* OUT4L_ANC_SRC - [11:10] */

Definition at line 2805 of file registers.h.

#define ARIZONA_OUT4L_ANC_SRC_WIDTH   2 /* OUT4L_ANC_SRC - [11:10] */

Definition at line 2806 of file registers.h.

#define ARIZONA_OUT4L_ENA   0x0080 /* OUT4L_ENA */

Definition at line 2456 of file registers.h.

#define ARIZONA_OUT4L_ENA_MASK   0x0080 /* OUT4L_ENA */

Definition at line 2457 of file registers.h.

#define ARIZONA_OUT4L_ENA_SHIFT   7 /* OUT4L_ENA */

Definition at line 2458 of file registers.h.

#define ARIZONA_OUT4L_ENA_STS   0x0080 /* OUT4L_ENA_STS */

Definition at line 2508 of file registers.h.

#define ARIZONA_OUT4L_ENA_STS_MASK   0x0080 /* OUT4L_ENA_STS */

Definition at line 2509 of file registers.h.

#define ARIZONA_OUT4L_ENA_STS_SHIFT   7 /* OUT4L_ENA_STS */

Definition at line 2510 of file registers.h.

#define ARIZONA_OUT4L_ENA_STS_WIDTH   1 /* OUT4L_ENA_STS */

Definition at line 2511 of file registers.h.

#define ARIZONA_OUT4L_ENA_WIDTH   1 /* OUT4L_ENA */

Definition at line 2459 of file registers.h.

#define ARIZONA_OUT4L_MUTE   0x0100 /* OUT4L_MUTE */

Definition at line 2815 of file registers.h.

#define ARIZONA_OUT4L_MUTE_MASK   0x0100 /* OUT4L_MUTE */

Definition at line 2816 of file registers.h.

#define ARIZONA_OUT4L_MUTE_SHIFT   8 /* OUT4L_MUTE */

Definition at line 2817 of file registers.h.

#define ARIZONA_OUT4L_MUTE_WIDTH   1 /* OUT4L_MUTE */

Definition at line 2818 of file registers.h.

#define ARIZONA_OUT4L_NGATE_SRC_MASK   0x0FFF /* OUT4L_NGATE_SRC - [11:0] */

Definition at line 2833 of file registers.h.

#define ARIZONA_OUT4L_NGATE_SRC_SHIFT   0 /* OUT4L_NGATE_SRC - [11:0] */

Definition at line 2834 of file registers.h.

#define ARIZONA_OUT4L_NGATE_SRC_WIDTH   12 /* OUT4L_NGATE_SRC - [11:0] */

Definition at line 2835 of file registers.h.

#define ARIZONA_OUT4L_VOL_LIM_MASK   0x00FF /* OUT4L_VOL_LIM - [7:0] */

Definition at line 2826 of file registers.h.

#define ARIZONA_OUT4L_VOL_LIM_SHIFT   0 /* OUT4L_VOL_LIM - [7:0] */

Definition at line 2827 of file registers.h.

#define ARIZONA_OUT4L_VOL_LIM_WIDTH   8 /* OUT4L_VOL_LIM - [7:0] */

Definition at line 2828 of file registers.h.

#define ARIZONA_OUT4L_VOL_MASK   0x00FF /* OUT4L_VOL - [7:0] */

Definition at line 2819 of file registers.h.

#define ARIZONA_OUT4L_VOL_SHIFT   0 /* OUT4L_VOL - [7:0] */

Definition at line 2820 of file registers.h.

#define ARIZONA_OUT4L_VOL_WIDTH   8 /* OUT4L_VOL - [7:0] */

Definition at line 2821 of file registers.h.

#define ARIZONA_OUT4LMIX_INPUT_1_SOURCE   0x6B0

Definition at line 369 of file registers.h.

#define ARIZONA_OUT4LMIX_INPUT_1_VOLUME   0x6B1

Definition at line 370 of file registers.h.

#define ARIZONA_OUT4LMIX_INPUT_2_SOURCE   0x6B2

Definition at line 371 of file registers.h.

#define ARIZONA_OUT4LMIX_INPUT_2_VOLUME   0x6B3

Definition at line 372 of file registers.h.

#define ARIZONA_OUT4LMIX_INPUT_3_SOURCE   0x6B4

Definition at line 373 of file registers.h.

#define ARIZONA_OUT4LMIX_INPUT_3_VOLUME   0x6B5

Definition at line 374 of file registers.h.

#define ARIZONA_OUT4LMIX_INPUT_4_SOURCE   0x6B6

Definition at line 375 of file registers.h.

#define ARIZONA_OUT4LMIX_INPUT_4_VOLUME   0x6B7

Definition at line 376 of file registers.h.

#define ARIZONA_OUT4R_ANC_SRC_MASK   0x0C00 /* OUT4R_ANC_SRC - [11:10] */

Definition at line 2840 of file registers.h.

#define ARIZONA_OUT4R_ANC_SRC_SHIFT   10 /* OUT4R_ANC_SRC - [11:10] */

Definition at line 2841 of file registers.h.

#define ARIZONA_OUT4R_ANC_SRC_WIDTH   2 /* OUT4R_ANC_SRC - [11:10] */

Definition at line 2842 of file registers.h.

#define ARIZONA_OUT4R_ENA   0x0040 /* OUT4R_ENA */

Definition at line 2460 of file registers.h.

#define ARIZONA_OUT4R_ENA_MASK   0x0040 /* OUT4R_ENA */

Definition at line 2461 of file registers.h.

#define ARIZONA_OUT4R_ENA_SHIFT   6 /* OUT4R_ENA */

Definition at line 2462 of file registers.h.

#define ARIZONA_OUT4R_ENA_STS   0x0040 /* OUT4R_ENA_STS */

Definition at line 2512 of file registers.h.

#define ARIZONA_OUT4R_ENA_STS_MASK   0x0040 /* OUT4R_ENA_STS */

Definition at line 2513 of file registers.h.

#define ARIZONA_OUT4R_ENA_STS_SHIFT   6 /* OUT4R_ENA_STS */

Definition at line 2514 of file registers.h.

#define ARIZONA_OUT4R_ENA_STS_WIDTH   1 /* OUT4R_ENA_STS */

Definition at line 2515 of file registers.h.

#define ARIZONA_OUT4R_ENA_WIDTH   1 /* OUT4R_ENA */

Definition at line 2463 of file registers.h.

#define ARIZONA_OUT4R_MUTE   0x0100 /* OUT4R_MUTE */

Definition at line 2851 of file registers.h.

#define ARIZONA_OUT4R_MUTE_MASK   0x0100 /* OUT4R_MUTE */

Definition at line 2852 of file registers.h.

#define ARIZONA_OUT4R_MUTE_SHIFT   8 /* OUT4R_MUTE */

Definition at line 2853 of file registers.h.

#define ARIZONA_OUT4R_MUTE_WIDTH   1 /* OUT4R_MUTE */

Definition at line 2854 of file registers.h.

#define ARIZONA_OUT4R_NGATE_SRC_MASK   0x0FFF /* OUT4R_NGATE_SRC - [11:0] */

Definition at line 2869 of file registers.h.

#define ARIZONA_OUT4R_NGATE_SRC_SHIFT   0 /* OUT4R_NGATE_SRC - [11:0] */

Definition at line 2870 of file registers.h.

#define ARIZONA_OUT4R_NGATE_SRC_WIDTH   12 /* OUT4R_NGATE_SRC - [11:0] */

Definition at line 2871 of file registers.h.

#define ARIZONA_OUT4R_VOL_LIM_MASK   0x00FF /* OUT4R_VOL_LIM - [7:0] */

Definition at line 2862 of file registers.h.

#define ARIZONA_OUT4R_VOL_LIM_SHIFT   0 /* OUT4R_VOL_LIM - [7:0] */

Definition at line 2863 of file registers.h.

#define ARIZONA_OUT4R_VOL_LIM_WIDTH   8 /* OUT4R_VOL_LIM - [7:0] */

Definition at line 2864 of file registers.h.

#define ARIZONA_OUT4R_VOL_MASK   0x00FF /* OUT4R_VOL - [7:0] */

Definition at line 2855 of file registers.h.

#define ARIZONA_OUT4R_VOL_SHIFT   0 /* OUT4R_VOL - [7:0] */

Definition at line 2856 of file registers.h.

#define ARIZONA_OUT4R_VOL_WIDTH   8 /* OUT4R_VOL - [7:0] */

Definition at line 2857 of file registers.h.

#define ARIZONA_OUT4RMIX_INPUT_1_SOURCE   0x6B8

Definition at line 377 of file registers.h.

#define ARIZONA_OUT4RMIX_INPUT_1_VOLUME   0x6B9

Definition at line 378 of file registers.h.

#define ARIZONA_OUT4RMIX_INPUT_2_SOURCE   0x6BA

Definition at line 379 of file registers.h.

#define ARIZONA_OUT4RMIX_INPUT_2_VOLUME   0x6BB

Definition at line 380 of file registers.h.

#define ARIZONA_OUT4RMIX_INPUT_3_SOURCE   0x6BC

Definition at line 381 of file registers.h.

#define ARIZONA_OUT4RMIX_INPUT_3_VOLUME   0x6BD

Definition at line 382 of file registers.h.

#define ARIZONA_OUT4RMIX_INPUT_4_SOURCE   0x6BE

Definition at line 383 of file registers.h.

#define ARIZONA_OUT4RMIX_INPUT_4_VOLUME   0x6BF

Definition at line 384 of file registers.h.

#define ARIZONA_OUT5_OSR   0x2000 /* OUT5_OSR */

Definition at line 2876 of file registers.h.

#define ARIZONA_OUT5_OSR_MASK   0x2000 /* OUT5_OSR */

Definition at line 2877 of file registers.h.

#define ARIZONA_OUT5_OSR_SHIFT   13 /* OUT5_OSR */

Definition at line 2878 of file registers.h.

#define ARIZONA_OUT5_OSR_WIDTH   1 /* OUT5_OSR */

Definition at line 2879 of file registers.h.

#define ARIZONA_OUT5L_ANC_SRC_MASK   0x0C00 /* OUT5L_ANC_SRC - [11:10] */

Definition at line 2880 of file registers.h.

#define ARIZONA_OUT5L_ANC_SRC_SHIFT   10 /* OUT5L_ANC_SRC - [11:10] */

Definition at line 2881 of file registers.h.

#define ARIZONA_OUT5L_ANC_SRC_WIDTH   2 /* OUT5L_ANC_SRC - [11:10] */

Definition at line 2882 of file registers.h.

#define ARIZONA_OUT5L_ENA   0x0200 /* OUT5L_ENA */

Definition at line 2448 of file registers.h.

#define ARIZONA_OUT5L_ENA_MASK   0x0200 /* OUT5L_ENA */

Definition at line 2449 of file registers.h.

#define ARIZONA_OUT5L_ENA_SHIFT   9 /* OUT5L_ENA */

Definition at line 2450 of file registers.h.

#define ARIZONA_OUT5L_ENA_STS   0x0200 /* OUT5L_ENA_STS */

Definition at line 2500 of file registers.h.

#define ARIZONA_OUT5L_ENA_STS_MASK   0x0200 /* OUT5L_ENA_STS */

Definition at line 2501 of file registers.h.

#define ARIZONA_OUT5L_ENA_STS_SHIFT   9 /* OUT5L_ENA_STS */

Definition at line 2502 of file registers.h.

#define ARIZONA_OUT5L_ENA_STS_WIDTH   1 /* OUT5L_ENA_STS */

Definition at line 2503 of file registers.h.

#define ARIZONA_OUT5L_ENA_WIDTH   1 /* OUT5L_ENA */

Definition at line 2451 of file registers.h.

#define ARIZONA_OUT5L_MUTE   0x0100 /* OUT5L_MUTE */

Definition at line 2891 of file registers.h.

#define ARIZONA_OUT5L_MUTE_MASK   0x0100 /* OUT5L_MUTE */

Definition at line 2892 of file registers.h.

#define ARIZONA_OUT5L_MUTE_SHIFT   8 /* OUT5L_MUTE */

Definition at line 2893 of file registers.h.

#define ARIZONA_OUT5L_MUTE_WIDTH   1 /* OUT5L_MUTE */

Definition at line 2894 of file registers.h.

#define ARIZONA_OUT5L_NGATE_SRC_MASK   0x0FFF /* OUT5L_NGATE_SRC - [11:0] */

Definition at line 2909 of file registers.h.

#define ARIZONA_OUT5L_NGATE_SRC_SHIFT   0 /* OUT5L_NGATE_SRC - [11:0] */

Definition at line 2910 of file registers.h.

#define ARIZONA_OUT5L_NGATE_SRC_WIDTH   12 /* OUT5L_NGATE_SRC - [11:0] */

Definition at line 2911 of file registers.h.

#define ARIZONA_OUT5L_VOL_LIM_MASK   0x00FF /* OUT5L_VOL_LIM - [7:0] */

Definition at line 2902 of file registers.h.

#define ARIZONA_OUT5L_VOL_LIM_SHIFT   0 /* OUT5L_VOL_LIM - [7:0] */

Definition at line 2903 of file registers.h.

#define ARIZONA_OUT5L_VOL_LIM_WIDTH   8 /* OUT5L_VOL_LIM - [7:0] */

Definition at line 2904 of file registers.h.

#define ARIZONA_OUT5L_VOL_MASK   0x00FF /* OUT5L_VOL - [7:0] */

Definition at line 2895 of file registers.h.

#define ARIZONA_OUT5L_VOL_SHIFT   0 /* OUT5L_VOL - [7:0] */

Definition at line 2896 of file registers.h.

#define ARIZONA_OUT5L_VOL_WIDTH   8 /* OUT5L_VOL - [7:0] */

Definition at line 2897 of file registers.h.

#define ARIZONA_OUT5LMIX_INPUT_1_SOURCE   0x6C0

Definition at line 385 of file registers.h.

#define ARIZONA_OUT5LMIX_INPUT_1_VOLUME   0x6C1

Definition at line 386 of file registers.h.

#define ARIZONA_OUT5LMIX_INPUT_2_SOURCE   0x6C2

Definition at line 387 of file registers.h.

#define ARIZONA_OUT5LMIX_INPUT_2_VOLUME   0x6C3

Definition at line 388 of file registers.h.

#define ARIZONA_OUT5LMIX_INPUT_3_SOURCE   0x6C4

Definition at line 389 of file registers.h.

#define ARIZONA_OUT5LMIX_INPUT_3_VOLUME   0x6C5

Definition at line 390 of file registers.h.

#define ARIZONA_OUT5LMIX_INPUT_4_SOURCE   0x6C6

Definition at line 391 of file registers.h.

#define ARIZONA_OUT5LMIX_INPUT_4_VOLUME   0x6C7

Definition at line 392 of file registers.h.

#define ARIZONA_OUT5R_ANC_SRC_MASK   0x0C00 /* OUT5R_ANC_SRC - [11:10] */

Definition at line 2916 of file registers.h.

#define ARIZONA_OUT5R_ANC_SRC_SHIFT   10 /* OUT5R_ANC_SRC - [11:10] */

Definition at line 2917 of file registers.h.

#define ARIZONA_OUT5R_ANC_SRC_WIDTH   2 /* OUT5R_ANC_SRC - [11:10] */

Definition at line 2918 of file registers.h.

#define ARIZONA_OUT5R_ENA   0x0100 /* OUT5R_ENA */

Definition at line 2452 of file registers.h.

#define ARIZONA_OUT5R_ENA_MASK   0x0100 /* OUT5R_ENA */

Definition at line 2453 of file registers.h.

#define ARIZONA_OUT5R_ENA_SHIFT   8 /* OUT5R_ENA */

Definition at line 2454 of file registers.h.

#define ARIZONA_OUT5R_ENA_STS   0x0100 /* OUT5R_ENA_STS */

Definition at line 2504 of file registers.h.

#define ARIZONA_OUT5R_ENA_STS_MASK   0x0100 /* OUT5R_ENA_STS */

Definition at line 2505 of file registers.h.

#define ARIZONA_OUT5R_ENA_STS_SHIFT   8 /* OUT5R_ENA_STS */

Definition at line 2506 of file registers.h.

#define ARIZONA_OUT5R_ENA_STS_WIDTH   1 /* OUT5R_ENA_STS */

Definition at line 2507 of file registers.h.

#define ARIZONA_OUT5R_ENA_WIDTH   1 /* OUT5R_ENA */

Definition at line 2455 of file registers.h.

#define ARIZONA_OUT5R_MUTE   0x0100 /* OUT5R_MUTE */

Definition at line 2927 of file registers.h.

#define ARIZONA_OUT5R_MUTE_MASK   0x0100 /* OUT5R_MUTE */

Definition at line 2928 of file registers.h.

#define ARIZONA_OUT5R_MUTE_SHIFT   8 /* OUT5R_MUTE */

Definition at line 2929 of file registers.h.

#define ARIZONA_OUT5R_MUTE_WIDTH   1 /* OUT5R_MUTE */

Definition at line 2930 of file registers.h.

#define ARIZONA_OUT5R_NGATE_SRC_MASK   0x0FFF /* OUT5R_NGATE_SRC - [11:0] */

Definition at line 2945 of file registers.h.

#define ARIZONA_OUT5R_NGATE_SRC_SHIFT   0 /* OUT5R_NGATE_SRC - [11:0] */

Definition at line 2946 of file registers.h.

#define ARIZONA_OUT5R_NGATE_SRC_WIDTH   12 /* OUT5R_NGATE_SRC - [11:0] */

Definition at line 2947 of file registers.h.

#define ARIZONA_OUT5R_VOL_LIM_MASK   0x00FF /* OUT5R_VOL_LIM - [7:0] */

Definition at line 2938 of file registers.h.

#define ARIZONA_OUT5R_VOL_LIM_SHIFT   0 /* OUT5R_VOL_LIM - [7:0] */

Definition at line 2939 of file registers.h.

#define ARIZONA_OUT5R_VOL_LIM_WIDTH   8 /* OUT5R_VOL_LIM - [7:0] */

Definition at line 2940 of file registers.h.

#define ARIZONA_OUT5R_VOL_MASK   0x00FF /* OUT5R_VOL - [7:0] */

Definition at line 2931 of file registers.h.

#define ARIZONA_OUT5R_VOL_SHIFT   0 /* OUT5R_VOL - [7:0] */

Definition at line 2932 of file registers.h.

#define ARIZONA_OUT5R_VOL_WIDTH   8 /* OUT5R_VOL - [7:0] */

Definition at line 2933 of file registers.h.

#define ARIZONA_OUT5RMIX_INPUT_1_SOURCE   0x6C8

Definition at line 393 of file registers.h.

#define ARIZONA_OUT5RMIX_INPUT_1_VOLUME   0x6C9

Definition at line 394 of file registers.h.

#define ARIZONA_OUT5RMIX_INPUT_2_SOURCE   0x6CA

Definition at line 395 of file registers.h.

#define ARIZONA_OUT5RMIX_INPUT_2_VOLUME   0x6CB

Definition at line 396 of file registers.h.

#define ARIZONA_OUT5RMIX_INPUT_3_SOURCE   0x6CC

Definition at line 397 of file registers.h.

#define ARIZONA_OUT5RMIX_INPUT_3_VOLUME   0x6CD

Definition at line 398 of file registers.h.

#define ARIZONA_OUT5RMIX_INPUT_4_SOURCE   0x6CE

Definition at line 399 of file registers.h.

#define ARIZONA_OUT5RMIX_INPUT_4_VOLUME   0x6CF

Definition at line 400 of file registers.h.

#define ARIZONA_OUT6_OSR   0x2000 /* OUT6_OSR */

Definition at line 2952 of file registers.h.

#define ARIZONA_OUT6_OSR_MASK   0x2000 /* OUT6_OSR */

Definition at line 2953 of file registers.h.

#define ARIZONA_OUT6_OSR_SHIFT   13 /* OUT6_OSR */

Definition at line 2954 of file registers.h.

#define ARIZONA_OUT6_OSR_WIDTH   1 /* OUT6_OSR */

Definition at line 2955 of file registers.h.

#define ARIZONA_OUT6L_ANC_SRC_MASK   0x0C00 /* OUT6L_ANC_SRC - [11:10] */

Definition at line 2956 of file registers.h.

#define ARIZONA_OUT6L_ANC_SRC_SHIFT   10 /* OUT6L_ANC_SRC - [11:10] */

Definition at line 2957 of file registers.h.

#define ARIZONA_OUT6L_ANC_SRC_WIDTH   2 /* OUT6L_ANC_SRC - [11:10] */

Definition at line 2958 of file registers.h.

#define ARIZONA_OUT6L_ENA   0x0800 /* OUT6L_ENA */

Definition at line 2440 of file registers.h.

#define ARIZONA_OUT6L_ENA_MASK   0x0800 /* OUT6L_ENA */

Definition at line 2441 of file registers.h.

#define ARIZONA_OUT6L_ENA_SHIFT   11 /* OUT6L_ENA */

Definition at line 2442 of file registers.h.

#define ARIZONA_OUT6L_ENA_STS   0x0800 /* OUT6L_ENA_STS */

Definition at line 2492 of file registers.h.

#define ARIZONA_OUT6L_ENA_STS_MASK   0x0800 /* OUT6L_ENA_STS */

Definition at line 2493 of file registers.h.

#define ARIZONA_OUT6L_ENA_STS_SHIFT   11 /* OUT6L_ENA_STS */

Definition at line 2494 of file registers.h.

#define ARIZONA_OUT6L_ENA_STS_WIDTH   1 /* OUT6L_ENA_STS */

Definition at line 2495 of file registers.h.

#define ARIZONA_OUT6L_ENA_WIDTH   1 /* OUT6L_ENA */

Definition at line 2443 of file registers.h.

#define ARIZONA_OUT6L_MUTE   0x0100 /* OUT6L_MUTE */

Definition at line 2967 of file registers.h.

#define ARIZONA_OUT6L_MUTE_MASK   0x0100 /* OUT6L_MUTE */

Definition at line 2968 of file registers.h.

#define ARIZONA_OUT6L_MUTE_SHIFT   8 /* OUT6L_MUTE */

Definition at line 2969 of file registers.h.

#define ARIZONA_OUT6L_MUTE_WIDTH   1 /* OUT6L_MUTE */

Definition at line 2970 of file registers.h.

#define ARIZONA_OUT6L_NGATE_SRC_MASK   0x0FFF /* OUT6L_NGATE_SRC - [11:0] */

Definition at line 2985 of file registers.h.

#define ARIZONA_OUT6L_NGATE_SRC_SHIFT   0 /* OUT6L_NGATE_SRC - [11:0] */

Definition at line 2986 of file registers.h.

#define ARIZONA_OUT6L_NGATE_SRC_WIDTH   12 /* OUT6L_NGATE_SRC - [11:0] */

Definition at line 2987 of file registers.h.

#define ARIZONA_OUT6L_VOL_LIM_MASK   0x00FF /* OUT6L_VOL_LIM - [7:0] */

Definition at line 2978 of file registers.h.

#define ARIZONA_OUT6L_VOL_LIM_SHIFT   0 /* OUT6L_VOL_LIM - [7:0] */

Definition at line 2979 of file registers.h.

#define ARIZONA_OUT6L_VOL_LIM_WIDTH   8 /* OUT6L_VOL_LIM - [7:0] */

Definition at line 2980 of file registers.h.

#define ARIZONA_OUT6L_VOL_MASK   0x00FF /* OUT6L_VOL - [7:0] */

Definition at line 2971 of file registers.h.

#define ARIZONA_OUT6L_VOL_SHIFT   0 /* OUT6L_VOL - [7:0] */

Definition at line 2972 of file registers.h.

#define ARIZONA_OUT6L_VOL_WIDTH   8 /* OUT6L_VOL - [7:0] */

Definition at line 2973 of file registers.h.

#define ARIZONA_OUT6LMIX_INPUT_1_SOURCE   0x6D0

Definition at line 401 of file registers.h.

#define ARIZONA_OUT6LMIX_INPUT_1_VOLUME   0x6D1

Definition at line 402 of file registers.h.

#define ARIZONA_OUT6LMIX_INPUT_2_SOURCE   0x6D2

Definition at line 403 of file registers.h.

#define ARIZONA_OUT6LMIX_INPUT_2_VOLUME   0x6D3

Definition at line 404 of file registers.h.

#define ARIZONA_OUT6LMIX_INPUT_3_SOURCE   0x6D4

Definition at line 405 of file registers.h.

#define ARIZONA_OUT6LMIX_INPUT_3_VOLUME   0x6D5

Definition at line 406 of file registers.h.

#define ARIZONA_OUT6LMIX_INPUT_4_SOURCE   0x6D6

Definition at line 407 of file registers.h.

#define ARIZONA_OUT6LMIX_INPUT_4_VOLUME   0x6D7

Definition at line 408 of file registers.h.

#define ARIZONA_OUT6R_ANC_SRC_MASK   0x0C00 /* OUT6R_ANC_SRC - [11:10] */

Definition at line 2992 of file registers.h.

#define ARIZONA_OUT6R_ANC_SRC_SHIFT   10 /* OUT6R_ANC_SRC - [11:10] */

Definition at line 2993 of file registers.h.

#define ARIZONA_OUT6R_ANC_SRC_WIDTH   2 /* OUT6R_ANC_SRC - [11:10] */

Definition at line 2994 of file registers.h.

#define ARIZONA_OUT6R_ENA   0x0400 /* OUT6R_ENA */

Definition at line 2444 of file registers.h.

#define ARIZONA_OUT6R_ENA_MASK   0x0400 /* OUT6R_ENA */

Definition at line 2445 of file registers.h.

#define ARIZONA_OUT6R_ENA_SHIFT   10 /* OUT6R_ENA */

Definition at line 2446 of file registers.h.

#define ARIZONA_OUT6R_ENA_STS   0x0400 /* OUT6R_ENA_STS */

Definition at line 2496 of file registers.h.

#define ARIZONA_OUT6R_ENA_STS_MASK   0x0400 /* OUT6R_ENA_STS */

Definition at line 2497 of file registers.h.

#define ARIZONA_OUT6R_ENA_STS_SHIFT   10 /* OUT6R_ENA_STS */

Definition at line 2498 of file registers.h.

#define ARIZONA_OUT6R_ENA_STS_WIDTH   1 /* OUT6R_ENA_STS */

Definition at line 2499 of file registers.h.

#define ARIZONA_OUT6R_ENA_WIDTH   1 /* OUT6R_ENA */

Definition at line 2447 of file registers.h.

#define ARIZONA_OUT6R_MUTE   0x0100 /* OUT6R_MUTE */

Definition at line 3003 of file registers.h.

#define ARIZONA_OUT6R_MUTE_MASK   0x0100 /* OUT6R_MUTE */

Definition at line 3004 of file registers.h.

#define ARIZONA_OUT6R_MUTE_SHIFT   8 /* OUT6R_MUTE */

Definition at line 3005 of file registers.h.

#define ARIZONA_OUT6R_MUTE_WIDTH   1 /* OUT6R_MUTE */

Definition at line 3006 of file registers.h.

#define ARIZONA_OUT6R_NGATE_SRC_MASK   0x0FFF /* OUT6R_NGATE_SRC - [11:0] */

Definition at line 3021 of file registers.h.

#define ARIZONA_OUT6R_NGATE_SRC_SHIFT   0 /* OUT6R_NGATE_SRC - [11:0] */

Definition at line 3022 of file registers.h.

#define ARIZONA_OUT6R_NGATE_SRC_WIDTH   12 /* OUT6R_NGATE_SRC - [11:0] */

Definition at line 3023 of file registers.h.

#define ARIZONA_OUT6R_VOL_LIM_MASK   0x00FF /* OUT6R_VOL_LIM - [7:0] */

Definition at line 3014 of file registers.h.

#define ARIZONA_OUT6R_VOL_LIM_SHIFT   0 /* OUT6R_VOL_LIM - [7:0] */

Definition at line 3015 of file registers.h.

#define ARIZONA_OUT6R_VOL_LIM_WIDTH   8 /* OUT6R_VOL_LIM - [7:0] */

Definition at line 3016 of file registers.h.

#define ARIZONA_OUT6R_VOL_MASK   0x00FF /* OUT6R_VOL - [7:0] */

Definition at line 3007 of file registers.h.

#define ARIZONA_OUT6R_VOL_SHIFT   0 /* OUT6R_VOL - [7:0] */

Definition at line 3008 of file registers.h.

#define ARIZONA_OUT6R_VOL_WIDTH   8 /* OUT6R_VOL - [7:0] */

Definition at line 3009 of file registers.h.

#define ARIZONA_OUT6RMIX_INPUT_1_SOURCE   0x6D8

Definition at line 409 of file registers.h.

#define ARIZONA_OUT6RMIX_INPUT_1_VOLUME   0x6D9

Definition at line 410 of file registers.h.

#define ARIZONA_OUT6RMIX_INPUT_2_SOURCE   0x6DA

Definition at line 411 of file registers.h.

#define ARIZONA_OUT6RMIX_INPUT_2_VOLUME   0x6DB

Definition at line 412 of file registers.h.

#define ARIZONA_OUT6RMIX_INPUT_3_SOURCE   0x6DC

Definition at line 413 of file registers.h.

#define ARIZONA_OUT6RMIX_INPUT_3_VOLUME   0x6DD

Definition at line 414 of file registers.h.

#define ARIZONA_OUT6RMIX_INPUT_4_SOURCE   0x6DE

Definition at line 415 of file registers.h.

#define ARIZONA_OUT6RMIX_INPUT_4_VOLUME   0x6DF

Definition at line 416 of file registers.h.

#define ARIZONA_OUT_COMP_COEFF_1   0x0002 /* OUT_COMP_COEFF */

Definition at line 3118 of file registers.h.

#define ARIZONA_OUT_COMP_COEFF_1_MASK   0x0002 /* OUT_COMP_COEFF */

Definition at line 3119 of file registers.h.

#define ARIZONA_OUT_COMP_COEFF_1_SHIFT   1 /* OUT_COMP_COEFF */

Definition at line 3120 of file registers.h.

#define ARIZONA_OUT_COMP_COEFF_1_WIDTH   1 /* OUT_COMP_COEFF */

Definition at line 3121 of file registers.h.

#define ARIZONA_OUT_COMP_COEFF_MASK   0xFFFF /* OUT_COMP_COEFF - [15:0] */

Definition at line 3111 of file registers.h.

#define ARIZONA_OUT_COMP_COEFF_SEL   0x0001 /* OUT_COMP_COEFF_SEL */

Definition at line 3122 of file registers.h.

#define ARIZONA_OUT_COMP_COEFF_SEL_MASK   0x0001 /* OUT_COMP_COEFF_SEL */

Definition at line 3123 of file registers.h.

#define ARIZONA_OUT_COMP_COEFF_SEL_SHIFT   0 /* OUT_COMP_COEFF_SEL */

Definition at line 3124 of file registers.h.

#define ARIZONA_OUT_COMP_COEFF_SEL_WIDTH   1 /* OUT_COMP_COEFF_SEL */

Definition at line 3125 of file registers.h.

#define ARIZONA_OUT_COMP_COEFF_SHIFT   0 /* OUT_COMP_COEFF - [15:0] */

Definition at line 3112 of file registers.h.

#define ARIZONA_OUT_COMP_COEFF_WIDTH   16 /* OUT_COMP_COEFF - [15:0] */

Definition at line 3113 of file registers.h.

#define ARIZONA_OUT_RATE_MASK   0x7800 /* OUT_RATE - [14:11] */

Definition at line 2520 of file registers.h.

#define ARIZONA_OUT_RATE_SHIFT   11 /* OUT_RATE - [14:11] */

Definition at line 2521 of file registers.h.

#define ARIZONA_OUT_RATE_WIDTH   4 /* OUT_RATE - [14:11] */

Definition at line 2522 of file registers.h.

#define ARIZONA_OUT_VD_RAMP_MASK   0x0070 /* OUT_VD_RAMP - [6:4] */

Definition at line 2527 of file registers.h.

#define ARIZONA_OUT_VD_RAMP_SHIFT   4 /* OUT_VD_RAMP - [6:4] */

Definition at line 2528 of file registers.h.

#define ARIZONA_OUT_VD_RAMP_WIDTH   3 /* OUT_VD_RAMP - [6:4] */

Definition at line 2529 of file registers.h.

#define ARIZONA_OUT_VI_RAMP_MASK   0x0007 /* OUT_VI_RAMP - [2:0] */

Definition at line 2530 of file registers.h.

#define ARIZONA_OUT_VI_RAMP_SHIFT   0 /* OUT_VI_RAMP - [2:0] */

Definition at line 2531 of file registers.h.

#define ARIZONA_OUT_VI_RAMP_WIDTH   3 /* OUT_VI_RAMP - [2:0] */

Definition at line 2532 of file registers.h.

#define ARIZONA_OUT_VOLUME_4L   0x42A

Definition at line 184 of file registers.h.

#define ARIZONA_OUT_VOLUME_4R   0x42E

Definition at line 188 of file registers.h.

#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */

Definition at line 2999 of file registers.h.

#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */

Definition at line 2999 of file registers.h.

#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */

Definition at line 2999 of file registers.h.

#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */

Definition at line 2999 of file registers.h.

#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */

Definition at line 2999 of file registers.h.

#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */

Definition at line 2999 of file registers.h.

#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */

Definition at line 2999 of file registers.h.

#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */

Definition at line 2999 of file registers.h.

#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */

Definition at line 2999 of file registers.h.

#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */

Definition at line 2999 of file registers.h.

#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */

Definition at line 2999 of file registers.h.

#define ARIZONA_OUT_VU   0x0200 /* OUT_VU */

Definition at line 2999 of file registers.h.

#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */

Definition at line 3000 of file registers.h.

#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */

Definition at line 3000 of file registers.h.

#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */

Definition at line 3000 of file registers.h.

#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */

Definition at line 3000 of file registers.h.

#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */

Definition at line 3000 of file registers.h.

#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */

Definition at line 3000 of file registers.h.

#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */

Definition at line 3000 of file registers.h.

#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */

Definition at line 3000 of file registers.h.

#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */

Definition at line 3000 of file registers.h.

#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */

Definition at line 3000 of file registers.h.

#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */

Definition at line 3000 of file registers.h.

#define ARIZONA_OUT_VU_MASK   0x0200 /* OUT_VU */

Definition at line 3000 of file registers.h.

#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */

Definition at line 3001 of file registers.h.

#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */

Definition at line 3001 of file registers.h.

#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */

Definition at line 3001 of file registers.h.

#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */

Definition at line 3001 of file registers.h.

#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */

Definition at line 3001 of file registers.h.

#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */

Definition at line 3001 of file registers.h.

#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */

Definition at line 3001 of file registers.h.

#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */

Definition at line 3001 of file registers.h.

#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */

Definition at line 3001 of file registers.h.

#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */

Definition at line 3001 of file registers.h.

#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */

Definition at line 3001 of file registers.h.

#define ARIZONA_OUT_VU_SHIFT   9 /* OUT_VU */

Definition at line 3001 of file registers.h.

#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */

Definition at line 3002 of file registers.h.

#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */

Definition at line 3002 of file registers.h.

#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */

Definition at line 3002 of file registers.h.

#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */

Definition at line 3002 of file registers.h.

#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */

Definition at line 3002 of file registers.h.

#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */

Definition at line 3002 of file registers.h.

#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */

Definition at line 3002 of file registers.h.

#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */

Definition at line 3002 of file registers.h.

#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */

Definition at line 3002 of file registers.h.

#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */

Definition at line 3002 of file registers.h.

#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */

Definition at line 3002 of file registers.h.

#define ARIZONA_OUT_VU_WIDTH   1 /* OUT_VU */

Definition at line 3002 of file registers.h.

#define ARIZONA_OUTPUT_ASYNC_CLOCK   0x14A

Definition at line 73 of file registers.h.

#define ARIZONA_OUTPUT_ENABLES_1   0x400

Definition at line 153 of file registers.h.

#define ARIZONA_OUTPUT_PATH_CONFIG_1L   0x410

Definition at line 158 of file registers.h.

#define ARIZONA_OUTPUT_PATH_CONFIG_1R   0x414

Definition at line 162 of file registers.h.

#define ARIZONA_OUTPUT_PATH_CONFIG_2L   0x418

Definition at line 166 of file registers.h.

#define ARIZONA_OUTPUT_PATH_CONFIG_2R   0x41C

Definition at line 170 of file registers.h.

#define ARIZONA_OUTPUT_PATH_CONFIG_3L   0x420

Definition at line 174 of file registers.h.

#define ARIZONA_OUTPUT_PATH_CONFIG_3R   0x424

Definition at line 178 of file registers.h.

#define ARIZONA_OUTPUT_PATH_CONFIG_4L   0x428

Definition at line 182 of file registers.h.

#define ARIZONA_OUTPUT_PATH_CONFIG_4R   0x42C

Definition at line 186 of file registers.h.

#define ARIZONA_OUTPUT_PATH_CONFIG_5L   0x430

Definition at line 190 of file registers.h.

#define ARIZONA_OUTPUT_PATH_CONFIG_5R   0x434

Definition at line 194 of file registers.h.

#define ARIZONA_OUTPUT_PATH_CONFIG_6L   0x438

Definition at line 198 of file registers.h.

#define ARIZONA_OUTPUT_PATH_CONFIG_6R   0x43C

Definition at line 202 of file registers.h.

#define ARIZONA_OUTPUT_RATE_1   0x408

Definition at line 156 of file registers.h.

#define ARIZONA_OUTPUT_STATUS_1   0x401

Definition at line 154 of file registers.h.

#define ARIZONA_OUTPUT_SYSTEM_CLOCK   0x149

Definition at line 72 of file registers.h.

#define ARIZONA_OUTPUT_VOLUME_RAMP   0x409

Definition at line 157 of file registers.h.

#define ARIZONA_OVERCLOCKED_EINT1   0x0020 /* OVERCLOCKED_EINT1 */

Definition at line 4296 of file registers.h.

#define ARIZONA_OVERCLOCKED_EINT1_MASK   0x0020 /* OVERCLOCKED_EINT1 */

Definition at line 4297 of file registers.h.

#define ARIZONA_OVERCLOCKED_EINT1_SHIFT   5 /* OVERCLOCKED_EINT1 */

Definition at line 4298 of file registers.h.

#define ARIZONA_OVERCLOCKED_EINT1_WIDTH   1 /* OVERCLOCKED_EINT1 */

Definition at line 4299 of file registers.h.

#define ARIZONA_OVERCLOCKED_EINT2   0x0020 /* OVERCLOCKED_EINT2 */

Definition at line 4640 of file registers.h.

#define ARIZONA_OVERCLOCKED_EINT2_MASK   0x0020 /* OVERCLOCKED_EINT2 */

Definition at line 4641 of file registers.h.

#define ARIZONA_OVERCLOCKED_EINT2_SHIFT   5 /* OVERCLOCKED_EINT2 */

Definition at line 4642 of file registers.h.

#define ARIZONA_OVERCLOCKED_EINT2_WIDTH   1 /* OVERCLOCKED_EINT2 */

Definition at line 4643 of file registers.h.

#define ARIZONA_OVERCLOCKED_STS   0x0020 /* OVERCLOCKED_STS */

Definition at line 4965 of file registers.h.

#define ARIZONA_OVERCLOCKED_STS_MASK   0x0020 /* OVERCLOCKED_STS */

Definition at line 4966 of file registers.h.

#define ARIZONA_OVERCLOCKED_STS_SHIFT   5 /* OVERCLOCKED_STS */

Definition at line 4967 of file registers.h.

#define ARIZONA_OVERCLOCKED_STS_WIDTH   1 /* OVERCLOCKED_STS */

Definition at line 4968 of file registers.h.

#define ARIZONA_PAD_CTRL_OVERCLOCKED_STS   0x0001 /* PAD_CTRL_OVERCLOCKED_STS */

Definition at line 5105 of file registers.h.

#define ARIZONA_PAD_CTRL_OVERCLOCKED_STS_MASK   0x0001 /* PAD_CTRL_OVERCLOCKED_STS */

Definition at line 5106 of file registers.h.

#define ARIZONA_PAD_CTRL_OVERCLOCKED_STS_SHIFT   0 /* PAD_CTRL_OVERCLOCKED_STS */

Definition at line 5107 of file registers.h.

#define ARIZONA_PAD_CTRL_OVERCLOCKED_STS_WIDTH   1 /* PAD_CTRL_OVERCLOCKED_STS */

Definition at line 5108 of file registers.h.

#define ARIZONA_PDM_SPK1_CTRL_1   0x490

Definition at line 208 of file registers.h.

#define ARIZONA_PDM_SPK1_CTRL_2   0x491

Definition at line 209 of file registers.h.

#define ARIZONA_PDM_SPK2_CTRL_1   0x492

Definition at line 210 of file registers.h.

#define ARIZONA_PDM_SPK2_CTRL_2   0x493

Definition at line 211 of file registers.h.

#define ARIZONA_PHASE1_DURATION_MASK   0x01FF /* PHASE1_DURATION - [8:0] */

Definition at line 1366 of file registers.h.

#define ARIZONA_PHASE1_DURATION_SHIFT   0 /* PHASE1_DURATION - [8:0] */

Definition at line 1367 of file registers.h.

#define ARIZONA_PHASE1_DURATION_WIDTH   9 /* PHASE1_DURATION - [8:0] */

Definition at line 1368 of file registers.h.

#define ARIZONA_PHASE1_INTENSITY_MASK   0x00FF /* PHASE1_INTENSITY - [7:0] */

Definition at line 1359 of file registers.h.

#define ARIZONA_PHASE1_INTENSITY_SHIFT   0 /* PHASE1_INTENSITY - [7:0] */

Definition at line 1360 of file registers.h.

#define ARIZONA_PHASE1_INTENSITY_WIDTH   8 /* PHASE1_INTENSITY - [7:0] */

Definition at line 1361 of file registers.h.

#define ARIZONA_PHASE2_DURATION_MASK   0x07FF /* PHASE2_DURATION - [10:0] */

Definition at line 1380 of file registers.h.

#define ARIZONA_PHASE2_DURATION_SHIFT   0 /* PHASE2_DURATION - [10:0] */

Definition at line 1381 of file registers.h.

#define ARIZONA_PHASE2_DURATION_WIDTH   11 /* PHASE2_DURATION - [10:0] */

Definition at line 1382 of file registers.h.

#define ARIZONA_PHASE2_INTENSITY_MASK   0x00FF /* PHASE2_INTENSITY - [7:0] */

Definition at line 1373 of file registers.h.

#define ARIZONA_PHASE2_INTENSITY_SHIFT   0 /* PHASE2_INTENSITY - [7:0] */

Definition at line 1374 of file registers.h.

#define ARIZONA_PHASE2_INTENSITY_WIDTH   8 /* PHASE2_INTENSITY - [7:0] */

Definition at line 1375 of file registers.h.

#define ARIZONA_PHASE3_DURATION_MASK   0x01FF /* PHASE3_DURATION - [8:0] */

Definition at line 1394 of file registers.h.

#define ARIZONA_PHASE3_DURATION_SHIFT   0 /* PHASE3_DURATION - [8:0] */

Definition at line 1395 of file registers.h.

#define ARIZONA_PHASE3_DURATION_WIDTH   9 /* PHASE3_DURATION - [8:0] */

Definition at line 1396 of file registers.h.

#define ARIZONA_PHASE3_INTENSITY_MASK   0x00FF /* PHASE3_INTENSITY - [7:0] */

Definition at line 1387 of file registers.h.

#define ARIZONA_PHASE3_INTENSITY_SHIFT   0 /* PHASE3_INTENSITY - [7:0] */

Definition at line 1388 of file registers.h.

#define ARIZONA_PHASE3_INTENSITY_WIDTH   8 /* PHASE3_INTENSITY - [7:0] */

Definition at line 1389 of file registers.h.

#define ARIZONA_PWM1_ENA   0x0001 /* PWM1_ENA */

Definition at line 1172 of file registers.h.

#define ARIZONA_PWM1_ENA_MASK   0x0001 /* PWM1_ENA */

Definition at line 1173 of file registers.h.

#define ARIZONA_PWM1_ENA_SHIFT   0 /* PWM1_ENA */

Definition at line 1174 of file registers.h.

#define ARIZONA_PWM1_ENA_WIDTH   1 /* PWM1_ENA */

Definition at line 1175 of file registers.h.

#define ARIZONA_PWM1_LVL_MASK   0x03FF /* PWM1_LVL - [9:0] */

Definition at line 1180 of file registers.h.

#define ARIZONA_PWM1_LVL_SHIFT   0 /* PWM1_LVL - [9:0] */

Definition at line 1181 of file registers.h.

#define ARIZONA_PWM1_LVL_WIDTH   10 /* PWM1_LVL - [9:0] */

Definition at line 1182 of file registers.h.

#define ARIZONA_PWM1_OVD   0x0010 /* PWM1_OVD */

Definition at line 1164 of file registers.h.

#define ARIZONA_PWM1_OVD_MASK   0x0010 /* PWM1_OVD */

Definition at line 1165 of file registers.h.

#define ARIZONA_PWM1_OVD_SHIFT   4 /* PWM1_OVD */

Definition at line 1166 of file registers.h.

#define ARIZONA_PWM1_OVD_WIDTH   1 /* PWM1_OVD */

Definition at line 1167 of file registers.h.

#define ARIZONA_PWM1MIX_INPUT_1_SOURCE   0x640

Definition at line 289 of file registers.h.

#define ARIZONA_PWM1MIX_INPUT_1_VOLUME   0x641

Definition at line 290 of file registers.h.

#define ARIZONA_PWM1MIX_INPUT_2_SOURCE   0x642

Definition at line 291 of file registers.h.

#define ARIZONA_PWM1MIX_INPUT_2_VOLUME   0x643

Definition at line 292 of file registers.h.

#define ARIZONA_PWM1MIX_INPUT_3_SOURCE   0x644

Definition at line 293 of file registers.h.

#define ARIZONA_PWM1MIX_INPUT_3_VOLUME   0x645

Definition at line 294 of file registers.h.

#define ARIZONA_PWM1MIX_INPUT_4_SOURCE   0x646

Definition at line 295 of file registers.h.

#define ARIZONA_PWM1MIX_INPUT_4_VOLUME   0x647

Definition at line 296 of file registers.h.

#define ARIZONA_PWM2_ENA   0x0002 /* PWM2_ENA */

Definition at line 1168 of file registers.h.

#define ARIZONA_PWM2_ENA_MASK   0x0002 /* PWM2_ENA */

Definition at line 1169 of file registers.h.

#define ARIZONA_PWM2_ENA_SHIFT   1 /* PWM2_ENA */

Definition at line 1170 of file registers.h.

#define ARIZONA_PWM2_ENA_WIDTH   1 /* PWM2_ENA */

Definition at line 1171 of file registers.h.

#define ARIZONA_PWM2_LVL_MASK   0x03FF /* PWM2_LVL - [9:0] */

Definition at line 1187 of file registers.h.

#define ARIZONA_PWM2_LVL_SHIFT   0 /* PWM2_LVL - [9:0] */

Definition at line 1188 of file registers.h.

#define ARIZONA_PWM2_LVL_WIDTH   10 /* PWM2_LVL - [9:0] */

Definition at line 1189 of file registers.h.

#define ARIZONA_PWM2_OVD   0x0020 /* PWM2_OVD */

Definition at line 1160 of file registers.h.

#define ARIZONA_PWM2_OVD_MASK   0x0020 /* PWM2_OVD */

Definition at line 1161 of file registers.h.

#define ARIZONA_PWM2_OVD_SHIFT   5 /* PWM2_OVD */

Definition at line 1162 of file registers.h.

#define ARIZONA_PWM2_OVD_WIDTH   1 /* PWM2_OVD */

Definition at line 1163 of file registers.h.

#define ARIZONA_PWM2MIX_INPUT_1_SOURCE   0x648

Definition at line 297 of file registers.h.

#define ARIZONA_PWM2MIX_INPUT_1_VOLUME   0x649

Definition at line 298 of file registers.h.

#define ARIZONA_PWM2MIX_INPUT_2_SOURCE   0x64A

Definition at line 299 of file registers.h.

#define ARIZONA_PWM2MIX_INPUT_2_VOLUME   0x64B

Definition at line 300 of file registers.h.

#define ARIZONA_PWM2MIX_INPUT_3_SOURCE   0x64C

Definition at line 301 of file registers.h.

#define ARIZONA_PWM2MIX_INPUT_3_VOLUME   0x64D

Definition at line 302 of file registers.h.

#define ARIZONA_PWM2MIX_INPUT_4_SOURCE   0x64E

Definition at line 303 of file registers.h.

#define ARIZONA_PWM2MIX_INPUT_4_VOLUME   0x64F

Definition at line 304 of file registers.h.

#define ARIZONA_PWM_CLK_SEL_MASK   0x0700 /* PWM_CLK_SEL - [10:8] */

Definition at line 1157 of file registers.h.

#define ARIZONA_PWM_CLK_SEL_SHIFT   8 /* PWM_CLK_SEL - [10:8] */

Definition at line 1158 of file registers.h.

#define ARIZONA_PWM_CLK_SEL_WIDTH   3 /* PWM_CLK_SEL - [10:8] */

Definition at line 1159 of file registers.h.

#define ARIZONA_PWM_DRIVE_1   0x30

Definition at line 36 of file registers.h.

#define ARIZONA_PWM_DRIVE_2   0x31

Definition at line 37 of file registers.h.

#define ARIZONA_PWM_DRIVE_3   0x32

Definition at line 38 of file registers.h.

#define ARIZONA_PWM_OVERCLOCKED_STS   0x2000 /* PWM_OVERCLOCKED_STS */

Definition at line 5057 of file registers.h.

#define ARIZONA_PWM_OVERCLOCKED_STS_MASK   0x2000 /* PWM_OVERCLOCKED_STS */

Definition at line 5058 of file registers.h.

#define ARIZONA_PWM_OVERCLOCKED_STS_SHIFT   13 /* PWM_OVERCLOCKED_STS */

Definition at line 5059 of file registers.h.

#define ARIZONA_PWM_OVERCLOCKED_STS_WIDTH   1 /* PWM_OVERCLOCKED_STS */

Definition at line 5060 of file registers.h.

#define ARIZONA_PWM_RATE_MASK   0x7800 /* PWM_RATE - [14:11] */

Definition at line 1154 of file registers.h.

#define ARIZONA_PWM_RATE_SHIFT   11 /* PWM_RATE - [14:11] */

Definition at line 1155 of file registers.h.

#define ARIZONA_PWM_RATE_WIDTH   4 /* PWM_RATE - [14:11] */

Definition at line 1156 of file registers.h.

#define ARIZONA_RATE_EST_ENA   0x0001 /* RATE_EST_ENA */

Definition at line 1543 of file registers.h.

#define ARIZONA_RATE_EST_ENA_MASK   0x0001 /* RATE_EST_ENA */

Definition at line 1544 of file registers.h.

#define ARIZONA_RATE_EST_ENA_SHIFT   0 /* RATE_EST_ENA */

Definition at line 1545 of file registers.h.

#define ARIZONA_RATE_EST_ENA_WIDTH   1 /* RATE_EST_ENA */

Definition at line 1546 of file registers.h.

#define ARIZONA_RATE_ESTIMATOR_1   0x152

Definition at line 74 of file registers.h.

#define ARIZONA_RATE_ESTIMATOR_2   0x153

Definition at line 75 of file registers.h.

#define ARIZONA_RATE_ESTIMATOR_3   0x154

Definition at line 76 of file registers.h.

#define ARIZONA_RATE_ESTIMATOR_4   0x155

Definition at line 77 of file registers.h.

#define ARIZONA_RATE_ESTIMATOR_5   0x156

Definition at line 78 of file registers.h.

#define ARIZONA_RAW_OUTPUT_STATUS_1   0x406

Definition at line 155 of file registers.h.

#define ARIZONA_RSTB_PU   0x0002 /* RSTB_PU */

Definition at line 4056 of file registers.h.

#define ARIZONA_RSTB_PU_MASK   0x0002 /* RSTB_PU */

Definition at line 4057 of file registers.h.

#define ARIZONA_RSTB_PU_SHIFT   1 /* RSTB_PU */

Definition at line 4058 of file registers.h.

#define ARIZONA_RSTB_PU_WIDTH   1 /* RSTB_PU */

Definition at line 4059 of file registers.h.

#define ARIZONA_SAMPLE_RATE_1   0x102

Definition at line 63 of file registers.h.

#define ARIZONA_SAMPLE_RATE_1_MASK   0x001F /* SAMPLE_RATE_1 - [4:0] */

Definition at line 1438 of file registers.h.

#define ARIZONA_SAMPLE_RATE_1_SHIFT   0 /* SAMPLE_RATE_1 - [4:0] */

Definition at line 1439 of file registers.h.

#define ARIZONA_SAMPLE_RATE_1_STATUS   0x10A

Definition at line 66 of file registers.h.

#define ARIZONA_SAMPLE_RATE_1_STS_MASK   0x001F /* SAMPLE_RATE_1_STS - [4:0] */

Definition at line 1459 of file registers.h.

#define ARIZONA_SAMPLE_RATE_1_STS_SHIFT   0 /* SAMPLE_RATE_1_STS - [4:0] */

Definition at line 1460 of file registers.h.

#define ARIZONA_SAMPLE_RATE_1_STS_WIDTH   5 /* SAMPLE_RATE_1_STS - [4:0] */

Definition at line 1461 of file registers.h.

#define ARIZONA_SAMPLE_RATE_1_WIDTH   5 /* SAMPLE_RATE_1 - [4:0] */

Definition at line 1440 of file registers.h.

#define ARIZONA_SAMPLE_RATE_2   0x103

Definition at line 64 of file registers.h.

#define ARIZONA_SAMPLE_RATE_2_MASK   0x001F /* SAMPLE_RATE_2 - [4:0] */

Definition at line 1445 of file registers.h.

#define ARIZONA_SAMPLE_RATE_2_SHIFT   0 /* SAMPLE_RATE_2 - [4:0] */

Definition at line 1446 of file registers.h.

#define ARIZONA_SAMPLE_RATE_2_STATUS   0x10B

Definition at line 67 of file registers.h.

#define ARIZONA_SAMPLE_RATE_2_STS_MASK   0x001F /* SAMPLE_RATE_2_STS - [4:0] */

Definition at line 1466 of file registers.h.

#define ARIZONA_SAMPLE_RATE_2_STS_SHIFT   0 /* SAMPLE_RATE_2_STS - [4:0] */

Definition at line 1467 of file registers.h.

#define ARIZONA_SAMPLE_RATE_2_STS_WIDTH   5 /* SAMPLE_RATE_2_STS - [4:0] */

Definition at line 1468 of file registers.h.

#define ARIZONA_SAMPLE_RATE_2_WIDTH   5 /* SAMPLE_RATE_2 - [4:0] */

Definition at line 1447 of file registers.h.

#define ARIZONA_SAMPLE_RATE_3   0x104

Definition at line 65 of file registers.h.

#define ARIZONA_SAMPLE_RATE_3_MASK   0x001F /* SAMPLE_RATE_3 - [4:0] */

Definition at line 1452 of file registers.h.

#define ARIZONA_SAMPLE_RATE_3_SHIFT   0 /* SAMPLE_RATE_3 - [4:0] */

Definition at line 1453 of file registers.h.

#define ARIZONA_SAMPLE_RATE_3_STATUS   0x10C

Definition at line 68 of file registers.h.

#define ARIZONA_SAMPLE_RATE_3_STS_MASK   0x001F /* SAMPLE_RATE_3_STS - [4:0] */

Definition at line 1473 of file registers.h.

#define ARIZONA_SAMPLE_RATE_3_STS_SHIFT   0 /* SAMPLE_RATE_3_STS - [4:0] */

Definition at line 1474 of file registers.h.

#define ARIZONA_SAMPLE_RATE_3_STS_WIDTH   5 /* SAMPLE_RATE_3_STS - [4:0] */

Definition at line 1475 of file registers.h.

#define ARIZONA_SAMPLE_RATE_3_WIDTH   5 /* SAMPLE_RATE_3 - [4:0] */

Definition at line 1454 of file registers.h.

#define ARIZONA_SAMPLE_RATE_DETECT_A_MASK   0x001F /* SAMPLE_RATE_DETECT_A - [4:0] */

Definition at line 1551 of file registers.h.

#define ARIZONA_SAMPLE_RATE_DETECT_A_SHIFT   0 /* SAMPLE_RATE_DETECT_A - [4:0] */

Definition at line 1552 of file registers.h.

#define ARIZONA_SAMPLE_RATE_DETECT_A_WIDTH   5 /* SAMPLE_RATE_DETECT_A - [4:0] */

Definition at line 1553 of file registers.h.

#define ARIZONA_SAMPLE_RATE_DETECT_B_MASK   0x001F /* SAMPLE_RATE_DETECT_B - [4:0] */

Definition at line 1558 of file registers.h.

#define ARIZONA_SAMPLE_RATE_DETECT_B_SHIFT   0 /* SAMPLE_RATE_DETECT_B - [4:0] */

Definition at line 1559 of file registers.h.

#define ARIZONA_SAMPLE_RATE_DETECT_B_WIDTH   5 /* SAMPLE_RATE_DETECT_B - [4:0] */

Definition at line 1560 of file registers.h.

#define ARIZONA_SAMPLE_RATE_DETECT_C_MASK   0x001F /* SAMPLE_RATE_DETECT_C - [4:0] */

Definition at line 1565 of file registers.h.

#define ARIZONA_SAMPLE_RATE_DETECT_C_SHIFT   0 /* SAMPLE_RATE_DETECT_C - [4:0] */

Definition at line 1566 of file registers.h.

#define ARIZONA_SAMPLE_RATE_DETECT_C_WIDTH   5 /* SAMPLE_RATE_DETECT_C - [4:0] */

Definition at line 1567 of file registers.h.

#define ARIZONA_SAMPLE_RATE_DETECT_D_MASK   0x001F /* SAMPLE_RATE_DETECT_D - [4:0] */

Definition at line 1572 of file registers.h.

#define ARIZONA_SAMPLE_RATE_DETECT_D_SHIFT   0 /* SAMPLE_RATE_DETECT_D - [4:0] */

Definition at line 1573 of file registers.h.

#define ARIZONA_SAMPLE_RATE_DETECT_D_WIDTH   5 /* SAMPLE_RATE_DETECT_D - [4:0] */

Definition at line 1574 of file registers.h.

#define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1   0x61

Definition at line 41 of file registers.h.

#define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2   0x62

Definition at line 42 of file registers.h.

#define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3   0x63

Definition at line 43 of file registers.h.

#define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4   0x64

Definition at line 44 of file registers.h.

#define ARIZONA_SEQUENCE_CONTROL   0x41

Definition at line 40 of file registers.h.

#define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS   0x4000 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */

Definition at line 5117 of file registers.h.

#define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_MASK   0x4000 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */

Definition at line 5118 of file registers.h.

#define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_SHIFT   14 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */

Definition at line 5119 of file registers.h.

#define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_WIDTH   1 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */

Definition at line 5120 of file registers.h.

#define ARIZONA_SLIMBUS_FRAMER_REF_GEAR   0x5E3

Definition at line 276 of file registers.h.

#define ARIZONA_SLIMBUS_RATES_1   0x5E5

Definition at line 277 of file registers.h.

#define ARIZONA_SLIMBUS_RATES_2   0x5E6

Definition at line 278 of file registers.h.

#define ARIZONA_SLIMBUS_RATES_3   0x5E7

Definition at line 279 of file registers.h.

#define ARIZONA_SLIMBUS_RATES_4   0x5E8

Definition at line 280 of file registers.h.

#define ARIZONA_SLIMBUS_RATES_5   0x5E9

Definition at line 281 of file registers.h.

#define ARIZONA_SLIMBUS_RATES_6   0x5EA

Definition at line 282 of file registers.h.

#define ARIZONA_SLIMBUS_RATES_7   0x5EB

Definition at line 283 of file registers.h.

#define ARIZONA_SLIMBUS_RATES_8   0x5EC

Definition at line 284 of file registers.h.

#define ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE   0x5F5

Definition at line 285 of file registers.h.

#define ARIZONA_SLIMBUS_RX_PORT_STATUS   0x5F7

Definition at line 287 of file registers.h.

#define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS   0x8000 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */

Definition at line 5113 of file registers.h.

#define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_MASK   0x8000 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */

Definition at line 5114 of file registers.h.

#define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_SHIFT   15 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */

Definition at line 5115 of file registers.h.

#define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_WIDTH   1 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */

Definition at line 5116 of file registers.h.

#define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS   0x2000 /* SLIMBUS_SYNC_OVERCLOCKED_STS */

Definition at line 5121 of file registers.h.

#define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_MASK   0x2000 /* SLIMBUS_SYNC_OVERCLOCKED_STS */

Definition at line 5122 of file registers.h.

#define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_SHIFT   13 /* SLIMBUS_SYNC_OVERCLOCKED_STS */

Definition at line 5123 of file registers.h.

#define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_WIDTH   1 /* SLIMBUS_SYNC_OVERCLOCKED_STS */

Definition at line 5124 of file registers.h.

#define ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE   0x5F6

Definition at line 286 of file registers.h.

#define ARIZONA_SLIMBUS_TX_PORT_STATUS   0x5F8

Definition at line 288 of file registers.h.

#define ARIZONA_SLIMCLK_SRC   0x0010 /* SLIMCLK_SRC */

Definition at line 3794 of file registers.h.

#define ARIZONA_SLIMCLK_SRC_MASK   0x0010 /* SLIMCLK_SRC */

Definition at line 3795 of file registers.h.

#define ARIZONA_SLIMCLK_SRC_SHIFT   4 /* SLIMCLK_SRC */

Definition at line 3796 of file registers.h.

#define ARIZONA_SLIMCLK_SRC_WIDTH   1 /* SLIMCLK_SRC */

Definition at line 3797 of file registers.h.

#define ARIZONA_SLIMRX1_ENA   0x0001 /* SLIMRX1_ENA */

Definition at line 3913 of file registers.h.

#define ARIZONA_SLIMRX1_ENA_MASK   0x0001 /* SLIMRX1_ENA */

Definition at line 3914 of file registers.h.

#define ARIZONA_SLIMRX1_ENA_SHIFT   0 /* SLIMRX1_ENA */

Definition at line 3915 of file registers.h.

#define ARIZONA_SLIMRX1_ENA_WIDTH   1 /* SLIMRX1_ENA */

Definition at line 3916 of file registers.h.

#define ARIZONA_SLIMRX1_PORT_STS   0x0001 /* SLIMRX1_PORT_STS */

Definition at line 3985 of file registers.h.

#define ARIZONA_SLIMRX1_PORT_STS_MASK   0x0001 /* SLIMRX1_PORT_STS */

Definition at line 3986 of file registers.h.

#define ARIZONA_SLIMRX1_PORT_STS_SHIFT   0 /* SLIMRX1_PORT_STS */

Definition at line 3987 of file registers.h.

#define ARIZONA_SLIMRX1_PORT_STS_WIDTH   1 /* SLIMRX1_PORT_STS */

Definition at line 3988 of file registers.h.

#define ARIZONA_SLIMRX1_RATE_MASK   0x0078 /* SLIMRX1_RATE - [6:3] */

Definition at line 3808 of file registers.h.

#define ARIZONA_SLIMRX1_RATE_SHIFT   3 /* SLIMRX1_RATE - [6:3] */

Definition at line 3809 of file registers.h.

#define ARIZONA_SLIMRX1_RATE_WIDTH   4 /* SLIMRX1_RATE - [6:3] */

Definition at line 3810 of file registers.h.

#define ARIZONA_SLIMRX2_ENA   0x0002 /* SLIMRX2_ENA */

Definition at line 3909 of file registers.h.

#define ARIZONA_SLIMRX2_ENA_MASK   0x0002 /* SLIMRX2_ENA */

Definition at line 3910 of file registers.h.

#define ARIZONA_SLIMRX2_ENA_SHIFT   1 /* SLIMRX2_ENA */

Definition at line 3911 of file registers.h.

#define ARIZONA_SLIMRX2_ENA_WIDTH   1 /* SLIMRX2_ENA */

Definition at line 3912 of file registers.h.

#define ARIZONA_SLIMRX2_PORT_STS   0x0002 /* SLIMRX2_PORT_STS */

Definition at line 3981 of file registers.h.

#define ARIZONA_SLIMRX2_PORT_STS_MASK   0x0002 /* SLIMRX2_PORT_STS */

Definition at line 3982 of file registers.h.

#define ARIZONA_SLIMRX2_PORT_STS_SHIFT   1 /* SLIMRX2_PORT_STS */

Definition at line 3983 of file registers.h.

#define ARIZONA_SLIMRX2_PORT_STS_WIDTH   1 /* SLIMRX2_PORT_STS */

Definition at line 3984 of file registers.h.

#define ARIZONA_SLIMRX2_RATE_MASK   0x7800 /* SLIMRX2_RATE - [14:11] */

Definition at line 3805 of file registers.h.

#define ARIZONA_SLIMRX2_RATE_SHIFT   11 /* SLIMRX2_RATE - [14:11] */

Definition at line 3806 of file registers.h.

#define ARIZONA_SLIMRX2_RATE_WIDTH   4 /* SLIMRX2_RATE - [14:11] */

Definition at line 3807 of file registers.h.

#define ARIZONA_SLIMRX3_ENA   0x0004 /* SLIMRX3_ENA */

Definition at line 3905 of file registers.h.

#define ARIZONA_SLIMRX3_ENA_MASK   0x0004 /* SLIMRX3_ENA */

Definition at line 3906 of file registers.h.

#define ARIZONA_SLIMRX3_ENA_SHIFT   2 /* SLIMRX3_ENA */

Definition at line 3907 of file registers.h.

#define ARIZONA_SLIMRX3_ENA_WIDTH   1 /* SLIMRX3_ENA */

Definition at line 3908 of file registers.h.

#define ARIZONA_SLIMRX3_PORT_STS   0x0004 /* SLIMRX3_PORT_STS */

Definition at line 3977 of file registers.h.

#define ARIZONA_SLIMRX3_PORT_STS_MASK   0x0004 /* SLIMRX3_PORT_STS */

Definition at line 3978 of file registers.h.

#define ARIZONA_SLIMRX3_PORT_STS_SHIFT   2 /* SLIMRX3_PORT_STS */

Definition at line 3979 of file registers.h.

#define ARIZONA_SLIMRX3_PORT_STS_WIDTH   1 /* SLIMRX3_PORT_STS */

Definition at line 3980 of file registers.h.

#define ARIZONA_SLIMRX3_RATE_MASK   0x0078 /* SLIMRX3_RATE - [6:3] */

Definition at line 3818 of file registers.h.

#define ARIZONA_SLIMRX3_RATE_SHIFT   3 /* SLIMRX3_RATE - [6:3] */

Definition at line 3819 of file registers.h.

#define ARIZONA_SLIMRX3_RATE_WIDTH   4 /* SLIMRX3_RATE - [6:3] */

Definition at line 3820 of file registers.h.

#define ARIZONA_SLIMRX4_ENA   0x0008 /* SLIMRX4_ENA */

Definition at line 3901 of file registers.h.

#define ARIZONA_SLIMRX4_ENA_MASK   0x0008 /* SLIMRX4_ENA */

Definition at line 3902 of file registers.h.

#define ARIZONA_SLIMRX4_ENA_SHIFT   3 /* SLIMRX4_ENA */

Definition at line 3903 of file registers.h.

#define ARIZONA_SLIMRX4_ENA_WIDTH   1 /* SLIMRX4_ENA */

Definition at line 3904 of file registers.h.

#define ARIZONA_SLIMRX4_PORT_STS   0x0008 /* SLIMRX4_PORT_STS */

Definition at line 3973 of file registers.h.

#define ARIZONA_SLIMRX4_PORT_STS_MASK   0x0008 /* SLIMRX4_PORT_STS */

Definition at line 3974 of file registers.h.

#define ARIZONA_SLIMRX4_PORT_STS_SHIFT   3 /* SLIMRX4_PORT_STS */

Definition at line 3975 of file registers.h.

#define ARIZONA_SLIMRX4_PORT_STS_WIDTH   1 /* SLIMRX4_PORT_STS */

Definition at line 3976 of file registers.h.

#define ARIZONA_SLIMRX4_RATE_MASK   0x7800 /* SLIMRX4_RATE - [14:11] */

Definition at line 3815 of file registers.h.

#define ARIZONA_SLIMRX4_RATE_SHIFT   11 /* SLIMRX4_RATE - [14:11] */

Definition at line 3816 of file registers.h.

#define ARIZONA_SLIMRX4_RATE_WIDTH   4 /* SLIMRX4_RATE - [14:11] */

Definition at line 3817 of file registers.h.

#define ARIZONA_SLIMRX5_ENA   0x0010 /* SLIMRX5_ENA */

Definition at line 3897 of file registers.h.

#define ARIZONA_SLIMRX5_ENA_MASK   0x0010 /* SLIMRX5_ENA */

Definition at line 3898 of file registers.h.

#define ARIZONA_SLIMRX5_ENA_SHIFT   4 /* SLIMRX5_ENA */

Definition at line 3899 of file registers.h.

#define ARIZONA_SLIMRX5_ENA_WIDTH   1 /* SLIMRX5_ENA */

Definition at line 3900 of file registers.h.

#define ARIZONA_SLIMRX5_PORT_STS   0x0010 /* SLIMRX5_PORT_STS */

Definition at line 3969 of file registers.h.

#define ARIZONA_SLIMRX5_PORT_STS_MASK   0x0010 /* SLIMRX5_PORT_STS */

Definition at line 3970 of file registers.h.

#define ARIZONA_SLIMRX5_PORT_STS_SHIFT   4 /* SLIMRX5_PORT_STS */

Definition at line 3971 of file registers.h.

#define ARIZONA_SLIMRX5_PORT_STS_WIDTH   1 /* SLIMRX5_PORT_STS */

Definition at line 3972 of file registers.h.

#define ARIZONA_SLIMRX5_RATE_MASK   0x0078 /* SLIMRX5_RATE - [6:3] */

Definition at line 3828 of file registers.h.

#define ARIZONA_SLIMRX5_RATE_SHIFT   3 /* SLIMRX5_RATE - [6:3] */

Definition at line 3829 of file registers.h.

#define ARIZONA_SLIMRX5_RATE_WIDTH   4 /* SLIMRX5_RATE - [6:3] */

Definition at line 3830 of file registers.h.

#define ARIZONA_SLIMRX6_ENA   0x0020 /* SLIMRX6_ENA */

Definition at line 3893 of file registers.h.

#define ARIZONA_SLIMRX6_ENA_MASK   0x0020 /* SLIMRX6_ENA */

Definition at line 3894 of file registers.h.

#define ARIZONA_SLIMRX6_ENA_SHIFT   5 /* SLIMRX6_ENA */

Definition at line 3895 of file registers.h.

#define ARIZONA_SLIMRX6_ENA_WIDTH   1 /* SLIMRX6_ENA */

Definition at line 3896 of file registers.h.

#define ARIZONA_SLIMRX6_PORT_STS   0x0020 /* SLIMRX6_PORT_STS */

Definition at line 3965 of file registers.h.

#define ARIZONA_SLIMRX6_PORT_STS_MASK   0x0020 /* SLIMRX6_PORT_STS */

Definition at line 3966 of file registers.h.

#define ARIZONA_SLIMRX6_PORT_STS_SHIFT   5 /* SLIMRX6_PORT_STS */

Definition at line 3967 of file registers.h.

#define ARIZONA_SLIMRX6_PORT_STS_WIDTH   1 /* SLIMRX6_PORT_STS */

Definition at line 3968 of file registers.h.

#define ARIZONA_SLIMRX6_RATE_MASK   0x7800 /* SLIMRX6_RATE - [14:11] */

Definition at line 3825 of file registers.h.

#define ARIZONA_SLIMRX6_RATE_SHIFT   11 /* SLIMRX6_RATE - [14:11] */

Definition at line 3826 of file registers.h.

#define ARIZONA_SLIMRX6_RATE_WIDTH   4 /* SLIMRX6_RATE - [14:11] */

Definition at line 3827 of file registers.h.

#define ARIZONA_SLIMRX7_ENA   0x0040 /* SLIMRX7_ENA */

Definition at line 3889 of file registers.h.

#define ARIZONA_SLIMRX7_ENA_MASK   0x0040 /* SLIMRX7_ENA */

Definition at line 3890 of file registers.h.

#define ARIZONA_SLIMRX7_ENA_SHIFT   6 /* SLIMRX7_ENA */

Definition at line 3891 of file registers.h.

#define ARIZONA_SLIMRX7_ENA_WIDTH   1 /* SLIMRX7_ENA */

Definition at line 3892 of file registers.h.

#define ARIZONA_SLIMRX7_PORT_STS   0x0040 /* SLIMRX7_PORT_STS */

Definition at line 3961 of file registers.h.

#define ARIZONA_SLIMRX7_PORT_STS_MASK   0x0040 /* SLIMRX7_PORT_STS */

Definition at line 3962 of file registers.h.

#define ARIZONA_SLIMRX7_PORT_STS_SHIFT   6 /* SLIMRX7_PORT_STS */

Definition at line 3963 of file registers.h.

#define ARIZONA_SLIMRX7_PORT_STS_WIDTH   1 /* SLIMRX7_PORT_STS */

Definition at line 3964 of file registers.h.

#define ARIZONA_SLIMRX7_RATE_MASK   0x0078 /* SLIMRX7_RATE - [6:3] */

Definition at line 3838 of file registers.h.

#define ARIZONA_SLIMRX7_RATE_SHIFT   3 /* SLIMRX7_RATE - [6:3] */

Definition at line 3839 of file registers.h.

#define ARIZONA_SLIMRX7_RATE_WIDTH   4 /* SLIMRX7_RATE - [6:3] */

Definition at line 3840 of file registers.h.

#define ARIZONA_SLIMRX8_ENA   0x0080 /* SLIMRX8_ENA */

Definition at line 3885 of file registers.h.

#define ARIZONA_SLIMRX8_ENA_MASK   0x0080 /* SLIMRX8_ENA */

Definition at line 3886 of file registers.h.

#define ARIZONA_SLIMRX8_ENA_SHIFT   7 /* SLIMRX8_ENA */

Definition at line 3887 of file registers.h.

#define ARIZONA_SLIMRX8_ENA_WIDTH   1 /* SLIMRX8_ENA */

Definition at line 3888 of file registers.h.

#define ARIZONA_SLIMRX8_PORT_STS   0x0080 /* SLIMRX8_PORT_STS */

Definition at line 3957 of file registers.h.

#define ARIZONA_SLIMRX8_PORT_STS_MASK   0x0080 /* SLIMRX8_PORT_STS */

Definition at line 3958 of file registers.h.

#define ARIZONA_SLIMRX8_PORT_STS_SHIFT   7 /* SLIMRX8_PORT_STS */

Definition at line 3959 of file registers.h.

#define ARIZONA_SLIMRX8_PORT_STS_WIDTH   1 /* SLIMRX8_PORT_STS */

Definition at line 3960 of file registers.h.

#define ARIZONA_SLIMRX8_RATE_MASK   0x7800 /* SLIMRX8_RATE - [14:11] */

Definition at line 3835 of file registers.h.

#define ARIZONA_SLIMRX8_RATE_SHIFT   11 /* SLIMRX8_RATE - [14:11] */

Definition at line 3836 of file registers.h.

#define ARIZONA_SLIMRX8_RATE_WIDTH   4 /* SLIMRX8_RATE - [14:11] */

Definition at line 3837 of file registers.h.

#define ARIZONA_SLIMTX1_ENA   0x0001 /* SLIMTX1_ENA */

Definition at line 3949 of file registers.h.

#define ARIZONA_SLIMTX1_ENA_MASK   0x0001 /* SLIMTX1_ENA */

Definition at line 3950 of file registers.h.

#define ARIZONA_SLIMTX1_ENA_SHIFT   0 /* SLIMTX1_ENA */

Definition at line 3951 of file registers.h.

#define ARIZONA_SLIMTX1_ENA_WIDTH   1 /* SLIMTX1_ENA */

Definition at line 3952 of file registers.h.

#define ARIZONA_SLIMTX1_PORT_STS   0x0001 /* SLIMTX1_PORT_STS */

Definition at line 4021 of file registers.h.

#define ARIZONA_SLIMTX1_PORT_STS_MASK   0x0001 /* SLIMTX1_PORT_STS */

Definition at line 4022 of file registers.h.

#define ARIZONA_SLIMTX1_PORT_STS_SHIFT   0 /* SLIMTX1_PORT_STS */

Definition at line 4023 of file registers.h.

#define ARIZONA_SLIMTX1_PORT_STS_WIDTH   1 /* SLIMTX1_PORT_STS */

Definition at line 4024 of file registers.h.

#define ARIZONA_SLIMTX1_RATE_MASK   0x0078 /* SLIMTX1_RATE - [6:3] */

Definition at line 3848 of file registers.h.

#define ARIZONA_SLIMTX1_RATE_SHIFT   3 /* SLIMTX1_RATE - [6:3] */

Definition at line 3849 of file registers.h.

#define ARIZONA_SLIMTX1_RATE_WIDTH   4 /* SLIMTX1_RATE - [6:3] */

Definition at line 3850 of file registers.h.

#define ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE   0x7C0

Definition at line 513 of file registers.h.

#define ARIZONA_SLIMTX1MIX_INPUT_1_VOLUME   0x7C1

Definition at line 514 of file registers.h.

#define ARIZONA_SLIMTX1MIX_INPUT_2_SOURCE   0x7C2

Definition at line 515 of file registers.h.

#define ARIZONA_SLIMTX1MIX_INPUT_2_VOLUME   0x7C3

Definition at line 516 of file registers.h.

#define ARIZONA_SLIMTX1MIX_INPUT_3_SOURCE   0x7C4

Definition at line 517 of file registers.h.

#define ARIZONA_SLIMTX1MIX_INPUT_3_VOLUME   0x7C5

Definition at line 518 of file registers.h.

#define ARIZONA_SLIMTX1MIX_INPUT_4_SOURCE   0x7C6

Definition at line 519 of file registers.h.

#define ARIZONA_SLIMTX1MIX_INPUT_4_VOLUME   0x7C7

Definition at line 520 of file registers.h.

#define ARIZONA_SLIMTX2_ENA   0x0002 /* SLIMTX2_ENA */

Definition at line 3945 of file registers.h.

#define ARIZONA_SLIMTX2_ENA_MASK   0x0002 /* SLIMTX2_ENA */

Definition at line 3946 of file registers.h.

#define ARIZONA_SLIMTX2_ENA_SHIFT   1 /* SLIMTX2_ENA */

Definition at line 3947 of file registers.h.

#define ARIZONA_SLIMTX2_ENA_WIDTH   1 /* SLIMTX2_ENA */

Definition at line 3948 of file registers.h.

#define ARIZONA_SLIMTX2_PORT_STS   0x0002 /* SLIMTX2_PORT_STS */

Definition at line 4017 of file registers.h.

#define ARIZONA_SLIMTX2_PORT_STS_MASK   0x0002 /* SLIMTX2_PORT_STS */

Definition at line 4018 of file registers.h.

#define ARIZONA_SLIMTX2_PORT_STS_SHIFT   1 /* SLIMTX2_PORT_STS */

Definition at line 4019 of file registers.h.

#define ARIZONA_SLIMTX2_PORT_STS_WIDTH   1 /* SLIMTX2_PORT_STS */

Definition at line 4020 of file registers.h.

#define ARIZONA_SLIMTX2_RATE_MASK   0x7800 /* SLIMTX2_RATE - [14:11] */

Definition at line 3845 of file registers.h.

#define ARIZONA_SLIMTX2_RATE_SHIFT   11 /* SLIMTX2_RATE - [14:11] */

Definition at line 3846 of file registers.h.

#define ARIZONA_SLIMTX2_RATE_WIDTH   4 /* SLIMTX2_RATE - [14:11] */

Definition at line 3847 of file registers.h.

#define ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE   0x7C8

Definition at line 521 of file registers.h.

#define ARIZONA_SLIMTX2MIX_INPUT_1_VOLUME   0x7C9

Definition at line 522 of file registers.h.

#define ARIZONA_SLIMTX2MIX_INPUT_2_SOURCE   0x7CA

Definition at line 523 of file registers.h.

#define ARIZONA_SLIMTX2MIX_INPUT_2_VOLUME   0x7CB

Definition at line 524 of file registers.h.

#define ARIZONA_SLIMTX2MIX_INPUT_3_SOURCE   0x7CC

Definition at line 525 of file registers.h.

#define ARIZONA_SLIMTX2MIX_INPUT_3_VOLUME   0x7CD

Definition at line 526 of file registers.h.

#define ARIZONA_SLIMTX2MIX_INPUT_4_SOURCE   0x7CE

Definition at line 527 of file registers.h.

#define ARIZONA_SLIMTX2MIX_INPUT_4_VOLUME   0x7CF

Definition at line 528 of file registers.h.

#define ARIZONA_SLIMTX3_ENA   0x0004 /* SLIMTX3_ENA */

Definition at line 3941 of file registers.h.

#define ARIZONA_SLIMTX3_ENA_MASK   0x0004 /* SLIMTX3_ENA */

Definition at line 3942 of file registers.h.

#define ARIZONA_SLIMTX3_ENA_SHIFT   2 /* SLIMTX3_ENA */

Definition at line 3943 of file registers.h.

#define ARIZONA_SLIMTX3_ENA_WIDTH   1 /* SLIMTX3_ENA */

Definition at line 3944 of file registers.h.

#define ARIZONA_SLIMTX3_PORT_STS   0x0004 /* SLIMTX3_PORT_STS */

Definition at line 4013 of file registers.h.

#define ARIZONA_SLIMTX3_PORT_STS_MASK   0x0004 /* SLIMTX3_PORT_STS */

Definition at line 4014 of file registers.h.

#define ARIZONA_SLIMTX3_PORT_STS_SHIFT   2 /* SLIMTX3_PORT_STS */

Definition at line 4015 of file registers.h.

#define ARIZONA_SLIMTX3_PORT_STS_WIDTH   1 /* SLIMTX3_PORT_STS */

Definition at line 4016 of file registers.h.

#define ARIZONA_SLIMTX3_RATE_MASK   0x0078 /* SLIMTX3_RATE - [6:3] */

Definition at line 3858 of file registers.h.

#define ARIZONA_SLIMTX3_RATE_SHIFT   3 /* SLIMTX3_RATE - [6:3] */

Definition at line 3859 of file registers.h.

#define ARIZONA_SLIMTX3_RATE_WIDTH   4 /* SLIMTX3_RATE - [6:3] */

Definition at line 3860 of file registers.h.

#define ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE   0x7D0

Definition at line 529 of file registers.h.

#define ARIZONA_SLIMTX3MIX_INPUT_1_VOLUME   0x7D1

Definition at line 530 of file registers.h.

#define ARIZONA_SLIMTX3MIX_INPUT_2_SOURCE   0x7D2

Definition at line 531 of file registers.h.

#define ARIZONA_SLIMTX3MIX_INPUT_2_VOLUME   0x7D3

Definition at line 532 of file registers.h.

#define ARIZONA_SLIMTX3MIX_INPUT_3_SOURCE   0x7D4

Definition at line 533 of file registers.h.

#define ARIZONA_SLIMTX3MIX_INPUT_3_VOLUME   0x7D5

Definition at line 534 of file registers.h.

#define ARIZONA_SLIMTX3MIX_INPUT_4_SOURCE   0x7D6

Definition at line 535 of file registers.h.

#define ARIZONA_SLIMTX3MIX_INPUT_4_VOLUME   0x7D7

Definition at line 536 of file registers.h.

#define ARIZONA_SLIMTX4_ENA   0x0008 /* SLIMTX4_ENA */

Definition at line 3937 of file registers.h.

#define ARIZONA_SLIMTX4_ENA_MASK   0x0008 /* SLIMTX4_ENA */

Definition at line 3938 of file registers.h.

#define ARIZONA_SLIMTX4_ENA_SHIFT   3 /* SLIMTX4_ENA */

Definition at line 3939 of file registers.h.

#define ARIZONA_SLIMTX4_ENA_WIDTH   1 /* SLIMTX4_ENA */

Definition at line 3940 of file registers.h.

#define ARIZONA_SLIMTX4_PORT_STS   0x0008 /* SLIMTX4_PORT_STS */

Definition at line 4009 of file registers.h.

#define ARIZONA_SLIMTX4_PORT_STS_MASK   0x0008 /* SLIMTX4_PORT_STS */

Definition at line 4010 of file registers.h.

#define ARIZONA_SLIMTX4_PORT_STS_SHIFT   3 /* SLIMTX4_PORT_STS */

Definition at line 4011 of file registers.h.

#define ARIZONA_SLIMTX4_PORT_STS_WIDTH   1 /* SLIMTX4_PORT_STS */

Definition at line 4012 of file registers.h.

#define ARIZONA_SLIMTX4_RATE_MASK   0x7800 /* SLIMTX4_RATE - [14:11] */

Definition at line 3855 of file registers.h.

#define ARIZONA_SLIMTX4_RATE_SHIFT   11 /* SLIMTX4_RATE - [14:11] */

Definition at line 3856 of file registers.h.

#define ARIZONA_SLIMTX4_RATE_WIDTH   4 /* SLIMTX4_RATE - [14:11] */

Definition at line 3857 of file registers.h.

#define ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE   0x7D8

Definition at line 537 of file registers.h.

#define ARIZONA_SLIMTX4MIX_INPUT_1_VOLUME   0x7D9

Definition at line 538 of file registers.h.

#define ARIZONA_SLIMTX4MIX_INPUT_2_SOURCE   0x7DA

Definition at line 539 of file registers.h.

#define ARIZONA_SLIMTX4MIX_INPUT_2_VOLUME   0x7DB

Definition at line 540 of file registers.h.

#define ARIZONA_SLIMTX4MIX_INPUT_3_SOURCE   0x7DC

Definition at line 541 of file registers.h.

#define ARIZONA_SLIMTX4MIX_INPUT_3_VOLUME   0x7DD

Definition at line 542 of file registers.h.

#define ARIZONA_SLIMTX4MIX_INPUT_4_SOURCE   0x7DE

Definition at line 543 of file registers.h.

#define ARIZONA_SLIMTX4MIX_INPUT_4_VOLUME   0x7DF

Definition at line 544 of file registers.h.

#define ARIZONA_SLIMTX5_ENA   0x0010 /* SLIMTX5_ENA */

Definition at line 3933 of file registers.h.

#define ARIZONA_SLIMTX5_ENA_MASK   0x0010 /* SLIMTX5_ENA */

Definition at line 3934 of file registers.h.

#define ARIZONA_SLIMTX5_ENA_SHIFT   4 /* SLIMTX5_ENA */

Definition at line 3935 of file registers.h.

#define ARIZONA_SLIMTX5_ENA_WIDTH   1 /* SLIMTX5_ENA */

Definition at line 3936 of file registers.h.

#define ARIZONA_SLIMTX5_PORT_STS   0x0010 /* SLIMTX5_PORT_STS */

Definition at line 4005 of file registers.h.

#define ARIZONA_SLIMTX5_PORT_STS_MASK   0x0010 /* SLIMTX5_PORT_STS */

Definition at line 4006 of file registers.h.

#define ARIZONA_SLIMTX5_PORT_STS_SHIFT   4 /* SLIMTX5_PORT_STS */

Definition at line 4007 of file registers.h.

#define ARIZONA_SLIMTX5_PORT_STS_WIDTH   1 /* SLIMTX5_PORT_STS */

Definition at line 4008 of file registers.h.

#define ARIZONA_SLIMTX5_RATE_MASK   0x0078 /* SLIMTX5_RATE - [6:3] */

Definition at line 3868 of file registers.h.

#define ARIZONA_SLIMTX5_RATE_SHIFT   3 /* SLIMTX5_RATE - [6:3] */

Definition at line 3869 of file registers.h.

#define ARIZONA_SLIMTX5_RATE_WIDTH   4 /* SLIMTX5_RATE - [6:3] */

Definition at line 3870 of file registers.h.

#define ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE   0x7E0

Definition at line 545 of file registers.h.

#define ARIZONA_SLIMTX5MIX_INPUT_1_VOLUME   0x7E1

Definition at line 546 of file registers.h.

#define ARIZONA_SLIMTX5MIX_INPUT_2_SOURCE   0x7E2

Definition at line 547 of file registers.h.

#define ARIZONA_SLIMTX5MIX_INPUT_2_VOLUME   0x7E3

Definition at line 548 of file registers.h.

#define ARIZONA_SLIMTX5MIX_INPUT_3_SOURCE   0x7E4

Definition at line 549 of file registers.h.

#define ARIZONA_SLIMTX5MIX_INPUT_3_VOLUME   0x7E5

Definition at line 550 of file registers.h.

#define ARIZONA_SLIMTX5MIX_INPUT_4_SOURCE   0x7E6

Definition at line 551 of file registers.h.

#define ARIZONA_SLIMTX5MIX_INPUT_4_VOLUME   0x7E7

Definition at line 552 of file registers.h.

#define ARIZONA_SLIMTX6_ENA   0x0020 /* SLIMTX6_ENA */

Definition at line 3929 of file registers.h.

#define ARIZONA_SLIMTX6_ENA_MASK   0x0020 /* SLIMTX6_ENA */

Definition at line 3930 of file registers.h.

#define ARIZONA_SLIMTX6_ENA_SHIFT   5 /* SLIMTX6_ENA */

Definition at line 3931 of file registers.h.

#define ARIZONA_SLIMTX6_ENA_WIDTH   1 /* SLIMTX6_ENA */

Definition at line 3932 of file registers.h.

#define ARIZONA_SLIMTX6_PORT_STS   0x0020 /* SLIMTX6_PORT_STS */

Definition at line 4001 of file registers.h.

#define ARIZONA_SLIMTX6_PORT_STS_MASK   0x0020 /* SLIMTX6_PORT_STS */

Definition at line 4002 of file registers.h.

#define ARIZONA_SLIMTX6_PORT_STS_SHIFT   5 /* SLIMTX6_PORT_STS */

Definition at line 4003 of file registers.h.

#define ARIZONA_SLIMTX6_PORT_STS_WIDTH   1 /* SLIMTX6_PORT_STS */

Definition at line 4004 of file registers.h.

#define ARIZONA_SLIMTX6_RATE_MASK   0x7800 /* SLIMTX6_RATE - [14:11] */

Definition at line 3865 of file registers.h.

#define ARIZONA_SLIMTX6_RATE_SHIFT   11 /* SLIMTX6_RATE - [14:11] */

Definition at line 3866 of file registers.h.

#define ARIZONA_SLIMTX6_RATE_WIDTH   4 /* SLIMTX6_RATE - [14:11] */

Definition at line 3867 of file registers.h.

#define ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE   0x7E8

Definition at line 553 of file registers.h.

#define ARIZONA_SLIMTX6MIX_INPUT_1_VOLUME   0x7E9

Definition at line 554 of file registers.h.

#define ARIZONA_SLIMTX6MIX_INPUT_2_SOURCE   0x7EA

Definition at line 555 of file registers.h.

#define ARIZONA_SLIMTX6MIX_INPUT_2_VOLUME   0x7EB

Definition at line 556 of file registers.h.

#define ARIZONA_SLIMTX6MIX_INPUT_3_SOURCE   0x7EC

Definition at line 557 of file registers.h.

#define ARIZONA_SLIMTX6MIX_INPUT_3_VOLUME   0x7ED

Definition at line 558 of file registers.h.

#define ARIZONA_SLIMTX6MIX_INPUT_4_SOURCE   0x7EE

Definition at line 559 of file registers.h.

#define ARIZONA_SLIMTX6MIX_INPUT_4_VOLUME   0x7EF

Definition at line 560 of file registers.h.

#define ARIZONA_SLIMTX7_ENA   0x0040 /* SLIMTX7_ENA */

Definition at line 3925 of file registers.h.

#define ARIZONA_SLIMTX7_ENA_MASK   0x0040 /* SLIMTX7_ENA */

Definition at line 3926 of file registers.h.

#define ARIZONA_SLIMTX7_ENA_SHIFT   6 /* SLIMTX7_ENA */

Definition at line 3927 of file registers.h.

#define ARIZONA_SLIMTX7_ENA_WIDTH   1 /* SLIMTX7_ENA */

Definition at line 3928 of file registers.h.

#define ARIZONA_SLIMTX7_PORT_STS   0x0040 /* SLIMTX7_PORT_STS */

Definition at line 3997 of file registers.h.

#define ARIZONA_SLIMTX7_PORT_STS_MASK   0x0040 /* SLIMTX7_PORT_STS */

Definition at line 3998 of file registers.h.

#define ARIZONA_SLIMTX7_PORT_STS_SHIFT   6 /* SLIMTX7_PORT_STS */

Definition at line 3999 of file registers.h.

#define ARIZONA_SLIMTX7_PORT_STS_WIDTH   1 /* SLIMTX7_PORT_STS */

Definition at line 4000 of file registers.h.

#define ARIZONA_SLIMTX7_RATE_MASK   0x0078 /* SLIMTX7_RATE - [6:3] */

Definition at line 3878 of file registers.h.

#define ARIZONA_SLIMTX7_RATE_SHIFT   3 /* SLIMTX7_RATE - [6:3] */

Definition at line 3879 of file registers.h.

#define ARIZONA_SLIMTX7_RATE_WIDTH   4 /* SLIMTX7_RATE - [6:3] */

Definition at line 3880 of file registers.h.

#define ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE   0x7F0

Definition at line 561 of file registers.h.

#define ARIZONA_SLIMTX7MIX_INPUT_1_VOLUME   0x7F1

Definition at line 562 of file registers.h.

#define ARIZONA_SLIMTX7MIX_INPUT_2_SOURCE   0x7F2

Definition at line 563 of file registers.h.

#define ARIZONA_SLIMTX7MIX_INPUT_2_VOLUME   0x7F3

Definition at line 564 of file registers.h.

#define ARIZONA_SLIMTX7MIX_INPUT_3_SOURCE   0x7F4

Definition at line 565 of file registers.h.

#define ARIZONA_SLIMTX7MIX_INPUT_3_VOLUME   0x7F5

Definition at line 566 of file registers.h.

#define ARIZONA_SLIMTX7MIX_INPUT_4_SOURCE   0x7F6

Definition at line 567 of file registers.h.

#define ARIZONA_SLIMTX7MIX_INPUT_4_VOLUME   0x7F7

Definition at line 568 of file registers.h.

#define ARIZONA_SLIMTX8_ENA   0x0080 /* SLIMTX8_ENA */

Definition at line 3921 of file registers.h.

#define ARIZONA_SLIMTX8_ENA_MASK   0x0080 /* SLIMTX8_ENA */

Definition at line 3922 of file registers.h.

#define ARIZONA_SLIMTX8_ENA_SHIFT   7 /* SLIMTX8_ENA */

Definition at line 3923 of file registers.h.

#define ARIZONA_SLIMTX8_ENA_WIDTH   1 /* SLIMTX8_ENA */

Definition at line 3924 of file registers.h.

#define ARIZONA_SLIMTX8_PORT_STS   0x0080 /* SLIMTX8_PORT_STS */

Definition at line 3993 of file registers.h.

#define ARIZONA_SLIMTX8_PORT_STS_MASK   0x0080 /* SLIMTX8_PORT_STS */

Definition at line 3994 of file registers.h.

#define ARIZONA_SLIMTX8_PORT_STS_SHIFT   7 /* SLIMTX8_PORT_STS */

Definition at line 3995 of file registers.h.

#define ARIZONA_SLIMTX8_PORT_STS_WIDTH   1 /* SLIMTX8_PORT_STS */

Definition at line 3996 of file registers.h.

#define ARIZONA_SLIMTX8_RATE_MASK   0x7800 /* SLIMTX8_RATE - [14:11] */

Definition at line 3875 of file registers.h.

#define ARIZONA_SLIMTX8_RATE_SHIFT   11 /* SLIMTX8_RATE - [14:11] */

Definition at line 3876 of file registers.h.

#define ARIZONA_SLIMTX8_RATE_WIDTH   4 /* SLIMTX8_RATE - [14:11] */

Definition at line 3877 of file registers.h.

#define ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE   0x7F8

Definition at line 569 of file registers.h.

#define ARIZONA_SLIMTX8MIX_INPUT_1_VOLUME   0x7F9

Definition at line 570 of file registers.h.

#define ARIZONA_SLIMTX8MIX_INPUT_2_SOURCE   0x7FA

Definition at line 571 of file registers.h.

#define ARIZONA_SLIMTX8MIX_INPUT_2_VOLUME   0x7FB

Definition at line 572 of file registers.h.

#define ARIZONA_SLIMTX8MIX_INPUT_3_SOURCE   0x7FC

Definition at line 573 of file registers.h.

#define ARIZONA_SLIMTX8MIX_INPUT_3_VOLUME   0x7FD

Definition at line 574 of file registers.h.

#define ARIZONA_SLIMTX8MIX_INPUT_4_SOURCE   0x7FE

Definition at line 575 of file registers.h.

#define ARIZONA_SLIMTX8MIX_INPUT_4_VOLUME   0x7FF

Definition at line 576 of file registers.h.

#define ARIZONA_SOFTWARE_RESET   0x00

Definition at line 19 of file registers.h.

#define ARIZONA_SPI_4WIRE   0x0008 /* SPI_4WIRE */

Definition at line 1020 of file registers.h.

#define ARIZONA_SPI_4WIRE_MASK   0x0008 /* SPI_4WIRE */

Definition at line 1021 of file registers.h.

#define ARIZONA_SPI_4WIRE_SHIFT   3 /* SPI_4WIRE */

Definition at line 1022 of file registers.h.

#define ARIZONA_SPI_4WIRE_WIDTH   1 /* SPI_4WIRE */

Definition at line 1023 of file registers.h.

#define ARIZONA_SPI_AUTO_INC_MASK   0x0003 /* SPI_AUTO_INC - [1:0] */

Definition at line 1024 of file registers.h.

#define ARIZONA_SPI_AUTO_INC_SHIFT   0 /* SPI_AUTO_INC - [1:0] */

Definition at line 1025 of file registers.h.

#define ARIZONA_SPI_AUTO_INC_WIDTH   2 /* SPI_AUTO_INC - [1:0] */

Definition at line 1026 of file registers.h.

#define ARIZONA_SPI_BUSY   0x0010 /* SPI_BUSY */

Definition at line 1042 of file registers.h.

#define ARIZONA_SPI_BUSY_MASK   0x0010 /* SPI_BUSY */

Definition at line 1043 of file registers.h.

#define ARIZONA_SPI_BUSY_SHIFT   4 /* SPI_BUSY */

Definition at line 1044 of file registers.h.

#define ARIZONA_SPI_BUSY_WIDTH   1 /* SPI_BUSY */

Definition at line 1045 of file registers.h.

#define ARIZONA_SPI_CFG   0x0010 /* SPI_CFG */

Definition at line 1016 of file registers.h.

#define ARIZONA_SPI_CFG_MASK   0x0010 /* SPI_CFG */

Definition at line 1017 of file registers.h.

#define ARIZONA_SPI_CFG_SHIFT   4 /* SPI_CFG */

Definition at line 1018 of file registers.h.

#define ARIZONA_SPI_CFG_WIDTH   1 /* SPI_CFG */

Definition at line 1019 of file registers.h.

#define ARIZONA_SPK1_FMT   0x0001 /* SPK1_FMT */

Definition at line 3076 of file registers.h.

#define ARIZONA_SPK1_FMT_MASK   0x0001 /* SPK1_FMT */

Definition at line 3077 of file registers.h.

#define ARIZONA_SPK1_FMT_SHIFT   0 /* SPK1_FMT */

Definition at line 3078 of file registers.h.

#define ARIZONA_SPK1_FMT_WIDTH   1 /* SPK1_FMT */

Definition at line 3079 of file registers.h.

#define ARIZONA_SPK1_MUTE_ENDIAN   0x0100 /* SPK1_MUTE_ENDIAN */

Definition at line 3065 of file registers.h.

#define ARIZONA_SPK1_MUTE_ENDIAN_MASK   0x0100 /* SPK1_MUTE_ENDIAN */

Definition at line 3066 of file registers.h.

#define ARIZONA_SPK1_MUTE_ENDIAN_SHIFT   8 /* SPK1_MUTE_ENDIAN */

Definition at line 3067 of file registers.h.

#define ARIZONA_SPK1_MUTE_ENDIAN_WIDTH   1 /* SPK1_MUTE_ENDIAN */

Definition at line 3068 of file registers.h.

#define ARIZONA_SPK1_MUTE_SEQ1_MASK   0x00FF /* SPK1_MUTE_SEQ1 - [7:0] */

Definition at line 3069 of file registers.h.

#define ARIZONA_SPK1_MUTE_SEQ1_SHIFT   0 /* SPK1_MUTE_SEQ1 - [7:0] */

Definition at line 3070 of file registers.h.

#define ARIZONA_SPK1_MUTE_SEQ1_WIDTH   8 /* SPK1_MUTE_SEQ1 - [7:0] */

Definition at line 3071 of file registers.h.

#define ARIZONA_SPK1L_MUTE   0x1000 /* SPK1L_MUTE */

Definition at line 3061 of file registers.h.

#define ARIZONA_SPK1L_MUTE_MASK   0x1000 /* SPK1L_MUTE */

Definition at line 3062 of file registers.h.

#define ARIZONA_SPK1L_MUTE_SHIFT   12 /* SPK1L_MUTE */

Definition at line 3063 of file registers.h.

#define ARIZONA_SPK1L_MUTE_WIDTH   1 /* SPK1L_MUTE */

Definition at line 3064 of file registers.h.

#define ARIZONA_SPK1R_MUTE   0x2000 /* SPK1R_MUTE */

Definition at line 3057 of file registers.h.

#define ARIZONA_SPK1R_MUTE_MASK   0x2000 /* SPK1R_MUTE */

Definition at line 3058 of file registers.h.

#define ARIZONA_SPK1R_MUTE_SHIFT   13 /* SPK1R_MUTE */

Definition at line 3059 of file registers.h.

#define ARIZONA_SPK1R_MUTE_WIDTH   1 /* SPK1R_MUTE */

Definition at line 3060 of file registers.h.

#define ARIZONA_SPK2_FMT   0x0001 /* SPK2_FMT */

Definition at line 3103 of file registers.h.

#define ARIZONA_SPK2_FMT_MASK   0x0001 /* SPK2_FMT */

Definition at line 3104 of file registers.h.

#define ARIZONA_SPK2_FMT_SHIFT   0 /* SPK2_FMT */

Definition at line 3105 of file registers.h.

#define ARIZONA_SPK2_FMT_WIDTH   1 /* SPK2_FMT */

Definition at line 3106 of file registers.h.

#define ARIZONA_SPK2_MUTE_ENDIAN   0x0100 /* SPK2_MUTE_ENDIAN */

Definition at line 3092 of file registers.h.

#define ARIZONA_SPK2_MUTE_ENDIAN_MASK   0x0100 /* SPK2_MUTE_ENDIAN */

Definition at line 3093 of file registers.h.

#define ARIZONA_SPK2_MUTE_ENDIAN_SHIFT   8 /* SPK2_MUTE_ENDIAN */

Definition at line 3094 of file registers.h.

#define ARIZONA_SPK2_MUTE_ENDIAN_WIDTH   1 /* SPK2_MUTE_ENDIAN */

Definition at line 3095 of file registers.h.

#define ARIZONA_SPK2_MUTE_SEQ_MASK   0x00FF /* SPK2_MUTE_SEQ - [7:0] */

Definition at line 3096 of file registers.h.

#define ARIZONA_SPK2_MUTE_SEQ_SHIFT   0 /* SPK2_MUTE_SEQ - [7:0] */

Definition at line 3097 of file registers.h.

#define ARIZONA_SPK2_MUTE_SEQ_WIDTH   8 /* SPK2_MUTE_SEQ - [7:0] */

Definition at line 3098 of file registers.h.

#define ARIZONA_SPK2L_MUTE   0x1000 /* SPK2L_MUTE */

Definition at line 3088 of file registers.h.

#define ARIZONA_SPK2L_MUTE_MASK   0x1000 /* SPK2L_MUTE */

Definition at line 3089 of file registers.h.

#define ARIZONA_SPK2L_MUTE_SHIFT   12 /* SPK2L_MUTE */

Definition at line 3090 of file registers.h.

#define ARIZONA_SPK2L_MUTE_WIDTH   1 /* SPK2L_MUTE */

Definition at line 3091 of file registers.h.

#define ARIZONA_SPK2R_MUTE   0x2000 /* SPK2R_MUTE */

Definition at line 3084 of file registers.h.

#define ARIZONA_SPK2R_MUTE_MASK   0x2000 /* SPK2R_MUTE */

Definition at line 3085 of file registers.h.

#define ARIZONA_SPK2R_MUTE_SHIFT   13 /* SPK2R_MUTE */

Definition at line 3086 of file registers.h.

#define ARIZONA_SPK2R_MUTE_WIDTH   1 /* SPK2R_MUTE */

Definition at line 3087 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_EINT1   0x4000 /* SPK_SHUTDOWN_EINT1 */

Definition at line 4260 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_EINT1_MASK   0x4000 /* SPK_SHUTDOWN_EINT1 */

Definition at line 4261 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_EINT1_SHIFT   14 /* SPK_SHUTDOWN_EINT1 */

Definition at line 4262 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_EINT1_WIDTH   1 /* SPK_SHUTDOWN_EINT1 */

Definition at line 4263 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_EINT2   0x4000 /* SPK_SHUTDOWN_EINT2 */

Definition at line 4604 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_EINT2_MASK   0x4000 /* SPK_SHUTDOWN_EINT2 */

Definition at line 4605 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_EINT2_SHIFT   14 /* SPK_SHUTDOWN_EINT2 */

Definition at line 4606 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_EINT2_WIDTH   1 /* SPK_SHUTDOWN_EINT2 */

Definition at line 4607 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_STS   0x4000 /* SPK_SHUTDOWN_STS */

Definition at line 4929 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_STS_MASK   0x4000 /* SPK_SHUTDOWN_STS */

Definition at line 4930 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_STS_SHIFT   14 /* SPK_SHUTDOWN_STS */

Definition at line 4931 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_STS_WIDTH   1 /* SPK_SHUTDOWN_STS */

Definition at line 4932 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_WARN_EINT1   0x8000 /* SPK_SHUTDOWN_WARN_EINT1 */

Definition at line 4256 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_WARN_EINT1_MASK   0x8000 /* SPK_SHUTDOWN_WARN_EINT1 */

Definition at line 4257 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_WARN_EINT1_SHIFT   15 /* SPK_SHUTDOWN_WARN_EINT1 */

Definition at line 4258 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_WARN_EINT1_WIDTH   1 /* SPK_SHUTDOWN_WARN_EINT1 */

Definition at line 4259 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_WARN_EINT2   0x8000 /* SPK_SHUTDOWN_WARN_EINT2 */

Definition at line 4600 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_WARN_EINT2_MASK   0x8000 /* SPK_SHUTDOWN_WARN_EINT2 */

Definition at line 4601 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_WARN_EINT2_SHIFT   15 /* SPK_SHUTDOWN_WARN_EINT2 */

Definition at line 4602 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_WARN_EINT2_WIDTH   1 /* SPK_SHUTDOWN_WARN_EINT2 */

Definition at line 4603 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_WARN_STS   0x8000 /* SPK_SHUTDOWN_WARN_STS */

Definition at line 4925 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_WARN_STS_MASK   0x8000 /* SPK_SHUTDOWN_WARN_STS */

Definition at line 4926 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_WARN_STS_SHIFT   15 /* SPK_SHUTDOWN_WARN_STS */

Definition at line 4927 of file registers.h.

#define ARIZONA_SPK_SHUTDOWN_WARN_STS_WIDTH   1 /* SPK_SHUTDOWN_WARN_STS */

Definition at line 4928 of file registers.h.

#define ARIZONA_SW_RST_DEV_ID1_MASK   0xFFFF /* SW_RST_DEV_ID1 - [15:0] */

Definition at line 1002 of file registers.h.

#define ARIZONA_SW_RST_DEV_ID1_SHIFT   0 /* SW_RST_DEV_ID1 - [15:0] */

Definition at line 1003 of file registers.h.

#define ARIZONA_SW_RST_DEV_ID1_WIDTH   16 /* SW_RST_DEV_ID1 - [15:0] */

Definition at line 1004 of file registers.h.

#define ARIZONA_SYSCLK_ENA   0x0040 /* SYSCLK_ENA */

Definition at line 1427 of file registers.h.

#define ARIZONA_SYSCLK_ENA_LOW_EINT1   0x0100 /* SYSCLK_ENA_LOW_EINT1 */

Definition at line 4348 of file registers.h.

#define ARIZONA_SYSCLK_ENA_LOW_EINT1_MASK   0x0100 /* SYSCLK_ENA_LOW_EINT1 */

Definition at line 4349 of file registers.h.

#define ARIZONA_SYSCLK_ENA_LOW_EINT1_SHIFT   8 /* SYSCLK_ENA_LOW_EINT1 */

Definition at line 4350 of file registers.h.

#define ARIZONA_SYSCLK_ENA_LOW_EINT1_WIDTH   1 /* SYSCLK_ENA_LOW_EINT1 */

Definition at line 4351 of file registers.h.

#define ARIZONA_SYSCLK_ENA_LOW_EINT2   0x0100 /* SYSCLK_ENA_LOW_EINT2 */

Definition at line 4692 of file registers.h.

#define ARIZONA_SYSCLK_ENA_LOW_EINT2_MASK   0x0100 /* SYSCLK_ENA_LOW_EINT2 */

Definition at line 4693 of file registers.h.

#define ARIZONA_SYSCLK_ENA_LOW_EINT2_SHIFT   8 /* SYSCLK_ENA_LOW_EINT2 */

Definition at line 4694 of file registers.h.

#define ARIZONA_SYSCLK_ENA_LOW_EINT2_WIDTH   1 /* SYSCLK_ENA_LOW_EINT2 */

Definition at line 4695 of file registers.h.

#define ARIZONA_SYSCLK_ENA_LOW_STS   0x0100 /* SYSCLK_ENA_LOW_STS */

Definition at line 5017 of file registers.h.

#define ARIZONA_SYSCLK_ENA_LOW_STS_MASK   0x0100 /* SYSCLK_ENA_LOW_STS */

Definition at line 5018 of file registers.h.

#define ARIZONA_SYSCLK_ENA_LOW_STS_SHIFT   8 /* SYSCLK_ENA_LOW_STS */

Definition at line 5019 of file registers.h.

#define ARIZONA_SYSCLK_ENA_LOW_STS_WIDTH   1 /* SYSCLK_ENA_LOW_STS */

Definition at line 5020 of file registers.h.

#define ARIZONA_SYSCLK_ENA_MASK   0x0040 /* SYSCLK_ENA */

Definition at line 1428 of file registers.h.

#define ARIZONA_SYSCLK_ENA_SHIFT   6 /* SYSCLK_ENA */

Definition at line 1429 of file registers.h.

#define ARIZONA_SYSCLK_ENA_WIDTH   1 /* SYSCLK_ENA */

Definition at line 1430 of file registers.h.

#define ARIZONA_SYSCLK_FRAC   0x8000 /* SYSCLK_FRAC */

Definition at line 1420 of file registers.h.

#define ARIZONA_SYSCLK_FRAC_MASK   0x8000 /* SYSCLK_FRAC */

Definition at line 1421 of file registers.h.

#define ARIZONA_SYSCLK_FRAC_SHIFT   15 /* SYSCLK_FRAC */

Definition at line 1422 of file registers.h.

#define ARIZONA_SYSCLK_FRAC_WIDTH   1 /* SYSCLK_FRAC */

Definition at line 1423 of file registers.h.

#define ARIZONA_SYSCLK_FREQ_MASK   0x0700 /* SYSCLK_FREQ - [10:8] */

Definition at line 1424 of file registers.h.

#define ARIZONA_SYSCLK_FREQ_SHIFT   8 /* SYSCLK_FREQ - [10:8] */

Definition at line 1425 of file registers.h.

#define ARIZONA_SYSCLK_FREQ_WIDTH   3 /* SYSCLK_FREQ - [10:8] */

Definition at line 1426 of file registers.h.

#define ARIZONA_SYSCLK_SRC_MASK   0x000F /* SYSCLK_SRC - [3:0] */

Definition at line 1431 of file registers.h.

#define ARIZONA_SYSCLK_SRC_SHIFT   0 /* SYSCLK_SRC - [3:0] */

Definition at line 1432 of file registers.h.

#define ARIZONA_SYSCLK_SRC_WIDTH   4 /* SYSCLK_SRC - [3:0] */

Definition at line 1433 of file registers.h.

#define ARIZONA_SYSTEM_CLOCK_1   0x101

Definition at line 62 of file registers.h.

#define ARIZONA_TONE1_ENA   0x0001 /* TONE1_ENA */

Definition at line 1118 of file registers.h.

#define ARIZONA_TONE1_ENA_MASK   0x0001 /* TONE1_ENA */

Definition at line 1119 of file registers.h.

#define ARIZONA_TONE1_ENA_SHIFT   0 /* TONE1_ENA */

Definition at line 1120 of file registers.h.

#define ARIZONA_TONE1_ENA_WIDTH   1 /* TONE1_ENA */

Definition at line 1121 of file registers.h.

#define ARIZONA_TONE1_LVL_0_MASK   0xFFFF /* TONE1_LVL - [15:0] */

Definition at line 1126 of file registers.h.

#define ARIZONA_TONE1_LVL_0_SHIFT   0 /* TONE1_LVL - [15:0] */

Definition at line 1127 of file registers.h.

#define ARIZONA_TONE1_LVL_0_WIDTH   16 /* TONE1_LVL - [15:0] */

Definition at line 1128 of file registers.h.

#define ARIZONA_TONE1_LVL_MASK   0x00FF /* TONE1_LVL - [7:0] */

Definition at line 1133 of file registers.h.

#define ARIZONA_TONE1_LVL_SHIFT   0 /* TONE1_LVL - [7:0] */

Definition at line 1134 of file registers.h.

#define ARIZONA_TONE1_LVL_WIDTH   8 /* TONE1_LVL - [7:0] */

Definition at line 1135 of file registers.h.

#define ARIZONA_TONE1_OVD   0x0010 /* TONE1_OVD */

Definition at line 1110 of file registers.h.

#define ARIZONA_TONE1_OVD_MASK   0x0010 /* TONE1_OVD */

Definition at line 1111 of file registers.h.

#define ARIZONA_TONE1_OVD_SHIFT   4 /* TONE1_OVD */

Definition at line 1112 of file registers.h.

#define ARIZONA_TONE1_OVD_WIDTH   1 /* TONE1_OVD */

Definition at line 1113 of file registers.h.

#define ARIZONA_TONE2_ENA   0x0002 /* TONE2_ENA */

Definition at line 1114 of file registers.h.

#define ARIZONA_TONE2_ENA_MASK   0x0002 /* TONE2_ENA */

Definition at line 1115 of file registers.h.

#define ARIZONA_TONE2_ENA_SHIFT   1 /* TONE2_ENA */

Definition at line 1116 of file registers.h.

#define ARIZONA_TONE2_ENA_WIDTH   1 /* TONE2_ENA */

Definition at line 1117 of file registers.h.

#define ARIZONA_TONE2_LVL_0_MASK   0xFFFF /* TONE2_LVL - [15:0] */

Definition at line 1140 of file registers.h.

#define ARIZONA_TONE2_LVL_0_SHIFT   0 /* TONE2_LVL - [15:0] */

Definition at line 1141 of file registers.h.

#define ARIZONA_TONE2_LVL_0_WIDTH   16 /* TONE2_LVL - [15:0] */

Definition at line 1142 of file registers.h.

#define ARIZONA_TONE2_LVL_MASK   0x00FF /* TONE2_LVL - [7:0] */

Definition at line 1147 of file registers.h.

#define ARIZONA_TONE2_LVL_SHIFT   0 /* TONE2_LVL - [7:0] */

Definition at line 1148 of file registers.h.

#define ARIZONA_TONE2_LVL_WIDTH   8 /* TONE2_LVL - [7:0] */

Definition at line 1149 of file registers.h.

#define ARIZONA_TONE2_OVD   0x0020 /* TONE2_OVD */

Definition at line 1106 of file registers.h.

#define ARIZONA_TONE2_OVD_MASK   0x0020 /* TONE2_OVD */

Definition at line 1107 of file registers.h.

#define ARIZONA_TONE2_OVD_SHIFT   5 /* TONE2_OVD */

Definition at line 1108 of file registers.h.

#define ARIZONA_TONE2_OVD_WIDTH   1 /* TONE2_OVD */

Definition at line 1109 of file registers.h.

#define ARIZONA_TONE_GENERATOR_1   0x20

Definition at line 31 of file registers.h.

#define ARIZONA_TONE_GENERATOR_2   0x21

Definition at line 32 of file registers.h.

#define ARIZONA_TONE_GENERATOR_3   0x22

Definition at line 33 of file registers.h.

#define ARIZONA_TONE_GENERATOR_4   0x23

Definition at line 34 of file registers.h.

#define ARIZONA_TONE_GENERATOR_5   0x24

Definition at line 35 of file registers.h.

#define ARIZONA_TONE_OFFSET_MASK   0x0300 /* TONE_OFFSET - [9:8] */

Definition at line 1103 of file registers.h.

#define ARIZONA_TONE_OFFSET_SHIFT   8 /* TONE_OFFSET - [9:8] */

Definition at line 1104 of file registers.h.

#define ARIZONA_TONE_OFFSET_WIDTH   2 /* TONE_OFFSET - [9:8] */

Definition at line 1105 of file registers.h.

#define ARIZONA_TONE_RATE_MASK   0x7800 /* TONE_RATE - [14:11] */

Definition at line 1100 of file registers.h.

#define ARIZONA_TONE_RATE_SHIFT   11 /* TONE_RATE - [14:11] */

Definition at line 1101 of file registers.h.

#define ARIZONA_TONE_RATE_WIDTH   4 /* TONE_RATE - [14:11] */

Definition at line 1102 of file registers.h.

#define ARIZONA_TRIG_ON_STARTUP   0x0010 /* TRIG_ON_STARTUP */

Definition at line 1536 of file registers.h.

#define ARIZONA_TRIG_ON_STARTUP_MASK   0x0010 /* TRIG_ON_STARTUP */

Definition at line 1537 of file registers.h.

#define ARIZONA_TRIG_ON_STARTUP_SHIFT   4 /* TRIG_ON_STARTUP */

Definition at line 1538 of file registers.h.

#define ARIZONA_TRIG_ON_STARTUP_WIDTH   1 /* TRIG_ON_STARTUP */

Definition at line 1539 of file registers.h.

#define ARIZONA_UNDERCLOCKED_EINT1   0x0040 /* UNDERCLOCKED_EINT1 */

Definition at line 4292 of file registers.h.

#define ARIZONA_UNDERCLOCKED_EINT1_MASK   0x0040 /* UNDERCLOCKED_EINT1 */

Definition at line 4293 of file registers.h.

#define ARIZONA_UNDERCLOCKED_EINT1_SHIFT   6 /* UNDERCLOCKED_EINT1 */

Definition at line 4294 of file registers.h.

#define ARIZONA_UNDERCLOCKED_EINT1_WIDTH   1 /* UNDERCLOCKED_EINT1 */

Definition at line 4295 of file registers.h.

#define ARIZONA_UNDERCLOCKED_EINT2   0x0040 /* UNDERCLOCKED_EINT2 */

Definition at line 4636 of file registers.h.

#define ARIZONA_UNDERCLOCKED_EINT2_MASK   0x0040 /* UNDERCLOCKED_EINT2 */

Definition at line 4637 of file registers.h.

#define ARIZONA_UNDERCLOCKED_EINT2_SHIFT   6 /* UNDERCLOCKED_EINT2 */

Definition at line 4638 of file registers.h.

#define ARIZONA_UNDERCLOCKED_EINT2_WIDTH   1 /* UNDERCLOCKED_EINT2 */

Definition at line 4639 of file registers.h.

#define ARIZONA_UNDERCLOCKED_STS   0x0040 /* UNDERCLOCKED_STS */

Definition at line 4961 of file registers.h.

#define ARIZONA_UNDERCLOCKED_STS_MASK   0x0040 /* UNDERCLOCKED_STS */

Definition at line 4962 of file registers.h.

#define ARIZONA_UNDERCLOCKED_STS_SHIFT   6 /* UNDERCLOCKED_STS */

Definition at line 4963 of file registers.h.

#define ARIZONA_UNDERCLOCKED_STS_WIDTH   1 /* UNDERCLOCKED_STS */

Definition at line 4964 of file registers.h.

#define ARIZONA_WAKE_CONTROL   0x40

Definition at line 39 of file registers.h.

#define ARIZONA_WKUP_GP5_FALL   0x0020 /* WKUP_GP5_FALL */

Definition at line 1194 of file registers.h.

#define ARIZONA_WKUP_GP5_FALL_MASK   0x0020 /* WKUP_GP5_FALL */

Definition at line 1195 of file registers.h.

#define ARIZONA_WKUP_GP5_FALL_SHIFT   5 /* WKUP_GP5_FALL */

Definition at line 1196 of file registers.h.

#define ARIZONA_WKUP_GP5_FALL_WIDTH   1 /* WKUP_GP5_FALL */

Definition at line 1197 of file registers.h.

#define ARIZONA_WKUP_GP5_RISE   0x0010 /* WKUP_GP5_RISE */

Definition at line 1198 of file registers.h.

#define ARIZONA_WKUP_GP5_RISE_MASK   0x0010 /* WKUP_GP5_RISE */

Definition at line 1199 of file registers.h.

#define ARIZONA_WKUP_GP5_RISE_SHIFT   4 /* WKUP_GP5_RISE */

Definition at line 1200 of file registers.h.

#define ARIZONA_WKUP_GP5_RISE_WIDTH   1 /* WKUP_GP5_RISE */

Definition at line 1201 of file registers.h.

#define ARIZONA_WKUP_JD1_FALL   0x0008 /* WKUP_JD1_FALL */

Definition at line 1202 of file registers.h.

#define ARIZONA_WKUP_JD1_FALL_MASK   0x0008 /* WKUP_JD1_FALL */

Definition at line 1203 of file registers.h.

#define ARIZONA_WKUP_JD1_FALL_SHIFT   3 /* WKUP_JD1_FALL */

Definition at line 1204 of file registers.h.

#define ARIZONA_WKUP_JD1_FALL_WIDTH   1 /* WKUP_JD1_FALL */

Definition at line 1205 of file registers.h.

#define ARIZONA_WKUP_JD1_RISE   0x0004 /* WKUP_JD1_RISE */

Definition at line 1206 of file registers.h.

#define ARIZONA_WKUP_JD1_RISE_MASK   0x0004 /* WKUP_JD1_RISE */

Definition at line 1207 of file registers.h.

#define ARIZONA_WKUP_JD1_RISE_SHIFT   2 /* WKUP_JD1_RISE */

Definition at line 1208 of file registers.h.

#define ARIZONA_WKUP_JD1_RISE_WIDTH   1 /* WKUP_JD1_RISE */

Definition at line 1209 of file registers.h.

#define ARIZONA_WKUP_JD2_FALL   0x0002 /* WKUP_JD2_FALL */

Definition at line 1210 of file registers.h.

#define ARIZONA_WKUP_JD2_FALL_MASK   0x0002 /* WKUP_JD2_FALL */

Definition at line 1211 of file registers.h.

#define ARIZONA_WKUP_JD2_FALL_SHIFT   1 /* WKUP_JD2_FALL */

Definition at line 1212 of file registers.h.

#define ARIZONA_WKUP_JD2_FALL_WIDTH   1 /* WKUP_JD2_FALL */

Definition at line 1213 of file registers.h.

#define ARIZONA_WKUP_JD2_RISE   0x0001 /* WKUP_JD2_RISE */

Definition at line 1214 of file registers.h.

#define ARIZONA_WKUP_JD2_RISE_MASK   0x0001 /* WKUP_JD2_RISE */

Definition at line 1215 of file registers.h.

#define ARIZONA_WKUP_JD2_RISE_SHIFT   0 /* WKUP_JD2_RISE */

Definition at line 1216 of file registers.h.

#define ARIZONA_WKUP_JD2_RISE_WIDTH   1 /* WKUP_JD2_RISE */

Definition at line 1217 of file registers.h.

#define ARIZONA_WRITE_SEQUENCER_CTRL_0   0x16

Definition at line 27 of file registers.h.

#define ARIZONA_WRITE_SEQUENCER_CTRL_1   0x17

Definition at line 28 of file registers.h.

#define ARIZONA_WRITE_SEQUENCER_CTRL_2   0x18

Definition at line 29 of file registers.h.

#define ARIZONA_WRITE_SEQUENCER_PROM   0x1A

Definition at line 30 of file registers.h.

#define ARIZONA_WSEQ_ABORT   0x0800 /* WSEQ_ABORT */

Definition at line 1050 of file registers.h.

#define ARIZONA_WSEQ_ABORT_MASK   0x0800 /* WSEQ_ABORT */

Definition at line 1051 of file registers.h.

#define ARIZONA_WSEQ_ABORT_SHIFT   11 /* WSEQ_ABORT */

Definition at line 1052 of file registers.h.

#define ARIZONA_WSEQ_ABORT_WIDTH   1 /* WSEQ_ABORT */

Definition at line 1053 of file registers.h.

#define ARIZONA_WSEQ_BUSY   0x0200 /* WSEQ_BUSY */

Definition at line 1069 of file registers.h.

#define ARIZONA_WSEQ_BUSY_MASK   0x0200 /* WSEQ_BUSY */

Definition at line 1070 of file registers.h.

#define ARIZONA_WSEQ_BUSY_SHIFT   9 /* WSEQ_BUSY */

Definition at line 1071 of file registers.h.

#define ARIZONA_WSEQ_BUSY_WIDTH   1 /* WSEQ_BUSY */

Definition at line 1072 of file registers.h.

#define ARIZONA_WSEQ_CURRENT_INDEX_MASK   0x01FF /* WSEQ_CURRENT_INDEX - [8:0] */

Definition at line 1073 of file registers.h.

#define ARIZONA_WSEQ_CURRENT_INDEX_SHIFT   0 /* WSEQ_CURRENT_INDEX - [8:0] */

Definition at line 1074 of file registers.h.

#define ARIZONA_WSEQ_CURRENT_INDEX_WIDTH   9 /* WSEQ_CURRENT_INDEX - [8:0] */

Definition at line 1075 of file registers.h.

#define ARIZONA_WSEQ_DONE_EINT1   0x0800 /* WSEQ_DONE_EINT1 */

Definition at line 4272 of file registers.h.

#define ARIZONA_WSEQ_DONE_EINT1_MASK   0x0800 /* WSEQ_DONE_EINT1 */

Definition at line 4273 of file registers.h.

#define ARIZONA_WSEQ_DONE_EINT1_SHIFT   11 /* WSEQ_DONE_EINT1 */

Definition at line 4274 of file registers.h.

#define ARIZONA_WSEQ_DONE_EINT1_WIDTH   1 /* WSEQ_DONE_EINT1 */

Definition at line 4275 of file registers.h.

#define ARIZONA_WSEQ_DONE_EINT2   0x0800 /* WSEQ_DONE_EINT2 */

Definition at line 4616 of file registers.h.

#define ARIZONA_WSEQ_DONE_EINT2_MASK   0x0800 /* WSEQ_DONE_EINT2 */

Definition at line 4617 of file registers.h.

#define ARIZONA_WSEQ_DONE_EINT2_SHIFT   11 /* WSEQ_DONE_EINT2 */

Definition at line 4618 of file registers.h.

#define ARIZONA_WSEQ_DONE_EINT2_WIDTH   1 /* WSEQ_DONE_EINT2 */

Definition at line 4619 of file registers.h.

#define ARIZONA_WSEQ_DONE_STS   0x0800 /* WSEQ_DONE_STS */

Definition at line 4941 of file registers.h.

#define ARIZONA_WSEQ_DONE_STS_MASK   0x0800 /* WSEQ_DONE_STS */

Definition at line 4942 of file registers.h.

#define ARIZONA_WSEQ_DONE_STS_SHIFT   11 /* WSEQ_DONE_STS */

Definition at line 4943 of file registers.h.

#define ARIZONA_WSEQ_DONE_STS_WIDTH   1 /* WSEQ_DONE_STS */

Definition at line 4944 of file registers.h.

#define ARIZONA_WSEQ_ENA   0x0200 /* WSEQ_ENA */

Definition at line 1058 of file registers.h.

#define ARIZONA_WSEQ_ENA_GP5_FALL   0x0020 /* WSEQ_ENA_GP5_FALL */

Definition at line 1222 of file registers.h.

#define ARIZONA_WSEQ_ENA_GP5_FALL_MASK   0x0020 /* WSEQ_ENA_GP5_FALL */

Definition at line 1223 of file registers.h.

#define ARIZONA_WSEQ_ENA_GP5_FALL_SHIFT   5 /* WSEQ_ENA_GP5_FALL */

Definition at line 1224 of file registers.h.

#define ARIZONA_WSEQ_ENA_GP5_FALL_WIDTH   1 /* WSEQ_ENA_GP5_FALL */

Definition at line 1225 of file registers.h.

#define ARIZONA_WSEQ_ENA_GP5_RISE   0x0010 /* WSEQ_ENA_GP5_RISE */

Definition at line 1226 of file registers.h.

#define ARIZONA_WSEQ_ENA_GP5_RISE_MASK   0x0010 /* WSEQ_ENA_GP5_RISE */

Definition at line 1227 of file registers.h.

#define ARIZONA_WSEQ_ENA_GP5_RISE_SHIFT   4 /* WSEQ_ENA_GP5_RISE */

Definition at line 1228 of file registers.h.

#define ARIZONA_WSEQ_ENA_GP5_RISE_WIDTH   1 /* WSEQ_ENA_GP5_RISE */

Definition at line 1229 of file registers.h.

#define ARIZONA_WSEQ_ENA_JD1_FALL   0x0008 /* WSEQ_ENA_JD1_FALL */

Definition at line 1230 of file registers.h.

#define ARIZONA_WSEQ_ENA_JD1_FALL_MASK   0x0008 /* WSEQ_ENA_JD1_FALL */

Definition at line 1231 of file registers.h.

#define ARIZONA_WSEQ_ENA_JD1_FALL_SHIFT   3 /* WSEQ_ENA_JD1_FALL */

Definition at line 1232 of file registers.h.

#define ARIZONA_WSEQ_ENA_JD1_FALL_WIDTH   1 /* WSEQ_ENA_JD1_FALL */

Definition at line 1233 of file registers.h.

#define ARIZONA_WSEQ_ENA_JD1_RISE   0x0004 /* WSEQ_ENA_JD1_RISE */

Definition at line 1234 of file registers.h.

#define ARIZONA_WSEQ_ENA_JD1_RISE_MASK   0x0004 /* WSEQ_ENA_JD1_RISE */

Definition at line 1235 of file registers.h.

#define ARIZONA_WSEQ_ENA_JD1_RISE_SHIFT   2 /* WSEQ_ENA_JD1_RISE */

Definition at line 1236 of file registers.h.

#define ARIZONA_WSEQ_ENA_JD1_RISE_WIDTH   1 /* WSEQ_ENA_JD1_RISE */

Definition at line 1237 of file registers.h.

#define ARIZONA_WSEQ_ENA_JD2_FALL   0x0002 /* WSEQ_ENA_JD2_FALL */

Definition at line 1238 of file registers.h.

#define ARIZONA_WSEQ_ENA_JD2_FALL_MASK   0x0002 /* WSEQ_ENA_JD2_FALL */

Definition at line 1239 of file registers.h.

#define ARIZONA_WSEQ_ENA_JD2_FALL_SHIFT   1 /* WSEQ_ENA_JD2_FALL */

Definition at line 1240 of file registers.h.

#define ARIZONA_WSEQ_ENA_JD2_FALL_WIDTH   1 /* WSEQ_ENA_JD2_FALL */

Definition at line 1241 of file registers.h.

#define ARIZONA_WSEQ_ENA_JD2_RISE   0x0001 /* WSEQ_ENA_JD2_RISE */

Definition at line 1242 of file registers.h.

#define ARIZONA_WSEQ_ENA_JD2_RISE_MASK   0x0001 /* WSEQ_ENA_JD2_RISE */

Definition at line 1243 of file registers.h.

#define ARIZONA_WSEQ_ENA_JD2_RISE_SHIFT   0 /* WSEQ_ENA_JD2_RISE */

Definition at line 1244 of file registers.h.

#define ARIZONA_WSEQ_ENA_JD2_RISE_WIDTH   1 /* WSEQ_ENA_JD2_RISE */

Definition at line 1245 of file registers.h.

#define ARIZONA_WSEQ_ENA_MASK   0x0200 /* WSEQ_ENA */

Definition at line 1059 of file registers.h.

#define ARIZONA_WSEQ_ENA_SHIFT   9 /* WSEQ_ENA */

Definition at line 1060 of file registers.h.

#define ARIZONA_WSEQ_ENA_WIDTH   1 /* WSEQ_ENA */

Definition at line 1061 of file registers.h.

#define ARIZONA_WSEQ_GP5_FALL_SEQ_ADDR_MASK   0x01FF /* WSEQ_GP5_FALL_SEQ_ADDR - [8:0] */

Definition at line 1285 of file registers.h.

#define ARIZONA_WSEQ_GP5_FALL_SEQ_ADDR_SHIFT   0 /* WSEQ_GP5_FALL_SEQ_ADDR - [8:0] */

Definition at line 1286 of file registers.h.

#define ARIZONA_WSEQ_GP5_FALL_SEQ_ADDR_WIDTH   9 /* WSEQ_GP5_FALL_SEQ_ADDR - [8:0] */

Definition at line 1287 of file registers.h.

#define ARIZONA_WSEQ_GP5_RISE_SEQ_ADDR_MASK   0x01FF /* WSEQ_GP5_RISE_SEQ_ADDR - [8:0] */

Definition at line 1278 of file registers.h.

#define ARIZONA_WSEQ_GP5_RISE_SEQ_ADDR_SHIFT   0 /* WSEQ_GP5_RISE_SEQ_ADDR - [8:0] */

Definition at line 1279 of file registers.h.

#define ARIZONA_WSEQ_GP5_RISE_SEQ_ADDR_WIDTH   9 /* WSEQ_GP5_RISE_SEQ_ADDR - [8:0] */

Definition at line 1280 of file registers.h.

#define ARIZONA_WSEQ_JD1_FALL_SEQ_ADDR_MASK   0x01FF /* WSEQ_JD1_FALL_SEQ_ADDR - [8:0] */

Definition at line 1299 of file registers.h.

#define ARIZONA_WSEQ_JD1_FALL_SEQ_ADDR_SHIFT   0 /* WSEQ_JD1_FALL_SEQ_ADDR - [8:0] */

Definition at line 1300 of file registers.h.

#define ARIZONA_WSEQ_JD1_FALL_SEQ_ADDR_WIDTH   9 /* WSEQ_JD1_FALL_SEQ_ADDR - [8:0] */

Definition at line 1301 of file registers.h.

#define ARIZONA_WSEQ_JD1_RISE_SEQ_ADDR_MASK   0x01FF /* WSEQ_JD1_RISE_SEQ_ADDR - [8:0] */

Definition at line 1292 of file registers.h.

#define ARIZONA_WSEQ_JD1_RISE_SEQ_ADDR_SHIFT   0 /* WSEQ_JD1_RISE_SEQ_ADDR - [8:0] */

Definition at line 1293 of file registers.h.

#define ARIZONA_WSEQ_JD1_RISE_SEQ_ADDR_WIDTH   9 /* WSEQ_JD1_RISE_SEQ_ADDR - [8:0] */

Definition at line 1294 of file registers.h.

#define ARIZONA_WSEQ_JD2_FALL_SEQ_ADDR_MASK   0x01FF /* WSEQ_JD2_FALL_SEQ_ADDR - [8:0] */

Definition at line 1313 of file registers.h.

#define ARIZONA_WSEQ_JD2_FALL_SEQ_ADDR_SHIFT   0 /* WSEQ_JD2_FALL_SEQ_ADDR - [8:0] */

Definition at line 1314 of file registers.h.

#define ARIZONA_WSEQ_JD2_FALL_SEQ_ADDR_WIDTH   9 /* WSEQ_JD2_FALL_SEQ_ADDR - [8:0] */

Definition at line 1315 of file registers.h.

#define ARIZONA_WSEQ_JD2_RISE_SEQ_ADDR_MASK   0x01FF /* WSEQ_JD2_RISE_SEQ_ADDR - [8:0] */

Definition at line 1306 of file registers.h.

#define ARIZONA_WSEQ_JD2_RISE_SEQ_ADDR_SHIFT   0 /* WSEQ_JD2_RISE_SEQ_ADDR - [8:0] */

Definition at line 1307 of file registers.h.

#define ARIZONA_WSEQ_JD2_RISE_SEQ_ADDR_WIDTH   9 /* WSEQ_JD2_RISE_SEQ_ADDR - [8:0] */

Definition at line 1308 of file registers.h.

#define ARIZONA_WSEQ_LOAD_MEM   0x0001 /* WSEQ_LOAD_MEM */

Definition at line 1084 of file registers.h.

#define ARIZONA_WSEQ_LOAD_MEM_MASK   0x0001 /* WSEQ_LOAD_MEM */

Definition at line 1085 of file registers.h.

#define ARIZONA_WSEQ_LOAD_MEM_SHIFT   0 /* WSEQ_LOAD_MEM */

Definition at line 1086 of file registers.h.

#define ARIZONA_WSEQ_LOAD_MEM_WIDTH   1 /* WSEQ_LOAD_MEM */

Definition at line 1087 of file registers.h.

#define ARIZONA_WSEQ_OTP_WRITE   0x0001 /* WSEQ_OTP_WRITE */

Definition at line 1092 of file registers.h.

#define ARIZONA_WSEQ_OTP_WRITE_MASK   0x0001 /* WSEQ_OTP_WRITE */

Definition at line 1093 of file registers.h.

#define ARIZONA_WSEQ_OTP_WRITE_SHIFT   0 /* WSEQ_OTP_WRITE */

Definition at line 1094 of file registers.h.

#define ARIZONA_WSEQ_OTP_WRITE_WIDTH   1 /* WSEQ_OTP_WRITE */

Definition at line 1095 of file registers.h.

#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR_MASK   0x01FF /* WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR - [8:0] */

Definition at line 1250 of file registers.h.

#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR_SHIFT   0 /* WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR - [8:0] */

Definition at line 1251 of file registers.h.

#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR_WIDTH   9 /* WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR - [8:0] */

Definition at line 1252 of file registers.h.

#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR_MASK   0x01FF /* WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR - [8:0] */

Definition at line 1257 of file registers.h.

#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR_SHIFT   0 /* WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR - [8:0] */

Definition at line 1258 of file registers.h.

#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR_WIDTH   9 /* WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR - [8:0] */

Definition at line 1259 of file registers.h.

#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR_MASK   0x01FF /* WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR - [8:0] */

Definition at line 1264 of file registers.h.

#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR_SHIFT   0 /* WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR - [8:0] */

Definition at line 1265 of file registers.h.

#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR_WIDTH   9 /* WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR - [8:0] */

Definition at line 1266 of file registers.h.

#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR_MASK   0x01FF /* WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR - [8:0] */

Definition at line 1271 of file registers.h.

#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR_SHIFT   0 /* WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR - [8:0] */

Definition at line 1272 of file registers.h.

#define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR_WIDTH   9 /* WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR - [8:0] */

Definition at line 1273 of file registers.h.

#define ARIZONA_WSEQ_START   0x0400 /* WSEQ_START */

Definition at line 1054 of file registers.h.

#define ARIZONA_WSEQ_START_INDEX_MASK   0x01FF /* WSEQ_START_INDEX - [8:0] */

Definition at line 1062 of file registers.h.

#define ARIZONA_WSEQ_START_INDEX_SHIFT   0 /* WSEQ_START_INDEX - [8:0] */

Definition at line 1063 of file registers.h.

#define ARIZONA_WSEQ_START_INDEX_WIDTH   9 /* WSEQ_START_INDEX - [8:0] */

Definition at line 1064 of file registers.h.

#define ARIZONA_WSEQ_START_MASK   0x0400 /* WSEQ_START */

Definition at line 1055 of file registers.h.

#define ARIZONA_WSEQ_START_SHIFT   10 /* WSEQ_START */

Definition at line 1056 of file registers.h.

#define ARIZONA_WSEQ_START_WIDTH   1 /* WSEQ_START */

Definition at line 1057 of file registers.h.

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