Linux Kernel
3.7.1
Main Page
Related Pages
Modules
Namespaces
Data Structures
Files
File List
Globals
All
Data Structures
Namespaces
Files
Functions
Variables
Typedefs
Enumerations
Enumerator
Macros
Groups
Pages
include
linux
mfd
wm8350
core.h
Go to the documentation of this file.
1
/*
2
* core.h -- Core Driver for Wolfson WM8350 PMIC
3
*
4
* Copyright 2007 Wolfson Microelectronics PLC
5
*
6
* This program is free software; you can redistribute it and/or modify it
7
* under the terms of the GNU General Public License as published by the
8
* Free Software Foundation; either version 2 of the License, or (at your
9
* option) any later version.
10
*
11
*/
12
13
#ifndef __LINUX_MFD_WM8350_CORE_H_
14
#define __LINUX_MFD_WM8350_CORE_H_
15
16
#include <linux/kernel.h>
17
#include <
linux/mutex.h
>
18
#include <
linux/interrupt.h
>
19
#include <
linux/completion.h
>
20
#include <
linux/regmap.h
>
21
22
#include <
linux/mfd/wm8350/audio.h
>
23
#include <
linux/mfd/wm8350/gpio.h
>
24
#include <
linux/mfd/wm8350/pmic.h
>
25
#include <
linux/mfd/wm8350/rtc.h
>
26
#include <
linux/mfd/wm8350/supply.h
>
27
#include <
linux/mfd/wm8350/wdt.h
>
28
29
/*
30
* Register values.
31
*/
32
#define WM8350_RESET_ID 0x00
33
#define WM8350_ID 0x01
34
#define WM8350_REVISION 0x02
35
#define WM8350_SYSTEM_CONTROL_1 0x03
36
#define WM8350_SYSTEM_CONTROL_2 0x04
37
#define WM8350_SYSTEM_HIBERNATE 0x05
38
#define WM8350_INTERFACE_CONTROL 0x06
39
#define WM8350_POWER_MGMT_1 0x08
40
#define WM8350_POWER_MGMT_2 0x09
41
#define WM8350_POWER_MGMT_3 0x0A
42
#define WM8350_POWER_MGMT_4 0x0B
43
#define WM8350_POWER_MGMT_5 0x0C
44
#define WM8350_POWER_MGMT_6 0x0D
45
#define WM8350_POWER_MGMT_7 0x0E
46
47
#define WM8350_SYSTEM_INTERRUPTS 0x18
48
#define WM8350_INT_STATUS_1 0x19
49
#define WM8350_INT_STATUS_2 0x1A
50
#define WM8350_POWER_UP_INT_STATUS 0x1B
51
#define WM8350_UNDER_VOLTAGE_INT_STATUS 0x1C
52
#define WM8350_OVER_CURRENT_INT_STATUS 0x1D
53
#define WM8350_GPIO_INT_STATUS 0x1E
54
#define WM8350_COMPARATOR_INT_STATUS 0x1F
55
#define WM8350_SYSTEM_INTERRUPTS_MASK 0x20
56
#define WM8350_INT_STATUS_1_MASK 0x21
57
#define WM8350_INT_STATUS_2_MASK 0x22
58
#define WM8350_POWER_UP_INT_STATUS_MASK 0x23
59
#define WM8350_UNDER_VOLTAGE_INT_STATUS_MASK 0x24
60
#define WM8350_OVER_CURRENT_INT_STATUS_MASK 0x25
61
#define WM8350_GPIO_INT_STATUS_MASK 0x26
62
#define WM8350_COMPARATOR_INT_STATUS_MASK 0x27
63
#define WM8350_CHARGER_OVERRIDES 0xE2
64
#define WM8350_MISC_OVERRIDES 0xE3
65
#define WM8350_COMPARATOR_OVERRIDES 0xE7
66
#define WM8350_STATE_MACHINE_STATUS 0xE9
67
68
#define WM8350_MAX_REGISTER 0xFF
69
70
#define WM8350_UNLOCK_KEY 0x0013
71
#define WM8350_LOCK_KEY 0x0000
72
73
/*
74
* Field Definitions.
75
*/
76
77
/*
78
* R0 (0x00) - Reset/ID
79
*/
80
#define WM8350_SW_RESET_CHIP_ID_MASK 0xFFFF
81
82
/*
83
* R1 (0x01) - ID
84
*/
85
#define WM8350_CHIP_REV_MASK 0x7000
86
#define WM8350_CONF_STS_MASK 0x0C00
87
#define WM8350_CUST_ID_MASK 0x00FF
88
89
/*
90
* R2 (0x02) - Revision
91
*/
92
#define WM8350_MASK_REV_MASK 0x00FF
93
94
/*
95
* R3 (0x03) - System Control 1
96
*/
97
#define WM8350_CHIP_ON 0x8000
98
#define WM8350_POWERCYCLE 0x2000
99
#define WM8350_VCC_FAULT_OV 0x1000
100
#define WM8350_REG_RSTB_TIME_MASK 0x0C00
101
#define WM8350_BG_SLEEP 0x0200
102
#define WM8350_MEM_VALID 0x0020
103
#define WM8350_CHIP_SET_UP 0x0010
104
#define WM8350_ON_DEB_T 0x0008
105
#define WM8350_ON_POL 0x0002
106
#define WM8350_IRQ_POL 0x0001
107
108
/*
109
* R4 (0x04) - System Control 2
110
*/
111
#define WM8350_USB_SUSPEND_8MA 0x8000
112
#define WM8350_USB_SUSPEND 0x4000
113
#define WM8350_USB_MSTR 0x2000
114
#define WM8350_USB_MSTR_SRC 0x1000
115
#define WM8350_USB_500MA 0x0800
116
#define WM8350_USB_NOLIM 0x0400
117
118
/*
119
* R5 (0x05) - System Hibernate
120
*/
121
#define WM8350_HIBERNATE 0x8000
122
#define WM8350_WDOG_HIB_MODE 0x0080
123
#define WM8350_REG_HIB_STARTUP_SEQ 0x0040
124
#define WM8350_REG_RESET_HIB_MODE 0x0020
125
#define WM8350_RST_HIB_MODE 0x0010
126
#define WM8350_IRQ_HIB_MODE 0x0008
127
#define WM8350_MEMRST_HIB_MODE 0x0004
128
#define WM8350_PCCOMP_HIB_MODE 0x0002
129
#define WM8350_TEMPMON_HIB_MODE 0x0001
130
131
/*
132
* R6 (0x06) - Interface Control
133
*/
134
#define WM8350_USE_DEV_PINS 0x8000
135
#define WM8350_USE_DEV_PINS_MASK 0x8000
136
#define WM8350_USE_DEV_PINS_SHIFT 15
137
#define WM8350_DEV_ADDR_MASK 0x6000
138
#define WM8350_DEV_ADDR_SHIFT 13
139
#define WM8350_CONFIG_DONE 0x1000
140
#define WM8350_CONFIG_DONE_MASK 0x1000
141
#define WM8350_CONFIG_DONE_SHIFT 12
142
#define WM8350_RECONFIG_AT_ON 0x0800
143
#define WM8350_RECONFIG_AT_ON_MASK 0x0800
144
#define WM8350_RECONFIG_AT_ON_SHIFT 11
145
#define WM8350_AUTOINC 0x0200
146
#define WM8350_AUTOINC_MASK 0x0200
147
#define WM8350_AUTOINC_SHIFT 9
148
#define WM8350_ARA 0x0100
149
#define WM8350_ARA_MASK 0x0100
150
#define WM8350_ARA_SHIFT 8
151
#define WM8350_SPI_CFG 0x0008
152
#define WM8350_SPI_CFG_MASK 0x0008
153
#define WM8350_SPI_CFG_SHIFT 3
154
#define WM8350_SPI_4WIRE 0x0004
155
#define WM8350_SPI_4WIRE_MASK 0x0004
156
#define WM8350_SPI_4WIRE_SHIFT 2
157
#define WM8350_SPI_3WIRE 0x0002
158
#define WM8350_SPI_3WIRE_MASK 0x0002
159
#define WM8350_SPI_3WIRE_SHIFT 1
160
161
/* Bit values for R06 (0x06) */
162
#define WM8350_USE_DEV_PINS_PRIMARY 0
163
#define WM8350_USE_DEV_PINS_DEV 1
164
165
#define WM8350_DEV_ADDR_34 0
166
#define WM8350_DEV_ADDR_36 1
167
#define WM8350_DEV_ADDR_3C 2
168
#define WM8350_DEV_ADDR_3E 3
169
170
#define WM8350_CONFIG_DONE_OFF 0
171
#define WM8350_CONFIG_DONE_DONE 1
172
173
#define WM8350_RECONFIG_AT_ON_OFF 0
174
#define WM8350_RECONFIG_AT_ON_ON 1
175
176
#define WM8350_AUTOINC_OFF 0
177
#define WM8350_AUTOINC_ON 1
178
179
#define WM8350_ARA_OFF 0
180
#define WM8350_ARA_ON 1
181
182
#define WM8350_SPI_CFG_CMOS 0
183
#define WM8350_SPI_CFG_OD 1
184
185
#define WM8350_SPI_4WIRE_3WIRE 0
186
#define WM8350_SPI_4WIRE_4WIRE 1
187
188
#define WM8350_SPI_3WIRE_I2C 0
189
#define WM8350_SPI_3WIRE_SPI 1
190
191
/*
192
* R8 (0x08) - Power mgmt (1)
193
*/
194
#define WM8350_CODEC_ISEL_MASK 0xC000
195
#define WM8350_VBUFEN 0x2000
196
#define WM8350_OUTPUT_DRAIN_EN 0x0400
197
#define WM8350_MIC_DET_ENA 0x0100
198
#define WM8350_BIASEN 0x0020
199
#define WM8350_MICBEN 0x0010
200
#define WM8350_VMIDEN 0x0004
201
#define WM8350_VMID_MASK 0x0003
202
#define WM8350_VMID_SHIFT 0
203
204
/*
205
* R9 (0x09) - Power mgmt (2)
206
*/
207
#define WM8350_IN3R_ENA 0x0800
208
#define WM8350_IN3L_ENA 0x0400
209
#define WM8350_INR_ENA 0x0200
210
#define WM8350_INL_ENA 0x0100
211
#define WM8350_MIXINR_ENA 0x0080
212
#define WM8350_MIXINL_ENA 0x0040
213
#define WM8350_OUT4_ENA 0x0020
214
#define WM8350_OUT3_ENA 0x0010
215
#define WM8350_MIXOUTR_ENA 0x0002
216
#define WM8350_MIXOUTL_ENA 0x0001
217
218
/*
219
* R10 (0x0A) - Power mgmt (3)
220
*/
221
#define WM8350_IN3R_TO_OUT2R 0x0080
222
#define WM8350_OUT2R_ENA 0x0008
223
#define WM8350_OUT2L_ENA 0x0004
224
#define WM8350_OUT1R_ENA 0x0002
225
#define WM8350_OUT1L_ENA 0x0001
226
227
/*
228
* R11 (0x0B) - Power mgmt (4)
229
*/
230
#define WM8350_SYSCLK_ENA 0x4000
231
#define WM8350_ADC_HPF_ENA 0x2000
232
#define WM8350_FLL_ENA 0x0800
233
#define WM8350_FLL_OSC_ENA 0x0400
234
#define WM8350_TOCLK_ENA 0x0100
235
#define WM8350_DACR_ENA 0x0020
236
#define WM8350_DACL_ENA 0x0010
237
#define WM8350_ADCR_ENA 0x0008
238
#define WM8350_ADCL_ENA 0x0004
239
240
/*
241
* R12 (0x0C) - Power mgmt (5)
242
*/
243
#define WM8350_CODEC_ENA 0x1000
244
#define WM8350_RTC_TICK_ENA 0x0800
245
#define WM8350_OSC32K_ENA 0x0400
246
#define WM8350_CHG_ENA 0x0200
247
#define WM8350_ACC_DET_ENA 0x0100
248
#define WM8350_AUXADC_ENA 0x0080
249
#define WM8350_DCMP4_ENA 0x0008
250
#define WM8350_DCMP3_ENA 0x0004
251
#define WM8350_DCMP2_ENA 0x0002
252
#define WM8350_DCMP1_ENA 0x0001
253
254
/*
255
* R13 (0x0D) - Power mgmt (6)
256
*/
257
#define WM8350_LS_ENA 0x8000
258
#define WM8350_LDO4_ENA 0x0800
259
#define WM8350_LDO3_ENA 0x0400
260
#define WM8350_LDO2_ENA 0x0200
261
#define WM8350_LDO1_ENA 0x0100
262
#define WM8350_DC6_ENA 0x0020
263
#define WM8350_DC5_ENA 0x0010
264
#define WM8350_DC4_ENA 0x0008
265
#define WM8350_DC3_ENA 0x0004
266
#define WM8350_DC2_ENA 0x0002
267
#define WM8350_DC1_ENA 0x0001
268
269
/*
270
* R14 (0x0E) - Power mgmt (7)
271
*/
272
#define WM8350_CS2_ENA 0x0002
273
#define WM8350_CS1_ENA 0x0001
274
275
/*
276
* R24 (0x18) - System Interrupts
277
*/
278
#define WM8350_OC_INT 0x2000
279
#define WM8350_UV_INT 0x1000
280
#define WM8350_PUTO_INT 0x0800
281
#define WM8350_CS_INT 0x0200
282
#define WM8350_EXT_INT 0x0100
283
#define WM8350_CODEC_INT 0x0080
284
#define WM8350_GP_INT 0x0040
285
#define WM8350_AUXADC_INT 0x0020
286
#define WM8350_RTC_INT 0x0010
287
#define WM8350_SYS_INT 0x0008
288
#define WM8350_CHG_INT 0x0004
289
#define WM8350_USB_INT 0x0002
290
#define WM8350_WKUP_INT 0x0001
291
292
/*
293
* R25 (0x19) - Interrupt Status 1
294
*/
295
#define WM8350_CHG_BAT_HOT_EINT 0x8000
296
#define WM8350_CHG_BAT_COLD_EINT 0x4000
297
#define WM8350_CHG_BAT_FAIL_EINT 0x2000
298
#define WM8350_CHG_TO_EINT 0x1000
299
#define WM8350_CHG_END_EINT 0x0800
300
#define WM8350_CHG_START_EINT 0x0400
301
#define WM8350_CHG_FAST_RDY_EINT 0x0200
302
#define WM8350_RTC_PER_EINT 0x0080
303
#define WM8350_RTC_SEC_EINT 0x0040
304
#define WM8350_RTC_ALM_EINT 0x0020
305
#define WM8350_CHG_VBATT_LT_3P9_EINT 0x0004
306
#define WM8350_CHG_VBATT_LT_3P1_EINT 0x0002
307
#define WM8350_CHG_VBATT_LT_2P85_EINT 0x0001
308
309
/*
310
* R26 (0x1A) - Interrupt Status 2
311
*/
312
#define WM8350_CS1_EINT 0x2000
313
#define WM8350_CS2_EINT 0x1000
314
#define WM8350_USB_LIMIT_EINT 0x0400
315
#define WM8350_AUXADC_DATARDY_EINT 0x0100
316
#define WM8350_AUXADC_DCOMP4_EINT 0x0080
317
#define WM8350_AUXADC_DCOMP3_EINT 0x0040
318
#define WM8350_AUXADC_DCOMP2_EINT 0x0020
319
#define WM8350_AUXADC_DCOMP1_EINT 0x0010
320
#define WM8350_SYS_HYST_COMP_FAIL_EINT 0x0008
321
#define WM8350_SYS_CHIP_GT115_EINT 0x0004
322
#define WM8350_SYS_CHIP_GT140_EINT 0x0002
323
#define WM8350_SYS_WDOG_TO_EINT 0x0001
324
325
/*
326
* R27 (0x1B) - Power Up Interrupt Status
327
*/
328
#define WM8350_PUTO_LDO4_EINT 0x0800
329
#define WM8350_PUTO_LDO3_EINT 0x0400
330
#define WM8350_PUTO_LDO2_EINT 0x0200
331
#define WM8350_PUTO_LDO1_EINT 0x0100
332
#define WM8350_PUTO_DC6_EINT 0x0020
333
#define WM8350_PUTO_DC5_EINT 0x0010
334
#define WM8350_PUTO_DC4_EINT 0x0008
335
#define WM8350_PUTO_DC3_EINT 0x0004
336
#define WM8350_PUTO_DC2_EINT 0x0002
337
#define WM8350_PUTO_DC1_EINT 0x0001
338
339
/*
340
* R28 (0x1C) - Under Voltage Interrupt status
341
*/
342
#define WM8350_UV_LDO4_EINT 0x0800
343
#define WM8350_UV_LDO3_EINT 0x0400
344
#define WM8350_UV_LDO2_EINT 0x0200
345
#define WM8350_UV_LDO1_EINT 0x0100
346
#define WM8350_UV_DC6_EINT 0x0020
347
#define WM8350_UV_DC5_EINT 0x0010
348
#define WM8350_UV_DC4_EINT 0x0008
349
#define WM8350_UV_DC3_EINT 0x0004
350
#define WM8350_UV_DC2_EINT 0x0002
351
#define WM8350_UV_DC1_EINT 0x0001
352
353
/*
354
* R29 (0x1D) - Over Current Interrupt status
355
*/
356
#define WM8350_OC_LS_EINT 0x8000
357
358
/*
359
* R30 (0x1E) - GPIO Interrupt Status
360
*/
361
#define WM8350_GP12_EINT 0x1000
362
#define WM8350_GP11_EINT 0x0800
363
#define WM8350_GP10_EINT 0x0400
364
#define WM8350_GP9_EINT 0x0200
365
#define WM8350_GP8_EINT 0x0100
366
#define WM8350_GP7_EINT 0x0080
367
#define WM8350_GP6_EINT 0x0040
368
#define WM8350_GP5_EINT 0x0020
369
#define WM8350_GP4_EINT 0x0010
370
#define WM8350_GP3_EINT 0x0008
371
#define WM8350_GP2_EINT 0x0004
372
#define WM8350_GP1_EINT 0x0002
373
#define WM8350_GP0_EINT 0x0001
374
375
/*
376
* R31 (0x1F) - Comparator Interrupt Status
377
*/
378
#define WM8350_EXT_USB_FB_EINT 0x8000
379
#define WM8350_EXT_WALL_FB_EINT 0x4000
380
#define WM8350_EXT_BAT_FB_EINT 0x2000
381
#define WM8350_CODEC_JCK_DET_L_EINT 0x0800
382
#define WM8350_CODEC_JCK_DET_R_EINT 0x0400
383
#define WM8350_CODEC_MICSCD_EINT 0x0200
384
#define WM8350_CODEC_MICD_EINT 0x0100
385
#define WM8350_WKUP_OFF_STATE_EINT 0x0040
386
#define WM8350_WKUP_HIB_STATE_EINT 0x0020
387
#define WM8350_WKUP_CONV_FAULT_EINT 0x0010
388
#define WM8350_WKUP_WDOG_RST_EINT 0x0008
389
#define WM8350_WKUP_GP_PWR_ON_EINT 0x0004
390
#define WM8350_WKUP_ONKEY_EINT 0x0002
391
#define WM8350_WKUP_GP_WAKEUP_EINT 0x0001
392
393
/*
394
* R32 (0x20) - System Interrupts Mask
395
*/
396
#define WM8350_IM_OC_INT 0x2000
397
#define WM8350_IM_UV_INT 0x1000
398
#define WM8350_IM_PUTO_INT 0x0800
399
#define WM8350_IM_SPARE_INT 0x0400
400
#define WM8350_IM_CS_INT 0x0200
401
#define WM8350_IM_EXT_INT 0x0100
402
#define WM8350_IM_CODEC_INT 0x0080
403
#define WM8350_IM_GP_INT 0x0040
404
#define WM8350_IM_AUXADC_INT 0x0020
405
#define WM8350_IM_RTC_INT 0x0010
406
#define WM8350_IM_SYS_INT 0x0008
407
#define WM8350_IM_CHG_INT 0x0004
408
#define WM8350_IM_USB_INT 0x0002
409
#define WM8350_IM_WKUP_INT 0x0001
410
411
/*
412
* R33 (0x21) - Interrupt Status 1 Mask
413
*/
414
#define WM8350_IM_CHG_BAT_HOT_EINT 0x8000
415
#define WM8350_IM_CHG_BAT_COLD_EINT 0x4000
416
#define WM8350_IM_CHG_BAT_FAIL_EINT 0x2000
417
#define WM8350_IM_CHG_TO_EINT 0x1000
418
#define WM8350_IM_CHG_END_EINT 0x0800
419
#define WM8350_IM_CHG_START_EINT 0x0400
420
#define WM8350_IM_CHG_FAST_RDY_EINT 0x0200
421
#define WM8350_IM_RTC_PER_EINT 0x0080
422
#define WM8350_IM_RTC_SEC_EINT 0x0040
423
#define WM8350_IM_RTC_ALM_EINT 0x0020
424
#define WM8350_IM_CHG_VBATT_LT_3P9_EINT 0x0004
425
#define WM8350_IM_CHG_VBATT_LT_3P1_EINT 0x0002
426
#define WM8350_IM_CHG_VBATT_LT_2P85_EINT 0x0001
427
428
/*
429
* R34 (0x22) - Interrupt Status 2 Mask
430
*/
431
#define WM8350_IM_SPARE2_EINT 0x8000
432
#define WM8350_IM_SPARE1_EINT 0x4000
433
#define WM8350_IM_CS1_EINT 0x2000
434
#define WM8350_IM_CS2_EINT 0x1000
435
#define WM8350_IM_USB_LIMIT_EINT 0x0400
436
#define WM8350_IM_AUXADC_DATARDY_EINT 0x0100
437
#define WM8350_IM_AUXADC_DCOMP4_EINT 0x0080
438
#define WM8350_IM_AUXADC_DCOMP3_EINT 0x0040
439
#define WM8350_IM_AUXADC_DCOMP2_EINT 0x0020
440
#define WM8350_IM_AUXADC_DCOMP1_EINT 0x0010
441
#define WM8350_IM_SYS_HYST_COMP_FAIL_EINT 0x0008
442
#define WM8350_IM_SYS_CHIP_GT115_EINT 0x0004
443
#define WM8350_IM_SYS_CHIP_GT140_EINT 0x0002
444
#define WM8350_IM_SYS_WDOG_TO_EINT 0x0001
445
446
/*
447
* R35 (0x23) - Power Up Interrupt Status Mask
448
*/
449
#define WM8350_IM_PUTO_LDO4_EINT 0x0800
450
#define WM8350_IM_PUTO_LDO3_EINT 0x0400
451
#define WM8350_IM_PUTO_LDO2_EINT 0x0200
452
#define WM8350_IM_PUTO_LDO1_EINT 0x0100
453
#define WM8350_IM_PUTO_DC6_EINT 0x0020
454
#define WM8350_IM_PUTO_DC5_EINT 0x0010
455
#define WM8350_IM_PUTO_DC4_EINT 0x0008
456
#define WM8350_IM_PUTO_DC3_EINT 0x0004
457
#define WM8350_IM_PUTO_DC2_EINT 0x0002
458
#define WM8350_IM_PUTO_DC1_EINT 0x0001
459
460
/*
461
* R36 (0x24) - Under Voltage Interrupt status Mask
462
*/
463
#define WM8350_IM_UV_LDO4_EINT 0x0800
464
#define WM8350_IM_UV_LDO3_EINT 0x0400
465
#define WM8350_IM_UV_LDO2_EINT 0x0200
466
#define WM8350_IM_UV_LDO1_EINT 0x0100
467
#define WM8350_IM_UV_DC6_EINT 0x0020
468
#define WM8350_IM_UV_DC5_EINT 0x0010
469
#define WM8350_IM_UV_DC4_EINT 0x0008
470
#define WM8350_IM_UV_DC3_EINT 0x0004
471
#define WM8350_IM_UV_DC2_EINT 0x0002
472
#define WM8350_IM_UV_DC1_EINT 0x0001
473
474
/*
475
* R37 (0x25) - Over Current Interrupt status Mask
476
*/
477
#define WM8350_IM_OC_LS_EINT 0x8000
478
479
/*
480
* R38 (0x26) - GPIO Interrupt Status Mask
481
*/
482
#define WM8350_IM_GP12_EINT 0x1000
483
#define WM8350_IM_GP11_EINT 0x0800
484
#define WM8350_IM_GP10_EINT 0x0400
485
#define WM8350_IM_GP9_EINT 0x0200
486
#define WM8350_IM_GP8_EINT 0x0100
487
#define WM8350_IM_GP7_EINT 0x0080
488
#define WM8350_IM_GP6_EINT 0x0040
489
#define WM8350_IM_GP5_EINT 0x0020
490
#define WM8350_IM_GP4_EINT 0x0010
491
#define WM8350_IM_GP3_EINT 0x0008
492
#define WM8350_IM_GP2_EINT 0x0004
493
#define WM8350_IM_GP1_EINT 0x0002
494
#define WM8350_IM_GP0_EINT 0x0001
495
496
/*
497
* R39 (0x27) - Comparator Interrupt Status Mask
498
*/
499
#define WM8350_IM_EXT_USB_FB_EINT 0x8000
500
#define WM8350_IM_EXT_WALL_FB_EINT 0x4000
501
#define WM8350_IM_EXT_BAT_FB_EINT 0x2000
502
#define WM8350_IM_CODEC_JCK_DET_L_EINT 0x0800
503
#define WM8350_IM_CODEC_JCK_DET_R_EINT 0x0400
504
#define WM8350_IM_CODEC_MICSCD_EINT 0x0200
505
#define WM8350_IM_CODEC_MICD_EINT 0x0100
506
#define WM8350_IM_WKUP_OFF_STATE_EINT 0x0040
507
#define WM8350_IM_WKUP_HIB_STATE_EINT 0x0020
508
#define WM8350_IM_WKUP_CONV_FAULT_EINT 0x0010
509
#define WM8350_IM_WKUP_WDOG_RST_EINT 0x0008
510
#define WM8350_IM_WKUP_GP_PWR_ON_EINT 0x0004
511
#define WM8350_IM_WKUP_ONKEY_EINT 0x0002
512
#define WM8350_IM_WKUP_GP_WAKEUP_EINT 0x0001
513
514
/*
515
* R220 (0xDC) - RAM BIST 1
516
*/
517
#define WM8350_READ_STATUS 0x0800
518
#define WM8350_TSTRAM_CLK 0x0100
519
#define WM8350_TSTRAM_CLK_ENA 0x0080
520
#define WM8350_STARTSEQ 0x0040
521
#define WM8350_READ_SRC 0x0020
522
#define WM8350_COUNT_DIR 0x0010
523
#define WM8350_TSTRAM_MODE_MASK 0x000E
524
#define WM8350_TSTRAM_ENA 0x0001
525
526
/*
527
* R225 (0xE1) - DCDC/LDO status
528
*/
529
#define WM8350_LS_STS 0x8000
530
#define WM8350_LDO4_STS 0x0800
531
#define WM8350_LDO3_STS 0x0400
532
#define WM8350_LDO2_STS 0x0200
533
#define WM8350_LDO1_STS 0x0100
534
#define WM8350_DC6_STS 0x0020
535
#define WM8350_DC5_STS 0x0010
536
#define WM8350_DC4_STS 0x0008
537
#define WM8350_DC3_STS 0x0004
538
#define WM8350_DC2_STS 0x0002
539
#define WM8350_DC1_STS 0x0001
540
541
/*
542
* R226 (0xE2) - Charger status
543
*/
544
#define WM8350_CHG_BATT_HOT_OVRDE 0x8000
545
#define WM8350_CHG_BATT_COLD_OVRDE 0x4000
546
547
/*
548
* R227 (0xE3) - Misc Overrides
549
*/
550
#define WM8350_USB_LIMIT_OVRDE 0x0400
551
552
/*
553
* R227 (0xE7) - Comparator Overrides
554
*/
555
#define WM8350_USB_FB_OVRDE 0x8000
556
#define WM8350_WALL_FB_OVRDE 0x4000
557
#define WM8350_BATT_FB_OVRDE 0x2000
558
559
560
/*
561
* R233 (0xE9) - State Machinine Status
562
*/
563
#define WM8350_USB_SM_MASK 0x0700
564
#define WM8350_USB_SM_SHIFT 8
565
566
#define WM8350_USB_SM_100_SLV 1
567
#define WM8350_USB_SM_500_SLV 5
568
#define WM8350_USB_SM_STDBY_SLV 7
569
570
/* WM8350 wake up conditions */
571
#define WM8350_IRQ_WKUP_OFF_STATE 43
572
#define WM8350_IRQ_WKUP_HIB_STATE 44
573
#define WM8350_IRQ_WKUP_CONV_FAULT 45
574
#define WM8350_IRQ_WKUP_WDOG_RST 46
575
#define WM8350_IRQ_WKUP_GP_PWR_ON 47
576
#define WM8350_IRQ_WKUP_ONKEY 48
577
#define WM8350_IRQ_WKUP_GP_WAKEUP 49
578
579
/* wm8350 chip revisions */
580
#define WM8350_REV_E 0x4
581
#define WM8350_REV_F 0x5
582
#define WM8350_REV_G 0x6
583
#define WM8350_REV_H 0x7
584
585
#define WM8350_NUM_IRQ 63
586
587
#define WM8350_NUM_IRQ_REGS 7
588
589
extern
const
struct
regmap_config
wm8350_regmap
;
590
591
struct
wm8350
;
592
593
struct
wm8350_hwmon
{
594
struct
platform_device
*
pdev
;
595
struct
device
*
classdev
;
596
};
597
598
struct
wm8350
{
599
struct
device
*
dev
;
600
601
/* device IO */
602
struct
regmap
*
regmap
;
603
bool
unlocked
;
604
605
struct
mutex
auxadc_mutex
;
606
struct
completion
auxadc_done
;
607
608
/* Interrupt handling */
609
struct
mutex
irq_lock
;
610
int
chip_irq
;
611
int
irq_base
;
612
u16
irq_masks
[
WM8350_NUM_IRQ_REGS
];
613
614
/* Client devices */
615
struct
wm8350_codec
codec
;
616
struct
wm8350_gpio
gpio
;
617
struct
wm8350_hwmon
hwmon
;
618
struct
wm8350_pmic
pmic
;
619
struct
wm8350_power
power
;
620
struct
wm8350_rtc
rtc
;
621
struct
wm8350_wdt
wdt
;
622
};
623
633
struct
wm8350_platform_data
{
634
int
(*
init
)(
struct
wm8350
*
wm8350
);
635
int
irq_high
;
636
int
irq_base
;
637
int
gpio_base
;
638
};
639
640
641
/*
642
* WM8350 device initialisation and exit.
643
*/
644
int
wm8350_device_init
(
struct
wm8350
*
wm8350
,
int
irq,
645
struct
wm8350_platform_data
*
pdata
);
646
void
wm8350_device_exit
(
struct
wm8350
*
wm8350
);
647
648
/*
649
* WM8350 device IO
650
*/
651
int
wm8350_clear_bits
(
struct
wm8350
*
wm8350
,
u16
reg
,
u16
mask
);
652
int
wm8350_set_bits
(
struct
wm8350
*
wm8350
,
u16
reg
,
u16
mask
);
653
u16
wm8350_reg_read
(
struct
wm8350
*
wm8350
,
int
reg
);
654
int
wm8350_reg_write
(
struct
wm8350
*
wm8350
,
int
reg
,
u16
val
);
655
int
wm8350_reg_lock
(
struct
wm8350
*
wm8350
);
656
int
wm8350_reg_unlock
(
struct
wm8350
*
wm8350
);
657
int
wm8350_block_read
(
struct
wm8350
*
wm8350
,
int
reg
,
int
size
,
u16
*
dest
);
658
int
wm8350_block_write
(
struct
wm8350
*
wm8350
,
int
reg
,
int
size
,
u16
*
src
);
659
660
/*
661
* WM8350 internal interrupts
662
*/
663
static
inline
int
wm8350_register_irq(
struct
wm8350
*
wm8350
,
int
irq,
664
irq_handler_t
handler,
665
unsigned
long
flags
,
666
const
char
*
name
,
void
*
data
)
667
{
668
if
(!wm8350->
irq_base
)
669
return
-
ENODEV
;
670
671
return
request_threaded_irq
(irq + wm8350->
irq_base
,
NULL
,
672
handler, flags, name, data);
673
}
674
675
static
inline
void
wm8350_free_irq(
struct
wm8350 *wm8350,
int
irq,
void
*data)
676
{
677
free_irq
(irq + wm8350->
irq_base
, data);
678
}
679
680
static
inline
void
wm8350_mask_irq(
struct
wm8350 *wm8350,
int
irq)
681
{
682
disable_irq
(irq + wm8350->
irq_base
);
683
}
684
685
static
inline
void
wm8350_unmask_irq(
struct
wm8350 *wm8350,
int
irq)
686
{
687
enable_irq
(irq + wm8350->
irq_base
);
688
}
689
690
int
wm8350_irq_init
(
struct
wm8350 *wm8350,
int
irq,
691
struct
wm8350_platform_data
*
pdata
);
692
int
wm8350_irq_exit
(
struct
wm8350 *wm8350);
693
694
#endif
Generated on Thu Jan 10 2013 12:58:12 for Linux Kernel by
1.8.2