10 #ifndef LINUX_MMC_HOST_H
11 #define LINUX_MMC_HOST_H
15 #include <linux/sched.h>
16 #include <linux/device.h>
30 #define MMC_BUSMODE_OPENDRAIN 1
31 #define MMC_BUSMODE_PUSHPULL 2
35 #define MMC_CS_DONTCARE 0
41 #define MMC_POWER_OFF 0
42 #define MMC_POWER_UP 1
43 #define MMC_POWER_ON 2
47 #define MMC_BUS_WIDTH_1 0
48 #define MMC_BUS_WIDTH_4 2
49 #define MMC_BUS_WIDTH_8 3
53 #define MMC_TIMING_LEGACY 0
54 #define MMC_TIMING_MMC_HS 1
55 #define MMC_TIMING_SD_HS 2
56 #define MMC_TIMING_UHS_SDR12 MMC_TIMING_LEGACY
57 #define MMC_TIMING_UHS_SDR25 MMC_TIMING_SD_HS
58 #define MMC_TIMING_UHS_SDR50 3
59 #define MMC_TIMING_UHS_SDR104 4
60 #define MMC_TIMING_UHS_DDR50 5
61 #define MMC_TIMING_MMC_HS200 6
63 #define MMC_SDR_MODE 0
64 #define MMC_1_2V_DDR_MODE 1
65 #define MMC_1_8V_DDR_MODE 2
66 #define MMC_1_2V_SDR_MODE 3
67 #define MMC_1_8V_SDR_MODE 4
71 #define MMC_SIGNAL_VOLTAGE_330 0
72 #define MMC_SIGNAL_VOLTAGE_180 1
73 #define MMC_SIGNAL_VOLTAGE_120 2
77 #define MMC_SET_DRIVER_TYPE_B 0
78 #define MMC_SET_DRIVER_TYPE_A 1
79 #define MMC_SET_DRIVER_TYPE_C 2
80 #define MMC_SET_DRIVER_TYPE_D 3
196 #define MMC_VDD_165_195 0x00000080
197 #define MMC_VDD_20_21 0x00000100
198 #define MMC_VDD_21_22 0x00000200
199 #define MMC_VDD_22_23 0x00000400
200 #define MMC_VDD_23_24 0x00000800
201 #define MMC_VDD_24_25 0x00001000
202 #define MMC_VDD_25_26 0x00002000
203 #define MMC_VDD_26_27 0x00004000
204 #define MMC_VDD_27_28 0x00008000
205 #define MMC_VDD_28_29 0x00010000
206 #define MMC_VDD_29_30 0x00020000
207 #define MMC_VDD_30_31 0x00040000
208 #define MMC_VDD_31_32 0x00080000
209 #define MMC_VDD_32_33 0x00100000
210 #define MMC_VDD_33_34 0x00200000
211 #define MMC_VDD_34_35 0x00400000
212 #define MMC_VDD_35_36 0x00800000
216 #define MMC_CAP_4_BIT_DATA (1 << 0)
217 #define MMC_CAP_MMC_HIGHSPEED (1 << 1)
218 #define MMC_CAP_SD_HIGHSPEED (1 << 2)
219 #define MMC_CAP_SDIO_IRQ (1 << 3)
220 #define MMC_CAP_SPI (1 << 4)
221 #define MMC_CAP_NEEDS_POLL (1 << 5)
222 #define MMC_CAP_8_BIT_DATA (1 << 6)
224 #define MMC_CAP_NONREMOVABLE (1 << 8)
225 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9)
226 #define MMC_CAP_ERASE (1 << 10)
227 #define MMC_CAP_1_8V_DDR (1 << 11)
229 #define MMC_CAP_1_2V_DDR (1 << 12)
231 #define MMC_CAP_POWER_OFF_CARD (1 << 13)
232 #define MMC_CAP_BUS_WIDTH_TEST (1 << 14)
233 #define MMC_CAP_UHS_SDR12 (1 << 15)
234 #define MMC_CAP_UHS_SDR25 (1 << 16)
235 #define MMC_CAP_UHS_SDR50 (1 << 17)
236 #define MMC_CAP_UHS_SDR104 (1 << 18)
237 #define MMC_CAP_UHS_DDR50 (1 << 19)
238 #define MMC_CAP_DRIVER_TYPE_A (1 << 23)
239 #define MMC_CAP_DRIVER_TYPE_C (1 << 24)
240 #define MMC_CAP_DRIVER_TYPE_D (1 << 25)
241 #define MMC_CAP_CMD23 (1 << 30)
242 #define MMC_CAP_HW_RESET (1 << 31)
246 #define MMC_CAP2_BOOTPART_NOACC (1 << 0)
247 #define MMC_CAP2_CACHE_CTRL (1 << 1)
248 #define MMC_CAP2_POWEROFF_NOTIFY (1 << 2)
249 #define MMC_CAP2_NO_MULTI_READ (1 << 3)
250 #define MMC_CAP2_NO_SLEEP_CMD (1 << 4)
251 #define MMC_CAP2_HS200_1_8V_SDR (1 << 5)
252 #define MMC_CAP2_HS200_1_2V_SDR (1 << 6)
253 #define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \
254 MMC_CAP2_HS200_1_2V_SDR)
255 #define MMC_CAP2_BROKEN_VOLTAGE (1 << 7)
256 #define MMC_CAP2_DETECT_ON_ERR (1 << 8)
257 #define MMC_CAP2_HC_ERASE_SZ (1 << 9)
258 #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10)
259 #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11)
263 #ifdef CONFIG_MMC_CLKGATE
265 unsigned int clk_delay;
268 unsigned int clk_old;
270 struct mutex clk_gate_mutex;
272 unsigned long clkgate_delay;
294 #ifdef CONFIG_MMC_DEBUG
295 unsigned int removed:1;
321 #ifdef CONFIG_LEDS_TRIGGERS
322 struct led_trigger *
led;
325 #ifdef CONFIG_REGULATOR
326 bool regulator_enabled;
334 #ifdef CONFIG_FAIL_MMC_REQUEST
335 struct fault_attr fail_mmc_request;
350 return (
void *)host->private;
353 #define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
355 #define mmc_dev(x) ((x)->parent)
356 #define mmc_classdev(x) (&(x)->class_dev)
357 #define mmc_hostname(x) (dev_name(&(x)->class_dev))
370 static inline void mmc_signal_sdio_irq(
struct mmc_host *host)
372 host->
ops->enable_sdio_irq(host, 0);
377 #ifdef CONFIG_REGULATOR
379 int mmc_regulator_set_ocr(
struct mmc_host *mmc,
381 unsigned short vdd_bit);
382 int mmc_regulator_get_supply(
struct mmc_host *mmc);
389 static inline int mmc_regulator_set_ocr(
struct mmc_host *mmc,
391 unsigned short vdd_bit)
396 static inline int mmc_regulator_get_supply(
struct mmc_host *mmc)
411 static inline int mmc_card_is_removable(
struct mmc_host *host)
416 static inline int mmc_card_keep_power(
struct mmc_host *host)
421 static inline int mmc_card_wake_sdio_irq(
struct mmc_host *host)
426 static inline int mmc_host_cmd23(
struct mmc_host *host)
431 static inline int mmc_boot_partition_access(
struct mmc_host *host)
436 #ifdef CONFIG_MMC_CLKGATE
437 void mmc_host_clk_hold(
struct mmc_host *host);
438 void mmc_host_clk_release(
struct mmc_host *host);
439 unsigned int mmc_host_clk_rate(
struct mmc_host *host);
442 static inline void mmc_host_clk_hold(
struct mmc_host *host)
446 static inline void mmc_host_clk_release(
struct mmc_host *host)
450 static inline unsigned int mmc_host_clk_rate(
struct mmc_host *host)
452 return host->
ios.clock;