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intelfb.h
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1 #ifndef _INTELFB_H
2 #define _INTELFB_H
3 
4 /* $DHD: intelfb/intelfb.h,v 1.40 2003/06/27 15:06:25 dawes Exp $ */
5 
6 #include <linux/agp_backend.h>
7 #include <linux/fb.h>
8 
9 #ifdef CONFIG_FB_INTEL_I2C
10 #include <linux/i2c.h>
11 #include <linux/i2c-algo-bit.h>
12 #endif
13 
14 /*** Version/name ***/
15 #define INTELFB_VERSION "0.9.6"
16 #define INTELFB_MODULE_NAME "intelfb"
17 #define SUPPORTED_CHIPSETS "830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/945GME/965G/965GM"
18 
19 
20 /*** Debug/feature defines ***/
21 
22 #ifndef DEBUG
23 #define DEBUG 0
24 #endif
25 
26 #ifndef VERBOSE
27 #define VERBOSE 0
28 #endif
29 
30 #ifndef REGDUMP
31 #define REGDUMP 0
32 #endif
33 
34 #ifndef DETECT_VGA_CLASS_ONLY
35 #define DETECT_VGA_CLASS_ONLY 1
36 #endif
37 
38 #ifndef ALLOCATE_FOR_PANNING
39 #define ALLOCATE_FOR_PANNING 1
40 #endif
41 
42 #ifndef PREFERRED_MODE
43 #define PREFERRED_MODE "1024x768-32@70"
44 #endif
45 
46 /*** hw-related values ***/
47 
48 /* Resource Allocation */
49 #define INTELFB_FB_ACQUIRED 1
50 #define INTELFB_MMIO_ACQUIRED 2
51 
52 /* PCI ids for supported devices */
53 #define PCI_DEVICE_ID_INTEL_830M 0x3577
54 #define PCI_DEVICE_ID_INTEL_845G 0x2562
55 #define PCI_DEVICE_ID_INTEL_85XGM 0x3582
56 #define PCI_DEVICE_ID_INTEL_854 0x358E
57 #define PCI_DEVICE_ID_INTEL_865G 0x2572
58 #define PCI_DEVICE_ID_INTEL_915G 0x2582
59 #define PCI_DEVICE_ID_INTEL_915GM 0x2592
60 #define PCI_DEVICE_ID_INTEL_945G 0x2772
61 #define PCI_DEVICE_ID_INTEL_945GM 0x27A2
62 #define PCI_DEVICE_ID_INTEL_945GME 0x27AE
63 #define PCI_DEVICE_ID_INTEL_965G 0x29A2
64 #define PCI_DEVICE_ID_INTEL_965GM 0x2A02
65 
66 /* Size of MMIO region */
67 #define INTEL_REG_SIZE 0x80000
68 
69 #define STRIDE_ALIGNMENT 16
70 #define STRIDE_ALIGNMENT_I9XX 64
71 
72 #define PALETTE_8_ENTRIES 256
73 
74 
75 /*** Macros ***/
76 
77 /* basic arithmetic */
78 #define KB(x) ((x) * 1024)
79 #define MB(x) ((x) * 1024 * 1024)
80 #define BtoKB(x) ((x) / 1024)
81 #define BtoMB(x) ((x) / 1024 / 1024)
82 
83 #define GTT_PAGE_SIZE KB(4)
84 
85 #define ROUND_UP_TO(x, y) (((x) + (y) - 1) / (y) * (y))
86 #define ROUND_DOWN_TO(x, y) ((x) / (y) * (y))
87 #define ROUND_UP_TO_PAGE(x) ROUND_UP_TO((x), GTT_PAGE_SIZE)
88 #define ROUND_DOWN_TO_PAGE(x) ROUND_DOWN_TO((x), GTT_PAGE_SIZE)
89 
90 /* messages */
91 #define PFX INTELFB_MODULE_NAME ": "
92 
93 #define ERR_MSG(fmt, args...) printk(KERN_ERR PFX fmt, ## args)
94 #define WRN_MSG(fmt, args...) printk(KERN_WARNING PFX fmt, ## args)
95 #define NOT_MSG(fmt, args...) printk(KERN_NOTICE PFX fmt, ## args)
96 #define INF_MSG(fmt, args...) printk(KERN_INFO PFX fmt, ## args)
97 #if DEBUG
98 #define DBG_MSG(fmt, args...) printk(KERN_DEBUG PFX fmt, ## args)
99 #else
100 #define DBG_MSG(fmt, args...) while (0) printk(fmt, ## args)
101 #endif
102 
103 /* get commonly used pointers */
104 #define GET_DINFO(info) (info)->par
105 
106 /* misc macros */
107 #define ACCEL(d, i) \
108  ((d)->accel && !(d)->ring_lockup && \
109  ((i)->var.accel_flags & FB_ACCELF_TEXT))
110 
111 /*#define NOACCEL_CHIPSET(d) \
112  ((d)->chipset != INTEL_865G)*/
113 #define NOACCEL_CHIPSET(d) \
114  (0)
115 
116 #define FIXED_MODE(d) ((d)->fixed_mode)
117 
118 /*** Driver parameters ***/
119 
120 #define RINGBUFFER_SIZE KB(64)
121 #define HW_CURSOR_SIZE KB(4)
122 
123 /* Intel agpgart driver */
124 #define AGP_PHYSICAL_MEMORY 2
125 
126 /* store information about an Ixxx DVO */
127 /* The i830->i865 use multiple DVOs with multiple i2cs */
128 /* the i915, i945 have a single sDVO i2c bus - which is different */
129 #define MAX_OUTPUTS 6
130 
131 /* these are outputs from the chip - integrated only
132  external chips are via DVO or SDVO output */
133 #define INTELFB_OUTPUT_UNUSED 0
134 #define INTELFB_OUTPUT_ANALOG 1
135 #define INTELFB_OUTPUT_DVO 2
136 #define INTELFB_OUTPUT_SDVO 3
137 #define INTELFB_OUTPUT_LVDS 4
138 #define INTELFB_OUTPUT_TVOUT 5
139 
140 #define INTELFB_DVO_CHIP_NONE 0
141 #define INTELFB_DVO_CHIP_LVDS 1
142 #define INTELFB_DVO_CHIP_TMDS 2
143 #define INTELFB_DVO_CHIP_TVOUT 4
144 
145 #define INTELFB_OUTPUT_PIPE_NC 0
146 #define INTELFB_OUTPUT_PIPE_A 1
147 #define INTELFB_OUTPUT_PIPE_B 2
148 
149 /*** Data Types ***/
150 
151 /* supported chipsets */
152 enum intel_chips {
153  INTEL_830M,
154  INTEL_845G,
155  INTEL_85XGM,
156  INTEL_852GM,
157  INTEL_852GME,
158  INTEL_854,
159  INTEL_855GM,
160  INTEL_855GME,
161  INTEL_865G,
162  INTEL_915G,
163  INTEL_915GM,
164  INTEL_945G,
165  INTEL_945GM,
166  INTEL_945GME,
167  INTEL_965G,
168  INTEL_965GM,
169 };
170 
171 struct intelfb_hwstate {
172  u32 vga0_divisor;
173  u32 vga1_divisor;
174  u32 vga_pd;
175  u32 dpll_a;
176  u32 dpll_b;
177  u32 fpa0;
178  u32 fpa1;
179  u32 fpb0;
180  u32 fpb1;
181  u32 palette_a[PALETTE_8_ENTRIES];
182  u32 palette_b[PALETTE_8_ENTRIES];
183  u32 htotal_a;
184  u32 hblank_a;
185  u32 hsync_a;
186  u32 vtotal_a;
187  u32 vblank_a;
188  u32 vsync_a;
189  u32 src_size_a;
190  u32 bclrpat_a;
191  u32 htotal_b;
192  u32 hblank_b;
193  u32 hsync_b;
194  u32 vtotal_b;
195  u32 vblank_b;
196  u32 vsync_b;
197  u32 src_size_b;
198  u32 bclrpat_b;
199  u32 adpa;
200  u32 dvoa;
201  u32 dvob;
202  u32 dvoc;
203  u32 dvoa_srcdim;
204  u32 dvob_srcdim;
205  u32 dvoc_srcdim;
206  u32 lvds;
207  u32 pipe_a_conf;
208  u32 pipe_b_conf;
209  u32 disp_arb;
210  u32 cursor_a_control;
211  u32 cursor_b_control;
212  u32 cursor_a_base;
213  u32 cursor_b_base;
214  u32 cursor_size;
215  u32 disp_a_ctrl;
216  u32 disp_b_ctrl;
217  u32 disp_a_base;
218  u32 disp_b_base;
219  u32 cursor_a_palette[4];
220  u32 cursor_b_palette[4];
221  u32 disp_a_stride;
222  u32 disp_b_stride;
223  u32 vgacntrl;
224  u32 add_id;
225  u32 swf0x[7];
226  u32 swf1x[7];
227  u32 swf3x[3];
228  u32 fence[8];
229  u32 instpm;
230  u32 mem_mode;
231  u32 fw_blc_0;
232  u32 fw_blc_1;
233  u16 hwstam;
234  u16 ier;
235  u16 iir;
236  u16 imr;
237 };
238 
239 struct intelfb_heap_data {
240  u32 physical;
241  u8 __iomem *virtual;
242  u32 offset; /* in GATT pages */
243  u32 size; /* in bytes */
244 };
245 
246 #ifdef CONFIG_FB_INTEL_I2C
247 struct intelfb_i2c_chan {
248  struct intelfb_info *dinfo;
249  u32 reg;
250  struct i2c_adapter adapter;
251  struct i2c_algo_bit_data algo;
252 };
253 #endif
254 
255 struct intelfb_output_rec {
256  int type;
257  int pipe;
258  int flags;
259 
260 #ifdef CONFIG_FB_INTEL_I2C
261  struct intelfb_i2c_chan i2c_bus;
262  struct intelfb_i2c_chan ddc_bus;
263 #endif
264 };
265 
266 struct intelfb_vsync {
267  wait_queue_head_t wait;
268  unsigned int count;
269  int pan_display;
270  u32 pan_offset;
271 };
272 
273 struct intelfb_info {
274  struct fb_info *info;
275  struct fb_ops *fbops;
276  struct pci_dev *pdev;
277 
278  struct intelfb_hwstate save_state;
279 
280  /* agpgart structs */
281  struct agp_memory *gtt_fb_mem; /* use all stolen memory or vram */
282  struct agp_memory *gtt_ring_mem; /* ring buffer */
283  struct agp_memory *gtt_cursor_mem; /* hw cursor */
284 
285  /* use a gart reserved fb mem */
286  u8 fbmem_gart;
287 
288  /* mtrr support */
289  int mtrr_reg;
290  u32 has_mtrr;
291 
292  /* heap data */
293  struct intelfb_heap_data aperture;
294  struct intelfb_heap_data fb;
295  struct intelfb_heap_data ring;
296  struct intelfb_heap_data cursor;
297 
298  /* mmio regs */
299  u32 mmio_base_phys;
300  u8 __iomem *mmio_base;
301 
302  /* fb start offset (in bytes) */
303  u32 fb_start;
304 
305  /* ring buffer */
306  u32 ring_head;
307  u32 ring_tail;
308  u32 ring_tail_mask;
309  u32 ring_space;
310  u32 ring_lockup;
311 
312  /* palette */
313  u32 pseudo_palette[16];
314 
315  /* chip info */
316  int pci_chipset;
317  int chipset;
318  const char *name;
319  int mobile;
320 
321  /* current mode */
322  int bpp, depth;
323  u32 visual;
324  int xres, yres, pitch;
325  int pixclock;
326 
327  /* current pipe */
328  int pipe;
329 
330  /* some flags */
331  int accel;
332  int hwcursor;
333  int fixed_mode;
334  int ring_active;
335  int flag;
336  unsigned long irq_flags;
337  int open;
338 
339  /* vsync */
340  struct intelfb_vsync vsync;
341  spinlock_t int_lock;
342 
343  /* hw cursor */
344  int cursor_on;
345  int cursor_blanked;
346  u8 cursor_src[64];
347 
348  /* initial parameters */
349  int initial_vga;
350  struct fb_var_screeninfo initial_var;
351  u32 initial_fb_base;
352  u32 initial_video_ram;
353  u32 initial_pitch;
354 
355  /* driver registered */
356  int registered;
357 
358  /* index into plls */
359  int pll_index;
360 
361  /* outputs */
362  int num_outputs;
363  struct intelfb_output_rec output[MAX_OUTPUTS];
364 };
365 
366 #define IS_I9XX(dinfo) (((dinfo)->chipset == INTEL_915G) || \
367  ((dinfo)->chipset == INTEL_915GM) || \
368  ((dinfo)->chipset == INTEL_945G) || \
369  ((dinfo)->chipset == INTEL_945GM) || \
370  ((dinfo)->chipset == INTEL_945GME) || \
371  ((dinfo)->chipset == INTEL_965G) || \
372  ((dinfo)->chipset == INTEL_965GM))
373 
374 /*** function prototypes ***/
375 
376 extern int intelfb_var_to_depth(const struct fb_var_screeninfo *var);
377 
378 #ifdef CONFIG_FB_INTEL_I2C
379 extern void intelfb_create_i2c_busses(struct intelfb_info *dinfo);
380 extern void intelfb_delete_i2c_busses(struct intelfb_info *dinfo);
381 #endif
382 
383 #endif /* _INTELFB_H */
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