Linux Kernel
3.7.1
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Macros | |
#define | MPU_R0 (0x0) |
#define | MPU_R1 (0x1) |
#define | MPU_R2 (0x2) |
#define | MPU_R3 (0x3) |
#define | MPU_R4 (0x4) |
#define | MPU_R5 (0x5) |
#define | MPU_R6 (0x6) |
#define | MPU_R7 (0x7) |
#define | MPU_R8 (0x8) |
#define | MPU_R9 (0x9) |
#define | MPU_R10 (0xa) |
#define | MPU_R11 (0xb) |
#define | MPU_R12 (0xc) |
#define | MPU_R13 (0xd) |
#define | MPU_R14 (0xe) |
#define | MPU_R15 (0xf) |
#define | MPU_PC (0x2) |
#define | MPU_WSTS (0x3) |
#define | MPU_JADDR (0x4) |
#define | MPU_IRP (0x5) |
#define | MPU_SRP (0x6) |
#define | MPU_T0 (0x8) |
#define | MPU_T1 (0x9) |
#define | MPU_T2 (0xa) |
#define | MPU_T3 (0xb) |
#define | MPU_I0 (0x10) |
#define | MPU_I1 (0x11) |
#define | MPU_I2 (0x12) |
#define | MPU_I3 (0x13) |
#define | MPU_I4 (0x14) |
#define | MPU_I5 (0x15) |
#define | MPU_I6 (0x16) |
#define | MPU_I7 (0x17) |
#define | MPU_I8 (0x18) |
#define | MPU_I9 (0x19) |
#define | MPU_I10 (0x1a) |
#define | MPU_I11 (0x1b) |
#define | MPU_I12 (0x1c) |
#define | MPU_I13 (0x1d) |
#define | MPU_I14 (0x1e) |
#define | MPU_I15 (0x1f) |
#define | MPU_P2 (0x2) |
#define | MPU_P3 (0x3) |
#define | MPU_P5 (0x5) |
#define | MPU_P6 (0x6) |
#define | MPU_P8 (0x8) |
#define | MPU_P9 (0x9) |
#define | MPU_P10 (0xa) |
#define | MPU_P11 (0xb) |
#define | MPU_P16 (0x10) |
#define | MPU_P17 (0x12) |
#define | MPU_P18 (0x12) |
#define | MPU_P19 (0x13) |
#define | MPU_P20 (0x14) |
#define | MPU_P21 (0x15) |
#define | MPU_P22 (0x16) |
#define | MPU_P23 (0x17) |
#define | MPU_P24 (0x18) |
#define | MPU_P25 (0x19) |
#define | MPU_P26 (0x1a) |
#define | MPU_P27 (0x1b) |
#define | MPU_P28 (0x1c) |
#define | MPU_P29 (0x1d) |
#define | MPU_P30 (0x1e) |
#define | MPU_P31 (0x1f) |
#define | MPU_P1 (0x1) |
#define | MPU_REGA (0x1) |
#define | MK_DWORD_ADDR(ADDR) (ADDR >> 2) |
#define | MK_BYTE_ADDR(ADDR) (ADDR) |
#define | MPU_ADD_RRR(S, N, D) |
#define | MPU_ADD_RRS(S, N, D) |
#define | MPU_ADD_RSR(S, N, D) |
#define | MPU_ADD_RSS(S, N, D) |
#define | MPU_ADD_SRR(S, N, D) |
#define | MPU_ADD_SRS(S, N, D) |
#define | MPU_ADD_SSR(S, N, D) |
#define | MPU_ADD_SSS(S, N, D) |
#define | MPU_ADDQ_RIR(S, N, D) |
#define | MPU_ADDQ_IRR(S, N, D) |
#define | MPU_ADDX_IRR_INSTR(S, N, D) |
#define | MPU_ADDX_IRR_IMM(S, N, D) (S & 0xFFFFFFFF) |
#define | MPU_ADDX_RIR_INSTR(S, N, D) |
#define | MPU_ADDX_RIR_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_ADDX_ISR_INSTR(S, N, D) |
#define | MPU_ADDX_ISR_IMM(S, N, D) (S & 0xFFFFFFFF) |
#define | MPU_ADDX_SIR_INSTR(S, N, D) |
#define | MPU_ADDX_SIR_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_ADDX_IRS_INSTR(S, N, D) |
#define | MPU_ADDX_IRS_IMM(S, N, D) (S & 0xFFFFFFFF) |
#define | MPU_ADDX_RIS_INSTR(S, N, D) |
#define | MPU_ADDX_RIS_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_ADDX_ISS_INSTR(S, N, D) |
#define | MPU_ADDX_ISS_IMM(S, N, D) (S & 0xFFFFFFFF) |
#define | MPU_ADDX_SIS_INSTR(S, N, D) |
#define | MPU_ADDX_SIS_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_AND_RRR(S, N, D) |
#define | MPU_AND_RRS(S, N, D) |
#define | MPU_AND_RSR(S, N, D) |
#define | MPU_AND_RSS(S, N, D) |
#define | MPU_AND_SRR(S, N, D) |
#define | MPU_AND_SRS(S, N, D) |
#define | MPU_AND_SSR(S, N, D) |
#define | MPU_AND_SSS(S, N, D) |
#define | MPU_ANDQ_RIR(S, N, D) |
#define | MPU_ANDQ_IRR(S, N, D) |
#define | MPU_ANDX_RIR_INSTR(S, N, D) |
#define | MPU_ANDX_RIR_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_ANDX_IRR_INSTR(S, N, D) |
#define | MPU_ANDX_IRR_IMM(S, N, D) (S & 0xFFFFFFFF) |
#define | MPU_ANDX_ISR_INSTR(S, N, D) |
#define | MPU_ANDX_ISR_IMM(S, N, D) (S & 0xFFFFFFFF) |
#define | MPU_ANDX_SIR_INSTR(S, N, D) |
#define | MPU_ANDX_SIR_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_ANDX_IRS_INSTR(S, N, D) |
#define | MPU_ANDX_IRS_IMM(S, N, D) (S & 0xFFFFFFFF) |
#define | MPU_ANDX_ISS_INSTR(S, N, D) |
#define | MPU_ANDX_ISS_IMM(S, N, D) (S & 0xFFFFFFFF) |
#define | MPU_ANDX_RIS_INSTR(S, N, D) |
#define | MPU_ANDX_RIS_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_ANDX_SIS_INSTR(S, N, D) |
#define | MPU_ANDX_SIS_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_BA_I(S) (0x60000000 | ((S & ((1 << 16) - 1)) << 0)) |
#define | MPU_BAR_R(S) (0x62000000 | ((S & ((1 << 5) - 1)) << 11)) |
#define | MPU_BAR_S(S) (0x63000000 | ((S & ((1 << 5) - 1)) << 11)) |
#define | MPU_BBC_RII(S, N, D) |
#define | MPU_BBS_RII(S, N, D) |
#define | MPU_BNZ_RI(S, D) |
#define | MPU_BMI_RI(S, D) |
#define | MPU_BPL_RI(S, D) |
#define | MPU_BZ_RI(S, D) |
#define | MPU_DI() (0x40000001) |
#define | MPU_EI() (0x40000003) |
#define | MPU_HALT() (0x40000002) |
#define | MPU_JIR_I(S) (0x60200000 | ((S & ((1 << 16) - 1)) << 0)) |
#define | MPU_JIR_R(S) (0x62200000 | ((S & ((1 << 5) - 1)) << 11)) |
#define | MPU_JIR_S(S) (0x63200000 | ((S & ((1 << 5) - 1)) << 11)) |
#define | MPU_JNT() (0x61000000) |
#define | MPU_JSR_I(S) (0x60400000 | ((S & ((1 << 16) - 1)) << 0)) |
#define | MPU_JSR_R(S) (0x62400000 | ((S & ((1 << 5) - 1)) << 11)) |
#define | MPU_JSR_S(S) (0x63400000 | ((S & ((1 << 5) - 1)) << 11)) |
#define | MPU_LSL_RRR(S, N, D) |
#define | MPU_LSL_RRS(S, N, D) |
#define | MPU_LSL_RSR(S, N, D) |
#define | MPU_LSL_RSS(S, N, D) |
#define | MPU_LSL_SRR(S, N, D) |
#define | MPU_LSL_SRS(S, N, D) |
#define | MPU_LSL_SSR(S, N, D) |
#define | MPU_LSL_SSS(S, N, D) |
#define | MPU_LSLQ_RIR(S, N, D) |
#define | MPU_LSR_RRR(S, N, D) |
#define | MPU_LSR_RRS(S, N, D) |
#define | MPU_LSR_RSR(S, N, D) |
#define | MPU_LSR_RSS(S, N, D) |
#define | MPU_LSR_SRR(S, N, D) |
#define | MPU_LSR_SRS(S, N, D) |
#define | MPU_LSR_SSR(S, N, D) |
#define | MPU_LSR_SSS(S, N, D) |
#define | MPU_LSRQ_RIR(S, N, D) |
#define | MPU_LW_IR(S, D) |
#define | MPU_LW_IS(S, D) |
#define | MPU_LW_RR(S, D) |
#define | MPU_LW_RS(S, D) |
#define | MPU_LW_SR(S, D) |
#define | MPU_LW_SS(S, D) |
#define | MPU_LW_RIR(S, N, D) |
#define | MPU_LW_RIS(S, N, D) |
#define | MPU_LW_SIR(S, N, D) |
#define | MPU_LW_SIS(S, N, D) |
#define | MPU_MOVE_RR(S, D) |
#define | MPU_MOVE_RS(S, D) |
#define | MPU_MOVE_SR(S, D) |
#define | MPU_MOVE_SS(S, D) |
#define | MPU_MOVEQ_IR(S, D) |
#define | MPU_MOVEQ_IS(S, D) |
#define | MPU_MOVEX_IR_INSTR(S, D) (0xC0000081 | ((D & ((1 << 5) - 1)) << 21)) |
#define | MPU_MOVEX_IR_IMM(S, D) (S & 0xFFFFFFFF) |
#define | MPU_MOVEX_IS_INSTR(S, D) (0xC0000481 | ((D & ((1 << 5) - 1)) << 21)) |
#define | MPU_MOVEX_IS_IMM(S, D) (S & 0xFFFFFFFF) |
#define | MPU_NOP() (0x40000000) |
#define | MPU_NOT_RR(S, D) |
#define | MPU_NOT_RS(S, D) |
#define | MPU_NOT_SR(S, D) |
#define | MPU_NOT_SS(S, D) |
#define | MPU_OR_RRR(S, N, D) |
#define | MPU_OR_RRS(S, N, D) |
#define | MPU_OR_RSR(S, N, D) |
#define | MPU_OR_RSS(S, N, D) |
#define | MPU_OR_SRR(S, N, D) |
#define | MPU_OR_SRS(S, N, D) |
#define | MPU_OR_SSR(S, N, D) |
#define | MPU_OR_SSS(S, N, D) |
#define | MPU_ORQ_RIR(S, N, D) |
#define | MPU_ORQ_IRR(S, N, D) |
#define | MPU_ORX_RIR_INSTR(S, N, D) |
#define | MPU_ORX_RIR_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_ORX_IRR_INSTR(S, N, D) |
#define | MPU_ORX_IRR_IMM(S, N, D) (S & 0xFFFFFFFF) |
#define | MPU_ORX_SIR_INSTR(S, N, D) |
#define | MPU_ORX_SIR_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_ORX_ISR_INSTR(S, N, D) |
#define | MPU_ORX_ISR_IMM(S, N, D) (S & 0xFFFFFFFF) |
#define | MPU_ORX_RIS_INSTR(S, N, D) |
#define | MPU_ORX_RIS_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_ORX_IRS_INSTR(S, N, D) |
#define | MPU_ORX_IRS_IMM(S, N, D) (S & 0xFFFFFFFF) |
#define | MPU_ORX_SIS_INSTR(S, N, D) |
#define | MPU_ORX_SIS_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_ORX_ISS_INSTR(S, N, D) |
#define | MPU_ORX_ISS_IMM(S, N, D) (S & 0xFFFFFFFF) |
#define | MPU_RET() (0x63003000) |
#define | MPU_RETI() (0x63602800) |
#define | MPU_RR_IR(S, D) |
#define | MPU_RR_SR(S, D) |
#define | MPU_RW_RI(S, D) |
#define | MPU_RW_RS(S, D) |
#define | MPU_RWQ_II(S, D) |
#define | MPU_RWQ_IS(S, D) |
#define | MPU_RWX_II_INSTR(S, D) (0xD4000000 | ((D & ((1 << 11) - 1)) << 0)) |
#define | MPU_RWX_II_IMM(S, D) (S & 0xFFFFFFFF) |
#define | MPU_RWX_IS_INSTR(S, D) (0xD5000000 | ((D & ((1 << 5) - 1)) << 16)) |
#define | MPU_RWX_IS_IMM(S, D) (S & 0xFFFFFFFF) |
#define | MPU_SUB_RRR(S, N, D) |
#define | MPU_SUB_RRS(S, N, D) |
#define | MPU_SUB_RSR(S, N, D) |
#define | MPU_SUB_RSS(S, N, D) |
#define | MPU_SUB_SRR(S, N, D) |
#define | MPU_SUB_SRS(S, N, D) |
#define | MPU_SUB_SSR(S, N, D) |
#define | MPU_SUB_SSS(S, N, D) |
#define | MPU_SUBQ_RIR(S, N, D) |
#define | MPU_SUBX_RIR_INSTR(S, N, D) |
#define | MPU_SUBX_RIR_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_SUBX_SIR_INSTR(S, N, D) |
#define | MPU_SUBX_SIR_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_SUBX_RIS_INSTR(S, N, D) |
#define | MPU_SUBX_RIS_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_SUBX_SIS_INSTR(S, N, D) |
#define | MPU_SUBX_SIS_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_SW_RI(S, D) |
#define | MPU_SW_SI(S, D) |
#define | MPU_SW_RR(S, D) |
#define | MPU_SW_SR(S, D) |
#define | MPU_SW_RS(S, D) |
#define | MPU_SW_SS(S, D) |
#define | MPU_SW_RIR(S, N, D) |
#define | MPU_SW_SIR(S, N, D) |
#define | MPU_SW_RIS(S, N, D) |
#define | MPU_SW_SIS(S, N, D) |
#define | MPU_SWX_II_INSTR(S, D) (0xE4000000 | ((D & ((1 << 16) - 1)) << 0)) |
#define | MPU_SWX_II_IMM(S, D) (S & 0xFFFFFFFF) |
#define | MPU_SWX_IR_INSTR(S, D) (0xE6000000 | ((D & ((1 << 5) - 1)) << 11)) |
#define | MPU_SWX_IR_IMM(S, D) (S & 0xFFFFFFFF) |
#define | MPU_SWX_IS_INSTR(S, D) (0xE7000000 | ((D & ((1 << 5) - 1)) << 11)) |
#define | MPU_SWX_IS_IMM(S, D) (S & 0xFFFFFFFF) |
#define | MPU_SWX_IIR_INSTR(S, N, D) |
#define | MPU_SWX_IIR_IMM(S, N, D) (S & 0xFFFFFFFF) |
#define | MPU_SWX_IIS_INSTR(S, N, D) |
#define | MPU_SWX_IIS_IMM(S, N, D) (S & 0xFFFFFFFF) |
#define | MPU_XOR_RRR(S, N, D) |
#define | MPU_XOR_RRS(S, N, D) |
#define | MPU_XOR_RSR(S, N, D) |
#define | MPU_XOR_RSS(S, N, D) |
#define | MPU_XOR_SRR(S, N, D) |
#define | MPU_XOR_SRS(S, N, D) |
#define | MPU_XOR_SSR(S, N, D) |
#define | MPU_XOR_SSS(S, N, D) |
#define | MPU_XOR_RR(S, D) |
#define | MPU_XOR_RS(S, D) |
#define | MPU_XOR_SR(S, D) |
#define | MPU_XOR_SS(S, D) |
#define | MPU_XORQ_RIR(S, N, D) |
#define | MPU_XORQ_IRR(S, N, D) |
#define | MPU_XORX_RIR_INSTR(S, N, D) |
#define | MPU_XORX_RIR_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_XORX_IRR_INSTR(S, N, D) |
#define | MPU_XORX_IRR_IMM(S, N, D) (S & 0xFFFFFFFF) |
#define | MPU_XORX_SIR_INSTR(S, N, D) |
#define | MPU_XORX_SIR_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_XORX_ISR_INSTR(S, N, D) |
#define | MPU_XORX_ISR_IMM(S, N, D) (S & 0xFFFFFFFF) |
#define | MPU_XORX_RIS_INSTR(S, N, D) |
#define | MPU_XORX_RIS_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_XORX_IRS_INSTR(S, N, D) |
#define | MPU_XORX_IRS_IMM(S, N, D) (S & 0xFFFFFFFF) |
#define | MPU_XORX_SIS_INSTR(S, N, D) |
#define | MPU_XORX_SIS_IMM(S, N, D) (N & 0xFFFFFFFF) |
#define | MPU_XORX_ISS_INSTR(S, N, D) |
#define | MPU_XORX_ISS_IMM(S, N, D) (S & 0xFFFFFFFF) |
Definition at line 89 of file iop_mpu_macros.h.
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#define MPU_BA_I | ( | S | ) | (0x60000000 | ((S & ((1 << 16) - 1)) << 0)) |
Definition at line 256 of file iop_mpu_macros.h.
#define MPU_BAR_R | ( | S | ) | (0x62000000 | ((S & ((1 << 5) - 1)) << 11)) |
Definition at line 258 of file iop_mpu_macros.h.
#define MPU_BAR_S | ( | S | ) | (0x63000000 | ((S & ((1 << 5) - 1)) << 11)) |
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#define MPU_DI | ( | ) | (0x40000001) |
Definition at line 282 of file iop_mpu_macros.h.
#define MPU_EI | ( | ) | (0x40000003) |
Definition at line 284 of file iop_mpu_macros.h.
#define MPU_HALT | ( | ) | (0x40000002) |
Definition at line 286 of file iop_mpu_macros.h.
#define MPU_I0 (0x10) |
Definition at line 40 of file iop_mpu_macros.h.
#define MPU_I1 (0x11) |
Definition at line 41 of file iop_mpu_macros.h.
#define MPU_I10 (0x1a) |
Definition at line 50 of file iop_mpu_macros.h.
#define MPU_I11 (0x1b) |
Definition at line 51 of file iop_mpu_macros.h.
#define MPU_I12 (0x1c) |
Definition at line 52 of file iop_mpu_macros.h.
#define MPU_I13 (0x1d) |
Definition at line 53 of file iop_mpu_macros.h.
#define MPU_I14 (0x1e) |
Definition at line 54 of file iop_mpu_macros.h.
#define MPU_I15 (0x1f) |
Definition at line 55 of file iop_mpu_macros.h.
#define MPU_I2 (0x12) |
Definition at line 42 of file iop_mpu_macros.h.
#define MPU_I3 (0x13) |
Definition at line 43 of file iop_mpu_macros.h.
#define MPU_I4 (0x14) |
Definition at line 44 of file iop_mpu_macros.h.
#define MPU_I5 (0x15) |
Definition at line 45 of file iop_mpu_macros.h.
#define MPU_I6 (0x16) |
Definition at line 46 of file iop_mpu_macros.h.
#define MPU_I7 (0x17) |
Definition at line 47 of file iop_mpu_macros.h.
#define MPU_I8 (0x18) |
Definition at line 48 of file iop_mpu_macros.h.
#define MPU_I9 (0x19) |
Definition at line 49 of file iop_mpu_macros.h.
#define MPU_IRP (0x5) |
Definition at line 34 of file iop_mpu_macros.h.
#define MPU_JADDR (0x4) |
Definition at line 33 of file iop_mpu_macros.h.
#define MPU_JIR_I | ( | S | ) | (0x60200000 | ((S & ((1 << 16) - 1)) << 0)) |
Definition at line 288 of file iop_mpu_macros.h.
#define MPU_JIR_R | ( | S | ) | (0x62200000 | ((S & ((1 << 5) - 1)) << 11)) |
Definition at line 290 of file iop_mpu_macros.h.
#define MPU_JIR_S | ( | S | ) | (0x63200000 | ((S & ((1 << 5) - 1)) << 11)) |
Definition at line 292 of file iop_mpu_macros.h.
#define MPU_JNT | ( | ) | (0x61000000) |
Definition at line 294 of file iop_mpu_macros.h.
#define MPU_JSR_I | ( | S | ) | (0x60400000 | ((S & ((1 << 16) - 1)) << 0)) |
Definition at line 296 of file iop_mpu_macros.h.
#define MPU_JSR_R | ( | S | ) | (0x62400000 | ((S & ((1 << 5) - 1)) << 11)) |
Definition at line 298 of file iop_mpu_macros.h.
#define MPU_JSR_S | ( | S | ) | (0x63400000 | ((S & ((1 << 5) - 1)) << 11)) |
Definition at line 300 of file iop_mpu_macros.h.
Definition at line 302 of file iop_mpu_macros.h.
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Definition at line 432 of file iop_mpu_macros.h.
Definition at line 430 of file iop_mpu_macros.h.
#define MPU_NOP | ( | ) | (0x40000000) |
Definition at line 434 of file iop_mpu_macros.h.
Definition at line 436 of file iop_mpu_macros.h.
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Definition at line 521 of file iop_mpu_macros.h.
Definition at line 518 of file iop_mpu_macros.h.
#define MPU_P1 (0x1) |
Definition at line 80 of file iop_mpu_macros.h.
#define MPU_P10 (0xa) |
Definition at line 62 of file iop_mpu_macros.h.
#define MPU_P11 (0xb) |
Definition at line 63 of file iop_mpu_macros.h.
#define MPU_P16 (0x10) |
Definition at line 64 of file iop_mpu_macros.h.
#define MPU_P17 (0x12) |
Definition at line 65 of file iop_mpu_macros.h.
#define MPU_P18 (0x12) |
Definition at line 66 of file iop_mpu_macros.h.
#define MPU_P19 (0x13) |
Definition at line 67 of file iop_mpu_macros.h.
#define MPU_P2 (0x2) |
Definition at line 56 of file iop_mpu_macros.h.
#define MPU_P20 (0x14) |
Definition at line 68 of file iop_mpu_macros.h.
#define MPU_P21 (0x15) |
Definition at line 69 of file iop_mpu_macros.h.
#define MPU_P22 (0x16) |
Definition at line 70 of file iop_mpu_macros.h.
#define MPU_P23 (0x17) |
Definition at line 71 of file iop_mpu_macros.h.
#define MPU_P24 (0x18) |
Definition at line 72 of file iop_mpu_macros.h.
#define MPU_P25 (0x19) |
Definition at line 73 of file iop_mpu_macros.h.
#define MPU_P26 (0x1a) |
Definition at line 74 of file iop_mpu_macros.h.
#define MPU_P27 (0x1b) |
Definition at line 75 of file iop_mpu_macros.h.
#define MPU_P28 (0x1c) |
Definition at line 76 of file iop_mpu_macros.h.
#define MPU_P29 (0x1d) |
Definition at line 77 of file iop_mpu_macros.h.
#define MPU_P3 (0x3) |
Definition at line 57 of file iop_mpu_macros.h.
#define MPU_P30 (0x1e) |
Definition at line 78 of file iop_mpu_macros.h.
#define MPU_P31 (0x1f) |
Definition at line 79 of file iop_mpu_macros.h.
#define MPU_P5 (0x5) |
Definition at line 58 of file iop_mpu_macros.h.
#define MPU_P6 (0x6) |
Definition at line 59 of file iop_mpu_macros.h.
#define MPU_P8 (0x8) |
Definition at line 60 of file iop_mpu_macros.h.
#define MPU_P9 (0x9) |
Definition at line 61 of file iop_mpu_macros.h.
#define MPU_PC (0x2) |
Definition at line 31 of file iop_mpu_macros.h.
#define MPU_R0 (0x0) |
Definition at line 15 of file iop_mpu_macros.h.
#define MPU_R1 (0x1) |
Definition at line 16 of file iop_mpu_macros.h.
#define MPU_R10 (0xa) |
Definition at line 25 of file iop_mpu_macros.h.
#define MPU_R11 (0xb) |
Definition at line 26 of file iop_mpu_macros.h.
#define MPU_R12 (0xc) |
Definition at line 27 of file iop_mpu_macros.h.
#define MPU_R13 (0xd) |
Definition at line 28 of file iop_mpu_macros.h.
#define MPU_R14 (0xe) |
Definition at line 29 of file iop_mpu_macros.h.
#define MPU_R15 (0xf) |
Definition at line 30 of file iop_mpu_macros.h.
#define MPU_R2 (0x2) |
Definition at line 17 of file iop_mpu_macros.h.
#define MPU_R3 (0x3) |
Definition at line 18 of file iop_mpu_macros.h.
#define MPU_R4 (0x4) |
Definition at line 19 of file iop_mpu_macros.h.
#define MPU_R5 (0x5) |
Definition at line 20 of file iop_mpu_macros.h.
#define MPU_R6 (0x6) |
Definition at line 21 of file iop_mpu_macros.h.
#define MPU_R7 (0x7) |
Definition at line 22 of file iop_mpu_macros.h.
#define MPU_R8 (0x8) |
Definition at line 23 of file iop_mpu_macros.h.
#define MPU_R9 (0x9) |
Definition at line 24 of file iop_mpu_macros.h.
#define MPU_REGA (0x1) |
Definition at line 81 of file iop_mpu_macros.h.
#define MPU_RET | ( | ) | (0x63003000) |
Definition at line 528 of file iop_mpu_macros.h.
#define MPU_RETI | ( | ) | (0x63602800) |
Definition at line 530 of file iop_mpu_macros.h.
Definition at line 532 of file iop_mpu_macros.h.
Definition at line 535 of file iop_mpu_macros.h.
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Definition at line 550 of file iop_mpu_macros.h.
Definition at line 556 of file iop_mpu_macros.h.
Definition at line 554 of file iop_mpu_macros.h.
#define MPU_SRP (0x6) |
Definition at line 35 of file iop_mpu_macros.h.
Definition at line 558 of file iop_mpu_macros.h.
Definition at line 562 of file iop_mpu_macros.h.
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Definition at line 665 of file iop_mpu_macros.h.
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Definition at line 652 of file iop_mpu_macros.h.
Definition at line 658 of file iop_mpu_macros.h.
Definition at line 656 of file iop_mpu_macros.h.
#define MPU_T0 (0x8) |
Definition at line 36 of file iop_mpu_macros.h.
#define MPU_T1 (0x9) |
Definition at line 37 of file iop_mpu_macros.h.
#define MPU_T2 (0xa) |
Definition at line 38 of file iop_mpu_macros.h.
#define MPU_T3 (0xb) |
Definition at line 39 of file iop_mpu_macros.h.
#define MPU_WSTS (0x3) |
Definition at line 32 of file iop_mpu_macros.h.
Definition at line 702 of file iop_mpu_macros.h.
Definition at line 670 of file iop_mpu_macros.h.
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Definition at line 755 of file iop_mpu_macros.h.