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irq-mb93091.c
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1 /* irq-mb93091.c: MB93091 FPGA interrupt handling
2  *
3  * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4  * Written by David Howells ([email protected])
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version
9  * 2 of the License, or (at your option) any later version.
10  */
11 
12 #include <linux/ptrace.h>
13 #include <linux/errno.h>
14 #include <linux/signal.h>
15 #include <linux/sched.h>
16 #include <linux/ioport.h>
17 #include <linux/interrupt.h>
18 #include <linux/init.h>
19 #include <linux/irq.h>
20 #include <linux/bitops.h>
21 
22 #include <asm/io.h>
23 #include <asm/delay.h>
24 #include <asm/irq.h>
25 #include <asm/irc-regs.h>
26 
27 #define __reg16(ADDR) (*(volatile unsigned short *)(ADDR))
28 
29 #define __get_IMR() ({ __reg16(0xffc00004); })
30 #define __set_IMR(M) do { __reg16(0xffc00004) = (M); wmb(); } while(0)
31 #define __get_IFR() ({ __reg16(0xffc0000c); })
32 #define __clr_IFR(M) do { __reg16(0xffc0000c) = ~(M); wmb(); } while(0)
33 
34 
35 /*
36  * on-motherboard FPGA PIC operations
37  */
38 static void frv_fpga_mask(struct irq_data *d)
39 {
41 
42  imr |= 1 << (d->irq - IRQ_BASE_FPGA);
43 
44  __set_IMR(imr);
45 }
46 
47 static void frv_fpga_ack(struct irq_data *d)
48 {
49  __clr_IFR(1 << (d->irq - IRQ_BASE_FPGA));
50 }
51 
52 static void frv_fpga_mask_ack(struct irq_data *d)
53 {
55 
56  imr |= 1 << (d->irq - IRQ_BASE_FPGA);
57  __set_IMR(imr);
58 
59  __clr_IFR(1 << (d->irq - IRQ_BASE_FPGA));
60 }
61 
62 static void frv_fpga_unmask(struct irq_data *d)
63 {
64  uint16_t imr = __get_IMR();
65 
66  imr &= ~(1 << (d->irq - IRQ_BASE_FPGA));
67 
68  __set_IMR(imr);
69 }
70 
71 static struct irq_chip frv_fpga_pic = {
72  .name = "mb93091",
73  .irq_ack = frv_fpga_ack,
74  .irq_mask = frv_fpga_mask,
75  .irq_mask_ack = frv_fpga_mask_ack,
76  .irq_unmask = frv_fpga_unmask,
77 };
78 
79 /*
80  * FPGA PIC interrupt handler
81  */
82 static irqreturn_t fpga_interrupt(int irq, void *_mask)
83 {
84  uint16_t imr, mask = (unsigned long) _mask;
85 
86  imr = __get_IMR();
87  mask = mask & ~imr & __get_IFR();
88 
89  /* poll all the triggered IRQs */
90  while (mask) {
91  int irq;
92 
93  asm("scan %1,gr0,%0" : "=r"(irq) : "r"(mask));
94  irq = 31 - irq;
95  mask &= ~(1 << irq);
96 
98  }
99 
100  return IRQ_HANDLED;
101 }
102 
103 /*
104  * define an interrupt action for each FPGA PIC output
105  * - use dev_id to indicate the FPGA PIC input to output mappings
106  */
107 static struct irqaction fpga_irq[4] = {
108  [0] = {
109  .handler = fpga_interrupt,
110  .flags = IRQF_DISABLED | IRQF_SHARED,
111  .name = "fpga.0",
112  .dev_id = (void *) 0x0028UL,
113  },
114  [1] = {
115  .handler = fpga_interrupt,
116  .flags = IRQF_DISABLED | IRQF_SHARED,
117  .name = "fpga.1",
118  .dev_id = (void *) 0x0050UL,
119  },
120  [2] = {
121  .handler = fpga_interrupt,
122  .flags = IRQF_DISABLED | IRQF_SHARED,
123  .name = "fpga.2",
124  .dev_id = (void *) 0x1c00UL,
125  },
126  [3] = {
127  .handler = fpga_interrupt,
128  .flags = IRQF_DISABLED | IRQF_SHARED,
129  .name = "fpga.3",
130  .dev_id = (void *) 0x6386UL,
131  }
132 };
133 
134 /*
135  * initialise the motherboard FPGA's PIC
136  */
137 void __init fpga_init(void)
138 {
139  int irq;
140 
141  /* all PIC inputs are all set to be low-level driven, apart from the
142  * NMI button (15) which is fixed at falling-edge
143  */
144  __set_IMR(0x7ffe);
145  __clr_IFR(0x0000);
146 
147  for (irq = IRQ_BASE_FPGA + 1; irq <= IRQ_BASE_FPGA + 14; irq++)
148  irq_set_chip_and_handler(irq, &frv_fpga_pic, handle_level_irq);
149 
150  irq_set_chip_and_handler(IRQ_FPGA_NMI, &frv_fpga_pic, handle_edge_irq);
151 
152  /* the FPGA drives the first four external IRQ inputs on the CPU PIC */
153  setup_irq(IRQ_CPU_EXTERNAL0, &fpga_irq[0]);
154  setup_irq(IRQ_CPU_EXTERNAL1, &fpga_irq[1]);
155  setup_irq(IRQ_CPU_EXTERNAL2, &fpga_irq[2]);
156  setup_irq(IRQ_CPU_EXTERNAL3, &fpga_irq[3]);
157 }