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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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Go to the source code of this file.
Data Structures | |
| struct | ite_config |
Macros | |
| #define | I2C_BASE_ADDR 0x10 |
| #define | DEV_0 0x0 |
| #define | DEV_1 0x10 |
| #define | PRO_LINK 0x0 |
| #define | PRO_DMOD 0x1 |
| #define | DEV_0_DMOD (PRO_DMOD << 0x7) |
| #define | DEV_1_DMOD (DEV_0_DMOD | DEV_1) |
| #define | CHIP2_I2C_ADDR 0x3a |
| #define | AFE_MEM0 0xfb24 |
| #define | MP2_SW_RST 0xf99d |
| #define | MP2IF2_SW_RST 0xf9a4 |
| #define | PADODPU 0xd827 |
| #define | THIRDODPU 0xd828 |
| #define | AGC_O_D 0xd829 |
| #define | EP0_TX_EN 0xdd11 |
| #define | EP0_TX_NAK 0xdd13 |
| #define | EP4_TX_LEN_LSB 0xdd88 |
| #define | EP4_TX_LEN_MSB 0xdd89 |
| #define | EP4_MAX_PKT 0xdd0c |
| #define | EP5_TX_LEN_LSB 0xdd8a |
| #define | EP5_TX_LEN_MSB 0xdd8b |
| #define | EP5_MAX_PKT 0xdd0d |
| #define | IO_MUX_POWER_CLK 0xd800 |
| #define | CLK_O_EN 0xd81a |
| #define | I2C_CLK 0xf103 |
| #define | I2C_CLK_100 0x7 |
| #define | I2C_CLK_400 0x1a |
| #define | D_TPSD_LOCK 0xf5a9 |
| #define | MP2IF2_EN 0xf9a3 |
| #define | MP2IF_SERIAL 0xf985 |
| #define | TSIS_ENABLE 0xf9cd |
| #define | MP2IF2_HALF_PSB 0xf9a5 |
| #define | MP2IF_STOP_EN 0xf9b5 |
| #define | MPEG_FULL_SPEED 0xf990 |
| #define | TOP_HOSTB_SER_MODE 0xd91c |
| #define | PID_RST 0xf992 |
| #define | PID_EN 0xf993 |
| #define | PID_INX_EN 0xf994 |
| #define | PID_INX 0xf995 |
| #define | PID_LSB 0xf996 |
| #define | PID_MSB 0xf997 |
| #define | MP2IF_MPEG_PAR_MODE 0xf986 |
| #define | DCA_UPPER_CHIP 0xf731 |
| #define | DCA_LOWER_CHIP 0xf732 |
| #define | DCA_PLATCH 0xf730 |
| #define | DCA_FPGA_LATCH 0xf778 |
| #define | DCA_STAND_ALONE 0xf73c |
| #define | DCA_ENABLE 0xf776 |
| #define | DVBT_INTEN 0xf41f |
| #define | DVBT_ENABLE 0xf41a |
| #define | HOSTB_DCA_LOWER 0xd91f |
| #define | HOSTB_MPEG_PAR_MODE 0xd91b |
| #define | HOSTB_MPEG_SER_MODE 0xd91c |
| #define | HOSTB_MPEG_SER_DO7 0xd91d |
| #define | HOSTB_DCA_UPPER 0xd91e |
| #define | PADMISCDR2 0xd830 |
| #define | PADMISCDR4 0xd831 |
| #define | PADMISCDR8 0xd832 |
| #define | PADMISCDRSR 0xd833 |
| #define | LOCK3_OUT 0xd8fd |
| #define | GPIOH1_O 0xd8af |
| #define | GPIOH1_EN 0xd8b0 |
| #define | GPIOH1_ON 0xd8b1 |
| #define | GPIOH3_O 0xd8b3 |
| #define | GPIOH3_EN 0xd8b4 |
| #define | GPIOH3_ON 0xd8b5 |
| #define | GPIOH5_O 0xd8bb |
| #define | GPIOH5_EN 0xd8bc |
| #define | GPIOH5_ON 0xd8bd |
| #define | AFE_MEM0 0xfb24 |
| #define | REG_TPSD_TX_MODE 0xf900 |
| #define | REG_TPSD_GI 0xf901 |
| #define | REG_TPSD_HIER 0xf902 |
| #define | REG_TPSD_CONST 0xf903 |
| #define | REG_BW 0xf904 |
| #define | REG_PRIV 0xf905 |
| #define | REG_TPSD_HP_CODE 0xf906 |
| #define | REG_TPSD_LP_CODE 0xf907 |
| #define | MP2IF_SYNC_LK 0xf999 |
| #define | ADC_FREQ 0xf1cd |
| #define | TRIGGER_OFSM 0x0000 |
| #define | COEFF_1_2048 0x0001 |
| #define | XTAL_CLK 0x0025 |
| #define | BFS_FCW 0x0029 |
| #define | RSD_ABORT_PKT_LSB 0x0032 |
| #define | RSD_ABORT_PKT_MSB 0x0033 |
| #define | RSD_BIT_ERR_0_7 0x0034 |
| #define | RSD_BIT_ERR_8_15 0x0035 |
| #define | RSD_BIT_ERR_23_16 0x0036 |
| #define | RSD_BIT_COUNT_LSB 0x0037 |
| #define | RSD_BIT_COUNT_MSB 0x0038 |
| #define | TPSD_LOCK 0x003c |
| #define | TRAINING_MODE 0x0040 |
| #define | ADC_X_2 0x0045 |
| #define | TUNER_ID 0x0046 |
| #define | EMPTY_CHANNEL_STATUS 0x0047 |
| #define | SIGNAL_LEVEL 0x0048 |
| #define | SIGNAL_QUALITY 0x0049 |
| #define | EST_SIGNAL_LEVEL 0x004a |
| #define | FREE_BAND 0x004b |
| #define | SUSPEND_FLAG 0x004c |
| #define | VAR_P_INBAND 0x00f7 |
| #define | IT9137 0x38 |
| #define | IT9135_38 0x38 |
| #define | IT9135_51 0x51 |
| #define | IT9135_52 0x52 |
| #define | IT9135_60 0x60 |
| #define | IT9135_61 0x61 |
| #define | IT9135_62 0x62 |
Enumerations | |
| enum | { CMD_DEMOD_READ = 0, CMD_DEMOD_WRITE, CMD_TUNER_READ, CMD_TUNER_WRITE, CMD_REG_EEPROM_READ, CMD_REG_EEPROM_WRITE, CMD_DATA_READ, CMD_VAR_READ = 8, CMD_VAR_WRITE, CMD_PLATFORM_GET, CMD_PLATFORM_SET, CMD_IP_CACHE, CMD_IP_ADD, CMD_IP_REMOVE, CMD_PID_ADD, CMD_PID_REMOVE, CMD_SIPSI_GET, CMD_SIPSI_MPE_RESET, CMD_H_PID_ADD = 0x15, CMD_H_PID_REMOVE, CMD_ABORT, CMD_IR_GET, CMD_IR_SET, CMD_FW_DOWNLOAD = 0x21, CMD_QUERYINFO, CMD_BOOT, CMD_FW_DOWNLOAD_BEGIN, CMD_FW_DOWNLOAD_END, CMD_RUN_CODE, CMD_SCATTER_READ = 0x28, CMD_SCATTER_WRITE, CMD_GENERIC_READ, CMD_GENERIC_WRITE } |
| enum | { READ_LONG, WRITE_LONG, READ_SHORT, WRITE_SHORT, READ_DATA, WRITE_DATA, WRITE_CMD } |
| enum | { IT9135_AUTO = 0, IT9137_FW, IT9135_V1_FW, IT9135_V2_FW } |
| #define ADC_FREQ 0xf1cd |
Definition at line 146 of file it913x-fe.h.
| #define ADC_X_2 0x0045 |
Definition at line 165 of file it913x-fe.h.
| #define AFE_MEM0 0xfb24 |
Definition at line 134 of file it913x-fe.h.
| #define AFE_MEM0 0xfb24 |
Definition at line 134 of file it913x-fe.h.
| #define AGC_O_D 0xd829 |
Definition at line 70 of file it913x-fe.h.
| #define BFS_FCW 0x0029 |
Definition at line 152 of file it913x-fe.h.
| #define CHIP2_I2C_ADDR 0x3a |
Definition at line 61 of file it913x-fe.h.
| #define CLK_O_EN 0xd81a |
Definition at line 82 of file it913x-fe.h.
| #define COEFF_1_2048 0x0001 |
Definition at line 150 of file it913x-fe.h.
| #define D_TPSD_LOCK 0xf5a9 |
Definition at line 87 of file it913x-fe.h.
| #define DCA_ENABLE 0xf776 |
Definition at line 109 of file it913x-fe.h.
| #define DCA_FPGA_LATCH 0xf778 |
Definition at line 107 of file it913x-fe.h.
| #define DCA_LOWER_CHIP 0xf732 |
Definition at line 105 of file it913x-fe.h.
| #define DCA_PLATCH 0xf730 |
Definition at line 106 of file it913x-fe.h.
| #define DCA_STAND_ALONE 0xf73c |
Definition at line 108 of file it913x-fe.h.
| #define DCA_UPPER_CHIP 0xf731 |
Definition at line 104 of file it913x-fe.h.
| #define DEV_0 0x0 |
Definition at line 55 of file it913x-fe.h.
| #define DEV_0_DMOD (PRO_DMOD << 0x7) |
Definition at line 59 of file it913x-fe.h.
| #define DEV_1 0x10 |
Definition at line 56 of file it913x-fe.h.
| #define DEV_1_DMOD (DEV_0_DMOD | DEV_1) |
Definition at line 60 of file it913x-fe.h.
| #define DVBT_ENABLE 0xf41a |
Definition at line 112 of file it913x-fe.h.
| #define DVBT_INTEN 0xf41f |
Definition at line 111 of file it913x-fe.h.
| #define EMPTY_CHANNEL_STATUS 0x0047 |
Definition at line 167 of file it913x-fe.h.
| #define EP0_TX_EN 0xdd11 |
Definition at line 72 of file it913x-fe.h.
| #define EP0_TX_NAK 0xdd13 |
Definition at line 73 of file it913x-fe.h.
| #define EP4_MAX_PKT 0xdd0c |
Definition at line 76 of file it913x-fe.h.
| #define EP4_TX_LEN_LSB 0xdd88 |
Definition at line 74 of file it913x-fe.h.
| #define EP4_TX_LEN_MSB 0xdd89 |
Definition at line 75 of file it913x-fe.h.
| #define EP5_MAX_PKT 0xdd0d |
Definition at line 79 of file it913x-fe.h.
| #define EP5_TX_LEN_LSB 0xdd8a |
Definition at line 77 of file it913x-fe.h.
| #define EP5_TX_LEN_MSB 0xdd8b |
Definition at line 78 of file it913x-fe.h.
| #define EST_SIGNAL_LEVEL 0x004a |
Definition at line 170 of file it913x-fe.h.
| #define FREE_BAND 0x004b |
Definition at line 171 of file it913x-fe.h.
| #define GPIOH1_EN 0xd8b0 |
Definition at line 125 of file it913x-fe.h.
| #define GPIOH1_O 0xd8af |
Definition at line 124 of file it913x-fe.h.
| #define GPIOH1_ON 0xd8b1 |
Definition at line 126 of file it913x-fe.h.
| #define GPIOH3_EN 0xd8b4 |
Definition at line 128 of file it913x-fe.h.
| #define GPIOH3_O 0xd8b3 |
Definition at line 127 of file it913x-fe.h.
| #define GPIOH3_ON 0xd8b5 |
Definition at line 129 of file it913x-fe.h.
| #define GPIOH5_EN 0xd8bc |
Definition at line 131 of file it913x-fe.h.
| #define GPIOH5_O 0xd8bb |
Definition at line 130 of file it913x-fe.h.
| #define GPIOH5_ON 0xd8bd |
Definition at line 132 of file it913x-fe.h.
| #define HOSTB_DCA_LOWER 0xd91f |
Definition at line 113 of file it913x-fe.h.
| #define HOSTB_DCA_UPPER 0xd91e |
Definition at line 117 of file it913x-fe.h.
| #define HOSTB_MPEG_PAR_MODE 0xd91b |
Definition at line 114 of file it913x-fe.h.
| #define HOSTB_MPEG_SER_DO7 0xd91d |
Definition at line 116 of file it913x-fe.h.
| #define HOSTB_MPEG_SER_MODE 0xd91c |
Definition at line 115 of file it913x-fe.h.
| #define I2C_BASE_ADDR 0x10 |
Definition at line 54 of file it913x-fe.h.
| #define I2C_CLK 0xf103 |
Definition at line 83 of file it913x-fe.h.
| #define I2C_CLK_100 0x7 |
Definition at line 84 of file it913x-fe.h.
| #define I2C_CLK_400 0x1a |
Definition at line 85 of file it913x-fe.h.
| #define IO_MUX_POWER_CLK 0xd800 |
Definition at line 81 of file it913x-fe.h.
| #define IT9135_38 0x38 |
Definition at line 177 of file it913x-fe.h.
| #define IT9135_51 0x51 |
Definition at line 178 of file it913x-fe.h.
| #define IT9135_52 0x52 |
Definition at line 179 of file it913x-fe.h.
| #define IT9135_60 0x60 |
Definition at line 180 of file it913x-fe.h.
| #define IT9135_61 0x61 |
Definition at line 181 of file it913x-fe.h.
| #define IT9135_62 0x62 |
Definition at line 182 of file it913x-fe.h.
| #define IT9137 0x38 |
Definition at line 176 of file it913x-fe.h.
| #define LOCK3_OUT 0xd8fd |
Definition at line 122 of file it913x-fe.h.
| #define MP2_SW_RST 0xf99d |
Definition at line 65 of file it913x-fe.h.
| #define MP2IF2_EN 0xf9a3 |
Definition at line 88 of file it913x-fe.h.
| #define MP2IF2_HALF_PSB 0xf9a5 |
Definition at line 91 of file it913x-fe.h.
| #define MP2IF2_SW_RST 0xf9a4 |
Definition at line 66 of file it913x-fe.h.
| #define MP2IF_MPEG_PAR_MODE 0xf986 |
Definition at line 103 of file it913x-fe.h.
| #define MP2IF_SERIAL 0xf985 |
Definition at line 89 of file it913x-fe.h.
| #define MP2IF_STOP_EN 0xf9b5 |
Definition at line 92 of file it913x-fe.h.
| #define MP2IF_SYNC_LK 0xf999 |
Definition at line 145 of file it913x-fe.h.
| #define MPEG_FULL_SPEED 0xf990 |
Definition at line 93 of file it913x-fe.h.
| #define PADMISCDR2 0xd830 |
Definition at line 118 of file it913x-fe.h.
| #define PADMISCDR4 0xd831 |
Definition at line 119 of file it913x-fe.h.
| #define PADMISCDR8 0xd832 |
Definition at line 120 of file it913x-fe.h.
| #define PADMISCDRSR 0xd833 |
Definition at line 121 of file it913x-fe.h.
| #define PADODPU 0xd827 |
Definition at line 68 of file it913x-fe.h.
| #define PID_EN 0xf993 |
Definition at line 97 of file it913x-fe.h.
| #define PID_INX 0xf995 |
Definition at line 99 of file it913x-fe.h.
| #define PID_INX_EN 0xf994 |
Definition at line 98 of file it913x-fe.h.
| #define PID_LSB 0xf996 |
Definition at line 100 of file it913x-fe.h.
| #define PID_MSB 0xf997 |
Definition at line 101 of file it913x-fe.h.
| #define PID_RST 0xf992 |
Definition at line 96 of file it913x-fe.h.
| #define PRO_DMOD 0x1 |
Definition at line 58 of file it913x-fe.h.
| #define PRO_LINK 0x0 |
Definition at line 57 of file it913x-fe.h.
| #define REG_BW 0xf904 |
Definition at line 140 of file it913x-fe.h.
| #define REG_PRIV 0xf905 |
Definition at line 141 of file it913x-fe.h.
| #define REG_TPSD_CONST 0xf903 |
Definition at line 139 of file it913x-fe.h.
| #define REG_TPSD_GI 0xf901 |
Definition at line 137 of file it913x-fe.h.
| #define REG_TPSD_HIER 0xf902 |
Definition at line 138 of file it913x-fe.h.
| #define REG_TPSD_HP_CODE 0xf906 |
Definition at line 142 of file it913x-fe.h.
| #define REG_TPSD_LP_CODE 0xf907 |
Definition at line 143 of file it913x-fe.h.
| #define REG_TPSD_TX_MODE 0xf900 |
Definition at line 136 of file it913x-fe.h.
| #define RSD_ABORT_PKT_LSB 0x0032 |
Definition at line 155 of file it913x-fe.h.
| #define RSD_ABORT_PKT_MSB 0x0033 |
Definition at line 156 of file it913x-fe.h.
| #define RSD_BIT_COUNT_LSB 0x0037 |
Definition at line 160 of file it913x-fe.h.
| #define RSD_BIT_COUNT_MSB 0x0038 |
Definition at line 161 of file it913x-fe.h.
| #define RSD_BIT_ERR_0_7 0x0034 |
Definition at line 157 of file it913x-fe.h.
| #define RSD_BIT_ERR_23_16 0x0036 |
Definition at line 159 of file it913x-fe.h.
| #define RSD_BIT_ERR_8_15 0x0035 |
Definition at line 158 of file it913x-fe.h.
| #define SIGNAL_LEVEL 0x0048 |
Definition at line 168 of file it913x-fe.h.
| #define SIGNAL_QUALITY 0x0049 |
Definition at line 169 of file it913x-fe.h.
| #define SUSPEND_FLAG 0x004c |
Definition at line 172 of file it913x-fe.h.
| #define THIRDODPU 0xd828 |
Definition at line 69 of file it913x-fe.h.
| #define TOP_HOSTB_SER_MODE 0xd91c |
Definition at line 94 of file it913x-fe.h.
| #define TPSD_LOCK 0x003c |
Definition at line 163 of file it913x-fe.h.
| #define TRAINING_MODE 0x0040 |
Definition at line 164 of file it913x-fe.h.
| #define TRIGGER_OFSM 0x0000 |
Definition at line 148 of file it913x-fe.h.
| #define TSIS_ENABLE 0xf9cd |
Definition at line 90 of file it913x-fe.h.
| #define TUNER_ID 0x0046 |
Definition at line 166 of file it913x-fe.h.
| #define VAR_P_INBAND 0x00f7 |
Definition at line 173 of file it913x-fe.h.
| #define XTAL_CLK 0x0025 |
Definition at line 151 of file it913x-fe.h.
| anonymous enum |
Definition at line 184 of file it913x-fe.h.
| anonymous enum |
Definition at line 220 of file it913x-fe.h.
| anonymous enum |
Definition at line 230 of file it913x-fe.h.
1.8.2