|
Linux Kernel
3.7.1
|
All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
|
Linux Kernel
3.7.1
|
#include <linux/spinlock.h>#include <linux/interrupt.h>#include <linux/pci.h>#include <linux/dma-mapping.h>#include <linux/delay.h>#include <linux/highmem.h>#include <linux/memstick.h>#include <linux/slab.h>#include <linux/module.h>Go to the source code of this file.
Data Structures | |
| struct | jmb38x_ms_host |
| struct | jmb38x_ms |
Macros | |
| #define | DRIVER_NAME "jmb38x_ms" |
| #define | BLOCK_COUNT_MASK 0xffff0000 |
| #define | BLOCK_SIZE_MASK 0x00000fff |
| #define | DMA_CONTROL_ENABLE 0x00000001 |
| #define | TPC_DATA_SEL 0x00008000 |
| #define | TPC_DIR 0x00004000 |
| #define | TPC_WAIT_INT 0x00002000 |
| #define | TPC_GET_INT 0x00000800 |
| #define | TPC_CODE_SZ_MASK 0x00000700 |
| #define | TPC_DATA_SZ_MASK 0x00000007 |
| #define | HOST_CONTROL_TDELAY_EN 0x00040000 |
| #define | HOST_CONTROL_HW_OC_P 0x00010000 |
| #define | HOST_CONTROL_RESET_REQ 0x00008000 |
| #define | HOST_CONTROL_REI 0x00004000 |
| #define | HOST_CONTROL_LED 0x00000400 |
| #define | HOST_CONTROL_FAST_CLK 0x00000200 |
| #define | HOST_CONTROL_RESET 0x00000100 |
| #define | HOST_CONTROL_POWER_EN 0x00000080 |
| #define | HOST_CONTROL_CLOCK_EN 0x00000040 |
| #define | HOST_CONTROL_REO 0x00000008 |
| #define | HOST_CONTROL_IF_SHIFT 4 |
| #define | HOST_CONTROL_IF_SERIAL 0x0 |
| #define | HOST_CONTROL_IF_PAR4 0x1 |
| #define | HOST_CONTROL_IF_PAR8 0x3 |
| #define | STATUS_BUSY 0x00080000 |
| #define | STATUS_MS_DAT7 0x00040000 |
| #define | STATUS_MS_DAT6 0x00020000 |
| #define | STATUS_MS_DAT5 0x00010000 |
| #define | STATUS_MS_DAT4 0x00008000 |
| #define | STATUS_MS_DAT3 0x00004000 |
| #define | STATUS_MS_DAT2 0x00002000 |
| #define | STATUS_MS_DAT1 0x00001000 |
| #define | STATUS_MS_DAT0 0x00000800 |
| #define | STATUS_HAS_MEDIA 0x00000400 |
| #define | STATUS_FIFO_EMPTY 0x00000200 |
| #define | STATUS_FIFO_FULL 0x00000100 |
| #define | STATUS_MS_CED 0x00000080 |
| #define | STATUS_MS_ERR 0x00000040 |
| #define | STATUS_MS_BRQ 0x00000020 |
| #define | STATUS_MS_CNK 0x00000001 |
| #define | INT_STATUS_TPC_ERR 0x00080000 |
| #define | INT_STATUS_CRC_ERR 0x00040000 |
| #define | INT_STATUS_TIMER_TO 0x00020000 |
| #define | INT_STATUS_HSK_TO 0x00010000 |
| #define | INT_STATUS_ANY_ERR 0x00008000 |
| #define | INT_STATUS_FIFO_WRDY 0x00000080 |
| #define | INT_STATUS_FIFO_RRDY 0x00000040 |
| #define | INT_STATUS_MEDIA_OUT 0x00000010 |
| #define | INT_STATUS_MEDIA_IN 0x00000008 |
| #define | INT_STATUS_DMA_BOUNDARY 0x00000004 |
| #define | INT_STATUS_EOTRAN 0x00000002 |
| #define | INT_STATUS_EOTPC 0x00000001 |
| #define | INT_STATUS_ALL 0x000f801f |
| #define | PAD_OUTPUT_ENABLE_MS 0x0F3F |
| #define | PAD_PU_PD_OFF 0x7FFF0000 |
| #define | PAD_PU_PD_ON_MS_SOCK0 0x5f8f0000 |
| #define | PAD_PU_PD_ON_MS_SOCK1 0x0f0f0000 |
| #define | CLOCK_CONTROL_BY_MMIO 0x00000008 |
| #define | CLOCK_CONTROL_40MHZ 0x00000001 |
| #define | CLOCK_CONTROL_50MHZ 0x00000002 |
| #define | CLOCK_CONTROL_60MHZ 0x00000010 |
| #define | CLOCK_CONTROL_62_5MHZ 0x00000004 |
| #define | CLOCK_CONTROL_OFF 0x00000000 |
| #define | PCI_CTL_CLOCK_DLY_ADDR 0x000000b0 |
| #define | PCI_PMOS0_CONTROL 0xae |
| #define | PMOS0_ENABLE 0x01 |
| #define | PMOS0_OVERCURRENT_LEVEL_2_4V 0x06 |
| #define | PMOS0_EN_OVERCURRENT_DEBOUNCE 0x40 |
| #define | PMOS0_SW_LED_POLARITY_ENABLE 0x80 |
| #define | PMOS0_ACTIVE_BITS |
| #define | PCI_PMOS1_CONTROL 0xbd |
| #define | PMOS1_ACTIVE_BITS 0x4a |
| #define | PCI_CLOCK_CTL 0xb9 |
| #define | jmb38x_ms_suspend NULL |
| #define | jmb38x_ms_resume NULL |
Enumerations | |
| enum | { DMA_ADDRESS = 0x00, BLOCK = 0x04, DMA_CONTROL = 0x08, TPC_P0 = 0x0c, TPC_P1 = 0x10, TPC = 0x14, HOST_CONTROL = 0x18, DATA = 0x1c, STATUS = 0x20, INT_STATUS = 0x24, INT_STATUS_ENABLE = 0x28, INT_SIGNAL_ENABLE = 0x2c, TIMER = 0x30, TIMER_CONTROL = 0x34, PAD_OUTPUT_ENABLE = 0x38, PAD_PU_PD = 0x3c, CLOCK_DELAY = 0x40, ADMA_ADDRESS = 0x44, CLOCK_CONTROL = 0x48, LED_CONTROL = 0x4c, VERSION = 0x50 } |
| enum | { CMD_READY = 0x01, FIFO_READY = 0x02, REG_DATA = 0x04, DMA_DATA = 0x08 } |
Functions | |
| module_param (no_dma, bool, 0644) | |
| MODULE_AUTHOR ("Alex Dubov") | |
| MODULE_DESCRIPTION ("JMicron jmb38x MemoryStick driver") | |
| MODULE_LICENSE ("GPL") | |
| MODULE_DEVICE_TABLE (pci, jmb38x_ms_id_tbl) | |
| module_init (jmb38x_ms_init) | |
| module_exit (jmb38x_ms_exit) | |
| #define BLOCK_COUNT_MASK 0xffff0000 |
Definition at line 75 of file jmb38x_ms.c.
| #define BLOCK_SIZE_MASK 0x00000fff |
Definition at line 76 of file jmb38x_ms.c.
| #define CLOCK_CONTROL_40MHZ 0x00000001 |
Definition at line 142 of file jmb38x_ms.c.
| #define CLOCK_CONTROL_50MHZ 0x00000002 |
Definition at line 143 of file jmb38x_ms.c.
| #define CLOCK_CONTROL_60MHZ 0x00000010 |
Definition at line 144 of file jmb38x_ms.c.
| #define CLOCK_CONTROL_62_5MHZ 0x00000004 |
Definition at line 145 of file jmb38x_ms.c.
| #define CLOCK_CONTROL_BY_MMIO 0x00000008 |
Definition at line 141 of file jmb38x_ms.c.
| #define CLOCK_CONTROL_OFF 0x00000000 |
Definition at line 146 of file jmb38x_ms.c.
| #define DMA_CONTROL_ENABLE 0x00000001 |
Definition at line 78 of file jmb38x_ms.c.
| #define DRIVER_NAME "jmb38x_ms" |
Definition at line 22 of file jmb38x_ms.c.
| #define HOST_CONTROL_CLOCK_EN 0x00000040 |
Definition at line 95 of file jmb38x_ms.c.
| #define HOST_CONTROL_FAST_CLK 0x00000200 |
Definition at line 92 of file jmb38x_ms.c.
| #define HOST_CONTROL_HW_OC_P 0x00010000 |
Definition at line 88 of file jmb38x_ms.c.
| #define HOST_CONTROL_IF_PAR4 0x1 |
Definition at line 100 of file jmb38x_ms.c.
| #define HOST_CONTROL_IF_PAR8 0x3 |
Definition at line 101 of file jmb38x_ms.c.
| #define HOST_CONTROL_IF_SERIAL 0x0 |
Definition at line 99 of file jmb38x_ms.c.
| #define HOST_CONTROL_IF_SHIFT 4 |
Definition at line 97 of file jmb38x_ms.c.
| #define HOST_CONTROL_LED 0x00000400 |
Definition at line 91 of file jmb38x_ms.c.
| #define HOST_CONTROL_POWER_EN 0x00000080 |
Definition at line 94 of file jmb38x_ms.c.
| #define HOST_CONTROL_REI 0x00004000 |
Definition at line 90 of file jmb38x_ms.c.
| #define HOST_CONTROL_REO 0x00000008 |
Definition at line 96 of file jmb38x_ms.c.
| #define HOST_CONTROL_RESET 0x00000100 |
Definition at line 93 of file jmb38x_ms.c.
| #define HOST_CONTROL_RESET_REQ 0x00008000 |
Definition at line 89 of file jmb38x_ms.c.
| #define HOST_CONTROL_TDELAY_EN 0x00040000 |
Definition at line 87 of file jmb38x_ms.c.
| #define INT_STATUS_ALL 0x000f801f |
Definition at line 133 of file jmb38x_ms.c.
| #define INT_STATUS_ANY_ERR 0x00008000 |
Definition at line 124 of file jmb38x_ms.c.
| #define INT_STATUS_CRC_ERR 0x00040000 |
Definition at line 121 of file jmb38x_ms.c.
| #define INT_STATUS_DMA_BOUNDARY 0x00000004 |
Definition at line 129 of file jmb38x_ms.c.
| #define INT_STATUS_EOTPC 0x00000001 |
Definition at line 131 of file jmb38x_ms.c.
| #define INT_STATUS_EOTRAN 0x00000002 |
Definition at line 130 of file jmb38x_ms.c.
| #define INT_STATUS_FIFO_RRDY 0x00000040 |
Definition at line 126 of file jmb38x_ms.c.
| #define INT_STATUS_FIFO_WRDY 0x00000080 |
Definition at line 125 of file jmb38x_ms.c.
| #define INT_STATUS_HSK_TO 0x00010000 |
Definition at line 123 of file jmb38x_ms.c.
| #define INT_STATUS_MEDIA_IN 0x00000008 |
Definition at line 128 of file jmb38x_ms.c.
| #define INT_STATUS_MEDIA_OUT 0x00000010 |
Definition at line 127 of file jmb38x_ms.c.
| #define INT_STATUS_TIMER_TO 0x00020000 |
Definition at line 122 of file jmb38x_ms.c.
| #define INT_STATUS_TPC_ERR 0x00080000 |
Definition at line 120 of file jmb38x_ms.c.
| #define jmb38x_ms_resume NULL |
Definition at line 850 of file jmb38x_ms.c.
| #define jmb38x_ms_suspend NULL |
Definition at line 849 of file jmb38x_ms.c.
| #define PAD_OUTPUT_ENABLE_MS 0x0F3F |
Definition at line 135 of file jmb38x_ms.c.
| #define PAD_PU_PD_OFF 0x7FFF0000 |
Definition at line 137 of file jmb38x_ms.c.
| #define PAD_PU_PD_ON_MS_SOCK0 0x5f8f0000 |
Definition at line 138 of file jmb38x_ms.c.
| #define PAD_PU_PD_ON_MS_SOCK1 0x0f0f0000 |
Definition at line 139 of file jmb38x_ms.c.
| #define PCI_CLOCK_CTL 0xb9 |
Definition at line 771 of file jmb38x_ms.c.
| #define PCI_CTL_CLOCK_DLY_ADDR 0x000000b0 |
Definition at line 148 of file jmb38x_ms.c.
| #define PCI_PMOS0_CONTROL 0xae |
Definition at line 762 of file jmb38x_ms.c.
| #define PCI_PMOS1_CONTROL 0xbd |
Definition at line 769 of file jmb38x_ms.c.
| #define PMOS0_ACTIVE_BITS |
Definition at line 767 of file jmb38x_ms.c.
| #define PMOS0_EN_OVERCURRENT_DEBOUNCE 0x40 |
Definition at line 765 of file jmb38x_ms.c.
| #define PMOS0_ENABLE 0x01 |
Definition at line 763 of file jmb38x_ms.c.
| #define PMOS0_OVERCURRENT_LEVEL_2_4V 0x06 |
Definition at line 764 of file jmb38x_ms.c.
| #define PMOS0_SW_LED_POLARITY_ENABLE 0x80 |
Definition at line 766 of file jmb38x_ms.c.
| #define PMOS1_ACTIVE_BITS 0x4a |
Definition at line 770 of file jmb38x_ms.c.
| #define STATUS_BUSY 0x00080000 |
Definition at line 103 of file jmb38x_ms.c.
| #define STATUS_FIFO_EMPTY 0x00000200 |
Definition at line 113 of file jmb38x_ms.c.
| #define STATUS_FIFO_FULL 0x00000100 |
Definition at line 114 of file jmb38x_ms.c.
| #define STATUS_HAS_MEDIA 0x00000400 |
Definition at line 112 of file jmb38x_ms.c.
| #define STATUS_MS_BRQ 0x00000020 |
Definition at line 117 of file jmb38x_ms.c.
| #define STATUS_MS_CED 0x00000080 |
Definition at line 115 of file jmb38x_ms.c.
| #define STATUS_MS_CNK 0x00000001 |
Definition at line 118 of file jmb38x_ms.c.
| #define STATUS_MS_DAT0 0x00000800 |
Definition at line 111 of file jmb38x_ms.c.
| #define STATUS_MS_DAT1 0x00001000 |
Definition at line 110 of file jmb38x_ms.c.
| #define STATUS_MS_DAT2 0x00002000 |
Definition at line 109 of file jmb38x_ms.c.
| #define STATUS_MS_DAT3 0x00004000 |
Definition at line 108 of file jmb38x_ms.c.
| #define STATUS_MS_DAT4 0x00008000 |
Definition at line 107 of file jmb38x_ms.c.
| #define STATUS_MS_DAT5 0x00010000 |
Definition at line 106 of file jmb38x_ms.c.
| #define STATUS_MS_DAT6 0x00020000 |
Definition at line 105 of file jmb38x_ms.c.
| #define STATUS_MS_DAT7 0x00040000 |
Definition at line 104 of file jmb38x_ms.c.
| #define STATUS_MS_ERR 0x00000040 |
Definition at line 116 of file jmb38x_ms.c.
| #define TPC_CODE_SZ_MASK 0x00000700 |
Definition at line 84 of file jmb38x_ms.c.
| #define TPC_DATA_SEL 0x00008000 |
Definition at line 80 of file jmb38x_ms.c.
| #define TPC_DATA_SZ_MASK 0x00000007 |
Definition at line 85 of file jmb38x_ms.c.
| #define TPC_DIR 0x00004000 |
Definition at line 81 of file jmb38x_ms.c.
| #define TPC_GET_INT 0x00000800 |
Definition at line 83 of file jmb38x_ms.c.
| #define TPC_WAIT_INT 0x00002000 |
Definition at line 82 of file jmb38x_ms.c.
| anonymous enum |
Definition at line 27 of file jmb38x_ms.c.
| anonymous enum |
Definition at line 150 of file jmb38x_ms.c.
| MODULE_AUTHOR | ( | "Alex Dubov" | ) |
| MODULE_DESCRIPTION | ( | "JMicron jmb38x MemoryStick driver" | ) |
| MODULE_DEVICE_TABLE | ( | pci | , |
| jmb38x_ms_id_tbl | |||
| ) |
| module_exit | ( | jmb38x_ms_exit | ) |
| module_init | ( | jmb38x_ms_init | ) |
| MODULE_LICENSE | ( | "GPL" | ) |
| module_param | ( | no_dma | , |
| bool | , | ||
| 0644 | |||
| ) |
1.8.2