17 #include <linux/kernel.h>
18 #include <linux/module.h>
20 #include <linux/slab.h>
30 #define JZ_REG_NAND_CTRL 0x50
31 #define JZ_REG_NAND_ECC_CTRL 0x100
32 #define JZ_REG_NAND_DATA 0x104
33 #define JZ_REG_NAND_PAR0 0x108
34 #define JZ_REG_NAND_PAR1 0x10C
35 #define JZ_REG_NAND_PAR2 0x110
36 #define JZ_REG_NAND_IRQ_STAT 0x114
37 #define JZ_REG_NAND_IRQ_CTRL 0x118
38 #define JZ_REG_NAND_ERR(x) (0x11C + ((x) << 2))
40 #define JZ_NAND_ECC_CTRL_PAR_READY BIT(4)
41 #define JZ_NAND_ECC_CTRL_ENCODING BIT(3)
42 #define JZ_NAND_ECC_CTRL_RS BIT(2)
43 #define JZ_NAND_ECC_CTRL_RESET BIT(1)
44 #define JZ_NAND_ECC_CTRL_ENABLE BIT(0)
46 #define JZ_NAND_STATUS_ERR_COUNT (BIT(31) | BIT(30) | BIT(29))
47 #define JZ_NAND_STATUS_PAD_FINISH BIT(4)
48 #define JZ_NAND_STATUS_DEC_FINISH BIT(3)
49 #define JZ_NAND_STATUS_ENC_FINISH BIT(2)
50 #define JZ_NAND_STATUS_UNCOR_ERROR BIT(1)
51 #define JZ_NAND_STATUS_ERROR BIT(0)
53 #define JZ_NAND_CTRL_ENABLE_CHIP(x) BIT((x) << 1)
54 #define JZ_NAND_CTRL_ASSERT_CHIP(x) BIT(((x) << 1) + 1)
55 #define JZ_NAND_CTRL_ASSERT_CHIP_MASK 0xaa
57 #define JZ_NAND_MEM_CMD_OFFSET 0x08000
58 #define JZ_NAND_MEM_ADDR_OFFSET 0x10000
81 static void jz_nand_select_chip(
struct mtd_info *
mtd,
int chipnr)
83 struct jz_nand *nand = mtd_to_jz_nand(mtd);
94 banknr = nand->
banks[chipnr] - 1;
103 static void jz_nand_cmd_ctrl(
struct mtd_info *mtd,
int dat,
unsigned int ctrl)
105 struct jz_nand *nand = mtd_to_jz_nand(mtd);
131 static int jz_nand_dev_ready(
struct mtd_info *mtd)
133 struct jz_nand *nand = mtd_to_jz_nand(mtd);
137 static void jz_nand_hwctl(
struct mtd_info *mtd,
int mode)
139 struct jz_nand *nand = mtd_to_jz_nand(mtd);
165 static int jz_nand_calculate_ecc_rs(
struct mtd_info *mtd,
const uint8_t *dat,
168 struct jz_nand *nand = mtd_to_jz_nand(mtd);
172 static uint8_t empty_block_ecc[] = {0xcd, 0x9d, 0x90, 0x58, 0xf4,
173 0x8b, 0xff, 0xb7, 0x6f};
189 for (i = 0; i < 9; ++
i)
194 if (
memcmp(ecc_code, empty_block_ecc, 9) == 0)
195 memset(ecc_code, 0xff, 9);
205 index += (index >> 3);
208 data |= dat[index+1] << 8;
210 mask ^= (data >>
offset) & 0x1ff;
211 data &= ~(0x1ff <<
offset);
214 dat[
index] = data & 0xff;
215 dat[index+1] = (data >> 8) & 0xff;
221 struct jz_nand *nand = mtd_to_jz_nand(mtd);
222 int i, error_count,
index;
225 unsigned int timeout = 1000;
230 for (i = 1; i < 9; ++
i)
234 t &= dat[nand->
chip.ecc.size / 2];
235 t &= dat[nand->
chip.ecc.size - 1];
238 for (i = 1; i < nand->
chip.ecc.size - 1; ++
i)
245 for (i = 0; i < 9; ++
i)
269 for (i = 0; i < error_count; ++
i) {
271 index = ((error >> 16) & 0x1ff) - 1;
272 if (index >= 0 && index < 512)
273 jz_nand_correct_data(dat, index, error & 0x1ff);
289 dev_err(&pdev->
dev,
"Failed to get platform %s memory\n", name);
297 dev_err(&pdev->
dev,
"Failed to request %s memory region\n", name);
302 *base =
ioremap((*res)->start, resource_size(*res));
304 dev_err(&pdev->
dev,
"Failed to ioremap %s memory region\n", name);
306 goto err_release_mem;
319 static inline void jz_nand_iounmap_resource(
struct resource *res,
void __iomem *base)
336 sprintf(gpio_name,
"NAND CS%d", bank);
340 "Failed to request %s gpio %d: %d\n",
341 gpio_name, gpio, ret);
346 sprintf(res_name,
"bank%d", bank);
347 ret = jz_nand_ioremap_resource(pdev, res_name,
351 goto notfound_resource;
377 || *nand_dev_id != chip->
read_byte(mtd)) {
387 dev_info(&pdev->
dev,
"Found chip %i on bank %i\n", chipnr, bank);
391 dev_info(&pdev->
dev,
"No chip found on bank %i\n", bank);
395 jz_nand_iounmap_resource(nand->
bank_mem[bank - 1],
410 size_t chipnr, bank_idx;
411 uint8_t nand_maf_id = 0, nand_dev_id = 0;
415 dev_err(&pdev->
dev,
"Failed to allocate device structure.\n");
419 ret = jz_nand_ioremap_resource(pdev,
"mmio", &nand->
mem, &nand->
base);
423 if (pdata && gpio_is_valid(pdata->
busy_gpio)) {
427 "Failed to request busy gpio %d: %d\n",
429 goto err_iounmap_mmio;
437 mtd->
name =
"jz4740-nand";
439 chip->
ecc.hwctl = jz_nand_hwctl;
440 chip->
ecc.calculate = jz_nand_calculate_ecc_rs;
441 chip->
ecc.correct = jz_nand_correct_ecc_rs;
443 chip->
ecc.size = 512;
445 chip->
ecc.strength = 4;
454 if (pdata && gpio_is_valid(pdata->
busy_gpio))
458 platform_set_drvdata(pdev, nand);
475 bank = pdata ? pdata->
banks[bank_idx] : bank_idx ^ 1;
478 if (bank > JZ_NAND_NUM_BANKS) {
480 "Skipping non-existing bank: %d\n", bank);
487 nand->
banks[chipnr] = bank;
488 if (jz_nand_detect_bank(pdev, nand, bank, chipnr,
489 &nand_maf_id, &nand_dev_id) == 0)
492 nand->
banks[chipnr] = 0;
507 goto err_unclaim_banks;
515 dev_err(&pdev->
dev,
"Failed to add mtd device\n");
516 goto err_nand_release;
519 dev_info(&pdev->
dev,
"Successfully registered JZ4740 NAND driver\n");
527 unsigned char bank = nand->
banks[chipnr];
529 jz_nand_iounmap_resource(nand->
bank_mem[bank - 1],
534 if (pdata && gpio_is_valid(pdata->
busy_gpio))
536 platform_set_drvdata(pdev,
NULL);
538 jz_nand_iounmap_resource(nand->
mem, nand->
base);
546 struct jz_nand *nand = platform_get_drvdata(pdev);
556 unsigned char bank = nand->
banks[
i];
558 jz_nand_iounmap_resource(nand->
bank_mem[bank - 1],
563 if (pdata && gpio_is_valid(pdata->
busy_gpio))
566 jz_nand_iounmap_resource(nand->
mem, nand->
base);
568 platform_set_drvdata(pdev,
NULL);
575 .probe = jz_nand_probe,
578 .name =
"jz4740-nand",