Linux Kernel
3.7.1
|
#include <linux/ioport.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/gpio.h>
#include <asm/mach-jz4740/jz4740_nand.h>
Go to the source code of this file.
Data Structures | |
struct | jz_nand |
Functions | |
module_platform_driver (jz_nand_driver) | |
MODULE_LICENSE ("GPL") | |
MODULE_AUTHOR ("Lars-Peter Clausen <[email protected]>") | |
MODULE_DESCRIPTION ("NAND controller driver for JZ4740 SoC") | |
MODULE_ALIAS ("platform:jz4740-nand") | |
Definition at line 54 of file jz4740_nand.c.
#define JZ_NAND_CTRL_ASSERT_CHIP_MASK 0xaa |
Definition at line 55 of file jz4740_nand.c.
Definition at line 53 of file jz4740_nand.c.
#define JZ_NAND_ECC_CTRL_ENABLE BIT(0) |
Definition at line 44 of file jz4740_nand.c.
#define JZ_NAND_ECC_CTRL_ENCODING BIT(3) |
Definition at line 41 of file jz4740_nand.c.
#define JZ_NAND_ECC_CTRL_PAR_READY BIT(4) |
Definition at line 40 of file jz4740_nand.c.
#define JZ_NAND_ECC_CTRL_RESET BIT(1) |
Definition at line 43 of file jz4740_nand.c.
#define JZ_NAND_ECC_CTRL_RS BIT(2) |
Definition at line 42 of file jz4740_nand.c.
#define JZ_NAND_MEM_ADDR_OFFSET 0x10000 |
Definition at line 58 of file jz4740_nand.c.
#define JZ_NAND_MEM_CMD_OFFSET 0x08000 |
Definition at line 57 of file jz4740_nand.c.
#define JZ_NAND_STATUS_DEC_FINISH BIT(3) |
Definition at line 48 of file jz4740_nand.c.
#define JZ_NAND_STATUS_ENC_FINISH BIT(2) |
Definition at line 49 of file jz4740_nand.c.
Definition at line 46 of file jz4740_nand.c.
#define JZ_NAND_STATUS_ERROR BIT(0) |
Definition at line 51 of file jz4740_nand.c.
#define JZ_NAND_STATUS_PAD_FINISH BIT(4) |
Definition at line 47 of file jz4740_nand.c.
#define JZ_NAND_STATUS_UNCOR_ERROR BIT(1) |
Definition at line 50 of file jz4740_nand.c.
#define JZ_REG_NAND_CTRL 0x50 |
Definition at line 30 of file jz4740_nand.c.
#define JZ_REG_NAND_DATA 0x104 |
Definition at line 32 of file jz4740_nand.c.
#define JZ_REG_NAND_ECC_CTRL 0x100 |
Definition at line 31 of file jz4740_nand.c.
#define JZ_REG_NAND_ERR | ( | x | ) | (0x11C + ((x) << 2)) |
Definition at line 38 of file jz4740_nand.c.
#define JZ_REG_NAND_IRQ_CTRL 0x118 |
Definition at line 37 of file jz4740_nand.c.
#define JZ_REG_NAND_IRQ_STAT 0x114 |
Definition at line 36 of file jz4740_nand.c.
#define JZ_REG_NAND_PAR0 0x108 |
Definition at line 33 of file jz4740_nand.c.
#define JZ_REG_NAND_PAR1 0x10C |
Definition at line 34 of file jz4740_nand.c.
#define JZ_REG_NAND_PAR2 0x110 |
Definition at line 35 of file jz4740_nand.c.
MODULE_ALIAS | ( | "platform:jz4740-nand" | ) |
MODULE_AUTHOR | ( | "Lars-Peter Clausen <[email protected]>" | ) |
MODULE_DESCRIPTION | ( | "NAND controller driver for JZ4740 SoC" | ) |
MODULE_LICENSE | ( | "GPL" | ) |
module_platform_driver | ( | jz_nand_driver | ) |