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Macros
lm49453.h File Reference
#include <linux/bitops.h>

Go to the source code of this file.

Macros

#define LM49453_P0_PMC_SETUP_REG   0x00
 
#define LM49453_P0_PLL_CLK_SEL1_REG   0x01
 
#define LM49453_P0_PLL_CLK_SEL2_REG   0x02
 
#define LM49453_P0_PMC_CLK_DIV_REG   0x03
 
#define LM49453_P0_HSDET_CLK_DIV_REG   0x04
 
#define LM49453_P0_DMIC_CLK_DIV_REG   0x05
 
#define LM49453_P0_ADC_CLK_DIV_REG   0x06
 
#define LM49453_P0_DAC_OT_CLK_DIV_REG   0x07
 
#define LM49453_P0_PLL_HF_M_REG   0x08
 
#define LM49453_P0_PLL_LF_M_REG   0x09
 
#define LM49453_P0_PLL_NL_REG   0x0A
 
#define LM49453_P0_PLL_N_MODL_REG   0x0B
 
#define LM49453_P0_PLL_N_MODH_REG   0x0C
 
#define LM49453_P0_PLL_P1_REG   0x0D
 
#define LM49453_P0_PLL_P2_REG   0x0E
 
#define LM49453_P0_FLL_REF_FREQL_REG   0x0F
 
#define LM49453_P0_FLL_REF_FREQH_REG   0x10
 
#define LM49453_P0_VCO_TARGETLL_REG   0x11
 
#define LM49453_P0_VCO_TARGETLH_REG   0x12
 
#define LM49453_P0_VCO_TARGETHL_REG   0x13
 
#define LM49453_P0_VCO_TARGETHH_REG   0x14
 
#define LM49453_P0_PLL_CONFIG_REG   0x15
 
#define LM49453_P0_DAC_CLK_SEL_REG   0x16
 
#define LM49453_P0_DAC_HP_CLK_DIV_REG   0x17
 
#define LM49453_P0_MICL_REG   0x20
 
#define LM49453_P0_MICR_REG   0x21
 
#define LM49453_P0_EP_REG   0x24
 
#define LM49453_P0_DIS_PKVL_FB_REG   0x25
 
#define LM49453_P0_ANALOG_MIXER_ADC_REG   0x2E
 
#define LM49453_P0_ADC_DSP_REG   0x30
 
#define LM49453_P0_DAC_DSP_REG   0x31
 
#define LM49453_P0_ADC_FX_ENABLES_REG   0x33
 
#define LM49453_P0_GPIO1_REG   0x38
 
#define LM49453_P0_GPIO2_REG   0x39
 
#define LM49453_P0_GPIO3_REG   0x3A
 
#define LM49453_P0_HAP_CTL_REG   0x3B
 
#define LM49453_P0_HAP_FREQ_PROG_LEFTL_REG   0x3C
 
#define LM49453_P0_HAP_FREQ_PROG_LEFTH_REG   0x3D
 
#define LM49453_P0_HAP_FREQ_PROG_RIGHTL_REG   0x3E
 
#define LM49453_P0_HAP_FREQ_PROG_RIGHTH_REG   0x3F
 
#define LM49453_P0_DMIX_CLK_SEL_REG   0x40
 
#define LM49453_P0_PORT1_RX_LVL1_REG   0x41
 
#define LM49453_P0_PORT1_RX_LVL2_REG   0x42
 
#define LM49453_P0_PORT2_RX_LVL_REG   0x43
 
#define LM49453_P0_PORT1_TX1_REG   0x44
 
#define LM49453_P0_PORT1_TX2_REG   0x45
 
#define LM49453_P0_PORT1_TX3_REG   0x46
 
#define LM49453_P0_PORT1_TX4_REG   0x47
 
#define LM49453_P0_PORT1_TX5_REG   0x48
 
#define LM49453_P0_PORT1_TX6_REG   0x49
 
#define LM49453_P0_PORT1_TX7_REG   0x4A
 
#define LM49453_P0_PORT1_TX8_REG   0x4B
 
#define LM49453_P0_PORT2_TX1_REG   0x4C
 
#define LM49453_P0_PORT2_TX2_REG   0x4D
 
#define LM49453_P0_STN_SEL_REG   0x4F
 
#define LM49453_P0_DACHPL1_REG   0x50
 
#define LM49453_P0_DACHPL2_REG   0x51
 
#define LM49453_P0_DACHPR1_REG   0x52
 
#define LM49453_P0_DACHPR2_REG   0x53
 
#define LM49453_P0_DACLOL1_REG   0x54
 
#define LM49453_P0_DACLOL2_REG   0x55
 
#define LM49453_P0_DACLOR1_REG   0x56
 
#define LM49453_P0_DACLOR2_REG   0x57
 
#define LM49453_P0_DACLSL1_REG   0x58
 
#define LM49453_P0_DACLSL2_REG   0x59
 
#define LM49453_P0_DACLSR1_REG   0x5A
 
#define LM49453_P0_DACLSR2_REG   0x5B
 
#define LM49453_P0_DACHAL1_REG   0x5C
 
#define LM49453_P0_DACHAL2_REG   0x5D
 
#define LM49453_P0_DACHAR1_REG   0x5E
 
#define LM49453_P0_DACHAR2_REG   0x5F
 
#define LM49453_P0_AUDIO_PORT1_BASIC_REG   0x60
 
#define LM49453_P0_AUDIO_PORT1_CLK_GEN1_REG   0x61
 
#define LM49453_P0_AUDIO_PORT1_CLK_GEN2_REG   0x62
 
#define LM49453_P0_AUDIO_PORT1_CLK_GEN3_REG   0x63
 
#define LM49453_P0_AUDIO_PORT1_SYNC_RATE_REG   0x64
 
#define LM49453_P0_AUDIO_PORT1_SYNC_SDO_SETUP_REG   0x65
 
#define LM49453_P0_AUDIO_PORT1_DATA_WIDTH_REG   0x66
 
#define LM49453_P0_AUDIO_PORT1_RX_MSB_REG   0x67
 
#define LM49453_P0_AUDIO_PORT1_TX_MSB_REG   0x68
 
#define LM49453_P0_AUDIO_PORT1_TDM_CHANNELS_REG   0x69
 
#define LM49453_P0_AUDIO_PORT2_BASIC_REG   0x6A
 
#define LM49453_P0_AUDIO_PORT2_CLK_GEN1_REG   0x6B
 
#define LM49453_P0_AUDIO_PORT2_CLK_GEN2_REG   0x6C
 
#define LM49453_P0_AUDIO_PORT2_SYNC_GEN_REG   0x6D
 
#define LM49453_P0_AUDIO_PORT2_DATA_WIDTH_REG   0x6E
 
#define LM49453_P0_AUDIO_PORT2_RX_MODE_REG   0x6F
 
#define LM49453_P0_AUDIO_PORT2_TX_MODE_REG   0x70
 
#define LM49453_P0_PORT1_SR_LSB_REG   0x79
 
#define LM49453_P0_PORT1_SR_MSB_REG   0x7A
 
#define LM49453_P0_PORT2_SR_LSB_REG   0x7B
 
#define LM49453_P0_PORT2_SR_MSB_REG   0x7C
 
#define LM49453_P0_HPF_REG   0x80
 
#define LM49453_P0_ADC_ALC1_REG   0x82
 
#define LM49453_P0_ADC_ALC2_REG   0x83
 
#define LM49453_P0_ADC_ALC3_REG   0x84
 
#define LM49453_P0_ADC_ALC4_REG   0x85
 
#define LM49453_P0_ADC_ALC5_REG   0x86
 
#define LM49453_P0_ADC_ALC6_REG   0x87
 
#define LM49453_P0_ADC_ALC7_REG   0x88
 
#define LM49453_P0_ADC_ALC8_REG   0x89
 
#define LM49453_P0_DMIC1_LEVELL_REG   0x8A
 
#define LM49453_P0_DMIC1_LEVELR_REG   0x8B
 
#define LM49453_P0_DMIC2_LEVELL_REG   0x8C
 
#define LM49453_P0_DMIC2_LEVELR_REG   0x8D
 
#define LM49453_P0_ADC_LEVELL_REG   0x8E
 
#define LM49453_P0_ADC_LEVELR_REG   0x8F
 
#define LM49453_P0_DAC_HP_LEVELL_REG   0x90
 
#define LM49453_P0_DAC_HP_LEVELR_REG   0x91
 
#define LM49453_P0_DAC_LO_LEVELL_REG   0x92
 
#define LM49453_P0_DAC_LO_LEVELR_REG   0x93
 
#define LM49453_P0_DAC_LS_LEVELL_REG   0x94
 
#define LM49453_P0_DAC_LS_LEVELR_REG   0x95
 
#define LM49453_P0_DAC_HA_LEVELL_REG   0x96
 
#define LM49453_P0_DAC_HA_LEVELR_REG   0x97
 
#define LM49453_P0_SOFT_MUTE_REG   0x98
 
#define LM49453_P0_DMIC_MUTE_CFG_REG   0x99
 
#define LM49453_P0_ADC_MUTE_CFG_REG   0x9A
 
#define LM49453_P0_DAC_MUTE_CFG_REG   0x9B
 
#define LM49453_P0_DIGITAL_MIC1_CONFIG_REG   0xB0
 
#define LM49453_P0_DIGITAL_MIC1_DATA_DELAYL_REG   0xB1
 
#define LM49453_P0_DIGITAL_MIC1_DATA_DELAYR_REG   0xB2
 
#define LM49453_P0_DIGITAL_MIC2_CONFIG_REG   0xB3
 
#define LM49453_P0_DIGITAL_MIC2_DATA_DELAYL_REG   0xB4
 
#define LM49453_P0_DIGITAL_MIC2_DATA_DELAYR_REG   0xB5
 
#define LM49453_P0_ADC_DECIMATOR_REG   0xB6
 
#define LM49453_P0_DAC_CONFIG_REG   0xB7
 
#define LM49453_P0_STN_VOL_ADCL_REG   0xB8
 
#define LM49453_P0_STN_VOL_ADCR_REG   0xB9
 
#define LM49453_P0_STN_VOL_DMIC1L_REG   0xBA
 
#define LM49453_P0_STN_VOL_DMIC1R_REG   0xBB
 
#define LM49453_P0_STN_VOL_DMIC2L_REG   0xBC
 
#define LM49453_P0_STN_VOL_DMIC2R_REG   0xBD
 
#define LM49453_P0_ADC_DEC_CLIP_REG   0xC2
 
#define LM49453_P0_ADC_HPF_CLIP_REG   0xC3
 
#define LM49453_P0_ADC_LVL_CLIP_REG   0xC4
 
#define LM49453_P0_DAC_LVL_CLIP_REG   0xC5
 
#define LM49453_P0_ADC_LVLMONL_REG   0xC8
 
#define LM49453_P0_ADC_LVLMONR_REG   0xC9
 
#define LM49453_P0_ADC_ALCMONL_REG   0xCA
 
#define LM49453_P0_ADC_ALCMONR_REG   0xCB
 
#define LM49453_P0_ADC_MUTED_REG   0xCC
 
#define LM49453_P0_DAC_MUTED_REG   0xCD
 
#define LM49453_P0_HSD_PPB_LONG_CNT_LIMITL_REG   0xD0
 
#define LM49453_P0_HSD_PPB_LONG_CNT_LIMITR_REG   0xD1
 
#define LM49453_P0_HSD_PIN3_4_EX_LOOP_CNT_LIMITL_REG   0xD2
 
#define LM49453_P0_HSD_PIN3_4_EX_LOOP_CNT_LIMITH_REG   0xD3
 
#define LM49453_P0_HSD_TIMEOUT1_REG   0xD4
 
#define LM49453_P0_HSD_TIMEOUT2_REG   0xD5
 
#define LM49453_P0_HSD_TIMEOUT3_REG   0xD6
 
#define LM49453_P0_HSD_PIN3_4_CFG_REG   0xD7
 
#define LM49453_P0_HSD_IRQ1_REG   0xD8
 
#define LM49453_P0_HSD_IRQ2_REG   0xD9
 
#define LM49453_P0_HSD_IRQ3_REG   0xDA
 
#define LM49453_P0_HSD_IRQ4_REG   0xDB
 
#define LM49453_P0_HSD_IRQ_MASK1_REG   0xDC
 
#define LM49453_P0_HSD_IRQ_MASK2_REG   0xDD
 
#define LM49453_P0_HSD_IRQ_MASK3_REG   0xDE
 
#define LM49453_P0_HSD_R_HPLL_REG   0xE0
 
#define LM49453_P0_HSD_R_HPLH_REG   0xE1
 
#define LM49453_P0_HSD_R_HPLU_REG   0xE2
 
#define LM49453_P0_HSD_R_HPRL_REG   0xE3
 
#define LM49453_P0_HSD_R_HPRH_REG   0xE4
 
#define LM49453_P0_HSD_R_HPRU_REG   0xE5
 
#define LM49453_P0_HSD_VEL_L_FINALL_REG   0xE6
 
#define LM49453_P0_HSD_VEL_L_FINALH_REG   0xE7
 
#define LM49453_P0_HSD_VEL_L_FINALU_REG   0xE8
 
#define LM49453_P0_HSD_RO_FINALL_REG   0xE9
 
#define LM49453_P0_HSD_RO_FINALH_REG   0xEA
 
#define LM49453_P0_HSD_RO_FINALU_REG   0xEB
 
#define LM49453_P0_HSD_VMIC_BIAS_FINALL_REG   0xEC
 
#define LM49453_P0_HSD_VMIC_BIAS_FINALH_REG   0xED
 
#define LM49453_P0_HSD_VMIC_BIAS_FINALU_REG   0xEE
 
#define LM49453_P0_HSD_PIN_CONFIG_REG   0xEF
 
#define LM49453_P0_HSD_PLUG_DETECT_BB_IRQ_STATUS1_REG   0xF1
 
#define LM49453_P0_HSD_PLUG_DETECT_BB_IRQ_STATUS2_REG   0xF2
 
#define LM49453_P0_HSD_PLUG_DETECT_BB_IRQ_STATUS3_REG   0xF3
 
#define LM49453_P0_HSD_PLUG_DETECT_BB_IRQ_STATEL_REG   0xF4
 
#define LM49453_P0_HSD_PLUG_DETECT_BB_IRQ_STATEH_REG   0xF5
 
#define LM49453_P0_PULL_CONFIG1_REG   0xF8
 
#define LM49453_P0_PULL_CONFIG2_REG   0xF9
 
#define LM49453_P0_PULL_CONFIG3_REG   0xFA
 
#define LM49453_P0_RESET_REG   0xFE
 
#define LM49453_PAGE_REG   0xFF
 
#define LM49453_MAX_REGISTER   (0xFF+1)
 
#define LM49453_PMC_SETUP_CHIP_EN   (BIT(1)|BIT(0))
 
#define LM49453_PMC_SETUP_PLL_EN   BIT(2)
 
#define LM49453_PMC_SETUP_PLL_P2_EN   BIT(3)
 
#define LM49453_PMC_SETUP_PLL_FLL   BIT(4)
 
#define LM49453_PMC_SETUP_MCLK_OVER   BIT(5)
 
#define LM49453_PMC_SETUP_RTC_CLK_OVER   BIT(6)
 
#define LM49453_PMC_SETUP_CHIP_ACTIVE   BIT(7)
 
#define LM49453_CHIP_EN_SHUTDOWN   0x00
 
#define LM49453_CHIP_EN   0x01
 
#define LM49453_CHIP_EN_HSD_DETECT   0x02
 
#define LM49453_CHIP_EN_INVALID_HSD   0x03
 
#define LM49453_CLK_SEL1_MCLK_SEL   0x11
 
#define LM49453_CLK_SEL1_RTC_SEL   0x11
 
#define LM49453_CLK_SEL1_PORT1_SEL   0x10
 
#define LM49453_CLK_SEL1_PORT2_SEL   0x11
 
#define LM49453_CLK_SEL2_ADC_CLK_SEL   0x38
 
#define LM49453_FLL_REF_FREQ_VAL   0x8ca0001
 
#define LM49453_VCO_TARGET_VAL   0x8ca0001
 
#define LM49453_ADC_DSP_ADC_MUTEL   BIT(0)
 
#define LM49453_ADC_DSP_ADC_MUTER   BIT(1)
 
#define LM49453_ADC_DSP_DMIC1_MUTEL   BIT(2)
 
#define LM49453_ADC_DSP_DMIC1_MUTER   BIT(3)
 
#define LM49453_ADC_DSP_DMIC2_MUTEL   BIT(4)
 
#define LM49453_ADC_DSP_DMIC2_MUTER   BIT(5)
 
#define LM49453_ADC_DSP_MUTE_ALL   0x3F
 
#define LM49453_DAC_DSP_MUTE_ALL   0xFF
 
#define LM49453_AUDIO_PORT1_BASIC_FMT_MASK   (BIT(4)|BIT(3))
 
#define LM49453_AUDIO_PORT1_BASIC_CLK_MS   BIT(3)
 
#define LM49453_AUDIO_PORT1_BASIC_SYNC_MS   BIT(4)
 
#define LM49453_RESET_REG_RST   BIT(0)
 
#define LM49453_PAGE0_SELECT   0x0
 
#define LM49453_PAGE1_SELECT   0x1
 
#define LM49453_JACK_DISABLE   0x00
 
#define LM49453_JACK_CONFIG1   0x01
 
#define LM49453_JACK_CONFIG2   0x02
 
#define LM49453_JACK_CONFIG3   0x03
 
#define LM49453_JACK_CONFIG4   0x04
 
#define LM49453_JACK_CONFIG5   0x05
 
#define LM49453_P1_SIDETONE_SA0L_REG   0x80
 
#define LM49453_P1_SIDETONE_SA0H_REG   0x81
 
#define LM49453_P1_SIDETONE_SAB0U_REG   0x82
 
#define LM49453_P1_SIDETONE_SB0L_REG   0x83
 
#define LM49453_P1_SIDETONE_SB0H_REG   0x84
 
#define LM49453_P1_SIDETONE_SH0L_REG   0x85
 
#define LM49453_P1_SIDETONE_SH0H_REG   0x86
 
#define LM49453_P1_SIDETONE_SH0U_REG   0x87
 
#define LM49453_P1_SIDETONE_SA1L_REG   0x88
 
#define LM49453_P1_SIDETONE_SA1H_REG   0x89
 
#define LM49453_P1_SIDETONE_SAB1U_REG   0x8A
 
#define LM49453_P1_SIDETONE_SB1L_REG   0x8B
 
#define LM49453_P1_SIDETONE_SB1H_REG   0x8C
 
#define LM49453_P1_SIDETONE_SH1L_REG   0x8D
 
#define LM49453_P1_SIDETONE_SH1H_REG   0x8E
 
#define LM49453_P1_SIDETONE_SH1U_REG   0x8F
 
#define LM49453_P1_SIDETONE_SA2L_REG   0x90
 
#define LM49453_P1_SIDETONE_SA2H_REG   0x91
 
#define LM49453_P1_SIDETONE_SAB2U_REG   0x92
 
#define LM49453_P1_SIDETONE_SB2L_REG   0x93
 
#define LM49453_P1_SIDETONE_SB2H_REG   0x94
 
#define LM49453_P1_SIDETONE_SH2L_REG   0x95
 
#define LM49453_P1_SIDETONE_SH2H_REG   0x96
 
#define LM49453_P1_SIDETONE_SH2U_REG   0x97
 
#define LM49453_P1_SIDETONE_SA3L_REG   0x98
 
#define LM49453_P1_SIDETONE_SA3H_REG   0x99
 
#define LM49453_P1_SIDETONE_SAB3U_REG   0x9A
 
#define LM49453_P1_SIDETONE_SB3L_REG   0x9B
 
#define LM49453_P1_SIDETONE_SB3H_REG   0x9C
 
#define LM49453_P1_SIDETONE_SH3L_REG   0x9D
 
#define LM49453_P1_SIDETONE_SH3H_REG   0x9E
 
#define LM49453_P1_SIDETONE_SH3U_REG   0x9F
 
#define LM49453_P1_SIDETONE_SA4L_REG   0xA0
 
#define LM49453_P1_SIDETONE_SA4H_REG   0xA1
 
#define LM49453_P1_SIDETONE_SAB4U_REG   0xA2
 
#define LM49453_P1_SIDETONE_SB4L_REG   0xA3
 
#define LM49453_P1_SIDETONE_SB4H_REG   0xA4
 
#define LM49453_P1_SIDETONE_SH4L_REG   0xA5
 
#define LM49453_P1_SIDETONE_SH4H_REG   0xA6
 
#define LM49453_P1_SIDETONE_SH4U_REG   0xA7
 
#define LM49453_P1_SIDETONE_SA5L_REG   0xA8
 
#define LM49453_P1_SIDETONE_SA5H_REG   0xA9
 
#define LM49453_P1_SIDETONE_SAB5U_REG   0xAA
 
#define LM49453_P1_SIDETONE_SB5L_REG   0xAB
 
#define LM49453_P1_SIDETONE_SB5H_REG   0xAC
 
#define LM49453_P1_SIDETONE_SH5L_REG   0xAD
 
#define LM49453_P1_SIDETONE_SH5H_REG   0xAE
 
#define LM49453_P1_SIDETONE_SH5U_REG   0xAF
 
#define LM49453_P1_CP_CONFIG1_REG   0xB0
 
#define LM49453_P1_CP_CONFIG2_REG   0xB1
 
#define LM49453_P1_CP_CONFIG3_REG   0xB2
 
#define LM49453_P1_CP_CONFIG4_REG   0xB3
 
#define LM49453_P1_CP_LA_VTH1L_REG   0xB4
 
#define LM49453_P1_CP_LA_VTH1M_REG   0xB5
 
#define LM49453_P1_CP_LA_VTH2L_REG   0xB6
 
#define LM49453_P1_CP_LA_VTH2M_REG   0xB7
 
#define LM49453_P1_CP_LA_VTH3L_REG   0xB8
 
#define LM49453_P1_CP_LA_VTH3H_REG   0xB9
 
#define LM49453_P1_CP_CLK_DIV_REG   0xBA
 
#define LM49453_P1_DAC_CHOP_REG   0xC0
 
#define LM49453_CLK_SRC_MCLK   1
 

Macro Definition Documentation

#define LM49453_ADC_DSP_ADC_MUTEL   BIT(0)

Definition at line 280 of file lm49453.h.

#define LM49453_ADC_DSP_ADC_MUTER   BIT(1)

Definition at line 281 of file lm49453.h.

#define LM49453_ADC_DSP_DMIC1_MUTEL   BIT(2)

Definition at line 282 of file lm49453.h.

#define LM49453_ADC_DSP_DMIC1_MUTER   BIT(3)

Definition at line 283 of file lm49453.h.

#define LM49453_ADC_DSP_DMIC2_MUTEL   BIT(4)

Definition at line 284 of file lm49453.h.

#define LM49453_ADC_DSP_DMIC2_MUTER   BIT(5)

Definition at line 285 of file lm49453.h.

#define LM49453_ADC_DSP_MUTE_ALL   0x3F

Definition at line 286 of file lm49453.h.

#define LM49453_AUDIO_PORT1_BASIC_CLK_MS   BIT(3)

Definition at line 293 of file lm49453.h.

#define LM49453_AUDIO_PORT1_BASIC_FMT_MASK   (BIT(4)|BIT(3))

Definition at line 292 of file lm49453.h.

#define LM49453_AUDIO_PORT1_BASIC_SYNC_MS   BIT(4)

Definition at line 294 of file lm49453.h.

#define LM49453_CHIP_EN   0x01

Definition at line 260 of file lm49453.h.

#define LM49453_CHIP_EN_HSD_DETECT   0x02

Definition at line 261 of file lm49453.h.

#define LM49453_CHIP_EN_INVALID_HSD   0x03

Definition at line 262 of file lm49453.h.

#define LM49453_CHIP_EN_SHUTDOWN   0x00

Definition at line 259 of file lm49453.h.

#define LM49453_CLK_SEL1_MCLK_SEL   0x11

Definition at line 265 of file lm49453.h.

#define LM49453_CLK_SEL1_PORT1_SEL   0x10

Definition at line 267 of file lm49453.h.

#define LM49453_CLK_SEL1_PORT2_SEL   0x11

Definition at line 268 of file lm49453.h.

#define LM49453_CLK_SEL1_RTC_SEL   0x11

Definition at line 266 of file lm49453.h.

#define LM49453_CLK_SEL2_ADC_CLK_SEL   0x38

Definition at line 271 of file lm49453.h.

#define LM49453_CLK_SRC_MCLK   1

Definition at line 379 of file lm49453.h.

#define LM49453_DAC_DSP_MUTE_ALL   0xFF

Definition at line 289 of file lm49453.h.

#define LM49453_FLL_REF_FREQ_VAL   0x8ca0001

Definition at line 274 of file lm49453.h.

#define LM49453_JACK_CONFIG1   0x01

Definition at line 305 of file lm49453.h.

#define LM49453_JACK_CONFIG2   0x02

Definition at line 306 of file lm49453.h.

#define LM49453_JACK_CONFIG3   0x03

Definition at line 307 of file lm49453.h.

#define LM49453_JACK_CONFIG4   0x04

Definition at line 308 of file lm49453.h.

#define LM49453_JACK_CONFIG5   0x05

Definition at line 309 of file lm49453.h.

#define LM49453_JACK_DISABLE   0x00

Definition at line 304 of file lm49453.h.

#define LM49453_MAX_REGISTER   (0xFF+1)

Definition at line 247 of file lm49453.h.

#define LM49453_P0_ADC_ALC1_REG   0x82

Definition at line 133 of file lm49453.h.

#define LM49453_P0_ADC_ALC2_REG   0x83

Definition at line 134 of file lm49453.h.

#define LM49453_P0_ADC_ALC3_REG   0x84

Definition at line 135 of file lm49453.h.

#define LM49453_P0_ADC_ALC4_REG   0x85

Definition at line 136 of file lm49453.h.

#define LM49453_P0_ADC_ALC5_REG   0x86

Definition at line 137 of file lm49453.h.

#define LM49453_P0_ADC_ALC6_REG   0x87

Definition at line 138 of file lm49453.h.

#define LM49453_P0_ADC_ALC7_REG   0x88

Definition at line 139 of file lm49453.h.

#define LM49453_P0_ADC_ALC8_REG   0x89

Definition at line 140 of file lm49453.h.

#define LM49453_P0_ADC_ALCMONL_REG   0xCA

Definition at line 193 of file lm49453.h.

#define LM49453_P0_ADC_ALCMONR_REG   0xCB

Definition at line 194 of file lm49453.h.

#define LM49453_P0_ADC_CLK_DIV_REG   0x06

Definition at line 24 of file lm49453.h.

#define LM49453_P0_ADC_DEC_CLIP_REG   0xC2

Definition at line 185 of file lm49453.h.

#define LM49453_P0_ADC_DECIMATOR_REG   0xB6

Definition at line 171 of file lm49453.h.

#define LM49453_P0_ADC_DSP_REG   0x30

Definition at line 53 of file lm49453.h.

#define LM49453_P0_ADC_FX_ENABLES_REG   0x33

Definition at line 57 of file lm49453.h.

#define LM49453_P0_ADC_HPF_CLIP_REG   0xC3

Definition at line 186 of file lm49453.h.

#define LM49453_P0_ADC_LEVELL_REG   0x8E

Definition at line 145 of file lm49453.h.

#define LM49453_P0_ADC_LEVELR_REG   0x8F

Definition at line 146 of file lm49453.h.

#define LM49453_P0_ADC_LVL_CLIP_REG   0xC4

Definition at line 187 of file lm49453.h.

#define LM49453_P0_ADC_LVLMONL_REG   0xC8

Definition at line 191 of file lm49453.h.

#define LM49453_P0_ADC_LVLMONR_REG   0xC9

Definition at line 192 of file lm49453.h.

#define LM49453_P0_ADC_MUTE_CFG_REG   0x9A

Definition at line 157 of file lm49453.h.

#define LM49453_P0_ADC_MUTED_REG   0xCC

Definition at line 195 of file lm49453.h.

#define LM49453_P0_ANALOG_MIXER_ADC_REG   0x2E

Definition at line 50 of file lm49453.h.

#define LM49453_P0_AUDIO_PORT1_BASIC_REG   0x60

Definition at line 103 of file lm49453.h.

#define LM49453_P0_AUDIO_PORT1_CLK_GEN1_REG   0x61

Definition at line 104 of file lm49453.h.

#define LM49453_P0_AUDIO_PORT1_CLK_GEN2_REG   0x62

Definition at line 105 of file lm49453.h.

#define LM49453_P0_AUDIO_PORT1_CLK_GEN3_REG   0x63

Definition at line 106 of file lm49453.h.

#define LM49453_P0_AUDIO_PORT1_DATA_WIDTH_REG   0x66

Definition at line 109 of file lm49453.h.

#define LM49453_P0_AUDIO_PORT1_RX_MSB_REG   0x67

Definition at line 110 of file lm49453.h.

#define LM49453_P0_AUDIO_PORT1_SYNC_RATE_REG   0x64

Definition at line 107 of file lm49453.h.

#define LM49453_P0_AUDIO_PORT1_SYNC_SDO_SETUP_REG   0x65

Definition at line 108 of file lm49453.h.

#define LM49453_P0_AUDIO_PORT1_TDM_CHANNELS_REG   0x69

Definition at line 112 of file lm49453.h.

#define LM49453_P0_AUDIO_PORT1_TX_MSB_REG   0x68

Definition at line 111 of file lm49453.h.

#define LM49453_P0_AUDIO_PORT2_BASIC_REG   0x6A

Definition at line 115 of file lm49453.h.

#define LM49453_P0_AUDIO_PORT2_CLK_GEN1_REG   0x6B

Definition at line 116 of file lm49453.h.

#define LM49453_P0_AUDIO_PORT2_CLK_GEN2_REG   0x6C

Definition at line 117 of file lm49453.h.

#define LM49453_P0_AUDIO_PORT2_DATA_WIDTH_REG   0x6E

Definition at line 119 of file lm49453.h.

#define LM49453_P0_AUDIO_PORT2_RX_MODE_REG   0x6F

Definition at line 120 of file lm49453.h.

#define LM49453_P0_AUDIO_PORT2_SYNC_GEN_REG   0x6D

Definition at line 118 of file lm49453.h.

#define LM49453_P0_AUDIO_PORT2_TX_MODE_REG   0x70

Definition at line 121 of file lm49453.h.

#define LM49453_P0_DAC_CLK_SEL_REG   0x16

Definition at line 40 of file lm49453.h.

#define LM49453_P0_DAC_CONFIG_REG   0xB7

Definition at line 174 of file lm49453.h.

#define LM49453_P0_DAC_DSP_REG   0x31

Definition at line 54 of file lm49453.h.

#define LM49453_P0_DAC_HA_LEVELL_REG   0x96

Definition at line 153 of file lm49453.h.

#define LM49453_P0_DAC_HA_LEVELR_REG   0x97

Definition at line 154 of file lm49453.h.

#define LM49453_P0_DAC_HP_CLK_DIV_REG   0x17

Definition at line 41 of file lm49453.h.

#define LM49453_P0_DAC_HP_LEVELL_REG   0x90

Definition at line 147 of file lm49453.h.

#define LM49453_P0_DAC_HP_LEVELR_REG   0x91

Definition at line 148 of file lm49453.h.

#define LM49453_P0_DAC_LO_LEVELL_REG   0x92

Definition at line 149 of file lm49453.h.

#define LM49453_P0_DAC_LO_LEVELR_REG   0x93

Definition at line 150 of file lm49453.h.

#define LM49453_P0_DAC_LS_LEVELL_REG   0x94

Definition at line 151 of file lm49453.h.

#define LM49453_P0_DAC_LS_LEVELR_REG   0x95

Definition at line 152 of file lm49453.h.

#define LM49453_P0_DAC_LVL_CLIP_REG   0xC5

Definition at line 188 of file lm49453.h.

#define LM49453_P0_DAC_MUTE_CFG_REG   0x9B

Definition at line 158 of file lm49453.h.

#define LM49453_P0_DAC_MUTED_REG   0xCD

Definition at line 196 of file lm49453.h.

#define LM49453_P0_DAC_OT_CLK_DIV_REG   0x07

Definition at line 25 of file lm49453.h.

#define LM49453_P0_DACHAL1_REG   0x5C

Definition at line 97 of file lm49453.h.

#define LM49453_P0_DACHAL2_REG   0x5D

Definition at line 98 of file lm49453.h.

#define LM49453_P0_DACHAR1_REG   0x5E

Definition at line 99 of file lm49453.h.

#define LM49453_P0_DACHAR2_REG   0x5F

Definition at line 100 of file lm49453.h.

#define LM49453_P0_DACHPL1_REG   0x50

Definition at line 85 of file lm49453.h.

#define LM49453_P0_DACHPL2_REG   0x51

Definition at line 86 of file lm49453.h.

#define LM49453_P0_DACHPR1_REG   0x52

Definition at line 87 of file lm49453.h.

#define LM49453_P0_DACHPR2_REG   0x53

Definition at line 88 of file lm49453.h.

#define LM49453_P0_DACLOL1_REG   0x54

Definition at line 89 of file lm49453.h.

#define LM49453_P0_DACLOL2_REG   0x55

Definition at line 90 of file lm49453.h.

#define LM49453_P0_DACLOR1_REG   0x56

Definition at line 91 of file lm49453.h.

#define LM49453_P0_DACLOR2_REG   0x57

Definition at line 92 of file lm49453.h.

#define LM49453_P0_DACLSL1_REG   0x58

Definition at line 93 of file lm49453.h.

#define LM49453_P0_DACLSL2_REG   0x59

Definition at line 94 of file lm49453.h.

#define LM49453_P0_DACLSR1_REG   0x5A

Definition at line 95 of file lm49453.h.

#define LM49453_P0_DACLSR2_REG   0x5B

Definition at line 96 of file lm49453.h.

#define LM49453_P0_DIGITAL_MIC1_CONFIG_REG   0xB0

Definition at line 161 of file lm49453.h.

#define LM49453_P0_DIGITAL_MIC1_DATA_DELAYL_REG   0xB1

Definition at line 162 of file lm49453.h.

#define LM49453_P0_DIGITAL_MIC1_DATA_DELAYR_REG   0xB2

Definition at line 163 of file lm49453.h.

#define LM49453_P0_DIGITAL_MIC2_CONFIG_REG   0xB3

Definition at line 166 of file lm49453.h.

#define LM49453_P0_DIGITAL_MIC2_DATA_DELAYL_REG   0xB4

Definition at line 167 of file lm49453.h.

#define LM49453_P0_DIGITAL_MIC2_DATA_DELAYR_REG   0xB5

Definition at line 168 of file lm49453.h.

#define LM49453_P0_DIS_PKVL_FB_REG   0x25

Definition at line 47 of file lm49453.h.

#define LM49453_P0_DMIC1_LEVELL_REG   0x8A

Definition at line 141 of file lm49453.h.

#define LM49453_P0_DMIC1_LEVELR_REG   0x8B

Definition at line 142 of file lm49453.h.

#define LM49453_P0_DMIC2_LEVELL_REG   0x8C

Definition at line 143 of file lm49453.h.

#define LM49453_P0_DMIC2_LEVELR_REG   0x8D

Definition at line 144 of file lm49453.h.

#define LM49453_P0_DMIC_CLK_DIV_REG   0x05

Definition at line 23 of file lm49453.h.

#define LM49453_P0_DMIC_MUTE_CFG_REG   0x99

Definition at line 156 of file lm49453.h.

#define LM49453_P0_DMIX_CLK_SEL_REG   0x40

Definition at line 70 of file lm49453.h.

#define LM49453_P0_EP_REG   0x24

Definition at line 46 of file lm49453.h.

#define LM49453_P0_FLL_REF_FREQH_REG   0x10

Definition at line 34 of file lm49453.h.

#define LM49453_P0_FLL_REF_FREQL_REG   0x0F

Definition at line 33 of file lm49453.h.

#define LM49453_P0_GPIO1_REG   0x38

Definition at line 60 of file lm49453.h.

#define LM49453_P0_GPIO2_REG   0x39

Definition at line 61 of file lm49453.h.

#define LM49453_P0_GPIO3_REG   0x3A

Definition at line 62 of file lm49453.h.

#define LM49453_P0_HAP_CTL_REG   0x3B

Definition at line 63 of file lm49453.h.

#define LM49453_P0_HAP_FREQ_PROG_LEFTH_REG   0x3D

Definition at line 65 of file lm49453.h.

#define LM49453_P0_HAP_FREQ_PROG_LEFTL_REG   0x3C

Definition at line 64 of file lm49453.h.

#define LM49453_P0_HAP_FREQ_PROG_RIGHTH_REG   0x3F

Definition at line 67 of file lm49453.h.

#define LM49453_P0_HAP_FREQ_PROG_RIGHTL_REG   0x3E

Definition at line 66 of file lm49453.h.

#define LM49453_P0_HPF_REG   0x80

Definition at line 130 of file lm49453.h.

#define LM49453_P0_HSD_IRQ1_REG   0xD8

Definition at line 207 of file lm49453.h.

#define LM49453_P0_HSD_IRQ2_REG   0xD9

Definition at line 208 of file lm49453.h.

#define LM49453_P0_HSD_IRQ3_REG   0xDA

Definition at line 209 of file lm49453.h.

#define LM49453_P0_HSD_IRQ4_REG   0xDB

Definition at line 210 of file lm49453.h.

#define LM49453_P0_HSD_IRQ_MASK1_REG   0xDC

Definition at line 211 of file lm49453.h.

#define LM49453_P0_HSD_IRQ_MASK2_REG   0xDD

Definition at line 212 of file lm49453.h.

#define LM49453_P0_HSD_IRQ_MASK3_REG   0xDE

Definition at line 213 of file lm49453.h.

#define LM49453_P0_HSD_PIN3_4_CFG_REG   0xD7

Definition at line 206 of file lm49453.h.

#define LM49453_P0_HSD_PIN3_4_EX_LOOP_CNT_LIMITH_REG   0xD3

Definition at line 202 of file lm49453.h.

#define LM49453_P0_HSD_PIN3_4_EX_LOOP_CNT_LIMITL_REG   0xD2

Definition at line 201 of file lm49453.h.

#define LM49453_P0_HSD_PIN_CONFIG_REG   0xEF

Definition at line 229 of file lm49453.h.

#define LM49453_P0_HSD_PLUG_DETECT_BB_IRQ_STATEH_REG   0xF5

Definition at line 234 of file lm49453.h.

#define LM49453_P0_HSD_PLUG_DETECT_BB_IRQ_STATEL_REG   0xF4

Definition at line 233 of file lm49453.h.

#define LM49453_P0_HSD_PLUG_DETECT_BB_IRQ_STATUS1_REG   0xF1

Definition at line 230 of file lm49453.h.

#define LM49453_P0_HSD_PLUG_DETECT_BB_IRQ_STATUS2_REG   0xF2

Definition at line 231 of file lm49453.h.

#define LM49453_P0_HSD_PLUG_DETECT_BB_IRQ_STATUS3_REG   0xF3

Definition at line 232 of file lm49453.h.

#define LM49453_P0_HSD_PPB_LONG_CNT_LIMITL_REG   0xD0

Definition at line 199 of file lm49453.h.

#define LM49453_P0_HSD_PPB_LONG_CNT_LIMITR_REG   0xD1

Definition at line 200 of file lm49453.h.

#define LM49453_P0_HSD_R_HPLH_REG   0xE1

Definition at line 215 of file lm49453.h.

#define LM49453_P0_HSD_R_HPLL_REG   0xE0

Definition at line 214 of file lm49453.h.

#define LM49453_P0_HSD_R_HPLU_REG   0xE2

Definition at line 216 of file lm49453.h.

#define LM49453_P0_HSD_R_HPRH_REG   0xE4

Definition at line 218 of file lm49453.h.

#define LM49453_P0_HSD_R_HPRL_REG   0xE3

Definition at line 217 of file lm49453.h.

#define LM49453_P0_HSD_R_HPRU_REG   0xE5

Definition at line 219 of file lm49453.h.

#define LM49453_P0_HSD_RO_FINALH_REG   0xEA

Definition at line 224 of file lm49453.h.

#define LM49453_P0_HSD_RO_FINALL_REG   0xE9

Definition at line 223 of file lm49453.h.

#define LM49453_P0_HSD_RO_FINALU_REG   0xEB

Definition at line 225 of file lm49453.h.

#define LM49453_P0_HSD_TIMEOUT1_REG   0xD4

Definition at line 203 of file lm49453.h.

#define LM49453_P0_HSD_TIMEOUT2_REG   0xD5

Definition at line 204 of file lm49453.h.

#define LM49453_P0_HSD_TIMEOUT3_REG   0xD6

Definition at line 205 of file lm49453.h.

#define LM49453_P0_HSD_VEL_L_FINALH_REG   0xE7

Definition at line 221 of file lm49453.h.

#define LM49453_P0_HSD_VEL_L_FINALL_REG   0xE6

Definition at line 220 of file lm49453.h.

#define LM49453_P0_HSD_VEL_L_FINALU_REG   0xE8

Definition at line 222 of file lm49453.h.

#define LM49453_P0_HSD_VMIC_BIAS_FINALH_REG   0xED

Definition at line 227 of file lm49453.h.

#define LM49453_P0_HSD_VMIC_BIAS_FINALL_REG   0xEC

Definition at line 226 of file lm49453.h.

#define LM49453_P0_HSD_VMIC_BIAS_FINALU_REG   0xEE

Definition at line 228 of file lm49453.h.

#define LM49453_P0_HSDET_CLK_DIV_REG   0x04

Definition at line 22 of file lm49453.h.

#define LM49453_P0_MICL_REG   0x20

Definition at line 44 of file lm49453.h.

#define LM49453_P0_MICR_REG   0x21

Definition at line 45 of file lm49453.h.

#define LM49453_P0_PLL_CLK_SEL1_REG   0x01

Definition at line 19 of file lm49453.h.

#define LM49453_P0_PLL_CLK_SEL2_REG   0x02

Definition at line 20 of file lm49453.h.

#define LM49453_P0_PLL_CONFIG_REG   0x15

Definition at line 39 of file lm49453.h.

#define LM49453_P0_PLL_HF_M_REG   0x08

Definition at line 26 of file lm49453.h.

#define LM49453_P0_PLL_LF_M_REG   0x09

Definition at line 27 of file lm49453.h.

#define LM49453_P0_PLL_N_MODH_REG   0x0C

Definition at line 30 of file lm49453.h.

#define LM49453_P0_PLL_N_MODL_REG   0x0B

Definition at line 29 of file lm49453.h.

#define LM49453_P0_PLL_NL_REG   0x0A

Definition at line 28 of file lm49453.h.

#define LM49453_P0_PLL_P1_REG   0x0D

Definition at line 31 of file lm49453.h.

#define LM49453_P0_PLL_P2_REG   0x0E

Definition at line 32 of file lm49453.h.

#define LM49453_P0_PMC_CLK_DIV_REG   0x03

Definition at line 21 of file lm49453.h.

#define LM49453_P0_PMC_SETUP_REG   0x00

Definition at line 18 of file lm49453.h.

#define LM49453_P0_PORT1_RX_LVL1_REG   0x41

Definition at line 71 of file lm49453.h.

#define LM49453_P0_PORT1_RX_LVL2_REG   0x42

Definition at line 72 of file lm49453.h.

#define LM49453_P0_PORT1_SR_LSB_REG   0x79

Definition at line 124 of file lm49453.h.

#define LM49453_P0_PORT1_SR_MSB_REG   0x7A

Definition at line 125 of file lm49453.h.

#define LM49453_P0_PORT1_TX1_REG   0x44

Definition at line 74 of file lm49453.h.

#define LM49453_P0_PORT1_TX2_REG   0x45

Definition at line 75 of file lm49453.h.

#define LM49453_P0_PORT1_TX3_REG   0x46

Definition at line 76 of file lm49453.h.

#define LM49453_P0_PORT1_TX4_REG   0x47

Definition at line 77 of file lm49453.h.

#define LM49453_P0_PORT1_TX5_REG   0x48

Definition at line 78 of file lm49453.h.

#define LM49453_P0_PORT1_TX6_REG   0x49

Definition at line 79 of file lm49453.h.

#define LM49453_P0_PORT1_TX7_REG   0x4A

Definition at line 80 of file lm49453.h.

#define LM49453_P0_PORT1_TX8_REG   0x4B

Definition at line 81 of file lm49453.h.

#define LM49453_P0_PORT2_RX_LVL_REG   0x43

Definition at line 73 of file lm49453.h.

#define LM49453_P0_PORT2_SR_LSB_REG   0x7B

Definition at line 126 of file lm49453.h.

#define LM49453_P0_PORT2_SR_MSB_REG   0x7C

Definition at line 127 of file lm49453.h.

#define LM49453_P0_PORT2_TX1_REG   0x4C

Definition at line 82 of file lm49453.h.

#define LM49453_P0_PORT2_TX2_REG   0x4D

Definition at line 83 of file lm49453.h.

#define LM49453_P0_PULL_CONFIG1_REG   0xF8

Definition at line 237 of file lm49453.h.

#define LM49453_P0_PULL_CONFIG2_REG   0xF9

Definition at line 238 of file lm49453.h.

#define LM49453_P0_PULL_CONFIG3_REG   0xFA

Definition at line 239 of file lm49453.h.

#define LM49453_P0_RESET_REG   0xFE

Definition at line 242 of file lm49453.h.

#define LM49453_P0_SOFT_MUTE_REG   0x98

Definition at line 155 of file lm49453.h.

#define LM49453_P0_STN_SEL_REG   0x4F

Definition at line 84 of file lm49453.h.

#define LM49453_P0_STN_VOL_ADCL_REG   0xB8

Definition at line 177 of file lm49453.h.

#define LM49453_P0_STN_VOL_ADCR_REG   0xB9

Definition at line 178 of file lm49453.h.

#define LM49453_P0_STN_VOL_DMIC1L_REG   0xBA

Definition at line 179 of file lm49453.h.

#define LM49453_P0_STN_VOL_DMIC1R_REG   0xBB

Definition at line 180 of file lm49453.h.

#define LM49453_P0_STN_VOL_DMIC2L_REG   0xBC

Definition at line 181 of file lm49453.h.

#define LM49453_P0_STN_VOL_DMIC2R_REG   0xBD

Definition at line 182 of file lm49453.h.

#define LM49453_P0_VCO_TARGETHH_REG   0x14

Definition at line 38 of file lm49453.h.

#define LM49453_P0_VCO_TARGETHL_REG   0x13

Definition at line 37 of file lm49453.h.

#define LM49453_P0_VCO_TARGETLH_REG   0x12

Definition at line 36 of file lm49453.h.

#define LM49453_P0_VCO_TARGETLL_REG   0x11

Definition at line 35 of file lm49453.h.

#define LM49453_P1_CP_CLK_DIV_REG   0xBA

Definition at line 374 of file lm49453.h.

#define LM49453_P1_CP_CONFIG1_REG   0xB0

Definition at line 364 of file lm49453.h.

#define LM49453_P1_CP_CONFIG2_REG   0xB1

Definition at line 365 of file lm49453.h.

#define LM49453_P1_CP_CONFIG3_REG   0xB2

Definition at line 366 of file lm49453.h.

#define LM49453_P1_CP_CONFIG4_REG   0xB3

Definition at line 367 of file lm49453.h.

#define LM49453_P1_CP_LA_VTH1L_REG   0xB4

Definition at line 368 of file lm49453.h.

#define LM49453_P1_CP_LA_VTH1M_REG   0xB5

Definition at line 369 of file lm49453.h.

#define LM49453_P1_CP_LA_VTH2L_REG   0xB6

Definition at line 370 of file lm49453.h.

#define LM49453_P1_CP_LA_VTH2M_REG   0xB7

Definition at line 371 of file lm49453.h.

#define LM49453_P1_CP_LA_VTH3H_REG   0xB9

Definition at line 373 of file lm49453.h.

#define LM49453_P1_CP_LA_VTH3L_REG   0xB8

Definition at line 372 of file lm49453.h.

#define LM49453_P1_DAC_CHOP_REG   0xC0

Definition at line 377 of file lm49453.h.

#define LM49453_P1_SIDETONE_SA0H_REG   0x81

Definition at line 315 of file lm49453.h.

#define LM49453_P1_SIDETONE_SA0L_REG   0x80

Definition at line 314 of file lm49453.h.

#define LM49453_P1_SIDETONE_SA1H_REG   0x89

Definition at line 323 of file lm49453.h.

#define LM49453_P1_SIDETONE_SA1L_REG   0x88

Definition at line 322 of file lm49453.h.

#define LM49453_P1_SIDETONE_SA2H_REG   0x91

Definition at line 331 of file lm49453.h.

#define LM49453_P1_SIDETONE_SA2L_REG   0x90

Definition at line 330 of file lm49453.h.

#define LM49453_P1_SIDETONE_SA3H_REG   0x99

Definition at line 339 of file lm49453.h.

#define LM49453_P1_SIDETONE_SA3L_REG   0x98

Definition at line 338 of file lm49453.h.

#define LM49453_P1_SIDETONE_SA4H_REG   0xA1

Definition at line 347 of file lm49453.h.

#define LM49453_P1_SIDETONE_SA4L_REG   0xA0

Definition at line 346 of file lm49453.h.

#define LM49453_P1_SIDETONE_SA5H_REG   0xA9

Definition at line 355 of file lm49453.h.

#define LM49453_P1_SIDETONE_SA5L_REG   0xA8

Definition at line 354 of file lm49453.h.

#define LM49453_P1_SIDETONE_SAB0U_REG   0x82

Definition at line 316 of file lm49453.h.

#define LM49453_P1_SIDETONE_SAB1U_REG   0x8A

Definition at line 324 of file lm49453.h.

#define LM49453_P1_SIDETONE_SAB2U_REG   0x92

Definition at line 332 of file lm49453.h.

#define LM49453_P1_SIDETONE_SAB3U_REG   0x9A

Definition at line 340 of file lm49453.h.

#define LM49453_P1_SIDETONE_SAB4U_REG   0xA2

Definition at line 348 of file lm49453.h.

#define LM49453_P1_SIDETONE_SAB5U_REG   0xAA

Definition at line 356 of file lm49453.h.

#define LM49453_P1_SIDETONE_SB0H_REG   0x84

Definition at line 318 of file lm49453.h.

#define LM49453_P1_SIDETONE_SB0L_REG   0x83

Definition at line 317 of file lm49453.h.

#define LM49453_P1_SIDETONE_SB1H_REG   0x8C

Definition at line 326 of file lm49453.h.

#define LM49453_P1_SIDETONE_SB1L_REG   0x8B

Definition at line 325 of file lm49453.h.

#define LM49453_P1_SIDETONE_SB2H_REG   0x94

Definition at line 334 of file lm49453.h.

#define LM49453_P1_SIDETONE_SB2L_REG   0x93

Definition at line 333 of file lm49453.h.

#define LM49453_P1_SIDETONE_SB3H_REG   0x9C

Definition at line 342 of file lm49453.h.

#define LM49453_P1_SIDETONE_SB3L_REG   0x9B

Definition at line 341 of file lm49453.h.

#define LM49453_P1_SIDETONE_SB4H_REG   0xA4

Definition at line 350 of file lm49453.h.

#define LM49453_P1_SIDETONE_SB4L_REG   0xA3

Definition at line 349 of file lm49453.h.

#define LM49453_P1_SIDETONE_SB5H_REG   0xAC

Definition at line 358 of file lm49453.h.

#define LM49453_P1_SIDETONE_SB5L_REG   0xAB

Definition at line 357 of file lm49453.h.

#define LM49453_P1_SIDETONE_SH0H_REG   0x86

Definition at line 320 of file lm49453.h.

#define LM49453_P1_SIDETONE_SH0L_REG   0x85

Definition at line 319 of file lm49453.h.

#define LM49453_P1_SIDETONE_SH0U_REG   0x87

Definition at line 321 of file lm49453.h.

#define LM49453_P1_SIDETONE_SH1H_REG   0x8E

Definition at line 328 of file lm49453.h.

#define LM49453_P1_SIDETONE_SH1L_REG   0x8D

Definition at line 327 of file lm49453.h.

#define LM49453_P1_SIDETONE_SH1U_REG   0x8F

Definition at line 329 of file lm49453.h.

#define LM49453_P1_SIDETONE_SH2H_REG   0x96

Definition at line 336 of file lm49453.h.

#define LM49453_P1_SIDETONE_SH2L_REG   0x95

Definition at line 335 of file lm49453.h.

#define LM49453_P1_SIDETONE_SH2U_REG   0x97

Definition at line 337 of file lm49453.h.

#define LM49453_P1_SIDETONE_SH3H_REG   0x9E

Definition at line 344 of file lm49453.h.

#define LM49453_P1_SIDETONE_SH3L_REG   0x9D

Definition at line 343 of file lm49453.h.

#define LM49453_P1_SIDETONE_SH3U_REG   0x9F

Definition at line 345 of file lm49453.h.

#define LM49453_P1_SIDETONE_SH4H_REG   0xA6

Definition at line 352 of file lm49453.h.

#define LM49453_P1_SIDETONE_SH4L_REG   0xA5

Definition at line 351 of file lm49453.h.

#define LM49453_P1_SIDETONE_SH4U_REG   0xA7

Definition at line 353 of file lm49453.h.

#define LM49453_P1_SIDETONE_SH5H_REG   0xAE

Definition at line 360 of file lm49453.h.

#define LM49453_P1_SIDETONE_SH5L_REG   0xAD

Definition at line 359 of file lm49453.h.

#define LM49453_P1_SIDETONE_SH5U_REG   0xAF

Definition at line 361 of file lm49453.h.

#define LM49453_PAGE0_SELECT   0x0

Definition at line 300 of file lm49453.h.

#define LM49453_PAGE1_SELECT   0x1

Definition at line 301 of file lm49453.h.

#define LM49453_PAGE_REG   0xFF

Definition at line 245 of file lm49453.h.

#define LM49453_PMC_SETUP_CHIP_ACTIVE   BIT(7)

Definition at line 256 of file lm49453.h.

#define LM49453_PMC_SETUP_CHIP_EN   (BIT(1)|BIT(0))

Definition at line 250 of file lm49453.h.

#define LM49453_PMC_SETUP_MCLK_OVER   BIT(5)

Definition at line 254 of file lm49453.h.

#define LM49453_PMC_SETUP_PLL_EN   BIT(2)

Definition at line 251 of file lm49453.h.

#define LM49453_PMC_SETUP_PLL_FLL   BIT(4)

Definition at line 253 of file lm49453.h.

#define LM49453_PMC_SETUP_PLL_P2_EN   BIT(3)

Definition at line 252 of file lm49453.h.

#define LM49453_PMC_SETUP_RTC_CLK_OVER   BIT(6)

Definition at line 255 of file lm49453.h.

#define LM49453_RESET_REG_RST   BIT(0)

Definition at line 297 of file lm49453.h.

#define LM49453_VCO_TARGET_VAL   0x8ca0001

Definition at line 277 of file lm49453.h.