Linux Kernel
3.7.1
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Macros | |
#define | M32R_MAX_PCC 2 |
#define | M32R_PCC0_BASE 0x00ef7000 |
#define | M32R_PCC1_BASE 0x00ef7020 |
#define | PCCR 0x00 |
#define | PCADR 0x04 |
#define | PCMOD 0x08 |
#define | PCIRC 0x0c |
#define | PCCSIGCR 0x10 |
#define | PCATCR 0x14 |
#define | PCCR_PCEN (1UL<<(31-31)) |
#define | PCIRC_BWERR (1UL<<(31-7)) |
#define | PCIRC_CDIN1 (1UL<<(31-14)) |
#define | PCIRC_CDIN2 (1UL<<(31-15)) |
#define | PCIRC_BEIEN (1UL<<(31-23)) |
#define | PCIRC_CIIEN (1UL<<(31-30)) |
#define | PCIRC_COIEN (1UL<<(31-31)) |
#define | PCCSIGCR_SEN (1UL<<(31-3)) |
#define | PCCSIGCR_VEN (1UL<<(31-7)) |
#define | PCCSIGCR_CRST (1UL<<(31-15)) |
#define | PCCSIGCR_COCR (1UL<<(31-31)) |
#define | PCMOD_AS_ATTRIB (1UL<<(31-19)) |
#define | PCMOD_AS_IO (1UL<<(31-18)) |
#define | PCMOD_CBSZ (1UL<<(31-23)) /* set for 8bit */ |
#define | PCMOD_DBEX (1UL<<(31-31)) /* set for excahnge */ |
#define | M32R_PCC0_MAPBASE 0x14000000 |
#define | M32R_PCC1_MAPBASE 0x16000000 |
#define | M32R_PCC_MAPMAX 0x02000000 |
#define | M32R_PCC_MAPSIZE 0x00001000 /* XXX */ |
#define | M32R_PCC_MAPMASK (~(M32R_PCC_MAPMAX-1)) |
#define M32R_MAX_PCC 2 |
Definition at line 5 of file m32r_pcc.h.
#define M32R_PCC0_BASE 0x00ef7000 |
Definition at line 10 of file m32r_pcc.h.
#define M32R_PCC0_MAPBASE 0x14000000 |
Definition at line 59 of file m32r_pcc.h.
#define M32R_PCC1_BASE 0x00ef7020 |
Definition at line 11 of file m32r_pcc.h.
#define M32R_PCC1_MAPBASE 0x16000000 |
Definition at line 60 of file m32r_pcc.h.
#define M32R_PCC_MAPMASK (~(M32R_PCC_MAPMAX-1)) |
Definition at line 65 of file m32r_pcc.h.
#define M32R_PCC_MAPMAX 0x02000000 |
Definition at line 62 of file m32r_pcc.h.
#define M32R_PCC_MAPSIZE 0x00001000 /* XXX */ |
Definition at line 64 of file m32r_pcc.h.
#define PCADR 0x04 |
Definition at line 17 of file m32r_pcc.h.
#define PCATCR 0x14 |
Definition at line 21 of file m32r_pcc.h.
#define PCCR 0x00 |
Definition at line 16 of file m32r_pcc.h.
#define PCCR_PCEN (1UL<<(31-31)) |
Definition at line 26 of file m32r_pcc.h.
#define PCCSIGCR 0x10 |
Definition at line 20 of file m32r_pcc.h.
#define PCCSIGCR_COCR (1UL<<(31-31)) |
Definition at line 44 of file m32r_pcc.h.
#define PCCSIGCR_CRST (1UL<<(31-15)) |
Definition at line 43 of file m32r_pcc.h.
#define PCCSIGCR_SEN (1UL<<(31-3)) |
Definition at line 41 of file m32r_pcc.h.
#define PCCSIGCR_VEN (1UL<<(31-7)) |
Definition at line 42 of file m32r_pcc.h.
#define PCIRC 0x0c |
Definition at line 19 of file m32r_pcc.h.
#define PCIRC_BEIEN (1UL<<(31-23)) |
Definition at line 34 of file m32r_pcc.h.
#define PCIRC_BWERR (1UL<<(31-7)) |
Definition at line 31 of file m32r_pcc.h.
#define PCIRC_CDIN1 (1UL<<(31-14)) |
Definition at line 32 of file m32r_pcc.h.
#define PCIRC_CDIN2 (1UL<<(31-15)) |
Definition at line 33 of file m32r_pcc.h.
#define PCIRC_CIIEN (1UL<<(31-30)) |
Definition at line 35 of file m32r_pcc.h.
#define PCIRC_COIEN (1UL<<(31-31)) |
Definition at line 36 of file m32r_pcc.h.
#define PCMOD 0x08 |
Definition at line 18 of file m32r_pcc.h.
#define PCMOD_AS_ATTRIB (1UL<<(31-19)) |
Definition at line 49 of file m32r_pcc.h.
#define PCMOD_AS_IO (1UL<<(31-18)) |
Definition at line 50 of file m32r_pcc.h.
#define PCMOD_CBSZ (1UL<<(31-23)) /* set for 8bit */ |
Definition at line 52 of file m32r_pcc.h.
#define PCMOD_DBEX (1UL<<(31-31)) /* set for excahnge */ |
Definition at line 54 of file m32r_pcc.h.