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Macros
iop_sw_mpu_defs_asm.h File Reference

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Macros

#define REG_FIELD(scope, reg, field, value)   REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
 
#define REG_FIELD_X_(value, shift)   ((value) << shift)
 
#define REG_STATE(scope, reg, field, symbolic_value)   REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
 
#define REG_STATE_X_(k, shift)   (k << shift)
 
#define REG_MASK(scope, reg, field)   REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
 
#define REG_MASK_X_(width, lsb)   (((1 << width)-1) << lsb)
 
#define REG_LSB(scope, reg, field)   reg_##scope##_##reg##___##field##___lsb
 
#define REG_BIT(scope, reg, field)   reg_##scope##_##reg##___##field##___bit
 
#define REG_ADDR(scope, inst, reg)   REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
 
#define REG_ADDR_X_(inst, offs)   ((inst) + offs)
 
#define REG_ADDR_VECT(scope, inst, reg, index)
 
#define REG_ADDR_VECT_X_(inst, offs, index, stride)   ((inst) + offs + (index) * stride)
 
#define reg_iop_sw_mpu_rw_sw_cfg_owner___cfg___lsb   0
 
#define reg_iop_sw_mpu_rw_sw_cfg_owner___cfg___width   2
 
#define reg_iop_sw_mpu_rw_sw_cfg_owner_offset   0
 
#define reg_iop_sw_mpu_r_spu_trace_offset   4
 
#define reg_iop_sw_mpu_r_spu_fsm_trace_offset   8
 
#define reg_iop_sw_mpu_rw_mc_ctrl___keep_owner___lsb   0
 
#define reg_iop_sw_mpu_rw_mc_ctrl___keep_owner___width   1
 
#define reg_iop_sw_mpu_rw_mc_ctrl___keep_owner___bit   0
 
#define reg_iop_sw_mpu_rw_mc_ctrl___cmd___lsb   1
 
#define reg_iop_sw_mpu_rw_mc_ctrl___cmd___width   2
 
#define reg_iop_sw_mpu_rw_mc_ctrl___size___lsb   3
 
#define reg_iop_sw_mpu_rw_mc_ctrl___size___width   3
 
#define reg_iop_sw_mpu_rw_mc_ctrl___wr_spu_mem___lsb   6
 
#define reg_iop_sw_mpu_rw_mc_ctrl___wr_spu_mem___width   1
 
#define reg_iop_sw_mpu_rw_mc_ctrl___wr_spu_mem___bit   6
 
#define reg_iop_sw_mpu_rw_mc_ctrl_offset   12
 
#define reg_iop_sw_mpu_rw_mc_data___val___lsb   0
 
#define reg_iop_sw_mpu_rw_mc_data___val___width   32
 
#define reg_iop_sw_mpu_rw_mc_data_offset   16
 
#define reg_iop_sw_mpu_rw_mc_addr_offset   20
 
#define reg_iop_sw_mpu_rs_mc_data_offset   24
 
#define reg_iop_sw_mpu_r_mc_data_offset   28
 
#define reg_iop_sw_mpu_r_mc_stat___busy_cpu___lsb   0
 
#define reg_iop_sw_mpu_r_mc_stat___busy_cpu___width   1
 
#define reg_iop_sw_mpu_r_mc_stat___busy_cpu___bit   0
 
#define reg_iop_sw_mpu_r_mc_stat___busy_mpu___lsb   1
 
#define reg_iop_sw_mpu_r_mc_stat___busy_mpu___width   1
 
#define reg_iop_sw_mpu_r_mc_stat___busy_mpu___bit   1
 
#define reg_iop_sw_mpu_r_mc_stat___busy_spu___lsb   2
 
#define reg_iop_sw_mpu_r_mc_stat___busy_spu___width   1
 
#define reg_iop_sw_mpu_r_mc_stat___busy_spu___bit   2
 
#define reg_iop_sw_mpu_r_mc_stat___owned_by_cpu___lsb   3
 
#define reg_iop_sw_mpu_r_mc_stat___owned_by_cpu___width   1
 
#define reg_iop_sw_mpu_r_mc_stat___owned_by_cpu___bit   3
 
#define reg_iop_sw_mpu_r_mc_stat___owned_by_mpu___lsb   4
 
#define reg_iop_sw_mpu_r_mc_stat___owned_by_mpu___width   1
 
#define reg_iop_sw_mpu_r_mc_stat___owned_by_mpu___bit   4
 
#define reg_iop_sw_mpu_r_mc_stat___owned_by_spu___lsb   5
 
#define reg_iop_sw_mpu_r_mc_stat___owned_by_spu___width   1
 
#define reg_iop_sw_mpu_r_mc_stat___owned_by_spu___bit   5
 
#define reg_iop_sw_mpu_r_mc_stat_offset   32
 
#define reg_iop_sw_mpu_rw_bus_clr_mask___byte0___lsb   0
 
#define reg_iop_sw_mpu_rw_bus_clr_mask___byte0___width   8
 
#define reg_iop_sw_mpu_rw_bus_clr_mask___byte1___lsb   8
 
#define reg_iop_sw_mpu_rw_bus_clr_mask___byte1___width   8
 
#define reg_iop_sw_mpu_rw_bus_clr_mask___byte2___lsb   16
 
#define reg_iop_sw_mpu_rw_bus_clr_mask___byte2___width   8
 
#define reg_iop_sw_mpu_rw_bus_clr_mask___byte3___lsb   24
 
#define reg_iop_sw_mpu_rw_bus_clr_mask___byte3___width   8
 
#define reg_iop_sw_mpu_rw_bus_clr_mask_offset   36
 
#define reg_iop_sw_mpu_rw_bus_set_mask___byte0___lsb   0
 
#define reg_iop_sw_mpu_rw_bus_set_mask___byte0___width   8
 
#define reg_iop_sw_mpu_rw_bus_set_mask___byte1___lsb   8
 
#define reg_iop_sw_mpu_rw_bus_set_mask___byte1___width   8
 
#define reg_iop_sw_mpu_rw_bus_set_mask___byte2___lsb   16
 
#define reg_iop_sw_mpu_rw_bus_set_mask___byte2___width   8
 
#define reg_iop_sw_mpu_rw_bus_set_mask___byte3___lsb   24
 
#define reg_iop_sw_mpu_rw_bus_set_mask___byte3___width   8
 
#define reg_iop_sw_mpu_rw_bus_set_mask_offset   40
 
#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte0___lsb   0
 
#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte0___width   1
 
#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte0___bit   0
 
#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte1___lsb   1
 
#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte1___width   1
 
#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte1___bit   1
 
#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte2___lsb   2
 
#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte2___width   1
 
#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte2___bit   2
 
#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte3___lsb   3
 
#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte3___width   1
 
#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte3___bit   3
 
#define reg_iop_sw_mpu_rw_bus_oe_clr_mask_offset   44
 
#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte0___lsb   0
 
#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte0___width   1
 
#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte0___bit   0
 
#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte1___lsb   1
 
#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte1___width   1
 
#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte1___bit   1
 
#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte2___lsb   2
 
#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte2___width   1
 
#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte2___bit   2
 
#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte3___lsb   3
 
#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte3___width   1
 
#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte3___bit   3
 
#define reg_iop_sw_mpu_rw_bus_oe_set_mask_offset   48
 
#define reg_iop_sw_mpu_r_bus_in_offset   52
 
#define reg_iop_sw_mpu_rw_gio_clr_mask___val___lsb   0
 
#define reg_iop_sw_mpu_rw_gio_clr_mask___val___width   32
 
#define reg_iop_sw_mpu_rw_gio_clr_mask_offset   56
 
#define reg_iop_sw_mpu_rw_gio_set_mask___val___lsb   0
 
#define reg_iop_sw_mpu_rw_gio_set_mask___val___width   32
 
#define reg_iop_sw_mpu_rw_gio_set_mask_offset   60
 
#define reg_iop_sw_mpu_rw_gio_oe_clr_mask___val___lsb   0
 
#define reg_iop_sw_mpu_rw_gio_oe_clr_mask___val___width   32
 
#define reg_iop_sw_mpu_rw_gio_oe_clr_mask_offset   64
 
#define reg_iop_sw_mpu_rw_gio_oe_set_mask___val___lsb   0
 
#define reg_iop_sw_mpu_rw_gio_oe_set_mask___val___width   32
 
#define reg_iop_sw_mpu_rw_gio_oe_set_mask_offset   68
 
#define reg_iop_sw_mpu_r_gio_in_offset   72
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr0___lsb   0
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr0___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr0___bit   0
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr1___lsb   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr1___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr1___bit   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr2___lsb   2
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr2___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr2___bit   2
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr3___lsb   3
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr3___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr3___bit   3
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr4___lsb   4
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr4___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr4___bit   4
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr5___lsb   5
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr5___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr5___bit   5
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr6___lsb   6
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr6___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr6___bit   6
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr7___lsb   7
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr7___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr7___bit   7
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr8___lsb   8
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr8___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr8___bit   8
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr9___lsb   9
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr9___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr9___bit   9
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr10___lsb   10
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr10___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr10___bit   10
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr11___lsb   11
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr11___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr11___bit   11
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr12___lsb   12
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr12___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr12___bit   12
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr13___lsb   13
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr13___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr13___bit   13
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr14___lsb   14
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr14___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr14___bit   14
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr15___lsb   15
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr15___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr15___bit   15
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr16___lsb   16
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr16___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr16___bit   16
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr17___lsb   17
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr17___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr17___bit   17
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr18___lsb   18
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr18___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr18___bit   18
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr19___lsb   19
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr19___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr19___bit   19
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr20___lsb   20
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr20___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr20___bit   20
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr21___lsb   21
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr21___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr21___bit   21
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr22___lsb   22
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr22___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr22___bit   22
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr23___lsb   23
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr23___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr23___bit   23
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr24___lsb   24
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr24___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr24___bit   24
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr25___lsb   25
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr25___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr25___bit   25
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr26___lsb   26
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr26___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr26___bit   26
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr27___lsb   27
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr27___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr27___bit   27
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr28___lsb   28
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr28___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr28___bit   28
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr29___lsb   29
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr29___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr29___bit   29
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr30___lsb   30
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr30___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr30___bit   30
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr31___lsb   31
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr31___width   1
 
#define reg_iop_sw_mpu_rw_cpu_intr___intr31___bit   31
 
#define reg_iop_sw_mpu_rw_cpu_intr_offset   76
 
#define reg_iop_sw_mpu_r_cpu_intr___intr0___lsb   0
 
#define reg_iop_sw_mpu_r_cpu_intr___intr0___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr0___bit   0
 
#define reg_iop_sw_mpu_r_cpu_intr___intr1___lsb   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr1___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr1___bit   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr2___lsb   2
 
#define reg_iop_sw_mpu_r_cpu_intr___intr2___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr2___bit   2
 
#define reg_iop_sw_mpu_r_cpu_intr___intr3___lsb   3
 
#define reg_iop_sw_mpu_r_cpu_intr___intr3___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr3___bit   3
 
#define reg_iop_sw_mpu_r_cpu_intr___intr4___lsb   4
 
#define reg_iop_sw_mpu_r_cpu_intr___intr4___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr4___bit   4
 
#define reg_iop_sw_mpu_r_cpu_intr___intr5___lsb   5
 
#define reg_iop_sw_mpu_r_cpu_intr___intr5___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr5___bit   5
 
#define reg_iop_sw_mpu_r_cpu_intr___intr6___lsb   6
 
#define reg_iop_sw_mpu_r_cpu_intr___intr6___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr6___bit   6
 
#define reg_iop_sw_mpu_r_cpu_intr___intr7___lsb   7
 
#define reg_iop_sw_mpu_r_cpu_intr___intr7___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr7___bit   7
 
#define reg_iop_sw_mpu_r_cpu_intr___intr8___lsb   8
 
#define reg_iop_sw_mpu_r_cpu_intr___intr8___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr8___bit   8
 
#define reg_iop_sw_mpu_r_cpu_intr___intr9___lsb   9
 
#define reg_iop_sw_mpu_r_cpu_intr___intr9___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr9___bit   9
 
#define reg_iop_sw_mpu_r_cpu_intr___intr10___lsb   10
 
#define reg_iop_sw_mpu_r_cpu_intr___intr10___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr10___bit   10
 
#define reg_iop_sw_mpu_r_cpu_intr___intr11___lsb   11
 
#define reg_iop_sw_mpu_r_cpu_intr___intr11___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr11___bit   11
 
#define reg_iop_sw_mpu_r_cpu_intr___intr12___lsb   12
 
#define reg_iop_sw_mpu_r_cpu_intr___intr12___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr12___bit   12
 
#define reg_iop_sw_mpu_r_cpu_intr___intr13___lsb   13
 
#define reg_iop_sw_mpu_r_cpu_intr___intr13___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr13___bit   13
 
#define reg_iop_sw_mpu_r_cpu_intr___intr14___lsb   14
 
#define reg_iop_sw_mpu_r_cpu_intr___intr14___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr14___bit   14
 
#define reg_iop_sw_mpu_r_cpu_intr___intr15___lsb   15
 
#define reg_iop_sw_mpu_r_cpu_intr___intr15___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr15___bit   15
 
#define reg_iop_sw_mpu_r_cpu_intr___intr16___lsb   16
 
#define reg_iop_sw_mpu_r_cpu_intr___intr16___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr16___bit   16
 
#define reg_iop_sw_mpu_r_cpu_intr___intr17___lsb   17
 
#define reg_iop_sw_mpu_r_cpu_intr___intr17___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr17___bit   17
 
#define reg_iop_sw_mpu_r_cpu_intr___intr18___lsb   18
 
#define reg_iop_sw_mpu_r_cpu_intr___intr18___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr18___bit   18
 
#define reg_iop_sw_mpu_r_cpu_intr___intr19___lsb   19
 
#define reg_iop_sw_mpu_r_cpu_intr___intr19___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr19___bit   19
 
#define reg_iop_sw_mpu_r_cpu_intr___intr20___lsb   20
 
#define reg_iop_sw_mpu_r_cpu_intr___intr20___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr20___bit   20
 
#define reg_iop_sw_mpu_r_cpu_intr___intr21___lsb   21
 
#define reg_iop_sw_mpu_r_cpu_intr___intr21___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr21___bit   21
 
#define reg_iop_sw_mpu_r_cpu_intr___intr22___lsb   22
 
#define reg_iop_sw_mpu_r_cpu_intr___intr22___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr22___bit   22
 
#define reg_iop_sw_mpu_r_cpu_intr___intr23___lsb   23
 
#define reg_iop_sw_mpu_r_cpu_intr___intr23___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr23___bit   23
 
#define reg_iop_sw_mpu_r_cpu_intr___intr24___lsb   24
 
#define reg_iop_sw_mpu_r_cpu_intr___intr24___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr24___bit   24
 
#define reg_iop_sw_mpu_r_cpu_intr___intr25___lsb   25
 
#define reg_iop_sw_mpu_r_cpu_intr___intr25___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr25___bit   25
 
#define reg_iop_sw_mpu_r_cpu_intr___intr26___lsb   26
 
#define reg_iop_sw_mpu_r_cpu_intr___intr26___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr26___bit   26
 
#define reg_iop_sw_mpu_r_cpu_intr___intr27___lsb   27
 
#define reg_iop_sw_mpu_r_cpu_intr___intr27___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr27___bit   27
 
#define reg_iop_sw_mpu_r_cpu_intr___intr28___lsb   28
 
#define reg_iop_sw_mpu_r_cpu_intr___intr28___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr28___bit   28
 
#define reg_iop_sw_mpu_r_cpu_intr___intr29___lsb   29
 
#define reg_iop_sw_mpu_r_cpu_intr___intr29___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr29___bit   29
 
#define reg_iop_sw_mpu_r_cpu_intr___intr30___lsb   30
 
#define reg_iop_sw_mpu_r_cpu_intr___intr30___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr30___bit   30
 
#define reg_iop_sw_mpu_r_cpu_intr___intr31___lsb   31
 
#define reg_iop_sw_mpu_r_cpu_intr___intr31___width   1
 
#define reg_iop_sw_mpu_r_cpu_intr___intr31___bit   31
 
#define reg_iop_sw_mpu_r_cpu_intr_offset   80
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr0___lsb   0
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr0___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr0___bit   0
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp0___lsb   1
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp0___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp0___bit   1
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___timer_grp0___lsb   2
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___timer_grp0___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___timer_grp0___bit   2
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_out___lsb   3
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_out___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_out___bit   3
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr1___lsb   4
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr1___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr1___bit   4
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp1___lsb   5
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp1___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp1___bit   5
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___timer_grp1___lsb   6
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___timer_grp1___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___timer_grp1___bit   6
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_in___lsb   7
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_in___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_in___bit   7
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr2___lsb   8
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr2___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr2___bit   8
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp2___lsb   9
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp2___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp2___bit   9
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_out_extra___lsb   10
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_out_extra___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_out_extra___bit   10
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___dmc_out___lsb   11
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___dmc_out___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___dmc_out___bit   11
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr3___lsb   12
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr3___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr3___bit   12
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp3___lsb   13
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp3___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp3___bit   13
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_in_extra___lsb   14
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_in_extra___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_in_extra___bit   14
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___dmc_in___lsb   15
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___dmc_in___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask___dmc_in___bit   15
 
#define reg_iop_sw_mpu_rw_intr_grp0_mask_offset   84
 
#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr0___lsb   0
 
#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr0___width   1
 
#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr0___bit   0
 
#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr1___lsb   4
 
#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr1___width   1
 
#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr1___bit   4
 
#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr2___lsb   8
 
#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr2___width   1
 
#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr2___bit   8
 
#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr3___lsb   12
 
#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr3___width   1
 
#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr3___bit   12
 
#define reg_iop_sw_mpu_rw_ack_intr_grp0_offset   88
 
#define reg_iop_sw_mpu_r_intr_grp0___spu_intr0___lsb   0
 
#define reg_iop_sw_mpu_r_intr_grp0___spu_intr0___width   1
 
#define reg_iop_sw_mpu_r_intr_grp0___spu_intr0___bit   0
 
#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp0___lsb   1
 
#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp0___width   1
 
#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp0___bit   1
 
#define reg_iop_sw_mpu_r_intr_grp0___timer_grp0___lsb   2
 
#define reg_iop_sw_mpu_r_intr_grp0___timer_grp0___width   1
 
#define reg_iop_sw_mpu_r_intr_grp0___timer_grp0___bit   2
 
#define reg_iop_sw_mpu_r_intr_grp0___fifo_out___lsb   3
 
#define reg_iop_sw_mpu_r_intr_grp0___fifo_out___width   1
 
#define reg_iop_sw_mpu_r_intr_grp0___fifo_out___bit   3
 
#define reg_iop_sw_mpu_r_intr_grp0___spu_intr1___lsb   4
 
#define reg_iop_sw_mpu_r_intr_grp0___spu_intr1___width   1
 
#define reg_iop_sw_mpu_r_intr_grp0___spu_intr1___bit   4
 
#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp1___lsb   5
 
#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp1___width   1
 
#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp1___bit   5
 
#define reg_iop_sw_mpu_r_intr_grp0___timer_grp1___lsb   6
 
#define reg_iop_sw_mpu_r_intr_grp0___timer_grp1___width   1
 
#define reg_iop_sw_mpu_r_intr_grp0___timer_grp1___bit   6
 
#define reg_iop_sw_mpu_r_intr_grp0___fifo_in___lsb   7
 
#define reg_iop_sw_mpu_r_intr_grp0___fifo_in___width   1
 
#define reg_iop_sw_mpu_r_intr_grp0___fifo_in___bit   7
 
#define reg_iop_sw_mpu_r_intr_grp0___spu_intr2___lsb   8
 
#define reg_iop_sw_mpu_r_intr_grp0___spu_intr2___width   1
 
#define reg_iop_sw_mpu_r_intr_grp0___spu_intr2___bit   8
 
#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp2___lsb   9
 
#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp2___width   1
 
#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp2___bit   9
 
#define reg_iop_sw_mpu_r_intr_grp0___fifo_out_extra___lsb   10
 
#define reg_iop_sw_mpu_r_intr_grp0___fifo_out_extra___width   1
 
#define reg_iop_sw_mpu_r_intr_grp0___fifo_out_extra___bit   10
 
#define reg_iop_sw_mpu_r_intr_grp0___dmc_out___lsb   11
 
#define reg_iop_sw_mpu_r_intr_grp0___dmc_out___width   1
 
#define reg_iop_sw_mpu_r_intr_grp0___dmc_out___bit   11
 
#define reg_iop_sw_mpu_r_intr_grp0___spu_intr3___lsb   12
 
#define reg_iop_sw_mpu_r_intr_grp0___spu_intr3___width   1
 
#define reg_iop_sw_mpu_r_intr_grp0___spu_intr3___bit   12
 
#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp3___lsb   13
 
#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp3___width   1
 
#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp3___bit   13
 
#define reg_iop_sw_mpu_r_intr_grp0___fifo_in_extra___lsb   14
 
#define reg_iop_sw_mpu_r_intr_grp0___fifo_in_extra___width   1
 
#define reg_iop_sw_mpu_r_intr_grp0___fifo_in_extra___bit   14
 
#define reg_iop_sw_mpu_r_intr_grp0___dmc_in___lsb   15
 
#define reg_iop_sw_mpu_r_intr_grp0___dmc_in___width   1
 
#define reg_iop_sw_mpu_r_intr_grp0___dmc_in___bit   15
 
#define reg_iop_sw_mpu_r_intr_grp0_offset   92
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr0___lsb   0
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr0___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr0___bit   0
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp0___lsb   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp0___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp0___bit   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___timer_grp0___lsb   2
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___timer_grp0___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___timer_grp0___bit   2
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_out___lsb   3
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_out___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_out___bit   3
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr1___lsb   4
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr1___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr1___bit   4
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp1___lsb   5
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp1___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp1___bit   5
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___timer_grp1___lsb   6
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___timer_grp1___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___timer_grp1___bit   6
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_in___lsb   7
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_in___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_in___bit   7
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr2___lsb   8
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr2___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr2___bit   8
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp2___lsb   9
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp2___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp2___bit   9
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_out_extra___lsb   10
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_out_extra___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_out_extra___bit   10
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___dmc_out___lsb   11
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___dmc_out___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___dmc_out___bit   11
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr3___lsb   12
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr3___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr3___bit   12
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp3___lsb   13
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp3___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp3___bit   13
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_in_extra___lsb   14
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_in_extra___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_in_extra___bit   14
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___dmc_in___lsb   15
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___dmc_in___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp0___dmc_in___bit   15
 
#define reg_iop_sw_mpu_r_masked_intr_grp0_offset   96
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr4___lsb   0
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr4___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr4___bit   0
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp4___lsb   1
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp4___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp4___bit   1
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_out_extra___lsb   2
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_out_extra___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_out_extra___bit   2
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___dmc_out___lsb   3
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___dmc_out___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___dmc_out___bit   3
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr5___lsb   4
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr5___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr5___bit   4
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp5___lsb   5
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp5___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp5___bit   5
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_in_extra___lsb   6
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_in_extra___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_in_extra___bit   6
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___dmc_in___lsb   7
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___dmc_in___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___dmc_in___bit   7
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr6___lsb   8
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr6___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr6___bit   8
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp6___lsb   9
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp6___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp6___bit   9
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___timer_grp0___lsb   10
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___timer_grp0___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___timer_grp0___bit   10
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_out___lsb   11
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_out___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_out___bit   11
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr7___lsb   12
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr7___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr7___bit   12
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp7___lsb   13
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp7___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp7___bit   13
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___timer_grp1___lsb   14
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___timer_grp1___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___timer_grp1___bit   14
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_in___lsb   15
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_in___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_in___bit   15
 
#define reg_iop_sw_mpu_rw_intr_grp1_mask_offset   100
 
#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr4___lsb   0
 
#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr4___width   1
 
#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr4___bit   0
 
#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr5___lsb   4
 
#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr5___width   1
 
#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr5___bit   4
 
#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr6___lsb   8
 
#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr6___width   1
 
#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr6___bit   8
 
#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr7___lsb   12
 
#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr7___width   1
 
#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr7___bit   12
 
#define reg_iop_sw_mpu_rw_ack_intr_grp1_offset   104
 
#define reg_iop_sw_mpu_r_intr_grp1___spu_intr4___lsb   0
 
#define reg_iop_sw_mpu_r_intr_grp1___spu_intr4___width   1
 
#define reg_iop_sw_mpu_r_intr_grp1___spu_intr4___bit   0
 
#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp4___lsb   1
 
#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp4___width   1
 
#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp4___bit   1
 
#define reg_iop_sw_mpu_r_intr_grp1___fifo_out_extra___lsb   2
 
#define reg_iop_sw_mpu_r_intr_grp1___fifo_out_extra___width   1
 
#define reg_iop_sw_mpu_r_intr_grp1___fifo_out_extra___bit   2
 
#define reg_iop_sw_mpu_r_intr_grp1___dmc_out___lsb   3
 
#define reg_iop_sw_mpu_r_intr_grp1___dmc_out___width   1
 
#define reg_iop_sw_mpu_r_intr_grp1___dmc_out___bit   3
 
#define reg_iop_sw_mpu_r_intr_grp1___spu_intr5___lsb   4
 
#define reg_iop_sw_mpu_r_intr_grp1___spu_intr5___width   1
 
#define reg_iop_sw_mpu_r_intr_grp1___spu_intr5___bit   4
 
#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp5___lsb   5
 
#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp5___width   1
 
#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp5___bit   5
 
#define reg_iop_sw_mpu_r_intr_grp1___fifo_in_extra___lsb   6
 
#define reg_iop_sw_mpu_r_intr_grp1___fifo_in_extra___width   1
 
#define reg_iop_sw_mpu_r_intr_grp1___fifo_in_extra___bit   6
 
#define reg_iop_sw_mpu_r_intr_grp1___dmc_in___lsb   7
 
#define reg_iop_sw_mpu_r_intr_grp1___dmc_in___width   1
 
#define reg_iop_sw_mpu_r_intr_grp1___dmc_in___bit   7
 
#define reg_iop_sw_mpu_r_intr_grp1___spu_intr6___lsb   8
 
#define reg_iop_sw_mpu_r_intr_grp1___spu_intr6___width   1
 
#define reg_iop_sw_mpu_r_intr_grp1___spu_intr6___bit   8
 
#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp6___lsb   9
 
#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp6___width   1
 
#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp6___bit   9
 
#define reg_iop_sw_mpu_r_intr_grp1___timer_grp0___lsb   10
 
#define reg_iop_sw_mpu_r_intr_grp1___timer_grp0___width   1
 
#define reg_iop_sw_mpu_r_intr_grp1___timer_grp0___bit   10
 
#define reg_iop_sw_mpu_r_intr_grp1___fifo_out___lsb   11
 
#define reg_iop_sw_mpu_r_intr_grp1___fifo_out___width   1
 
#define reg_iop_sw_mpu_r_intr_grp1___fifo_out___bit   11
 
#define reg_iop_sw_mpu_r_intr_grp1___spu_intr7___lsb   12
 
#define reg_iop_sw_mpu_r_intr_grp1___spu_intr7___width   1
 
#define reg_iop_sw_mpu_r_intr_grp1___spu_intr7___bit   12
 
#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp7___lsb   13
 
#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp7___width   1
 
#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp7___bit   13
 
#define reg_iop_sw_mpu_r_intr_grp1___timer_grp1___lsb   14
 
#define reg_iop_sw_mpu_r_intr_grp1___timer_grp1___width   1
 
#define reg_iop_sw_mpu_r_intr_grp1___timer_grp1___bit   14
 
#define reg_iop_sw_mpu_r_intr_grp1___fifo_in___lsb   15
 
#define reg_iop_sw_mpu_r_intr_grp1___fifo_in___width   1
 
#define reg_iop_sw_mpu_r_intr_grp1___fifo_in___bit   15
 
#define reg_iop_sw_mpu_r_intr_grp1_offset   108
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr4___lsb   0
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr4___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr4___bit   0
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp4___lsb   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp4___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp4___bit   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_out_extra___lsb   2
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_out_extra___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_out_extra___bit   2
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___dmc_out___lsb   3
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___dmc_out___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___dmc_out___bit   3
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr5___lsb   4
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr5___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr5___bit   4
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp5___lsb   5
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp5___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp5___bit   5
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_in_extra___lsb   6
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_in_extra___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_in_extra___bit   6
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___dmc_in___lsb   7
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___dmc_in___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___dmc_in___bit   7
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr6___lsb   8
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr6___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr6___bit   8
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp6___lsb   9
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp6___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp6___bit   9
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___timer_grp0___lsb   10
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___timer_grp0___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___timer_grp0___bit   10
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_out___lsb   11
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_out___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_out___bit   11
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr7___lsb   12
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr7___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr7___bit   12
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp7___lsb   13
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp7___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp7___bit   13
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___timer_grp1___lsb   14
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___timer_grp1___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___timer_grp1___bit   14
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_in___lsb   15
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_in___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_in___bit   15
 
#define reg_iop_sw_mpu_r_masked_intr_grp1_offset   112
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr8___lsb   0
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr8___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr8___bit   0
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp0___lsb   1
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp0___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp0___bit   1
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___timer_grp0___lsb   2
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___timer_grp0___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___timer_grp0___bit   2
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_out___lsb   3
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_out___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_out___bit   3
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr9___lsb   4
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr9___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr9___bit   4
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp1___lsb   5
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp1___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp1___bit   5
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___timer_grp1___lsb   6
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___timer_grp1___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___timer_grp1___bit   6
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_in___lsb   7
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_in___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_in___bit   7
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr10___lsb   8
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr10___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr10___bit   8
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp2___lsb   9
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp2___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp2___bit   9
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_out_extra___lsb   10
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_out_extra___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_out_extra___bit   10
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___dmc_out___lsb   11
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___dmc_out___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___dmc_out___bit   11
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr11___lsb   12
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr11___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr11___bit   12
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp3___lsb   13
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp3___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp3___bit   13
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_in_extra___lsb   14
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_in_extra___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_in_extra___bit   14
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___dmc_in___lsb   15
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___dmc_in___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask___dmc_in___bit   15
 
#define reg_iop_sw_mpu_rw_intr_grp2_mask_offset   116
 
#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr8___lsb   0
 
#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr8___width   1
 
#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr8___bit   0
 
#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr9___lsb   4
 
#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr9___width   1
 
#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr9___bit   4
 
#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr10___lsb   8
 
#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr10___width   1
 
#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr10___bit   8
 
#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr11___lsb   12
 
#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr11___width   1
 
#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr11___bit   12
 
#define reg_iop_sw_mpu_rw_ack_intr_grp2_offset   120
 
#define reg_iop_sw_mpu_r_intr_grp2___spu_intr8___lsb   0
 
#define reg_iop_sw_mpu_r_intr_grp2___spu_intr8___width   1
 
#define reg_iop_sw_mpu_r_intr_grp2___spu_intr8___bit   0
 
#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp0___lsb   1
 
#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp0___width   1
 
#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp0___bit   1
 
#define reg_iop_sw_mpu_r_intr_grp2___timer_grp0___lsb   2
 
#define reg_iop_sw_mpu_r_intr_grp2___timer_grp0___width   1
 
#define reg_iop_sw_mpu_r_intr_grp2___timer_grp0___bit   2
 
#define reg_iop_sw_mpu_r_intr_grp2___fifo_out___lsb   3
 
#define reg_iop_sw_mpu_r_intr_grp2___fifo_out___width   1
 
#define reg_iop_sw_mpu_r_intr_grp2___fifo_out___bit   3
 
#define reg_iop_sw_mpu_r_intr_grp2___spu_intr9___lsb   4
 
#define reg_iop_sw_mpu_r_intr_grp2___spu_intr9___width   1
 
#define reg_iop_sw_mpu_r_intr_grp2___spu_intr9___bit   4
 
#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp1___lsb   5
 
#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp1___width   1
 
#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp1___bit   5
 
#define reg_iop_sw_mpu_r_intr_grp2___timer_grp1___lsb   6
 
#define reg_iop_sw_mpu_r_intr_grp2___timer_grp1___width   1
 
#define reg_iop_sw_mpu_r_intr_grp2___timer_grp1___bit   6
 
#define reg_iop_sw_mpu_r_intr_grp2___fifo_in___lsb   7
 
#define reg_iop_sw_mpu_r_intr_grp2___fifo_in___width   1
 
#define reg_iop_sw_mpu_r_intr_grp2___fifo_in___bit   7
 
#define reg_iop_sw_mpu_r_intr_grp2___spu_intr10___lsb   8
 
#define reg_iop_sw_mpu_r_intr_grp2___spu_intr10___width   1
 
#define reg_iop_sw_mpu_r_intr_grp2___spu_intr10___bit   8
 
#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp2___lsb   9
 
#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp2___width   1
 
#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp2___bit   9
 
#define reg_iop_sw_mpu_r_intr_grp2___fifo_out_extra___lsb   10
 
#define reg_iop_sw_mpu_r_intr_grp2___fifo_out_extra___width   1
 
#define reg_iop_sw_mpu_r_intr_grp2___fifo_out_extra___bit   10
 
#define reg_iop_sw_mpu_r_intr_grp2___dmc_out___lsb   11
 
#define reg_iop_sw_mpu_r_intr_grp2___dmc_out___width   1
 
#define reg_iop_sw_mpu_r_intr_grp2___dmc_out___bit   11
 
#define reg_iop_sw_mpu_r_intr_grp2___spu_intr11___lsb   12
 
#define reg_iop_sw_mpu_r_intr_grp2___spu_intr11___width   1
 
#define reg_iop_sw_mpu_r_intr_grp2___spu_intr11___bit   12
 
#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp3___lsb   13
 
#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp3___width   1
 
#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp3___bit   13
 
#define reg_iop_sw_mpu_r_intr_grp2___fifo_in_extra___lsb   14
 
#define reg_iop_sw_mpu_r_intr_grp2___fifo_in_extra___width   1
 
#define reg_iop_sw_mpu_r_intr_grp2___fifo_in_extra___bit   14
 
#define reg_iop_sw_mpu_r_intr_grp2___dmc_in___lsb   15
 
#define reg_iop_sw_mpu_r_intr_grp2___dmc_in___width   1
 
#define reg_iop_sw_mpu_r_intr_grp2___dmc_in___bit   15
 
#define reg_iop_sw_mpu_r_intr_grp2_offset   124
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr8___lsb   0
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr8___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr8___bit   0
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp0___lsb   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp0___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp0___bit   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___timer_grp0___lsb   2
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___timer_grp0___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___timer_grp0___bit   2
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_out___lsb   3
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_out___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_out___bit   3
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr9___lsb   4
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr9___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr9___bit   4
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp1___lsb   5
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp1___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp1___bit   5
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___timer_grp1___lsb   6
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___timer_grp1___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___timer_grp1___bit   6
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_in___lsb   7
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_in___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_in___bit   7
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr10___lsb   8
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr10___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr10___bit   8
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp2___lsb   9
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp2___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp2___bit   9
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_out_extra___lsb   10
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_out_extra___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_out_extra___bit   10
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___dmc_out___lsb   11
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___dmc_out___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___dmc_out___bit   11
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr11___lsb   12
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr11___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr11___bit   12
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp3___lsb   13
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp3___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp3___bit   13
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_in_extra___lsb   14
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_in_extra___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_in_extra___bit   14
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___dmc_in___lsb   15
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___dmc_in___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp2___dmc_in___bit   15
 
#define reg_iop_sw_mpu_r_masked_intr_grp2_offset   128
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr12___lsb   0
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr12___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr12___bit   0
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp4___lsb   1
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp4___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp4___bit   1
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_out_extra___lsb   2
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_out_extra___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_out_extra___bit   2
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___dmc_out___lsb   3
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___dmc_out___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___dmc_out___bit   3
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr13___lsb   4
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr13___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr13___bit   4
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp5___lsb   5
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp5___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp5___bit   5
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_in_extra___lsb   6
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_in_extra___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_in_extra___bit   6
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___dmc_in___lsb   7
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___dmc_in___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___dmc_in___bit   7
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr14___lsb   8
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr14___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr14___bit   8
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp6___lsb   9
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp6___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp6___bit   9
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___timer_grp0___lsb   10
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___timer_grp0___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___timer_grp0___bit   10
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_out___lsb   11
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_out___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_out___bit   11
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr15___lsb   12
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr15___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr15___bit   12
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp7___lsb   13
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp7___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp7___bit   13
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___timer_grp1___lsb   14
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___timer_grp1___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___timer_grp1___bit   14
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_in___lsb   15
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_in___width   1
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_in___bit   15
 
#define reg_iop_sw_mpu_rw_intr_grp3_mask_offset   132
 
#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr12___lsb   0
 
#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr12___width   1
 
#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr12___bit   0
 
#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr13___lsb   4
 
#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr13___width   1
 
#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr13___bit   4
 
#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr14___lsb   8
 
#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr14___width   1
 
#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr14___bit   8
 
#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr15___lsb   12
 
#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr15___width   1
 
#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr15___bit   12
 
#define reg_iop_sw_mpu_rw_ack_intr_grp3_offset   136
 
#define reg_iop_sw_mpu_r_intr_grp3___spu_intr12___lsb   0
 
#define reg_iop_sw_mpu_r_intr_grp3___spu_intr12___width   1
 
#define reg_iop_sw_mpu_r_intr_grp3___spu_intr12___bit   0
 
#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp4___lsb   1
 
#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp4___width   1
 
#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp4___bit   1
 
#define reg_iop_sw_mpu_r_intr_grp3___fifo_out_extra___lsb   2
 
#define reg_iop_sw_mpu_r_intr_grp3___fifo_out_extra___width   1
 
#define reg_iop_sw_mpu_r_intr_grp3___fifo_out_extra___bit   2
 
#define reg_iop_sw_mpu_r_intr_grp3___dmc_out___lsb   3
 
#define reg_iop_sw_mpu_r_intr_grp3___dmc_out___width   1
 
#define reg_iop_sw_mpu_r_intr_grp3___dmc_out___bit   3
 
#define reg_iop_sw_mpu_r_intr_grp3___spu_intr13___lsb   4
 
#define reg_iop_sw_mpu_r_intr_grp3___spu_intr13___width   1
 
#define reg_iop_sw_mpu_r_intr_grp3___spu_intr13___bit   4
 
#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp5___lsb   5
 
#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp5___width   1
 
#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp5___bit   5
 
#define reg_iop_sw_mpu_r_intr_grp3___fifo_in_extra___lsb   6
 
#define reg_iop_sw_mpu_r_intr_grp3___fifo_in_extra___width   1
 
#define reg_iop_sw_mpu_r_intr_grp3___fifo_in_extra___bit   6
 
#define reg_iop_sw_mpu_r_intr_grp3___dmc_in___lsb   7
 
#define reg_iop_sw_mpu_r_intr_grp3___dmc_in___width   1
 
#define reg_iop_sw_mpu_r_intr_grp3___dmc_in___bit   7
 
#define reg_iop_sw_mpu_r_intr_grp3___spu_intr14___lsb   8
 
#define reg_iop_sw_mpu_r_intr_grp3___spu_intr14___width   1
 
#define reg_iop_sw_mpu_r_intr_grp3___spu_intr14___bit   8
 
#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp6___lsb   9
 
#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp6___width   1
 
#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp6___bit   9
 
#define reg_iop_sw_mpu_r_intr_grp3___timer_grp0___lsb   10
 
#define reg_iop_sw_mpu_r_intr_grp3___timer_grp0___width   1
 
#define reg_iop_sw_mpu_r_intr_grp3___timer_grp0___bit   10
 
#define reg_iop_sw_mpu_r_intr_grp3___fifo_out___lsb   11
 
#define reg_iop_sw_mpu_r_intr_grp3___fifo_out___width   1
 
#define reg_iop_sw_mpu_r_intr_grp3___fifo_out___bit   11
 
#define reg_iop_sw_mpu_r_intr_grp3___spu_intr15___lsb   12
 
#define reg_iop_sw_mpu_r_intr_grp3___spu_intr15___width   1
 
#define reg_iop_sw_mpu_r_intr_grp3___spu_intr15___bit   12
 
#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp7___lsb   13
 
#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp7___width   1
 
#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp7___bit   13
 
#define reg_iop_sw_mpu_r_intr_grp3___timer_grp1___lsb   14
 
#define reg_iop_sw_mpu_r_intr_grp3___timer_grp1___width   1
 
#define reg_iop_sw_mpu_r_intr_grp3___timer_grp1___bit   14
 
#define reg_iop_sw_mpu_r_intr_grp3___fifo_in___lsb   15
 
#define reg_iop_sw_mpu_r_intr_grp3___fifo_in___width   1
 
#define reg_iop_sw_mpu_r_intr_grp3___fifo_in___bit   15
 
#define reg_iop_sw_mpu_r_intr_grp3_offset   140
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr12___lsb   0
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr12___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr12___bit   0
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp4___lsb   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp4___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp4___bit   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_out_extra___lsb   2
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_out_extra___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_out_extra___bit   2
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___dmc_out___lsb   3
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___dmc_out___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___dmc_out___bit   3
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr13___lsb   4
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr13___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr13___bit   4
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp5___lsb   5
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp5___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp5___bit   5
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_in_extra___lsb   6
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_in_extra___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_in_extra___bit   6
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___dmc_in___lsb   7
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___dmc_in___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___dmc_in___bit   7
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr14___lsb   8
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr14___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr14___bit   8
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp6___lsb   9
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp6___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp6___bit   9
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___timer_grp0___lsb   10
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___timer_grp0___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___timer_grp0___bit   10
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_out___lsb   11
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_out___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_out___bit   11
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr15___lsb   12
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr15___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr15___bit   12
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp7___lsb   13
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp7___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp7___bit   13
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___timer_grp1___lsb   14
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___timer_grp1___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___timer_grp1___bit   14
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_in___lsb   15
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_in___width   1
 
#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_in___bit   15
 
#define reg_iop_sw_mpu_r_masked_intr_grp3_offset   144
 
#define regk_iop_sw_mpu_copy   0x00000000
 
#define regk_iop_sw_mpu_cpu   0x00000000
 
#define regk_iop_sw_mpu_mpu   0x00000001
 
#define regk_iop_sw_mpu_no   0x00000000
 
#define regk_iop_sw_mpu_nop   0x00000000
 
#define regk_iop_sw_mpu_rd   0x00000002
 
#define regk_iop_sw_mpu_reg_copy   0x00000001
 
#define regk_iop_sw_mpu_rw_bus_clr_mask_default   0x00000000
 
#define regk_iop_sw_mpu_rw_bus_oe_clr_mask_default   0x00000000
 
#define regk_iop_sw_mpu_rw_bus_oe_set_mask_default   0x00000000
 
#define regk_iop_sw_mpu_rw_bus_set_mask_default   0x00000000
 
#define regk_iop_sw_mpu_rw_gio_clr_mask_default   0x00000000
 
#define regk_iop_sw_mpu_rw_gio_oe_clr_mask_default   0x00000000
 
#define regk_iop_sw_mpu_rw_gio_oe_set_mask_default   0x00000000
 
#define regk_iop_sw_mpu_rw_gio_set_mask_default   0x00000000
 
#define regk_iop_sw_mpu_rw_intr_grp0_mask_default   0x00000000
 
#define regk_iop_sw_mpu_rw_intr_grp1_mask_default   0x00000000
 
#define regk_iop_sw_mpu_rw_intr_grp2_mask_default   0x00000000
 
#define regk_iop_sw_mpu_rw_intr_grp3_mask_default   0x00000000
 
#define regk_iop_sw_mpu_rw_sw_cfg_owner_default   0x00000000
 
#define regk_iop_sw_mpu_set   0x00000001
 
#define regk_iop_sw_mpu_spu   0x00000002
 
#define regk_iop_sw_mpu_wr   0x00000003
 
#define regk_iop_sw_mpu_yes   0x00000001
 

Macro Definition Documentation

#define REG_ADDR (   scope,
  inst,
  reg 
)    REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)

Definition at line 41 of file iop_sw_mpu_defs_asm.h.

#define REG_ADDR_VECT (   scope,
  inst,
  reg,
  index 
)
Value:
REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
STRIDE_##scope##_##reg )

Definition at line 46 of file iop_sw_mpu_defs_asm.h.

#define REG_ADDR_VECT_X_ (   inst,
  offs,
  index,
  stride 
)    ((inst) + offs + (index) * stride)

Definition at line 49 of file iop_sw_mpu_defs_asm.h.

#define REG_ADDR_X_ (   inst,
  offs 
)    ((inst) + offs)

Definition at line 42 of file iop_sw_mpu_defs_asm.h.

#define REG_BIT (   scope,
  reg,
  field 
)    reg_##scope##_##reg##___##field##___bit

Definition at line 37 of file iop_sw_mpu_defs_asm.h.

#define REG_FIELD (   scope,
  reg,
  field,
  value 
)    REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )

Definition at line 15 of file iop_sw_mpu_defs_asm.h.

#define REG_FIELD_X_ (   value,
  shift 
)    ((value) << shift)

Definition at line 17 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_bus_in_offset   52

Definition at line 165 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr0___bit   0

Definition at line 292 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr0___lsb   0

Definition at line 290 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr0___width   1

Definition at line 291 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr10___bit   10

Definition at line 322 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr10___lsb   10

Definition at line 320 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr10___width   1

Definition at line 321 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr11___bit   11

Definition at line 325 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr11___lsb   11

Definition at line 323 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr11___width   1

Definition at line 324 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr12___bit   12

Definition at line 328 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr12___lsb   12

Definition at line 326 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr12___width   1

Definition at line 327 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr13___bit   13

Definition at line 331 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr13___lsb   13

Definition at line 329 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr13___width   1

Definition at line 330 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr14___bit   14

Definition at line 334 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr14___lsb   14

Definition at line 332 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr14___width   1

Definition at line 333 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr15___bit   15

Definition at line 337 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr15___lsb   15

Definition at line 335 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr15___width   1

Definition at line 336 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr16___bit   16

Definition at line 340 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr16___lsb   16

Definition at line 338 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr16___width   1

Definition at line 339 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr17___bit   17

Definition at line 343 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr17___lsb   17

Definition at line 341 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr17___width   1

Definition at line 342 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr18___bit   18

Definition at line 346 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr18___lsb   18

Definition at line 344 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr18___width   1

Definition at line 345 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr19___bit   19

Definition at line 349 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr19___lsb   19

Definition at line 347 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr19___width   1

Definition at line 348 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr1___bit   1

Definition at line 295 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr1___lsb   1

Definition at line 293 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr1___width   1

Definition at line 294 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr20___bit   20

Definition at line 352 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr20___lsb   20

Definition at line 350 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr20___width   1

Definition at line 351 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr21___bit   21

Definition at line 355 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr21___lsb   21

Definition at line 353 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr21___width   1

Definition at line 354 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr22___bit   22

Definition at line 358 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr22___lsb   22

Definition at line 356 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr22___width   1

Definition at line 357 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr23___bit   23

Definition at line 361 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr23___lsb   23

Definition at line 359 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr23___width   1

Definition at line 360 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr24___bit   24

Definition at line 364 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr24___lsb   24

Definition at line 362 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr24___width   1

Definition at line 363 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr25___bit   25

Definition at line 367 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr25___lsb   25

Definition at line 365 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr25___width   1

Definition at line 366 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr26___bit   26

Definition at line 370 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr26___lsb   26

Definition at line 368 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr26___width   1

Definition at line 369 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr27___bit   27

Definition at line 373 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr27___lsb   27

Definition at line 371 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr27___width   1

Definition at line 372 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr28___bit   28

Definition at line 376 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr28___lsb   28

Definition at line 374 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr28___width   1

Definition at line 375 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr29___bit   29

Definition at line 379 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr29___lsb   29

Definition at line 377 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr29___width   1

Definition at line 378 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr2___bit   2

Definition at line 298 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr2___lsb   2

Definition at line 296 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr2___width   1

Definition at line 297 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr30___bit   30

Definition at line 382 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr30___lsb   30

Definition at line 380 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr30___width   1

Definition at line 381 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr31___bit   31

Definition at line 385 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr31___lsb   31

Definition at line 383 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr31___width   1

Definition at line 384 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr3___bit   3

Definition at line 301 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr3___lsb   3

Definition at line 299 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr3___width   1

Definition at line 300 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr4___bit   4

Definition at line 304 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr4___lsb   4

Definition at line 302 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr4___width   1

Definition at line 303 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr5___bit   5

Definition at line 307 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr5___lsb   5

Definition at line 305 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr5___width   1

Definition at line 306 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr6___bit   6

Definition at line 310 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr6___lsb   6

Definition at line 308 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr6___width   1

Definition at line 309 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr7___bit   7

Definition at line 313 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr7___lsb   7

Definition at line 311 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr7___width   1

Definition at line 312 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr8___bit   8

Definition at line 316 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr8___lsb   8

Definition at line 314 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr8___width   1

Definition at line 315 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr9___bit   9

Definition at line 319 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr9___lsb   9

Definition at line 317 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr___intr9___width   1

Definition at line 318 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_cpu_intr_offset   80

Definition at line 386 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_gio_in_offset   72

Definition at line 188 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___dmc_in___bit   15

Definition at line 502 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___dmc_in___lsb   15

Definition at line 500 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___dmc_in___width   1

Definition at line 501 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___dmc_out___bit   11

Definition at line 490 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___dmc_out___lsb   11

Definition at line 488 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___dmc_out___width   1

Definition at line 489 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___fifo_in___bit   7

Definition at line 478 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___fifo_in___lsb   7

Definition at line 476 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___fifo_in___width   1

Definition at line 477 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___fifo_in_extra___bit   14

Definition at line 499 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___fifo_in_extra___lsb   14

Definition at line 497 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___fifo_in_extra___width   1

Definition at line 498 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___fifo_out___bit   3

Definition at line 466 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___fifo_out___lsb   3

Definition at line 464 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___fifo_out___width   1

Definition at line 465 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___fifo_out_extra___bit   10

Definition at line 487 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___fifo_out_extra___lsb   10

Definition at line 485 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___fifo_out_extra___width   1

Definition at line 486 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___spu_intr0___bit   0

Definition at line 457 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___spu_intr0___lsb   0

Definition at line 455 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___spu_intr0___width   1

Definition at line 456 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___spu_intr1___bit   4

Definition at line 469 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___spu_intr1___lsb   4

Definition at line 467 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___spu_intr1___width   1

Definition at line 468 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___spu_intr2___bit   8

Definition at line 481 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___spu_intr2___lsb   8

Definition at line 479 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___spu_intr2___width   1

Definition at line 480 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___spu_intr3___bit   12

Definition at line 493 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___spu_intr3___lsb   12

Definition at line 491 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___spu_intr3___width   1

Definition at line 492 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___timer_grp0___bit   2

Definition at line 463 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___timer_grp0___lsb   2

Definition at line 461 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___timer_grp0___width   1

Definition at line 462 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___timer_grp1___bit   6

Definition at line 475 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___timer_grp1___lsb   6

Definition at line 473 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___timer_grp1___width   1

Definition at line 474 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp0___bit   1

Definition at line 460 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp0___lsb   1

Definition at line 458 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp0___width   1

Definition at line 459 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp1___bit   5

Definition at line 472 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp1___lsb   5

Definition at line 470 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp1___width   1

Definition at line 471 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp2___bit   9

Definition at line 484 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp2___lsb   9

Definition at line 482 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp2___width   1

Definition at line 483 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp3___bit   13

Definition at line 496 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp3___lsb   13

Definition at line 494 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp3___width   1

Definition at line 495 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp0_offset   92

Definition at line 503 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___dmc_in___bit   7

Definition at line 646 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___dmc_in___lsb   7

Definition at line 644 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___dmc_in___width   1

Definition at line 645 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___dmc_out___bit   3

Definition at line 634 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___dmc_out___lsb   3

Definition at line 632 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___dmc_out___width   1

Definition at line 633 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___fifo_in___bit   15

Definition at line 670 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___fifo_in___lsb   15

Definition at line 668 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___fifo_in___width   1

Definition at line 669 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___fifo_in_extra___bit   6

Definition at line 643 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___fifo_in_extra___lsb   6

Definition at line 641 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___fifo_in_extra___width   1

Definition at line 642 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___fifo_out___bit   11

Definition at line 658 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___fifo_out___lsb   11

Definition at line 656 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___fifo_out___width   1

Definition at line 657 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___fifo_out_extra___bit   2

Definition at line 631 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___fifo_out_extra___lsb   2

Definition at line 629 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___fifo_out_extra___width   1

Definition at line 630 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___spu_intr4___bit   0

Definition at line 625 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___spu_intr4___lsb   0

Definition at line 623 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___spu_intr4___width   1

Definition at line 624 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___spu_intr5___bit   4

Definition at line 637 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___spu_intr5___lsb   4

Definition at line 635 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___spu_intr5___width   1

Definition at line 636 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___spu_intr6___bit   8

Definition at line 649 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___spu_intr6___lsb   8

Definition at line 647 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___spu_intr6___width   1

Definition at line 648 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___spu_intr7___bit   12

Definition at line 661 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___spu_intr7___lsb   12

Definition at line 659 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___spu_intr7___width   1

Definition at line 660 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___timer_grp0___bit   10

Definition at line 655 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___timer_grp0___lsb   10

Definition at line 653 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___timer_grp0___width   1

Definition at line 654 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___timer_grp1___bit   14

Definition at line 667 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___timer_grp1___lsb   14

Definition at line 665 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___timer_grp1___width   1

Definition at line 666 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp4___bit   1

Definition at line 628 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp4___lsb   1

Definition at line 626 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp4___width   1

Definition at line 627 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp5___bit   5

Definition at line 640 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp5___lsb   5

Definition at line 638 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp5___width   1

Definition at line 639 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp6___bit   9

Definition at line 652 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp6___lsb   9

Definition at line 650 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp6___width   1

Definition at line 651 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp7___bit   13

Definition at line 664 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp7___lsb   13

Definition at line 662 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp7___width   1

Definition at line 663 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp1_offset   108

Definition at line 671 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___dmc_in___bit   15

Definition at line 838 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___dmc_in___lsb   15

Definition at line 836 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___dmc_in___width   1

Definition at line 837 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___dmc_out___bit   11

Definition at line 826 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___dmc_out___lsb   11

Definition at line 824 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___dmc_out___width   1

Definition at line 825 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___fifo_in___bit   7

Definition at line 814 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___fifo_in___lsb   7

Definition at line 812 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___fifo_in___width   1

Definition at line 813 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___fifo_in_extra___bit   14

Definition at line 835 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___fifo_in_extra___lsb   14

Definition at line 833 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___fifo_in_extra___width   1

Definition at line 834 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___fifo_out___bit   3

Definition at line 802 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___fifo_out___lsb   3

Definition at line 800 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___fifo_out___width   1

Definition at line 801 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___fifo_out_extra___bit   10

Definition at line 823 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___fifo_out_extra___lsb   10

Definition at line 821 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___fifo_out_extra___width   1

Definition at line 822 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___spu_intr10___bit   8

Definition at line 817 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___spu_intr10___lsb   8

Definition at line 815 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___spu_intr10___width   1

Definition at line 816 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___spu_intr11___bit   12

Definition at line 829 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___spu_intr11___lsb   12

Definition at line 827 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___spu_intr11___width   1

Definition at line 828 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___spu_intr8___bit   0

Definition at line 793 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___spu_intr8___lsb   0

Definition at line 791 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___spu_intr8___width   1

Definition at line 792 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___spu_intr9___bit   4

Definition at line 805 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___spu_intr9___lsb   4

Definition at line 803 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___spu_intr9___width   1

Definition at line 804 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___timer_grp0___bit   2

Definition at line 799 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___timer_grp0___lsb   2

Definition at line 797 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___timer_grp0___width   1

Definition at line 798 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___timer_grp1___bit   6

Definition at line 811 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___timer_grp1___lsb   6

Definition at line 809 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___timer_grp1___width   1

Definition at line 810 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp0___bit   1

Definition at line 796 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp0___lsb   1

Definition at line 794 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp0___width   1

Definition at line 795 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp1___bit   5

Definition at line 808 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp1___lsb   5

Definition at line 806 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp1___width   1

Definition at line 807 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp2___bit   9

Definition at line 820 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp2___lsb   9

Definition at line 818 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp2___width   1

Definition at line 819 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp3___bit   13

Definition at line 832 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp3___lsb   13

Definition at line 830 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp3___width   1

Definition at line 831 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp2_offset   124

Definition at line 839 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___dmc_in___bit   7

Definition at line 982 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___dmc_in___lsb   7

Definition at line 980 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___dmc_in___width   1

Definition at line 981 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___dmc_out___bit   3

Definition at line 970 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___dmc_out___lsb   3

Definition at line 968 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___dmc_out___width   1

Definition at line 969 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___fifo_in___bit   15

Definition at line 1006 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___fifo_in___lsb   15

Definition at line 1004 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___fifo_in___width   1

Definition at line 1005 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___fifo_in_extra___bit   6

Definition at line 979 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___fifo_in_extra___lsb   6

Definition at line 977 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___fifo_in_extra___width   1

Definition at line 978 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___fifo_out___bit   11

Definition at line 994 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___fifo_out___lsb   11

Definition at line 992 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___fifo_out___width   1

Definition at line 993 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___fifo_out_extra___bit   2

Definition at line 967 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___fifo_out_extra___lsb   2

Definition at line 965 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___fifo_out_extra___width   1

Definition at line 966 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___spu_intr12___bit   0

Definition at line 961 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___spu_intr12___lsb   0

Definition at line 959 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___spu_intr12___width   1

Definition at line 960 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___spu_intr13___bit   4

Definition at line 973 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___spu_intr13___lsb   4

Definition at line 971 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___spu_intr13___width   1

Definition at line 972 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___spu_intr14___bit   8

Definition at line 985 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___spu_intr14___lsb   8

Definition at line 983 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___spu_intr14___width   1

Definition at line 984 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___spu_intr15___bit   12

Definition at line 997 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___spu_intr15___lsb   12

Definition at line 995 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___spu_intr15___width   1

Definition at line 996 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___timer_grp0___bit   10

Definition at line 991 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___timer_grp0___lsb   10

Definition at line 989 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___timer_grp0___width   1

Definition at line 990 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___timer_grp1___bit   14

Definition at line 1003 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___timer_grp1___lsb   14

Definition at line 1001 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___timer_grp1___width   1

Definition at line 1002 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp4___bit   1

Definition at line 964 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp4___lsb   1

Definition at line 962 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp4___width   1

Definition at line 963 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp5___bit   5

Definition at line 976 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp5___lsb   5

Definition at line 974 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp5___width   1

Definition at line 975 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp6___bit   9

Definition at line 988 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp6___lsb   9

Definition at line 986 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp6___width   1

Definition at line 987 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp7___bit   13

Definition at line 1000 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp7___lsb   13

Definition at line 998 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp7___width   1

Definition at line 999 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_intr_grp3_offset   140

Definition at line 1007 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___dmc_in___bit   15

Definition at line 553 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___dmc_in___lsb   15

Definition at line 551 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___dmc_in___width   1

Definition at line 552 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___dmc_out___bit   11

Definition at line 541 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___dmc_out___lsb   11

Definition at line 539 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___dmc_out___width   1

Definition at line 540 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_in___bit   7

Definition at line 529 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_in___lsb   7

Definition at line 527 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_in___width   1

Definition at line 528 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_in_extra___bit   14

Definition at line 550 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_in_extra___lsb   14

Definition at line 548 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_in_extra___width   1

Definition at line 549 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_out___bit   3

Definition at line 517 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_out___lsb   3

Definition at line 515 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_out___width   1

Definition at line 516 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_out_extra___bit   10

Definition at line 538 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_out_extra___lsb   10

Definition at line 536 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_out_extra___width   1

Definition at line 537 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr0___bit   0

Definition at line 508 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr0___lsb   0

Definition at line 506 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr0___width   1

Definition at line 507 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr1___bit   4

Definition at line 520 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr1___lsb   4

Definition at line 518 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr1___width   1

Definition at line 519 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr2___bit   8

Definition at line 532 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr2___lsb   8

Definition at line 530 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr2___width   1

Definition at line 531 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr3___bit   12

Definition at line 544 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr3___lsb   12

Definition at line 542 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr3___width   1

Definition at line 543 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___timer_grp0___bit   2

Definition at line 514 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___timer_grp0___lsb   2

Definition at line 512 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___timer_grp0___width   1

Definition at line 513 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___timer_grp1___bit   6

Definition at line 526 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___timer_grp1___lsb   6

Definition at line 524 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___timer_grp1___width   1

Definition at line 525 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp0___bit   1

Definition at line 511 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp0___lsb   1

Definition at line 509 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp0___width   1

Definition at line 510 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp1___bit   5

Definition at line 523 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp1___lsb   5

Definition at line 521 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp1___width   1

Definition at line 522 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp2___bit   9

Definition at line 535 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp2___lsb   9

Definition at line 533 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp2___width   1

Definition at line 534 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp3___bit   13

Definition at line 547 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp3___lsb   13

Definition at line 545 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp3___width   1

Definition at line 546 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp0_offset   96

Definition at line 554 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___dmc_in___bit   7

Definition at line 697 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___dmc_in___lsb   7

Definition at line 695 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___dmc_in___width   1

Definition at line 696 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___dmc_out___bit   3

Definition at line 685 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___dmc_out___lsb   3

Definition at line 683 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___dmc_out___width   1

Definition at line 684 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_in___bit   15

Definition at line 721 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_in___lsb   15

Definition at line 719 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_in___width   1

Definition at line 720 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_in_extra___bit   6

Definition at line 694 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_in_extra___lsb   6

Definition at line 692 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_in_extra___width   1

Definition at line 693 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_out___bit   11

Definition at line 709 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_out___lsb   11

Definition at line 707 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_out___width   1

Definition at line 708 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_out_extra___bit   2

Definition at line 682 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_out_extra___lsb   2

Definition at line 680 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_out_extra___width   1

Definition at line 681 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr4___bit   0

Definition at line 676 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr4___lsb   0

Definition at line 674 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr4___width   1

Definition at line 675 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr5___bit   4

Definition at line 688 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr5___lsb   4

Definition at line 686 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr5___width   1

Definition at line 687 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr6___bit   8

Definition at line 700 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr6___lsb   8

Definition at line 698 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr6___width   1

Definition at line 699 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr7___bit   12

Definition at line 712 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr7___lsb   12

Definition at line 710 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr7___width   1

Definition at line 711 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___timer_grp0___bit   10

Definition at line 706 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___timer_grp0___lsb   10

Definition at line 704 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___timer_grp0___width   1

Definition at line 705 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___timer_grp1___bit   14

Definition at line 718 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___timer_grp1___lsb   14

Definition at line 716 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___timer_grp1___width   1

Definition at line 717 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp4___bit   1

Definition at line 679 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp4___lsb   1

Definition at line 677 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp4___width   1

Definition at line 678 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp5___bit   5

Definition at line 691 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp5___lsb   5

Definition at line 689 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp5___width   1

Definition at line 690 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp6___bit   9

Definition at line 703 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp6___lsb   9

Definition at line 701 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp6___width   1

Definition at line 702 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp7___bit   13

Definition at line 715 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp7___lsb   13

Definition at line 713 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp7___width   1

Definition at line 714 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp1_offset   112

Definition at line 722 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___dmc_in___bit   15

Definition at line 889 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___dmc_in___lsb   15

Definition at line 887 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___dmc_in___width   1

Definition at line 888 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___dmc_out___bit   11

Definition at line 877 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___dmc_out___lsb   11

Definition at line 875 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___dmc_out___width   1

Definition at line 876 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_in___bit   7

Definition at line 865 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_in___lsb   7

Definition at line 863 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_in___width   1

Definition at line 864 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_in_extra___bit   14

Definition at line 886 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_in_extra___lsb   14

Definition at line 884 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_in_extra___width   1

Definition at line 885 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_out___bit   3

Definition at line 853 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_out___lsb   3

Definition at line 851 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_out___width   1

Definition at line 852 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_out_extra___bit   10

Definition at line 874 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_out_extra___lsb   10

Definition at line 872 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_out_extra___width   1

Definition at line 873 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr10___bit   8

Definition at line 868 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr10___lsb   8

Definition at line 866 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr10___width   1

Definition at line 867 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr11___bit   12

Definition at line 880 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr11___lsb   12

Definition at line 878 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr11___width   1

Definition at line 879 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr8___bit   0

Definition at line 844 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr8___lsb   0

Definition at line 842 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr8___width   1

Definition at line 843 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr9___bit   4

Definition at line 856 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr9___lsb   4

Definition at line 854 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr9___width   1

Definition at line 855 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___timer_grp0___bit   2

Definition at line 850 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___timer_grp0___lsb   2

Definition at line 848 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___timer_grp0___width   1

Definition at line 849 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___timer_grp1___bit   6

Definition at line 862 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___timer_grp1___lsb   6

Definition at line 860 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___timer_grp1___width   1

Definition at line 861 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp0___bit   1

Definition at line 847 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp0___lsb   1

Definition at line 845 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp0___width   1

Definition at line 846 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp1___bit   5

Definition at line 859 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp1___lsb   5

Definition at line 857 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp1___width   1

Definition at line 858 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp2___bit   9

Definition at line 871 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp2___lsb   9

Definition at line 869 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp2___width   1

Definition at line 870 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp3___bit   13

Definition at line 883 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp3___lsb   13

Definition at line 881 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp3___width   1

Definition at line 882 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp2_offset   128

Definition at line 890 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___dmc_in___bit   7

Definition at line 1033 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___dmc_in___lsb   7

Definition at line 1031 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___dmc_in___width   1

Definition at line 1032 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___dmc_out___bit   3

Definition at line 1021 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___dmc_out___lsb   3

Definition at line 1019 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___dmc_out___width   1

Definition at line 1020 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_in___bit   15

Definition at line 1057 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_in___lsb   15

Definition at line 1055 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_in___width   1

Definition at line 1056 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_in_extra___bit   6

Definition at line 1030 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_in_extra___lsb   6

Definition at line 1028 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_in_extra___width   1

Definition at line 1029 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_out___bit   11

Definition at line 1045 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_out___lsb   11

Definition at line 1043 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_out___width   1

Definition at line 1044 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_out_extra___bit   2

Definition at line 1018 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_out_extra___lsb   2

Definition at line 1016 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_out_extra___width   1

Definition at line 1017 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr12___bit   0

Definition at line 1012 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr12___lsb   0

Definition at line 1010 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr12___width   1

Definition at line 1011 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr13___bit   4

Definition at line 1024 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr13___lsb   4

Definition at line 1022 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr13___width   1

Definition at line 1023 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr14___bit   8

Definition at line 1036 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr14___lsb   8

Definition at line 1034 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr14___width   1

Definition at line 1035 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr15___bit   12

Definition at line 1048 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr15___lsb   12

Definition at line 1046 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr15___width   1

Definition at line 1047 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___timer_grp0___bit   10

Definition at line 1042 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___timer_grp0___lsb   10

Definition at line 1040 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___timer_grp0___width   1

Definition at line 1041 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___timer_grp1___bit   14

Definition at line 1054 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___timer_grp1___lsb   14

Definition at line 1052 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___timer_grp1___width   1

Definition at line 1053 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp4___bit   1

Definition at line 1015 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp4___lsb   1

Definition at line 1013 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp4___width   1

Definition at line 1014 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp5___bit   5

Definition at line 1027 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp5___lsb   5

Definition at line 1025 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp5___width   1

Definition at line 1026 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp6___bit   9

Definition at line 1039 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp6___lsb   9

Definition at line 1037 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp6___width   1

Definition at line 1038 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp7___bit   13

Definition at line 1051 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp7___lsb   13

Definition at line 1049 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp7___width   1

Definition at line 1050 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_masked_intr_grp3_offset   144

Definition at line 1058 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_data_offset   28

Definition at line 89 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_stat___busy_cpu___bit   0

Definition at line 94 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_stat___busy_cpu___lsb   0

Definition at line 92 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_stat___busy_cpu___width   1

Definition at line 93 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_stat___busy_mpu___bit   1

Definition at line 97 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_stat___busy_mpu___lsb   1

Definition at line 95 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_stat___busy_mpu___width   1

Definition at line 96 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_stat___busy_spu___bit   2

Definition at line 100 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_stat___busy_spu___lsb   2

Definition at line 98 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_stat___busy_spu___width   1

Definition at line 99 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_stat___owned_by_cpu___bit   3

Definition at line 103 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_stat___owned_by_cpu___lsb   3

Definition at line 101 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_stat___owned_by_cpu___width   1

Definition at line 102 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_stat___owned_by_mpu___bit   4

Definition at line 106 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_stat___owned_by_mpu___lsb   4

Definition at line 104 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_stat___owned_by_mpu___width   1

Definition at line 105 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_stat___owned_by_spu___bit   5

Definition at line 109 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_stat___owned_by_spu___lsb   5

Definition at line 107 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_stat___owned_by_spu___width   1

Definition at line 108 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_mc_stat_offset   32

Definition at line 110 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_spu_fsm_trace_offset   8

Definition at line 62 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_r_spu_trace_offset   4

Definition at line 59 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rs_mc_data_offset   24

Definition at line 86 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr0___bit   0

Definition at line 442 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr0___lsb   0

Definition at line 440 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr0___width   1

Definition at line 441 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr1___bit   4

Definition at line 445 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr1___lsb   4

Definition at line 443 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr1___width   1

Definition at line 444 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr2___bit   8

Definition at line 448 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr2___lsb   8

Definition at line 446 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr2___width   1

Definition at line 447 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr3___bit   12

Definition at line 451 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr3___lsb   12

Definition at line 449 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr3___width   1

Definition at line 450 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp0_offset   88

Definition at line 452 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr4___bit   0

Definition at line 610 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr4___lsb   0

Definition at line 608 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr4___width   1

Definition at line 609 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr5___bit   4

Definition at line 613 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr5___lsb   4

Definition at line 611 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr5___width   1

Definition at line 612 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr6___bit   8

Definition at line 616 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr6___lsb   8

Definition at line 614 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr6___width   1

Definition at line 615 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr7___bit   12

Definition at line 619 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr7___lsb   12

Definition at line 617 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr7___width   1

Definition at line 618 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp1_offset   104

Definition at line 620 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr10___bit   8

Definition at line 784 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr10___lsb   8

Definition at line 782 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr10___width   1

Definition at line 783 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr11___bit   12

Definition at line 787 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr11___lsb   12

Definition at line 785 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr11___width   1

Definition at line 786 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr8___bit   0

Definition at line 778 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr8___lsb   0

Definition at line 776 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr8___width   1

Definition at line 777 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr9___bit   4

Definition at line 781 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr9___lsb   4

Definition at line 779 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr9___width   1

Definition at line 780 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp2_offset   120

Definition at line 788 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr12___bit   0

Definition at line 946 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr12___lsb   0

Definition at line 944 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr12___width   1

Definition at line 945 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr13___bit   4

Definition at line 949 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr13___lsb   4

Definition at line 947 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr13___width   1

Definition at line 948 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr14___bit   8

Definition at line 952 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr14___lsb   8

Definition at line 950 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr14___width   1

Definition at line 951 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr15___bit   12

Definition at line 955 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr15___lsb   12

Definition at line 953 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr15___width   1

Definition at line 954 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_ack_intr_grp3_offset   136

Definition at line 956 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_clr_mask___byte0___lsb   0

Definition at line 113 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_clr_mask___byte0___width   8

Definition at line 114 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_clr_mask___byte1___lsb   8

Definition at line 115 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_clr_mask___byte1___width   8

Definition at line 116 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_clr_mask___byte2___lsb   16

Definition at line 117 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_clr_mask___byte2___width   8

Definition at line 118 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_clr_mask___byte3___lsb   24

Definition at line 119 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_clr_mask___byte3___width   8

Definition at line 120 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_clr_mask_offset   36

Definition at line 121 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte0___bit   0

Definition at line 137 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte0___lsb   0

Definition at line 135 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte0___width   1

Definition at line 136 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte1___bit   1

Definition at line 140 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte1___lsb   1

Definition at line 138 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte1___width   1

Definition at line 139 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte2___bit   2

Definition at line 143 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte2___lsb   2

Definition at line 141 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte2___width   1

Definition at line 142 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte3___bit   3

Definition at line 146 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte3___lsb   3

Definition at line 144 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte3___width   1

Definition at line 145 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_clr_mask_offset   44

Definition at line 147 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte0___bit   0

Definition at line 152 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte0___lsb   0

Definition at line 150 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte0___width   1

Definition at line 151 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte1___bit   1

Definition at line 155 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte1___lsb   1

Definition at line 153 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte1___width   1

Definition at line 154 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte2___bit   2

Definition at line 158 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte2___lsb   2

Definition at line 156 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte2___width   1

Definition at line 157 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte3___bit   3

Definition at line 161 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte3___lsb   3

Definition at line 159 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte3___width   1

Definition at line 160 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_oe_set_mask_offset   48

Definition at line 162 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_set_mask___byte0___lsb   0

Definition at line 124 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_set_mask___byte0___width   8

Definition at line 125 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_set_mask___byte1___lsb   8

Definition at line 126 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_set_mask___byte1___width   8

Definition at line 127 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_set_mask___byte2___lsb   16

Definition at line 128 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_set_mask___byte2___width   8

Definition at line 129 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_set_mask___byte3___lsb   24

Definition at line 130 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_set_mask___byte3___width   8

Definition at line 131 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_bus_set_mask_offset   40

Definition at line 132 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr0___bit   0

Definition at line 193 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr0___lsb   0

Definition at line 191 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr0___width   1

Definition at line 192 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr10___bit   10

Definition at line 223 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr10___lsb   10

Definition at line 221 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr10___width   1

Definition at line 222 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr11___bit   11

Definition at line 226 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr11___lsb   11

Definition at line 224 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr11___width   1

Definition at line 225 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr12___bit   12

Definition at line 229 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr12___lsb   12

Definition at line 227 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr12___width   1

Definition at line 228 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr13___bit   13

Definition at line 232 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr13___lsb   13

Definition at line 230 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr13___width   1

Definition at line 231 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr14___bit   14

Definition at line 235 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr14___lsb   14

Definition at line 233 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr14___width   1

Definition at line 234 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr15___bit   15

Definition at line 238 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr15___lsb   15

Definition at line 236 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr15___width   1

Definition at line 237 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr16___bit   16

Definition at line 241 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr16___lsb   16

Definition at line 239 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr16___width   1

Definition at line 240 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr17___bit   17

Definition at line 244 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr17___lsb   17

Definition at line 242 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr17___width   1

Definition at line 243 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr18___bit   18

Definition at line 247 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr18___lsb   18

Definition at line 245 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr18___width   1

Definition at line 246 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr19___bit   19

Definition at line 250 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr19___lsb   19

Definition at line 248 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr19___width   1

Definition at line 249 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr1___bit   1

Definition at line 196 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr1___lsb   1

Definition at line 194 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr1___width   1

Definition at line 195 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr20___bit   20

Definition at line 253 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr20___lsb   20

Definition at line 251 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr20___width   1

Definition at line 252 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr21___bit   21

Definition at line 256 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr21___lsb   21

Definition at line 254 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr21___width   1

Definition at line 255 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr22___bit   22

Definition at line 259 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr22___lsb   22

Definition at line 257 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr22___width   1

Definition at line 258 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr23___bit   23

Definition at line 262 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr23___lsb   23

Definition at line 260 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr23___width   1

Definition at line 261 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr24___bit   24

Definition at line 265 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr24___lsb   24

Definition at line 263 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr24___width   1

Definition at line 264 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr25___bit   25

Definition at line 268 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr25___lsb   25

Definition at line 266 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr25___width   1

Definition at line 267 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr26___bit   26

Definition at line 271 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr26___lsb   26

Definition at line 269 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr26___width   1

Definition at line 270 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr27___bit   27

Definition at line 274 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr27___lsb   27

Definition at line 272 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr27___width   1

Definition at line 273 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr28___bit   28

Definition at line 277 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr28___lsb   28

Definition at line 275 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr28___width   1

Definition at line 276 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr29___bit   29

Definition at line 280 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr29___lsb   29

Definition at line 278 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr29___width   1

Definition at line 279 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr2___bit   2

Definition at line 199 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr2___lsb   2

Definition at line 197 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr2___width   1

Definition at line 198 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr30___bit   30

Definition at line 283 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr30___lsb   30

Definition at line 281 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr30___width   1

Definition at line 282 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr31___bit   31

Definition at line 286 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr31___lsb   31

Definition at line 284 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr31___width   1

Definition at line 285 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr3___bit   3

Definition at line 202 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr3___lsb   3

Definition at line 200 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr3___width   1

Definition at line 201 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr4___bit   4

Definition at line 205 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr4___lsb   4

Definition at line 203 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr4___width   1

Definition at line 204 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr5___bit   5

Definition at line 208 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr5___lsb   5

Definition at line 206 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr5___width   1

Definition at line 207 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr6___bit   6

Definition at line 211 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr6___lsb   6

Definition at line 209 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr6___width   1

Definition at line 210 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr7___bit   7

Definition at line 214 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr7___lsb   7

Definition at line 212 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr7___width   1

Definition at line 213 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr8___bit   8

Definition at line 217 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr8___lsb   8

Definition at line 215 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr8___width   1

Definition at line 216 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr9___bit   9

Definition at line 220 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr9___lsb   9

Definition at line 218 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr___intr9___width   1

Definition at line 219 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_cpu_intr_offset   76

Definition at line 287 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_gio_clr_mask___val___lsb   0

Definition at line 168 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_gio_clr_mask___val___width   32

Definition at line 169 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_gio_clr_mask_offset   56

Definition at line 170 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_gio_oe_clr_mask___val___lsb   0

Definition at line 178 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_gio_oe_clr_mask___val___width   32

Definition at line 179 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_gio_oe_clr_mask_offset   64

Definition at line 180 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_gio_oe_set_mask___val___lsb   0

Definition at line 183 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_gio_oe_set_mask___val___width   32

Definition at line 184 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_gio_oe_set_mask_offset   68

Definition at line 185 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_gio_set_mask___val___lsb   0

Definition at line 173 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_gio_set_mask___val___width   32

Definition at line 174 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_gio_set_mask_offset   60

Definition at line 175 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___dmc_in___bit   15

Definition at line 436 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___dmc_in___lsb   15

Definition at line 434 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___dmc_in___width   1

Definition at line 435 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___dmc_out___bit   11

Definition at line 424 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___dmc_out___lsb   11

Definition at line 422 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___dmc_out___width   1

Definition at line 423 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_in___bit   7

Definition at line 412 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_in___lsb   7

Definition at line 410 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_in___width   1

Definition at line 411 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_in_extra___bit   14

Definition at line 433 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_in_extra___lsb   14

Definition at line 431 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_in_extra___width   1

Definition at line 432 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_out___bit   3

Definition at line 400 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_out___lsb   3

Definition at line 398 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_out___width   1

Definition at line 399 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_out_extra___bit   10

Definition at line 421 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_out_extra___lsb   10

Definition at line 419 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_out_extra___width   1

Definition at line 420 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr0___bit   0

Definition at line 391 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr0___lsb   0

Definition at line 389 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr0___width   1

Definition at line 390 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr1___bit   4

Definition at line 403 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr1___lsb   4

Definition at line 401 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr1___width   1

Definition at line 402 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr2___bit   8

Definition at line 415 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr2___lsb   8

Definition at line 413 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr2___width   1

Definition at line 414 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr3___bit   12

Definition at line 427 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr3___lsb   12

Definition at line 425 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr3___width   1

Definition at line 426 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___timer_grp0___bit   2

Definition at line 397 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___timer_grp0___lsb   2

Definition at line 395 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___timer_grp0___width   1

Definition at line 396 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___timer_grp1___bit   6

Definition at line 409 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___timer_grp1___lsb   6

Definition at line 407 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___timer_grp1___width   1

Definition at line 408 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp0___bit   1

Definition at line 394 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp0___lsb   1

Definition at line 392 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp0___width   1

Definition at line 393 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp1___bit   5

Definition at line 406 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp1___lsb   5

Definition at line 404 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp1___width   1

Definition at line 405 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp2___bit   9

Definition at line 418 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp2___lsb   9

Definition at line 416 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp2___width   1

Definition at line 417 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp3___bit   13

Definition at line 430 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp3___lsb   13

Definition at line 428 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp3___width   1

Definition at line 429 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp0_mask_offset   84

Definition at line 437 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___dmc_in___bit   7

Definition at line 580 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___dmc_in___lsb   7

Definition at line 578 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___dmc_in___width   1

Definition at line 579 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___dmc_out___bit   3

Definition at line 568 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___dmc_out___lsb   3

Definition at line 566 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___dmc_out___width   1

Definition at line 567 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_in___bit   15

Definition at line 604 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_in___lsb   15

Definition at line 602 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_in___width   1

Definition at line 603 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_in_extra___bit   6

Definition at line 577 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_in_extra___lsb   6

Definition at line 575 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_in_extra___width   1

Definition at line 576 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_out___bit   11

Definition at line 592 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_out___lsb   11

Definition at line 590 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_out___width   1

Definition at line 591 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_out_extra___bit   2

Definition at line 565 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_out_extra___lsb   2

Definition at line 563 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_out_extra___width   1

Definition at line 564 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr4___bit   0

Definition at line 559 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr4___lsb   0

Definition at line 557 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr4___width   1

Definition at line 558 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr5___bit   4

Definition at line 571 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr5___lsb   4

Definition at line 569 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr5___width   1

Definition at line 570 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr6___bit   8

Definition at line 583 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr6___lsb   8

Definition at line 581 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr6___width   1

Definition at line 582 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr7___bit   12

Definition at line 595 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr7___lsb   12

Definition at line 593 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr7___width   1

Definition at line 594 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___timer_grp0___bit   10

Definition at line 589 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___timer_grp0___lsb   10

Definition at line 587 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___timer_grp0___width   1

Definition at line 588 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___timer_grp1___bit   14

Definition at line 601 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___timer_grp1___lsb   14

Definition at line 599 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___timer_grp1___width   1

Definition at line 600 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp4___bit   1

Definition at line 562 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp4___lsb   1

Definition at line 560 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp4___width   1

Definition at line 561 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp5___bit   5

Definition at line 574 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp5___lsb   5

Definition at line 572 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp5___width   1

Definition at line 573 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp6___bit   9

Definition at line 586 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp6___lsb   9

Definition at line 584 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp6___width   1

Definition at line 585 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp7___bit   13

Definition at line 598 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp7___lsb   13

Definition at line 596 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp7___width   1

Definition at line 597 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp1_mask_offset   100

Definition at line 605 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___dmc_in___bit   15

Definition at line 772 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___dmc_in___lsb   15

Definition at line 770 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___dmc_in___width   1

Definition at line 771 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___dmc_out___bit   11

Definition at line 760 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___dmc_out___lsb   11

Definition at line 758 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___dmc_out___width   1

Definition at line 759 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_in___bit   7

Definition at line 748 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_in___lsb   7

Definition at line 746 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_in___width   1

Definition at line 747 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_in_extra___bit   14

Definition at line 769 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_in_extra___lsb   14

Definition at line 767 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_in_extra___width   1

Definition at line 768 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_out___bit   3

Definition at line 736 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_out___lsb   3

Definition at line 734 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_out___width   1

Definition at line 735 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_out_extra___bit   10

Definition at line 757 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_out_extra___lsb   10

Definition at line 755 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_out_extra___width   1

Definition at line 756 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr10___bit   8

Definition at line 751 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr10___lsb   8

Definition at line 749 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr10___width   1

Definition at line 750 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr11___bit   12

Definition at line 763 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr11___lsb   12

Definition at line 761 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr11___width   1

Definition at line 762 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr8___bit   0

Definition at line 727 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr8___lsb   0

Definition at line 725 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr8___width   1

Definition at line 726 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr9___bit   4

Definition at line 739 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr9___lsb   4

Definition at line 737 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr9___width   1

Definition at line 738 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___timer_grp0___bit   2

Definition at line 733 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___timer_grp0___lsb   2

Definition at line 731 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___timer_grp0___width   1

Definition at line 732 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___timer_grp1___bit   6

Definition at line 745 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___timer_grp1___lsb   6

Definition at line 743 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___timer_grp1___width   1

Definition at line 744 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp0___bit   1

Definition at line 730 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp0___lsb   1

Definition at line 728 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp0___width   1

Definition at line 729 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp1___bit   5

Definition at line 742 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp1___lsb   5

Definition at line 740 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp1___width   1

Definition at line 741 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp2___bit   9

Definition at line 754 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp2___lsb   9

Definition at line 752 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp2___width   1

Definition at line 753 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp3___bit   13

Definition at line 766 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp3___lsb   13

Definition at line 764 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp3___width   1

Definition at line 765 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp2_mask_offset   116

Definition at line 773 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___dmc_in___bit   7

Definition at line 916 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___dmc_in___lsb   7

Definition at line 914 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___dmc_in___width   1

Definition at line 915 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___dmc_out___bit   3

Definition at line 904 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___dmc_out___lsb   3

Definition at line 902 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___dmc_out___width   1

Definition at line 903 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_in___bit   15

Definition at line 940 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_in___lsb   15

Definition at line 938 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_in___width   1

Definition at line 939 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_in_extra___bit   6

Definition at line 913 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_in_extra___lsb   6

Definition at line 911 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_in_extra___width   1

Definition at line 912 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_out___bit   11

Definition at line 928 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_out___lsb   11

Definition at line 926 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_out___width   1

Definition at line 927 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_out_extra___bit   2

Definition at line 901 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_out_extra___lsb   2

Definition at line 899 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_out_extra___width   1

Definition at line 900 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr12___bit   0

Definition at line 895 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr12___lsb   0

Definition at line 893 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr12___width   1

Definition at line 894 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr13___bit   4

Definition at line 907 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr13___lsb   4

Definition at line 905 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr13___width   1

Definition at line 906 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr14___bit   8

Definition at line 919 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr14___lsb   8

Definition at line 917 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr14___width   1

Definition at line 918 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr15___bit   12

Definition at line 931 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr15___lsb   12

Definition at line 929 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr15___width   1

Definition at line 930 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___timer_grp0___bit   10

Definition at line 925 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___timer_grp0___lsb   10

Definition at line 923 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___timer_grp0___width   1

Definition at line 924 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___timer_grp1___bit   14

Definition at line 937 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___timer_grp1___lsb   14

Definition at line 935 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___timer_grp1___width   1

Definition at line 936 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp4___bit   1

Definition at line 898 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp4___lsb   1

Definition at line 896 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp4___width   1

Definition at line 897 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp5___bit   5

Definition at line 910 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp5___lsb   5

Definition at line 908 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp5___width   1

Definition at line 909 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp6___bit   9

Definition at line 922 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp6___lsb   9

Definition at line 920 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp6___width   1

Definition at line 921 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp7___bit   13

Definition at line 934 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp7___lsb   13

Definition at line 932 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp7___width   1

Definition at line 933 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_intr_grp3_mask_offset   132

Definition at line 941 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_mc_addr_offset   20

Definition at line 83 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_mc_ctrl___cmd___lsb   1

Definition at line 68 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_mc_ctrl___cmd___width   2

Definition at line 69 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_mc_ctrl___keep_owner___bit   0

Definition at line 67 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_mc_ctrl___keep_owner___lsb   0

Definition at line 65 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_mc_ctrl___keep_owner___width   1

Definition at line 66 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_mc_ctrl___size___lsb   3

Definition at line 70 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_mc_ctrl___size___width   3

Definition at line 71 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_mc_ctrl___wr_spu_mem___bit   6

Definition at line 74 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_mc_ctrl___wr_spu_mem___lsb   6

Definition at line 72 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_mc_ctrl___wr_spu_mem___width   1

Definition at line 73 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_mc_ctrl_offset   12

Definition at line 75 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_mc_data___val___lsb   0

Definition at line 78 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_mc_data___val___width   32

Definition at line 79 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_mc_data_offset   16

Definition at line 80 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_sw_cfg_owner___cfg___lsb   0

Definition at line 54 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_sw_cfg_owner___cfg___width   2

Definition at line 55 of file iop_sw_mpu_defs_asm.h.

#define reg_iop_sw_mpu_rw_sw_cfg_owner_offset   0

Definition at line 56 of file iop_sw_mpu_defs_asm.h.

#define REG_LSB (   scope,
  reg,
  field 
)    reg_##scope##_##reg##___##field##___lsb

Definition at line 33 of file iop_sw_mpu_defs_asm.h.

#define REG_MASK (   scope,
  reg,
  field 
)    REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )

Definition at line 27 of file iop_sw_mpu_defs_asm.h.

#define REG_MASK_X_ (   width,
  lsb 
)    (((1 << width)-1) << lsb)

Definition at line 29 of file iop_sw_mpu_defs_asm.h.

#define REG_STATE (   scope,
  reg,
  field,
  symbolic_value 
)    REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )

Definition at line 21 of file iop_sw_mpu_defs_asm.h.

#define REG_STATE_X_ (   k,
  shift 
)    (k << shift)

Definition at line 23 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_copy   0x00000000

Definition at line 1062 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_cpu   0x00000000

Definition at line 1063 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_mpu   0x00000001

Definition at line 1064 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_no   0x00000000

Definition at line 1065 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_nop   0x00000000

Definition at line 1066 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_rd   0x00000002

Definition at line 1067 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_reg_copy   0x00000001

Definition at line 1068 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_rw_bus_clr_mask_default   0x00000000

Definition at line 1069 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_rw_bus_oe_clr_mask_default   0x00000000

Definition at line 1070 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_rw_bus_oe_set_mask_default   0x00000000

Definition at line 1071 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_rw_bus_set_mask_default   0x00000000

Definition at line 1072 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_rw_gio_clr_mask_default   0x00000000

Definition at line 1073 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_rw_gio_oe_clr_mask_default   0x00000000

Definition at line 1074 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_rw_gio_oe_set_mask_default   0x00000000

Definition at line 1075 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_rw_gio_set_mask_default   0x00000000

Definition at line 1076 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_rw_intr_grp0_mask_default   0x00000000

Definition at line 1077 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_rw_intr_grp1_mask_default   0x00000000

Definition at line 1078 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_rw_intr_grp2_mask_default   0x00000000

Definition at line 1079 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_rw_intr_grp3_mask_default   0x00000000

Definition at line 1080 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_rw_sw_cfg_owner_default   0x00000000

Definition at line 1081 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_set   0x00000001

Definition at line 1082 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_spu   0x00000002

Definition at line 1083 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_wr   0x00000003

Definition at line 1084 of file iop_sw_mpu_defs_asm.h.

#define regk_iop_sw_mpu_yes   0x00000001

Definition at line 1085 of file iop_sw_mpu_defs_asm.h.

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