Macros
#define	REG_FIELD(scope, reg, field, value) REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )

#define	REG_FIELD_X_(value, shift) ((value) << shift)

#define	REG_STATE(scope, reg, field, symbolic_value) REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )

#define	REG_STATE_X_(k, shift) (k << shift)

#define	REG_MASK(scope, reg, field) REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )

#define	REG_MASK_X_(width, lsb) (((1 << width)-1) << lsb)

#define	REG_LSB(scope, reg, field) reg_##scope##_##reg##___##field##___lsb

#define	REG_BIT(scope, reg, field) reg_##scope##_##reg##___##field##___bit

#define	REG_ADDR(scope, inst, reg) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)

#define	REG_ADDR_X_(inst, offs) ((inst) + offs)

#define	REG_ADDR_VECT(scope, inst, reg, index)

#define	REG_ADDR_VECT_X_(inst, offs, index, stride) ((inst) + offs + (index) * stride)

#define	reg_iop_sw_spu_r_mpu_trace_offset 0

#define	reg_iop_sw_spu_rw_mc_ctrl___keep_owner___lsb 0

#define	reg_iop_sw_spu_rw_mc_ctrl___keep_owner___width 1

#define	reg_iop_sw_spu_rw_mc_ctrl___keep_owner___bit 0

#define	reg_iop_sw_spu_rw_mc_ctrl___cmd___lsb 1

#define	reg_iop_sw_spu_rw_mc_ctrl___cmd___width 2

#define	reg_iop_sw_spu_rw_mc_ctrl___size___lsb 3

#define	reg_iop_sw_spu_rw_mc_ctrl___size___width 3

#define	reg_iop_sw_spu_rw_mc_ctrl___wr_spu_mem___lsb 6

#define	reg_iop_sw_spu_rw_mc_ctrl___wr_spu_mem___width 1

#define	reg_iop_sw_spu_rw_mc_ctrl___wr_spu_mem___bit 6

#define	reg_iop_sw_spu_rw_mc_ctrl_offset 4

#define	reg_iop_sw_spu_rw_mc_data___val___lsb 0

#define	reg_iop_sw_spu_rw_mc_data___val___width 32

#define	reg_iop_sw_spu_rw_mc_data_offset 8

#define	reg_iop_sw_spu_rw_mc_addr_offset 12

#define	reg_iop_sw_spu_rs_mc_data_offset 16

#define	reg_iop_sw_spu_r_mc_data_offset 20

#define	reg_iop_sw_spu_r_mc_stat___busy_cpu___lsb 0

#define	reg_iop_sw_spu_r_mc_stat___busy_cpu___width 1

#define	reg_iop_sw_spu_r_mc_stat___busy_cpu___bit 0

#define	reg_iop_sw_spu_r_mc_stat___busy_mpu___lsb 1

#define	reg_iop_sw_spu_r_mc_stat___busy_mpu___width 1

#define	reg_iop_sw_spu_r_mc_stat___busy_mpu___bit 1

#define	reg_iop_sw_spu_r_mc_stat___busy_spu___lsb 2

#define	reg_iop_sw_spu_r_mc_stat___busy_spu___width 1

#define	reg_iop_sw_spu_r_mc_stat___busy_spu___bit 2

#define	reg_iop_sw_spu_r_mc_stat___owned_by_cpu___lsb 3

#define	reg_iop_sw_spu_r_mc_stat___owned_by_cpu___width 1

#define	reg_iop_sw_spu_r_mc_stat___owned_by_cpu___bit 3

#define	reg_iop_sw_spu_r_mc_stat___owned_by_mpu___lsb 4

#define	reg_iop_sw_spu_r_mc_stat___owned_by_mpu___width 1

#define	reg_iop_sw_spu_r_mc_stat___owned_by_mpu___bit 4

#define	reg_iop_sw_spu_r_mc_stat___owned_by_spu___lsb 5

#define	reg_iop_sw_spu_r_mc_stat___owned_by_spu___width 1

#define	reg_iop_sw_spu_r_mc_stat___owned_by_spu___bit 5

#define	reg_iop_sw_spu_r_mc_stat_offset 24

#define	reg_iop_sw_spu_rw_bus_clr_mask___byte0___lsb 0

#define	reg_iop_sw_spu_rw_bus_clr_mask___byte0___width 8

#define	reg_iop_sw_spu_rw_bus_clr_mask___byte1___lsb 8

#define	reg_iop_sw_spu_rw_bus_clr_mask___byte1___width 8

#define	reg_iop_sw_spu_rw_bus_clr_mask___byte2___lsb 16

#define	reg_iop_sw_spu_rw_bus_clr_mask___byte2___width 8

#define	reg_iop_sw_spu_rw_bus_clr_mask___byte3___lsb 24

#define	reg_iop_sw_spu_rw_bus_clr_mask___byte3___width 8

#define	reg_iop_sw_spu_rw_bus_clr_mask_offset 28

#define	reg_iop_sw_spu_rw_bus_set_mask___byte0___lsb 0

#define	reg_iop_sw_spu_rw_bus_set_mask___byte0___width 8

#define	reg_iop_sw_spu_rw_bus_set_mask___byte1___lsb 8

#define	reg_iop_sw_spu_rw_bus_set_mask___byte1___width 8

#define	reg_iop_sw_spu_rw_bus_set_mask___byte2___lsb 16

#define	reg_iop_sw_spu_rw_bus_set_mask___byte2___width 8

#define	reg_iop_sw_spu_rw_bus_set_mask___byte3___lsb 24

#define	reg_iop_sw_spu_rw_bus_set_mask___byte3___width 8

#define	reg_iop_sw_spu_rw_bus_set_mask_offset 32

#define	reg_iop_sw_spu_rw_bus_oe_clr_mask___byte0___lsb 0

#define	reg_iop_sw_spu_rw_bus_oe_clr_mask___byte0___width 1

#define	reg_iop_sw_spu_rw_bus_oe_clr_mask___byte0___bit 0

#define	reg_iop_sw_spu_rw_bus_oe_clr_mask___byte1___lsb 1

#define	reg_iop_sw_spu_rw_bus_oe_clr_mask___byte1___width 1

#define	reg_iop_sw_spu_rw_bus_oe_clr_mask___byte1___bit 1

#define	reg_iop_sw_spu_rw_bus_oe_clr_mask___byte2___lsb 2

#define	reg_iop_sw_spu_rw_bus_oe_clr_mask___byte2___width 1

#define	reg_iop_sw_spu_rw_bus_oe_clr_mask___byte2___bit 2

#define	reg_iop_sw_spu_rw_bus_oe_clr_mask___byte3___lsb 3

#define	reg_iop_sw_spu_rw_bus_oe_clr_mask___byte3___width 1

#define	reg_iop_sw_spu_rw_bus_oe_clr_mask___byte3___bit 3

#define	reg_iop_sw_spu_rw_bus_oe_clr_mask_offset 36

#define	reg_iop_sw_spu_rw_bus_oe_set_mask___byte0___lsb 0

#define	reg_iop_sw_spu_rw_bus_oe_set_mask___byte0___width 1

#define	reg_iop_sw_spu_rw_bus_oe_set_mask___byte0___bit 0

#define	reg_iop_sw_spu_rw_bus_oe_set_mask___byte1___lsb 1

#define	reg_iop_sw_spu_rw_bus_oe_set_mask___byte1___width 1

#define	reg_iop_sw_spu_rw_bus_oe_set_mask___byte1___bit 1

#define	reg_iop_sw_spu_rw_bus_oe_set_mask___byte2___lsb 2

#define	reg_iop_sw_spu_rw_bus_oe_set_mask___byte2___width 1

#define	reg_iop_sw_spu_rw_bus_oe_set_mask___byte2___bit 2

#define	reg_iop_sw_spu_rw_bus_oe_set_mask___byte3___lsb 3

#define	reg_iop_sw_spu_rw_bus_oe_set_mask___byte3___width 1

#define	reg_iop_sw_spu_rw_bus_oe_set_mask___byte3___bit 3

#define	reg_iop_sw_spu_rw_bus_oe_set_mask_offset 40

#define	reg_iop_sw_spu_r_bus_in_offset 44

#define	reg_iop_sw_spu_rw_gio_clr_mask___val___lsb 0

#define	reg_iop_sw_spu_rw_gio_clr_mask___val___width 32

#define	reg_iop_sw_spu_rw_gio_clr_mask_offset 48

#define	reg_iop_sw_spu_rw_gio_set_mask___val___lsb 0

#define	reg_iop_sw_spu_rw_gio_set_mask___val___width 32

#define	reg_iop_sw_spu_rw_gio_set_mask_offset 52

#define	reg_iop_sw_spu_rw_gio_oe_clr_mask___val___lsb 0

#define	reg_iop_sw_spu_rw_gio_oe_clr_mask___val___width 32

#define	reg_iop_sw_spu_rw_gio_oe_clr_mask_offset 56

#define	reg_iop_sw_spu_rw_gio_oe_set_mask___val___lsb 0

#define	reg_iop_sw_spu_rw_gio_oe_set_mask___val___width 32

#define	reg_iop_sw_spu_rw_gio_oe_set_mask_offset 60

#define	reg_iop_sw_spu_r_gio_in_offset 64

#define	reg_iop_sw_spu_rw_bus_clr_mask_lo___byte0___lsb 0

#define	reg_iop_sw_spu_rw_bus_clr_mask_lo___byte0___width 8

#define	reg_iop_sw_spu_rw_bus_clr_mask_lo___byte1___lsb 8

#define	reg_iop_sw_spu_rw_bus_clr_mask_lo___byte1___width 8

#define	reg_iop_sw_spu_rw_bus_clr_mask_lo_offset 68

#define	reg_iop_sw_spu_rw_bus_clr_mask_hi___byte2___lsb 0

#define	reg_iop_sw_spu_rw_bus_clr_mask_hi___byte2___width 8

#define	reg_iop_sw_spu_rw_bus_clr_mask_hi___byte3___lsb 8

#define	reg_iop_sw_spu_rw_bus_clr_mask_hi___byte3___width 8

#define	reg_iop_sw_spu_rw_bus_clr_mask_hi_offset 72

#define	reg_iop_sw_spu_rw_bus_set_mask_lo___byte0___lsb 0

#define	reg_iop_sw_spu_rw_bus_set_mask_lo___byte0___width 8

#define	reg_iop_sw_spu_rw_bus_set_mask_lo___byte1___lsb 8

#define	reg_iop_sw_spu_rw_bus_set_mask_lo___byte1___width 8

#define	reg_iop_sw_spu_rw_bus_set_mask_lo_offset 76

#define	reg_iop_sw_spu_rw_bus_set_mask_hi___byte2___lsb 0

#define	reg_iop_sw_spu_rw_bus_set_mask_hi___byte2___width 8

#define	reg_iop_sw_spu_rw_bus_set_mask_hi___byte3___lsb 8

#define	reg_iop_sw_spu_rw_bus_set_mask_hi___byte3___width 8

#define	reg_iop_sw_spu_rw_bus_set_mask_hi_offset 80

#define	reg_iop_sw_spu_rw_gio_clr_mask_lo___val___lsb 0

#define	reg_iop_sw_spu_rw_gio_clr_mask_lo___val___width 16

#define	reg_iop_sw_spu_rw_gio_clr_mask_lo_offset 84

#define	reg_iop_sw_spu_rw_gio_clr_mask_hi___val___lsb 0

#define	reg_iop_sw_spu_rw_gio_clr_mask_hi___val___width 16

#define	reg_iop_sw_spu_rw_gio_clr_mask_hi_offset 88

#define	reg_iop_sw_spu_rw_gio_set_mask_lo___val___lsb 0

#define	reg_iop_sw_spu_rw_gio_set_mask_lo___val___width 16

#define	reg_iop_sw_spu_rw_gio_set_mask_lo_offset 92

#define	reg_iop_sw_spu_rw_gio_set_mask_hi___val___lsb 0

#define	reg_iop_sw_spu_rw_gio_set_mask_hi___val___width 16

#define	reg_iop_sw_spu_rw_gio_set_mask_hi_offset 96

#define	reg_iop_sw_spu_rw_gio_oe_clr_mask_lo___val___lsb 0

#define	reg_iop_sw_spu_rw_gio_oe_clr_mask_lo___val___width 16

#define	reg_iop_sw_spu_rw_gio_oe_clr_mask_lo_offset 100

#define	reg_iop_sw_spu_rw_gio_oe_clr_mask_hi___val___lsb 0

#define	reg_iop_sw_spu_rw_gio_oe_clr_mask_hi___val___width 16

#define	reg_iop_sw_spu_rw_gio_oe_clr_mask_hi_offset 104

#define	reg_iop_sw_spu_rw_gio_oe_set_mask_lo___val___lsb 0

#define	reg_iop_sw_spu_rw_gio_oe_set_mask_lo___val___width 16

#define	reg_iop_sw_spu_rw_gio_oe_set_mask_lo_offset 108

#define	reg_iop_sw_spu_rw_gio_oe_set_mask_hi___val___lsb 0

#define	reg_iop_sw_spu_rw_gio_oe_set_mask_hi___val___width 16

#define	reg_iop_sw_spu_rw_gio_oe_set_mask_hi_offset 112

#define	reg_iop_sw_spu_rw_cpu_intr___intr0___lsb 0

#define	reg_iop_sw_spu_rw_cpu_intr___intr0___width 1

#define	reg_iop_sw_spu_rw_cpu_intr___intr0___bit 0

#define	reg_iop_sw_spu_rw_cpu_intr___intr1___lsb 1

#define	reg_iop_sw_spu_rw_cpu_intr___intr1___width 1

#define	reg_iop_sw_spu_rw_cpu_intr___intr1___bit 1

#define	reg_iop_sw_spu_rw_cpu_intr___intr2___lsb 2

#define	reg_iop_sw_spu_rw_cpu_intr___intr2___width 1

#define	reg_iop_sw_spu_rw_cpu_intr___intr2___bit 2

#define	reg_iop_sw_spu_rw_cpu_intr___intr3___lsb 3

#define	reg_iop_sw_spu_rw_cpu_intr___intr3___width 1

#define	reg_iop_sw_spu_rw_cpu_intr___intr3___bit 3

#define	reg_iop_sw_spu_rw_cpu_intr___intr4___lsb 4

#define	reg_iop_sw_spu_rw_cpu_intr___intr4___width 1

#define	reg_iop_sw_spu_rw_cpu_intr___intr4___bit 4

#define	reg_iop_sw_spu_rw_cpu_intr___intr5___lsb 5

#define	reg_iop_sw_spu_rw_cpu_intr___intr5___width 1

#define	reg_iop_sw_spu_rw_cpu_intr___intr5___bit 5

#define	reg_iop_sw_spu_rw_cpu_intr___intr6___lsb 6

#define	reg_iop_sw_spu_rw_cpu_intr___intr6___width 1

#define	reg_iop_sw_spu_rw_cpu_intr___intr6___bit 6

#define	reg_iop_sw_spu_rw_cpu_intr___intr7___lsb 7

#define	reg_iop_sw_spu_rw_cpu_intr___intr7___width 1

#define	reg_iop_sw_spu_rw_cpu_intr___intr7___bit 7

#define	reg_iop_sw_spu_rw_cpu_intr___intr8___lsb 8

#define	reg_iop_sw_spu_rw_cpu_intr___intr8___width 1

#define	reg_iop_sw_spu_rw_cpu_intr___intr8___bit 8

#define	reg_iop_sw_spu_rw_cpu_intr___intr9___lsb 9

#define	reg_iop_sw_spu_rw_cpu_intr___intr9___width 1

#define	reg_iop_sw_spu_rw_cpu_intr___intr9___bit 9

#define	reg_iop_sw_spu_rw_cpu_intr___intr10___lsb 10

#define	reg_iop_sw_spu_rw_cpu_intr___intr10___width 1

#define	reg_iop_sw_spu_rw_cpu_intr___intr10___bit 10

#define	reg_iop_sw_spu_rw_cpu_intr___intr11___lsb 11

#define	reg_iop_sw_spu_rw_cpu_intr___intr11___width 1

#define	reg_iop_sw_spu_rw_cpu_intr___intr11___bit 11

#define	reg_iop_sw_spu_rw_cpu_intr___intr12___lsb 12

#define	reg_iop_sw_spu_rw_cpu_intr___intr12___width 1

#define	reg_iop_sw_spu_rw_cpu_intr___intr12___bit 12

#define	reg_iop_sw_spu_rw_cpu_intr___intr13___lsb 13

#define	reg_iop_sw_spu_rw_cpu_intr___intr13___width 1

#define	reg_iop_sw_spu_rw_cpu_intr___intr13___bit 13

#define	reg_iop_sw_spu_rw_cpu_intr___intr14___lsb 14

#define	reg_iop_sw_spu_rw_cpu_intr___intr14___width 1

#define	reg_iop_sw_spu_rw_cpu_intr___intr14___bit 14

#define	reg_iop_sw_spu_rw_cpu_intr___intr15___lsb 15

#define	reg_iop_sw_spu_rw_cpu_intr___intr15___width 1

#define	reg_iop_sw_spu_rw_cpu_intr___intr15___bit 15

#define	reg_iop_sw_spu_rw_cpu_intr_offset 116

#define	reg_iop_sw_spu_r_cpu_intr___intr0___lsb 0

#define	reg_iop_sw_spu_r_cpu_intr___intr0___width 1

#define	reg_iop_sw_spu_r_cpu_intr___intr0___bit 0

#define	reg_iop_sw_spu_r_cpu_intr___intr1___lsb 1

#define	reg_iop_sw_spu_r_cpu_intr___intr1___width 1

#define	reg_iop_sw_spu_r_cpu_intr___intr1___bit 1

#define	reg_iop_sw_spu_r_cpu_intr___intr2___lsb 2

#define	reg_iop_sw_spu_r_cpu_intr___intr2___width 1

#define	reg_iop_sw_spu_r_cpu_intr___intr2___bit 2

#define	reg_iop_sw_spu_r_cpu_intr___intr3___lsb 3

#define	reg_iop_sw_spu_r_cpu_intr___intr3___width 1

#define	reg_iop_sw_spu_r_cpu_intr___intr3___bit 3

#define	reg_iop_sw_spu_r_cpu_intr___intr4___lsb 4

#define	reg_iop_sw_spu_r_cpu_intr___intr4___width 1

#define	reg_iop_sw_spu_r_cpu_intr___intr4___bit 4

#define	reg_iop_sw_spu_r_cpu_intr___intr5___lsb 5

#define	reg_iop_sw_spu_r_cpu_intr___intr5___width 1

#define	reg_iop_sw_spu_r_cpu_intr___intr5___bit 5

#define	reg_iop_sw_spu_r_cpu_intr___intr6___lsb 6

#define	reg_iop_sw_spu_r_cpu_intr___intr6___width 1

#define	reg_iop_sw_spu_r_cpu_intr___intr6___bit 6

#define	reg_iop_sw_spu_r_cpu_intr___intr7___lsb 7

#define	reg_iop_sw_spu_r_cpu_intr___intr7___width 1

#define	reg_iop_sw_spu_r_cpu_intr___intr7___bit 7

#define	reg_iop_sw_spu_r_cpu_intr___intr8___lsb 8

#define	reg_iop_sw_spu_r_cpu_intr___intr8___width 1

#define	reg_iop_sw_spu_r_cpu_intr___intr8___bit 8

#define	reg_iop_sw_spu_r_cpu_intr___intr9___lsb 9

#define	reg_iop_sw_spu_r_cpu_intr___intr9___width 1

#define	reg_iop_sw_spu_r_cpu_intr___intr9___bit 9

#define	reg_iop_sw_spu_r_cpu_intr___intr10___lsb 10

#define	reg_iop_sw_spu_r_cpu_intr___intr10___width 1

#define	reg_iop_sw_spu_r_cpu_intr___intr10___bit 10

#define	reg_iop_sw_spu_r_cpu_intr___intr11___lsb 11

#define	reg_iop_sw_spu_r_cpu_intr___intr11___width 1

#define	reg_iop_sw_spu_r_cpu_intr___intr11___bit 11

#define	reg_iop_sw_spu_r_cpu_intr___intr12___lsb 12

#define	reg_iop_sw_spu_r_cpu_intr___intr12___width 1

#define	reg_iop_sw_spu_r_cpu_intr___intr12___bit 12

#define	reg_iop_sw_spu_r_cpu_intr___intr13___lsb 13

#define	reg_iop_sw_spu_r_cpu_intr___intr13___width 1

#define	reg_iop_sw_spu_r_cpu_intr___intr13___bit 13

#define	reg_iop_sw_spu_r_cpu_intr___intr14___lsb 14

#define	reg_iop_sw_spu_r_cpu_intr___intr14___width 1

#define	reg_iop_sw_spu_r_cpu_intr___intr14___bit 14

#define	reg_iop_sw_spu_r_cpu_intr___intr15___lsb 15

#define	reg_iop_sw_spu_r_cpu_intr___intr15___width 1

#define	reg_iop_sw_spu_r_cpu_intr___intr15___bit 15

#define	reg_iop_sw_spu_r_cpu_intr_offset 120

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp0___lsb 0

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp0___width 1

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp0___bit 0

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp1___lsb 1

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp1___width 1

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp1___bit 1

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp2___lsb 2

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp2___width 1

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp2___bit 2

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp3___lsb 3

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp3___width 1

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp3___bit 3

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp4___lsb 4

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp4___width 1

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp4___bit 4

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp5___lsb 5

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp5___width 1

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp5___bit 5

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp6___lsb 6

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp6___width 1

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp6___bit 6

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp7___lsb 7

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp7___width 1

#define	reg_iop_sw_spu_r_hw_intr___trigger_grp7___bit 7

#define	reg_iop_sw_spu_r_hw_intr___timer_grp0___lsb 8

#define	reg_iop_sw_spu_r_hw_intr___timer_grp0___width 1

#define	reg_iop_sw_spu_r_hw_intr___timer_grp0___bit 8

#define	reg_iop_sw_spu_r_hw_intr___timer_grp1___lsb 9

#define	reg_iop_sw_spu_r_hw_intr___timer_grp1___width 1

#define	reg_iop_sw_spu_r_hw_intr___timer_grp1___bit 9

#define	reg_iop_sw_spu_r_hw_intr___fifo_out___lsb 10

#define	reg_iop_sw_spu_r_hw_intr___fifo_out___width 1

#define	reg_iop_sw_spu_r_hw_intr___fifo_out___bit 10

#define	reg_iop_sw_spu_r_hw_intr___fifo_out_extra___lsb 11

#define	reg_iop_sw_spu_r_hw_intr___fifo_out_extra___width 1

#define	reg_iop_sw_spu_r_hw_intr___fifo_out_extra___bit 11

#define	reg_iop_sw_spu_r_hw_intr___fifo_in___lsb 12

#define	reg_iop_sw_spu_r_hw_intr___fifo_in___width 1

#define	reg_iop_sw_spu_r_hw_intr___fifo_in___bit 12

#define	reg_iop_sw_spu_r_hw_intr___fifo_in_extra___lsb 13

#define	reg_iop_sw_spu_r_hw_intr___fifo_in_extra___width 1

#define	reg_iop_sw_spu_r_hw_intr___fifo_in_extra___bit 13

#define	reg_iop_sw_spu_r_hw_intr___dmc_out___lsb 14

#define	reg_iop_sw_spu_r_hw_intr___dmc_out___width 1

#define	reg_iop_sw_spu_r_hw_intr___dmc_out___bit 14

#define	reg_iop_sw_spu_r_hw_intr___dmc_in___lsb 15

#define	reg_iop_sw_spu_r_hw_intr___dmc_in___width 1

#define	reg_iop_sw_spu_r_hw_intr___dmc_in___bit 15

#define	reg_iop_sw_spu_r_hw_intr_offset 124

#define	reg_iop_sw_spu_rw_mpu_intr___intr0___lsb 0

#define	reg_iop_sw_spu_rw_mpu_intr___intr0___width 1

#define	reg_iop_sw_spu_rw_mpu_intr___intr0___bit 0

#define	reg_iop_sw_spu_rw_mpu_intr___intr1___lsb 1

#define	reg_iop_sw_spu_rw_mpu_intr___intr1___width 1

#define	reg_iop_sw_spu_rw_mpu_intr___intr1___bit 1

#define	reg_iop_sw_spu_rw_mpu_intr___intr2___lsb 2

#define	reg_iop_sw_spu_rw_mpu_intr___intr2___width 1

#define	reg_iop_sw_spu_rw_mpu_intr___intr2___bit 2

#define	reg_iop_sw_spu_rw_mpu_intr___intr3___lsb 3

#define	reg_iop_sw_spu_rw_mpu_intr___intr3___width 1

#define	reg_iop_sw_spu_rw_mpu_intr___intr3___bit 3

#define	reg_iop_sw_spu_rw_mpu_intr___intr4___lsb 4

#define	reg_iop_sw_spu_rw_mpu_intr___intr4___width 1

#define	reg_iop_sw_spu_rw_mpu_intr___intr4___bit 4

#define	reg_iop_sw_spu_rw_mpu_intr___intr5___lsb 5

#define	reg_iop_sw_spu_rw_mpu_intr___intr5___width 1

#define	reg_iop_sw_spu_rw_mpu_intr___intr5___bit 5

#define	reg_iop_sw_spu_rw_mpu_intr___intr6___lsb 6

#define	reg_iop_sw_spu_rw_mpu_intr___intr6___width 1

#define	reg_iop_sw_spu_rw_mpu_intr___intr6___bit 6

#define	reg_iop_sw_spu_rw_mpu_intr___intr7___lsb 7

#define	reg_iop_sw_spu_rw_mpu_intr___intr7___width 1

#define	reg_iop_sw_spu_rw_mpu_intr___intr7___bit 7

#define	reg_iop_sw_spu_rw_mpu_intr___intr8___lsb 8

#define	reg_iop_sw_spu_rw_mpu_intr___intr8___width 1

#define	reg_iop_sw_spu_rw_mpu_intr___intr8___bit 8

#define	reg_iop_sw_spu_rw_mpu_intr___intr9___lsb 9

#define	reg_iop_sw_spu_rw_mpu_intr___intr9___width 1

#define	reg_iop_sw_spu_rw_mpu_intr___intr9___bit 9

#define	reg_iop_sw_spu_rw_mpu_intr___intr10___lsb 10

#define	reg_iop_sw_spu_rw_mpu_intr___intr10___width 1

#define	reg_iop_sw_spu_rw_mpu_intr___intr10___bit 10

#define	reg_iop_sw_spu_rw_mpu_intr___intr11___lsb 11

#define	reg_iop_sw_spu_rw_mpu_intr___intr11___width 1

#define	reg_iop_sw_spu_rw_mpu_intr___intr11___bit 11

#define	reg_iop_sw_spu_rw_mpu_intr___intr12___lsb 12

#define	reg_iop_sw_spu_rw_mpu_intr___intr12___width 1

#define	reg_iop_sw_spu_rw_mpu_intr___intr12___bit 12

#define	reg_iop_sw_spu_rw_mpu_intr___intr13___lsb 13

#define	reg_iop_sw_spu_rw_mpu_intr___intr13___width 1

#define	reg_iop_sw_spu_rw_mpu_intr___intr13___bit 13

#define	reg_iop_sw_spu_rw_mpu_intr___intr14___lsb 14

#define	reg_iop_sw_spu_rw_mpu_intr___intr14___width 1

#define	reg_iop_sw_spu_rw_mpu_intr___intr14___bit 14

#define	reg_iop_sw_spu_rw_mpu_intr___intr15___lsb 15

#define	reg_iop_sw_spu_rw_mpu_intr___intr15___width 1

#define	reg_iop_sw_spu_rw_mpu_intr___intr15___bit 15

#define	reg_iop_sw_spu_rw_mpu_intr_offset 128

#define	reg_iop_sw_spu_r_mpu_intr___intr0___lsb 0

#define	reg_iop_sw_spu_r_mpu_intr___intr0___width 1

#define	reg_iop_sw_spu_r_mpu_intr___intr0___bit 0

#define	reg_iop_sw_spu_r_mpu_intr___intr1___lsb 1

#define	reg_iop_sw_spu_r_mpu_intr___intr1___width 1

#define	reg_iop_sw_spu_r_mpu_intr___intr1___bit 1

#define	reg_iop_sw_spu_r_mpu_intr___intr2___lsb 2

#define	reg_iop_sw_spu_r_mpu_intr___intr2___width 1

#define	reg_iop_sw_spu_r_mpu_intr___intr2___bit 2

#define	reg_iop_sw_spu_r_mpu_intr___intr3___lsb 3

#define	reg_iop_sw_spu_r_mpu_intr___intr3___width 1

#define	reg_iop_sw_spu_r_mpu_intr___intr3___bit 3

#define	reg_iop_sw_spu_r_mpu_intr___intr4___lsb 4

#define	reg_iop_sw_spu_r_mpu_intr___intr4___width 1

#define	reg_iop_sw_spu_r_mpu_intr___intr4___bit 4

#define	reg_iop_sw_spu_r_mpu_intr___intr5___lsb 5

#define	reg_iop_sw_spu_r_mpu_intr___intr5___width 1

#define	reg_iop_sw_spu_r_mpu_intr___intr5___bit 5

#define	reg_iop_sw_spu_r_mpu_intr___intr6___lsb 6

#define	reg_iop_sw_spu_r_mpu_intr___intr6___width 1

#define	reg_iop_sw_spu_r_mpu_intr___intr6___bit 6

#define	reg_iop_sw_spu_r_mpu_intr___intr7___lsb 7

#define	reg_iop_sw_spu_r_mpu_intr___intr7___width 1

#define	reg_iop_sw_spu_r_mpu_intr___intr7___bit 7

#define	reg_iop_sw_spu_r_mpu_intr___intr8___lsb 8

#define	reg_iop_sw_spu_r_mpu_intr___intr8___width 1

#define	reg_iop_sw_spu_r_mpu_intr___intr8___bit 8

#define	reg_iop_sw_spu_r_mpu_intr___intr9___lsb 9

#define	reg_iop_sw_spu_r_mpu_intr___intr9___width 1

#define	reg_iop_sw_spu_r_mpu_intr___intr9___bit 9

#define	reg_iop_sw_spu_r_mpu_intr___intr10___lsb 10

#define	reg_iop_sw_spu_r_mpu_intr___intr10___width 1

#define	reg_iop_sw_spu_r_mpu_intr___intr10___bit 10

#define	reg_iop_sw_spu_r_mpu_intr___intr11___lsb 11

#define	reg_iop_sw_spu_r_mpu_intr___intr11___width 1

#define	reg_iop_sw_spu_r_mpu_intr___intr11___bit 11

#define	reg_iop_sw_spu_r_mpu_intr___intr12___lsb 12

#define	reg_iop_sw_spu_r_mpu_intr___intr12___width 1

#define	reg_iop_sw_spu_r_mpu_intr___intr12___bit 12

#define	reg_iop_sw_spu_r_mpu_intr___intr13___lsb 13

#define	reg_iop_sw_spu_r_mpu_intr___intr13___width 1

#define	reg_iop_sw_spu_r_mpu_intr___intr13___bit 13

#define	reg_iop_sw_spu_r_mpu_intr___intr14___lsb 14

#define	reg_iop_sw_spu_r_mpu_intr___intr14___width 1

#define	reg_iop_sw_spu_r_mpu_intr___intr14___bit 14

#define	reg_iop_sw_spu_r_mpu_intr___intr15___lsb 15

#define	reg_iop_sw_spu_r_mpu_intr___intr15___width 1

#define	reg_iop_sw_spu_r_mpu_intr___intr15___bit 15

#define	reg_iop_sw_spu_r_mpu_intr_offset 132

#define	regk_iop_sw_spu_copy 0x00000000

#define	regk_iop_sw_spu_no 0x00000000

#define	regk_iop_sw_spu_nop 0x00000000

#define	regk_iop_sw_spu_rd 0x00000002

#define	regk_iop_sw_spu_reg_copy 0x00000001

#define	regk_iop_sw_spu_rw_bus_clr_mask_default 0x00000000

#define	regk_iop_sw_spu_rw_bus_oe_clr_mask_default 0x00000000

#define	regk_iop_sw_spu_rw_bus_oe_set_mask_default 0x00000000

#define	regk_iop_sw_spu_rw_bus_set_mask_default 0x00000000

#define	regk_iop_sw_spu_rw_gio_clr_mask_default 0x00000000

#define	regk_iop_sw_spu_rw_gio_oe_clr_mask_default 0x00000000

#define	regk_iop_sw_spu_rw_gio_oe_set_mask_default 0x00000000

#define	regk_iop_sw_spu_rw_gio_set_mask_default 0x00000000

#define	regk_iop_sw_spu_set 0x00000001

#define	regk_iop_sw_spu_wr 0x00000003

#define	regk_iop_sw_spu_yes 0x00000001

Macro Definition Documentation

#define REG_ADDR	(	scope,
		inst,
		reg
	)	REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)

Definition at line 41 of file iop_sw_spu_defs_asm.h.

#define REG_ADDR_VECT	(	scope,
		inst,
		reg,
		index
	)

Value:

REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \

STRIDE_##scope##_##reg )

Definition at line 46 of file iop_sw_spu_defs_asm.h.

#define REG_ADDR_VECT_X_	(	inst,
		offs,
		index,
		stride
	)	((inst) + offs + (index) * stride)

Definition at line 49 of file iop_sw_spu_defs_asm.h.

#define REG_ADDR_X_	(	inst,
		offs
	)	((inst) + offs)

Definition at line 42 of file iop_sw_spu_defs_asm.h.

#define REG_BIT	(	scope,
		reg,
		field
	)	reg_##scope##_##reg##___##field##___bit

Definition at line 37 of file iop_sw_spu_defs_asm.h.

#define REG_FIELD	(	scope,
		reg,
		field,
		value
	)	REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )

Definition at line 15 of file iop_sw_spu_defs_asm.h.

#define REG_FIELD_X_	(	value,
		shift
	)	((value) << shift)

Definition at line 17 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_bus_in_offset 44

Definition at line 157 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr0___bit 0

Definition at line 304 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr0___lsb 0

Definition at line 302 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr0___width 1

Definition at line 303 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr10___bit 10

Definition at line 334 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr10___lsb 10

Definition at line 332 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr10___width 1

Definition at line 333 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr11___bit 11

Definition at line 337 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr11___lsb 11

Definition at line 335 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr11___width 1

Definition at line 336 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr12___bit 12

Definition at line 340 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr12___lsb 12

Definition at line 338 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr12___width 1

Definition at line 339 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr13___bit 13

Definition at line 343 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr13___lsb 13

Definition at line 341 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr13___width 1

Definition at line 342 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr14___bit 14

Definition at line 346 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr14___lsb 14

Definition at line 344 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr14___width 1

Definition at line 345 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr15___bit 15

Definition at line 349 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr15___lsb 15

Definition at line 347 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr15___width 1

Definition at line 348 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr1___bit 1

Definition at line 307 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr1___lsb 1

Definition at line 305 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr1___width 1

Definition at line 306 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr2___bit 2

Definition at line 310 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr2___lsb 2

Definition at line 308 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr2___width 1

Definition at line 309 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr3___bit 3

Definition at line 313 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr3___lsb 3

Definition at line 311 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr3___width 1

Definition at line 312 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr4___bit 4

Definition at line 316 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr4___lsb 4

Definition at line 314 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr4___width 1

Definition at line 315 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr5___bit 5

Definition at line 319 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr5___lsb 5

Definition at line 317 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr5___width 1

Definition at line 318 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr6___bit 6

Definition at line 322 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr6___lsb 6

Definition at line 320 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr6___width 1

Definition at line 321 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr7___bit 7

Definition at line 325 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr7___lsb 7

Definition at line 323 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr7___width 1

Definition at line 324 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr8___bit 8

Definition at line 328 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr8___lsb 8

Definition at line 326 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr8___width 1

Definition at line 327 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr9___bit 9

Definition at line 331 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr9___lsb 9

Definition at line 329 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr___intr9___width 1

Definition at line 330 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_cpu_intr_offset 120

Definition at line 350 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_gio_in_offset 64

Definition at line 180 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___dmc_in___bit 15

Definition at line 400 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___dmc_in___lsb 15

Definition at line 398 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___dmc_in___width 1

Definition at line 399 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___dmc_out___bit 14

Definition at line 397 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___dmc_out___lsb 14

Definition at line 395 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___dmc_out___width 1

Definition at line 396 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_in___bit 12

Definition at line 391 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_in___lsb 12

Definition at line 389 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_in___width 1

Definition at line 390 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_in_extra___bit 13

Definition at line 394 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_in_extra___lsb 13

Definition at line 392 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_in_extra___width 1

Definition at line 393 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_out___bit 10

Definition at line 385 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_out___lsb 10

Definition at line 383 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_out___width 1

Definition at line 384 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_out_extra___bit 11

Definition at line 388 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_out_extra___lsb 11

Definition at line 386 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___fifo_out_extra___width 1

Definition at line 387 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___timer_grp0___bit 8

Definition at line 379 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___timer_grp0___lsb 8

Definition at line 377 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___timer_grp0___width 1

Definition at line 378 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___timer_grp1___bit 9

Definition at line 382 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___timer_grp1___lsb 9

Definition at line 380 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___timer_grp1___width 1

Definition at line 381 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp0___bit 0

Definition at line 355 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp0___lsb 0

Definition at line 353 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp0___width 1

Definition at line 354 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp1___bit 1

Definition at line 358 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp1___lsb 1

Definition at line 356 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp1___width 1

Definition at line 357 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp2___bit 2

Definition at line 361 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp2___lsb 2

Definition at line 359 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp2___width 1

Definition at line 360 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp3___bit 3

Definition at line 364 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp3___lsb 3

Definition at line 362 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp3___width 1

Definition at line 363 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp4___bit 4

Definition at line 367 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp4___lsb 4

Definition at line 365 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp4___width 1

Definition at line 366 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp5___bit 5

Definition at line 370 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp5___lsb 5

Definition at line 368 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp5___width 1

Definition at line 369 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp6___bit 6

Definition at line 373 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp6___lsb 6

Definition at line 371 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp6___width 1

Definition at line 372 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp7___bit 7

Definition at line 376 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp7___lsb 7

Definition at line 374 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr___trigger_grp7___width 1

Definition at line 375 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_hw_intr_offset 124

Definition at line 401 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_data_offset 20

Definition at line 81 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_cpu___bit 0

Definition at line 86 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_cpu___lsb 0

Definition at line 84 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_cpu___width 1

Definition at line 85 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_mpu___bit 1

Definition at line 89 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_mpu___lsb 1

Definition at line 87 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_mpu___width 1

Definition at line 88 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_spu___bit 2

Definition at line 92 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_spu___lsb 2

Definition at line 90 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___busy_spu___width 1

Definition at line 91 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_cpu___bit 3

Definition at line 95 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_cpu___lsb 3

Definition at line 93 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_cpu___width 1

Definition at line 94 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_mpu___bit 4

Definition at line 98 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_mpu___lsb 4

Definition at line 96 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_mpu___width 1

Definition at line 97 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_spu___bit 5

Definition at line 101 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_spu___lsb 5

Definition at line 99 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat___owned_by_spu___width 1

Definition at line 100 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mc_stat_offset 24

Definition at line 102 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr0___bit 0

Definition at line 457 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr0___lsb 0

Definition at line 455 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr0___width 1

Definition at line 456 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr10___bit 10

Definition at line 487 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr10___lsb 10

Definition at line 485 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr10___width 1

Definition at line 486 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr11___bit 11

Definition at line 490 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr11___lsb 11

Definition at line 488 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr11___width 1

Definition at line 489 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr12___bit 12

Definition at line 493 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr12___lsb 12

Definition at line 491 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr12___width 1

Definition at line 492 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr13___bit 13

Definition at line 496 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr13___lsb 13

Definition at line 494 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr13___width 1

Definition at line 495 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr14___bit 14

Definition at line 499 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr14___lsb 14

Definition at line 497 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr14___width 1

Definition at line 498 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr15___bit 15

Definition at line 502 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr15___lsb 15

Definition at line 500 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr15___width 1

Definition at line 501 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr1___bit 1

Definition at line 460 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr1___lsb 1

Definition at line 458 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr1___width 1

Definition at line 459 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr2___bit 2

Definition at line 463 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr2___lsb 2

Definition at line 461 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr2___width 1

Definition at line 462 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr3___bit 3

Definition at line 466 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr3___lsb 3

Definition at line 464 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr3___width 1

Definition at line 465 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr4___bit 4

Definition at line 469 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr4___lsb 4

Definition at line 467 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr4___width 1

Definition at line 468 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr5___bit 5

Definition at line 472 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr5___lsb 5

Definition at line 470 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr5___width 1

Definition at line 471 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr6___bit 6

Definition at line 475 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr6___lsb 6

Definition at line 473 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr6___width 1

Definition at line 474 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr7___bit 7

Definition at line 478 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr7___lsb 7

Definition at line 476 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr7___width 1

Definition at line 477 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr8___bit 8

Definition at line 481 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr8___lsb 8

Definition at line 479 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr8___width 1

Definition at line 480 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr9___bit 9

Definition at line 484 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr9___lsb 9

Definition at line 482 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr___intr9___width 1

Definition at line 483 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_intr_offset 132

Definition at line 503 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_r_mpu_trace_offset 0

Definition at line 54 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rs_mc_data_offset 16

Definition at line 78 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_clr_mask___byte0___lsb 0

Definition at line 105 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_clr_mask___byte0___width 8

Definition at line 106 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_clr_mask___byte1___lsb 8

Definition at line 107 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_clr_mask___byte1___width 8

Definition at line 108 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_clr_mask___byte2___lsb 16

Definition at line 109 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_clr_mask___byte2___width 8

Definition at line 110 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_clr_mask___byte3___lsb 24

Definition at line 111 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_clr_mask___byte3___width 8

Definition at line 112 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_clr_mask_hi___byte2___lsb 0

Definition at line 190 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_clr_mask_hi___byte2___width 8

Definition at line 191 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_clr_mask_hi___byte3___lsb 8

Definition at line 192 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_clr_mask_hi___byte3___width 8

Definition at line 193 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_clr_mask_hi_offset 72

Definition at line 194 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_clr_mask_lo___byte0___lsb 0

Definition at line 183 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_clr_mask_lo___byte0___width 8

Definition at line 184 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_clr_mask_lo___byte1___lsb 8

Definition at line 185 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_clr_mask_lo___byte1___width 8

Definition at line 186 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_clr_mask_lo_offset 68

Definition at line 187 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_clr_mask_offset 28

Definition at line 113 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte0___bit 0

Definition at line 129 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte0___lsb 0

Definition at line 127 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte0___width 1

Definition at line 128 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte1___bit 1

Definition at line 132 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte1___lsb 1

Definition at line 130 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte1___width 1

Definition at line 131 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte2___bit 2

Definition at line 135 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte2___lsb 2

Definition at line 133 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte2___width 1

Definition at line 134 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte3___bit 3

Definition at line 138 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte3___lsb 3

Definition at line 136 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte3___width 1

Definition at line 137 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_clr_mask_offset 36

Definition at line 139 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte0___bit 0

Definition at line 144 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte0___lsb 0

Definition at line 142 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte0___width 1

Definition at line 143 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte1___bit 1

Definition at line 147 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte1___lsb 1

Definition at line 145 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte1___width 1

Definition at line 146 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte2___bit 2

Definition at line 150 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte2___lsb 2

Definition at line 148 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte2___width 1

Definition at line 149 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte3___bit 3

Definition at line 153 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte3___lsb 3

Definition at line 151 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte3___width 1

Definition at line 152 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_oe_set_mask_offset 40

Definition at line 154 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_set_mask___byte0___lsb 0

Definition at line 116 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_set_mask___byte0___width 8

Definition at line 117 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_set_mask___byte1___lsb 8

Definition at line 118 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_set_mask___byte1___width 8

Definition at line 119 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_set_mask___byte2___lsb 16

Definition at line 120 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_set_mask___byte2___width 8

Definition at line 121 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_set_mask___byte3___lsb 24

Definition at line 122 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_set_mask___byte3___width 8

Definition at line 123 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_set_mask_hi___byte2___lsb 0

Definition at line 204 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_set_mask_hi___byte2___width 8

Definition at line 205 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_set_mask_hi___byte3___lsb 8

Definition at line 206 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_set_mask_hi___byte3___width 8

Definition at line 207 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_set_mask_hi_offset 80

Definition at line 208 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_set_mask_lo___byte0___lsb 0

Definition at line 197 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_set_mask_lo___byte0___width 8

Definition at line 198 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_set_mask_lo___byte1___lsb 8

Definition at line 199 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_set_mask_lo___byte1___width 8

Definition at line 200 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_set_mask_lo_offset 76

Definition at line 201 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_bus_set_mask_offset 32

Definition at line 124 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr0___bit 0

Definition at line 253 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr0___lsb 0

Definition at line 251 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr0___width 1

Definition at line 252 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr10___bit 10

Definition at line 283 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr10___lsb 10

Definition at line 281 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr10___width 1

Definition at line 282 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr11___bit 11

Definition at line 286 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr11___lsb 11

Definition at line 284 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr11___width 1

Definition at line 285 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr12___bit 12

Definition at line 289 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr12___lsb 12

Definition at line 287 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr12___width 1

Definition at line 288 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr13___bit 13

Definition at line 292 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr13___lsb 13

Definition at line 290 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr13___width 1

Definition at line 291 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr14___bit 14

Definition at line 295 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr14___lsb 14

Definition at line 293 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr14___width 1

Definition at line 294 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr15___bit 15

Definition at line 298 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr15___lsb 15

Definition at line 296 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr15___width 1

Definition at line 297 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr1___bit 1

Definition at line 256 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr1___lsb 1

Definition at line 254 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr1___width 1

Definition at line 255 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr2___bit 2

Definition at line 259 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr2___lsb 2

Definition at line 257 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr2___width 1

Definition at line 258 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr3___bit 3

Definition at line 262 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr3___lsb 3

Definition at line 260 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr3___width 1

Definition at line 261 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr4___bit 4

Definition at line 265 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr4___lsb 4

Definition at line 263 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr4___width 1

Definition at line 264 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr5___bit 5

Definition at line 268 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr5___lsb 5

Definition at line 266 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr5___width 1

Definition at line 267 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr6___bit 6

Definition at line 271 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr6___lsb 6

Definition at line 269 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr6___width 1

Definition at line 270 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr7___bit 7

Definition at line 274 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr7___lsb 7

Definition at line 272 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr7___width 1

Definition at line 273 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr8___bit 8

Definition at line 277 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr8___lsb 8

Definition at line 275 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr8___width 1

Definition at line 276 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr9___bit 9

Definition at line 280 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr9___lsb 9

Definition at line 278 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr___intr9___width 1

Definition at line 279 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_cpu_intr_offset 116

Definition at line 299 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_clr_mask___val___lsb 0

Definition at line 160 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_clr_mask___val___width 32

Definition at line 161 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_clr_mask_hi___val___lsb 0

Definition at line 216 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_clr_mask_hi___val___width 16

Definition at line 217 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_clr_mask_hi_offset 88

Definition at line 218 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_clr_mask_lo___val___lsb 0

Definition at line 211 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_clr_mask_lo___val___width 16

Definition at line 212 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_clr_mask_lo_offset 84

Definition at line 213 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_clr_mask_offset 48

Definition at line 162 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_clr_mask___val___lsb 0

Definition at line 170 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_clr_mask___val___width 32

Definition at line 171 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_clr_mask_hi___val___lsb 0

Definition at line 236 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_clr_mask_hi___val___width 16

Definition at line 237 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_clr_mask_hi_offset 104

Definition at line 238 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_clr_mask_lo___val___lsb 0

Definition at line 231 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_clr_mask_lo___val___width 16

Definition at line 232 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_clr_mask_lo_offset 100

Definition at line 233 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_clr_mask_offset 56

Definition at line 172 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_set_mask___val___lsb 0

Definition at line 175 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_set_mask___val___width 32

Definition at line 176 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_set_mask_hi___val___lsb 0

Definition at line 246 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_set_mask_hi___val___width 16

Definition at line 247 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_set_mask_hi_offset 112

Definition at line 248 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_set_mask_lo___val___lsb 0

Definition at line 241 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_set_mask_lo___val___width 16

Definition at line 242 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_set_mask_lo_offset 108

Definition at line 243 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_oe_set_mask_offset 60

Definition at line 177 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_set_mask___val___lsb 0

Definition at line 165 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_set_mask___val___width 32

Definition at line 166 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_set_mask_hi___val___lsb 0

Definition at line 226 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_set_mask_hi___val___width 16

Definition at line 227 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_set_mask_hi_offset 96

Definition at line 228 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_set_mask_lo___val___lsb 0

Definition at line 221 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_set_mask_lo___val___width 16

Definition at line 222 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_set_mask_lo_offset 92

Definition at line 223 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_gio_set_mask_offset 52

Definition at line 167 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_addr_offset 12

Definition at line 75 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___cmd___lsb 1

Definition at line 60 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___cmd___width 2

Definition at line 61 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___keep_owner___bit 0

Definition at line 59 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___keep_owner___lsb 0

Definition at line 57 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___keep_owner___width 1

Definition at line 58 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___size___lsb 3

Definition at line 62 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___size___width 3

Definition at line 63 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___wr_spu_mem___bit 6

Definition at line 66 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___wr_spu_mem___lsb 6

Definition at line 64 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl___wr_spu_mem___width 1

Definition at line 65 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_ctrl_offset 4

Definition at line 67 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_data___val___lsb 0

Definition at line 70 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_data___val___width 32

Definition at line 71 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mc_data_offset 8

Definition at line 72 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr0___bit 0

Definition at line 406 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr0___lsb 0

Definition at line 404 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr0___width 1

Definition at line 405 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr10___bit 10

Definition at line 436 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr10___lsb 10

Definition at line 434 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr10___width 1

Definition at line 435 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr11___bit 11

Definition at line 439 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr11___lsb 11

Definition at line 437 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr11___width 1

Definition at line 438 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr12___bit 12

Definition at line 442 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr12___lsb 12

Definition at line 440 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr12___width 1

Definition at line 441 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr13___bit 13

Definition at line 445 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr13___lsb 13

Definition at line 443 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr13___width 1

Definition at line 444 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr14___bit 14

Definition at line 448 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr14___lsb 14

Definition at line 446 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr14___width 1

Definition at line 447 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr15___bit 15

Definition at line 451 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr15___lsb 15

Definition at line 449 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr15___width 1

Definition at line 450 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr1___bit 1

Definition at line 409 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr1___lsb 1

Definition at line 407 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr1___width 1

Definition at line 408 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr2___bit 2

Definition at line 412 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr2___lsb 2

Definition at line 410 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr2___width 1

Definition at line 411 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr3___bit 3

Definition at line 415 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr3___lsb 3

Definition at line 413 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr3___width 1

Definition at line 414 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr4___bit 4

Definition at line 418 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr4___lsb 4

Definition at line 416 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr4___width 1

Definition at line 417 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr5___bit 5

Definition at line 421 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr5___lsb 5

Definition at line 419 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr5___width 1

Definition at line 420 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr6___bit 6

Definition at line 424 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr6___lsb 6

Definition at line 422 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr6___width 1

Definition at line 423 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr7___bit 7

Definition at line 427 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr7___lsb 7

Definition at line 425 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr7___width 1

Definition at line 426 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr8___bit 8

Definition at line 430 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr8___lsb 8

Definition at line 428 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr8___width 1

Definition at line 429 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr9___bit 9

Definition at line 433 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr9___lsb 9

Definition at line 431 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr___intr9___width 1

Definition at line 432 of file iop_sw_spu_defs_asm.h.

#define reg_iop_sw_spu_rw_mpu_intr_offset 128

Definition at line 452 of file iop_sw_spu_defs_asm.h.

#define REG_LSB	(	scope,
		reg,
		field
	)	reg_##scope##_##reg##___##field##___lsb

Definition at line 33 of file iop_sw_spu_defs_asm.h.

#define REG_MASK	(	scope,
		reg,
		field
	)	REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )

Definition at line 27 of file iop_sw_spu_defs_asm.h.

#define REG_MASK_X_	(	width,
		lsb
	)	(((1 << width)-1) << lsb)

Definition at line 29 of file iop_sw_spu_defs_asm.h.

#define REG_STATE	(	scope,
		reg,
		field,
		symbolic_value
	)	REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )

Definition at line 21 of file iop_sw_spu_defs_asm.h.

#define REG_STATE_X_	(	k,
		shift
	)	(k << shift)

Definition at line 23 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_copy 0x00000000

Definition at line 507 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_no 0x00000000

Definition at line 508 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_nop 0x00000000

Definition at line 509 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rd 0x00000002

Definition at line 510 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_reg_copy 0x00000001

Definition at line 511 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_bus_clr_mask_default 0x00000000

Definition at line 512 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_bus_oe_clr_mask_default 0x00000000

Definition at line 513 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_bus_oe_set_mask_default 0x00000000

Definition at line 514 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_bus_set_mask_default 0x00000000

Definition at line 515 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_gio_clr_mask_default 0x00000000

Definition at line 516 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_gio_oe_clr_mask_default 0x00000000

Definition at line 517 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_gio_oe_set_mask_default 0x00000000

Definition at line 518 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_rw_gio_set_mask_default 0x00000000

Definition at line 519 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_set 0x00000001

Definition at line 520 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_wr 0x00000003

Definition at line 521 of file iop_sw_spu_defs_asm.h.

#define regk_iop_sw_spu_yes 0x00000001

Definition at line 522 of file iop_sw_spu_defs_asm.h.

Macros

Macro Definition Documentation