Linux Kernel
3.7.1
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Macros | |
#define | ANOMALY_05000074 (1) |
#define | ANOMALY_05000119 (1) |
#define | ANOMALY_05000122 (1) |
#define | ANOMALY_05000220 (__SILICON_REVISION__ < 4) |
#define | ANOMALY_05000245 (1) |
#define | ANOMALY_05000265 (1) |
#define | ANOMALY_05000272 (1) |
#define | ANOMALY_05000310 (1) |
#define | ANOMALY_05000325 (__SILICON_REVISION__ < 2) |
#define | ANOMALY_05000353 (1) |
#define | ANOMALY_05000357 (1) |
#define | ANOMALY_05000360 (1) |
#define | ANOMALY_05000365 (1) |
#define | ANOMALY_05000369 (1) |
#define | ANOMALY_05000371 (__SILICON_REVISION__ < 2) |
#define | ANOMALY_05000378 (__SILICON_REVISION__ < 2) |
#define | ANOMALY_05000379 (1) |
#define | ANOMALY_05000404 (__SILICON_REVISION__ < 2) |
#define | ANOMALY_05000405 (1) |
#define | ANOMALY_05000406 (__SILICON_REVISION__ < 2) |
#define | ANOMALY_05000407 (__SILICON_REVISION__ < 2) |
#define | ANOMALY_05000408 (1) |
#define | ANOMALY_05000409 (__SILICON_REVISION__ < 2) |
#define | ANOMALY_05000411 (__SILICON_REVISION__ < 2) |
#define | ANOMALY_05000413 (__SILICON_REVISION__ < 2) |
#define | ANOMALY_05000414 (__SILICON_REVISION__ < 2) |
#define | ANOMALY_05000416 (1) |
#define | ANOMALY_05000425 (__SILICON_REVISION__ < 4) |
#define | ANOMALY_05000426 (1) |
#define | ANOMALY_05000427 (__SILICON_REVISION__ < 2) |
#define | ANOMALY_05000429 (__SILICON_REVISION__ < 2) |
#define | ANOMALY_05000430 (__SILICON_REVISION__ >= 2) |
#define | ANOMALY_05000431 (__SILICON_REVISION__ < 3) |
#define | ANOMALY_05000434 (1) |
#define | ANOMALY_05000443 (1) |
#define | ANOMALY_05000446 (1) |
#define | ANOMALY_05000447 (1) |
#define | ANOMALY_05000448 (__SILICON_REVISION__ == 1) |
#define | ANOMALY_05000449 (__SILICON_REVISION__ == 1) |
#define | ANOMALY_05000450 (1) |
#define | ANOMALY_05000456 (1) |
#define | ANOMALY_05000457 (1) |
#define | ANOMALY_05000460 (__SILICON_REVISION__ < 4) |
#define | ANOMALY_05000461 (1) |
#define | ANOMALY_05000462 (__SILICON_REVISION__ < 4) |
#define | ANOMALY_05000463 (__SILICON_REVISION__ < 4) |
#define | ANOMALY_05000464 (__SILICON_REVISION__ < 4) |
#define | ANOMALY_05000465 (1) |
#define | ANOMALY_05000466 (__SILICON_REVISION__ < 4) |
#define | ANOMALY_05000467 (__SILICON_REVISION__ < 4) |
#define | ANOMALY_05000473 (1) |
#define | ANOMALY_05000474 (__SILICON_REVISION__ < 4) |
#define | ANOMALY_05000477 (1) |
#define | ANOMALY_05000481 (1) |
#define | ANOMALY_05000483 (1) |
#define | ANOMALY_05000484 (__SILICON_REVISION__ < 3) |
#define | ANOMALY_05000485 (__SILICON_REVISION__ > 1 && __SILICON_REVISION__ < 4) |
#define | ANOMALY_05000489 (1) |
#define | ANOMALY_05000490 (1) |
#define | ANOMALY_05000491 (1) |
#define | ANOMALY_05000494 (1) |
#define | ANOMALY_05000498 (1) |
#define | ANOMALY_05000500 (1) |
#define | ANOMALY_05000501 (1) |
#define | ANOMALY_05000502 (1) |
#define | ANOMALY_05000281 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000304 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000312 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000324 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000327 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000328 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000329 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000330 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000334 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000335 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000336 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000337 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000338 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000340 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000344 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000346 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000346_value 0x5411 |
#define | ANOMALY_05000347 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000349 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000351 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000355 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000356 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000367 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000370 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000372 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000382 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000385 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000386 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000387 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000388 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000389 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000390 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000391 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000392 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000393 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000394 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000395 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000396 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000397 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000442 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000452 (__SILICON_REVISION__ < 1) |
#define | ANOMALY_05000099 (0) |
#define | ANOMALY_05000120 (0) |
#define | ANOMALY_05000125 (0) |
#define | ANOMALY_05000149 (0) |
#define | ANOMALY_05000158 (0) |
#define | ANOMALY_05000171 (0) |
#define | ANOMALY_05000179 (0) |
#define | ANOMALY_05000182 (0) |
#define | ANOMALY_05000183 (0) |
#define | ANOMALY_05000189 (0) |
#define | ANOMALY_05000198 (0) |
#define | ANOMALY_05000202 (0) |
#define | ANOMALY_05000215 (0) |
#define | ANOMALY_05000219 (0) |
#define | ANOMALY_05000227 (0) |
#define | ANOMALY_05000230 (0) |
#define | ANOMALY_05000231 (0) |
#define | ANOMALY_05000233 (0) |
#define | ANOMALY_05000234 (0) |
#define | ANOMALY_05000242 (0) |
#define | ANOMALY_05000244 (0) |
#define | ANOMALY_05000248 (0) |
#define | ANOMALY_05000250 (0) |
#define | ANOMALY_05000254 (0) |
#define | ANOMALY_05000257 (0) |
#define | ANOMALY_05000261 (0) |
#define | ANOMALY_05000263 (0) |
#define | ANOMALY_05000266 (0) |
#define | ANOMALY_05000273 (0) |
#define | ANOMALY_05000274 (0) |
#define | ANOMALY_05000278 (0) |
#define | ANOMALY_05000283 (0) |
#define | ANOMALY_05000287 (0) |
#define | ANOMALY_05000301 (0) |
#define | ANOMALY_05000305 (0) |
#define | ANOMALY_05000307 (0) |
#define | ANOMALY_05000311 (0) |
#define | ANOMALY_05000315 (0) |
#define | ANOMALY_05000323 (0) |
#define | ANOMALY_05000362 (1) |
#define | ANOMALY_05000363 (0) |
#define | ANOMALY_05000364 (0) |
#define | ANOMALY_05000380 (0) |
#define | ANOMALY_05000400 (0) |
#define | ANOMALY_05000402 (0) |
#define | ANOMALY_05000412 (0) |
#define | ANOMALY_05000432 (0) |
#define | ANOMALY_05000435 (0) |
#define | ANOMALY_05000440 (0) |
#define | ANOMALY_05000475 (0) |
#define | ANOMALY_05000480 (0) |
#define ANOMALY_05000485 (__SILICON_REVISION__ > 1 && __SILICON_REVISION__ < 4) |