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Macros
regs-mem.h File Reference

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Macros

#define S3C2410_MEMREG(x)   (S3C24XX_VA_MEMCTRL + (x))
 
#define S3C2410_BWSCON   S3C2410_MEMREG(0x0000)
 
#define S3C2410_BWSCON_DW0_16   (1<<1)
 
#define S3C2410_BWSCON_DW0_32   (2<<1)
 
#define S3C2410_BWSCON_DW1_8   (0<<4)
 
#define S3C2410_BWSCON_DW1_16   (1<<4)
 
#define S3C2410_BWSCON_DW1_32   (2<<4)
 
#define S3C2410_BWSCON_WS1   (1<<6)
 
#define S3C2410_BWSCON_ST1   (1<<7)
 
#define S3C2410_BWSCON_DW2_8   (0<<8)
 
#define S3C2410_BWSCON_DW2_16   (1<<8)
 
#define S3C2410_BWSCON_DW2_32   (2<<8)
 
#define S3C2410_BWSCON_WS2   (1<<10)
 
#define S3C2410_BWSCON_ST2   (1<<11)
 
#define S3C2410_BWSCON_DW3_8   (0<<12)
 
#define S3C2410_BWSCON_DW3_16   (1<<12)
 
#define S3C2410_BWSCON_DW3_32   (2<<12)
 
#define S3C2410_BWSCON_WS3   (1<<14)
 
#define S3C2410_BWSCON_ST3   (1<<15)
 
#define S3C2410_BWSCON_DW4_8   (0<<16)
 
#define S3C2410_BWSCON_DW4_16   (1<<16)
 
#define S3C2410_BWSCON_DW4_32   (2<<16)
 
#define S3C2410_BWSCON_WS4   (1<<18)
 
#define S3C2410_BWSCON_ST4   (1<<19)
 
#define S3C2410_BWSCON_DW5_8   (0<<20)
 
#define S3C2410_BWSCON_DW5_16   (1<<20)
 
#define S3C2410_BWSCON_DW5_32   (2<<20)
 
#define S3C2410_BWSCON_WS5   (1<<22)
 
#define S3C2410_BWSCON_ST5   (1<<23)
 
#define S3C2410_BWSCON_DW6_8   (0<<24)
 
#define S3C2410_BWSCON_DW6_16   (1<<24)
 
#define S3C2410_BWSCON_DW6_32   (2<<24)
 
#define S3C2410_BWSCON_WS6   (1<<26)
 
#define S3C2410_BWSCON_ST6   (1<<27)
 
#define S3C2410_BWSCON_DW7_8   (0<<28)
 
#define S3C2410_BWSCON_DW7_16   (1<<28)
 
#define S3C2410_BWSCON_DW7_32   (2<<28)
 
#define S3C2410_BWSCON_WS7   (1<<30)
 
#define S3C2410_BWSCON_ST7   (1<<31)
 
#define S3C2410_BWSCON_GET(_bwscon, _bank)   (((_bwscon) >> ((_bank) * 4)) & 0xf)
 
#define S3C2410_BWSCON_DW8   (0)
 
#define S3C2410_BWSCON_DW16   (1)
 
#define S3C2410_BWSCON_DW32   (2)
 
#define S3C2410_BWSCON_WS   (1 << 2)
 
#define S3C2410_BWSCON_ST   (1 << 3)
 
#define S3C2410_BANKCON0   S3C2410_MEMREG(0x0004)
 
#define S3C2410_BANKCON1   S3C2410_MEMREG(0x0008)
 
#define S3C2410_BANKCON2   S3C2410_MEMREG(0x000C)
 
#define S3C2410_BANKCON3   S3C2410_MEMREG(0x0010)
 
#define S3C2410_BANKCON4   S3C2410_MEMREG(0x0014)
 
#define S3C2410_BANKCON5   S3C2410_MEMREG(0x0018)
 
#define S3C2410_BANKCON6   S3C2410_MEMREG(0x001C)
 
#define S3C2410_BANKCON7   S3C2410_MEMREG(0x0020)
 
#define S3C2410_BANKCON_PMCnorm   (0x00)
 
#define S3C2410_BANKCON_PMC4   (0x01)
 
#define S3C2410_BANKCON_PMC8   (0x02)
 
#define S3C2410_BANKCON_PMC16   (0x03)
 
#define S3C2410_BANKCON_Tacp2   (0x0 << 2)
 
#define S3C2410_BANKCON_Tacp3   (0x1 << 2)
 
#define S3C2410_BANKCON_Tacp4   (0x2 << 2)
 
#define S3C2410_BANKCON_Tacp6   (0x3 << 2)
 
#define S3C2410_BANKCON_Tacp_SHIFT   (2)
 
#define S3C2410_BANKCON_Tcah0   (0x0 << 4)
 
#define S3C2410_BANKCON_Tcah1   (0x1 << 4)
 
#define S3C2410_BANKCON_Tcah2   (0x2 << 4)
 
#define S3C2410_BANKCON_Tcah4   (0x3 << 4)
 
#define S3C2410_BANKCON_Tcah_SHIFT   (4)
 
#define S3C2410_BANKCON_Tcoh0   (0x0 << 6)
 
#define S3C2410_BANKCON_Tcoh1   (0x1 << 6)
 
#define S3C2410_BANKCON_Tcoh2   (0x2 << 6)
 
#define S3C2410_BANKCON_Tcoh4   (0x3 << 6)
 
#define S3C2410_BANKCON_Tcoh_SHIFT   (6)
 
#define S3C2410_BANKCON_Tacc1   (0x0 << 8)
 
#define S3C2410_BANKCON_Tacc2   (0x1 << 8)
 
#define S3C2410_BANKCON_Tacc3   (0x2 << 8)
 
#define S3C2410_BANKCON_Tacc4   (0x3 << 8)
 
#define S3C2410_BANKCON_Tacc6   (0x4 << 8)
 
#define S3C2410_BANKCON_Tacc8   (0x5 << 8)
 
#define S3C2410_BANKCON_Tacc10   (0x6 << 8)
 
#define S3C2410_BANKCON_Tacc14   (0x7 << 8)
 
#define S3C2410_BANKCON_Tacc_SHIFT   (8)
 
#define S3C2410_BANKCON_Tcos0   (0x0 << 11)
 
#define S3C2410_BANKCON_Tcos1   (0x1 << 11)
 
#define S3C2410_BANKCON_Tcos2   (0x2 << 11)
 
#define S3C2410_BANKCON_Tcos4   (0x3 << 11)
 
#define S3C2410_BANKCON_Tcos_SHIFT   (11)
 
#define S3C2410_BANKCON_Tacs0   (0x0 << 13)
 
#define S3C2410_BANKCON_Tacs1   (0x1 << 13)
 
#define S3C2410_BANKCON_Tacs2   (0x2 << 13)
 
#define S3C2410_BANKCON_Tacs4   (0x3 << 13)
 
#define S3C2410_BANKCON_Tacs_SHIFT   (13)
 
#define S3C2410_BANKCON_SRAM   (0x0 << 15)
 
#define S3C2410_BANKCON_SDRAM   (0x3 << 15)
 
#define S3C2410_BANKCON_Trcd2   (0x00 << 2)
 
#define S3C2410_BANKCON_Trcd3   (0x01 << 2)
 
#define S3C2410_BANKCON_Trcd4   (0x02 << 2)
 
#define S3C2410_BANKCON_SCANb8   (0x00 << 0)
 
#define S3C2410_BANKCON_SCANb9   (0x01 << 0)
 
#define S3C2410_BANKCON_SCANb10   (0x02 << 0)
 
#define S3C2410_REFRESH   S3C2410_MEMREG(0x0024)
 
#define S3C2410_BANKSIZE   S3C2410_MEMREG(0x0028)
 
#define S3C2410_MRSRB6   S3C2410_MEMREG(0x002C)
 
#define S3C2410_MRSRB7   S3C2410_MEMREG(0x0030)
 
#define S3C2410_REFRESH_REFEN   (1<<23)
 
#define S3C2410_REFRESH_SELF   (1<<22)
 
#define S3C2410_REFRESH_REFCOUNTER   ((1<<11)-1)
 
#define S3C2410_REFRESH_TRP_MASK   (3<<20)
 
#define S3C2410_REFRESH_TRP_2clk   (0<<20)
 
#define S3C2410_REFRESH_TRP_3clk   (1<<20)
 
#define S3C2410_REFRESH_TRP_4clk   (2<<20)
 
#define S3C2410_REFRESH_TSRC_MASK   (3<<18)
 
#define S3C2410_REFRESH_TSRC_4clk   (0<<18)
 
#define S3C2410_REFRESH_TSRC_5clk   (1<<18)
 
#define S3C2410_REFRESH_TSRC_6clk   (2<<18)
 
#define S3C2410_REFRESH_TSRC_7clk   (3<<18)
 
#define S3C2410_MRSRB_CL1   (0x00 << 4)
 
#define S3C2410_MRSRB_CL2   (0x02 << 4)
 
#define S3C2410_MRSRB_CL3   (0x03 << 4)
 
#define S3C2410_BANKSIZE_128M   (0x2 << 0)
 
#define S3C2410_BANKSIZE_64M   (0x1 << 0)
 
#define S3C2410_BANKSIZE_32M   (0x0 << 0)
 
#define S3C2410_BANKSIZE_16M   (0x7 << 0)
 
#define S3C2410_BANKSIZE_8M   (0x6 << 0)
 
#define S3C2410_BANKSIZE_4M   (0x5 << 0)
 
#define S3C2410_BANKSIZE_2M   (0x4 << 0)
 
#define S3C2410_BANKSIZE_MASK   (0x7 << 0)
 
#define S3C2410_BANKSIZE_SCLK_EN   (1<<4)
 
#define S3C2410_BANKSIZE_SCKE_EN   (1<<5)
 
#define S3C2410_BANKSIZE_BURST   (1<<7)
 

Macro Definition Documentation

#define S3C2410_BANKCON0   S3C2410_MEMREG(0x0004)

Definition at line 87 of file regs-mem.h.

#define S3C2410_BANKCON1   S3C2410_MEMREG(0x0008)

Definition at line 88 of file regs-mem.h.

#define S3C2410_BANKCON2   S3C2410_MEMREG(0x000C)

Definition at line 89 of file regs-mem.h.

#define S3C2410_BANKCON3   S3C2410_MEMREG(0x0010)

Definition at line 90 of file regs-mem.h.

#define S3C2410_BANKCON4   S3C2410_MEMREG(0x0014)

Definition at line 91 of file regs-mem.h.

#define S3C2410_BANKCON5   S3C2410_MEMREG(0x0018)

Definition at line 92 of file regs-mem.h.

#define S3C2410_BANKCON6   S3C2410_MEMREG(0x001C)

Definition at line 93 of file regs-mem.h.

#define S3C2410_BANKCON7   S3C2410_MEMREG(0x0020)

Definition at line 94 of file regs-mem.h.

#define S3C2410_BANKCON_PMC16   (0x03)

Definition at line 101 of file regs-mem.h.

#define S3C2410_BANKCON_PMC4   (0x01)

Definition at line 99 of file regs-mem.h.

#define S3C2410_BANKCON_PMC8   (0x02)

Definition at line 100 of file regs-mem.h.

#define S3C2410_BANKCON_PMCnorm   (0x00)

Definition at line 98 of file regs-mem.h.

#define S3C2410_BANKCON_SCANb10   (0x02 << 0)

Definition at line 158 of file regs-mem.h.

#define S3C2410_BANKCON_SCANb8   (0x00 << 0)

Definition at line 156 of file regs-mem.h.

#define S3C2410_BANKCON_SCANb9   (0x01 << 0)

Definition at line 157 of file regs-mem.h.

#define S3C2410_BANKCON_SDRAM   (0x3 << 15)

Definition at line 148 of file regs-mem.h.

#define S3C2410_BANKCON_SRAM   (0x0 << 15)

Definition at line 147 of file regs-mem.h.

#define S3C2410_BANKCON_Tacc1   (0x0 << 8)

Definition at line 125 of file regs-mem.h.

#define S3C2410_BANKCON_Tacc10   (0x6 << 8)

Definition at line 131 of file regs-mem.h.

#define S3C2410_BANKCON_Tacc14   (0x7 << 8)

Definition at line 132 of file regs-mem.h.

#define S3C2410_BANKCON_Tacc2   (0x1 << 8)

Definition at line 126 of file regs-mem.h.

#define S3C2410_BANKCON_Tacc3   (0x2 << 8)

Definition at line 127 of file regs-mem.h.

#define S3C2410_BANKCON_Tacc4   (0x3 << 8)

Definition at line 128 of file regs-mem.h.

#define S3C2410_BANKCON_Tacc6   (0x4 << 8)

Definition at line 129 of file regs-mem.h.

#define S3C2410_BANKCON_Tacc8   (0x5 << 8)

Definition at line 130 of file regs-mem.h.

#define S3C2410_BANKCON_Tacc_SHIFT   (8)

Definition at line 133 of file regs-mem.h.

#define S3C2410_BANKCON_Tacp2   (0x0 << 2)

Definition at line 107 of file regs-mem.h.

#define S3C2410_BANKCON_Tacp3   (0x1 << 2)

Definition at line 108 of file regs-mem.h.

#define S3C2410_BANKCON_Tacp4   (0x2 << 2)

Definition at line 109 of file regs-mem.h.

#define S3C2410_BANKCON_Tacp6   (0x3 << 2)

Definition at line 110 of file regs-mem.h.

#define S3C2410_BANKCON_Tacp_SHIFT   (2)

Definition at line 111 of file regs-mem.h.

#define S3C2410_BANKCON_Tacs0   (0x0 << 13)

Definition at line 141 of file regs-mem.h.

#define S3C2410_BANKCON_Tacs1   (0x1 << 13)

Definition at line 142 of file regs-mem.h.

#define S3C2410_BANKCON_Tacs2   (0x2 << 13)

Definition at line 143 of file regs-mem.h.

#define S3C2410_BANKCON_Tacs4   (0x3 << 13)

Definition at line 144 of file regs-mem.h.

#define S3C2410_BANKCON_Tacs_SHIFT   (13)

Definition at line 145 of file regs-mem.h.

#define S3C2410_BANKCON_Tcah0   (0x0 << 4)

Definition at line 113 of file regs-mem.h.

#define S3C2410_BANKCON_Tcah1   (0x1 << 4)

Definition at line 114 of file regs-mem.h.

#define S3C2410_BANKCON_Tcah2   (0x2 << 4)

Definition at line 115 of file regs-mem.h.

#define S3C2410_BANKCON_Tcah4   (0x3 << 4)

Definition at line 116 of file regs-mem.h.

#define S3C2410_BANKCON_Tcah_SHIFT   (4)

Definition at line 117 of file regs-mem.h.

#define S3C2410_BANKCON_Tcoh0   (0x0 << 6)

Definition at line 119 of file regs-mem.h.

#define S3C2410_BANKCON_Tcoh1   (0x1 << 6)

Definition at line 120 of file regs-mem.h.

#define S3C2410_BANKCON_Tcoh2   (0x2 << 6)

Definition at line 121 of file regs-mem.h.

#define S3C2410_BANKCON_Tcoh4   (0x3 << 6)

Definition at line 122 of file regs-mem.h.

#define S3C2410_BANKCON_Tcoh_SHIFT   (6)

Definition at line 123 of file regs-mem.h.

#define S3C2410_BANKCON_Tcos0   (0x0 << 11)

Definition at line 135 of file regs-mem.h.

#define S3C2410_BANKCON_Tcos1   (0x1 << 11)

Definition at line 136 of file regs-mem.h.

#define S3C2410_BANKCON_Tcos2   (0x2 << 11)

Definition at line 137 of file regs-mem.h.

#define S3C2410_BANKCON_Tcos4   (0x3 << 11)

Definition at line 138 of file regs-mem.h.

#define S3C2410_BANKCON_Tcos_SHIFT   (11)

Definition at line 139 of file regs-mem.h.

#define S3C2410_BANKCON_Trcd2   (0x00 << 2)

Definition at line 151 of file regs-mem.h.

#define S3C2410_BANKCON_Trcd3   (0x01 << 2)

Definition at line 152 of file regs-mem.h.

#define S3C2410_BANKCON_Trcd4   (0x02 << 2)

Definition at line 153 of file regs-mem.h.

#define S3C2410_BANKSIZE   S3C2410_MEMREG(0x0028)

Definition at line 161 of file regs-mem.h.

#define S3C2410_BANKSIZE_128M   (0x2 << 0)

Definition at line 190 of file regs-mem.h.

#define S3C2410_BANKSIZE_16M   (0x7 << 0)

Definition at line 193 of file regs-mem.h.

#define S3C2410_BANKSIZE_2M   (0x4 << 0)

Definition at line 196 of file regs-mem.h.

#define S3C2410_BANKSIZE_32M   (0x0 << 0)

Definition at line 192 of file regs-mem.h.

#define S3C2410_BANKSIZE_4M   (0x5 << 0)

Definition at line 195 of file regs-mem.h.

#define S3C2410_BANKSIZE_64M   (0x1 << 0)

Definition at line 191 of file regs-mem.h.

#define S3C2410_BANKSIZE_8M   (0x6 << 0)

Definition at line 194 of file regs-mem.h.

#define S3C2410_BANKSIZE_BURST   (1<<7)

Definition at line 200 of file regs-mem.h.

#define S3C2410_BANKSIZE_MASK   (0x7 << 0)

Definition at line 197 of file regs-mem.h.

#define S3C2410_BANKSIZE_SCKE_EN   (1<<5)

Definition at line 199 of file regs-mem.h.

#define S3C2410_BANKSIZE_SCLK_EN   (1<<4)

Definition at line 198 of file regs-mem.h.

#define S3C2410_BWSCON   S3C2410_MEMREG(0x0000)

Definition at line 21 of file regs-mem.h.

#define S3C2410_BWSCON_DW0_16   (1<<1)

Definition at line 24 of file regs-mem.h.

#define S3C2410_BWSCON_DW0_32   (2<<1)

Definition at line 25 of file regs-mem.h.

#define S3C2410_BWSCON_DW16   (1)

Definition at line 81 of file regs-mem.h.

#define S3C2410_BWSCON_DW1_16   (1<<4)

Definition at line 29 of file regs-mem.h.

#define S3C2410_BWSCON_DW1_32   (2<<4)

Definition at line 30 of file regs-mem.h.

#define S3C2410_BWSCON_DW1_8   (0<<4)

Definition at line 28 of file regs-mem.h.

#define S3C2410_BWSCON_DW2_16   (1<<8)

Definition at line 36 of file regs-mem.h.

#define S3C2410_BWSCON_DW2_32   (2<<8)

Definition at line 37 of file regs-mem.h.

#define S3C2410_BWSCON_DW2_8   (0<<8)

Definition at line 35 of file regs-mem.h.

#define S3C2410_BWSCON_DW32   (2)

Definition at line 82 of file regs-mem.h.

#define S3C2410_BWSCON_DW3_16   (1<<12)

Definition at line 43 of file regs-mem.h.

#define S3C2410_BWSCON_DW3_32   (2<<12)

Definition at line 44 of file regs-mem.h.

#define S3C2410_BWSCON_DW3_8   (0<<12)

Definition at line 42 of file regs-mem.h.

#define S3C2410_BWSCON_DW4_16   (1<<16)

Definition at line 50 of file regs-mem.h.

#define S3C2410_BWSCON_DW4_32   (2<<16)

Definition at line 51 of file regs-mem.h.

#define S3C2410_BWSCON_DW4_8   (0<<16)

Definition at line 49 of file regs-mem.h.

#define S3C2410_BWSCON_DW5_16   (1<<20)

Definition at line 57 of file regs-mem.h.

#define S3C2410_BWSCON_DW5_32   (2<<20)

Definition at line 58 of file regs-mem.h.

#define S3C2410_BWSCON_DW5_8   (0<<20)

Definition at line 56 of file regs-mem.h.

#define S3C2410_BWSCON_DW6_16   (1<<24)

Definition at line 64 of file regs-mem.h.

#define S3C2410_BWSCON_DW6_32   (2<<24)

Definition at line 65 of file regs-mem.h.

#define S3C2410_BWSCON_DW6_8   (0<<24)

Definition at line 63 of file regs-mem.h.

#define S3C2410_BWSCON_DW7_16   (1<<28)

Definition at line 71 of file regs-mem.h.

#define S3C2410_BWSCON_DW7_32   (2<<28)

Definition at line 72 of file regs-mem.h.

#define S3C2410_BWSCON_DW7_8   (0<<28)

Definition at line 70 of file regs-mem.h.

#define S3C2410_BWSCON_DW8   (0)

Definition at line 80 of file regs-mem.h.

#define S3C2410_BWSCON_GET (   _bwscon,
  _bank 
)    (((_bwscon) >> ((_bank) * 4)) & 0xf)

Definition at line 78 of file regs-mem.h.

#define S3C2410_BWSCON_ST   (1 << 3)

Definition at line 84 of file regs-mem.h.

#define S3C2410_BWSCON_ST1   (1<<7)

Definition at line 32 of file regs-mem.h.

#define S3C2410_BWSCON_ST2   (1<<11)

Definition at line 39 of file regs-mem.h.

#define S3C2410_BWSCON_ST3   (1<<15)

Definition at line 46 of file regs-mem.h.

#define S3C2410_BWSCON_ST4   (1<<19)

Definition at line 53 of file regs-mem.h.

#define S3C2410_BWSCON_ST5   (1<<23)

Definition at line 60 of file regs-mem.h.

#define S3C2410_BWSCON_ST6   (1<<27)

Definition at line 67 of file regs-mem.h.

#define S3C2410_BWSCON_ST7   (1<<31)

Definition at line 74 of file regs-mem.h.

#define S3C2410_BWSCON_WS   (1 << 2)

Definition at line 83 of file regs-mem.h.

#define S3C2410_BWSCON_WS1   (1<<6)

Definition at line 31 of file regs-mem.h.

#define S3C2410_BWSCON_WS2   (1<<10)

Definition at line 38 of file regs-mem.h.

#define S3C2410_BWSCON_WS3   (1<<14)

Definition at line 45 of file regs-mem.h.

#define S3C2410_BWSCON_WS4   (1<<18)

Definition at line 52 of file regs-mem.h.

#define S3C2410_BWSCON_WS5   (1<<22)

Definition at line 59 of file regs-mem.h.

#define S3C2410_BWSCON_WS6   (1<<26)

Definition at line 66 of file regs-mem.h.

#define S3C2410_BWSCON_WS7   (1<<30)

Definition at line 73 of file regs-mem.h.

#define S3C2410_MEMREG (   x)    (S3C24XX_VA_MEMCTRL + (x))

Definition at line 17 of file regs-mem.h.

#define S3C2410_MRSRB6   S3C2410_MEMREG(0x002C)

Definition at line 162 of file regs-mem.h.

#define S3C2410_MRSRB7   S3C2410_MEMREG(0x0030)

Definition at line 163 of file regs-mem.h.

#define S3C2410_MRSRB_CL1   (0x00 << 4)

Definition at line 185 of file regs-mem.h.

#define S3C2410_MRSRB_CL2   (0x02 << 4)

Definition at line 186 of file regs-mem.h.

#define S3C2410_MRSRB_CL3   (0x03 << 4)

Definition at line 187 of file regs-mem.h.

#define S3C2410_REFRESH   S3C2410_MEMREG(0x0024)

Definition at line 160 of file regs-mem.h.

#define S3C2410_REFRESH_REFCOUNTER   ((1<<11)-1)

Definition at line 169 of file regs-mem.h.

#define S3C2410_REFRESH_REFEN   (1<<23)

Definition at line 167 of file regs-mem.h.

#define S3C2410_REFRESH_SELF   (1<<22)

Definition at line 168 of file regs-mem.h.

#define S3C2410_REFRESH_TRP_2clk   (0<<20)

Definition at line 172 of file regs-mem.h.

#define S3C2410_REFRESH_TRP_3clk   (1<<20)

Definition at line 173 of file regs-mem.h.

#define S3C2410_REFRESH_TRP_4clk   (2<<20)

Definition at line 174 of file regs-mem.h.

#define S3C2410_REFRESH_TRP_MASK   (3<<20)

Definition at line 171 of file regs-mem.h.

#define S3C2410_REFRESH_TSRC_4clk   (0<<18)

Definition at line 177 of file regs-mem.h.

#define S3C2410_REFRESH_TSRC_5clk   (1<<18)

Definition at line 178 of file regs-mem.h.

#define S3C2410_REFRESH_TSRC_6clk   (2<<18)

Definition at line 179 of file regs-mem.h.

#define S3C2410_REFRESH_TSRC_7clk   (3<<18)

Definition at line 180 of file regs-mem.h.

#define S3C2410_REFRESH_TSRC_MASK   (3<<18)

Definition at line 176 of file regs-mem.h.