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mc13783-regulator.c
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1 /*
2  * Regulator Driver for Freescale MC13783 PMIC
3  *
4  * Copyright 2010 Yong Shen <[email protected]>
5  * Copyright (C) 2008 Sascha Hauer, Pengutronix <[email protected]>
6  * Copyright 2009 Alberto Panizzo <[email protected]>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 
13 #include <linux/mfd/mc13783.h>
14 #include <linux/regulator/machine.h>
15 #include <linux/regulator/driver.h>
16 #include <linux/platform_device.h>
17 #include <linux/kernel.h>
18 #include <linux/slab.h>
19 #include <linux/init.h>
20 #include <linux/err.h>
21 #include <linux/module.h>
22 #include "mc13xxx.h"
23 
24 #define MC13783_REG_SWITCHERS0 24
25 /* Enable does not exist for SW1A */
26 #define MC13783_REG_SWITCHERS0_SW1AEN 0
27 #define MC13783_REG_SWITCHERS0_SW1AVSEL 0
28 #define MC13783_REG_SWITCHERS0_SW1AVSEL_M (63 << 0)
29 
30 #define MC13783_REG_SWITCHERS1 25
31 /* Enable does not exist for SW1B */
32 #define MC13783_REG_SWITCHERS1_SW1BEN 0
33 #define MC13783_REG_SWITCHERS1_SW1BVSEL 0
34 #define MC13783_REG_SWITCHERS1_SW1BVSEL_M (63 << 0)
35 
36 #define MC13783_REG_SWITCHERS2 26
37 /* Enable does not exist for SW2A */
38 #define MC13783_REG_SWITCHERS2_SW2AEN 0
39 #define MC13783_REG_SWITCHERS2_SW2AVSEL 0
40 #define MC13783_REG_SWITCHERS2_SW2AVSEL_M (63 << 0)
41 
42 #define MC13783_REG_SWITCHERS3 27
43 /* Enable does not exist for SW2B */
44 #define MC13783_REG_SWITCHERS3_SW2BEN 0
45 #define MC13783_REG_SWITCHERS3_SW2BVSEL 0
46 #define MC13783_REG_SWITCHERS3_SW2BVSEL_M (63 << 0)
47 
48 #define MC13783_REG_SWITCHERS5 29
49 #define MC13783_REG_SWITCHERS5_SW3EN (1 << 20)
50 #define MC13783_REG_SWITCHERS5_SW3VSEL 18
51 #define MC13783_REG_SWITCHERS5_SW3VSEL_M (3 << 18)
52 
53 #define MC13783_REG_REGULATORSETTING0 30
54 #define MC13783_REG_REGULATORSETTING0_VIOLOVSEL 2
55 #define MC13783_REG_REGULATORSETTING0_VDIGVSEL 4
56 #define MC13783_REG_REGULATORSETTING0_VGENVSEL 6
57 #define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL 9
58 #define MC13783_REG_REGULATORSETTING0_VRFREFVSEL 11
59 #define MC13783_REG_REGULATORSETTING0_VRFCPVSEL 13
60 #define MC13783_REG_REGULATORSETTING0_VSIMVSEL 14
61 #define MC13783_REG_REGULATORSETTING0_VESIMVSEL 15
62 #define MC13783_REG_REGULATORSETTING0_VCAMVSEL 16
63 
64 #define MC13783_REG_REGULATORSETTING0_VIOLOVSEL_M (3 << 2)
65 #define MC13783_REG_REGULATORSETTING0_VDIGVSEL_M (3 << 4)
66 #define MC13783_REG_REGULATORSETTING0_VGENVSEL_M (7 << 6)
67 #define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL_M (3 << 9)
68 #define MC13783_REG_REGULATORSETTING0_VRFREFVSEL_M (3 << 11)
69 #define MC13783_REG_REGULATORSETTING0_VRFCPVSEL_M (1 << 13)
70 #define MC13783_REG_REGULATORSETTING0_VSIMVSEL_M (1 << 14)
71 #define MC13783_REG_REGULATORSETTING0_VESIMVSEL_M (1 << 15)
72 #define MC13783_REG_REGULATORSETTING0_VCAMVSEL_M (7 << 16)
73 
74 #define MC13783_REG_REGULATORSETTING1 31
75 #define MC13783_REG_REGULATORSETTING1_VVIBVSEL 0
76 #define MC13783_REG_REGULATORSETTING1_VRF1VSEL 2
77 #define MC13783_REG_REGULATORSETTING1_VRF2VSEL 4
78 #define MC13783_REG_REGULATORSETTING1_VMMC1VSEL 6
79 #define MC13783_REG_REGULATORSETTING1_VMMC2VSEL 9
80 
81 #define MC13783_REG_REGULATORSETTING1_VVIBVSEL_M (3 << 0)
82 #define MC13783_REG_REGULATORSETTING1_VRF1VSEL_M (3 << 2)
83 #define MC13783_REG_REGULATORSETTING1_VRF2VSEL_M (3 << 4)
84 #define MC13783_REG_REGULATORSETTING1_VMMC1VSEL_M (7 << 6)
85 #define MC13783_REG_REGULATORSETTING1_VMMC2VSEL_M (7 << 9)
86 
87 #define MC13783_REG_REGULATORMODE0 32
88 #define MC13783_REG_REGULATORMODE0_VAUDIOEN (1 << 0)
89 #define MC13783_REG_REGULATORMODE0_VIOHIEN (1 << 3)
90 #define MC13783_REG_REGULATORMODE0_VIOLOEN (1 << 6)
91 #define MC13783_REG_REGULATORMODE0_VDIGEN (1 << 9)
92 #define MC13783_REG_REGULATORMODE0_VGENEN (1 << 12)
93 #define MC13783_REG_REGULATORMODE0_VRFDIGEN (1 << 15)
94 #define MC13783_REG_REGULATORMODE0_VRFREFEN (1 << 18)
95 #define MC13783_REG_REGULATORMODE0_VRFCPEN (1 << 21)
96 
97 #define MC13783_REG_REGULATORMODE1 33
98 #define MC13783_REG_REGULATORMODE1_VSIMEN (1 << 0)
99 #define MC13783_REG_REGULATORMODE1_VESIMEN (1 << 3)
100 #define MC13783_REG_REGULATORMODE1_VCAMEN (1 << 6)
101 #define MC13783_REG_REGULATORMODE1_VRFBGEN (1 << 9)
102 #define MC13783_REG_REGULATORMODE1_VVIBEN (1 << 11)
103 #define MC13783_REG_REGULATORMODE1_VRF1EN (1 << 12)
104 #define MC13783_REG_REGULATORMODE1_VRF2EN (1 << 15)
105 #define MC13783_REG_REGULATORMODE1_VMMC1EN (1 << 18)
106 #define MC13783_REG_REGULATORMODE1_VMMC2EN (1 << 21)
107 
108 #define MC13783_REG_POWERMISC 34
109 #define MC13783_REG_POWERMISC_GPO1EN (1 << 6)
110 #define MC13783_REG_POWERMISC_GPO2EN (1 << 8)
111 #define MC13783_REG_POWERMISC_GPO3EN (1 << 10)
112 #define MC13783_REG_POWERMISC_GPO4EN (1 << 12)
113 #define MC13783_REG_POWERMISC_PWGT1SPIEN (1 << 15)
114 #define MC13783_REG_POWERMISC_PWGT2SPIEN (1 << 16)
115 
116 #define MC13783_REG_POWERMISC_PWGTSPI_M (3 << 15)
117 
118 
119 /* Voltage Values */
120 static const int mc13783_sw1x_val[] = {
121  900000, 925000, 950000, 975000,
122  1000000, 1025000, 1050000, 1075000,
123  1100000, 1125000, 1150000, 1175000,
124  1200000, 1225000, 1250000, 1275000,
125  1300000, 1325000, 1350000, 1375000,
126  1400000, 1425000, 1450000, 1475000,
127  1500000, 1525000, 1550000, 1575000,
128  1600000, 1625000, 1650000, 1675000,
129  1700000, 1700000, 1700000, 1700000,
130  1800000, 1800000, 1800000, 1800000,
131  1850000, 1850000, 1850000, 1850000,
132  2000000, 2000000, 2000000, 2000000,
133  2100000, 2100000, 2100000, 2100000,
134  2200000, 2200000, 2200000, 2200000,
135  2200000, 2200000, 2200000, 2200000,
136  2200000, 2200000, 2200000, 2200000,
137 };
138 
139 static const int mc13783_sw2x_val[] = {
140  900000, 925000, 950000, 975000,
141  1000000, 1025000, 1050000, 1075000,
142  1100000, 1125000, 1150000, 1175000,
143  1200000, 1225000, 1250000, 1275000,
144  1300000, 1325000, 1350000, 1375000,
145  1400000, 1425000, 1450000, 1475000,
146  1500000, 1525000, 1550000, 1575000,
147  1600000, 1625000, 1650000, 1675000,
148  1700000, 1700000, 1700000, 1700000,
149  1800000, 1800000, 1800000, 1800000,
150  1900000, 1900000, 1900000, 1900000,
151  2000000, 2000000, 2000000, 2000000,
152  2100000, 2100000, 2100000, 2100000,
153  2200000, 2200000, 2200000, 2200000,
154  2200000, 2200000, 2200000, 2200000,
155  2200000, 2200000, 2200000, 2200000,
156 };
157 
158 static const unsigned int mc13783_sw3_val[] = {
159  5000000, 5000000, 5000000, 5500000,
160 };
161 
162 static const unsigned int mc13783_vaudio_val[] = {
163  2775000,
164 };
165 
166 static const unsigned int mc13783_viohi_val[] = {
167  2775000,
168 };
169 
170 static const unsigned int mc13783_violo_val[] = {
171  1200000, 1300000, 1500000, 1800000,
172 };
173 
174 static const unsigned int mc13783_vdig_val[] = {
175  1200000, 1300000, 1500000, 1800000,
176 };
177 
178 static const unsigned int mc13783_vgen_val[] = {
179  1200000, 1300000, 1500000, 1800000,
180  1100000, 2000000, 2775000, 2400000,
181 };
182 
183 static const unsigned int mc13783_vrfdig_val[] = {
184  1200000, 1500000, 1800000, 1875000,
185 };
186 
187 static const unsigned int mc13783_vrfref_val[] = {
188  2475000, 2600000, 2700000, 2775000,
189 };
190 
191 static const unsigned int mc13783_vrfcp_val[] = {
192  2700000, 2775000,
193 };
194 
195 static const unsigned int mc13783_vsim_val[] = {
196  1800000, 2900000, 3000000,
197 };
198 
199 static const unsigned int mc13783_vesim_val[] = {
200  1800000, 2900000,
201 };
202 
203 static const unsigned int mc13783_vcam_val[] = {
204  1500000, 1800000, 2500000, 2550000,
205  2600000, 2750000, 2800000, 3000000,
206 };
207 
208 static const unsigned int mc13783_vrfbg_val[] = {
209  1250000,
210 };
211 
212 static const unsigned int mc13783_vvib_val[] = {
213  1300000, 1800000, 2000000, 3000000,
214 };
215 
216 static const unsigned int mc13783_vmmc_val[] = {
217  1600000, 1800000, 2000000, 2600000,
218  2700000, 2800000, 2900000, 3000000,
219 };
220 
221 static const unsigned int mc13783_vrf_val[] = {
222  1500000, 1875000, 2700000, 2775000,
223 };
224 
225 static const unsigned int mc13783_gpo_val[] = {
226  3100000,
227 };
228 
229 static const unsigned int mc13783_pwgtdrv_val[] = {
230  5500000,
231 };
232 
233 static struct regulator_ops mc13783_gpo_regulator_ops;
234 
235 #define MC13783_DEFINE(prefix, name, reg, vsel_reg, voltages) \
236  MC13xxx_DEFINE(MC13783_REG_, name, reg, vsel_reg, voltages, \
237  mc13xxx_regulator_ops)
238 
239 #define MC13783_FIXED_DEFINE(prefix, name, reg, voltages) \
240  MC13xxx_FIXED_DEFINE(MC13783_REG_, name, reg, voltages, \
241  mc13xxx_fixed_regulator_ops)
242 
243 #define MC13783_GPO_DEFINE(prefix, name, reg, voltages) \
244  MC13xxx_GPO_DEFINE(MC13783_REG_, name, reg, voltages, \
245  mc13783_gpo_regulator_ops)
246 
247 #define MC13783_DEFINE_SW(_name, _reg, _vsel_reg, _voltages) \
248  MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages)
249 #define MC13783_DEFINE_REGU(_name, _reg, _vsel_reg, _voltages) \
250  MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages)
251 
252 static struct mc13xxx_regulator mc13783_regulators[] = {
253  MC13783_DEFINE_SW(SW1A, SWITCHERS0, SWITCHERS0, mc13783_sw1x_val),
254  MC13783_DEFINE_SW(SW1B, SWITCHERS1, SWITCHERS1, mc13783_sw1x_val),
255  MC13783_DEFINE_SW(SW2A, SWITCHERS2, SWITCHERS2, mc13783_sw2x_val),
256  MC13783_DEFINE_SW(SW2B, SWITCHERS3, SWITCHERS3, mc13783_sw2x_val),
257  MC13783_DEFINE_SW(SW3, SWITCHERS5, SWITCHERS5, mc13783_sw3_val),
258 
259  MC13783_FIXED_DEFINE(REG, VAUDIO, REGULATORMODE0, mc13783_vaudio_val),
260  MC13783_FIXED_DEFINE(REG, VIOHI, REGULATORMODE0, mc13783_viohi_val),
261  MC13783_DEFINE_REGU(VIOLO, REGULATORMODE0, REGULATORSETTING0, \
262  mc13783_violo_val),
263  MC13783_DEFINE_REGU(VDIG, REGULATORMODE0, REGULATORSETTING0, \
264  mc13783_vdig_val),
265  MC13783_DEFINE_REGU(VGEN, REGULATORMODE0, REGULATORSETTING0, \
266  mc13783_vgen_val),
267  MC13783_DEFINE_REGU(VRFDIG, REGULATORMODE0, REGULATORSETTING0, \
268  mc13783_vrfdig_val),
269  MC13783_DEFINE_REGU(VRFREF, REGULATORMODE0, REGULATORSETTING0, \
270  mc13783_vrfref_val),
271  MC13783_DEFINE_REGU(VRFCP, REGULATORMODE0, REGULATORSETTING0, \
272  mc13783_vrfcp_val),
273  MC13783_DEFINE_REGU(VSIM, REGULATORMODE1, REGULATORSETTING0, \
274  mc13783_vsim_val),
275  MC13783_DEFINE_REGU(VESIM, REGULATORMODE1, REGULATORSETTING0, \
276  mc13783_vesim_val),
277  MC13783_DEFINE_REGU(VCAM, REGULATORMODE1, REGULATORSETTING0, \
278  mc13783_vcam_val),
279  MC13783_FIXED_DEFINE(REG, VRFBG, REGULATORMODE1, mc13783_vrfbg_val),
280  MC13783_DEFINE_REGU(VVIB, REGULATORMODE1, REGULATORSETTING1, \
281  mc13783_vvib_val),
282  MC13783_DEFINE_REGU(VRF1, REGULATORMODE1, REGULATORSETTING1, \
283  mc13783_vrf_val),
284  MC13783_DEFINE_REGU(VRF2, REGULATORMODE1, REGULATORSETTING1, \
285  mc13783_vrf_val),
286  MC13783_DEFINE_REGU(VMMC1, REGULATORMODE1, REGULATORSETTING1, \
287  mc13783_vmmc_val),
288  MC13783_DEFINE_REGU(VMMC2, REGULATORMODE1, REGULATORSETTING1, \
289  mc13783_vmmc_val),
290  MC13783_GPO_DEFINE(REG, GPO1, POWERMISC, mc13783_gpo_val),
291  MC13783_GPO_DEFINE(REG, GPO2, POWERMISC, mc13783_gpo_val),
292  MC13783_GPO_DEFINE(REG, GPO3, POWERMISC, mc13783_gpo_val),
293  MC13783_GPO_DEFINE(REG, GPO4, POWERMISC, mc13783_gpo_val),
294  MC13783_GPO_DEFINE(REG, PWGT1SPI, POWERMISC, mc13783_pwgtdrv_val),
295  MC13783_GPO_DEFINE(REG, PWGT2SPI, POWERMISC, mc13783_pwgtdrv_val),
296 };
297 
298 static int mc13783_powermisc_rmw(struct mc13xxx_regulator_priv *priv, u32 mask,
299  u32 val)
300 {
301  struct mc13xxx *mc13783 = priv->mc13xxx;
302  int ret;
303  u32 valread;
304 
305  BUG_ON(val & ~mask);
306 
307  mc13xxx_lock(priv->mc13xxx);
308  ret = mc13xxx_reg_read(mc13783, MC13783_REG_POWERMISC, &valread);
309  if (ret)
310  goto out;
311 
312  /* Update the stored state for Power Gates. */
313  priv->powermisc_pwgt_state =
314  (priv->powermisc_pwgt_state & ~mask) | val;
315  priv->powermisc_pwgt_state &= MC13783_REG_POWERMISC_PWGTSPI_M;
316 
317  /* Construct the new register value */
318  valread = (valread & ~mask) | val;
319  /* Overwrite the PWGTxEN with the stored version */
320  valread = (valread & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
321  priv->powermisc_pwgt_state;
322 
323  ret = mc13xxx_reg_write(mc13783, MC13783_REG_POWERMISC, valread);
324 out:
325  mc13xxx_unlock(priv->mc13xxx);
326  return ret;
327 }
328 
329 static int mc13783_gpo_regulator_enable(struct regulator_dev *rdev)
330 {
331  struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
332  struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
333  int id = rdev_get_id(rdev);
334  u32 en_val = mc13xxx_regulators[id].enable_bit;
335 
336  dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
337 
338  /* Power Gate enable value is 0 */
339  if (id == MC13783_REG_PWGT1SPI ||
340  id == MC13783_REG_PWGT2SPI)
341  en_val = 0;
342 
343  return mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit,
344  en_val);
345 }
346 
347 static int mc13783_gpo_regulator_disable(struct regulator_dev *rdev)
348 {
349  struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
350  struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
351  int id = rdev_get_id(rdev);
352  u32 dis_val = 0;
353 
354  dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
355 
356  /* Power Gate disable value is 1 */
357  if (id == MC13783_REG_PWGT1SPI ||
358  id == MC13783_REG_PWGT2SPI)
359  dis_val = mc13xxx_regulators[id].enable_bit;
360 
361  return mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit,
362  dis_val);
363 }
364 
365 static int mc13783_gpo_regulator_is_enabled(struct regulator_dev *rdev)
366 {
367  struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
368  struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
369  int ret, id = rdev_get_id(rdev);
370  unsigned int val;
371 
372  mc13xxx_lock(priv->mc13xxx);
373  ret = mc13xxx_reg_read(priv->mc13xxx, mc13xxx_regulators[id].reg, &val);
374  mc13xxx_unlock(priv->mc13xxx);
375 
376  if (ret)
377  return ret;
378 
379  /* Power Gates state is stored in powermisc_pwgt_state
380  * where the meaning of bits is negated */
381  val = (val & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
382  (priv->powermisc_pwgt_state ^ MC13783_REG_POWERMISC_PWGTSPI_M);
383 
384  return (val & mc13xxx_regulators[id].enable_bit) != 0;
385 }
386 
387 static struct regulator_ops mc13783_gpo_regulator_ops = {
388  .enable = mc13783_gpo_regulator_enable,
389  .disable = mc13783_gpo_regulator_disable,
390  .is_enabled = mc13783_gpo_regulator_is_enabled,
391  .list_voltage = regulator_list_voltage_table,
392  .set_voltage = mc13xxx_fixed_regulator_set_voltage,
393 };
394 
395 static int __devinit mc13783_regulator_probe(struct platform_device *pdev)
396 {
397  struct mc13xxx_regulator_priv *priv;
398  struct mc13xxx *mc13783 = dev_get_drvdata(pdev->dev.parent);
399  struct mc13xxx_regulator_platform_data *pdata =
400  dev_get_platdata(&pdev->dev);
401  struct mc13xxx_regulator_init_data *init_data;
402  struct regulator_config config = { };
403  int i, ret;
404 
405  dev_dbg(&pdev->dev, "%s id %d\n", __func__, pdev->id);
406 
407  if (!pdata)
408  return -EINVAL;
409 
410  priv = devm_kzalloc(&pdev->dev, sizeof(*priv) +
411  pdata->num_regulators * sizeof(priv->regulators[0]),
412  GFP_KERNEL);
413  if (!priv)
414  return -ENOMEM;
415 
416  priv->mc13xxx_regulators = mc13783_regulators;
417  priv->mc13xxx = mc13783;
418 
419  for (i = 0; i < pdata->num_regulators; i++) {
420  struct regulator_desc *desc;
421 
422  init_data = &pdata->regulators[i];
423  desc = &mc13783_regulators[init_data->id].desc;
424 
425  config.dev = &pdev->dev;
426  config.init_data = init_data->init_data;
427  config.driver_data = priv;
428 
429  priv->regulators[i] = regulator_register(desc, &config);
430  if (IS_ERR(priv->regulators[i])) {
431  dev_err(&pdev->dev, "failed to register regulator %s\n",
432  mc13783_regulators[i].desc.name);
433  ret = PTR_ERR(priv->regulators[i]);
434  goto err;
435  }
436  }
437 
438  platform_set_drvdata(pdev, priv);
439 
440  return 0;
441 err:
442  while (--i >= 0)
443  regulator_unregister(priv->regulators[i]);
444 
445  return ret;
446 }
447 
448 static int __devexit mc13783_regulator_remove(struct platform_device *pdev)
449 {
450  struct mc13xxx_regulator_priv *priv = platform_get_drvdata(pdev);
451  struct mc13xxx_regulator_platform_data *pdata =
452  dev_get_platdata(&pdev->dev);
453  int i;
454 
455  platform_set_drvdata(pdev, NULL);
456 
457  for (i = 0; i < pdata->num_regulators; i++)
458  regulator_unregister(priv->regulators[i]);
459 
460  return 0;
461 }
462 
463 static struct platform_driver mc13783_regulator_driver = {
464  .driver = {
465  .name = "mc13783-regulator",
466  .owner = THIS_MODULE,
467  },
468  .remove = __devexit_p(mc13783_regulator_remove),
469  .probe = mc13783_regulator_probe,
470 };
471 
472 static int __init mc13783_regulator_init(void)
473 {
474  return platform_driver_register(&mc13783_regulator_driver);
475 }
476 subsys_initcall(mc13783_regulator_init);
477 
478 static void __exit mc13783_regulator_exit(void)
479 {
480  platform_driver_unregister(&mc13783_regulator_driver);
481 }
482 module_exit(mc13783_regulator_exit);
483 
484 MODULE_LICENSE("GPL v2");
485 MODULE_AUTHOR("Sascha Hauer <[email protected]>");
486 MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC");
487 MODULE_ALIAS("platform:mc13783-regulator");
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