Go to the source code of this file.
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#define | UART_RX_DATA 0x00 |
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#define | UART_TX_DATA 0x00 |
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#define | UART_INT_EN 0x01 |
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#define | UART_INT_ID 0x02 |
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#define | UART_FIFO_CTL 0x02 |
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#define | UART_LINE_CTL 0x03 |
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#define | UART_MODEM_CTL 0x04 |
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#define | UART_LINE_STS 0x05 |
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#define | UART_MODEM_STS 0x06 |
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#define | UART_DIVISOR0 0x00 |
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#define | UART_DIVISOR1 0x01 |
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#define | BASE_BAUD (XLP_IO_CLK/16) |
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#define | BAUD_DIVISOR(baud) (BASE_BAUD / baud) |
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#define | LCR_5BITS 0x00 |
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#define | LCR_6BITS 0x01 |
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#define | LCR_7BITS 0x02 |
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#define | LCR_8BITS 0x03 |
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#define | LCR_STOPB 0x04 |
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#define | LCR_PENAB 0x08 |
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#define | LCR_PODD 0x00 |
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#define | LCR_PEVEN 0x10 |
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#define | LCR_PONE 0x20 |
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#define | LCR_PZERO 0x30 |
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#define | LCR_SBREAK 0x40 |
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#define | LCR_EFR_ENABLE 0xbf |
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#define | LCR_DLAB 0x80 |
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#define | MCR_DTR 0x01 |
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#define | MCR_RTS 0x02 |
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#define | MCR_DRS 0x04 |
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#define | MCR_IE 0x08 |
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#define | MCR_LOOPBACK 0x10 |
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#define | FCR_RCV_RST 0x02 |
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#define | FCR_XMT_RST 0x04 |
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#define | FCR_RX_LOW 0x00 |
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#define | FCR_RX_MEDL 0x40 |
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#define | FCR_RX_MEDH 0x80 |
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#define | FCR_RX_HIGH 0xc0 |
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#define | IER_ERXRDY 0x1 |
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#define | IER_ETXRDY 0x2 |
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#define | IER_ERLS 0x4 |
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#define | IER_EMSC 0x8 |
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#define | nlm_read_uart_reg(b, r) nlm_read_reg(b, r) |
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#define | nlm_write_uart_reg(b, r, v) nlm_write_reg(b, r, v) |
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#define | nlm_get_uart_pcibase(node, inst) nlm_pcicfg_base(XLP_IO_UART_OFFSET(node, inst)) |
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#define | nlm_get_uart_regbase(node, inst) (nlm_get_uart_pcibase(node, inst) + XLP_IO_PCI_HDRSZ) |
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#define LCR_EFR_ENABLE 0xbf |
#define MCR_LOOPBACK 0x10 |
#define nlm_read_uart_reg |
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b, |
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r |
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| nlm_read_reg(b, r) |
#define nlm_write_uart_reg |
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b, |
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r, |
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v |
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#define UART_DIVISOR0 0x00 |
#define UART_DIVISOR1 0x01 |
#define UART_FIFO_CTL 0x02 |
#define UART_LINE_CTL 0x03 |
#define UART_LINE_STS 0x05 |
#define UART_MODEM_CTL 0x04 |
#define UART_MODEM_STS 0x06 |
#define UART_RX_DATA 0x00 |
#define UART_TX_DATA 0x00 |