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mpc8272_ads.c
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1 /*
2  * MPC8272 ADS board support
3  *
4  * Copyright 2007 Freescale Semiconductor, Inc.
5  * Author: Scott Wood <[email protected]>
6  *
7  * Based on code by Vitaly Bordug <[email protected]>
8  * Copyright (c) 2006 MontaVista Software, Inc.
9  *
10  * This program is free software; you can redistribute it and/or modify it
11  * under the terms of the GNU General Public License as published by the
12  * Free Software Foundation; either version 2 of the License, or (at your
13  * option) any later version.
14  */
15 
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <linux/fsl_devices.h>
19 #include <linux/of_platform.h>
20 #include <linux/io.h>
21 
22 #include <asm/cpm2.h>
23 #include <asm/udbg.h>
24 #include <asm/machdep.h>
25 #include <asm/time.h>
26 
27 #include <platforms/82xx/pq2.h>
28 
29 #include <sysdev/fsl_soc.h>
30 #include <sysdev/cpm2_pic.h>
31 
32 #include "pq2.h"
33 
34 static void __init mpc8272_ads_pic_init(void)
35 {
37  "fsl,cpm2-pic");
38  if (!np) {
39  printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
40  return;
41  }
42 
43  cpm2_pic_init(np);
44  of_node_put(np);
45 
46  /* Initialize stuff for the 82xx CPLD IC and install demux */
48 }
49 
50 struct cpm_pin {
51  int port, pin, flags;
52 };
53 
54 static struct cpm_pin mpc8272_ads_pins[] = {
55  /* SCC1 */
57  {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
58 
59  /* SCC4 */
61  {3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
62 
63  /* FCC1 */
64  {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
65  {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
66  {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
67  {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
78  {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
79  {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
80 
81  /* FCC2 */
82  {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
83  {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
84  {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
85  {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
90  {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
91  {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
92  {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
94  {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
96  {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
97  {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
98 
99  /* I2C */
102 
103  /* USB */
104  {2, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
105  {2, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
106  {2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
107  {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
108  {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
109  {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
110  {3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
111 };
112 
113 static void __init init_ioports(void)
114 {
115  int i;
116 
117  for (i = 0; i < ARRAY_SIZE(mpc8272_ads_pins); i++) {
118  struct cpm_pin *pin = &mpc8272_ads_pins[i];
119  cpm2_set_pin(pin->port, pin->pin, pin->flags);
120  }
121 
128  cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_RX);
129  cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX);
130  cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK15, CPM_CLK_RX);
131  cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK16, CPM_CLK_TX);
132 }
133 
134 static void __init mpc8272_ads_setup_arch(void)
135 {
136  struct device_node *np;
137  __be32 __iomem *bcsr;
138 
139  if (ppc_md.progress)
140  ppc_md.progress("mpc8272_ads_setup_arch()", 0);
141 
142  cpm2_reset();
143 
144  np = of_find_compatible_node(NULL, NULL, "fsl,mpc8272ads-bcsr");
145  if (!np) {
146  printk(KERN_ERR "No bcsr in device tree\n");
147  return;
148  }
149 
150  bcsr = of_iomap(np, 0);
151  of_node_put(np);
152  if (!bcsr) {
153  printk(KERN_ERR "Cannot map BCSR registers\n");
154  return;
155  }
156 
157 #define BCSR1_FETHIEN 0x08000000
158 #define BCSR1_FETH_RST 0x04000000
159 #define BCSR1_RS232_EN1 0x02000000
160 #define BCSR1_RS232_EN2 0x01000000
161 #define BCSR3_USB_nEN 0x80000000
162 #define BCSR3_FETHIEN2 0x10000000
163 #define BCSR3_FETH2_RST 0x08000000
164 
165  clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN);
166  setbits32(&bcsr[1], BCSR1_FETH_RST);
167 
168  clrbits32(&bcsr[3], BCSR3_FETHIEN2);
169  setbits32(&bcsr[3], BCSR3_FETH2_RST);
170 
171  clrbits32(&bcsr[3], BCSR3_USB_nEN);
172 
173  iounmap(bcsr);
174 
175  init_ioports();
176  pq2_init_pci();
177 
178  if (ppc_md.progress)
179  ppc_md.progress("mpc8272_ads_setup_arch(), finish", 0);
180 }
181 
182 static struct of_device_id __initdata of_bus_ids[] = {
183  { .name = "soc", },
184  { .name = "cpm", },
185  { .name = "localbus", },
186  {},
187 };
188 
189 static int __init declare_of_platform_devices(void)
190 {
191  /* Publish the QE devices */
192  of_platform_bus_probe(NULL, of_bus_ids, NULL);
193  return 0;
194 }
195 machine_device_initcall(mpc8272_ads, declare_of_platform_devices);
196 
197 /*
198  * Called very early, device-tree isn't unflattened
199  */
200 static int __init mpc8272_ads_probe(void)
201 {
202  unsigned long root = of_get_flat_dt_root();
203  return of_flat_dt_is_compatible(root, "fsl,mpc8272ads");
204 }
205 
206 define_machine(mpc8272_ads)
207 {
208  .name = "Freescale MPC8272 ADS",
209  .probe = mpc8272_ads_probe,
210  .setup_arch = mpc8272_ads_setup_arch,
211  .init_IRQ = mpc8272_ads_pic_init,
212  .get_irq = cpm2_get_irq,
213  .calibrate_decr = generic_calibrate_decr,
214  .restart = pq2_restart,
215  .progress = udbg_progress,
216 };