Data Structures
struct	mpc85xx_mc_pdata

struct	mpc85xx_l2_pdata

struct	mpc85xx_pci_pdata

Macros
#define	MPC85XX_REVISION " Ver: 2.0.0"

#define	EDAC_MOD_STR "MPC85xx_edac"

#define	mpc85xx_printk(level, fmt, arg...) edac_printk(level, "MPC85xx", fmt, ##arg)

#define	mpc85xx_mc_printk(mci, level, fmt, arg...) edac_mc_chipset_printk(mci, level, "MPC85xx", fmt, ##arg)

#define	MPC85XX_MC_DDR_SDRAM_CFG 0x0110

#define	MPC85XX_MC_CS_BNDS_0 0x0000

#define	MPC85XX_MC_CS_BNDS_1 0x0008

#define	MPC85XX_MC_CS_BNDS_2 0x0010

#define	MPC85XX_MC_CS_BNDS_3 0x0018

#define	MPC85XX_MC_CS_BNDS_OFS 0x0008

#define	MPC85XX_MC_DATA_ERR_INJECT_HI 0x0e00

#define	MPC85XX_MC_DATA_ERR_INJECT_LO 0x0e04

#define	MPC85XX_MC_ECC_ERR_INJECT 0x0e08

#define	MPC85XX_MC_CAPTURE_DATA_HI 0x0e20

#define	MPC85XX_MC_CAPTURE_DATA_LO 0x0e24

#define	MPC85XX_MC_CAPTURE_ECC 0x0e28

#define	MPC85XX_MC_ERR_DETECT 0x0e40

#define	MPC85XX_MC_ERR_DISABLE 0x0e44

#define	MPC85XX_MC_ERR_INT_EN 0x0e48

#define	MPC85XX_MC_CAPTURE_ATRIBUTES 0x0e4c

#define	MPC85XX_MC_CAPTURE_ADDRESS 0x0e50

#define	MPC85XX_MC_ERR_SBE 0x0e58

#define	DSC_MEM_EN 0x80000000

#define	DSC_ECC_EN 0x20000000

#define	DSC_RD_EN 0x10000000

#define	DSC_DBW_MASK 0x00180000

#define	DSC_DBW_32 0x00080000

#define	DSC_DBW_64 0x00000000

#define	DSC_SDTYPE_MASK 0x07000000

#define	DSC_SDTYPE_DDR 0x02000000

#define	DSC_SDTYPE_DDR2 0x03000000

#define	DSC_SDTYPE_DDR3 0x07000000

#define	DSC_X32_EN 0x00000020

#define	DDR_EIE_MSEE 0x1 /* memory select */

#define	DDR_EIE_SBEE 0x4 /* single-bit ECC error */

#define	DDR_EIE_MBEE 0x8 /* multi-bit ECC error */

#define	DDR_EDE_MSE 0x1 /* memory select */

#define	DDR_EDE_SBE 0x4 /* single-bit ECC error */

#define	DDR_EDE_MBE 0x8 /* multi-bit ECC error */

#define	DDR_EDE_MME 0x80000000 /* multiple memory errors */

#define	DDR_EDI_MSED 0x1 /* memory select disable */

#define	DDR_EDI_SBED 0x4 /* single-bit ECC error disable */

#define	DDR_EDI_MBED 0x8 /* multi-bit ECC error disable */

#define	MPC85XX_L2_ERRINJHI 0x0000

#define	MPC85XX_L2_ERRINJLO 0x0004

#define	MPC85XX_L2_ERRINJCTL 0x0008

#define	MPC85XX_L2_CAPTDATAHI 0x0020

#define	MPC85XX_L2_CAPTDATALO 0x0024

#define	MPC85XX_L2_CAPTECC 0x0028

#define	MPC85XX_L2_ERRDET 0x0040

#define	MPC85XX_L2_ERRDIS 0x0044

#define	MPC85XX_L2_ERRINTEN 0x0048

#define	MPC85XX_L2_ERRATTR 0x004c

#define	MPC85XX_L2_ERRADDR 0x0050

#define	MPC85XX_L2_ERRCTL 0x0058

#define	L2_EIE_L2CFGINTEN 0x1

#define	L2_EIE_SBECCINTEN 0x4

#define	L2_EIE_MBECCINTEN 0x8

#define	L2_EIE_TPARINTEN 0x10

#define	L2_EIE_MASK

#define	L2_EDE_L2CFGERR 0x1

#define	L2_EDE_SBECCERR 0x4

#define	L2_EDE_MBECCERR 0x8

#define	L2_EDE_TPARERR 0x10

#define	L2_EDE_MULL2ERR 0x80000000

#define	L2_EDE_CE_MASK L2_EDE_SBECCERR

#define	L2_EDE_UE_MASK

#define	L2_EDE_MASK

#define	PCI_EDE_TOE 0x00000001

#define	PCI_EDE_SCM 0x00000002

#define	PCI_EDE_IRMSV 0x00000004

#define	PCI_EDE_ORMSV 0x00000008

#define	PCI_EDE_OWMSV 0x00000010

#define	PCI_EDE_TGT_ABRT 0x00000020

#define	PCI_EDE_MST_ABRT 0x00000040

#define	PCI_EDE_TGT_PERR 0x00000080

#define	PCI_EDE_MST_PERR 0x00000100

#define	PCI_EDE_RCVD_SERR 0x00000200

#define	PCI_EDE_ADDR_PERR 0x00000400

#define	PCI_EDE_MULTI_ERR 0x80000000

#define	PCI_EDE_PERR_MASK

#define	MPC85XX_PCI_ERR_DR 0x0000

#define	MPC85XX_PCI_ERR_CAP_DR 0x0004

#define	MPC85XX_PCI_ERR_EN 0x0008

#define	MPC85XX_PCI_ERR_ATTRIB 0x000c

#define	MPC85XX_PCI_ERR_ADDR 0x0010

#define	MPC85XX_PCI_ERR_EXT_ADDR 0x0014

#define	MPC85XX_PCI_ERR_DL 0x0018

#define	MPC85XX_PCI_ERR_DH 0x001c

#define	MPC85XX_PCI_GAS_TIMR 0x0020

#define	MPC85XX_PCI_PCIX_TIMR 0x0024

Macro Definition Documentation

#define DDR_EDE_MBE 0x8 /* multi-bit ECC error */

Definition at line 70 of file mpc85xx_edac.h.

#define DDR_EDE_MME 0x80000000 /* multiple memory errors */

Definition at line 71 of file mpc85xx_edac.h.

#define DDR_EDE_MSE 0x1 /* memory select */

Definition at line 68 of file mpc85xx_edac.h.

#define DDR_EDE_SBE 0x4 /* single-bit ECC error */

Definition at line 69 of file mpc85xx_edac.h.

#define DDR_EDI_MBED 0x8 /* multi-bit ECC error disable */

Definition at line 76 of file mpc85xx_edac.h.

#define DDR_EDI_MSED 0x1 /* memory select disable */

Definition at line 74 of file mpc85xx_edac.h.

#define DDR_EDI_SBED 0x4 /* single-bit ECC error disable */

Definition at line 75 of file mpc85xx_edac.h.

#define DDR_EIE_MBEE 0x8 /* multi-bit ECC error */

Definition at line 65 of file mpc85xx_edac.h.

#define DDR_EIE_MSEE 0x1 /* memory select */

Definition at line 63 of file mpc85xx_edac.h.

#define DDR_EIE_SBEE 0x4 /* single-bit ECC error */

Definition at line 64 of file mpc85xx_edac.h.

#define DSC_DBW_32 0x00080000

Definition at line 52 of file mpc85xx_edac.h.

#define DSC_DBW_64 0x00000000

Definition at line 53 of file mpc85xx_edac.h.

#define DSC_DBW_MASK 0x00180000

Definition at line 51 of file mpc85xx_edac.h.

#define DSC_ECC_EN 0x20000000

Definition at line 49 of file mpc85xx_edac.h.

#define DSC_MEM_EN 0x80000000

Definition at line 48 of file mpc85xx_edac.h.

#define DSC_RD_EN 0x10000000

Definition at line 50 of file mpc85xx_edac.h.

#define DSC_SDTYPE_DDR 0x02000000

Definition at line 57 of file mpc85xx_edac.h.

#define DSC_SDTYPE_DDR2 0x03000000

Definition at line 58 of file mpc85xx_edac.h.

#define DSC_SDTYPE_DDR3 0x07000000

Definition at line 59 of file mpc85xx_edac.h.

#define DSC_SDTYPE_MASK 0x07000000

Definition at line 55 of file mpc85xx_edac.h.

#define DSC_X32_EN 0x00000020

Definition at line 60 of file mpc85xx_edac.h.

#define EDAC_MOD_STR "MPC85xx_edac"

Definition at line 15 of file mpc85xx_edac.h.

#define L2_EDE_CE_MASK L2_EDE_SBECCERR

Definition at line 109 of file mpc85xx_edac.h.

#define L2_EDE_L2CFGERR 0x1

Definition at line 103 of file mpc85xx_edac.h.

#define L2_EDE_MASK

Value:

(L2_EDE_L2CFGERR | L2_EDE_SBECCERR | \

L2_EDE_MBECCERR | L2_EDE_TPARERR | L2_EDE_MULL2ERR)

Definition at line 112 of file mpc85xx_edac.h.

#define L2_EDE_MBECCERR 0x8

Definition at line 105 of file mpc85xx_edac.h.

#define L2_EDE_MULL2ERR 0x80000000

Definition at line 107 of file mpc85xx_edac.h.

#define L2_EDE_SBECCERR 0x4

Definition at line 104 of file mpc85xx_edac.h.

#define L2_EDE_TPARERR 0x10

Definition at line 106 of file mpc85xx_edac.h.

#define L2_EDE_UE_MASK

Value:

(L2_EDE_L2CFGERR | L2_EDE_MBECCERR | \

L2_EDE_TPARERR)

Definition at line 110 of file mpc85xx_edac.h.

#define L2_EIE_L2CFGINTEN 0x1

Definition at line 95 of file mpc85xx_edac.h.

#define L2_EIE_MASK

Value:

(L2_EIE_L2CFGINTEN | L2_EIE_SBECCINTEN | \

L2_EIE_MBECCINTEN | L2_EIE_TPARINTEN)

Definition at line 99 of file mpc85xx_edac.h.

#define L2_EIE_MBECCINTEN 0x8

Definition at line 97 of file mpc85xx_edac.h.

#define L2_EIE_SBECCINTEN 0x4

Definition at line 96 of file mpc85xx_edac.h.

#define L2_EIE_TPARINTEN 0x10

Definition at line 98 of file mpc85xx_edac.h.

#define MPC85XX_L2_CAPTDATAHI 0x0020

Definition at line 84 of file mpc85xx_edac.h.

#define MPC85XX_L2_CAPTDATALO 0x0024

Definition at line 85 of file mpc85xx_edac.h.

#define MPC85XX_L2_CAPTECC 0x0028

Definition at line 86 of file mpc85xx_edac.h.

#define MPC85XX_L2_ERRADDR 0x0050

Definition at line 91 of file mpc85xx_edac.h.

#define MPC85XX_L2_ERRATTR 0x004c

Definition at line 90 of file mpc85xx_edac.h.

#define MPC85XX_L2_ERRCTL 0x0058

Definition at line 92 of file mpc85xx_edac.h.

#define MPC85XX_L2_ERRDET 0x0040

Definition at line 87 of file mpc85xx_edac.h.

#define MPC85XX_L2_ERRDIS 0x0044

Definition at line 88 of file mpc85xx_edac.h.

#define MPC85XX_L2_ERRINJCTL 0x0008

Definition at line 83 of file mpc85xx_edac.h.

#define MPC85XX_L2_ERRINJHI 0x0000

Definition at line 81 of file mpc85xx_edac.h.

#define MPC85XX_L2_ERRINJLO 0x0004

Definition at line 82 of file mpc85xx_edac.h.

#define MPC85XX_L2_ERRINTEN 0x0048

Definition at line 89 of file mpc85xx_edac.h.

#define MPC85XX_MC_CAPTURE_ADDRESS 0x0e50

Definition at line 45 of file mpc85xx_edac.h.

#define MPC85XX_MC_CAPTURE_ATRIBUTES 0x0e4c

Definition at line 44 of file mpc85xx_edac.h.

#define MPC85XX_MC_CAPTURE_DATA_HI 0x0e20

Definition at line 38 of file mpc85xx_edac.h.

#define MPC85XX_MC_CAPTURE_DATA_LO 0x0e24

Definition at line 39 of file mpc85xx_edac.h.

#define MPC85XX_MC_CAPTURE_ECC 0x0e28

Definition at line 40 of file mpc85xx_edac.h.

#define MPC85XX_MC_CS_BNDS_0 0x0000

Definition at line 29 of file mpc85xx_edac.h.

#define MPC85XX_MC_CS_BNDS_1 0x0008

Definition at line 30 of file mpc85xx_edac.h.

#define MPC85XX_MC_CS_BNDS_2 0x0010

Definition at line 31 of file mpc85xx_edac.h.

#define MPC85XX_MC_CS_BNDS_3 0x0018

Definition at line 32 of file mpc85xx_edac.h.

#define MPC85XX_MC_CS_BNDS_OFS 0x0008

Definition at line 33 of file mpc85xx_edac.h.

#define MPC85XX_MC_DATA_ERR_INJECT_HI 0x0e00

Definition at line 35 of file mpc85xx_edac.h.

#define MPC85XX_MC_DATA_ERR_INJECT_LO 0x0e04

Definition at line 36 of file mpc85xx_edac.h.

#define MPC85XX_MC_DDR_SDRAM_CFG 0x0110

Definition at line 28 of file mpc85xx_edac.h.

#define MPC85XX_MC_ECC_ERR_INJECT 0x0e08

Definition at line 37 of file mpc85xx_edac.h.

#define MPC85XX_MC_ERR_DETECT 0x0e40

Definition at line 41 of file mpc85xx_edac.h.

#define MPC85XX_MC_ERR_DISABLE 0x0e44

Definition at line 42 of file mpc85xx_edac.h.

#define MPC85XX_MC_ERR_INT_EN 0x0e48

Definition at line 43 of file mpc85xx_edac.h.

#define MPC85XX_MC_ERR_SBE 0x0e58

Definition at line 46 of file mpc85xx_edac.h.

#define mpc85xx_mc_printk	(	mci,
		level,
		fmt,
		arg...
	)	edac_mc_chipset_printk(mci, level, "MPC85xx", fmt, ##arg)

Definition at line 20 of file mpc85xx_edac.h.

#define MPC85XX_PCI_ERR_ADDR 0x0010

Definition at line 138 of file mpc85xx_edac.h.

#define MPC85XX_PCI_ERR_ATTRIB 0x000c

Definition at line 137 of file mpc85xx_edac.h.

#define MPC85XX_PCI_ERR_CAP_DR 0x0004

Definition at line 135 of file mpc85xx_edac.h.

#define MPC85XX_PCI_ERR_DH 0x001c

Definition at line 141 of file mpc85xx_edac.h.

#define MPC85XX_PCI_ERR_DL 0x0018

Definition at line 140 of file mpc85xx_edac.h.

#define MPC85XX_PCI_ERR_DR 0x0000

Definition at line 134 of file mpc85xx_edac.h.

#define MPC85XX_PCI_ERR_EN 0x0008

Definition at line 136 of file mpc85xx_edac.h.

#define MPC85XX_PCI_ERR_EXT_ADDR 0x0014

Definition at line 139 of file mpc85xx_edac.h.

#define MPC85XX_PCI_GAS_TIMR 0x0020

Definition at line 142 of file mpc85xx_edac.h.

#define MPC85XX_PCI_PCIX_TIMR 0x0024

Definition at line 143 of file mpc85xx_edac.h.

#define mpc85xx_printk	(	level,
		fmt,
		arg...
	)	edac_printk(level, "MPC85xx", fmt, ##arg)

Definition at line 17 of file mpc85xx_edac.h.

#define MPC85XX_REVISION " Ver: 2.0.0"

Definition at line 14 of file mpc85xx_edac.h.

#define PCI_EDE_ADDR_PERR 0x00000400

Definition at line 128 of file mpc85xx_edac.h.

#define PCI_EDE_IRMSV 0x00000004

Definition at line 120 of file mpc85xx_edac.h.

#define PCI_EDE_MST_ABRT 0x00000040

Definition at line 124 of file mpc85xx_edac.h.

#define PCI_EDE_MST_PERR 0x00000100

Definition at line 126 of file mpc85xx_edac.h.

#define PCI_EDE_MULTI_ERR 0x80000000

Definition at line 129 of file mpc85xx_edac.h.

#define PCI_EDE_ORMSV 0x00000008

Definition at line 121 of file mpc85xx_edac.h.

#define PCI_EDE_OWMSV 0x00000010

Definition at line 122 of file mpc85xx_edac.h.

#define PCI_EDE_PERR_MASK

Value:

(PCI_EDE_TGT_PERR | PCI_EDE_MST_PERR | \

PCI_EDE_ADDR_PERR)

Definition at line 131 of file mpc85xx_edac.h.

#define PCI_EDE_RCVD_SERR 0x00000200

Definition at line 127 of file mpc85xx_edac.h.

#define PCI_EDE_SCM 0x00000002

Definition at line 119 of file mpc85xx_edac.h.

#define PCI_EDE_TGT_ABRT 0x00000020

Definition at line 123 of file mpc85xx_edac.h.

#define PCI_EDE_TGT_PERR 0x00000080

Definition at line 125 of file mpc85xx_edac.h.

#define PCI_EDE_TOE 0x00000001

Definition at line 118 of file mpc85xx_edac.h.

Data Structures

Macros

Macro Definition Documentation