Linux Kernel
3.7.1
|
#include <linux/spi/spi.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <net/wpan-phy.h>
#include <net/mac802154.h>
Go to the source code of this file.
Data Structures | |
struct | mrf24j40 |
Macros | |
#define | REG_RXMCR 0x00 /* Receive MAC control */ |
#define | REG_PANIDL 0x01 /* PAN ID (low) */ |
#define | REG_PANIDH 0x02 /* PAN ID (high) */ |
#define | REG_SADRL 0x03 /* Short address (low) */ |
#define | REG_SADRH 0x04 /* Short address (high) */ |
#define | REG_EADR0 0x05 /* Long address (low) (high is EADR7) */ |
#define | REG_TXMCR 0x11 /* Transmit MAC control */ |
#define | REG_PACON0 0x16 /* Power Amplifier Control */ |
#define | REG_PACON1 0x17 /* Power Amplifier Control */ |
#define | REG_PACON2 0x18 /* Power Amplifier Control */ |
#define | REG_TXNCON 0x1B /* Transmit Normal FIFO Control */ |
#define | REG_TXSTAT 0x24 /* TX MAC Status Register */ |
#define | REG_SOFTRST 0x2A /* Soft Reset */ |
#define | REG_TXSTBL 0x2E /* TX Stabilization */ |
#define | REG_INTSTAT 0x31 /* Interrupt Status */ |
#define | REG_INTCON 0x32 /* Interrupt Control */ |
#define | REG_RFCTL 0x36 /* RF Control Mode Register */ |
#define | REG_BBREG1 0x39 /* Baseband Registers */ |
#define | REG_BBREG2 0x3A /* */ |
#define | REG_BBREG6 0x3E /* */ |
#define | REG_CCAEDTH 0x3F /* Energy Detection Threshold */ |
#define | REG_RFCON0 0x200 /* RF Control Registers */ |
#define | REG_RFCON1 0x201 |
#define | REG_RFCON2 0x202 |
#define | REG_RFCON3 0x203 |
#define | REG_RFCON5 0x205 |
#define | REG_RFCON6 0x206 |
#define | REG_RFCON7 0x207 |
#define | REG_RFCON8 0x208 |
#define | REG_RSSI 0x210 |
#define | REG_SLPCON0 0x211 /* Sleep Clock Control Registers */ |
#define | REG_SLPCON1 0x220 |
#define | REG_WAKETIMEL 0x222 /* Wake-up Time Match Value Low */ |
#define | REG_WAKETIMEH 0x223 /* Wake-up Time Match Value High */ |
#define | REG_RX_FIFO 0x300 /* Receive FIFO */ |
#define | MRF24J40_CHAN_MIN 11 |
#define | MRF24J40_CHAN_MAX 26 |
#define | CHANNEL_MASK |
#define | TX_FIFO_SIZE 128 /* From datasheet */ |
#define | RX_FIFO_SIZE 144 /* From datasheet */ |
#define | SET_CHANNEL_DELAY_US 192 /* From datasheet */ |
#define | MRF24J40_READSHORT(reg) ((reg) << 1) |
#define | MRF24J40_WRITESHORT(reg) ((reg) << 1 | 1) |
#define | MRF24J40_READLONG(reg) (1 << 15 | (reg) << 5) |
#define | MRF24J40_WRITELONG(reg) (1 << 15 | (reg) << 5 | 1 << 4) |
#define | MAX_SPI_SPEED_HZ 1000000 |
#define | printdev(X) (&X->spi->dev) |
Functions | |
MODULE_DEVICE_TABLE (spi, mrf24j40_ids) | |
module_init (mrf24j40_init) | |
module_exit (mrf24j40_exit) | |
MODULE_LICENSE ("GPL") | |
MODULE_AUTHOR ("Alan Ott") | |
MODULE_DESCRIPTION ("MRF24J40 SPI 802.15.4 Controller Driver") | |
#define CHANNEL_MASK |
Definition at line 70 of file mrf24j40.c.
#define MAX_SPI_SPEED_HZ 1000000 |
Definition at line 96 of file mrf24j40.c.
#define MRF24J40_CHAN_MAX 26 |
Definition at line 69 of file mrf24j40.c.
#define MRF24J40_CHAN_MIN 11 |
Definition at line 68 of file mrf24j40.c.
Definition at line 91 of file mrf24j40.c.
Definition at line 89 of file mrf24j40.c.
Definition at line 92 of file mrf24j40.c.
Definition at line 90 of file mrf24j40.c.
#define REG_BBREG1 0x39 /* Baseband Registers */ |
Definition at line 46 of file mrf24j40.c.
#define REG_BBREG2 0x3A /* */ |
Definition at line 47 of file mrf24j40.c.
#define REG_BBREG6 0x3E /* */ |
Definition at line 48 of file mrf24j40.c.
#define REG_CCAEDTH 0x3F /* Energy Detection Threshold */ |
Definition at line 49 of file mrf24j40.c.
#define REG_EADR0 0x05 /* Long address (low) (high is EADR7) */ |
Definition at line 34 of file mrf24j40.c.
#define REG_INTCON 0x32 /* Interrupt Control */ |
Definition at line 44 of file mrf24j40.c.
#define REG_INTSTAT 0x31 /* Interrupt Status */ |
Definition at line 43 of file mrf24j40.c.
#define REG_PACON0 0x16 /* Power Amplifier Control */ |
Definition at line 36 of file mrf24j40.c.
#define REG_PACON1 0x17 /* Power Amplifier Control */ |
Definition at line 37 of file mrf24j40.c.
#define REG_PACON2 0x18 /* Power Amplifier Control */ |
Definition at line 38 of file mrf24j40.c.
#define REG_PANIDH 0x02 /* PAN ID (high) */ |
Definition at line 31 of file mrf24j40.c.
#define REG_PANIDL 0x01 /* PAN ID (low) */ |
Definition at line 30 of file mrf24j40.c.
#define REG_RFCON0 0x200 /* RF Control Registers */ |
Definition at line 52 of file mrf24j40.c.
#define REG_RFCON1 0x201 |
Definition at line 53 of file mrf24j40.c.
#define REG_RFCON2 0x202 |
Definition at line 54 of file mrf24j40.c.
#define REG_RFCON3 0x203 |
Definition at line 55 of file mrf24j40.c.
#define REG_RFCON5 0x205 |
Definition at line 56 of file mrf24j40.c.
#define REG_RFCON6 0x206 |
Definition at line 57 of file mrf24j40.c.
#define REG_RFCON7 0x207 |
Definition at line 58 of file mrf24j40.c.
#define REG_RFCON8 0x208 |
Definition at line 59 of file mrf24j40.c.
#define REG_RFCTL 0x36 /* RF Control Mode Register */ |
Definition at line 45 of file mrf24j40.c.
#define REG_RSSI 0x210 |
Definition at line 60 of file mrf24j40.c.
#define REG_RX_FIFO 0x300 /* Receive FIFO */ |
Definition at line 65 of file mrf24j40.c.
#define REG_RXMCR 0x00 /* Receive MAC control */ |
Definition at line 29 of file mrf24j40.c.
#define REG_SADRH 0x04 /* Short address (high) */ |
Definition at line 33 of file mrf24j40.c.
#define REG_SADRL 0x03 /* Short address (low) */ |
Definition at line 32 of file mrf24j40.c.
#define REG_SLPCON0 0x211 /* Sleep Clock Control Registers */ |
Definition at line 61 of file mrf24j40.c.
#define REG_SLPCON1 0x220 |
Definition at line 62 of file mrf24j40.c.
#define REG_SOFTRST 0x2A /* Soft Reset */ |
Definition at line 41 of file mrf24j40.c.
#define REG_TXMCR 0x11 /* Transmit MAC control */ |
Definition at line 35 of file mrf24j40.c.
#define REG_TXNCON 0x1B /* Transmit Normal FIFO Control */ |
Definition at line 39 of file mrf24j40.c.
#define REG_TXSTAT 0x24 /* TX MAC Status Register */ |
Definition at line 40 of file mrf24j40.c.
#define REG_TXSTBL 0x2E /* TX Stabilization */ |
Definition at line 42 of file mrf24j40.c.
#define REG_WAKETIMEH 0x223 /* Wake-up Time Match Value High */ |
Definition at line 64 of file mrf24j40.c.
#define REG_WAKETIMEL 0x222 /* Wake-up Time Match Value Low */ |
Definition at line 63 of file mrf24j40.c.
#define RX_FIFO_SIZE 144 /* From datasheet */ |
Definition at line 74 of file mrf24j40.c.
#define SET_CHANNEL_DELAY_US 192 /* From datasheet */ |
Definition at line 75 of file mrf24j40.c.
#define TX_FIFO_SIZE 128 /* From datasheet */ |
Definition at line 73 of file mrf24j40.c.
MODULE_AUTHOR | ( | "Alan Ott" | ) |
MODULE_DESCRIPTION | ( | "MRF24J40 SPI 802.15.4 Controller Driver" | ) |
MODULE_DEVICE_TABLE | ( | spi | , |
mrf24j40_ids | |||
) |
module_exit | ( | mrf24j40_exit | ) |
module_init | ( | mrf24j40_init | ) |
MODULE_LICENSE | ( | "GPL" | ) |