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Linux Kernel
3.7.1
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Go to the source code of this file.
Macros | |
| #define | USB_AHBBURST (MSM_USB_BASE + 0x0090) |
| #define | USB_AHBMODE (MSM_USB_BASE + 0x0098) |
| #define | USB_CAPLENGTH (MSM_USB_BASE + 0x0100) /* 8 bit */ |
| #define | USB_USBCMD (MSM_USB_BASE + 0x0140) |
| #define | USB_PORTSC (MSM_USB_BASE + 0x0184) |
| #define | USB_OTGSC (MSM_USB_BASE + 0x01A4) |
| #define | USB_USBMODE (MSM_USB_BASE + 0x01A8) |
| #define | USB_PHY_CTRL (MSM_USB_BASE + 0x0240) |
| #define | USBCMD_RESET 2 |
| #define | USB_USBINTR (MSM_USB_BASE + 0x0148) |
| #define | PORTSC_PHCD (1 << 23) /* phy suspend mode */ |
| #define | PORTSC_PTS_MASK (3 << 30) |
| #define | PORTSC_PTS_ULPI (3 << 30) |
| #define | USB_ULPI_VIEWPORT (MSM_USB_BASE + 0x0170) |
| #define | ULPI_RUN (1 << 30) |
| #define | ULPI_WRITE (1 << 29) |
| #define | ULPI_READ (0 << 29) |
| #define | ULPI_ADDR(n) (((n) & 255) << 16) |
| #define | ULPI_DATA(n) ((n) & 255) |
| #define | ULPI_DATA_READ(n) (((n) >> 8) & 255) |
| #define | ASYNC_INTR_CTRL (1 << 29) /* Enable async interrupt */ |
| #define | ULPI_STP_CTRL (1 << 30) /* Block communication with PHY */ |
| #define | PHY_RETEN (1 << 1) /* PHY retention enable/disable */ |
| #define | OTGSC_INTSTS_MASK (0x7f << 16) |
| #define | OTGSC_ID (1 << 8) |
| #define | OTGSC_BSV (1 << 11) |
| #define | OTGSC_IDIS (1 << 16) |
| #define | OTGSC_BSVIS (1 << 19) |
| #define | OTGSC_IDIE (1 << 24) |
| #define | OTGSC_BSVIE (1 << 27) |
Definition at line 44 of file msm_hsusb_hw.h.
| #define OTGSC_BSV (1 << 11) |
Definition at line 51 of file msm_hsusb_hw.h.
| #define OTGSC_BSVIE (1 << 27) |
Definition at line 55 of file msm_hsusb_hw.h.
| #define OTGSC_BSVIS (1 << 19) |
Definition at line 53 of file msm_hsusb_hw.h.
| #define OTGSC_ID (1 << 8) |
Definition at line 50 of file msm_hsusb_hw.h.
| #define OTGSC_IDIE (1 << 24) |
Definition at line 54 of file msm_hsusb_hw.h.
| #define OTGSC_IDIS (1 << 16) |
Definition at line 52 of file msm_hsusb_hw.h.
| #define OTGSC_INTSTS_MASK (0x7f << 16) |
Definition at line 49 of file msm_hsusb_hw.h.
Definition at line 46 of file msm_hsusb_hw.h.
Definition at line 32 of file msm_hsusb_hw.h.
| #define PORTSC_PTS_MASK (3 << 30) |
Definition at line 33 of file msm_hsusb_hw.h.
| #define PORTSC_PTS_ULPI (3 << 30) |
Definition at line 34 of file msm_hsusb_hw.h.
Definition at line 40 of file msm_hsusb_hw.h.
Definition at line 41 of file msm_hsusb_hw.h.
Definition at line 42 of file msm_hsusb_hw.h.
| #define ULPI_READ (0 << 29) |
Definition at line 39 of file msm_hsusb_hw.h.
| #define ULPI_RUN (1 << 30) |
Definition at line 37 of file msm_hsusb_hw.h.
| #define ULPI_STP_CTRL (1 << 30) /* Block communication with PHY */ |
Definition at line 45 of file msm_hsusb_hw.h.
| #define ULPI_WRITE (1 << 29) |
Definition at line 38 of file msm_hsusb_hw.h.
| #define USB_AHBBURST (MSM_USB_BASE + 0x0090) |
Definition at line 19 of file msm_hsusb_hw.h.
| #define USB_AHBMODE (MSM_USB_BASE + 0x0098) |
Definition at line 20 of file msm_hsusb_hw.h.
| #define USB_CAPLENGTH (MSM_USB_BASE + 0x0100) /* 8 bit */ |
Definition at line 21 of file msm_hsusb_hw.h.
| #define USB_OTGSC (MSM_USB_BASE + 0x01A4) |
Definition at line 25 of file msm_hsusb_hw.h.
| #define USB_PHY_CTRL (MSM_USB_BASE + 0x0240) |
Definition at line 27 of file msm_hsusb_hw.h.
| #define USB_PORTSC (MSM_USB_BASE + 0x0184) |
Definition at line 24 of file msm_hsusb_hw.h.
| #define USB_ULPI_VIEWPORT (MSM_USB_BASE + 0x0170) |
Definition at line 36 of file msm_hsusb_hw.h.
| #define USB_USBCMD (MSM_USB_BASE + 0x0140) |
Definition at line 23 of file msm_hsusb_hw.h.
| #define USB_USBINTR (MSM_USB_BASE + 0x0148) |
Definition at line 30 of file msm_hsusb_hw.h.
| #define USB_USBMODE (MSM_USB_BASE + 0x01A8) |
Definition at line 26 of file msm_hsusb_hw.h.
| #define USBCMD_RESET 2 |
Definition at line 29 of file msm_hsusb_hw.h.
1.8.2