Linux Kernel
3.7.1
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Macros | |
#define | MSM_VIC_BASE IOMEM(0xE0000000) |
#define | MSM_VIC_PHYS 0xAC000000 |
#define | MSM_VIC_SIZE SZ_4K |
#define | QSD8X50_CSR_PHYS 0xAC100000 |
#define | QSD8X50_CSR_SIZE SZ_4K |
#define | MSM_DMOV_BASE IOMEM(0xE0002000) |
#define | MSM_DMOV_PHYS 0xA9700000 |
#define | MSM_DMOV_SIZE SZ_4K |
#define | QSD8X50_GPIO1_PHYS 0xA9000000 |
#define | QSD8X50_GPIO1_SIZE SZ_4K |
#define | QSD8X50_GPIO2_PHYS 0xA9100000 |
#define | QSD8X50_GPIO2_SIZE SZ_4K |
#define | MSM_CLK_CTL_BASE IOMEM(0xE0005000) |
#define | MSM_CLK_CTL_PHYS 0xA8600000 |
#define | MSM_CLK_CTL_SIZE SZ_4K |
#define | MSM_SIRC_BASE IOMEM(0xE1006000) |
#define | MSM_SIRC_PHYS 0xAC200000 |
#define | MSM_SIRC_SIZE SZ_4K |
#define | MSM_SCPLL_BASE IOMEM(0xE1007000) |
#define | MSM_SCPLL_PHYS 0xA8800000 |
#define | MSM_SCPLL_SIZE SZ_4K |
#define | MSM_SMI_BASE 0x00000000 |
#define | MSM_SHARED_RAM_BASE IOMEM(0xE0100000) |
#define | MSM_SHARED_RAM_PHYS (MSM_SMI_BASE + 0x00100000) |
#define | MSM_SHARED_RAM_SIZE SZ_1M |
#define | MSM_UART1_PHYS 0xA9A00000 |
#define | MSM_UART1_SIZE SZ_4K |
#define | MSM_UART2_PHYS 0xA9B00000 |
#define | MSM_UART2_SIZE SZ_4K |
#define | MSM_UART3_PHYS 0xA9C00000 |
#define | MSM_UART3_SIZE SZ_4K |
#define | MSM_MDC_BASE IOMEM(0xE0200000) |
#define | MSM_MDC_PHYS 0xAA500000 |
#define | MSM_MDC_SIZE SZ_1M |
#define | MSM_AD5_BASE IOMEM(0xE0300000) |
#define | MSM_AD5_PHYS 0xAC000000 |
#define | MSM_AD5_SIZE (SZ_1M*13) |
#define | MSM_I2C_SIZE SZ_4K |
#define | MSM_I2C_PHYS 0xA9900000 |
#define | MSM_HSUSB_PHYS 0xA0800000 |
#define | MSM_HSUSB_SIZE SZ_1K |
#define | MSM_NAND_PHYS 0xA0A00000 |
#define | MSM_TSIF_PHYS (0xa0100000) |
#define | MSM_TSIF_SIZE (0x200) |
#define | MSM_TSSC_PHYS 0xAA300000 |
#define | MSM_UART1DM_PHYS 0xA0200000 |
#define | MSM_UART2DM_PHYS 0xA0900000 |
#define | MSM_SDC1_PHYS 0xA0300000 |
#define | MSM_SDC1_SIZE SZ_4K |
#define | MSM_SDC2_PHYS 0xA0400000 |
#define | MSM_SDC2_SIZE SZ_4K |
#define | MSM_SDC3_PHYS 0xA0500000 |
#define | MSM_SDC3_SIZE SZ_4K |
#define | MSM_SDC4_PHYS 0xA0600000 |
#define | MSM_SDC4_SIZE SZ_4K |
#define MSM_AD5_BASE IOMEM(0xE0300000) |
Definition at line 90 of file msm_iomap-8x50.h.
#define MSM_AD5_PHYS 0xAC000000 |
Definition at line 91 of file msm_iomap-8x50.h.
#define MSM_AD5_SIZE (SZ_1M*13) |
Definition at line 92 of file msm_iomap-8x50.h.
#define MSM_CLK_CTL_BASE IOMEM(0xE0005000) |
Definition at line 55 of file msm_iomap-8x50.h.
#define MSM_CLK_CTL_PHYS 0xA8600000 |
Definition at line 56 of file msm_iomap-8x50.h.
#define MSM_CLK_CTL_SIZE SZ_4K |
Definition at line 57 of file msm_iomap-8x50.h.
#define MSM_DMOV_BASE IOMEM(0xE0002000) |
Definition at line 45 of file msm_iomap-8x50.h.
#define MSM_DMOV_PHYS 0xA9700000 |
Definition at line 46 of file msm_iomap-8x50.h.
#define MSM_DMOV_SIZE SZ_4K |
Definition at line 47 of file msm_iomap-8x50.h.
#define MSM_HSUSB_PHYS 0xA0800000 |
Definition at line 98 of file msm_iomap-8x50.h.
#define MSM_HSUSB_SIZE SZ_1K |
Definition at line 99 of file msm_iomap-8x50.h.
#define MSM_I2C_PHYS 0xA9900000 |
Definition at line 96 of file msm_iomap-8x50.h.
#define MSM_I2C_SIZE SZ_4K |
Definition at line 95 of file msm_iomap-8x50.h.
#define MSM_MDC_BASE IOMEM(0xE0200000) |
Definition at line 86 of file msm_iomap-8x50.h.
#define MSM_MDC_PHYS 0xAA500000 |
Definition at line 87 of file msm_iomap-8x50.h.
#define MSM_MDC_SIZE SZ_1M |
Definition at line 88 of file msm_iomap-8x50.h.
#define MSM_NAND_PHYS 0xA0A00000 |
Definition at line 101 of file msm_iomap-8x50.h.
#define MSM_SCPLL_BASE IOMEM(0xE1007000) |
Definition at line 63 of file msm_iomap-8x50.h.
#define MSM_SCPLL_PHYS 0xA8800000 |
Definition at line 64 of file msm_iomap-8x50.h.
#define MSM_SCPLL_SIZE SZ_4K |
Definition at line 65 of file msm_iomap-8x50.h.
#define MSM_SDC1_PHYS 0xA0300000 |
Definition at line 113 of file msm_iomap-8x50.h.
#define MSM_SDC1_SIZE SZ_4K |
Definition at line 114 of file msm_iomap-8x50.h.
#define MSM_SDC2_PHYS 0xA0400000 |
Definition at line 116 of file msm_iomap-8x50.h.
#define MSM_SDC2_SIZE SZ_4K |
Definition at line 117 of file msm_iomap-8x50.h.
#define MSM_SDC3_PHYS 0xA0500000 |
Definition at line 119 of file msm_iomap-8x50.h.
#define MSM_SDC3_SIZE SZ_4K |
Definition at line 120 of file msm_iomap-8x50.h.
#define MSM_SDC4_PHYS 0xA0600000 |
Definition at line 122 of file msm_iomap-8x50.h.
#define MSM_SDC4_SIZE SZ_4K |
Definition at line 123 of file msm_iomap-8x50.h.
#define MSM_SHARED_RAM_BASE IOMEM(0xE0100000) |
Definition at line 73 of file msm_iomap-8x50.h.
#define MSM_SHARED_RAM_PHYS (MSM_SMI_BASE + 0x00100000) |
Definition at line 74 of file msm_iomap-8x50.h.
#define MSM_SHARED_RAM_SIZE SZ_1M |
Definition at line 75 of file msm_iomap-8x50.h.
#define MSM_SIRC_BASE IOMEM(0xE1006000) |
Definition at line 59 of file msm_iomap-8x50.h.
#define MSM_SIRC_PHYS 0xAC200000 |
Definition at line 60 of file msm_iomap-8x50.h.
#define MSM_SIRC_SIZE SZ_4K |
Definition at line 61 of file msm_iomap-8x50.h.
#define MSM_SMI_BASE 0x00000000 |
Definition at line 70 of file msm_iomap-8x50.h.
#define MSM_TSIF_PHYS (0xa0100000) |
Definition at line 104 of file msm_iomap-8x50.h.
#define MSM_TSIF_SIZE (0x200) |
Definition at line 105 of file msm_iomap-8x50.h.
#define MSM_TSSC_PHYS 0xAA300000 |
Definition at line 107 of file msm_iomap-8x50.h.
#define MSM_UART1_PHYS 0xA9A00000 |
Definition at line 77 of file msm_iomap-8x50.h.
#define MSM_UART1_SIZE SZ_4K |
Definition at line 78 of file msm_iomap-8x50.h.
#define MSM_UART1DM_PHYS 0xA0200000 |
Definition at line 109 of file msm_iomap-8x50.h.
#define MSM_UART2_PHYS 0xA9B00000 |
Definition at line 80 of file msm_iomap-8x50.h.
#define MSM_UART2_SIZE SZ_4K |
Definition at line 81 of file msm_iomap-8x50.h.
#define MSM_UART2DM_PHYS 0xA0900000 |
Definition at line 110 of file msm_iomap-8x50.h.
#define MSM_UART3_PHYS 0xA9C00000 |
Definition at line 83 of file msm_iomap-8x50.h.
#define MSM_UART3_SIZE SZ_4K |
Definition at line 84 of file msm_iomap-8x50.h.
#define MSM_VIC_BASE IOMEM(0xE0000000) |
Definition at line 38 of file msm_iomap-8x50.h.
#define MSM_VIC_PHYS 0xAC000000 |
Definition at line 39 of file msm_iomap-8x50.h.
#define MSM_VIC_SIZE SZ_4K |
Definition at line 40 of file msm_iomap-8x50.h.
#define QSD8X50_CSR_PHYS 0xAC100000 |
Definition at line 42 of file msm_iomap-8x50.h.
#define QSD8X50_CSR_SIZE SZ_4K |
Definition at line 43 of file msm_iomap-8x50.h.
#define QSD8X50_GPIO1_PHYS 0xA9000000 |
Definition at line 49 of file msm_iomap-8x50.h.
#define QSD8X50_GPIO1_SIZE SZ_4K |
Definition at line 50 of file msm_iomap-8x50.h.
#define QSD8X50_GPIO2_PHYS 0xA9100000 |
Definition at line 52 of file msm_iomap-8x50.h.
#define QSD8X50_GPIO2_SIZE SZ_4K |
Definition at line 53 of file msm_iomap-8x50.h.