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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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Macros | |
| #define | MUSB_EP0_FIFOSIZE 64 /* This is non-configurable */ |
| #define | MUSB_POWER_ISOUPDATE 0x80 |
| #define | MUSB_POWER_SOFTCONN 0x40 |
| #define | MUSB_POWER_HSENAB 0x20 |
| #define | MUSB_POWER_HSMODE 0x10 |
| #define | MUSB_POWER_RESET 0x08 |
| #define | MUSB_POWER_RESUME 0x04 |
| #define | MUSB_POWER_SUSPENDM 0x02 |
| #define | MUSB_POWER_ENSUSPEND 0x01 |
| #define | MUSB_INTR_SUSPEND 0x01 |
| #define | MUSB_INTR_RESUME 0x02 |
| #define | MUSB_INTR_RESET 0x04 |
| #define | MUSB_INTR_BABBLE 0x04 |
| #define | MUSB_INTR_SOF 0x08 |
| #define | MUSB_INTR_CONNECT 0x10 |
| #define | MUSB_INTR_DISCONNECT 0x20 |
| #define | MUSB_INTR_SESSREQ 0x40 |
| #define | MUSB_INTR_VBUSERROR 0x80 /* For SESSION end */ |
| #define | MUSB_DEVCTL_BDEVICE 0x80 |
| #define | MUSB_DEVCTL_FSDEV 0x40 |
| #define | MUSB_DEVCTL_LSDEV 0x20 |
| #define | MUSB_DEVCTL_VBUS 0x18 |
| #define | MUSB_DEVCTL_VBUS_SHIFT 3 |
| #define | MUSB_DEVCTL_HM 0x04 |
| #define | MUSB_DEVCTL_HR 0x02 |
| #define | MUSB_DEVCTL_SESSION 0x01 |
| #define | MUSB_ULPI_USE_EXTVBUS 0x01 |
| #define | MUSB_ULPI_USE_EXTVBUSIND 0x02 |
| #define | MUSB_ULPI_REG_REQ (1 << 0) |
| #define | MUSB_ULPI_REG_CMPLT (1 << 1) |
| #define | MUSB_ULPI_RDN_WR (1 << 2) |
| #define | MUSB_TEST_FORCE_HOST 0x80 |
| #define | MUSB_TEST_FIFO_ACCESS 0x40 |
| #define | MUSB_TEST_FORCE_FS 0x20 |
| #define | MUSB_TEST_FORCE_HS 0x10 |
| #define | MUSB_TEST_PACKET 0x08 |
| #define | MUSB_TEST_K 0x04 |
| #define | MUSB_TEST_J 0x02 |
| #define | MUSB_TEST_SE0_NAK 0x01 |
| #define | MUSB_FIFOSZ_DPB 0x10 |
| #define | MUSB_FIFOSZ_SIZE 0x0f |
| #define | MUSB_CSR0_FLUSHFIFO 0x0100 |
| #define | MUSB_CSR0_TXPKTRDY 0x0002 |
| #define | MUSB_CSR0_RXPKTRDY 0x0001 |
| #define | MUSB_CSR0_P_SVDSETUPEND 0x0080 |
| #define | MUSB_CSR0_P_SVDRXPKTRDY 0x0040 |
| #define | MUSB_CSR0_P_SENDSTALL 0x0020 |
| #define | MUSB_CSR0_P_SETUPEND 0x0010 |
| #define | MUSB_CSR0_P_DATAEND 0x0008 |
| #define | MUSB_CSR0_P_SENTSTALL 0x0004 |
| #define | MUSB_CSR0_H_DIS_PING 0x0800 |
| #define | MUSB_CSR0_H_WR_DATATOGGLE 0x0400 /* Set to allow setting: */ |
| #define | MUSB_CSR0_H_DATATOGGLE 0x0200 /* Data toggle control */ |
| #define | MUSB_CSR0_H_NAKTIMEOUT 0x0080 |
| #define | MUSB_CSR0_H_STATUSPKT 0x0040 |
| #define | MUSB_CSR0_H_REQPKT 0x0020 |
| #define | MUSB_CSR0_H_ERROR 0x0010 |
| #define | MUSB_CSR0_H_SETUPPKT 0x0008 |
| #define | MUSB_CSR0_H_RXSTALL 0x0004 |
| #define | MUSB_CSR0_P_WZC_BITS (MUSB_CSR0_P_SENTSTALL) |
| #define | MUSB_CSR0_H_WZC_BITS |
| #define | MUSB_TYPE_SPEED 0xc0 |
| #define | MUSB_TYPE_SPEED_SHIFT 6 |
| #define | MUSB_TYPE_PROTO 0x30 /* Implicitly zero for ep0 */ |
| #define | MUSB_TYPE_PROTO_SHIFT 4 |
| #define | MUSB_TYPE_REMOTE_END 0xf /* Implicitly zero for ep0 */ |
| #define | MUSB_CONFIGDATA_MPRXE 0x80 /* Auto bulk pkt combining */ |
| #define | MUSB_CONFIGDATA_MPTXE 0x40 /* Auto bulk pkt splitting */ |
| #define | MUSB_CONFIGDATA_BIGENDIAN 0x20 |
| #define | MUSB_CONFIGDATA_HBRXE 0x10 /* HB-ISO for RX */ |
| #define | MUSB_CONFIGDATA_HBTXE 0x08 /* HB-ISO for TX */ |
| #define | MUSB_CONFIGDATA_DYNFIFO 0x04 /* Dynamic FIFO sizing */ |
| #define | MUSB_CONFIGDATA_SOFTCONE 0x02 /* SoftConnect */ |
| #define | MUSB_CONFIGDATA_UTMIDW 0x01 /* Data width 0/1 => 8/16bits */ |
| #define | MUSB_TXCSR_AUTOSET 0x8000 |
| #define | MUSB_TXCSR_DMAENAB 0x1000 |
| #define | MUSB_TXCSR_FRCDATATOG 0x0800 |
| #define | MUSB_TXCSR_DMAMODE 0x0400 |
| #define | MUSB_TXCSR_CLRDATATOG 0x0040 |
| #define | MUSB_TXCSR_FLUSHFIFO 0x0008 |
| #define | MUSB_TXCSR_FIFONOTEMPTY 0x0002 |
| #define | MUSB_TXCSR_TXPKTRDY 0x0001 |
| #define | MUSB_TXCSR_P_ISO 0x4000 |
| #define | MUSB_TXCSR_P_INCOMPTX 0x0080 |
| #define | MUSB_TXCSR_P_SENTSTALL 0x0020 |
| #define | MUSB_TXCSR_P_SENDSTALL 0x0010 |
| #define | MUSB_TXCSR_P_UNDERRUN 0x0004 |
| #define | MUSB_TXCSR_H_WR_DATATOGGLE 0x0200 |
| #define | MUSB_TXCSR_H_DATATOGGLE 0x0100 |
| #define | MUSB_TXCSR_H_NAKTIMEOUT 0x0080 |
| #define | MUSB_TXCSR_H_RXSTALL 0x0020 |
| #define | MUSB_TXCSR_H_ERROR 0x0004 |
| #define | MUSB_TXCSR_P_WZC_BITS |
| #define | MUSB_TXCSR_H_WZC_BITS |
| #define | MUSB_RXCSR_AUTOCLEAR 0x8000 |
| #define | MUSB_RXCSR_DMAENAB 0x2000 |
| #define | MUSB_RXCSR_DISNYET 0x1000 |
| #define | MUSB_RXCSR_PID_ERR 0x1000 |
| #define | MUSB_RXCSR_DMAMODE 0x0800 |
| #define | MUSB_RXCSR_INCOMPRX 0x0100 |
| #define | MUSB_RXCSR_CLRDATATOG 0x0080 |
| #define | MUSB_RXCSR_FLUSHFIFO 0x0010 |
| #define | MUSB_RXCSR_DATAERROR 0x0008 |
| #define | MUSB_RXCSR_FIFOFULL 0x0002 |
| #define | MUSB_RXCSR_RXPKTRDY 0x0001 |
| #define | MUSB_RXCSR_P_ISO 0x4000 |
| #define | MUSB_RXCSR_P_SENTSTALL 0x0040 |
| #define | MUSB_RXCSR_P_SENDSTALL 0x0020 |
| #define | MUSB_RXCSR_P_OVERRUN 0x0004 |
| #define | MUSB_RXCSR_H_AUTOREQ 0x4000 |
| #define | MUSB_RXCSR_H_WR_DATATOGGLE 0x0400 |
| #define | MUSB_RXCSR_H_DATATOGGLE 0x0200 |
| #define | MUSB_RXCSR_H_RXSTALL 0x0040 |
| #define | MUSB_RXCSR_H_REQPKT 0x0020 |
| #define | MUSB_RXCSR_H_ERROR 0x0004 |
| #define | MUSB_RXCSR_P_WZC_BITS |
| #define | MUSB_RXCSR_H_WZC_BITS |
| #define | MUSB_HUBADDR_MULTI_TT 0x80 |
| #define | MUSB_FADDR 0x00 /* 8-bit */ |
| #define | MUSB_POWER 0x01 /* 8-bit */ |
| #define | MUSB_INTRTX 0x02 /* 16-bit */ |
| #define | MUSB_INTRRX 0x04 |
| #define | MUSB_INTRTXE 0x06 |
| #define | MUSB_INTRRXE 0x08 |
| #define | MUSB_INTRUSB 0x0A /* 8 bit */ |
| #define | MUSB_INTRUSBE 0x0B /* 8 bit */ |
| #define | MUSB_FRAME 0x0C |
| #define | MUSB_INDEX 0x0E /* 8 bit */ |
| #define | MUSB_TESTMODE 0x0F /* 8 bit */ |
| #define | MUSB_FIFO_OFFSET(epnum) (0x20 + ((epnum) * 4)) |
| #define | MUSB_DEVCTL 0x60 /* 8 bit */ |
| #define | MUSB_TXFIFOSZ 0x62 /* 8-bit (see masks) */ |
| #define | MUSB_RXFIFOSZ 0x63 /* 8-bit (see masks) */ |
| #define | MUSB_TXFIFOADD 0x64 /* 16-bit offset shifted right 3 */ |
| #define | MUSB_RXFIFOADD 0x66 /* 16-bit offset shifted right 3 */ |
| #define | MUSB_HWVERS 0x6C /* 8 bit */ |
| #define | MUSB_ULPI_BUSCONTROL 0x70 /* 8 bit */ |
| #define | MUSB_ULPI_INT_MASK 0x72 /* 8 bit */ |
| #define | MUSB_ULPI_INT_SRC 0x73 /* 8 bit */ |
| #define | MUSB_ULPI_REG_DATA 0x74 /* 8 bit */ |
| #define | MUSB_ULPI_REG_ADDR 0x75 /* 8 bit */ |
| #define | MUSB_ULPI_REG_CONTROL 0x76 /* 8 bit */ |
| #define | MUSB_ULPI_RAW_DATA 0x77 /* 8 bit */ |
| #define | MUSB_EPINFO 0x78 /* 8 bit */ |
| #define | MUSB_RAMINFO 0x79 /* 8 bit */ |
| #define | MUSB_LINKINFO 0x7a /* 8 bit */ |
| #define | MUSB_VPLEN 0x7b /* 8 bit */ |
| #define | MUSB_HS_EOF1 0x7c /* 8 bit */ |
| #define | MUSB_FS_EOF1 0x7d /* 8 bit */ |
| #define | MUSB_LS_EOF1 0x7e /* 8 bit */ |
| #define | MUSB_TXMAXP 0x00 |
| #define | MUSB_TXCSR 0x02 |
| #define | MUSB_CSR0 MUSB_TXCSR /* Re-used for EP0 */ |
| #define | MUSB_RXMAXP 0x04 |
| #define | MUSB_RXCSR 0x06 |
| #define | MUSB_RXCOUNT 0x08 |
| #define | MUSB_COUNT0 MUSB_RXCOUNT /* Re-used for EP0 */ |
| #define | MUSB_TXTYPE 0x0A |
| #define | MUSB_TYPE0 MUSB_TXTYPE /* Re-used for EP0 */ |
| #define | MUSB_TXINTERVAL 0x0B |
| #define | MUSB_NAKLIMIT0 MUSB_TXINTERVAL /* Re-used for EP0 */ |
| #define | MUSB_RXTYPE 0x0C |
| #define | MUSB_RXINTERVAL 0x0D |
| #define | MUSB_FIFOSIZE 0x0F |
| #define | MUSB_CONFIGDATA MUSB_FIFOSIZE /* Re-used for EP0 */ |
| #define | MUSB_INDEXED_OFFSET(_epnum, _offset) (0x10 + (_offset)) |
| #define | MUSB_FLAT_OFFSET(_epnum, _offset) (0x100 + (0x10*(_epnum)) + (_offset)) |
| #define | MUSB_TXCSR_MODE 0x2000 |
| #define | MUSB_TXFUNCADDR 0x00 |
| #define | MUSB_TXHUBADDR 0x02 |
| #define | MUSB_TXHUBPORT 0x03 |
| #define | MUSB_RXFUNCADDR 0x04 |
| #define | MUSB_RXHUBADDR 0x06 |
| #define | MUSB_RXHUBPORT 0x07 |
| #define | MUSB_BUSCTL_OFFSET(_epnum, _offset) (0x80 + (8*(_epnum)) + (_offset)) |
| #define MUSB_BUSCTL_OFFSET | ( | _epnum, | |
| _offset | |||
| ) | (0x80 + (8*(_epnum)) + (_offset)) |
Definition at line 318 of file musb_regs.h.
| #define MUSB_CONFIGDATA MUSB_FIFOSIZE /* Re-used for EP0 */ |
Definition at line 289 of file musb_regs.h.
| #define MUSB_CONFIGDATA_BIGENDIAN 0x20 |
Definition at line 139 of file musb_regs.h.
| #define MUSB_CONFIGDATA_DYNFIFO 0x04 /* Dynamic FIFO sizing */ |
Definition at line 142 of file musb_regs.h.
| #define MUSB_CONFIGDATA_HBRXE 0x10 /* HB-ISO for RX */ |
Definition at line 140 of file musb_regs.h.
| #define MUSB_CONFIGDATA_HBTXE 0x08 /* HB-ISO for TX */ |
Definition at line 141 of file musb_regs.h.
| #define MUSB_CONFIGDATA_MPRXE 0x80 /* Auto bulk pkt combining */ |
Definition at line 137 of file musb_regs.h.
| #define MUSB_CONFIGDATA_MPTXE 0x40 /* Auto bulk pkt splitting */ |
Definition at line 138 of file musb_regs.h.
| #define MUSB_CONFIGDATA_SOFTCONE 0x02 /* SoftConnect */ |
Definition at line 143 of file musb_regs.h.
| #define MUSB_CONFIGDATA_UTMIDW 0x01 /* Data width 0/1 => 8/16bits */ |
Definition at line 144 of file musb_regs.h.
| #define MUSB_COUNT0 MUSB_RXCOUNT /* Re-used for EP0 */ |
Definition at line 281 of file musb_regs.h.
| #define MUSB_CSR0 MUSB_TXCSR /* Re-used for EP0 */ |
Definition at line 277 of file musb_regs.h.
| #define MUSB_CSR0_FLUSHFIFO 0x0100 |
Definition at line 99 of file musb_regs.h.
| #define MUSB_CSR0_H_DATATOGGLE 0x0200 /* Data toggle control */ |
Definition at line 114 of file musb_regs.h.
| #define MUSB_CSR0_H_DIS_PING 0x0800 |
Definition at line 112 of file musb_regs.h.
| #define MUSB_CSR0_H_ERROR 0x0010 |
Definition at line 118 of file musb_regs.h.
| #define MUSB_CSR0_H_NAKTIMEOUT 0x0080 |
Definition at line 115 of file musb_regs.h.
| #define MUSB_CSR0_H_REQPKT 0x0020 |
Definition at line 117 of file musb_regs.h.
| #define MUSB_CSR0_H_RXSTALL 0x0004 |
Definition at line 120 of file musb_regs.h.
| #define MUSB_CSR0_H_SETUPPKT 0x0008 |
Definition at line 119 of file musb_regs.h.
| #define MUSB_CSR0_H_STATUSPKT 0x0040 |
Definition at line 116 of file musb_regs.h.
| #define MUSB_CSR0_H_WR_DATATOGGLE 0x0400 /* Set to allow setting: */ |
Definition at line 113 of file musb_regs.h.
| #define MUSB_CSR0_H_WZC_BITS |
Definition at line 125 of file musb_regs.h.
| #define MUSB_CSR0_P_DATAEND 0x0008 |
Definition at line 108 of file musb_regs.h.
| #define MUSB_CSR0_P_SENDSTALL 0x0020 |
Definition at line 106 of file musb_regs.h.
| #define MUSB_CSR0_P_SENTSTALL 0x0004 |
Definition at line 109 of file musb_regs.h.
| #define MUSB_CSR0_P_SETUPEND 0x0010 |
Definition at line 107 of file musb_regs.h.
| #define MUSB_CSR0_P_SVDRXPKTRDY 0x0040 |
Definition at line 105 of file musb_regs.h.
| #define MUSB_CSR0_P_SVDSETUPEND 0x0080 |
Definition at line 104 of file musb_regs.h.
| #define MUSB_CSR0_P_WZC_BITS (MUSB_CSR0_P_SENTSTALL) |
Definition at line 123 of file musb_regs.h.
| #define MUSB_CSR0_RXPKTRDY 0x0001 |
Definition at line 101 of file musb_regs.h.
| #define MUSB_CSR0_TXPKTRDY 0x0002 |
Definition at line 100 of file musb_regs.h.
| #define MUSB_DEVCTL 0x60 /* 8 bit */ |
Definition at line 248 of file musb_regs.h.
| #define MUSB_DEVCTL_BDEVICE 0x80 |
Definition at line 66 of file musb_regs.h.
| #define MUSB_DEVCTL_FSDEV 0x40 |
Definition at line 67 of file musb_regs.h.
| #define MUSB_DEVCTL_HM 0x04 |
Definition at line 71 of file musb_regs.h.
| #define MUSB_DEVCTL_HR 0x02 |
Definition at line 72 of file musb_regs.h.
| #define MUSB_DEVCTL_LSDEV 0x20 |
Definition at line 68 of file musb_regs.h.
| #define MUSB_DEVCTL_SESSION 0x01 |
Definition at line 73 of file musb_regs.h.
| #define MUSB_DEVCTL_VBUS 0x18 |
Definition at line 69 of file musb_regs.h.
| #define MUSB_DEVCTL_VBUS_SHIFT 3 |
Definition at line 70 of file musb_regs.h.
| #define MUSB_EP0_FIFOSIZE 64 /* This is non-configurable */ |
Definition at line 38 of file musb_regs.h.
| #define MUSB_EPINFO 0x78 /* 8 bit */ |
Definition at line 266 of file musb_regs.h.
| #define MUSB_FADDR 0x00 /* 8-bit */ |
Definition at line 223 of file musb_regs.h.
| #define MUSB_FIFO_OFFSET | ( | epnum | ) | (0x20 + ((epnum) * 4)) |
Definition at line 241 of file musb_regs.h.
| #define MUSB_FIFOSIZE 0x0F |
Definition at line 288 of file musb_regs.h.
| #define MUSB_FIFOSZ_DPB 0x10 |
Definition at line 94 of file musb_regs.h.
| #define MUSB_FIFOSZ_SIZE 0x0f |
Definition at line 96 of file musb_regs.h.
| #define MUSB_FLAT_OFFSET | ( | _epnum, | |
| _offset | |||
| ) | (0x100 + (0x10*(_epnum)) + (_offset)) |
Definition at line 296 of file musb_regs.h.
| #define MUSB_FRAME 0x0C |
Definition at line 232 of file musb_regs.h.
| #define MUSB_FS_EOF1 0x7d /* 8 bit */ |
Definition at line 271 of file musb_regs.h.
| #define MUSB_HS_EOF1 0x7c /* 8 bit */ |
Definition at line 270 of file musb_regs.h.
| #define MUSB_HUBADDR_MULTI_TT 0x80 |
Definition at line 214 of file musb_regs.h.
| #define MUSB_HWVERS 0x6C /* 8 bit */ |
Definition at line 257 of file musb_regs.h.
| #define MUSB_INDEX 0x0E /* 8 bit */ |
Definition at line 233 of file musb_regs.h.
| #define MUSB_INDEXED_OFFSET | ( | _epnum, | |
| _offset | |||
| ) | (0x10 + (_offset)) |
Definition at line 292 of file musb_regs.h.
| #define MUSB_INTR_BABBLE 0x04 |
Definition at line 58 of file musb_regs.h.
| #define MUSB_INTR_CONNECT 0x10 |
Definition at line 60 of file musb_regs.h.
| #define MUSB_INTR_DISCONNECT 0x20 |
Definition at line 61 of file musb_regs.h.
| #define MUSB_INTR_RESET 0x04 |
Definition at line 57 of file musb_regs.h.
| #define MUSB_INTR_RESUME 0x02 |
Definition at line 56 of file musb_regs.h.
| #define MUSB_INTR_SESSREQ 0x40 |
Definition at line 62 of file musb_regs.h.
| #define MUSB_INTR_SOF 0x08 |
Definition at line 59 of file musb_regs.h.
| #define MUSB_INTR_SUSPEND 0x01 |
Definition at line 55 of file musb_regs.h.
| #define MUSB_INTR_VBUSERROR 0x80 /* For SESSION end */ |
Definition at line 63 of file musb_regs.h.
| #define MUSB_INTRRX 0x04 |
Definition at line 227 of file musb_regs.h.
| #define MUSB_INTRRXE 0x08 |
Definition at line 229 of file musb_regs.h.
| #define MUSB_INTRTX 0x02 /* 16-bit */ |
Definition at line 226 of file musb_regs.h.
| #define MUSB_INTRTXE 0x06 |
Definition at line 228 of file musb_regs.h.
| #define MUSB_INTRUSB 0x0A /* 8 bit */ |
Definition at line 230 of file musb_regs.h.
| #define MUSB_INTRUSBE 0x0B /* 8 bit */ |
Definition at line 231 of file musb_regs.h.
| #define MUSB_LINKINFO 0x7a /* 8 bit */ |
Definition at line 268 of file musb_regs.h.
| #define MUSB_LS_EOF1 0x7e /* 8 bit */ |
Definition at line 272 of file musb_regs.h.
| #define MUSB_NAKLIMIT0 MUSB_TXINTERVAL /* Re-used for EP0 */ |
Definition at line 285 of file musb_regs.h.
| #define MUSB_POWER 0x01 /* 8-bit */ |
Definition at line 224 of file musb_regs.h.
| #define MUSB_POWER_ENSUSPEND 0x01 |
Definition at line 52 of file musb_regs.h.
| #define MUSB_POWER_HSENAB 0x20 |
Definition at line 47 of file musb_regs.h.
| #define MUSB_POWER_HSMODE 0x10 |
Definition at line 48 of file musb_regs.h.
| #define MUSB_POWER_ISOUPDATE 0x80 |
Definition at line 45 of file musb_regs.h.
| #define MUSB_POWER_RESET 0x08 |
Definition at line 49 of file musb_regs.h.
| #define MUSB_POWER_RESUME 0x04 |
Definition at line 50 of file musb_regs.h.
| #define MUSB_POWER_SOFTCONN 0x40 |
Definition at line 46 of file musb_regs.h.
| #define MUSB_POWER_SUSPENDM 0x02 |
Definition at line 51 of file musb_regs.h.
| #define MUSB_RAMINFO 0x79 /* 8 bit */ |
Definition at line 267 of file musb_regs.h.
| #define MUSB_RXCOUNT 0x08 |
Definition at line 280 of file musb_regs.h.
| #define MUSB_RXCSR 0x06 |
Definition at line 279 of file musb_regs.h.
| #define MUSB_RXCSR_AUTOCLEAR 0x8000 |
Definition at line 179 of file musb_regs.h.
| #define MUSB_RXCSR_CLRDATATOG 0x0080 |
Definition at line 185 of file musb_regs.h.
| #define MUSB_RXCSR_DATAERROR 0x0008 |
Definition at line 187 of file musb_regs.h.
| #define MUSB_RXCSR_DISNYET 0x1000 |
Definition at line 181 of file musb_regs.h.
| #define MUSB_RXCSR_DMAENAB 0x2000 |
Definition at line 180 of file musb_regs.h.
| #define MUSB_RXCSR_DMAMODE 0x0800 |
Definition at line 183 of file musb_regs.h.
| #define MUSB_RXCSR_FIFOFULL 0x0002 |
Definition at line 188 of file musb_regs.h.
| #define MUSB_RXCSR_FLUSHFIFO 0x0010 |
Definition at line 186 of file musb_regs.h.
| #define MUSB_RXCSR_H_AUTOREQ 0x4000 |
Definition at line 198 of file musb_regs.h.
| #define MUSB_RXCSR_H_DATATOGGLE 0x0200 |
Definition at line 200 of file musb_regs.h.
| #define MUSB_RXCSR_H_ERROR 0x0004 |
Definition at line 203 of file musb_regs.h.
| #define MUSB_RXCSR_H_REQPKT 0x0020 |
Definition at line 202 of file musb_regs.h.
| #define MUSB_RXCSR_H_RXSTALL 0x0040 |
Definition at line 201 of file musb_regs.h.
| #define MUSB_RXCSR_H_WR_DATATOGGLE 0x0400 |
Definition at line 199 of file musb_regs.h.
| #define MUSB_RXCSR_H_WZC_BITS |
Definition at line 209 of file musb_regs.h.
| #define MUSB_RXCSR_INCOMPRX 0x0100 |
Definition at line 184 of file musb_regs.h.
| #define MUSB_RXCSR_P_ISO 0x4000 |
Definition at line 192 of file musb_regs.h.
| #define MUSB_RXCSR_P_OVERRUN 0x0004 |
Definition at line 195 of file musb_regs.h.
| #define MUSB_RXCSR_P_SENDSTALL 0x0020 |
Definition at line 194 of file musb_regs.h.
| #define MUSB_RXCSR_P_SENTSTALL 0x0040 |
Definition at line 193 of file musb_regs.h.
| #define MUSB_RXCSR_P_WZC_BITS |
Definition at line 206 of file musb_regs.h.
| #define MUSB_RXCSR_PID_ERR 0x1000 |
Definition at line 182 of file musb_regs.h.
| #define MUSB_RXCSR_RXPKTRDY 0x0001 |
Definition at line 189 of file musb_regs.h.
| #define MUSB_RXFIFOADD 0x66 /* 16-bit offset shifted right 3 */ |
Definition at line 254 of file musb_regs.h.
| #define MUSB_RXFIFOSZ 0x63 /* 8-bit (see masks) */ |
Definition at line 252 of file musb_regs.h.
| #define MUSB_RXFUNCADDR 0x04 |
Definition at line 314 of file musb_regs.h.
| #define MUSB_RXHUBADDR 0x06 |
Definition at line 315 of file musb_regs.h.
| #define MUSB_RXHUBPORT 0x07 |
Definition at line 316 of file musb_regs.h.
| #define MUSB_RXINTERVAL 0x0D |
Definition at line 287 of file musb_regs.h.
| #define MUSB_RXMAXP 0x04 |
Definition at line 278 of file musb_regs.h.
| #define MUSB_RXTYPE 0x0C |
Definition at line 286 of file musb_regs.h.
| #define MUSB_TEST_FIFO_ACCESS 0x40 |
Definition at line 85 of file musb_regs.h.
| #define MUSB_TEST_FORCE_FS 0x20 |
Definition at line 86 of file musb_regs.h.
| #define MUSB_TEST_FORCE_HOST 0x80 |
Definition at line 84 of file musb_regs.h.
| #define MUSB_TEST_FORCE_HS 0x10 |
Definition at line 87 of file musb_regs.h.
| #define MUSB_TEST_J 0x02 |
Definition at line 90 of file musb_regs.h.
| #define MUSB_TEST_K 0x04 |
Definition at line 89 of file musb_regs.h.
| #define MUSB_TEST_PACKET 0x08 |
Definition at line 88 of file musb_regs.h.
| #define MUSB_TEST_SE0_NAK 0x01 |
Definition at line 91 of file musb_regs.h.
| #define MUSB_TESTMODE 0x0F /* 8 bit */ |
Definition at line 234 of file musb_regs.h.
| #define MUSB_TXCSR 0x02 |
Definition at line 276 of file musb_regs.h.
| #define MUSB_TXCSR_AUTOSET 0x8000 |
Definition at line 147 of file musb_regs.h.
| #define MUSB_TXCSR_CLRDATATOG 0x0040 |
Definition at line 151 of file musb_regs.h.
| #define MUSB_TXCSR_DMAENAB 0x1000 |
Definition at line 148 of file musb_regs.h.
| #define MUSB_TXCSR_DMAMODE 0x0400 |
Definition at line 150 of file musb_regs.h.
| #define MUSB_TXCSR_FIFONOTEMPTY 0x0002 |
Definition at line 153 of file musb_regs.h.
| #define MUSB_TXCSR_FLUSHFIFO 0x0008 |
Definition at line 152 of file musb_regs.h.
| #define MUSB_TXCSR_FRCDATATOG 0x0800 |
Definition at line 149 of file musb_regs.h.
| #define MUSB_TXCSR_H_DATATOGGLE 0x0100 |
Definition at line 165 of file musb_regs.h.
| #define MUSB_TXCSR_H_ERROR 0x0004 |
Definition at line 168 of file musb_regs.h.
| #define MUSB_TXCSR_H_NAKTIMEOUT 0x0080 |
Definition at line 166 of file musb_regs.h.
| #define MUSB_TXCSR_H_RXSTALL 0x0020 |
Definition at line 167 of file musb_regs.h.
| #define MUSB_TXCSR_H_WR_DATATOGGLE 0x0200 |
Definition at line 164 of file musb_regs.h.
| #define MUSB_TXCSR_H_WZC_BITS |
Definition at line 174 of file musb_regs.h.
| #define MUSB_TXCSR_MODE 0x2000 |
Definition at line 307 of file musb_regs.h.
| #define MUSB_TXCSR_P_INCOMPTX 0x0080 |
Definition at line 158 of file musb_regs.h.
| #define MUSB_TXCSR_P_ISO 0x4000 |
Definition at line 157 of file musb_regs.h.
| #define MUSB_TXCSR_P_SENDSTALL 0x0010 |
Definition at line 160 of file musb_regs.h.
| #define MUSB_TXCSR_P_SENTSTALL 0x0020 |
Definition at line 159 of file musb_regs.h.
| #define MUSB_TXCSR_P_UNDERRUN 0x0004 |
Definition at line 161 of file musb_regs.h.
| #define MUSB_TXCSR_P_WZC_BITS |
Definition at line 171 of file musb_regs.h.
| #define MUSB_TXCSR_TXPKTRDY 0x0001 |
Definition at line 154 of file musb_regs.h.
| #define MUSB_TXFIFOADD 0x64 /* 16-bit offset shifted right 3 */ |
Definition at line 253 of file musb_regs.h.
| #define MUSB_TXFIFOSZ 0x62 /* 8-bit (see masks) */ |
Definition at line 251 of file musb_regs.h.
| #define MUSB_TXFUNCADDR 0x00 |
Definition at line 310 of file musb_regs.h.
| #define MUSB_TXHUBADDR 0x02 |
Definition at line 311 of file musb_regs.h.
| #define MUSB_TXHUBPORT 0x03 |
Definition at line 312 of file musb_regs.h.
| #define MUSB_TXINTERVAL 0x0B |
Definition at line 284 of file musb_regs.h.
| #define MUSB_TXMAXP 0x00 |
Definition at line 275 of file musb_regs.h.
| #define MUSB_TXTYPE 0x0A |
Definition at line 282 of file musb_regs.h.
| #define MUSB_TYPE0 MUSB_TXTYPE /* Re-used for EP0 */ |
Definition at line 283 of file musb_regs.h.
| #define MUSB_TYPE_PROTO 0x30 /* Implicitly zero for ep0 */ |
Definition at line 132 of file musb_regs.h.
| #define MUSB_TYPE_PROTO_SHIFT 4 |
Definition at line 133 of file musb_regs.h.
| #define MUSB_TYPE_REMOTE_END 0xf /* Implicitly zero for ep0 */ |
Definition at line 134 of file musb_regs.h.
| #define MUSB_TYPE_SPEED 0xc0 |
Definition at line 130 of file musb_regs.h.
| #define MUSB_TYPE_SPEED_SHIFT 6 |
Definition at line 131 of file musb_regs.h.
| #define MUSB_ULPI_BUSCONTROL 0x70 /* 8 bit */ |
Definition at line 258 of file musb_regs.h.
| #define MUSB_ULPI_INT_MASK 0x72 /* 8 bit */ |
Definition at line 259 of file musb_regs.h.
| #define MUSB_ULPI_INT_SRC 0x73 /* 8 bit */ |
Definition at line 260 of file musb_regs.h.
| #define MUSB_ULPI_RAW_DATA 0x77 /* 8 bit */ |
Definition at line 264 of file musb_regs.h.
| #define MUSB_ULPI_RDN_WR (1 << 2) |
Definition at line 81 of file musb_regs.h.
| #define MUSB_ULPI_REG_ADDR 0x75 /* 8 bit */ |
Definition at line 262 of file musb_regs.h.
| #define MUSB_ULPI_REG_CMPLT (1 << 1) |
Definition at line 80 of file musb_regs.h.
| #define MUSB_ULPI_REG_CONTROL 0x76 /* 8 bit */ |
Definition at line 263 of file musb_regs.h.
| #define MUSB_ULPI_REG_DATA 0x74 /* 8 bit */ |
Definition at line 261 of file musb_regs.h.
| #define MUSB_ULPI_REG_REQ (1 << 0) |
Definition at line 79 of file musb_regs.h.
| #define MUSB_ULPI_USE_EXTVBUS 0x01 |
Definition at line 76 of file musb_regs.h.
| #define MUSB_ULPI_USE_EXTVBUSIND 0x02 |
Definition at line 77 of file musb_regs.h.
| #define MUSB_VPLEN 0x7b /* 8 bit */ |
Definition at line 269 of file musb_regs.h.
1.8.2