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mv643xx.h File Reference
#include <asm/types.h>
#include <linux/mv643xx_eth.h>
#include <linux/mv643xx_i2c.h>

Go to the source code of this file.

Data Structures

struct  mpsc_shared_pdata
 
struct  mpsc_pdata
 
struct  mv64x60_wdt_pdata
 

Macros

#define MV64340_CS_0_BASE_ADDR   0x008
 
#define MV64340_CS_0_SIZE   0x010
 
#define MV64340_CS_1_BASE_ADDR   0x208
 
#define MV64340_CS_1_SIZE   0x210
 
#define MV64340_CS_2_BASE_ADDR   0x018
 
#define MV64340_CS_2_SIZE   0x020
 
#define MV64340_CS_3_BASE_ADDR   0x218
 
#define MV64340_CS_3_SIZE   0x220
 
#define MV64340_DEV_CS0_BASE_ADDR   0x028
 
#define MV64340_DEV_CS0_SIZE   0x030
 
#define MV64340_DEV_CS1_BASE_ADDR   0x228
 
#define MV64340_DEV_CS1_SIZE   0x230
 
#define MV64340_DEV_CS2_BASE_ADDR   0x248
 
#define MV64340_DEV_CS2_SIZE   0x250
 
#define MV64340_DEV_CS3_BASE_ADDR   0x038
 
#define MV64340_DEV_CS3_SIZE   0x040
 
#define MV64340_BOOTCS_BASE_ADDR   0x238
 
#define MV64340_BOOTCS_SIZE   0x240
 
#define MV64340_PCI_0_IO_BASE_ADDR   0x048
 
#define MV64340_PCI_0_IO_SIZE   0x050
 
#define MV64340_PCI_0_MEMORY0_BASE_ADDR   0x058
 
#define MV64340_PCI_0_MEMORY0_SIZE   0x060
 
#define MV64340_PCI_0_MEMORY1_BASE_ADDR   0x080
 
#define MV64340_PCI_0_MEMORY1_SIZE   0x088
 
#define MV64340_PCI_0_MEMORY2_BASE_ADDR   0x258
 
#define MV64340_PCI_0_MEMORY2_SIZE   0x260
 
#define MV64340_PCI_0_MEMORY3_BASE_ADDR   0x280
 
#define MV64340_PCI_0_MEMORY3_SIZE   0x288
 
#define MV64340_PCI_1_IO_BASE_ADDR   0x090
 
#define MV64340_PCI_1_IO_SIZE   0x098
 
#define MV64340_PCI_1_MEMORY0_BASE_ADDR   0x0a0
 
#define MV64340_PCI_1_MEMORY0_SIZE   0x0a8
 
#define MV64340_PCI_1_MEMORY1_BASE_ADDR   0x0b0
 
#define MV64340_PCI_1_MEMORY1_SIZE   0x0b8
 
#define MV64340_PCI_1_MEMORY2_BASE_ADDR   0x2a0
 
#define MV64340_PCI_1_MEMORY2_SIZE   0x2a8
 
#define MV64340_PCI_1_MEMORY3_BASE_ADDR   0x2b0
 
#define MV64340_PCI_1_MEMORY3_SIZE   0x2b8
 
#define MV64340_INTEGRATED_SRAM_BASE_ADDR   0x268
 
#define MV64340_INTERNAL_SPACE_BASE_ADDR   0x068
 
#define MV64340_BASE_ADDR_ENABLE   0x278
 
#define MV64340_PCI_0_IO_ADDR_REMAP   0x0f0
 
#define MV64340_PCI_0_MEMORY0_LOW_ADDR_REMAP   0x0f8
 
#define MV64340_PCI_0_MEMORY0_HIGH_ADDR_REMAP   0x320
 
#define MV64340_PCI_0_MEMORY1_LOW_ADDR_REMAP   0x100
 
#define MV64340_PCI_0_MEMORY1_HIGH_ADDR_REMAP   0x328
 
#define MV64340_PCI_0_MEMORY2_LOW_ADDR_REMAP   0x2f8
 
#define MV64340_PCI_0_MEMORY2_HIGH_ADDR_REMAP   0x330
 
#define MV64340_PCI_0_MEMORY3_LOW_ADDR_REMAP   0x300
 
#define MV64340_PCI_0_MEMORY3_HIGH_ADDR_REMAP   0x338
 
#define MV64340_PCI_1_IO_ADDR_REMAP   0x108
 
#define MV64340_PCI_1_MEMORY0_LOW_ADDR_REMAP   0x110
 
#define MV64340_PCI_1_MEMORY0_HIGH_ADDR_REMAP   0x340
 
#define MV64340_PCI_1_MEMORY1_LOW_ADDR_REMAP   0x118
 
#define MV64340_PCI_1_MEMORY1_HIGH_ADDR_REMAP   0x348
 
#define MV64340_PCI_1_MEMORY2_LOW_ADDR_REMAP   0x310
 
#define MV64340_PCI_1_MEMORY2_HIGH_ADDR_REMAP   0x350
 
#define MV64340_PCI_1_MEMORY3_LOW_ADDR_REMAP   0x318
 
#define MV64340_PCI_1_MEMORY3_HIGH_ADDR_REMAP   0x358
 
#define MV64340_CPU_PCI_0_HEADERS_RETARGET_CONTROL   0x3b0
 
#define MV64340_CPU_PCI_0_HEADERS_RETARGET_BASE   0x3b8
 
#define MV64340_CPU_PCI_1_HEADERS_RETARGET_CONTROL   0x3c0
 
#define MV64340_CPU_PCI_1_HEADERS_RETARGET_BASE   0x3c8
 
#define MV64340_CPU_GE_HEADERS_RETARGET_CONTROL   0x3d0
 
#define MV64340_CPU_GE_HEADERS_RETARGET_BASE   0x3d8
 
#define MV64340_CPU_IDMA_HEADERS_RETARGET_CONTROL   0x3e0
 
#define MV64340_CPU_IDMA_HEADERS_RETARGET_BASE   0x3e8
 
#define MV64340_CPU_CONFIG   0x000
 
#define MV64340_CPU_MODE   0x120
 
#define MV64340_CPU_MASTER_CONTROL   0x160
 
#define MV64340_CPU_CROSS_BAR_CONTROL_LOW   0x150
 
#define MV64340_CPU_CROSS_BAR_CONTROL_HIGH   0x158
 
#define MV64340_CPU_CROSS_BAR_TIMEOUT   0x168
 
#define MV64340_SMP_WHO_AM_I   0x200
 
#define MV64340_SMP_CPU0_DOORBELL   0x214
 
#define MV64340_SMP_CPU0_DOORBELL_CLEAR   0x21C
 
#define MV64340_SMP_CPU1_DOORBELL   0x224
 
#define MV64340_SMP_CPU1_DOORBELL_CLEAR   0x22C
 
#define MV64340_SMP_CPU0_DOORBELL_MASK   0x234
 
#define MV64340_SMP_CPU1_DOORBELL_MASK   0x23C
 
#define MV64340_SMP_SEMAPHOR0   0x244
 
#define MV64340_SMP_SEMAPHOR1   0x24c
 
#define MV64340_SMP_SEMAPHOR2   0x254
 
#define MV64340_SMP_SEMAPHOR3   0x25c
 
#define MV64340_SMP_SEMAPHOR4   0x264
 
#define MV64340_SMP_SEMAPHOR5   0x26c
 
#define MV64340_SMP_SEMAPHOR6   0x274
 
#define MV64340_SMP_SEMAPHOR7   0x27c
 
#define MV64340_CPU_0_SYNC_BARRIER_TRIGGER   0x0c0
 
#define MV64340_CPU_0_SYNC_BARRIER_VIRTUAL   0x0c8
 
#define MV64340_CPU_1_SYNC_BARRIER_TRIGGER   0x0d0
 
#define MV64340_CPU_1_SYNC_BARRIER_VIRTUAL   0x0d8
 
#define MV64340_CPU_PROTECT_WINDOW_0_BASE_ADDR   0x180
 
#define MV64340_CPU_PROTECT_WINDOW_0_SIZE   0x188
 
#define MV64340_CPU_PROTECT_WINDOW_1_BASE_ADDR   0x190
 
#define MV64340_CPU_PROTECT_WINDOW_1_SIZE   0x198
 
#define MV64340_CPU_PROTECT_WINDOW_2_BASE_ADDR   0x1a0
 
#define MV64340_CPU_PROTECT_WINDOW_2_SIZE   0x1a8
 
#define MV64340_CPU_PROTECT_WINDOW_3_BASE_ADDR   0x1b0
 
#define MV64340_CPU_PROTECT_WINDOW_3_SIZE   0x1b8
 
#define MV64340_CPU_ERROR_ADDR_LOW   0x070
 
#define MV64340_CPU_ERROR_ADDR_HIGH   0x078
 
#define MV64340_CPU_ERROR_DATA_LOW   0x128
 
#define MV64340_CPU_ERROR_DATA_HIGH   0x130
 
#define MV64340_CPU_ERROR_PARITY   0x138
 
#define MV64340_CPU_ERROR_CAUSE   0x140
 
#define MV64340_CPU_ERROR_MASK   0x148
 
#define MV64340_PUNIT_SLAVE_DEBUG_LOW   0x360
 
#define MV64340_PUNIT_SLAVE_DEBUG_HIGH   0x368
 
#define MV64340_PUNIT_MASTER_DEBUG_LOW   0x370
 
#define MV64340_PUNIT_MASTER_DEBUG_HIGH   0x378
 
#define MV64340_PUNIT_MMASK   0x3e4
 
#define MV64340_SRAM_CONFIG   0x380
 
#define MV64340_SRAM_TEST_MODE   0X3F4
 
#define MV64340_SRAM_ERROR_CAUSE   0x388
 
#define MV64340_SRAM_ERROR_ADDR   0x390
 
#define MV64340_SRAM_ERROR_ADDR_HIGH   0X3F8
 
#define MV64340_SRAM_ERROR_DATA_LOW   0x398
 
#define MV64340_SRAM_ERROR_DATA_HIGH   0x3a0
 
#define MV64340_SRAM_ERROR_DATA_PARITY   0x3a8
 
#define MV64340_SDRAM_CONFIG   0x1400
 
#define MV64340_D_UNIT_CONTROL_LOW   0x1404
 
#define MV64340_D_UNIT_CONTROL_HIGH   0x1424
 
#define MV64340_SDRAM_TIMING_CONTROL_LOW   0x1408
 
#define MV64340_SDRAM_TIMING_CONTROL_HIGH   0x140c
 
#define MV64340_SDRAM_ADDR_CONTROL   0x1410
 
#define MV64340_SDRAM_OPEN_PAGES_CONTROL   0x1414
 
#define MV64340_SDRAM_OPERATION   0x1418
 
#define MV64340_SDRAM_MODE   0x141c
 
#define MV64340_EXTENDED_DRAM_MODE   0x1420
 
#define MV64340_SDRAM_CROSS_BAR_CONTROL_LOW   0x1430
 
#define MV64340_SDRAM_CROSS_BAR_CONTROL_HIGH   0x1434
 
#define MV64340_SDRAM_CROSS_BAR_TIMEOUT   0x1438
 
#define MV64340_SDRAM_ADDR_CTRL_PADS_CALIBRATION   0x14c0
 
#define MV64340_SDRAM_DATA_PADS_CALIBRATION   0x14c4
 
#define MV64340_SDRAM_ERROR_DATA_LOW   0x1444
 
#define MV64340_SDRAM_ERROR_DATA_HIGH   0x1440
 
#define MV64340_SDRAM_ERROR_ADDR   0x1450
 
#define MV64340_SDRAM_RECEIVED_ECC   0x1448
 
#define MV64340_SDRAM_CALCULATED_ECC   0x144c
 
#define MV64340_SDRAM_ECC_CONTROL   0x1454
 
#define MV64340_SDRAM_ECC_ERROR_COUNTER   0x1458
 
#define MV64340_DFCDL_CONFIG0   0x1480
 
#define MV64340_DFCDL_CONFIG1   0x1484
 
#define MV64340_DLL_WRITE   0x1488
 
#define MV64340_DLL_READ   0x148c
 
#define MV64340_SRAM_ADDR   0x1490
 
#define MV64340_SRAM_DATA0   0x1494
 
#define MV64340_SRAM_DATA1   0x1498
 
#define MV64340_SRAM_DATA2   0x149c
 
#define MV64340_DFCL_PROBE   0x14a0
 
#define MV64340_DUNIT_DEBUG_LOW   0x1460
 
#define MV64340_DUNIT_DEBUG_HIGH   0x1464
 
#define MV64340_DUNIT_MMASK   0X1b40
 
#define MV64340_DEVICE_BANK0_PARAMETERS   0x45c
 
#define MV64340_DEVICE_BANK1_PARAMETERS   0x460
 
#define MV64340_DEVICE_BANK2_PARAMETERS   0x464
 
#define MV64340_DEVICE_BANK3_PARAMETERS   0x468
 
#define MV64340_DEVICE_BOOT_BANK_PARAMETERS   0x46c
 
#define MV64340_DEVICE_INTERFACE_CONTROL   0x4c0
 
#define MV64340_DEVICE_INTERFACE_CROSS_BAR_CONTROL_LOW   0x4c8
 
#define MV64340_DEVICE_INTERFACE_CROSS_BAR_CONTROL_HIGH   0x4cc
 
#define MV64340_DEVICE_INTERFACE_CROSS_BAR_TIMEOUT   0x4c4
 
#define MV64340_DEVICE_INTERRUPT_CAUSE   0x4d0
 
#define MV64340_DEVICE_INTERRUPT_MASK   0x4d4
 
#define MV64340_DEVICE_ERROR_ADDR   0x4d8
 
#define MV64340_DEVICE_ERROR_DATA   0x4dc
 
#define MV64340_DEVICE_ERROR_PARITY   0x4e0
 
#define MV64340_DEVICE_DEBUG_LOW   0x4e4
 
#define MV64340_DEVICE_DEBUG_HIGH   0x4e8
 
#define MV64340_RUNIT_MMASK   0x4f0
 
#define MV64340_PCI_0_CS_0_BANK_SIZE   0xc08
 
#define MV64340_PCI_1_CS_0_BANK_SIZE   0xc88
 
#define MV64340_PCI_0_CS_1_BANK_SIZE   0xd08
 
#define MV64340_PCI_1_CS_1_BANK_SIZE   0xd88
 
#define MV64340_PCI_0_CS_2_BANK_SIZE   0xc0c
 
#define MV64340_PCI_1_CS_2_BANK_SIZE   0xc8c
 
#define MV64340_PCI_0_CS_3_BANK_SIZE   0xd0c
 
#define MV64340_PCI_1_CS_3_BANK_SIZE   0xd8c
 
#define MV64340_PCI_0_DEVCS_0_BANK_SIZE   0xc10
 
#define MV64340_PCI_1_DEVCS_0_BANK_SIZE   0xc90
 
#define MV64340_PCI_0_DEVCS_1_BANK_SIZE   0xd10
 
#define MV64340_PCI_1_DEVCS_1_BANK_SIZE   0xd90
 
#define MV64340_PCI_0_DEVCS_2_BANK_SIZE   0xd18
 
#define MV64340_PCI_1_DEVCS_2_BANK_SIZE   0xd98
 
#define MV64340_PCI_0_DEVCS_3_BANK_SIZE   0xc14
 
#define MV64340_PCI_1_DEVCS_3_BANK_SIZE   0xc94
 
#define MV64340_PCI_0_DEVCS_BOOT_BANK_SIZE   0xd14
 
#define MV64340_PCI_1_DEVCS_BOOT_BANK_SIZE   0xd94
 
#define MV64340_PCI_0_P2P_MEM0_BAR_SIZE   0xd1c
 
#define MV64340_PCI_1_P2P_MEM0_BAR_SIZE   0xd9c
 
#define MV64340_PCI_0_P2P_MEM1_BAR_SIZE   0xd20
 
#define MV64340_PCI_1_P2P_MEM1_BAR_SIZE   0xda0
 
#define MV64340_PCI_0_P2P_I_O_BAR_SIZE   0xd24
 
#define MV64340_PCI_1_P2P_I_O_BAR_SIZE   0xda4
 
#define MV64340_PCI_0_CPU_BAR_SIZE   0xd28
 
#define MV64340_PCI_1_CPU_BAR_SIZE   0xda8
 
#define MV64340_PCI_0_INTERNAL_SRAM_BAR_SIZE   0xe00
 
#define MV64340_PCI_1_INTERNAL_SRAM_BAR_SIZE   0xe80
 
#define MV64340_PCI_0_EXPANSION_ROM_BAR_SIZE   0xd2c
 
#define MV64340_PCI_1_EXPANSION_ROM_BAR_SIZE   0xd9c
 
#define MV64340_PCI_0_BASE_ADDR_REG_ENABLE   0xc3c
 
#define MV64340_PCI_1_BASE_ADDR_REG_ENABLE   0xcbc
 
#define MV64340_PCI_0_CS_0_BASE_ADDR_REMAP   0xc48
 
#define MV64340_PCI_1_CS_0_BASE_ADDR_REMAP   0xcc8
 
#define MV64340_PCI_0_CS_1_BASE_ADDR_REMAP   0xd48
 
#define MV64340_PCI_1_CS_1_BASE_ADDR_REMAP   0xdc8
 
#define MV64340_PCI_0_CS_2_BASE_ADDR_REMAP   0xc4c
 
#define MV64340_PCI_1_CS_2_BASE_ADDR_REMAP   0xccc
 
#define MV64340_PCI_0_CS_3_BASE_ADDR_REMAP   0xd4c
 
#define MV64340_PCI_1_CS_3_BASE_ADDR_REMAP   0xdcc
 
#define MV64340_PCI_0_CS_0_BASE_HIGH_ADDR_REMAP   0xF04
 
#define MV64340_PCI_1_CS_0_BASE_HIGH_ADDR_REMAP   0xF84
 
#define MV64340_PCI_0_CS_1_BASE_HIGH_ADDR_REMAP   0xF08
 
#define MV64340_PCI_1_CS_1_BASE_HIGH_ADDR_REMAP   0xF88
 
#define MV64340_PCI_0_CS_2_BASE_HIGH_ADDR_REMAP   0xF0C
 
#define MV64340_PCI_1_CS_2_BASE_HIGH_ADDR_REMAP   0xF8C
 
#define MV64340_PCI_0_CS_3_BASE_HIGH_ADDR_REMAP   0xF10
 
#define MV64340_PCI_1_CS_3_BASE_HIGH_ADDR_REMAP   0xF90
 
#define MV64340_PCI_0_DEVCS_0_BASE_ADDR_REMAP   0xc50
 
#define MV64340_PCI_1_DEVCS_0_BASE_ADDR_REMAP   0xcd0
 
#define MV64340_PCI_0_DEVCS_1_BASE_ADDR_REMAP   0xd50
 
#define MV64340_PCI_1_DEVCS_1_BASE_ADDR_REMAP   0xdd0
 
#define MV64340_PCI_0_DEVCS_2_BASE_ADDR_REMAP   0xd58
 
#define MV64340_PCI_1_DEVCS_2_BASE_ADDR_REMAP   0xdd8
 
#define MV64340_PCI_0_DEVCS_3_BASE_ADDR_REMAP   0xc54
 
#define MV64340_PCI_1_DEVCS_3_BASE_ADDR_REMAP   0xcd4
 
#define MV64340_PCI_0_DEVCS_BOOTCS_BASE_ADDR_REMAP   0xd54
 
#define MV64340_PCI_1_DEVCS_BOOTCS_BASE_ADDR_REMAP   0xdd4
 
#define MV64340_PCI_0_P2P_MEM0_BASE_ADDR_REMAP_LOW   0xd5c
 
#define MV64340_PCI_1_P2P_MEM0_BASE_ADDR_REMAP_LOW   0xddc
 
#define MV64340_PCI_0_P2P_MEM0_BASE_ADDR_REMAP_HIGH   0xd60
 
#define MV64340_PCI_1_P2P_MEM0_BASE_ADDR_REMAP_HIGH   0xde0
 
#define MV64340_PCI_0_P2P_MEM1_BASE_ADDR_REMAP_LOW   0xd64
 
#define MV64340_PCI_1_P2P_MEM1_BASE_ADDR_REMAP_LOW   0xde4
 
#define MV64340_PCI_0_P2P_MEM1_BASE_ADDR_REMAP_HIGH   0xd68
 
#define MV64340_PCI_1_P2P_MEM1_BASE_ADDR_REMAP_HIGH   0xde8
 
#define MV64340_PCI_0_P2P_I_O_BASE_ADDR_REMAP   0xd6c
 
#define MV64340_PCI_1_P2P_I_O_BASE_ADDR_REMAP   0xdec
 
#define MV64340_PCI_0_CPU_BASE_ADDR_REMAP_LOW   0xd70
 
#define MV64340_PCI_1_CPU_BASE_ADDR_REMAP_LOW   0xdf0
 
#define MV64340_PCI_0_CPU_BASE_ADDR_REMAP_HIGH   0xd74
 
#define MV64340_PCI_1_CPU_BASE_ADDR_REMAP_HIGH   0xdf4
 
#define MV64340_PCI_0_INTEGRATED_SRAM_BASE_ADDR_REMAP   0xf00
 
#define MV64340_PCI_1_INTEGRATED_SRAM_BASE_ADDR_REMAP   0xf80
 
#define MV64340_PCI_0_EXPANSION_ROM_BASE_ADDR_REMAP   0xf38
 
#define MV64340_PCI_1_EXPANSION_ROM_BASE_ADDR_REMAP   0xfb8
 
#define MV64340_PCI_0_ADDR_DECODE_CONTROL   0xd3c
 
#define MV64340_PCI_1_ADDR_DECODE_CONTROL   0xdbc
 
#define MV64340_PCI_0_HEADERS_RETARGET_CONTROL   0xF40
 
#define MV64340_PCI_1_HEADERS_RETARGET_CONTROL   0xFc0
 
#define MV64340_PCI_0_HEADERS_RETARGET_BASE   0xF44
 
#define MV64340_PCI_1_HEADERS_RETARGET_BASE   0xFc4
 
#define MV64340_PCI_0_HEADERS_RETARGET_HIGH   0xF48
 
#define MV64340_PCI_1_HEADERS_RETARGET_HIGH   0xFc8
 
#define MV64340_PCI_0_DLL_STATUS_AND_COMMAND   0x1d20
 
#define MV64340_PCI_1_DLL_STATUS_AND_COMMAND   0x1da0
 
#define MV64340_PCI_0_MPP_PADS_DRIVE_CONTROL   0x1d1C
 
#define MV64340_PCI_1_MPP_PADS_DRIVE_CONTROL   0x1d9C
 
#define MV64340_PCI_0_COMMAND   0xc00
 
#define MV64340_PCI_1_COMMAND   0xc80
 
#define MV64340_PCI_0_MODE   0xd00
 
#define MV64340_PCI_1_MODE   0xd80
 
#define MV64340_PCI_0_RETRY   0xc04
 
#define MV64340_PCI_1_RETRY   0xc84
 
#define MV64340_PCI_0_READ_BUFFER_DISCARD_TIMER   0xd04
 
#define MV64340_PCI_1_READ_BUFFER_DISCARD_TIMER   0xd84
 
#define MV64340_PCI_0_MSI_TRIGGER_TIMER   0xc38
 
#define MV64340_PCI_1_MSI_TRIGGER_TIMER   0xcb8
 
#define MV64340_PCI_0_ARBITER_CONTROL   0x1d00
 
#define MV64340_PCI_1_ARBITER_CONTROL   0x1d80
 
#define MV64340_PCI_0_CROSS_BAR_CONTROL_LOW   0x1d08
 
#define MV64340_PCI_1_CROSS_BAR_CONTROL_LOW   0x1d88
 
#define MV64340_PCI_0_CROSS_BAR_CONTROL_HIGH   0x1d0c
 
#define MV64340_PCI_1_CROSS_BAR_CONTROL_HIGH   0x1d8c
 
#define MV64340_PCI_0_CROSS_BAR_TIMEOUT   0x1d04
 
#define MV64340_PCI_1_CROSS_BAR_TIMEOUT   0x1d84
 
#define MV64340_PCI_0_SYNC_BARRIER_TRIGGER_REG   0x1D18
 
#define MV64340_PCI_1_SYNC_BARRIER_TRIGGER_REG   0x1D98
 
#define MV64340_PCI_0_SYNC_BARRIER_VIRTUAL_REG   0x1d10
 
#define MV64340_PCI_1_SYNC_BARRIER_VIRTUAL_REG   0x1d90
 
#define MV64340_PCI_0_P2P_CONFIG   0x1d14
 
#define MV64340_PCI_1_P2P_CONFIG   0x1d94
 
#define MV64340_PCI_0_ACCESS_CONTROL_BASE_0_LOW   0x1e00
 
#define MV64340_PCI_0_ACCESS_CONTROL_BASE_0_HIGH   0x1e04
 
#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_0   0x1e08
 
#define MV64340_PCI_0_ACCESS_CONTROL_BASE_1_LOW   0x1e10
 
#define MV64340_PCI_0_ACCESS_CONTROL_BASE_1_HIGH   0x1e14
 
#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_1   0x1e18
 
#define MV64340_PCI_0_ACCESS_CONTROL_BASE_2_LOW   0x1e20
 
#define MV64340_PCI_0_ACCESS_CONTROL_BASE_2_HIGH   0x1e24
 
#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_2   0x1e28
 
#define MV64340_PCI_0_ACCESS_CONTROL_BASE_3_LOW   0x1e30
 
#define MV64340_PCI_0_ACCESS_CONTROL_BASE_3_HIGH   0x1e34
 
#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_3   0x1e38
 
#define MV64340_PCI_0_ACCESS_CONTROL_BASE_4_LOW   0x1e40
 
#define MV64340_PCI_0_ACCESS_CONTROL_BASE_4_HIGH   0x1e44
 
#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_4   0x1e48
 
#define MV64340_PCI_0_ACCESS_CONTROL_BASE_5_LOW   0x1e50
 
#define MV64340_PCI_0_ACCESS_CONTROL_BASE_5_HIGH   0x1e54
 
#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_5   0x1e58
 
#define MV64340_PCI_1_ACCESS_CONTROL_BASE_0_LOW   0x1e80
 
#define MV64340_PCI_1_ACCESS_CONTROL_BASE_0_HIGH   0x1e84
 
#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_0   0x1e88
 
#define MV64340_PCI_1_ACCESS_CONTROL_BASE_1_LOW   0x1e90
 
#define MV64340_PCI_1_ACCESS_CONTROL_BASE_1_HIGH   0x1e94
 
#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_1   0x1e98
 
#define MV64340_PCI_1_ACCESS_CONTROL_BASE_2_LOW   0x1ea0
 
#define MV64340_PCI_1_ACCESS_CONTROL_BASE_2_HIGH   0x1ea4
 
#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_2   0x1ea8
 
#define MV64340_PCI_1_ACCESS_CONTROL_BASE_3_LOW   0x1eb0
 
#define MV64340_PCI_1_ACCESS_CONTROL_BASE_3_HIGH   0x1eb4
 
#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_3   0x1eb8
 
#define MV64340_PCI_1_ACCESS_CONTROL_BASE_4_LOW   0x1ec0
 
#define MV64340_PCI_1_ACCESS_CONTROL_BASE_4_HIGH   0x1ec4
 
#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_4   0x1ec8
 
#define MV64340_PCI_1_ACCESS_CONTROL_BASE_5_LOW   0x1ed0
 
#define MV64340_PCI_1_ACCESS_CONTROL_BASE_5_HIGH   0x1ed4
 
#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_5   0x1ed8
 
#define MV64340_PCI_0_CONFIG_ADDR   0xcf8
 
#define MV64340_PCI_0_CONFIG_DATA_VIRTUAL_REG   0xcfc
 
#define MV64340_PCI_1_CONFIG_ADDR   0xc78
 
#define MV64340_PCI_1_CONFIG_DATA_VIRTUAL_REG   0xc7c
 
#define MV64340_PCI_0_INTERRUPT_ACKNOWLEDGE_VIRTUAL_REG   0xc34
 
#define MV64340_PCI_1_INTERRUPT_ACKNOWLEDGE_VIRTUAL_REG   0xcb4
 
#define MV64340_PCI_0_SERR_MASK   0xc28
 
#define MV64340_PCI_1_SERR_MASK   0xca8
 
#define MV64340_PCI_0_ERROR_ADDR_LOW   0x1d40
 
#define MV64340_PCI_1_ERROR_ADDR_LOW   0x1dc0
 
#define MV64340_PCI_0_ERROR_ADDR_HIGH   0x1d44
 
#define MV64340_PCI_1_ERROR_ADDR_HIGH   0x1dc4
 
#define MV64340_PCI_0_ERROR_ATTRIBUTE   0x1d48
 
#define MV64340_PCI_1_ERROR_ATTRIBUTE   0x1dc8
 
#define MV64340_PCI_0_ERROR_COMMAND   0x1d50
 
#define MV64340_PCI_1_ERROR_COMMAND   0x1dd0
 
#define MV64340_PCI_0_ERROR_CAUSE   0x1d58
 
#define MV64340_PCI_1_ERROR_CAUSE   0x1dd8
 
#define MV64340_PCI_0_ERROR_MASK   0x1d5c
 
#define MV64340_PCI_1_ERROR_MASK   0x1ddc
 
#define MV64340_PCI_0_MMASK   0X1D24
 
#define MV64340_PCI_1_MMASK   0X1DA4
 
#define MV64340_PCI_DEVICE_AND_VENDOR_ID   0x000
 
#define MV64340_PCI_STATUS_AND_COMMAND   0x004
 
#define MV64340_PCI_CLASS_CODE_AND_REVISION_ID   0x008
 
#define MV64340_PCI_BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE   0x00C
 
#define MV64340_PCI_SCS_0_BASE_ADDR_LOW   0x010
 
#define MV64340_PCI_SCS_0_BASE_ADDR_HIGH   0x014
 
#define MV64340_PCI_SCS_1_BASE_ADDR_LOW   0x018
 
#define MV64340_PCI_SCS_1_BASE_ADDR_HIGH   0x01C
 
#define MV64340_PCI_INTERNAL_REG_MEM_MAPPED_BASE_ADDR_LOW   0x020
 
#define MV64340_PCI_INTERNAL_REG_MEM_MAPPED_BASE_ADDR_HIGH   0x024
 
#define MV64340_PCI_SUBSYSTEM_ID_AND_SUBSYSTEM_VENDOR_ID   0x02c
 
#define MV64340_PCI_EXPANSION_ROM_BASE_ADDR_REG   0x030
 
#define MV64340_PCI_CAPABILTY_LIST_POINTER   0x034
 
#define MV64340_PCI_INTERRUPT_PIN_AND_LINE   0x03C
 
#define MV64340_PCI_POWER_MANAGEMENT_CAPABILITY   0x040
 
#define MV64340_PCI_POWER_MANAGEMENT_STATUS_AND_CONTROL   0x044
 
#define MV64340_PCI_VPD_ADDR   0x048
 
#define MV64340_PCI_VPD_DATA   0x04c
 
#define MV64340_PCI_MSI_MESSAGE_CONTROL   0x050
 
#define MV64340_PCI_MSI_MESSAGE_ADDR   0x054
 
#define MV64340_PCI_MSI_MESSAGE_UPPER_ADDR   0x058
 
#define MV64340_PCI_MSI_MESSAGE_DATA   0x05c
 
#define MV64340_PCI_X_COMMAND   0x060
 
#define MV64340_PCI_X_STATUS   0x064
 
#define MV64340_PCI_COMPACT_PCI_HOT_SWAP   0x068
 
#define MV64340_PCI_SCS_2_BASE_ADDR_LOW   0x110
 
#define MV64340_PCI_SCS_2_BASE_ADDR_HIGH   0x114
 
#define MV64340_PCI_SCS_3_BASE_ADDR_LOW   0x118
 
#define MV64340_PCI_SCS_3_BASE_ADDR_HIGH   0x11c
 
#define MV64340_PCI_INTERNAL_SRAM_BASE_ADDR_LOW   0x120
 
#define MV64340_PCI_INTERNAL_SRAM_BASE_ADDR_HIGH   0x124
 
#define MV64340_PCI_DEVCS_0_BASE_ADDR_LOW   0x210
 
#define MV64340_PCI_DEVCS_0_BASE_ADDR_HIGH   0x214
 
#define MV64340_PCI_DEVCS_1_BASE_ADDR_LOW   0x218
 
#define MV64340_PCI_DEVCS_1_BASE_ADDR_HIGH   0x21c
 
#define MV64340_PCI_DEVCS_2_BASE_ADDR_LOW   0x220
 
#define MV64340_PCI_DEVCS_2_BASE_ADDR_HIGH   0x224
 
#define MV64340_PCI_DEVCS_3_BASE_ADDR_LOW   0x310
 
#define MV64340_PCI_DEVCS_3_BASE_ADDR_HIGH   0x314
 
#define MV64340_PCI_BOOT_CS_BASE_ADDR_LOW   0x318
 
#define MV64340_PCI_BOOT_CS_BASE_ADDR_HIGH   0x31c
 
#define MV64340_PCI_CPU_BASE_ADDR_LOW   0x220
 
#define MV64340_PCI_CPU_BASE_ADDR_HIGH   0x224
 
#define MV64340_PCI_P2P_MEM0_BASE_ADDR_LOW   0x410
 
#define MV64340_PCI_P2P_MEM0_BASE_ADDR_HIGH   0x414
 
#define MV64340_PCI_P2P_MEM1_BASE_ADDR_LOW   0x418
 
#define MV64340_PCI_P2P_MEM1_BASE_ADDR_HIGH   0x41c
 
#define MV64340_PCI_P2P_I_O_BASE_ADDR   0x420
 
#define MV64340_PCI_INTERNAL_REGS_I_O_MAPPED_BASE_ADDR   0x424
 
#define MV64340_I2O_INBOUND_MESSAGE_REG0_PCI_0_SIDE   0x010
 
#define MV64340_I2O_INBOUND_MESSAGE_REG1_PCI_0_SIDE   0x014
 
#define MV64340_I2O_OUTBOUND_MESSAGE_REG0_PCI_0_SIDE   0x018
 
#define MV64340_I2O_OUTBOUND_MESSAGE_REG1_PCI_0_SIDE   0x01C
 
#define MV64340_I2O_INBOUND_DOORBELL_REG_PCI_0_SIDE   0x020
 
#define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_PCI_0_SIDE   0x024
 
#define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_PCI_0_SIDE   0x028
 
#define MV64340_I2O_OUTBOUND_DOORBELL_REG_PCI_0_SIDE   0x02C
 
#define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_PCI_0_SIDE   0x030
 
#define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_PCI_0_SIDE   0x034
 
#define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_0_SIDE   0x040
 
#define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_0_SIDE   0x044
 
#define MV64340_I2O_QUEUE_CONTROL_REG_PCI_0_SIDE   0x050
 
#define MV64340_I2O_QUEUE_BASE_ADDR_REG_PCI_0_SIDE   0x054
 
#define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_PCI_0_SIDE   0x060
 
#define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_PCI_0_SIDE   0x064
 
#define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_PCI_0_SIDE   0x068
 
#define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_PCI_0_SIDE   0x06C
 
#define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_PCI_0_SIDE   0x070
 
#define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_PCI_0_SIDE   0x074
 
#define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_PCI_0_SIDE   0x0F8
 
#define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_PCI_0_SIDE   0x0FC
 
#define MV64340_I2O_INBOUND_MESSAGE_REG0_PCI_1_SIDE   0x090
 
#define MV64340_I2O_INBOUND_MESSAGE_REG1_PCI_1_SIDE   0x094
 
#define MV64340_I2O_OUTBOUND_MESSAGE_REG0_PCI_1_SIDE   0x098
 
#define MV64340_I2O_OUTBOUND_MESSAGE_REG1_PCI_1_SIDE   0x09C
 
#define MV64340_I2O_INBOUND_DOORBELL_REG_PCI_1_SIDE   0x0A0
 
#define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_PCI_1_SIDE   0x0A4
 
#define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_PCI_1_SIDE   0x0A8
 
#define MV64340_I2O_OUTBOUND_DOORBELL_REG_PCI_1_SIDE   0x0AC
 
#define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_PCI_1_SIDE   0x0B0
 
#define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_PCI_1_SIDE   0x0B4
 
#define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_1_SIDE   0x0C0
 
#define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_1_SIDE   0x0C4
 
#define MV64340_I2O_QUEUE_CONTROL_REG_PCI_1_SIDE   0x0D0
 
#define MV64340_I2O_QUEUE_BASE_ADDR_REG_PCI_1_SIDE   0x0D4
 
#define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_PCI_1_SIDE   0x0E0
 
#define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_PCI_1_SIDE   0x0E4
 
#define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_PCI_1_SIDE   0x0E8
 
#define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_PCI_1_SIDE   0x0EC
 
#define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_PCI_1_SIDE   0x0F0
 
#define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_PCI_1_SIDE   0x0F4
 
#define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_PCI_1_SIDE   0x078
 
#define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_PCI_1_SIDE   0x07C
 
#define MV64340_I2O_INBOUND_MESSAGE_REG0_CPU0_SIDE   0x1C10
 
#define MV64340_I2O_INBOUND_MESSAGE_REG1_CPU0_SIDE   0x1C14
 
#define MV64340_I2O_OUTBOUND_MESSAGE_REG0_CPU0_SIDE   0x1C18
 
#define MV64340_I2O_OUTBOUND_MESSAGE_REG1_CPU0_SIDE   0x1C1C
 
#define MV64340_I2O_INBOUND_DOORBELL_REG_CPU0_SIDE   0x1C20
 
#define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_CPU0_SIDE   0x1C24
 
#define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_CPU0_SIDE   0x1C28
 
#define MV64340_I2O_OUTBOUND_DOORBELL_REG_CPU0_SIDE   0x1C2C
 
#define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_CPU0_SIDE   0x1C30
 
#define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_CPU0_SIDE   0x1C34
 
#define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_CPU0_SIDE   0x1C40
 
#define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_CPU0_SIDE   0x1C44
 
#define MV64340_I2O_QUEUE_CONTROL_REG_CPU0_SIDE   0x1C50
 
#define MV64340_I2O_QUEUE_BASE_ADDR_REG_CPU0_SIDE   0x1C54
 
#define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_CPU0_SIDE   0x1C60
 
#define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_CPU0_SIDE   0x1C64
 
#define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_CPU0_SIDE   0x1C68
 
#define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_CPU0_SIDE   0x1C6C
 
#define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_CPU0_SIDE   0x1C70
 
#define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_CPU0_SIDE   0x1C74
 
#define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_CPU0_SIDE   0x1CF8
 
#define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_CPU0_SIDE   0x1CFC
 
#define MV64340_I2O_INBOUND_MESSAGE_REG0_CPU1_SIDE   0x1C90
 
#define MV64340_I2O_INBOUND_MESSAGE_REG1_CPU1_SIDE   0x1C94
 
#define MV64340_I2O_OUTBOUND_MESSAGE_REG0_CPU1_SIDE   0x1C98
 
#define MV64340_I2O_OUTBOUND_MESSAGE_REG1_CPU1_SIDE   0x1C9C
 
#define MV64340_I2O_INBOUND_DOORBELL_REG_CPU1_SIDE   0x1CA0
 
#define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_CPU1_SIDE   0x1CA4
 
#define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_CPU1_SIDE   0x1CA8
 
#define MV64340_I2O_OUTBOUND_DOORBELL_REG_CPU1_SIDE   0x1CAC
 
#define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_CPU1_SIDE   0x1CB0
 
#define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_CPU1_SIDE   0x1CB4
 
#define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_CPU1_SIDE   0x1CC0
 
#define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_CPU1_SIDE   0x1CC4
 
#define MV64340_I2O_QUEUE_CONTROL_REG_CPU1_SIDE   0x1CD0
 
#define MV64340_I2O_QUEUE_BASE_ADDR_REG_CPU1_SIDE   0x1CD4
 
#define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_CPU1_SIDE   0x1CE0
 
#define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_CPU1_SIDE   0x1CE4
 
#define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_CPU1_SIDE   0x1CE8
 
#define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_CPU1_SIDE   0x1CEC
 
#define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_CPU1_SIDE   0x1CF0
 
#define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_CPU1_SIDE   0x1CF4
 
#define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_CPU1_SIDE   0x1C78
 
#define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_CPU1_SIDE   0x1C7C
 
#define MV64340_CUNIT_BASE_ADDR_REG0   0xf200
 
#define MV64340_CUNIT_BASE_ADDR_REG1   0xf208
 
#define MV64340_CUNIT_BASE_ADDR_REG2   0xf210
 
#define MV64340_CUNIT_BASE_ADDR_REG3   0xf218
 
#define MV64340_CUNIT_SIZE0   0xf204
 
#define MV64340_CUNIT_SIZE1   0xf20c
 
#define MV64340_CUNIT_SIZE2   0xf214
 
#define MV64340_CUNIT_SIZE3   0xf21c
 
#define MV64340_CUNIT_HIGH_ADDR_REMAP_REG0   0xf240
 
#define MV64340_CUNIT_HIGH_ADDR_REMAP_REG1   0xf244
 
#define MV64340_CUNIT_BASE_ADDR_ENABLE_REG   0xf250
 
#define MV64340_MPSC0_ACCESS_PROTECTION_REG   0xf254
 
#define MV64340_MPSC1_ACCESS_PROTECTION_REG   0xf258
 
#define MV64340_CUNIT_INTERNAL_SPACE_BASE_ADDR_REG   0xf25C
 
#define MV64340_CUNIT_INTERRUPT_CAUSE_REG   0xf310
 
#define MV64340_CUNIT_INTERRUPT_MASK_REG   0xf314
 
#define MV64340_CUNIT_ERROR_ADDR   0xf318
 
#define MV64340_CUNIT_ARBITER_CONTROL_REG   0xf300
 
#define MV64340_CUNIT_CONFIG_REG   0xb40c
 
#define MV64340_CUNIT_CRROSBAR_TIMEOUT_REG   0xf304
 
#define MV64340_CUNIT_DEBUG_LOW   0xf340
 
#define MV64340_CUNIT_DEBUG_HIGH   0xf344
 
#define MV64340_CUNIT_MMASK   0xf380
 
#define MV64340_MPSC_ROUTING_REG   0xb400
 
#define MV64340_MPSC_RX_CLOCK_ROUTING_REG   0xb404
 
#define MV64340_MPSC_TX_CLOCK_ROUTING_REG   0xb408
 
#define MV64340_MPSC_CAUSE_REG(port)   (0xb804 + (port<<3))
 
#define MV64340_MPSC_MASK_REG(port)   (0xb884 + (port<<3))
 
#define MV64340_MPSC_MAIN_CONFIG_LOW(port)   (0x8000 + (port<<12))
 
#define MV64340_MPSC_MAIN_CONFIG_HIGH(port)   (0x8004 + (port<<12))
 
#define MV64340_MPSC_PROTOCOL_CONFIG(port)   (0x8008 + (port<<12))
 
#define MV64340_MPSC_CHANNEL_REG1(port)   (0x800c + (port<<12))
 
#define MV64340_MPSC_CHANNEL_REG2(port)   (0x8010 + (port<<12))
 
#define MV64340_MPSC_CHANNEL_REG3(port)   (0x8014 + (port<<12))
 
#define MV64340_MPSC_CHANNEL_REG4(port)   (0x8018 + (port<<12))
 
#define MV64340_MPSC_CHANNEL_REG5(port)   (0x801c + (port<<12))
 
#define MV64340_MPSC_CHANNEL_REG6(port)   (0x8020 + (port<<12))
 
#define MV64340_MPSC_CHANNEL_REG7(port)   (0x8024 + (port<<12))
 
#define MV64340_MPSC_CHANNEL_REG8(port)   (0x8028 + (port<<12))
 
#define MV64340_MPSC_CHANNEL_REG9(port)   (0x802c + (port<<12))
 
#define MV64340_MPSC_CHANNEL_REG10(port)   (0x8030 + (port<<12))
 
#define MV64340_SDMA_CONFIG_REG(channel)   (0x4000 + (channel<<13))
 
#define MV64340_SDMA_COMMAND_REG(channel)   (0x4008 + (channel<<13))
 
#define MV64340_SDMA_CURRENT_RX_DESCRIPTOR_POINTER(channel)   (0x4810 + (channel<<13))
 
#define MV64340_SDMA_CURRENT_TX_DESCRIPTOR_POINTER(channel)   (0x4c10 + (channel<<13))
 
#define MV64340_SDMA_FIRST_TX_DESCRIPTOR_POINTER(channel)   (0x4c14 + (channel<<13))
 
#define MV64340_SDMA_CAUSE_REG   0xb800
 
#define MV64340_SDMA_MASK_REG   0xb880
 
#define MV64340_BRG_CONFIG_REG(brg)   (0xb200 + (brg<<3))
 
#define MV64340_BRG_BAUDE_TUNING_REG(brg)   (0xb208 + (brg<<3))
 
#define MV64340_BRG_CAUSE_REG   0xb834
 
#define MV64340_BRG_MASK_REG   0xb8b4
 
#define MV64340_DMA_CHANNEL0_CONTROL   0x840
 
#define MV64340_DMA_CHANNEL0_CONTROL_HIGH   0x880
 
#define MV64340_DMA_CHANNEL1_CONTROL   0x844
 
#define MV64340_DMA_CHANNEL1_CONTROL_HIGH   0x884
 
#define MV64340_DMA_CHANNEL2_CONTROL   0x848
 
#define MV64340_DMA_CHANNEL2_CONTROL_HIGH   0x888
 
#define MV64340_DMA_CHANNEL3_CONTROL   0x84C
 
#define MV64340_DMA_CHANNEL3_CONTROL_HIGH   0x88C
 
#define MV64340_DMA_CHANNEL0_BYTE_COUNT   0x800
 
#define MV64340_DMA_CHANNEL1_BYTE_COUNT   0x804
 
#define MV64340_DMA_CHANNEL2_BYTE_COUNT   0x808
 
#define MV64340_DMA_CHANNEL3_BYTE_COUNT   0x80C
 
#define MV64340_DMA_CHANNEL0_SOURCE_ADDR   0x810
 
#define MV64340_DMA_CHANNEL1_SOURCE_ADDR   0x814
 
#define MV64340_DMA_CHANNEL2_SOURCE_ADDR   0x818
 
#define MV64340_DMA_CHANNEL3_SOURCE_ADDR   0x81c
 
#define MV64340_DMA_CHANNEL0_DESTINATION_ADDR   0x820
 
#define MV64340_DMA_CHANNEL1_DESTINATION_ADDR   0x824
 
#define MV64340_DMA_CHANNEL2_DESTINATION_ADDR   0x828
 
#define MV64340_DMA_CHANNEL3_DESTINATION_ADDR   0x82C
 
#define MV64340_DMA_CHANNEL0_NEXT_DESCRIPTOR_POINTER   0x830
 
#define MV64340_DMA_CHANNEL1_NEXT_DESCRIPTOR_POINTER   0x834
 
#define MV64340_DMA_CHANNEL2_NEXT_DESCRIPTOR_POINTER   0x838
 
#define MV64340_DMA_CHANNEL3_NEXT_DESCRIPTOR_POINTER   0x83C
 
#define MV64340_DMA_CHANNEL0_CURRENT_DESCRIPTOR_POINTER   0x870
 
#define MV64340_DMA_CHANNEL1_CURRENT_DESCRIPTOR_POINTER   0x874
 
#define MV64340_DMA_CHANNEL2_CURRENT_DESCRIPTOR_POINTER   0x878
 
#define MV64340_DMA_CHANNEL3_CURRENT_DESCRIPTOR_POINTER   0x87C
 
#define MV64340_DMA_BASE_ADDR_REG0   0xa00
 
#define MV64340_DMA_BASE_ADDR_REG1   0xa08
 
#define MV64340_DMA_BASE_ADDR_REG2   0xa10
 
#define MV64340_DMA_BASE_ADDR_REG3   0xa18
 
#define MV64340_DMA_BASE_ADDR_REG4   0xa20
 
#define MV64340_DMA_BASE_ADDR_REG5   0xa28
 
#define MV64340_DMA_BASE_ADDR_REG6   0xa30
 
#define MV64340_DMA_BASE_ADDR_REG7   0xa38
 
#define MV64340_DMA_SIZE_REG0   0xa04
 
#define MV64340_DMA_SIZE_REG1   0xa0c
 
#define MV64340_DMA_SIZE_REG2   0xa14
 
#define MV64340_DMA_SIZE_REG3   0xa1c
 
#define MV64340_DMA_SIZE_REG4   0xa24
 
#define MV64340_DMA_SIZE_REG5   0xa2c
 
#define MV64340_DMA_SIZE_REG6   0xa34
 
#define MV64340_DMA_SIZE_REG7   0xa3C
 
#define MV64340_DMA_HIGH_ADDR_REMAP_REG0   0xa60
 
#define MV64340_DMA_HIGH_ADDR_REMAP_REG1   0xa64
 
#define MV64340_DMA_HIGH_ADDR_REMAP_REG2   0xa68
 
#define MV64340_DMA_HIGH_ADDR_REMAP_REG3   0xa6C
 
#define MV64340_DMA_BASE_ADDR_ENABLE_REG   0xa80
 
#define MV64340_DMA_CHANNEL0_ACCESS_PROTECTION_REG   0xa70
 
#define MV64340_DMA_CHANNEL1_ACCESS_PROTECTION_REG   0xa74
 
#define MV64340_DMA_CHANNEL2_ACCESS_PROTECTION_REG   0xa78
 
#define MV64340_DMA_CHANNEL3_ACCESS_PROTECTION_REG   0xa7c
 
#define MV64340_DMA_ARBITER_CONTROL   0x860
 
#define MV64340_DMA_CROSS_BAR_TIMEOUT   0x8d0
 
#define MV64340_DMA_HEADERS_RETARGET_CONTROL   0xa84
 
#define MV64340_DMA_HEADERS_RETARGET_BASE   0xa88
 
#define MV64340_DMA_INTERRUPT_CAUSE_REG   0x8c0
 
#define MV64340_DMA_INTERRUPT_CAUSE_MASK   0x8c4
 
#define MV64340_DMA_ERROR_ADDR   0x8c8
 
#define MV64340_DMA_ERROR_SELECT   0x8cc
 
#define MV64340_DMA_DEBUG_LOW   0x8e0
 
#define MV64340_DMA_DEBUG_HIGH   0x8e4
 
#define MV64340_DMA_SPARE   0xA8C
 
#define MV64340_TIMER_COUNTER0   0x850
 
#define MV64340_TIMER_COUNTER1   0x854
 
#define MV64340_TIMER_COUNTER2   0x858
 
#define MV64340_TIMER_COUNTER3   0x85C
 
#define MV64340_TIMER_COUNTER_0_3_CONTROL   0x864
 
#define MV64340_TIMER_COUNTER_0_3_INTERRUPT_CAUSE   0x868
 
#define MV64340_TIMER_COUNTER_0_3_INTERRUPT_MASK   0x86c
 
#define MV64340_WATCHDOG_CONFIG_REG   0xb410
 
#define MV64340_WATCHDOG_VALUE_REG   0xb414
 
#define MV64XXX_I2C_OFFSET   0xc000
 
#define MV64XXX_I2C_REG_BLOCK_SIZE   0x0020
 
#define MV64340_GPP_IO_CONTROL   0xf100
 
#define MV64340_GPP_LEVEL_CONTROL   0xf110
 
#define MV64340_GPP_VALUE   0xf104
 
#define MV64340_GPP_INTERRUPT_CAUSE   0xf108
 
#define MV64340_GPP_INTERRUPT_MASK0   0xf10c
 
#define MV64340_GPP_INTERRUPT_MASK1   0xf114
 
#define MV64340_GPP_VALUE_SET   0xf118
 
#define MV64340_GPP_VALUE_CLEAR   0xf11c
 
#define MV64340_MAIN_INTERRUPT_CAUSE_LOW   0x004
 
#define MV64340_MAIN_INTERRUPT_CAUSE_HIGH   0x00c
 
#define MV64340_CPU_INTERRUPT0_MASK_LOW   0x014
 
#define MV64340_CPU_INTERRUPT0_MASK_HIGH   0x01c
 
#define MV64340_CPU_INTERRUPT0_SELECT_CAUSE   0x024
 
#define MV64340_CPU_INTERRUPT1_MASK_LOW   0x034
 
#define MV64340_CPU_INTERRUPT1_MASK_HIGH   0x03c
 
#define MV64340_CPU_INTERRUPT1_SELECT_CAUSE   0x044
 
#define MV64340_INTERRUPT0_MASK_0_LOW   0x054
 
#define MV64340_INTERRUPT0_MASK_0_HIGH   0x05c
 
#define MV64340_INTERRUPT0_SELECT_CAUSE   0x064
 
#define MV64340_INTERRUPT1_MASK_0_LOW   0x074
 
#define MV64340_INTERRUPT1_MASK_0_HIGH   0x07c
 
#define MV64340_INTERRUPT1_SELECT_CAUSE   0x084
 
#define MV64340_MPP_CONTROL0   0xf000
 
#define MV64340_MPP_CONTROL1   0xf004
 
#define MV64340_MPP_CONTROL2   0xf008
 
#define MV64340_MPP_CONTROL3   0xf00c
 
#define MV64340_SERIAL_INIT_LAST_DATA   0xf324
 
#define MV64340_SERIAL_INIT_CONTROL   0xf328
 
#define MV64340_SERIAL_INIT_STATUS   0xf32c
 
#define MPSC_SHARED_NAME   "mpsc_shared"
 
#define MPSC_ROUTING_BASE_ORDER   0
 
#define MPSC_SDMA_INTR_BASE_ORDER   1
 
#define MPSC_ROUTING_REG_BLOCK_SIZE   0x000c
 
#define MPSC_SDMA_INTR_REG_BLOCK_SIZE   0x0084
 
#define MPSC_CTLR_NAME   "mpsc"
 
#define MPSC_BASE_ORDER   0
 
#define MPSC_SDMA_BASE_ORDER   1
 
#define MPSC_BRG_BASE_ORDER   2
 
#define MPSC_REG_BLOCK_SIZE   0x0038
 
#define MPSC_SDMA_REG_BLOCK_SIZE   0x0c18
 
#define MPSC_BRG_REG_BLOCK_SIZE   0x0008
 
#define MV64x60_WDT_NAME   "mv64x60_wdt"
 

Functions

void mv64340_irq_init (unsigned int base)
 

Macro Definition Documentation

#define MPSC_BASE_ORDER   0

Definition at line 945 of file mv643xx.h.

#define MPSC_BRG_BASE_ORDER   2

Definition at line 947 of file mv643xx.h.

#define MPSC_BRG_REG_BLOCK_SIZE   0x0008

Definition at line 951 of file mv643xx.h.

#define MPSC_CTLR_NAME   "mpsc"

Definition at line 943 of file mv643xx.h.

#define MPSC_REG_BLOCK_SIZE   0x0038

Definition at line 949 of file mv643xx.h.

#define MPSC_ROUTING_BASE_ORDER   0

Definition at line 928 of file mv643xx.h.

#define MPSC_ROUTING_REG_BLOCK_SIZE   0x000c

Definition at line 931 of file mv643xx.h.

#define MPSC_SDMA_BASE_ORDER   1

Definition at line 946 of file mv643xx.h.

#define MPSC_SDMA_INTR_BASE_ORDER   1

Definition at line 929 of file mv643xx.h.

#define MPSC_SDMA_INTR_REG_BLOCK_SIZE   0x0084

Definition at line 932 of file mv643xx.h.

#define MPSC_SDMA_REG_BLOCK_SIZE   0x0c18

Definition at line 950 of file mv643xx.h.

#define MPSC_SHARED_NAME   "mpsc_shared"

Definition at line 926 of file mv643xx.h.

#define MV64340_BASE_ADDR_ENABLE   0x278

Definition at line 81 of file mv643xx.h.

#define MV64340_BOOTCS_BASE_ADDR   0x238

Definition at line 45 of file mv643xx.h.

#define MV64340_BOOTCS_SIZE   0x240

Definition at line 46 of file mv643xx.h.

#define MV64340_BRG_BAUDE_TUNING_REG (   brg)    (0xb208 + (brg<<3))

Definition at line 746 of file mv643xx.h.

#define MV64340_BRG_CAUSE_REG   0xb834

Definition at line 747 of file mv643xx.h.

#define MV64340_BRG_CONFIG_REG (   brg)    (0xb200 + (brg<<3))

Definition at line 745 of file mv643xx.h.

#define MV64340_BRG_MASK_REG   0xb8b4

Definition at line 748 of file mv643xx.h.

#define MV64340_CPU_0_SYNC_BARRIER_TRIGGER   0x0c0

Definition at line 151 of file mv643xx.h.

#define MV64340_CPU_0_SYNC_BARRIER_VIRTUAL   0x0c8

Definition at line 152 of file mv643xx.h.

#define MV64340_CPU_1_SYNC_BARRIER_TRIGGER   0x0d0

Definition at line 153 of file mv643xx.h.

#define MV64340_CPU_1_SYNC_BARRIER_VIRTUAL   0x0d8

Definition at line 154 of file mv643xx.h.

#define MV64340_CPU_CONFIG   0x000

Definition at line 120 of file mv643xx.h.

#define MV64340_CPU_CROSS_BAR_CONTROL_HIGH   0x158

Definition at line 124 of file mv643xx.h.

#define MV64340_CPU_CROSS_BAR_CONTROL_LOW   0x150

Definition at line 123 of file mv643xx.h.

#define MV64340_CPU_CROSS_BAR_TIMEOUT   0x168

Definition at line 125 of file mv643xx.h.

#define MV64340_CPU_ERROR_ADDR_HIGH   0x078

Definition at line 175 of file mv643xx.h.

#define MV64340_CPU_ERROR_ADDR_LOW   0x070

Definition at line 174 of file mv643xx.h.

#define MV64340_CPU_ERROR_CAUSE   0x140

Definition at line 179 of file mv643xx.h.

#define MV64340_CPU_ERROR_DATA_HIGH   0x130

Definition at line 177 of file mv643xx.h.

#define MV64340_CPU_ERROR_DATA_LOW   0x128

Definition at line 176 of file mv643xx.h.

#define MV64340_CPU_ERROR_MASK   0x148

Definition at line 180 of file mv643xx.h.

#define MV64340_CPU_ERROR_PARITY   0x138

Definition at line 178 of file mv643xx.h.

#define MV64340_CPU_GE_HEADERS_RETARGET_BASE   0x3d8

Definition at line 112 of file mv643xx.h.

#define MV64340_CPU_GE_HEADERS_RETARGET_CONTROL   0x3d0

Definition at line 111 of file mv643xx.h.

#define MV64340_CPU_IDMA_HEADERS_RETARGET_BASE   0x3e8

Definition at line 114 of file mv643xx.h.

#define MV64340_CPU_IDMA_HEADERS_RETARGET_CONTROL   0x3e0

Definition at line 113 of file mv643xx.h.

#define MV64340_CPU_INTERRUPT0_MASK_HIGH   0x01c

Definition at line 894 of file mv643xx.h.

#define MV64340_CPU_INTERRUPT0_MASK_LOW   0x014

Definition at line 893 of file mv643xx.h.

#define MV64340_CPU_INTERRUPT0_SELECT_CAUSE   0x024

Definition at line 895 of file mv643xx.h.

#define MV64340_CPU_INTERRUPT1_MASK_HIGH   0x03c

Definition at line 897 of file mv643xx.h.

#define MV64340_CPU_INTERRUPT1_MASK_LOW   0x034

Definition at line 896 of file mv643xx.h.

#define MV64340_CPU_INTERRUPT1_SELECT_CAUSE   0x044

Definition at line 898 of file mv643xx.h.

#define MV64340_CPU_MASTER_CONTROL   0x160

Definition at line 122 of file mv643xx.h.

#define MV64340_CPU_MODE   0x120

Definition at line 121 of file mv643xx.h.

#define MV64340_CPU_PCI_0_HEADERS_RETARGET_BASE   0x3b8

Definition at line 108 of file mv643xx.h.

#define MV64340_CPU_PCI_0_HEADERS_RETARGET_CONTROL   0x3b0

Definition at line 107 of file mv643xx.h.

#define MV64340_CPU_PCI_1_HEADERS_RETARGET_BASE   0x3c8

Definition at line 110 of file mv643xx.h.

#define MV64340_CPU_PCI_1_HEADERS_RETARGET_CONTROL   0x3c0

Definition at line 109 of file mv643xx.h.

#define MV64340_CPU_PROTECT_WINDOW_0_BASE_ADDR   0x180

Definition at line 160 of file mv643xx.h.

#define MV64340_CPU_PROTECT_WINDOW_0_SIZE   0x188

Definition at line 161 of file mv643xx.h.

#define MV64340_CPU_PROTECT_WINDOW_1_BASE_ADDR   0x190

Definition at line 162 of file mv643xx.h.

#define MV64340_CPU_PROTECT_WINDOW_1_SIZE   0x198

Definition at line 163 of file mv643xx.h.

#define MV64340_CPU_PROTECT_WINDOW_2_BASE_ADDR   0x1a0

Definition at line 164 of file mv643xx.h.

#define MV64340_CPU_PROTECT_WINDOW_2_SIZE   0x1a8

Definition at line 165 of file mv643xx.h.

#define MV64340_CPU_PROTECT_WINDOW_3_BASE_ADDR   0x1b0

Definition at line 166 of file mv643xx.h.

#define MV64340_CPU_PROTECT_WINDOW_3_SIZE   0x1b8

Definition at line 167 of file mv643xx.h.

#define MV64340_CS_0_BASE_ADDR   0x008

Definition at line 26 of file mv643xx.h.

#define MV64340_CS_0_SIZE   0x010

Definition at line 27 of file mv643xx.h.

#define MV64340_CS_1_BASE_ADDR   0x208

Definition at line 28 of file mv643xx.h.

#define MV64340_CS_1_SIZE   0x210

Definition at line 29 of file mv643xx.h.

#define MV64340_CS_2_BASE_ADDR   0x018

Definition at line 30 of file mv643xx.h.

#define MV64340_CS_2_SIZE   0x020

Definition at line 31 of file mv643xx.h.

#define MV64340_CS_3_BASE_ADDR   0x218

Definition at line 32 of file mv643xx.h.

#define MV64340_CS_3_SIZE   0x220

Definition at line 33 of file mv643xx.h.

#define MV64340_CUNIT_ARBITER_CONTROL_REG   0xf300

Definition at line 692 of file mv643xx.h.

#define MV64340_CUNIT_BASE_ADDR_ENABLE_REG   0xf250

Definition at line 679 of file mv643xx.h.

#define MV64340_CUNIT_BASE_ADDR_REG0   0xf200

Definition at line 669 of file mv643xx.h.

#define MV64340_CUNIT_BASE_ADDR_REG1   0xf208

Definition at line 670 of file mv643xx.h.

#define MV64340_CUNIT_BASE_ADDR_REG2   0xf210

Definition at line 671 of file mv643xx.h.

#define MV64340_CUNIT_BASE_ADDR_REG3   0xf218

Definition at line 672 of file mv643xx.h.

#define MV64340_CUNIT_CONFIG_REG   0xb40c

Definition at line 693 of file mv643xx.h.

#define MV64340_CUNIT_CRROSBAR_TIMEOUT_REG   0xf304

Definition at line 694 of file mv643xx.h.

#define MV64340_CUNIT_DEBUG_HIGH   0xf344

Definition at line 699 of file mv643xx.h.

#define MV64340_CUNIT_DEBUG_LOW   0xf340

Definition at line 698 of file mv643xx.h.

#define MV64340_CUNIT_ERROR_ADDR   0xf318

Definition at line 688 of file mv643xx.h.

#define MV64340_CUNIT_HIGH_ADDR_REMAP_REG0   0xf240

Definition at line 677 of file mv643xx.h.

#define MV64340_CUNIT_HIGH_ADDR_REMAP_REG1   0xf244

Definition at line 678 of file mv643xx.h.

#define MV64340_CUNIT_INTERNAL_SPACE_BASE_ADDR_REG   0xf25C

Definition at line 682 of file mv643xx.h.

#define MV64340_CUNIT_INTERRUPT_CAUSE_REG   0xf310

Definition at line 686 of file mv643xx.h.

#define MV64340_CUNIT_INTERRUPT_MASK_REG   0xf314

Definition at line 687 of file mv643xx.h.

#define MV64340_CUNIT_MMASK   0xf380

Definition at line 700 of file mv643xx.h.

#define MV64340_CUNIT_SIZE0   0xf204

Definition at line 673 of file mv643xx.h.

#define MV64340_CUNIT_SIZE1   0xf20c

Definition at line 674 of file mv643xx.h.

#define MV64340_CUNIT_SIZE2   0xf214

Definition at line 675 of file mv643xx.h.

#define MV64340_CUNIT_SIZE3   0xf21c

Definition at line 676 of file mv643xx.h.

#define MV64340_D_UNIT_CONTROL_HIGH   0x1424

Definition at line 211 of file mv643xx.h.

#define MV64340_D_UNIT_CONTROL_LOW   0x1404

Definition at line 210 of file mv643xx.h.

#define MV64340_DEV_CS0_BASE_ADDR   0x028

Definition at line 37 of file mv643xx.h.

#define MV64340_DEV_CS0_SIZE   0x030

Definition at line 38 of file mv643xx.h.

#define MV64340_DEV_CS1_BASE_ADDR   0x228

Definition at line 39 of file mv643xx.h.

#define MV64340_DEV_CS1_SIZE   0x230

Definition at line 40 of file mv643xx.h.

#define MV64340_DEV_CS2_BASE_ADDR   0x248

Definition at line 41 of file mv643xx.h.

#define MV64340_DEV_CS2_SIZE   0x250

Definition at line 42 of file mv643xx.h.

#define MV64340_DEV_CS3_BASE_ADDR   0x038

Definition at line 43 of file mv643xx.h.

#define MV64340_DEV_CS3_SIZE   0x040

Definition at line 44 of file mv643xx.h.

#define MV64340_DEVICE_BANK0_PARAMETERS   0x45c

Definition at line 263 of file mv643xx.h.

#define MV64340_DEVICE_BANK1_PARAMETERS   0x460

Definition at line 264 of file mv643xx.h.

#define MV64340_DEVICE_BANK2_PARAMETERS   0x464

Definition at line 265 of file mv643xx.h.

#define MV64340_DEVICE_BANK3_PARAMETERS   0x468

Definition at line 266 of file mv643xx.h.

#define MV64340_DEVICE_BOOT_BANK_PARAMETERS   0x46c

Definition at line 267 of file mv643xx.h.

#define MV64340_DEVICE_DEBUG_HIGH   0x4e8

Definition at line 288 of file mv643xx.h.

#define MV64340_DEVICE_DEBUG_LOW   0x4e4

Definition at line 287 of file mv643xx.h.

#define MV64340_DEVICE_ERROR_ADDR   0x4d8

Definition at line 279 of file mv643xx.h.

#define MV64340_DEVICE_ERROR_DATA   0x4dc

Definition at line 280 of file mv643xx.h.

#define MV64340_DEVICE_ERROR_PARITY   0x4e0

Definition at line 281 of file mv643xx.h.

#define MV64340_DEVICE_INTERFACE_CONTROL   0x4c0

Definition at line 268 of file mv643xx.h.

#define MV64340_DEVICE_INTERFACE_CROSS_BAR_CONTROL_HIGH   0x4cc

Definition at line 270 of file mv643xx.h.

#define MV64340_DEVICE_INTERFACE_CROSS_BAR_CONTROL_LOW   0x4c8

Definition at line 269 of file mv643xx.h.

#define MV64340_DEVICE_INTERFACE_CROSS_BAR_TIMEOUT   0x4c4

Definition at line 271 of file mv643xx.h.

#define MV64340_DEVICE_INTERRUPT_CAUSE   0x4d0

Definition at line 277 of file mv643xx.h.

#define MV64340_DEVICE_INTERRUPT_MASK   0x4d4

Definition at line 278 of file mv643xx.h.

#define MV64340_DFCDL_CONFIG0   0x1480

Definition at line 241 of file mv643xx.h.

#define MV64340_DFCDL_CONFIG1   0x1484

Definition at line 242 of file mv643xx.h.

#define MV64340_DFCL_PROBE   0x14a0

Definition at line 249 of file mv643xx.h.

#define MV64340_DLL_READ   0x148c

Definition at line 244 of file mv643xx.h.

#define MV64340_DLL_WRITE   0x1488

Definition at line 243 of file mv643xx.h.

#define MV64340_DMA_ARBITER_CONTROL   0x860

Definition at line 823 of file mv643xx.h.

#define MV64340_DMA_BASE_ADDR_ENABLE_REG   0xa80

Definition at line 818 of file mv643xx.h.

#define MV64340_DMA_BASE_ADDR_REG0   0xa00

Definition at line 791 of file mv643xx.h.

#define MV64340_DMA_BASE_ADDR_REG1   0xa08

Definition at line 792 of file mv643xx.h.

#define MV64340_DMA_BASE_ADDR_REG2   0xa10

Definition at line 793 of file mv643xx.h.

#define MV64340_DMA_BASE_ADDR_REG3   0xa18

Definition at line 794 of file mv643xx.h.

#define MV64340_DMA_BASE_ADDR_REG4   0xa20

Definition at line 795 of file mv643xx.h.

#define MV64340_DMA_BASE_ADDR_REG5   0xa28

Definition at line 796 of file mv643xx.h.

#define MV64340_DMA_BASE_ADDR_REG6   0xa30

Definition at line 797 of file mv643xx.h.

#define MV64340_DMA_BASE_ADDR_REG7   0xa38

Definition at line 798 of file mv643xx.h.

#define MV64340_DMA_CHANNEL0_ACCESS_PROTECTION_REG   0xa70

Definition at line 819 of file mv643xx.h.

#define MV64340_DMA_CHANNEL0_BYTE_COUNT   0x800

Definition at line 768 of file mv643xx.h.

#define MV64340_DMA_CHANNEL0_CONTROL   0x840

Definition at line 754 of file mv643xx.h.

#define MV64340_DMA_CHANNEL0_CONTROL_HIGH   0x880

Definition at line 755 of file mv643xx.h.

#define MV64340_DMA_CHANNEL0_CURRENT_DESCRIPTOR_POINTER   0x870

Definition at line 784 of file mv643xx.h.

#define MV64340_DMA_CHANNEL0_DESTINATION_ADDR   0x820

Definition at line 776 of file mv643xx.h.

#define MV64340_DMA_CHANNEL0_NEXT_DESCRIPTOR_POINTER   0x830

Definition at line 780 of file mv643xx.h.

#define MV64340_DMA_CHANNEL0_SOURCE_ADDR   0x810

Definition at line 772 of file mv643xx.h.

#define MV64340_DMA_CHANNEL1_ACCESS_PROTECTION_REG   0xa74

Definition at line 820 of file mv643xx.h.

#define MV64340_DMA_CHANNEL1_BYTE_COUNT   0x804

Definition at line 769 of file mv643xx.h.

#define MV64340_DMA_CHANNEL1_CONTROL   0x844

Definition at line 756 of file mv643xx.h.

#define MV64340_DMA_CHANNEL1_CONTROL_HIGH   0x884

Definition at line 757 of file mv643xx.h.

#define MV64340_DMA_CHANNEL1_CURRENT_DESCRIPTOR_POINTER   0x874

Definition at line 785 of file mv643xx.h.

#define MV64340_DMA_CHANNEL1_DESTINATION_ADDR   0x824

Definition at line 777 of file mv643xx.h.

#define MV64340_DMA_CHANNEL1_NEXT_DESCRIPTOR_POINTER   0x834

Definition at line 781 of file mv643xx.h.

#define MV64340_DMA_CHANNEL1_SOURCE_ADDR   0x814

Definition at line 773 of file mv643xx.h.

#define MV64340_DMA_CHANNEL2_ACCESS_PROTECTION_REG   0xa78

Definition at line 821 of file mv643xx.h.

#define MV64340_DMA_CHANNEL2_BYTE_COUNT   0x808

Definition at line 770 of file mv643xx.h.

#define MV64340_DMA_CHANNEL2_CONTROL   0x848

Definition at line 758 of file mv643xx.h.

#define MV64340_DMA_CHANNEL2_CONTROL_HIGH   0x888

Definition at line 759 of file mv643xx.h.

#define MV64340_DMA_CHANNEL2_CURRENT_DESCRIPTOR_POINTER   0x878

Definition at line 786 of file mv643xx.h.

#define MV64340_DMA_CHANNEL2_DESTINATION_ADDR   0x828

Definition at line 778 of file mv643xx.h.

#define MV64340_DMA_CHANNEL2_NEXT_DESCRIPTOR_POINTER   0x838

Definition at line 782 of file mv643xx.h.

#define MV64340_DMA_CHANNEL2_SOURCE_ADDR   0x818

Definition at line 774 of file mv643xx.h.

#define MV64340_DMA_CHANNEL3_ACCESS_PROTECTION_REG   0xa7c

Definition at line 822 of file mv643xx.h.

#define MV64340_DMA_CHANNEL3_BYTE_COUNT   0x80C

Definition at line 771 of file mv643xx.h.

#define MV64340_DMA_CHANNEL3_CONTROL   0x84C

Definition at line 760 of file mv643xx.h.

#define MV64340_DMA_CHANNEL3_CONTROL_HIGH   0x88C

Definition at line 761 of file mv643xx.h.

#define MV64340_DMA_CHANNEL3_CURRENT_DESCRIPTOR_POINTER   0x87C

Definition at line 787 of file mv643xx.h.

#define MV64340_DMA_CHANNEL3_DESTINATION_ADDR   0x82C

Definition at line 779 of file mv643xx.h.

#define MV64340_DMA_CHANNEL3_NEXT_DESCRIPTOR_POINTER   0x83C

Definition at line 783 of file mv643xx.h.

#define MV64340_DMA_CHANNEL3_SOURCE_ADDR   0x81c

Definition at line 775 of file mv643xx.h.

#define MV64340_DMA_CROSS_BAR_TIMEOUT   0x8d0

Definition at line 824 of file mv643xx.h.

#define MV64340_DMA_DEBUG_HIGH   0x8e4

Definition at line 841 of file mv643xx.h.

#define MV64340_DMA_DEBUG_LOW   0x8e0

Definition at line 840 of file mv643xx.h.

#define MV64340_DMA_ERROR_ADDR   0x8c8

Definition at line 835 of file mv643xx.h.

#define MV64340_DMA_ERROR_SELECT   0x8cc

Definition at line 836 of file mv643xx.h.

#define MV64340_DMA_HEADERS_RETARGET_BASE   0xa88

Definition at line 829 of file mv643xx.h.

#define MV64340_DMA_HEADERS_RETARGET_CONTROL   0xa84

Definition at line 828 of file mv643xx.h.

#define MV64340_DMA_HIGH_ADDR_REMAP_REG0   0xa60

Definition at line 814 of file mv643xx.h.

#define MV64340_DMA_HIGH_ADDR_REMAP_REG1   0xa64

Definition at line 815 of file mv643xx.h.

#define MV64340_DMA_HIGH_ADDR_REMAP_REG2   0xa68

Definition at line 816 of file mv643xx.h.

#define MV64340_DMA_HIGH_ADDR_REMAP_REG3   0xa6C

Definition at line 817 of file mv643xx.h.

#define MV64340_DMA_INTERRUPT_CAUSE_MASK   0x8c4

Definition at line 834 of file mv643xx.h.

#define MV64340_DMA_INTERRUPT_CAUSE_REG   0x8c0

Definition at line 833 of file mv643xx.h.

#define MV64340_DMA_SIZE_REG0   0xa04

Definition at line 802 of file mv643xx.h.

#define MV64340_DMA_SIZE_REG1   0xa0c

Definition at line 803 of file mv643xx.h.

#define MV64340_DMA_SIZE_REG2   0xa14

Definition at line 804 of file mv643xx.h.

#define MV64340_DMA_SIZE_REG3   0xa1c

Definition at line 805 of file mv643xx.h.

#define MV64340_DMA_SIZE_REG4   0xa24

Definition at line 806 of file mv643xx.h.

#define MV64340_DMA_SIZE_REG5   0xa2c

Definition at line 807 of file mv643xx.h.

#define MV64340_DMA_SIZE_REG6   0xa34

Definition at line 808 of file mv643xx.h.

#define MV64340_DMA_SIZE_REG7   0xa3C

Definition at line 809 of file mv643xx.h.

#define MV64340_DMA_SPARE   0xA8C

Definition at line 842 of file mv643xx.h.

#define MV64340_DUNIT_DEBUG_HIGH   0x1464

Definition at line 256 of file mv643xx.h.

#define MV64340_DUNIT_DEBUG_LOW   0x1460

Definition at line 255 of file mv643xx.h.

#define MV64340_DUNIT_MMASK   0X1b40

Definition at line 257 of file mv643xx.h.

#define MV64340_EXTENDED_DRAM_MODE   0x1420

Definition at line 218 of file mv643xx.h.

#define MV64340_GPP_INTERRUPT_CAUSE   0xf108

Definition at line 877 of file mv643xx.h.

#define MV64340_GPP_INTERRUPT_MASK0   0xf10c

Definition at line 878 of file mv643xx.h.

#define MV64340_GPP_INTERRUPT_MASK1   0xf114

Definition at line 879 of file mv643xx.h.

#define MV64340_GPP_IO_CONTROL   0xf100

Definition at line 874 of file mv643xx.h.

#define MV64340_GPP_LEVEL_CONTROL   0xf110

Definition at line 875 of file mv643xx.h.

#define MV64340_GPP_VALUE   0xf104

Definition at line 876 of file mv643xx.h.

#define MV64340_GPP_VALUE_CLEAR   0xf11c

Definition at line 881 of file mv643xx.h.

#define MV64340_GPP_VALUE_SET   0xf118

Definition at line 880 of file mv643xx.h.

#define MV64340_I2O_INBOUND_DOORBELL_REG_CPU0_SIDE   0x1C20

Definition at line 618 of file mv643xx.h.

#define MV64340_I2O_INBOUND_DOORBELL_REG_CPU1_SIDE   0x1CA0

Definition at line 640 of file mv643xx.h.

#define MV64340_I2O_INBOUND_DOORBELL_REG_PCI_0_SIDE   0x020

Definition at line 572 of file mv643xx.h.

#define MV64340_I2O_INBOUND_DOORBELL_REG_PCI_1_SIDE   0x0A0

Definition at line 595 of file mv643xx.h.

#define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_CPU0_SIDE   0x1C60

Definition at line 628 of file mv643xx.h.

#define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_CPU1_SIDE   0x1CE0

Definition at line 650 of file mv643xx.h.

#define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_PCI_0_SIDE   0x060

Definition at line 582 of file mv643xx.h.

#define MV64340_I2O_INBOUND_FREE_HEAD_POINTER_REG_PCI_1_SIDE   0x0E0

Definition at line 605 of file mv643xx.h.

#define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_CPU0_SIDE   0x1C64

Definition at line 629 of file mv643xx.h.

#define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_CPU1_SIDE   0x1CE4

Definition at line 651 of file mv643xx.h.

#define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_PCI_0_SIDE   0x064

Definition at line 583 of file mv643xx.h.

#define MV64340_I2O_INBOUND_FREE_TAIL_POINTER_REG_PCI_1_SIDE   0x0E4

Definition at line 606 of file mv643xx.h.

#define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_CPU0_SIDE   0x1C24

Definition at line 619 of file mv643xx.h.

#define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_CPU1_SIDE   0x1CA4

Definition at line 641 of file mv643xx.h.

#define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_PCI_0_SIDE   0x024

Definition at line 573 of file mv643xx.h.

#define MV64340_I2O_INBOUND_INTERRUPT_CAUSE_REG_PCI_1_SIDE   0x0A4

Definition at line 596 of file mv643xx.h.

#define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_CPU0_SIDE   0x1C28

Definition at line 620 of file mv643xx.h.

#define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_CPU1_SIDE   0x1CA8

Definition at line 642 of file mv643xx.h.

#define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_PCI_0_SIDE   0x028

Definition at line 574 of file mv643xx.h.

#define MV64340_I2O_INBOUND_INTERRUPT_MASK_REG_PCI_1_SIDE   0x0A8

Definition at line 597 of file mv643xx.h.

#define MV64340_I2O_INBOUND_MESSAGE_REG0_CPU0_SIDE   0x1C10

Definition at line 614 of file mv643xx.h.

#define MV64340_I2O_INBOUND_MESSAGE_REG0_CPU1_SIDE   0x1C90

Definition at line 636 of file mv643xx.h.

#define MV64340_I2O_INBOUND_MESSAGE_REG0_PCI_0_SIDE   0x010

Definition at line 568 of file mv643xx.h.

#define MV64340_I2O_INBOUND_MESSAGE_REG0_PCI_1_SIDE   0x090

Definition at line 591 of file mv643xx.h.

#define MV64340_I2O_INBOUND_MESSAGE_REG1_CPU0_SIDE   0x1C14

Definition at line 615 of file mv643xx.h.

#define MV64340_I2O_INBOUND_MESSAGE_REG1_CPU1_SIDE   0x1C94

Definition at line 637 of file mv643xx.h.

#define MV64340_I2O_INBOUND_MESSAGE_REG1_PCI_0_SIDE   0x014

Definition at line 569 of file mv643xx.h.

#define MV64340_I2O_INBOUND_MESSAGE_REG1_PCI_1_SIDE   0x094

Definition at line 592 of file mv643xx.h.

#define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_CPU0_SIDE   0x1C68

Definition at line 630 of file mv643xx.h.

#define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_CPU1_SIDE   0x1CE8

Definition at line 652 of file mv643xx.h.

#define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_PCI_0_SIDE   0x068

Definition at line 584 of file mv643xx.h.

#define MV64340_I2O_INBOUND_POST_HEAD_POINTER_REG_PCI_1_SIDE   0x0E8

Definition at line 607 of file mv643xx.h.

#define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_CPU0_SIDE   0x1C6C

Definition at line 631 of file mv643xx.h.

#define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_CPU1_SIDE   0x1CEC

Definition at line 653 of file mv643xx.h.

#define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_PCI_0_SIDE   0x06C

Definition at line 585 of file mv643xx.h.

#define MV64340_I2O_INBOUND_POST_TAIL_POINTER_REG_PCI_1_SIDE   0x0EC

Definition at line 608 of file mv643xx.h.

#define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_CPU0_SIDE   0x1C40

Definition at line 624 of file mv643xx.h.

#define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_CPU1_SIDE   0x1CC0

Definition at line 646 of file mv643xx.h.

#define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_0_SIDE   0x040

Definition at line 578 of file mv643xx.h.

#define MV64340_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_1_SIDE   0x0C0

Definition at line 601 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_DOORBELL_REG_CPU0_SIDE   0x1C2C

Definition at line 621 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_DOORBELL_REG_CPU1_SIDE   0x1CAC

Definition at line 643 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_DOORBELL_REG_PCI_0_SIDE   0x02C

Definition at line 575 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_DOORBELL_REG_PCI_1_SIDE   0x0AC

Definition at line 598 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_CPU0_SIDE   0x1C70

Definition at line 632 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_CPU1_SIDE   0x1CF0

Definition at line 654 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_PCI_0_SIDE   0x070

Definition at line 586 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_PCI_1_SIDE   0x0F0

Definition at line 609 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_CPU0_SIDE   0x1C74

Definition at line 633 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_CPU1_SIDE   0x1CF4

Definition at line 655 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_PCI_0_SIDE   0x074

Definition at line 587 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_PCI_1_SIDE   0x0F4

Definition at line 610 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_CPU0_SIDE   0x1C30

Definition at line 622 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_CPU1_SIDE   0x1CB0

Definition at line 644 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_PCI_0_SIDE   0x030

Definition at line 576 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_PCI_1_SIDE   0x0B0

Definition at line 599 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_CPU0_SIDE   0x1C34

Definition at line 623 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_CPU1_SIDE   0x1CB4

Definition at line 645 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_PCI_0_SIDE   0x034

Definition at line 577 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_INTERRUPT_MASK_REG_PCI_1_SIDE   0x0B4

Definition at line 600 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_MESSAGE_REG0_CPU0_SIDE   0x1C18

Definition at line 616 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_MESSAGE_REG0_CPU1_SIDE   0x1C98

Definition at line 638 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_MESSAGE_REG0_PCI_0_SIDE   0x018

Definition at line 570 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_MESSAGE_REG0_PCI_1_SIDE   0x098

Definition at line 593 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_MESSAGE_REG1_CPU0_SIDE   0x1C1C

Definition at line 617 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_MESSAGE_REG1_CPU1_SIDE   0x1C9C

Definition at line 639 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_MESSAGE_REG1_PCI_0_SIDE   0x01C

Definition at line 571 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_MESSAGE_REG1_PCI_1_SIDE   0x09C

Definition at line 594 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_CPU0_SIDE   0x1CF8

Definition at line 634 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_CPU1_SIDE   0x1C78

Definition at line 656 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_PCI_0_SIDE   0x0F8

Definition at line 588 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_POST_HEAD_POINTER_REG_PCI_1_SIDE   0x078

Definition at line 611 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_CPU0_SIDE   0x1CFC

Definition at line 635 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_CPU1_SIDE   0x1C7C

Definition at line 657 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_PCI_0_SIDE   0x0FC

Definition at line 589 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_POST_TAIL_POINTER_REG_PCI_1_SIDE   0x07C

Definition at line 612 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_CPU0_SIDE   0x1C44

Definition at line 625 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_CPU1_SIDE   0x1CC4

Definition at line 647 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_0_SIDE   0x044

Definition at line 579 of file mv643xx.h.

#define MV64340_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_1_SIDE   0x0C4

Definition at line 602 of file mv643xx.h.

#define MV64340_I2O_QUEUE_BASE_ADDR_REG_CPU0_SIDE   0x1C54

Definition at line 627 of file mv643xx.h.

#define MV64340_I2O_QUEUE_BASE_ADDR_REG_CPU1_SIDE   0x1CD4

Definition at line 649 of file mv643xx.h.

#define MV64340_I2O_QUEUE_BASE_ADDR_REG_PCI_0_SIDE   0x054

Definition at line 581 of file mv643xx.h.

#define MV64340_I2O_QUEUE_BASE_ADDR_REG_PCI_1_SIDE   0x0D4

Definition at line 604 of file mv643xx.h.

#define MV64340_I2O_QUEUE_CONTROL_REG_CPU0_SIDE   0x1C50

Definition at line 626 of file mv643xx.h.

#define MV64340_I2O_QUEUE_CONTROL_REG_CPU1_SIDE   0x1CD0

Definition at line 648 of file mv643xx.h.

#define MV64340_I2O_QUEUE_CONTROL_REG_PCI_0_SIDE   0x050

Definition at line 580 of file mv643xx.h.

#define MV64340_I2O_QUEUE_CONTROL_REG_PCI_1_SIDE   0x0D0

Definition at line 603 of file mv643xx.h.

#define MV64340_INTEGRATED_SRAM_BASE_ADDR   0x268

Definition at line 74 of file mv643xx.h.

#define MV64340_INTERNAL_SPACE_BASE_ADDR   0x068

Definition at line 77 of file mv643xx.h.

#define MV64340_INTERRUPT0_MASK_0_HIGH   0x05c

Definition at line 900 of file mv643xx.h.

#define MV64340_INTERRUPT0_MASK_0_LOW   0x054

Definition at line 899 of file mv643xx.h.

#define MV64340_INTERRUPT0_SELECT_CAUSE   0x064

Definition at line 901 of file mv643xx.h.

#define MV64340_INTERRUPT1_MASK_0_HIGH   0x07c

Definition at line 903 of file mv643xx.h.

#define MV64340_INTERRUPT1_MASK_0_LOW   0x074

Definition at line 902 of file mv643xx.h.

#define MV64340_INTERRUPT1_SELECT_CAUSE   0x084

Definition at line 904 of file mv643xx.h.

#define MV64340_MAIN_INTERRUPT_CAUSE_HIGH   0x00c

Definition at line 892 of file mv643xx.h.

#define MV64340_MAIN_INTERRUPT_CAUSE_LOW   0x004

Definition at line 891 of file mv643xx.h.

#define MV64340_MPP_CONTROL0   0xf000

Definition at line 910 of file mv643xx.h.

#define MV64340_MPP_CONTROL1   0xf004

Definition at line 911 of file mv643xx.h.

#define MV64340_MPP_CONTROL2   0xf008

Definition at line 912 of file mv643xx.h.

#define MV64340_MPP_CONTROL3   0xf00c

Definition at line 913 of file mv643xx.h.

#define MV64340_MPSC0_ACCESS_PROTECTION_REG   0xf254

Definition at line 680 of file mv643xx.h.

#define MV64340_MPSC1_ACCESS_PROTECTION_REG   0xf258

Definition at line 681 of file mv643xx.h.

#define MV64340_MPSC_CAUSE_REG (   port)    (0xb804 + (port<<3))

Definition at line 710 of file mv643xx.h.

#define MV64340_MPSC_CHANNEL_REG1 (   port)    (0x800c + (port<<12))

Definition at line 716 of file mv643xx.h.

#define MV64340_MPSC_CHANNEL_REG10 (   port)    (0x8030 + (port<<12))

Definition at line 725 of file mv643xx.h.

#define MV64340_MPSC_CHANNEL_REG2 (   port)    (0x8010 + (port<<12))

Definition at line 717 of file mv643xx.h.

#define MV64340_MPSC_CHANNEL_REG3 (   port)    (0x8014 + (port<<12))

Definition at line 718 of file mv643xx.h.

#define MV64340_MPSC_CHANNEL_REG4 (   port)    (0x8018 + (port<<12))

Definition at line 719 of file mv643xx.h.

#define MV64340_MPSC_CHANNEL_REG5 (   port)    (0x801c + (port<<12))

Definition at line 720 of file mv643xx.h.

#define MV64340_MPSC_CHANNEL_REG6 (   port)    (0x8020 + (port<<12))

Definition at line 721 of file mv643xx.h.

#define MV64340_MPSC_CHANNEL_REG7 (   port)    (0x8024 + (port<<12))

Definition at line 722 of file mv643xx.h.

#define MV64340_MPSC_CHANNEL_REG8 (   port)    (0x8028 + (port<<12))

Definition at line 723 of file mv643xx.h.

#define MV64340_MPSC_CHANNEL_REG9 (   port)    (0x802c + (port<<12))

Definition at line 724 of file mv643xx.h.

#define MV64340_MPSC_MAIN_CONFIG_HIGH (   port)    (0x8004 + (port<<12))

Definition at line 714 of file mv643xx.h.

#define MV64340_MPSC_MAIN_CONFIG_LOW (   port)    (0x8000 + (port<<12))

Definition at line 713 of file mv643xx.h.

#define MV64340_MPSC_MASK_REG (   port)    (0xb884 + (port<<3))

Definition at line 711 of file mv643xx.h.

#define MV64340_MPSC_PROTOCOL_CONFIG (   port)    (0x8008 + (port<<12))

Definition at line 715 of file mv643xx.h.

#define MV64340_MPSC_ROUTING_REG   0xb400

Definition at line 704 of file mv643xx.h.

#define MV64340_MPSC_RX_CLOCK_ROUTING_REG   0xb404

Definition at line 705 of file mv643xx.h.

#define MV64340_MPSC_TX_CLOCK_ROUTING_REG   0xb408

Definition at line 706 of file mv643xx.h.

#define MV64340_PCI_0_ACCESS_CONTROL_BASE_0_HIGH   0x1e04

Definition at line 414 of file mv643xx.h.

#define MV64340_PCI_0_ACCESS_CONTROL_BASE_0_LOW   0x1e00

Definition at line 413 of file mv643xx.h.

#define MV64340_PCI_0_ACCESS_CONTROL_BASE_1_HIGH   0x1e14

Definition at line 417 of file mv643xx.h.

#define MV64340_PCI_0_ACCESS_CONTROL_BASE_1_LOW   0x1e10

Definition at line 416 of file mv643xx.h.

#define MV64340_PCI_0_ACCESS_CONTROL_BASE_2_HIGH   0x1e24

Definition at line 420 of file mv643xx.h.

#define MV64340_PCI_0_ACCESS_CONTROL_BASE_2_LOW   0x1e20

Definition at line 419 of file mv643xx.h.

#define MV64340_PCI_0_ACCESS_CONTROL_BASE_3_HIGH   0x1e34

Definition at line 423 of file mv643xx.h.

#define MV64340_PCI_0_ACCESS_CONTROL_BASE_3_LOW   0x1e30

Definition at line 422 of file mv643xx.h.

#define MV64340_PCI_0_ACCESS_CONTROL_BASE_4_HIGH   0x1e44

Definition at line 426 of file mv643xx.h.

#define MV64340_PCI_0_ACCESS_CONTROL_BASE_4_LOW   0x1e40

Definition at line 425 of file mv643xx.h.

#define MV64340_PCI_0_ACCESS_CONTROL_BASE_5_HIGH   0x1e54

Definition at line 429 of file mv643xx.h.

#define MV64340_PCI_0_ACCESS_CONTROL_BASE_5_LOW   0x1e50

Definition at line 428 of file mv643xx.h.

#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_0   0x1e08

Definition at line 415 of file mv643xx.h.

#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_1   0x1e18

Definition at line 418 of file mv643xx.h.

#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_2   0x1e28

Definition at line 421 of file mv643xx.h.

#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_3   0x1e38

Definition at line 424 of file mv643xx.h.

#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_4   0x1e48

Definition at line 427 of file mv643xx.h.

#define MV64340_PCI_0_ACCESS_CONTROL_SIZE_5   0x1e58

Definition at line 430 of file mv643xx.h.

#define MV64340_PCI_0_ADDR_DECODE_CONTROL   0xd3c

Definition at line 371 of file mv643xx.h.

#define MV64340_PCI_0_ARBITER_CONTROL   0x1d00

Definition at line 398 of file mv643xx.h.

#define MV64340_PCI_0_BASE_ADDR_REG_ENABLE   0xc3c

Definition at line 325 of file mv643xx.h.

#define MV64340_PCI_0_COMMAND   0xc00

Definition at line 388 of file mv643xx.h.

#define MV64340_PCI_0_CONFIG_ADDR   0xcf8

Definition at line 455 of file mv643xx.h.

#define MV64340_PCI_0_CONFIG_DATA_VIRTUAL_REG   0xcfc

Definition at line 456 of file mv643xx.h.

#define MV64340_PCI_0_CPU_BAR_SIZE   0xd28

Definition at line 319 of file mv643xx.h.

#define MV64340_PCI_0_CPU_BASE_ADDR_REMAP_HIGH   0xd74

Definition at line 365 of file mv643xx.h.

#define MV64340_PCI_0_CPU_BASE_ADDR_REMAP_LOW   0xd70

Definition at line 363 of file mv643xx.h.

#define MV64340_PCI_0_CROSS_BAR_CONTROL_HIGH   0x1d0c

Definition at line 402 of file mv643xx.h.

#define MV64340_PCI_0_CROSS_BAR_CONTROL_LOW   0x1d08

Definition at line 400 of file mv643xx.h.

#define MV64340_PCI_0_CROSS_BAR_TIMEOUT   0x1d04

Definition at line 404 of file mv643xx.h.

#define MV64340_PCI_0_CS_0_BANK_SIZE   0xc08

Definition at line 295 of file mv643xx.h.

#define MV64340_PCI_0_CS_0_BASE_ADDR_REMAP   0xc48

Definition at line 327 of file mv643xx.h.

#define MV64340_PCI_0_CS_0_BASE_HIGH_ADDR_REMAP   0xF04

Definition at line 335 of file mv643xx.h.

#define MV64340_PCI_0_CS_1_BANK_SIZE   0xd08

Definition at line 297 of file mv643xx.h.

#define MV64340_PCI_0_CS_1_BASE_ADDR_REMAP   0xd48

Definition at line 329 of file mv643xx.h.

#define MV64340_PCI_0_CS_1_BASE_HIGH_ADDR_REMAP   0xF08

Definition at line 337 of file mv643xx.h.

#define MV64340_PCI_0_CS_2_BANK_SIZE   0xc0c

Definition at line 299 of file mv643xx.h.

#define MV64340_PCI_0_CS_2_BASE_ADDR_REMAP   0xc4c

Definition at line 331 of file mv643xx.h.

#define MV64340_PCI_0_CS_2_BASE_HIGH_ADDR_REMAP   0xF0C

Definition at line 339 of file mv643xx.h.

#define MV64340_PCI_0_CS_3_BANK_SIZE   0xd0c

Definition at line 301 of file mv643xx.h.

#define MV64340_PCI_0_CS_3_BASE_ADDR_REMAP   0xd4c

Definition at line 333 of file mv643xx.h.

#define MV64340_PCI_0_CS_3_BASE_HIGH_ADDR_REMAP   0xF10

Definition at line 341 of file mv643xx.h.

#define MV64340_PCI_0_DEVCS_0_BANK_SIZE   0xc10

Definition at line 303 of file mv643xx.h.

#define MV64340_PCI_0_DEVCS_0_BASE_ADDR_REMAP   0xc50

Definition at line 343 of file mv643xx.h.

#define MV64340_PCI_0_DEVCS_1_BANK_SIZE   0xd10

Definition at line 305 of file mv643xx.h.

#define MV64340_PCI_0_DEVCS_1_BASE_ADDR_REMAP   0xd50

Definition at line 345 of file mv643xx.h.

#define MV64340_PCI_0_DEVCS_2_BANK_SIZE   0xd18

Definition at line 307 of file mv643xx.h.

#define MV64340_PCI_0_DEVCS_2_BASE_ADDR_REMAP   0xd58

Definition at line 347 of file mv643xx.h.

#define MV64340_PCI_0_DEVCS_3_BANK_SIZE   0xc14

Definition at line 309 of file mv643xx.h.

#define MV64340_PCI_0_DEVCS_3_BASE_ADDR_REMAP   0xc54

Definition at line 349 of file mv643xx.h.

#define MV64340_PCI_0_DEVCS_BOOT_BANK_SIZE   0xd14

Definition at line 311 of file mv643xx.h.

#define MV64340_PCI_0_DEVCS_BOOTCS_BASE_ADDR_REMAP   0xd54

Definition at line 351 of file mv643xx.h.

#define MV64340_PCI_0_DLL_STATUS_AND_COMMAND   0x1d20

Definition at line 384 of file mv643xx.h.

#define MV64340_PCI_0_ERROR_ADDR_HIGH   0x1d44

Definition at line 470 of file mv643xx.h.

#define MV64340_PCI_0_ERROR_ADDR_LOW   0x1d40

Definition at line 468 of file mv643xx.h.

#define MV64340_PCI_0_ERROR_ATTRIBUTE   0x1d48

Definition at line 472 of file mv643xx.h.

#define MV64340_PCI_0_ERROR_CAUSE   0x1d58

Definition at line 476 of file mv643xx.h.

#define MV64340_PCI_0_ERROR_COMMAND   0x1d50

Definition at line 474 of file mv643xx.h.

#define MV64340_PCI_0_ERROR_MASK   0x1d5c

Definition at line 478 of file mv643xx.h.

#define MV64340_PCI_0_EXPANSION_ROM_BAR_SIZE   0xd2c

Definition at line 323 of file mv643xx.h.

#define MV64340_PCI_0_EXPANSION_ROM_BASE_ADDR_REMAP   0xf38

Definition at line 369 of file mv643xx.h.

#define MV64340_PCI_0_HEADERS_RETARGET_BASE   0xF44

Definition at line 375 of file mv643xx.h.

#define MV64340_PCI_0_HEADERS_RETARGET_CONTROL   0xF40

Definition at line 373 of file mv643xx.h.

#define MV64340_PCI_0_HEADERS_RETARGET_HIGH   0xF48

Definition at line 377 of file mv643xx.h.

#define MV64340_PCI_0_INTEGRATED_SRAM_BASE_ADDR_REMAP   0xf00

Definition at line 367 of file mv643xx.h.

#define MV64340_PCI_0_INTERNAL_SRAM_BAR_SIZE   0xe00

Definition at line 321 of file mv643xx.h.

#define MV64340_PCI_0_INTERRUPT_ACKNOWLEDGE_VIRTUAL_REG   0xc34

Definition at line 459 of file mv643xx.h.

#define MV64340_PCI_0_IO_ADDR_REMAP   0x0f0

Definition at line 87 of file mv643xx.h.

#define MV64340_PCI_0_IO_BASE_ADDR   0x048

Definition at line 50 of file mv643xx.h.

#define MV64340_PCI_0_IO_SIZE   0x050

Definition at line 51 of file mv643xx.h.

#define MV64340_PCI_0_MEMORY0_BASE_ADDR   0x058

Definition at line 52 of file mv643xx.h.

#define MV64340_PCI_0_MEMORY0_HIGH_ADDR_REMAP   0x320

Definition at line 89 of file mv643xx.h.

#define MV64340_PCI_0_MEMORY0_LOW_ADDR_REMAP   0x0f8

Definition at line 88 of file mv643xx.h.

#define MV64340_PCI_0_MEMORY0_SIZE   0x060

Definition at line 53 of file mv643xx.h.

#define MV64340_PCI_0_MEMORY1_BASE_ADDR   0x080

Definition at line 54 of file mv643xx.h.

#define MV64340_PCI_0_MEMORY1_HIGH_ADDR_REMAP   0x328

Definition at line 91 of file mv643xx.h.

#define MV64340_PCI_0_MEMORY1_LOW_ADDR_REMAP   0x100

Definition at line 90 of file mv643xx.h.

#define MV64340_PCI_0_MEMORY1_SIZE   0x088

Definition at line 55 of file mv643xx.h.

#define MV64340_PCI_0_MEMORY2_BASE_ADDR   0x258

Definition at line 56 of file mv643xx.h.

#define MV64340_PCI_0_MEMORY2_HIGH_ADDR_REMAP   0x330

Definition at line 93 of file mv643xx.h.

#define MV64340_PCI_0_MEMORY2_LOW_ADDR_REMAP   0x2f8

Definition at line 92 of file mv643xx.h.

#define MV64340_PCI_0_MEMORY2_SIZE   0x260

Definition at line 57 of file mv643xx.h.

#define MV64340_PCI_0_MEMORY3_BASE_ADDR   0x280

Definition at line 58 of file mv643xx.h.

#define MV64340_PCI_0_MEMORY3_HIGH_ADDR_REMAP   0x338

Definition at line 95 of file mv643xx.h.

#define MV64340_PCI_0_MEMORY3_LOW_ADDR_REMAP   0x300

Definition at line 94 of file mv643xx.h.

#define MV64340_PCI_0_MEMORY3_SIZE   0x288

Definition at line 59 of file mv643xx.h.

#define MV64340_PCI_0_MMASK   0X1D24

Definition at line 485 of file mv643xx.h.

#define MV64340_PCI_0_MODE   0xd00

Definition at line 390 of file mv643xx.h.

#define MV64340_PCI_0_MPP_PADS_DRIVE_CONTROL   0x1d1C

Definition at line 386 of file mv643xx.h.

#define MV64340_PCI_0_MSI_TRIGGER_TIMER   0xc38

Definition at line 396 of file mv643xx.h.

#define MV64340_PCI_0_P2P_CONFIG   0x1d14

Definition at line 410 of file mv643xx.h.

#define MV64340_PCI_0_P2P_I_O_BAR_SIZE   0xd24

Definition at line 317 of file mv643xx.h.

#define MV64340_PCI_0_P2P_I_O_BASE_ADDR_REMAP   0xd6c

Definition at line 361 of file mv643xx.h.

#define MV64340_PCI_0_P2P_MEM0_BAR_SIZE   0xd1c

Definition at line 313 of file mv643xx.h.

#define MV64340_PCI_0_P2P_MEM0_BASE_ADDR_REMAP_HIGH   0xd60

Definition at line 355 of file mv643xx.h.

#define MV64340_PCI_0_P2P_MEM0_BASE_ADDR_REMAP_LOW   0xd5c

Definition at line 353 of file mv643xx.h.

#define MV64340_PCI_0_P2P_MEM1_BAR_SIZE   0xd20

Definition at line 315 of file mv643xx.h.

#define MV64340_PCI_0_P2P_MEM1_BASE_ADDR_REMAP_HIGH   0xd68

Definition at line 359 of file mv643xx.h.

#define MV64340_PCI_0_P2P_MEM1_BASE_ADDR_REMAP_LOW   0xd64

Definition at line 357 of file mv643xx.h.

#define MV64340_PCI_0_READ_BUFFER_DISCARD_TIMER   0xd04

Definition at line 394 of file mv643xx.h.

#define MV64340_PCI_0_RETRY   0xc04

Definition at line 392 of file mv643xx.h.

#define MV64340_PCI_0_SERR_MASK   0xc28

Definition at line 466 of file mv643xx.h.

#define MV64340_PCI_0_SYNC_BARRIER_TRIGGER_REG   0x1D18

Definition at line 406 of file mv643xx.h.

#define MV64340_PCI_0_SYNC_BARRIER_VIRTUAL_REG   0x1d10

Definition at line 408 of file mv643xx.h.

#define MV64340_PCI_1_ACCESS_CONTROL_BASE_0_HIGH   0x1e84

Definition at line 433 of file mv643xx.h.

#define MV64340_PCI_1_ACCESS_CONTROL_BASE_0_LOW   0x1e80

Definition at line 432 of file mv643xx.h.

#define MV64340_PCI_1_ACCESS_CONTROL_BASE_1_HIGH   0x1e94

Definition at line 436 of file mv643xx.h.

#define MV64340_PCI_1_ACCESS_CONTROL_BASE_1_LOW   0x1e90

Definition at line 435 of file mv643xx.h.

#define MV64340_PCI_1_ACCESS_CONTROL_BASE_2_HIGH   0x1ea4

Definition at line 439 of file mv643xx.h.

#define MV64340_PCI_1_ACCESS_CONTROL_BASE_2_LOW   0x1ea0

Definition at line 438 of file mv643xx.h.

#define MV64340_PCI_1_ACCESS_CONTROL_BASE_3_HIGH   0x1eb4

Definition at line 442 of file mv643xx.h.

#define MV64340_PCI_1_ACCESS_CONTROL_BASE_3_LOW   0x1eb0

Definition at line 441 of file mv643xx.h.

#define MV64340_PCI_1_ACCESS_CONTROL_BASE_4_HIGH   0x1ec4

Definition at line 445 of file mv643xx.h.

#define MV64340_PCI_1_ACCESS_CONTROL_BASE_4_LOW   0x1ec0

Definition at line 444 of file mv643xx.h.

#define MV64340_PCI_1_ACCESS_CONTROL_BASE_5_HIGH   0x1ed4

Definition at line 448 of file mv643xx.h.

#define MV64340_PCI_1_ACCESS_CONTROL_BASE_5_LOW   0x1ed0

Definition at line 447 of file mv643xx.h.

#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_0   0x1e88

Definition at line 434 of file mv643xx.h.

#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_1   0x1e98

Definition at line 437 of file mv643xx.h.

#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_2   0x1ea8

Definition at line 440 of file mv643xx.h.

#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_3   0x1eb8

Definition at line 443 of file mv643xx.h.

#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_4   0x1ec8

Definition at line 446 of file mv643xx.h.

#define MV64340_PCI_1_ACCESS_CONTROL_SIZE_5   0x1ed8

Definition at line 449 of file mv643xx.h.

#define MV64340_PCI_1_ADDR_DECODE_CONTROL   0xdbc

Definition at line 372 of file mv643xx.h.

#define MV64340_PCI_1_ARBITER_CONTROL   0x1d80

Definition at line 399 of file mv643xx.h.

#define MV64340_PCI_1_BASE_ADDR_REG_ENABLE   0xcbc

Definition at line 326 of file mv643xx.h.

#define MV64340_PCI_1_COMMAND   0xc80

Definition at line 389 of file mv643xx.h.

#define MV64340_PCI_1_CONFIG_ADDR   0xc78

Definition at line 457 of file mv643xx.h.

#define MV64340_PCI_1_CONFIG_DATA_VIRTUAL_REG   0xc7c

Definition at line 458 of file mv643xx.h.

#define MV64340_PCI_1_CPU_BAR_SIZE   0xda8

Definition at line 320 of file mv643xx.h.

#define MV64340_PCI_1_CPU_BASE_ADDR_REMAP_HIGH   0xdf4

Definition at line 366 of file mv643xx.h.

#define MV64340_PCI_1_CPU_BASE_ADDR_REMAP_LOW   0xdf0

Definition at line 364 of file mv643xx.h.

#define MV64340_PCI_1_CROSS_BAR_CONTROL_HIGH   0x1d8c

Definition at line 403 of file mv643xx.h.

#define MV64340_PCI_1_CROSS_BAR_CONTROL_LOW   0x1d88

Definition at line 401 of file mv643xx.h.

#define MV64340_PCI_1_CROSS_BAR_TIMEOUT   0x1d84

Definition at line 405 of file mv643xx.h.

#define MV64340_PCI_1_CS_0_BANK_SIZE   0xc88

Definition at line 296 of file mv643xx.h.

#define MV64340_PCI_1_CS_0_BASE_ADDR_REMAP   0xcc8

Definition at line 328 of file mv643xx.h.

#define MV64340_PCI_1_CS_0_BASE_HIGH_ADDR_REMAP   0xF84

Definition at line 336 of file mv643xx.h.

#define MV64340_PCI_1_CS_1_BANK_SIZE   0xd88

Definition at line 298 of file mv643xx.h.

#define MV64340_PCI_1_CS_1_BASE_ADDR_REMAP   0xdc8

Definition at line 330 of file mv643xx.h.

#define MV64340_PCI_1_CS_1_BASE_HIGH_ADDR_REMAP   0xF88

Definition at line 338 of file mv643xx.h.

#define MV64340_PCI_1_CS_2_BANK_SIZE   0xc8c

Definition at line 300 of file mv643xx.h.

#define MV64340_PCI_1_CS_2_BASE_ADDR_REMAP   0xccc

Definition at line 332 of file mv643xx.h.

#define MV64340_PCI_1_CS_2_BASE_HIGH_ADDR_REMAP   0xF8C

Definition at line 340 of file mv643xx.h.

#define MV64340_PCI_1_CS_3_BANK_SIZE   0xd8c

Definition at line 302 of file mv643xx.h.

#define MV64340_PCI_1_CS_3_BASE_ADDR_REMAP   0xdcc

Definition at line 334 of file mv643xx.h.

#define MV64340_PCI_1_CS_3_BASE_HIGH_ADDR_REMAP   0xF90

Definition at line 342 of file mv643xx.h.

#define MV64340_PCI_1_DEVCS_0_BANK_SIZE   0xc90

Definition at line 304 of file mv643xx.h.

#define MV64340_PCI_1_DEVCS_0_BASE_ADDR_REMAP   0xcd0

Definition at line 344 of file mv643xx.h.

#define MV64340_PCI_1_DEVCS_1_BANK_SIZE   0xd90

Definition at line 306 of file mv643xx.h.

#define MV64340_PCI_1_DEVCS_1_BASE_ADDR_REMAP   0xdd0

Definition at line 346 of file mv643xx.h.

#define MV64340_PCI_1_DEVCS_2_BANK_SIZE   0xd98

Definition at line 308 of file mv643xx.h.

#define MV64340_PCI_1_DEVCS_2_BASE_ADDR_REMAP   0xdd8

Definition at line 348 of file mv643xx.h.

#define MV64340_PCI_1_DEVCS_3_BANK_SIZE   0xc94

Definition at line 310 of file mv643xx.h.

#define MV64340_PCI_1_DEVCS_3_BASE_ADDR_REMAP   0xcd4

Definition at line 350 of file mv643xx.h.

#define MV64340_PCI_1_DEVCS_BOOT_BANK_SIZE   0xd94

Definition at line 312 of file mv643xx.h.

#define MV64340_PCI_1_DEVCS_BOOTCS_BASE_ADDR_REMAP   0xdd4

Definition at line 352 of file mv643xx.h.

#define MV64340_PCI_1_DLL_STATUS_AND_COMMAND   0x1da0

Definition at line 385 of file mv643xx.h.

#define MV64340_PCI_1_ERROR_ADDR_HIGH   0x1dc4

Definition at line 471 of file mv643xx.h.

#define MV64340_PCI_1_ERROR_ADDR_LOW   0x1dc0

Definition at line 469 of file mv643xx.h.

#define MV64340_PCI_1_ERROR_ATTRIBUTE   0x1dc8

Definition at line 473 of file mv643xx.h.

#define MV64340_PCI_1_ERROR_CAUSE   0x1dd8

Definition at line 477 of file mv643xx.h.

#define MV64340_PCI_1_ERROR_COMMAND   0x1dd0

Definition at line 475 of file mv643xx.h.

#define MV64340_PCI_1_ERROR_MASK   0x1ddc

Definition at line 479 of file mv643xx.h.

#define MV64340_PCI_1_EXPANSION_ROM_BAR_SIZE   0xd9c

Definition at line 324 of file mv643xx.h.

#define MV64340_PCI_1_EXPANSION_ROM_BASE_ADDR_REMAP   0xfb8

Definition at line 370 of file mv643xx.h.

#define MV64340_PCI_1_HEADERS_RETARGET_BASE   0xFc4

Definition at line 376 of file mv643xx.h.

#define MV64340_PCI_1_HEADERS_RETARGET_CONTROL   0xFc0

Definition at line 374 of file mv643xx.h.

#define MV64340_PCI_1_HEADERS_RETARGET_HIGH   0xFc8

Definition at line 378 of file mv643xx.h.

#define MV64340_PCI_1_INTEGRATED_SRAM_BASE_ADDR_REMAP   0xf80

Definition at line 368 of file mv643xx.h.

#define MV64340_PCI_1_INTERNAL_SRAM_BAR_SIZE   0xe80

Definition at line 322 of file mv643xx.h.

#define MV64340_PCI_1_INTERRUPT_ACKNOWLEDGE_VIRTUAL_REG   0xcb4

Definition at line 460 of file mv643xx.h.

#define MV64340_PCI_1_IO_ADDR_REMAP   0x108

Definition at line 97 of file mv643xx.h.

#define MV64340_PCI_1_IO_BASE_ADDR   0x090

Definition at line 62 of file mv643xx.h.

#define MV64340_PCI_1_IO_SIZE   0x098

Definition at line 63 of file mv643xx.h.

#define MV64340_PCI_1_MEMORY0_BASE_ADDR   0x0a0

Definition at line 64 of file mv643xx.h.

#define MV64340_PCI_1_MEMORY0_HIGH_ADDR_REMAP   0x340

Definition at line 99 of file mv643xx.h.

#define MV64340_PCI_1_MEMORY0_LOW_ADDR_REMAP   0x110

Definition at line 98 of file mv643xx.h.

#define MV64340_PCI_1_MEMORY0_SIZE   0x0a8

Definition at line 65 of file mv643xx.h.

#define MV64340_PCI_1_MEMORY1_BASE_ADDR   0x0b0

Definition at line 66 of file mv643xx.h.

#define MV64340_PCI_1_MEMORY1_HIGH_ADDR_REMAP   0x348

Definition at line 101 of file mv643xx.h.

#define MV64340_PCI_1_MEMORY1_LOW_ADDR_REMAP   0x118

Definition at line 100 of file mv643xx.h.

#define MV64340_PCI_1_MEMORY1_SIZE   0x0b8

Definition at line 67 of file mv643xx.h.

#define MV64340_PCI_1_MEMORY2_BASE_ADDR   0x2a0

Definition at line 68 of file mv643xx.h.

#define MV64340_PCI_1_MEMORY2_HIGH_ADDR_REMAP   0x350

Definition at line 103 of file mv643xx.h.

#define MV64340_PCI_1_MEMORY2_LOW_ADDR_REMAP   0x310

Definition at line 102 of file mv643xx.h.

#define MV64340_PCI_1_MEMORY2_SIZE   0x2a8

Definition at line 69 of file mv643xx.h.

#define MV64340_PCI_1_MEMORY3_BASE_ADDR   0x2b0

Definition at line 70 of file mv643xx.h.

#define MV64340_PCI_1_MEMORY3_HIGH_ADDR_REMAP   0x358

Definition at line 105 of file mv643xx.h.

#define MV64340_PCI_1_MEMORY3_LOW_ADDR_REMAP   0x318

Definition at line 104 of file mv643xx.h.

#define MV64340_PCI_1_MEMORY3_SIZE   0x2b8

Definition at line 71 of file mv643xx.h.

#define MV64340_PCI_1_MMASK   0X1DA4

Definition at line 486 of file mv643xx.h.

#define MV64340_PCI_1_MODE   0xd80

Definition at line 391 of file mv643xx.h.

#define MV64340_PCI_1_MPP_PADS_DRIVE_CONTROL   0x1d9C

Definition at line 387 of file mv643xx.h.

#define MV64340_PCI_1_MSI_TRIGGER_TIMER   0xcb8

Definition at line 397 of file mv643xx.h.

#define MV64340_PCI_1_P2P_CONFIG   0x1d94

Definition at line 411 of file mv643xx.h.

#define MV64340_PCI_1_P2P_I_O_BAR_SIZE   0xda4

Definition at line 318 of file mv643xx.h.

#define MV64340_PCI_1_P2P_I_O_BASE_ADDR_REMAP   0xdec

Definition at line 362 of file mv643xx.h.

#define MV64340_PCI_1_P2P_MEM0_BAR_SIZE   0xd9c

Definition at line 314 of file mv643xx.h.

#define MV64340_PCI_1_P2P_MEM0_BASE_ADDR_REMAP_HIGH   0xde0

Definition at line 356 of file mv643xx.h.

#define MV64340_PCI_1_P2P_MEM0_BASE_ADDR_REMAP_LOW   0xddc

Definition at line 354 of file mv643xx.h.

#define MV64340_PCI_1_P2P_MEM1_BAR_SIZE   0xda0

Definition at line 316 of file mv643xx.h.

#define MV64340_PCI_1_P2P_MEM1_BASE_ADDR_REMAP_HIGH   0xde8

Definition at line 360 of file mv643xx.h.

#define MV64340_PCI_1_P2P_MEM1_BASE_ADDR_REMAP_LOW   0xde4

Definition at line 358 of file mv643xx.h.

#define MV64340_PCI_1_READ_BUFFER_DISCARD_TIMER   0xd84

Definition at line 395 of file mv643xx.h.

#define MV64340_PCI_1_RETRY   0xc84

Definition at line 393 of file mv643xx.h.

#define MV64340_PCI_1_SERR_MASK   0xca8

Definition at line 467 of file mv643xx.h.

#define MV64340_PCI_1_SYNC_BARRIER_TRIGGER_REG   0x1D98

Definition at line 407 of file mv643xx.h.

#define MV64340_PCI_1_SYNC_BARRIER_VIRTUAL_REG   0x1d90

Definition at line 409 of file mv643xx.h.

#define MV64340_PCI_BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE   0x00C

Definition at line 495 of file mv643xx.h.

#define MV64340_PCI_BOOT_CS_BASE_ADDR_HIGH   0x31c

Definition at line 549 of file mv643xx.h.

#define MV64340_PCI_BOOT_CS_BASE_ADDR_LOW   0x318

Definition at line 548 of file mv643xx.h.

#define MV64340_PCI_CAPABILTY_LIST_POINTER   0x034

Definition at line 505 of file mv643xx.h.

#define MV64340_PCI_CLASS_CODE_AND_REVISION_ID   0x008

Definition at line 494 of file mv643xx.h.

#define MV64340_PCI_COMPACT_PCI_HOT_SWAP   0x068

Definition at line 518 of file mv643xx.h.

#define MV64340_PCI_CPU_BASE_ADDR_HIGH   0x224

Definition at line 551 of file mv643xx.h.

#define MV64340_PCI_CPU_BASE_ADDR_LOW   0x220

Definition at line 550 of file mv643xx.h.

#define MV64340_PCI_DEVCS_0_BASE_ADDR_HIGH   0x214

Definition at line 536 of file mv643xx.h.

#define MV64340_PCI_DEVCS_0_BASE_ADDR_LOW   0x210

Definition at line 535 of file mv643xx.h.

#define MV64340_PCI_DEVCS_1_BASE_ADDR_HIGH   0x21c

Definition at line 538 of file mv643xx.h.

#define MV64340_PCI_DEVCS_1_BASE_ADDR_LOW   0x218

Definition at line 537 of file mv643xx.h.

#define MV64340_PCI_DEVCS_2_BASE_ADDR_HIGH   0x224

Definition at line 540 of file mv643xx.h.

#define MV64340_PCI_DEVCS_2_BASE_ADDR_LOW   0x220

Definition at line 539 of file mv643xx.h.

#define MV64340_PCI_DEVCS_3_BASE_ADDR_HIGH   0x314

Definition at line 547 of file mv643xx.h.

#define MV64340_PCI_DEVCS_3_BASE_ADDR_LOW   0x310

Definition at line 546 of file mv643xx.h.

#define MV64340_PCI_DEVICE_AND_VENDOR_ID   0x000

Definition at line 492 of file mv643xx.h.

#define MV64340_PCI_EXPANSION_ROM_BASE_ADDR_REG   0x030

Definition at line 504 of file mv643xx.h.

#define MV64340_PCI_INTERNAL_REG_MEM_MAPPED_BASE_ADDR_HIGH   0x024

Definition at line 502 of file mv643xx.h.

#define MV64340_PCI_INTERNAL_REG_MEM_MAPPED_BASE_ADDR_LOW   0x020

Definition at line 501 of file mv643xx.h.

#define MV64340_PCI_INTERNAL_REGS_I_O_MAPPED_BASE_ADDR   0x424

Definition at line 562 of file mv643xx.h.

#define MV64340_PCI_INTERNAL_SRAM_BASE_ADDR_HIGH   0x124

Definition at line 529 of file mv643xx.h.

#define MV64340_PCI_INTERNAL_SRAM_BASE_ADDR_LOW   0x120

Definition at line 528 of file mv643xx.h.

#define MV64340_PCI_INTERRUPT_PIN_AND_LINE   0x03C

Definition at line 506 of file mv643xx.h.

#define MV64340_PCI_MSI_MESSAGE_ADDR   0x054

Definition at line 513 of file mv643xx.h.

#define MV64340_PCI_MSI_MESSAGE_CONTROL   0x050

Definition at line 512 of file mv643xx.h.

#define MV64340_PCI_MSI_MESSAGE_DATA   0x05c

Definition at line 515 of file mv643xx.h.

#define MV64340_PCI_MSI_MESSAGE_UPPER_ADDR   0x058

Definition at line 514 of file mv643xx.h.

#define MV64340_PCI_P2P_I_O_BASE_ADDR   0x420

Definition at line 561 of file mv643xx.h.

#define MV64340_PCI_P2P_MEM0_BASE_ADDR_HIGH   0x414

Definition at line 558 of file mv643xx.h.

#define MV64340_PCI_P2P_MEM0_BASE_ADDR_LOW   0x410

Definition at line 557 of file mv643xx.h.

#define MV64340_PCI_P2P_MEM1_BASE_ADDR_HIGH   0x41c

Definition at line 560 of file mv643xx.h.

#define MV64340_PCI_P2P_MEM1_BASE_ADDR_LOW   0x418

Definition at line 559 of file mv643xx.h.

#define MV64340_PCI_POWER_MANAGEMENT_CAPABILITY   0x040

Definition at line 508 of file mv643xx.h.

#define MV64340_PCI_POWER_MANAGEMENT_STATUS_AND_CONTROL   0x044

Definition at line 509 of file mv643xx.h.

#define MV64340_PCI_SCS_0_BASE_ADDR_HIGH   0x014

Definition at line 498 of file mv643xx.h.

#define MV64340_PCI_SCS_0_BASE_ADDR_LOW   0x010

Definition at line 497 of file mv643xx.h.

#define MV64340_PCI_SCS_1_BASE_ADDR_HIGH   0x01C

Definition at line 500 of file mv643xx.h.

#define MV64340_PCI_SCS_1_BASE_ADDR_LOW   0x018

Definition at line 499 of file mv643xx.h.

#define MV64340_PCI_SCS_2_BASE_ADDR_HIGH   0x114

Definition at line 525 of file mv643xx.h.

#define MV64340_PCI_SCS_2_BASE_ADDR_LOW   0x110

Definition at line 524 of file mv643xx.h.

#define MV64340_PCI_SCS_3_BASE_ADDR_HIGH   0x11c

Definition at line 527 of file mv643xx.h.

#define MV64340_PCI_SCS_3_BASE_ADDR_LOW   0x118

Definition at line 526 of file mv643xx.h.

#define MV64340_PCI_STATUS_AND_COMMAND   0x004

Definition at line 493 of file mv643xx.h.

#define MV64340_PCI_SUBSYSTEM_ID_AND_SUBSYSTEM_VENDOR_ID   0x02c

Definition at line 503 of file mv643xx.h.

#define MV64340_PCI_VPD_ADDR   0x048

Definition at line 510 of file mv643xx.h.

#define MV64340_PCI_VPD_DATA   0x04c

Definition at line 511 of file mv643xx.h.

#define MV64340_PCI_X_COMMAND   0x060

Definition at line 516 of file mv643xx.h.

#define MV64340_PCI_X_STATUS   0x064

Definition at line 517 of file mv643xx.h.

#define MV64340_PUNIT_MASTER_DEBUG_HIGH   0x378

Definition at line 189 of file mv643xx.h.

#define MV64340_PUNIT_MASTER_DEBUG_LOW   0x370

Definition at line 188 of file mv643xx.h.

#define MV64340_PUNIT_MMASK   0x3e4

Definition at line 190 of file mv643xx.h.

#define MV64340_PUNIT_SLAVE_DEBUG_HIGH   0x368

Definition at line 187 of file mv643xx.h.

#define MV64340_PUNIT_SLAVE_DEBUG_LOW   0x360

Definition at line 186 of file mv643xx.h.

#define MV64340_RUNIT_MMASK   0x4f0

Definition at line 289 of file mv643xx.h.

#define MV64340_SDMA_CAUSE_REG   0xb800

Definition at line 740 of file mv643xx.h.

#define MV64340_SDMA_COMMAND_REG (   channel)    (0x4008 + (channel<<13))

Definition at line 735 of file mv643xx.h.

#define MV64340_SDMA_CONFIG_REG (   channel)    (0x4000 + (channel<<13))

Definition at line 734 of file mv643xx.h.

#define MV64340_SDMA_CURRENT_RX_DESCRIPTOR_POINTER (   channel)    (0x4810 + (channel<<13))

Definition at line 736 of file mv643xx.h.

#define MV64340_SDMA_CURRENT_TX_DESCRIPTOR_POINTER (   channel)    (0x4c10 + (channel<<13))

Definition at line 737 of file mv643xx.h.

#define MV64340_SDMA_FIRST_TX_DESCRIPTOR_POINTER (   channel)    (0x4c14 + (channel<<13))

Definition at line 738 of file mv643xx.h.

#define MV64340_SDMA_MASK_REG   0xb880

Definition at line 741 of file mv643xx.h.

#define MV64340_SDRAM_ADDR_CONTROL   0x1410

Definition at line 214 of file mv643xx.h.

#define MV64340_SDRAM_ADDR_CTRL_PADS_CALIBRATION   0x14c0

Definition at line 222 of file mv643xx.h.

#define MV64340_SDRAM_CALCULATED_ECC   0x144c

Definition at line 233 of file mv643xx.h.

#define MV64340_SDRAM_CONFIG   0x1400

Definition at line 209 of file mv643xx.h.

#define MV64340_SDRAM_CROSS_BAR_CONTROL_HIGH   0x1434

Definition at line 220 of file mv643xx.h.

#define MV64340_SDRAM_CROSS_BAR_CONTROL_LOW   0x1430

Definition at line 219 of file mv643xx.h.

#define MV64340_SDRAM_CROSS_BAR_TIMEOUT   0x1438

Definition at line 221 of file mv643xx.h.

#define MV64340_SDRAM_DATA_PADS_CALIBRATION   0x14c4

Definition at line 223 of file mv643xx.h.

#define MV64340_SDRAM_ECC_CONTROL   0x1454

Definition at line 234 of file mv643xx.h.

#define MV64340_SDRAM_ECC_ERROR_COUNTER   0x1458

Definition at line 235 of file mv643xx.h.

#define MV64340_SDRAM_ERROR_ADDR   0x1450

Definition at line 231 of file mv643xx.h.

#define MV64340_SDRAM_ERROR_DATA_HIGH   0x1440

Definition at line 230 of file mv643xx.h.

#define MV64340_SDRAM_ERROR_DATA_LOW   0x1444

Definition at line 229 of file mv643xx.h.

#define MV64340_SDRAM_MODE   0x141c

Definition at line 217 of file mv643xx.h.

#define MV64340_SDRAM_OPEN_PAGES_CONTROL   0x1414

Definition at line 215 of file mv643xx.h.

#define MV64340_SDRAM_OPERATION   0x1418

Definition at line 216 of file mv643xx.h.

#define MV64340_SDRAM_RECEIVED_ECC   0x1448

Definition at line 232 of file mv643xx.h.

#define MV64340_SDRAM_TIMING_CONTROL_HIGH   0x140c

Definition at line 213 of file mv643xx.h.

#define MV64340_SDRAM_TIMING_CONTROL_LOW   0x1408

Definition at line 212 of file mv643xx.h.

#define MV64340_SERIAL_INIT_CONTROL   0xf328

Definition at line 920 of file mv643xx.h.

#define MV64340_SERIAL_INIT_LAST_DATA   0xf324

Definition at line 919 of file mv643xx.h.

#define MV64340_SERIAL_INIT_STATUS   0xf32c

Definition at line 921 of file mv643xx.h.

#define MV64340_SMP_CPU0_DOORBELL   0x214

Definition at line 132 of file mv643xx.h.

#define MV64340_SMP_CPU0_DOORBELL_CLEAR   0x21C

Definition at line 133 of file mv643xx.h.

#define MV64340_SMP_CPU0_DOORBELL_MASK   0x234

Definition at line 136 of file mv643xx.h.

#define MV64340_SMP_CPU1_DOORBELL   0x224

Definition at line 134 of file mv643xx.h.

#define MV64340_SMP_CPU1_DOORBELL_CLEAR   0x22C

Definition at line 135 of file mv643xx.h.

#define MV64340_SMP_CPU1_DOORBELL_MASK   0x23C

Definition at line 137 of file mv643xx.h.

#define MV64340_SMP_SEMAPHOR0   0x244

Definition at line 138 of file mv643xx.h.

#define MV64340_SMP_SEMAPHOR1   0x24c

Definition at line 139 of file mv643xx.h.

#define MV64340_SMP_SEMAPHOR2   0x254

Definition at line 140 of file mv643xx.h.

#define MV64340_SMP_SEMAPHOR3   0x25c

Definition at line 141 of file mv643xx.h.

#define MV64340_SMP_SEMAPHOR4   0x264

Definition at line 142 of file mv643xx.h.

#define MV64340_SMP_SEMAPHOR5   0x26c

Definition at line 143 of file mv643xx.h.

#define MV64340_SMP_SEMAPHOR6   0x274

Definition at line 144 of file mv643xx.h.

#define MV64340_SMP_SEMAPHOR7   0x27c

Definition at line 145 of file mv643xx.h.

#define MV64340_SMP_WHO_AM_I   0x200

Definition at line 131 of file mv643xx.h.

#define MV64340_SRAM_ADDR   0x1490

Definition at line 245 of file mv643xx.h.

#define MV64340_SRAM_CONFIG   0x380

Definition at line 196 of file mv643xx.h.

#define MV64340_SRAM_DATA0   0x1494

Definition at line 246 of file mv643xx.h.

#define MV64340_SRAM_DATA1   0x1498

Definition at line 247 of file mv643xx.h.

#define MV64340_SRAM_DATA2   0x149c

Definition at line 248 of file mv643xx.h.

#define MV64340_SRAM_ERROR_ADDR   0x390

Definition at line 199 of file mv643xx.h.

#define MV64340_SRAM_ERROR_ADDR_HIGH   0X3F8

Definition at line 200 of file mv643xx.h.

#define MV64340_SRAM_ERROR_CAUSE   0x388

Definition at line 198 of file mv643xx.h.

#define MV64340_SRAM_ERROR_DATA_HIGH   0x3a0

Definition at line 202 of file mv643xx.h.

#define MV64340_SRAM_ERROR_DATA_LOW   0x398

Definition at line 201 of file mv643xx.h.

#define MV64340_SRAM_ERROR_DATA_PARITY   0x3a8

Definition at line 203 of file mv643xx.h.

#define MV64340_SRAM_TEST_MODE   0X3F4

Definition at line 197 of file mv643xx.h.

#define MV64340_TIMER_COUNTER0   0x850

Definition at line 848 of file mv643xx.h.

#define MV64340_TIMER_COUNTER1   0x854

Definition at line 849 of file mv643xx.h.

#define MV64340_TIMER_COUNTER2   0x858

Definition at line 850 of file mv643xx.h.

#define MV64340_TIMER_COUNTER3   0x85C

Definition at line 851 of file mv643xx.h.

#define MV64340_TIMER_COUNTER_0_3_CONTROL   0x864

Definition at line 852 of file mv643xx.h.

#define MV64340_TIMER_COUNTER_0_3_INTERRUPT_CAUSE   0x868

Definition at line 853 of file mv643xx.h.

#define MV64340_TIMER_COUNTER_0_3_INTERRUPT_MASK   0x86c

Definition at line 854 of file mv643xx.h.

#define MV64340_WATCHDOG_CONFIG_REG   0xb410

Definition at line 860 of file mv643xx.h.

#define MV64340_WATCHDOG_VALUE_REG   0xb414

Definition at line 861 of file mv643xx.h.

#define MV64x60_WDT_NAME   "mv64x60_wdt"

Definition at line 972 of file mv643xx.h.

#define MV64XXX_I2C_OFFSET   0xc000

Definition at line 867 of file mv643xx.h.

#define MV64XXX_I2C_REG_BLOCK_SIZE   0x0020

Definition at line 868 of file mv643xx.h.

Function Documentation

void mv64340_irq_init ( unsigned int  base)
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