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#define | MV64x60_REVISION " Ver: 2.0.0" |
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#define | EDAC_MOD_STR "MV64x60_edac" |
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#define | mv64x60_printk(level, fmt, arg...) edac_printk(level, "MV64x60", fmt, ##arg) |
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#define | mv64x60_mc_printk(mci, level, fmt, arg...) edac_mc_chipset_printk(mci, level, "MV64x60", fmt, ##arg) |
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#define | MV64x60_CPU_ERR_ADDR_LO 0x00 /* 0x0070 */ |
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#define | MV64x60_CPU_ERR_ADDR_HI 0x08 /* 0x0078 */ |
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#define | MV64x60_CPU_ERR_DATA_LO 0x00 /* 0x0128 */ |
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#define | MV64x60_CPU_ERR_DATA_HI 0x08 /* 0x0130 */ |
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#define | MV64x60_CPU_ERR_PARITY 0x10 /* 0x0138 */ |
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#define | MV64x60_CPU_ERR_CAUSE 0x18 /* 0x0140 */ |
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#define | MV64x60_CPU_ERR_MASK 0x20 /* 0x0148 */ |
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#define | MV64x60_CPU_CAUSE_MASK 0x07ffffff |
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#define | MV64X60_SRAM_ERR_CAUSE 0x08 /* 0x0388 */ |
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#define | MV64X60_SRAM_ERR_ADDR_LO 0x10 /* 0x0390 */ |
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#define | MV64X60_SRAM_ERR_ADDR_HI 0x78 /* 0x03f8 */ |
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#define | MV64X60_SRAM_ERR_DATA_LO 0x18 /* 0x0398 */ |
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#define | MV64X60_SRAM_ERR_DATA_HI 0x20 /* 0x03a0 */ |
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#define | MV64X60_SRAM_ERR_PARITY 0x28 /* 0x03a8 */ |
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#define | MV64X60_SDRAM_CONFIG 0x00 /* 0x1400 */ |
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#define | MV64X60_SDRAM_ERR_DATA_HI 0x40 /* 0x1440 */ |
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#define | MV64X60_SDRAM_ERR_DATA_LO 0x44 /* 0x1444 */ |
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#define | MV64X60_SDRAM_ERR_ECC_RCVD 0x48 /* 0x1448 */ |
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#define | MV64X60_SDRAM_ERR_ECC_CALC 0x4c /* 0x144c */ |
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#define | MV64X60_SDRAM_ERR_ADDR 0x50 /* 0x1450 */ |
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#define | MV64X60_SDRAM_ERR_ECC_CNTL 0x54 /* 0x1454 */ |
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#define | MV64X60_SDRAM_ERR_ECC_ERR_CNT 0x58 /* 0x1458 */ |
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#define | MV64X60_SDRAM_REGISTERED 0x20000 |
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#define | MV64X60_SDRAM_ECC 0x40000 |
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#define EDAC_MOD_STR "MV64x60_edac" |
#define MV64x60_CPU_CAUSE_MASK 0x07ffffff |
#define MV64x60_CPU_ERR_ADDR_HI 0x08 /* 0x0078 */ |
#define MV64x60_CPU_ERR_ADDR_LO 0x00 /* 0x0070 */ |
#define MV64x60_CPU_ERR_CAUSE 0x18 /* 0x0140 */ |
#define MV64x60_CPU_ERR_DATA_HI 0x08 /* 0x0130 */ |
#define MV64x60_CPU_ERR_DATA_LO 0x00 /* 0x0128 */ |
#define MV64x60_CPU_ERR_MASK 0x20 /* 0x0148 */ |
#define MV64x60_CPU_ERR_PARITY 0x10 /* 0x0138 */ |
#define MV64x60_REVISION " Ver: 2.0.0" |
#define MV64X60_SDRAM_CONFIG 0x00 /* 0x1400 */ |
#define MV64X60_SDRAM_ECC 0x40000 |
#define MV64X60_SDRAM_ERR_ADDR 0x50 /* 0x1450 */ |
#define MV64X60_SDRAM_ERR_DATA_HI 0x40 /* 0x1440 */ |
#define MV64X60_SDRAM_ERR_DATA_LO 0x44 /* 0x1444 */ |
#define MV64X60_SDRAM_ERR_ECC_CALC 0x4c /* 0x144c */ |
#define MV64X60_SDRAM_ERR_ECC_CNTL 0x54 /* 0x1454 */ |
#define MV64X60_SDRAM_ERR_ECC_ERR_CNT 0x58 /* 0x1458 */ |
#define MV64X60_SDRAM_ERR_ECC_RCVD 0x48 /* 0x1448 */ |
#define MV64X60_SDRAM_REGISTERED 0x20000 |
#define MV64X60_SRAM_ERR_ADDR_HI 0x78 /* 0x03f8 */ |
#define MV64X60_SRAM_ERR_ADDR_LO 0x10 /* 0x0390 */ |
#define MV64X60_SRAM_ERR_CAUSE 0x08 /* 0x0388 */ |
#define MV64X60_SRAM_ERR_DATA_HI 0x20 /* 0x03a0 */ |
#define MV64X60_SRAM_ERR_DATA_LO 0x18 /* 0x0398 */ |
#define MV64X60_SRAM_ERR_PARITY 0x28 /* 0x03a8 */ |