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| #define MXCC_CREG 0x1C00A04 /* Control register */ |
| #define MXCC_CTL_ECE 0x00000004 |
| #define MXCC_CTL_MCE 0x00000010 |
| #define MXCC_CTL_PARE 0x00000008 |
| #define MXCC_CTL_PRE 0x00000020 |
| #define MXCC_CTL_RRC 0x00000200 |
| #define MXCC_DATSTREAM 0x1C00000 /* Data stream register */ |
| #define MXCC_DESSTREAM 0x1C00200 /* Destination stream register */ |
| #define MXCC_EREG 0x1C00E00 /* Error code register */ |
| #define MXCC_ERR_ASE 0x04000000 |
| #define MXCC_ERR_CE 0x20000000 |
| #define MXCC_ERR_ECODE 0x00007F80 |
| #define MXCC_ERR_EIV 0x02000000 |
| #define MXCC_ERR_HPADDR 0x0000000f |
| #define MXCC_ERR_ME 0x80000000 |
| #define MXCC_ERR_MOPC 0x01FF8000 |
| #define MXCC_ERR_PEE 0x08000000 |
| #define MXCC_ERR_PEW 0x10000000 |
| #define MXCC_ERR_PRIV 0x00000040 |
| #define MXCC_PREG 0x1C00F04 /* Address port register */ |
| #define MXCC_RMCOUNT 0x1C00300 /* Count of references and misses */ |
| #define MXCC_RREG 0x1C00C04 /* Reset register */ |
| #define MXCC_SRCSTREAM 0x1C00100 /* Source stream register */ |
| #define MXCC_SREG 0x1C00B00 /* Status register */ |
| #define MXCC_STEST 0x1C00804 /* Internal self-test */ |
| #define MXCC_STREAM_SIZE 0x20 /* Size in bytes of one stream r/w */ |
1.8.2