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mxl111sf-i2c.c
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1 /*
2  * mxl111sf-i2c.c - driver for the MaxLinear MXL111SF
3  *
4  * Copyright (C) 2010 Michael Krufky <[email protected]>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19  */
20 
21 #include "mxl111sf-i2c.h"
22 #include "mxl111sf.h"
23 
24 /* SW-I2C ----------------------------------------------------------------- */
25 
26 #define SW_I2C_ADDR 0x1a
27 #define SW_I2C_EN 0x02
28 #define SW_SCL_OUT 0x04
29 #define SW_SDA_OUT 0x08
30 #define SW_SDA_IN 0x04
31 
32 #define SW_I2C_BUSY_ADDR 0x2f
33 #define SW_I2C_BUSY 0x02
34 
35 static int mxl111sf_i2c_bitbang_sendbyte(struct mxl111sf_state *state,
36  u8 byte)
37 {
38  int i, ret;
39  u8 data = 0;
40 
41  mxl_i2c("(0x%02x)", byte);
42 
43  ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
44  if (mxl_fail(ret))
45  goto fail;
46 
47  for (i = 0; i < 8; i++) {
48 
49  data = (byte & (0x80 >> i)) ? SW_SDA_OUT : 0;
50 
51  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
52  0x10 | SW_I2C_EN | data);
53  if (mxl_fail(ret))
54  goto fail;
55 
56  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
57  0x10 | SW_I2C_EN | data | SW_SCL_OUT);
58  if (mxl_fail(ret))
59  goto fail;
60 
61  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
62  0x10 | SW_I2C_EN | data);
63  if (mxl_fail(ret))
64  goto fail;
65  }
66 
67  /* last bit was 0 so we need to release SDA */
68  if (!(byte & 1)) {
69  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
70  0x10 | SW_I2C_EN | SW_SDA_OUT);
71  if (mxl_fail(ret))
72  goto fail;
73  }
74 
75  /* CLK high for ACK readback */
76  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
77  0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
78  if (mxl_fail(ret))
79  goto fail;
80 
81  ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
82  if (mxl_fail(ret))
83  goto fail;
84 
85  /* drop the CLK after getting ACK, SDA will go high right away */
86  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
87  0x10 | SW_I2C_EN | SW_SDA_OUT);
88  if (mxl_fail(ret))
89  goto fail;
90 
91  if (data & SW_SDA_IN)
92  ret = -EIO;
93 fail:
94  return ret;
95 }
96 
97 static int mxl111sf_i2c_bitbang_recvbyte(struct mxl111sf_state *state,
98  u8 *pbyte)
99 {
100  int i, ret;
101  u8 byte = 0;
102  u8 data = 0;
103 
104  mxl_i2c("()");
105 
106  *pbyte = 0;
107 
108  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
109  0x10 | SW_I2C_EN | SW_SDA_OUT);
110  if (mxl_fail(ret))
111  goto fail;
112 
113  for (i = 0; i < 8; i++) {
114  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
115  0x10 | SW_I2C_EN |
116  SW_SCL_OUT | SW_SDA_OUT);
117  if (mxl_fail(ret))
118  goto fail;
119 
120  ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
121  if (mxl_fail(ret))
122  goto fail;
123 
124  if (data & SW_SDA_IN)
125  byte |= (0x80 >> i);
126 
127  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
128  0x10 | SW_I2C_EN | SW_SDA_OUT);
129  if (mxl_fail(ret))
130  goto fail;
131  }
132  *pbyte = byte;
133 fail:
134  return ret;
135 }
136 
137 static int mxl111sf_i2c_start(struct mxl111sf_state *state)
138 {
139  int ret;
140 
141  mxl_i2c("()");
142 
143  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
144  0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
145  if (mxl_fail(ret))
146  goto fail;
147 
148  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
149  0x10 | SW_I2C_EN | SW_SCL_OUT);
150  if (mxl_fail(ret))
151  goto fail;
152 
153  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
154  0x10 | SW_I2C_EN); /* start */
155  mxl_fail(ret);
156 fail:
157  return ret;
158 }
159 
160 static int mxl111sf_i2c_stop(struct mxl111sf_state *state)
161 {
162  int ret;
163 
164  mxl_i2c("()");
165 
166  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
167  0x10 | SW_I2C_EN); /* stop */
168  if (mxl_fail(ret))
169  goto fail;
170 
171  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
172  0x10 | SW_I2C_EN | SW_SCL_OUT);
173  if (mxl_fail(ret))
174  goto fail;
175 
176  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
177  0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
178  if (mxl_fail(ret))
179  goto fail;
180 
181  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
182  0x10 | SW_SCL_OUT | SW_SDA_OUT);
183  mxl_fail(ret);
184 fail:
185  return ret;
186 }
187 
188 static int mxl111sf_i2c_ack(struct mxl111sf_state *state)
189 {
190  int ret;
191  u8 b = 0;
192 
193  mxl_i2c("()");
194 
195  ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &b);
196  if (mxl_fail(ret))
197  goto fail;
198 
199  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
200  0x10 | SW_I2C_EN);
201  if (mxl_fail(ret))
202  goto fail;
203 
204  /* pull SDA low */
205  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
206  0x10 | SW_I2C_EN | SW_SCL_OUT);
207  if (mxl_fail(ret))
208  goto fail;
209 
210  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
211  0x10 | SW_I2C_EN | SW_SDA_OUT);
212  mxl_fail(ret);
213 fail:
214  return ret;
215 }
216 
217 static int mxl111sf_i2c_nack(struct mxl111sf_state *state)
218 {
219  int ret;
220 
221  mxl_i2c("()");
222 
223  /* SDA high to signal last byte read from slave */
224  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
225  0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
226  if (mxl_fail(ret))
227  goto fail;
228 
229  ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
230  0x10 | SW_I2C_EN | SW_SDA_OUT);
231  mxl_fail(ret);
232 fail:
233  return ret;
234 }
235 
236 /* ------------------------------------------------------------------------ */
237 
238 static int mxl111sf_i2c_sw_xfer_msg(struct mxl111sf_state *state,
239  struct i2c_msg *msg)
240 {
241  int i, ret;
242 
243  mxl_i2c("()");
244 
245  if (msg->flags & I2C_M_RD) {
246 
247  ret = mxl111sf_i2c_start(state);
248  if (mxl_fail(ret))
249  goto fail;
250 
251  ret = mxl111sf_i2c_bitbang_sendbyte(state,
252  (msg->addr << 1) | 0x01);
253  if (mxl_fail(ret)) {
254  mxl111sf_i2c_stop(state);
255  goto fail;
256  }
257 
258  for (i = 0; i < msg->len; i++) {
259  ret = mxl111sf_i2c_bitbang_recvbyte(state,
260  &msg->buf[i]);
261  if (mxl_fail(ret)) {
262  mxl111sf_i2c_stop(state);
263  goto fail;
264  }
265 
266  if (i < msg->len - 1)
267  mxl111sf_i2c_ack(state);
268  }
269 
270  mxl111sf_i2c_nack(state);
271 
272  ret = mxl111sf_i2c_stop(state);
273  if (mxl_fail(ret))
274  goto fail;
275 
276  } else {
277 
278  ret = mxl111sf_i2c_start(state);
279  if (mxl_fail(ret))
280  goto fail;
281 
282  ret = mxl111sf_i2c_bitbang_sendbyte(state,
283  (msg->addr << 1) & 0xfe);
284  if (mxl_fail(ret)) {
285  mxl111sf_i2c_stop(state);
286  goto fail;
287  }
288 
289  for (i = 0; i < msg->len; i++) {
290  ret = mxl111sf_i2c_bitbang_sendbyte(state,
291  msg->buf[i]);
292  if (mxl_fail(ret)) {
293  mxl111sf_i2c_stop(state);
294  goto fail;
295  }
296  }
297 
298  /* FIXME: we only want to do this on the last transaction */
299  mxl111sf_i2c_stop(state);
300  }
301 fail:
302  return ret;
303 }
304 
305 /* HW-I2C ----------------------------------------------------------------- */
306 
307 #define USB_WRITE_I2C_CMD 0x99
308 #define USB_READ_I2C_CMD 0xdd
309 #define USB_END_I2C_CMD 0xfe
310 
311 #define USB_WRITE_I2C_CMD_LEN 26
312 #define USB_READ_I2C_CMD_LEN 24
313 
314 #define I2C_MUX_REG 0x30
315 #define I2C_CONTROL_REG 0x00
316 #define I2C_SLAVE_ADDR_REG 0x08
317 #define I2C_DATA_REG 0x0c
318 #define I2C_INT_STATUS_REG 0x10
319 
320 static int mxl111sf_i2c_send_data(struct mxl111sf_state *state,
321  u8 index, u8 *wdata)
322 {
323  int ret = mxl111sf_ctrl_msg(state->d, wdata[0],
324  &wdata[1], 25, NULL, 0);
325  mxl_fail(ret);
326 
327  return ret;
328 }
329 
330 static int mxl111sf_i2c_get_data(struct mxl111sf_state *state,
331  u8 index, u8 *wdata, u8 *rdata)
332 {
333  int ret = mxl111sf_ctrl_msg(state->d, wdata[0],
334  &wdata[1], 25, rdata, 24);
335  mxl_fail(ret);
336 
337  return ret;
338 }
339 
340 static u8 mxl111sf_i2c_check_status(struct mxl111sf_state *state)
341 {
342  u8 status = 0;
343  u8 buf[26];
344 
345  mxl_i2c_adv("()");
346 
347  buf[0] = USB_READ_I2C_CMD;
348  buf[1] = 0x00;
349 
350  buf[2] = I2C_INT_STATUS_REG;
351  buf[3] = 0x00;
352  buf[4] = 0x00;
353 
354  buf[5] = USB_END_I2C_CMD;
355 
356  mxl111sf_i2c_get_data(state, 0, buf, buf);
357 
358  if (buf[1] & 0x04)
359  status = 1;
360 
361  return status;
362 }
363 
364 static u8 mxl111sf_i2c_check_fifo(struct mxl111sf_state *state)
365 {
366  u8 status = 0;
367  u8 buf[26];
368 
369  mxl_i2c("()");
370 
371  buf[0] = USB_READ_I2C_CMD;
372  buf[1] = 0x00;
373 
374  buf[2] = I2C_MUX_REG;
375  buf[3] = 0x00;
376  buf[4] = 0x00;
377 
378  buf[5] = I2C_INT_STATUS_REG;
379  buf[6] = 0x00;
380  buf[7] = 0x00;
381  buf[8] = USB_END_I2C_CMD;
382 
383  mxl111sf_i2c_get_data(state, 0, buf, buf);
384 
385  if (0x08 == (buf[1] & 0x08))
386  status = 1;
387 
388  if ((buf[5] & 0x02) == 0x02)
389  mxl_i2c("(buf[5] & 0x02) == 0x02"); /* FIXME */
390 
391  return status;
392 }
393 
394 static int mxl111sf_i2c_readagain(struct mxl111sf_state *state,
395  u8 count, u8 *rbuf)
396 {
397  u8 i2c_w_data[26];
398  u8 i2c_r_data[24];
399  u8 i = 0;
400  u8 fifo_status = 0;
401  int status = 0;
402 
403  mxl_i2c("read %d bytes", count);
404 
405  while ((fifo_status == 0) && (i++ < 5))
406  fifo_status = mxl111sf_i2c_check_fifo(state);
407 
408  i2c_w_data[0] = 0xDD;
409  i2c_w_data[1] = 0x00;
410 
411  for (i = 2; i < 26; i++)
412  i2c_w_data[i] = 0xFE;
413 
414  for (i = 0; i < count; i++) {
415  i2c_w_data[2+(i*3)] = 0x0C;
416  i2c_w_data[3+(i*3)] = 0x00;
417  i2c_w_data[4+(i*3)] = 0x00;
418  }
419 
420  mxl111sf_i2c_get_data(state, 0, i2c_w_data, i2c_r_data);
421 
422  /* Check for I2C NACK status */
423  if (mxl111sf_i2c_check_status(state) == 1) {
424  mxl_i2c("error!");
425  } else {
426  for (i = 0; i < count; i++) {
427  rbuf[i] = i2c_r_data[(i*3)+1];
428  mxl_i2c("%02x\t %02x",
429  i2c_r_data[(i*3)+1],
430  i2c_r_data[(i*3)+2]);
431  }
432 
433  status = 1;
434  }
435 
436  return status;
437 }
438 
439 #define HWI2C400 1
440 static int mxl111sf_i2c_hw_xfer_msg(struct mxl111sf_state *state,
441  struct i2c_msg *msg)
442 {
443  int i, k, ret = 0;
444  u16 index = 0;
445  u8 buf[26];
446  u8 i2c_r_data[24];
447  u16 block_len;
448  u16 left_over_len;
449  u8 rd_status[8];
450  u8 ret_status;
451  u8 readbuff[26];
452 
453  mxl_i2c("addr: 0x%02x, read buff len: %d, write buff len: %d",
454  msg->addr, (msg->flags & I2C_M_RD) ? msg->len : 0,
455  (!(msg->flags & I2C_M_RD)) ? msg->len : 0);
456 
457  for (index = 0; index < 26; index++)
458  buf[index] = USB_END_I2C_CMD;
459 
460  /* command to indicate data payload is destined for I2C interface */
461  buf[0] = USB_WRITE_I2C_CMD;
462  buf[1] = 0x00;
463 
464  /* enable I2C interface */
465  buf[2] = I2C_MUX_REG;
466  buf[3] = 0x80;
467  buf[4] = 0x00;
468 
469  /* enable I2C interface */
470  buf[5] = I2C_MUX_REG;
471  buf[6] = 0x81;
472  buf[7] = 0x00;
473 
474  /* set Timeout register on I2C interface */
475  buf[8] = 0x14;
476  buf[9] = 0xff;
477  buf[10] = 0x00;
478 #if 0
479  /* enable Interrupts on I2C interface */
480  buf[8] = 0x24;
481  buf[9] = 0xF7;
482  buf[10] = 0x00;
483 #endif
484  buf[11] = 0x24;
485  buf[12] = 0xF7;
486  buf[13] = 0x00;
487 
488  ret = mxl111sf_i2c_send_data(state, 0, buf);
489 
490  /* write data on I2C bus */
491  if (!(msg->flags & I2C_M_RD) && (msg->len > 0)) {
492  mxl_i2c("%d\t%02x", msg->len, msg->buf[0]);
493 
494  /* control register on I2C interface to initialize I2C bus */
495  buf[2] = I2C_CONTROL_REG;
496  buf[3] = 0x5E;
497  buf[4] = (HWI2C400) ? 0x03 : 0x0D;
498 
499  /* I2C Slave device Address */
500  buf[5] = I2C_SLAVE_ADDR_REG;
501  buf[6] = (msg->addr);
502  buf[7] = 0x00;
503  buf[8] = USB_END_I2C_CMD;
504  ret = mxl111sf_i2c_send_data(state, 0, buf);
505 
506  /* check for slave device status */
507  if (mxl111sf_i2c_check_status(state) == 1) {
508  mxl_i2c("NACK writing slave address %02x",
509  msg->addr);
510  /* if NACK, stop I2C bus and exit */
511  buf[2] = I2C_CONTROL_REG;
512  buf[3] = 0x4E;
513  buf[4] = (HWI2C400) ? 0x03 : 0x0D;
514  ret = -EIO;
515  goto exit;
516  }
517 
518  /* I2C interface can do I2C operations in block of 8 bytes of
519  I2C data. calculation to figure out number of blocks of i2c
520  data required to program */
521  block_len = (msg->len / 8);
522  left_over_len = (msg->len % 8);
523  index = 0;
524 
525  mxl_i2c("block_len %d, left_over_len %d",
526  block_len, left_over_len);
527 
528  for (index = 0; index < block_len; index++) {
529  for (i = 0; i < 8; i++) {
530  /* write data on I2C interface */
531  buf[2+(i*3)] = I2C_DATA_REG;
532  buf[3+(i*3)] = msg->buf[(index*8)+i];
533  buf[4+(i*3)] = 0x00;
534  }
535 
536  ret = mxl111sf_i2c_send_data(state, 0, buf);
537 
538  /* check for I2C NACK status */
539  if (mxl111sf_i2c_check_status(state) == 1) {
540  mxl_i2c("NACK writing slave address %02x",
541  msg->addr);
542 
543  /* if NACK, stop I2C bus and exit */
544  buf[2] = I2C_CONTROL_REG;
545  buf[3] = 0x4E;
546  buf[4] = (HWI2C400) ? 0x03 : 0x0D;
547  ret = -EIO;
548  goto exit;
549  }
550 
551  }
552 
553  if (left_over_len) {
554  for (k = 0; k < 26; k++)
555  buf[k] = USB_END_I2C_CMD;
556 
557  buf[0] = 0x99;
558  buf[1] = 0x00;
559 
560  for (i = 0; i < left_over_len; i++) {
561  buf[2+(i*3)] = I2C_DATA_REG;
562  buf[3+(i*3)] = msg->buf[(index*8)+i];
563  mxl_i2c("index = %d %d data %d",
564  index, i, msg->buf[(index*8)+i]);
565  buf[4+(i*3)] = 0x00;
566  }
567  ret = mxl111sf_i2c_send_data(state, 0, buf);
568 
569  /* check for I2C NACK status */
570  if (mxl111sf_i2c_check_status(state) == 1) {
571  mxl_i2c("NACK writing slave address %02x",
572  msg->addr);
573 
574  /* if NACK, stop I2C bus and exit */
575  buf[2] = I2C_CONTROL_REG;
576  buf[3] = 0x4E;
577  buf[4] = (HWI2C400) ? 0x03 : 0x0D;
578  ret = -EIO;
579  goto exit;
580  }
581 
582  }
583 
584  /* issue I2C STOP after write */
585  buf[2] = I2C_CONTROL_REG;
586  buf[3] = 0x4E;
587  buf[4] = (HWI2C400) ? 0x03 : 0x0D;
588 
589  }
590 
591  /* read data from I2C bus */
592  if ((msg->flags & I2C_M_RD) && (msg->len > 0)) {
593  mxl_i2c("read buf len %d", msg->len);
594 
595  /* command to indicate data payload is
596  destined for I2C interface */
597  buf[2] = I2C_CONTROL_REG;
598  buf[3] = 0xDF;
599  buf[4] = (HWI2C400) ? 0x03 : 0x0D;
600 
601  /* I2C xfer length */
602  buf[5] = 0x14;
603  buf[6] = (msg->len & 0xFF);
604  buf[7] = 0;
605 
606  /* I2C slave device Address */
607  buf[8] = I2C_SLAVE_ADDR_REG;
608  buf[9] = msg->addr;
609  buf[10] = 0x00;
610  buf[11] = USB_END_I2C_CMD;
611  ret = mxl111sf_i2c_send_data(state, 0, buf);
612 
613  /* check for I2C NACK status */
614  if (mxl111sf_i2c_check_status(state) == 1) {
615  mxl_i2c("NACK reading slave address %02x",
616  msg->addr);
617 
618  /* if NACK, stop I2C bus and exit */
619  buf[2] = I2C_CONTROL_REG;
620  buf[3] = 0xC7;
621  buf[4] = (HWI2C400) ? 0x03 : 0x0D;
622  ret = -EIO;
623  goto exit;
624  }
625 
626  /* I2C interface can do I2C operations in block of 8 bytes of
627  I2C data. calculation to figure out number of blocks of
628  i2c data required to program */
629  block_len = ((msg->len) / 8);
630  left_over_len = ((msg->len) % 8);
631  index = 0;
632 
633  mxl_i2c("block_len %d, left_over_len %d",
634  block_len, left_over_len);
635 
636  /* command to read data from I2C interface */
637  buf[0] = USB_READ_I2C_CMD;
638  buf[1] = 0x00;
639 
640  for (index = 0; index < block_len; index++) {
641  /* setup I2C read request packet on I2C interface */
642  for (i = 0; i < 8; i++) {
643  buf[2+(i*3)] = I2C_DATA_REG;
644  buf[3+(i*3)] = 0x00;
645  buf[4+(i*3)] = 0x00;
646  }
647 
648  ret = mxl111sf_i2c_get_data(state, 0, buf, i2c_r_data);
649 
650  /* check for I2C NACK status */
651  if (mxl111sf_i2c_check_status(state) == 1) {
652  mxl_i2c("NACK reading slave address %02x",
653  msg->addr);
654 
655  /* if NACK, stop I2C bus and exit */
656  buf[2] = I2C_CONTROL_REG;
657  buf[3] = 0xC7;
658  buf[4] = (HWI2C400) ? 0x03 : 0x0D;
659  ret = -EIO;
660  goto exit;
661  }
662 
663  /* copy data from i2c data payload to read buffer */
664  for (i = 0; i < 8; i++) {
665  rd_status[i] = i2c_r_data[(i*3)+2];
666 
667  if (rd_status[i] == 0x04) {
668  if (i < 7) {
669  mxl_i2c("i2c fifo empty!"
670  " @ %d", i);
671  msg->buf[(index*8)+i] =
672  i2c_r_data[(i*3)+1];
673  /* read again */
674  ret_status =
675  mxl111sf_i2c_readagain(
676  state, 8-(i+1),
677  readbuff);
678  if (ret_status == 1) {
679  for (k = 0;
680  k < 8-(i+1);
681  k++) {
682 
683  msg->buf[(index*8)+(k+i+1)] =
684  readbuff[k];
685  mxl_i2c("read data: %02x\t %02x",
686  msg->buf[(index*8)+(k+i)],
687  (index*8)+(k+i));
688  mxl_i2c("read data: %02x\t %02x",
689  msg->buf[(index*8)+(k+i+1)],
690  readbuff[k]);
691 
692  }
693  goto stop_copy;
694  } else {
695  mxl_i2c("readagain "
696  "ERROR!");
697  }
698  } else {
699  msg->buf[(index*8)+i] =
700  i2c_r_data[(i*3)+1];
701  }
702  } else {
703  msg->buf[(index*8)+i] =
704  i2c_r_data[(i*3)+1];
705  }
706  }
707 stop_copy:
708  ;
709 
710  }
711 
712  if (left_over_len) {
713  for (k = 0; k < 26; k++)
714  buf[k] = USB_END_I2C_CMD;
715 
716  buf[0] = 0xDD;
717  buf[1] = 0x00;
718 
719  for (i = 0; i < left_over_len; i++) {
720  buf[2+(i*3)] = I2C_DATA_REG;
721  buf[3+(i*3)] = 0x00;
722  buf[4+(i*3)] = 0x00;
723  }
724  ret = mxl111sf_i2c_get_data(state, 0, buf,
725  i2c_r_data);
726 
727  /* check for I2C NACK status */
728  if (mxl111sf_i2c_check_status(state) == 1) {
729  mxl_i2c("NACK reading slave address %02x",
730  msg->addr);
731 
732  /* if NACK, stop I2C bus and exit */
733  buf[2] = I2C_CONTROL_REG;
734  buf[3] = 0xC7;
735  buf[4] = (HWI2C400) ? 0x03 : 0x0D;
736  ret = -EIO;
737  goto exit;
738  }
739 
740  for (i = 0; i < left_over_len; i++) {
741  msg->buf[(block_len*8)+i] =
742  i2c_r_data[(i*3)+1];
743  mxl_i2c("read data: %02x\t %02x",
744  i2c_r_data[(i*3)+1],
745  i2c_r_data[(i*3)+2]);
746  }
747  }
748 
749  /* indicate I2C interface to issue NACK
750  after next I2C read op */
751  buf[0] = USB_WRITE_I2C_CMD;
752  buf[1] = 0x00;
753 
754  /* control register */
755  buf[2] = I2C_CONTROL_REG;
756  buf[3] = 0x17;
757  buf[4] = (HWI2C400) ? 0x03 : 0x0D;
758 
759  buf[5] = USB_END_I2C_CMD;
760  ret = mxl111sf_i2c_send_data(state, 0, buf);
761 
762  /* control register */
763  buf[2] = I2C_CONTROL_REG;
764  buf[3] = 0xC7;
765  buf[4] = (HWI2C400) ? 0x03 : 0x0D;
766 
767  }
768 exit:
769  /* STOP and disable I2C MUX */
770  buf[0] = USB_WRITE_I2C_CMD;
771  buf[1] = 0x00;
772 
773  /* de-initilize I2C BUS */
774  buf[5] = USB_END_I2C_CMD;
775  mxl111sf_i2c_send_data(state, 0, buf);
776 
777  /* Control Register */
778  buf[2] = I2C_CONTROL_REG;
779  buf[3] = 0xDF;
780  buf[4] = 0x03;
781 
782  /* disable I2C interface */
783  buf[5] = I2C_MUX_REG;
784  buf[6] = 0x00;
785  buf[7] = 0x00;
786 
787  /* de-initilize I2C BUS */
788  buf[8] = USB_END_I2C_CMD;
789  mxl111sf_i2c_send_data(state, 0, buf);
790 
791  /* disable I2C interface */
792  buf[2] = I2C_MUX_REG;
793  buf[3] = 0x81;
794  buf[4] = 0x00;
795 
796  /* disable I2C interface */
797  buf[5] = I2C_MUX_REG;
798  buf[6] = 0x00;
799  buf[7] = 0x00;
800 
801  /* disable I2C interface */
802  buf[8] = I2C_MUX_REG;
803  buf[9] = 0x00;
804  buf[10] = 0x00;
805 
806  buf[11] = USB_END_I2C_CMD;
807  mxl111sf_i2c_send_data(state, 0, buf);
808 
809  return ret;
810 }
811 
812 /* ------------------------------------------------------------------------ */
813 
814 int mxl111sf_i2c_xfer(struct i2c_adapter *adap,
815  struct i2c_msg msg[], int num)
816 {
817  struct dvb_usb_device *d = i2c_get_adapdata(adap);
818  struct mxl111sf_state *state = d->priv;
819  int hwi2c = (state->chip_rev > MXL111SF_V6);
820  int i, ret;
821 
822  if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
823  return -EAGAIN;
824 
825  for (i = 0; i < num; i++) {
826  ret = (hwi2c) ?
827  mxl111sf_i2c_hw_xfer_msg(state, &msg[i]) :
828  mxl111sf_i2c_sw_xfer_msg(state, &msg[i]);
829  if (mxl_fail(ret)) {
830  mxl_debug_adv("failed with error %d on i2c "
831  "transaction %d of %d, %sing %d bytes "
832  "to/from 0x%02x", ret, i+1, num,
833  (msg[i].flags & I2C_M_RD) ?
834  "read" : "writ",
835  msg[i].len, msg[i].addr);
836 
837  break;
838  }
839  }
840 
841  mutex_unlock(&d->i2c_mutex);
842 
843  return i == num ? num : -EREMOTEIO;
844 }
845 
846 /*
847  * Local variables:
848  * c-basic-offset: 8
849  * End:
850  */
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