|
Linux Kernel
3.7.1
|
All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
|
Linux Kernel
3.7.1
|
Go to the source code of this file.
| #define CHIP_ID_REG 0xFC |
Definition at line 24 of file mxl111sf-reg.h.
| #define I2S_DATA_FORMAT 2 |
Definition at line 106 of file mxl111sf-reg.h.
| #define I2S_LEFT_JUSTIFIED 1 |
Definition at line 105 of file mxl111sf-reg.h.
| #define I2S_RIGHT_JUSTIFIED 0 |
Definition at line 104 of file mxl111sf-reg.h.
| #define IDAC_CURRENT_SINKING_BIT_MASK 0x40 |
Definition at line 166 of file mxl111sf-reg.h.
| #define IDAC_CURRENT_SINKING_ENABLE 1 |
Definition at line 164 of file mxl111sf-reg.h.
| #define IDAC_MANUAL_CONTROL 1 |
Definition at line 163 of file mxl111sf-reg.h.
| #define IDAC_MANUAL_CONTROL_BIT_MASK 0x80 |
Definition at line 165 of file mxl111sf-reg.h.
| #define IRQ_MASK_FEC_LOCK 0x10 |
Definition at line 35 of file mxl111sf-reg.h.
| #define MPEG_SER_MSB_FIRST_ENABLED 0x01 |
Definition at line 96 of file mxl111sf-reg.h.
| #define MXL_111SF_GPO_0_MASK 0x01 |
Definition at line 148 of file mxl111sf-reg.h.
| #define MXL_111SF_GPO_1 0x00 |
Definition at line 140 of file mxl111sf-reg.h.
| #define MXL_111SF_GPO_1_MASK 0x02 |
Definition at line 149 of file mxl111sf-reg.h.
| #define MXL_111SF_GPO_2 0x01 |
Definition at line 141 of file mxl111sf-reg.h.
| #define MXL_111SF_GPO_2_MASK 0x04 |
Definition at line 150 of file mxl111sf-reg.h.
| #define MXL_111SF_GPO_3 0x02 |
Definition at line 142 of file mxl111sf-reg.h.
| #define MXL_111SF_GPO_3_MASK 0x08 |
Definition at line 151 of file mxl111sf-reg.h.
| #define MXL_111SF_GPO_4 0x03 |
Definition at line 143 of file mxl111sf-reg.h.
| #define MXL_111SF_GPO_4_MASK 0x10 |
Definition at line 152 of file mxl111sf-reg.h.
| #define MXL_111SF_GPO_5 0x04 |
Definition at line 144 of file mxl111sf-reg.h.
| #define MXL_111SF_GPO_5_MASK 0x20 |
Definition at line 153 of file mxl111sf-reg.h.
| #define MXL_111SF_GPO_6 0x05 |
Definition at line 145 of file mxl111sf-reg.h.
| #define MXL_111SF_GPO_6_MASK 0x40 |
Definition at line 154 of file mxl111sf-reg.h.
| #define MXL_111SF_GPO_7 0x06 |
Definition at line 146 of file mxl111sf-reg.h.
| #define MXL_GPO_0 0x00 |
Definition at line 134 of file mxl111sf-reg.h.
| #define MXL_GPO_1 0x01 |
Definition at line 135 of file mxl111sf-reg.h.
| #define MXL_MODE_REG 0x03 |
Definition at line 158 of file mxl111sf-reg.h.
| #define NUM_DIG_TV_CHANNEL 1000 |
Definition at line 121 of file mxl111sf-reg.h.
| #define RS_LOCK_DET_MASK 0x08 |
Definition at line 41 of file mxl111sf-reg.h.
| #define START_TUNE_REG 0x1C |
Definition at line 159 of file mxl111sf-reg.h.
| #define SYNC_LOCK_MASK 0x10 |
Definition at line 38 of file mxl111sf-reg.h.
| #define TOP_CHIP_REV_ID_REG 0xFA |
Definition at line 25 of file mxl111sf-reg.h.
| #define TOTAL_NUM_IF_OUTPUT_FREQ 16 |
Definition at line 111 of file mxl111sf-reg.h.
| #define TSIF_INPUT_PARALLEL 0 |
Definition at line 90 of file mxl111sf-reg.h.
| #define TSIF_INPUT_SERIAL 1 |
Definition at line 91 of file mxl111sf-reg.h.
| #define TSIF_NORMAL 0 |
Definition at line 92 of file mxl111sf-reg.h.
| #define TUNER_INVERT_IF_SPECTRUM 0x10 |
Definition at line 114 of file mxl111sf-reg.h.
| #define TUNER_NORMAL_IF_SPECTRUM 0x0 |
Definition at line 113 of file mxl111sf-reg.h.
| #define V6_111SF_GPO_CTRL_REG 0x19 |
Definition at line 139 of file mxl111sf-reg.h.
| #define V6_656_I2S_BUFF_STATUS_REG 0x2F |
Definition at line 98 of file mxl111sf-reg.h.
| #define V6_656_OVERFLOW_MASK_BIT 0x08 |
Definition at line 99 of file mxl111sf-reg.h.
| #define V6_ATSC_CONFIG_REG 0x0A |
Definition at line 156 of file mxl111sf-reg.h.
| #define V6_CODE_RATE_TPS_MASK 0x07 |
Definition at line 47 of file mxl111sf-reg.h.
| #define V6_CODE_RATE_TPS_REG 0x29 |
Definition at line 46 of file mxl111sf-reg.h.
| #define V6_CP_LOCK_DET_MASK 0x04 |
Definition at line 51 of file mxl111sf-reg.h.
| #define V6_CP_LOCK_DET_REG 0x28 |
Definition at line 50 of file mxl111sf-reg.h.
| #define V6_CP_TPS_REG 0x29 |
Definition at line 63 of file mxl111sf-reg.h.
| #define V6_DIG_CLK_FREQ_SEL_REG 0x07 |
Definition at line 123 of file mxl111sf-reg.h.
| #define V6_DIG_RF_PWR_LSB_REG 0x46 |
Definition at line 170 of file mxl111sf-reg.h.
| #define V6_DIG_RF_PWR_MSB_REG 0x47 |
Definition at line 171 of file mxl111sf-reg.h.
| #define V6_DIG_RFREFSELECT_REG 0x32 |
Definition at line 126 of file mxl111sf-reg.h.
| #define V6_DIG_XTAL_BIAS_REG 0x66 |
Definition at line 130 of file mxl111sf-reg.h.
| #define V6_DIG_XTAL_ENABLE_REG 0x06 |
Definition at line 129 of file mxl111sf-reg.h.
| #define V6_ENABLE_LOOP_THRU 0x01 |
Definition at line 109 of file mxl111sf-reg.h.
| #define V6_ENABLE_PIN_MUX 0x1E |
Definition at line 76 of file mxl111sf-reg.h.
| #define V6_FEC_PER_CLR_MASK 0x01 |
Definition at line 73 of file mxl111sf-reg.h.
| #define V6_FEC_PER_CLR_REG 0x20 |
Definition at line 72 of file mxl111sf-reg.h.
| #define V6_FEC_PER_COUNT_REG 0x2E |
Definition at line 69 of file mxl111sf-reg.h.
| #define V6_FEC_PER_SCALE_MASK 0x03 |
Definition at line 71 of file mxl111sf-reg.h.
| #define V6_FEC_PER_SCALE_REG 0x2B |
Definition at line 70 of file mxl111sf-reg.h.
| #define V6_FORCE_NFFT_CPSIZE_REG 0x20 |
Definition at line 44 of file mxl111sf-reg.h.
| #define V6_GPO_0_MASK 0x10 |
Definition at line 136 of file mxl111sf-reg.h.
| #define V6_GPO_1_MASK 0x20 |
Definition at line 137 of file mxl111sf-reg.h.
| #define V6_GPO_CTRL_REG 0x18 |
Definition at line 133 of file mxl111sf-reg.h.
| #define V6_I2S_NUM_SAMPLES_REG 0x16 |
Definition at line 78 of file mxl111sf-reg.h.
| #define V6_I2S_OVERFLOW_MASK_BIT 0x01 |
Definition at line 100 of file mxl111sf-reg.h.
| #define V6_I2S_STREAM_END_BIT_REG 0x15 |
Definition at line 103 of file mxl111sf-reg.h.
| #define V6_I2S_STREAM_START_BIT_REG 0x14 |
Definition at line 102 of file mxl111sf-reg.h.
| #define V6_IDAC_HYSTERESIS_REG 0x0B |
Definition at line 161 of file mxl111sf-reg.h.
| #define V6_IDAC_SETTINGS_REG 0x0C |
Definition at line 162 of file mxl111sf-reg.h.
| #define V6_INITACQ_NODETECT_REG 0x20 |
Definition at line 43 of file mxl111sf-reg.h.
| #define V6_INVERTED_CLK_PHASE 0x20 |
Definition at line 83 of file mxl111sf-reg.h.
| #define V6_INVERTED_MPEG_SYNC 0x04 |
Definition at line 87 of file mxl111sf-reg.h.
| #define V6_INVERTED_MPEG_VALID 0x08 |
Definition at line 88 of file mxl111sf-reg.h.
| #define V6_IRQ_STATUS_REG 0x24 |
Definition at line 34 of file mxl111sf-reg.h.
| #define V6_MODE_TPS_REG 0x2A |
Definition at line 59 of file mxl111sf-reg.h.
| #define V6_MODORDER_TPS_REG 0x2A |
Definition at line 56 of file mxl111sf-reg.h.
| #define V6_MPEG_IN_CLK_INV_REG 0x17 |
Definition at line 80 of file mxl111sf-reg.h.
| #define V6_MPEG_IN_CTRL_REG 0x18 |
Definition at line 81 of file mxl111sf-reg.h.
| #define V6_MPEG_IN_DATA_PARALLEL 0x01 |
Definition at line 84 of file mxl111sf-reg.h.
| #define V6_MPEG_IN_DATA_SERIAL 0x02 |
Definition at line 85 of file mxl111sf-reg.h.
| #define V6_MPEG_INOUT_BIT_ORDER_CTRL_REG 0x19 |
Definition at line 94 of file mxl111sf-reg.h.
| #define V6_MPEG_SER_MSB_FIRST 0x80 |
Definition at line 95 of file mxl111sf-reg.h.
| #define V6_N_ACCUMULATE_REG 0x11 |
Definition at line 30 of file mxl111sf-reg.h.
| #define V6_PARAM_CONSTELLATION_MASK 0x30 |
Definition at line 57 of file mxl111sf-reg.h.
| #define V6_PARAM_FFT_MODE_MASK 0x0C |
Definition at line 60 of file mxl111sf-reg.h.
| #define V6_PARAM_GI_MASK 0x30 |
Definition at line 64 of file mxl111sf-reg.h.
| #define V6_PARAM_TPS_LOCK_MASK 0x40 |
Definition at line 67 of file mxl111sf-reg.h.
| #define V6_PIN_MUX_MODE_REG 0x1B |
Definition at line 75 of file mxl111sf-reg.h.
| #define V6_REF_SYNTH_INT_REG 0x5C |
Definition at line 124 of file mxl111sf-reg.h.
| #define V6_REF_SYNTH_REMAIN_REG 0x58 |
Definition at line 125 of file mxl111sf-reg.h.
| #define V6_RF_LOCK_STATUS_REG 0x23 |
Definition at line 119 of file mxl111sf-reg.h.
| #define V6_RS_AVG_ERRORS_LSB_REG 0x2C |
Definition at line 31 of file mxl111sf-reg.h.
| #define V6_RS_AVG_ERRORS_MSB_REG 0x2D |
Definition at line 32 of file mxl111sf-reg.h.
| #define V6_RS_LOCK_DET_REG 0x28 |
Definition at line 40 of file mxl111sf-reg.h.
| #define V6_SNR_RB_LSB_REG 0x27 |
Definition at line 27 of file mxl111sf-reg.h.
| #define V6_SNR_RB_MSB_REG 0x28 |
Definition at line 28 of file mxl111sf-reg.h.
| #define V6_SYNC_LOCK_REG 0x28 |
Definition at line 37 of file mxl111sf-reg.h.
| #define V6_TPS_HIERACHY_REG 0x29 |
Definition at line 53 of file mxl111sf-reg.h.
| #define V6_TPS_HIERARCHY_INFO_MASK 0x40 |
Definition at line 54 of file mxl111sf-reg.h.
| #define V6_TPS_LOCK_REG 0x2A |
Definition at line 66 of file mxl111sf-reg.h.
| #define V6_TUNER_IF_FCW_BYP_REG 0x3D |
Definition at line 118 of file mxl111sf-reg.h.
| #define V6_TUNER_IF_FCW_REG 0x3C |
Definition at line 117 of file mxl111sf-reg.h.
| #define V6_TUNER_IF_SEL_REG 0x06 |
Definition at line 116 of file mxl111sf-reg.h.
| #define V6_TUNER_LOOP_THRU_CONTROL_REG 0x09 |
Definition at line 108 of file mxl111sf-reg.h.
| #define V6_TUNER_LOOP_THRU_CTRL_REG 0x09 |
Definition at line 128 of file mxl111sf-reg.h.
| #define V6_XTAL_CAP_REG 0x08 |
Definition at line 131 of file mxl111sf-reg.h.
| #define V6_XTAL_CLK_OUT_GAIN_REG 0x31 |
Definition at line 127 of file mxl111sf-reg.h.
| #define V8_SPI_MODE_REG 0xE9 |
Definition at line 168 of file mxl111sf-reg.h.
1.8.2