#include <linux/io.h>
#include <asm/mach-types.h>
#include <mach/digctl.h>
#include <mach/hardware.h>

Macros
#define	MXS_IO_BASE_ADDR 0x80000000

#define	MXS_IO_SIZE SZ_1M

#define	MXS_ICOLL_BASE_ADDR (MXS_IO_BASE_ADDR + 0x000000)

#define	MXS_APBH_DMA_BASE_ADDR (MXS_IO_BASE_ADDR + 0x004000)

#define	MXS_BCH_BASE_ADDR (MXS_IO_BASE_ADDR + 0x00a000)

#define	MXS_GPMI_BASE_ADDR (MXS_IO_BASE_ADDR + 0x00c000)

#define	MXS_PINCTRL_BASE_ADDR (MXS_IO_BASE_ADDR + 0x018000)

#define	MXS_DIGCTL_BASE_ADDR (MXS_IO_BASE_ADDR + 0x01c000)

#define	MXS_APBX_DMA_BASE_ADDR (MXS_IO_BASE_ADDR + 0x024000)

#define	MXS_DCP_BASE_ADDR (MXS_IO_BASE_ADDR + 0x028000)

#define	MXS_PXP_BASE_ADDR (MXS_IO_BASE_ADDR + 0x02a000)

#define	MXS_OCOTP_BASE_ADDR (MXS_IO_BASE_ADDR + 0x02c000)

#define	MXS_AXI_AHB0_BASE_ADDR (MXS_IO_BASE_ADDR + 0x02e000)

#define	MXS_LCDIF_BASE_ADDR (MXS_IO_BASE_ADDR + 0x030000)

#define	MXS_CLKCTRL_BASE_ADDR (MXS_IO_BASE_ADDR + 0x040000)

#define	MXS_SAIF0_BASE_ADDR (MXS_IO_BASE_ADDR + 0x042000)

#define	MXS_POWER_BASE_ADDR (MXS_IO_BASE_ADDR + 0x044000)

#define	MXS_SAIF1_BASE_ADDR (MXS_IO_BASE_ADDR + 0x046000)

#define	MXS_LRADC_BASE_ADDR (MXS_IO_BASE_ADDR + 0x050000)

#define	MXS_SPDIF_BASE_ADDR (MXS_IO_BASE_ADDR + 0x054000)

#define	MXS_I2C0_BASE_ADDR (MXS_IO_BASE_ADDR + 0x058000)

#define	MXS_PWM_BASE_ADDR (MXS_IO_BASE_ADDR + 0x064000)

#define	MXS_TIMROT_BASE_ADDR (MXS_IO_BASE_ADDR + 0x068000)

#define	MXS_AUART1_BASE_ADDR (MXS_IO_BASE_ADDR + 0x06c000)

#define	MXS_AUART2_BASE_ADDR (MXS_IO_BASE_ADDR + 0x06e000)

#define	MXS_DRAM_BASE_ADDR (MXS_IO_BASE_ADDR + 0x0e0000)

#define	MXS_IO_P2V(x)

#define	MXS_IO_ADDRESS(x) IOMEM(MXS_IO_P2V(x))

#define	mxs_map_entry(soc, name, _type)

#define	MXS_GPIO_NR(bank, nr) ((bank) * 32 + (nr))

#define	MXS_SET_ADDR 0x4

#define	MXS_CLR_ADDR 0x8

#define	MXS_TOG_ADDR 0xc

#define	MXS_CHIPID (MXS_IO_ADDRESS(MXS_DIGCTL_BASE_ADDR) + HW_DIGCTL_CHIPID)

Macro Definition Documentation

#define MXS_APBH_DMA_BASE_ADDR (MXS_IO_BASE_ADDR + 0x004000)

Definition at line 36 of file mxs.h.

#define MXS_APBX_DMA_BASE_ADDR (MXS_IO_BASE_ADDR + 0x024000)

Definition at line 41 of file mxs.h.

#define MXS_AUART1_BASE_ADDR (MXS_IO_BASE_ADDR + 0x06c000)

Definition at line 56 of file mxs.h.

#define MXS_AUART2_BASE_ADDR (MXS_IO_BASE_ADDR + 0x06e000)

Definition at line 57 of file mxs.h.

#define MXS_AXI_AHB0_BASE_ADDR (MXS_IO_BASE_ADDR + 0x02e000)

Definition at line 45 of file mxs.h.

#define MXS_BCH_BASE_ADDR (MXS_IO_BASE_ADDR + 0x00a000)

Definition at line 37 of file mxs.h.

#define MXS_CHIPID (MXS_IO_ADDRESS(MXS_DIGCTL_BASE_ADDR) + HW_DIGCTL_CHIPID)

Definition at line 104 of file mxs.h.

#define MXS_CLKCTRL_BASE_ADDR (MXS_IO_BASE_ADDR + 0x040000)

Definition at line 47 of file mxs.h.

#define MXS_CLR_ADDR 0x8

Definition at line 82 of file mxs.h.

#define MXS_DCP_BASE_ADDR (MXS_IO_BASE_ADDR + 0x028000)

Definition at line 42 of file mxs.h.

#define MXS_DIGCTL_BASE_ADDR (MXS_IO_BASE_ADDR + 0x01c000)

Definition at line 40 of file mxs.h.

#define MXS_DRAM_BASE_ADDR (MXS_IO_BASE_ADDR + 0x0e0000)

Definition at line 58 of file mxs.h.

#define MXS_GPIO_NR	(	bank,
		nr
	)	((bank) * 32 + (nr))

Definition at line 79 of file mxs.h.

#define MXS_GPMI_BASE_ADDR (MXS_IO_BASE_ADDR + 0x00c000)

Definition at line 38 of file mxs.h.

#define MXS_I2C0_BASE_ADDR (MXS_IO_BASE_ADDR + 0x058000)

Definition at line 53 of file mxs.h.

#define MXS_ICOLL_BASE_ADDR (MXS_IO_BASE_ADDR + 0x000000)

Definition at line 35 of file mxs.h.

#define MXS_IO_ADDRESS ( x ) IOMEM(MXS_IO_P2V(x))

Definition at line 70 of file mxs.h.

#define MXS_IO_BASE_ADDR 0x80000000

Definition at line 32 of file mxs.h.

#define MXS_IO_P2V ( x )

Value:

(0xf4000000 +                   \
            (((x) & 0x80000000) >> 7) +         \
            (((x) & 0x000fffff)))

Definition at line 66 of file mxs.h.

#define MXS_IO_SIZE SZ_1M

Definition at line 33 of file mxs.h.

#define MXS_LCDIF_BASE_ADDR (MXS_IO_BASE_ADDR + 0x030000)

Definition at line 46 of file mxs.h.

#define MXS_LRADC_BASE_ADDR (MXS_IO_BASE_ADDR + 0x050000)

Definition at line 51 of file mxs.h.

#define mxs_map_entry	(	soc,
		name,
		_type
	)

Value:

{               \
    .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR),  \
    .pfn = __phys_to_pfn(soc ## _ ## name ## _BASE_ADDR),       \
    .length = soc ## _ ## name ## _SIZE,                \
    .type = _type,                          \
}

Definition at line 72 of file mxs.h.

#define MXS_OCOTP_BASE_ADDR (MXS_IO_BASE_ADDR + 0x02c000)

Definition at line 44 of file mxs.h.

#define MXS_PINCTRL_BASE_ADDR (MXS_IO_BASE_ADDR + 0x018000)

Definition at line 39 of file mxs.h.

#define MXS_POWER_BASE_ADDR (MXS_IO_BASE_ADDR + 0x044000)

Definition at line 49 of file mxs.h.

#define MXS_PWM_BASE_ADDR (MXS_IO_BASE_ADDR + 0x064000)

Definition at line 54 of file mxs.h.

#define MXS_PXP_BASE_ADDR (MXS_IO_BASE_ADDR + 0x02a000)

Definition at line 43 of file mxs.h.

#define MXS_SAIF0_BASE_ADDR (MXS_IO_BASE_ADDR + 0x042000)

Definition at line 48 of file mxs.h.

#define MXS_SAIF1_BASE_ADDR (MXS_IO_BASE_ADDR + 0x046000)

Definition at line 50 of file mxs.h.

#define MXS_SET_ADDR 0x4

Definition at line 81 of file mxs.h.

#define MXS_SPDIF_BASE_ADDR (MXS_IO_BASE_ADDR + 0x054000)

Definition at line 52 of file mxs.h.

#define MXS_TIMROT_BASE_ADDR (MXS_IO_BASE_ADDR + 0x068000)

Definition at line 55 of file mxs.h.

#define MXS_TOG_ADDR 0xc

Definition at line 83 of file mxs.h.

Macros

Macro Definition Documentation