bridge.h File Reference

Go to the source code of this file.

Macros
#define	BRIDGE_MODE   0x00
	Basic definitions of XLP memory and io subsystem.
#define	BRIDGE_PCI_CFG_BASE   0x01
#define	BRIDGE_PCI_CFG_LIMIT   0x02
#define	BRIDGE_PCIE_CFG_BASE   0x03
#define	BRIDGE_PCIE_CFG_LIMIT   0x04
#define	BRIDGE_BUSNUM_BAR0   0x05
#define	BRIDGE_BUSNUM_BAR1   0x06
#define	BRIDGE_BUSNUM_BAR2   0x07
#define	BRIDGE_BUSNUM_BAR3   0x08
#define	BRIDGE_BUSNUM_BAR4   0x09
#define	BRIDGE_BUSNUM_BAR5   0x0a
#define	BRIDGE_BUSNUM_BAR6   0x0b
#define	BRIDGE_FLASH_BAR0   0x0c
#define	BRIDGE_FLASH_BAR1   0x0d
#define	BRIDGE_FLASH_BAR2   0x0e
#define	BRIDGE_FLASH_BAR3   0x0f
#define	BRIDGE_FLASH_LIMIT0   0x10
#define	BRIDGE_FLASH_LIMIT1   0x11
#define	BRIDGE_FLASH_LIMIT2   0x12
#define	BRIDGE_FLASH_LIMIT3   0x13
#define	BRIDGE_DRAM_BAR(i)   (0x14 + (i))
#define	BRIDGE_DRAM_BAR0   0x14
#define	BRIDGE_DRAM_BAR1   0x15
#define	BRIDGE_DRAM_BAR2   0x16
#define	BRIDGE_DRAM_BAR3   0x17
#define	BRIDGE_DRAM_BAR4   0x18
#define	BRIDGE_DRAM_BAR5   0x19
#define	BRIDGE_DRAM_BAR6   0x1a
#define	BRIDGE_DRAM_BAR7   0x1b
#define	BRIDGE_DRAM_LIMIT(i)   (0x1c + (i))
#define	BRIDGE_DRAM_LIMIT0   0x1c
#define	BRIDGE_DRAM_LIMIT1   0x1d
#define	BRIDGE_DRAM_LIMIT2   0x1e
#define	BRIDGE_DRAM_LIMIT3   0x1f
#define	BRIDGE_DRAM_LIMIT4   0x20
#define	BRIDGE_DRAM_LIMIT5   0x21
#define	BRIDGE_DRAM_LIMIT6   0x22
#define	BRIDGE_DRAM_LIMIT7   0x23
#define	BRIDGE_DRAM_NODE_TRANSLN0   0x24
#define	BRIDGE_DRAM_NODE_TRANSLN1   0x25
#define	BRIDGE_DRAM_NODE_TRANSLN2   0x26
#define	BRIDGE_DRAM_NODE_TRANSLN3   0x27
#define	BRIDGE_DRAM_NODE_TRANSLN4   0x28
#define	BRIDGE_DRAM_NODE_TRANSLN5   0x29
#define	BRIDGE_DRAM_NODE_TRANSLN6   0x2a
#define	BRIDGE_DRAM_NODE_TRANSLN7   0x2b
#define	BRIDGE_DRAM_CHNL_TRANSLN0   0x2c
#define	BRIDGE_DRAM_CHNL_TRANSLN1   0x2d
#define	BRIDGE_DRAM_CHNL_TRANSLN2   0x2e
#define	BRIDGE_DRAM_CHNL_TRANSLN3   0x2f
#define	BRIDGE_DRAM_CHNL_TRANSLN4   0x30
#define	BRIDGE_DRAM_CHNL_TRANSLN5   0x31
#define	BRIDGE_DRAM_CHNL_TRANSLN6   0x32
#define	BRIDGE_DRAM_CHNL_TRANSLN7   0x33
#define	BRIDGE_PCIEMEM_BASE0   0x34
#define	BRIDGE_PCIEMEM_BASE1   0x35
#define	BRIDGE_PCIEMEM_BASE2   0x36
#define	BRIDGE_PCIEMEM_BASE3   0x37
#define	BRIDGE_PCIEMEM_LIMIT0   0x38
#define	BRIDGE_PCIEMEM_LIMIT1   0x39
#define	BRIDGE_PCIEMEM_LIMIT2   0x3a
#define	BRIDGE_PCIEMEM_LIMIT3   0x3b
#define	BRIDGE_PCIEIO_BASE0   0x3c
#define	BRIDGE_PCIEIO_BASE1   0x3d
#define	BRIDGE_PCIEIO_BASE2   0x3e
#define	BRIDGE_PCIEIO_BASE3   0x3f
#define	BRIDGE_PCIEIO_LIMIT0   0x40
#define	BRIDGE_PCIEIO_LIMIT1   0x41
#define	BRIDGE_PCIEIO_LIMIT2   0x42
#define	BRIDGE_PCIEIO_LIMIT3   0x43
#define	BRIDGE_PCIEMEM_BASE4   0x44
#define	BRIDGE_PCIEMEM_BASE5   0x45
#define	BRIDGE_PCIEMEM_BASE6   0x46
#define	BRIDGE_PCIEMEM_LIMIT4   0x47
#define	BRIDGE_PCIEMEM_LIMIT5   0x48
#define	BRIDGE_PCIEMEM_LIMIT6   0x49
#define	BRIDGE_PCIEIO_BASE4   0x4a
#define	BRIDGE_PCIEIO_BASE5   0x4b
#define	BRIDGE_PCIEIO_BASE6   0x4c
#define	BRIDGE_PCIEIO_LIMIT4   0x4d
#define	BRIDGE_PCIEIO_LIMIT5   0x4e
#define	BRIDGE_PCIEIO_LIMIT6   0x4f
#define	BRIDGE_NBU_EVENT_CNT_CTL   0x50
#define	BRIDGE_EVNTCTR1_LOW   0x51
#define	BRIDGE_EVNTCTR1_HI   0x52
#define	BRIDGE_EVNT_CNT_CTL2   0x53
#define	BRIDGE_EVNTCTR2_LOW   0x54
#define	BRIDGE_EVNTCTR2_HI   0x55
#define	BRIDGE_TRACEBUF_MATCH0   0x56
#define	BRIDGE_TRACEBUF_MATCH1   0x57
#define	BRIDGE_TRACEBUF_MATCH_LOW   0x58
#define	BRIDGE_TRACEBUF_MATCH_HI   0x59
#define	BRIDGE_TRACEBUF_CTRL   0x5a
#define	BRIDGE_TRACEBUF_INIT   0x5b
#define	BRIDGE_TRACEBUF_ACCESS   0x5c
#define	BRIDGE_TRACEBUF_READ_DATA0   0x5d
#define	BRIDGE_TRACEBUF_READ_DATA1   0x5d
#define	BRIDGE_TRACEBUF_READ_DATA2   0x5f
#define	BRIDGE_TRACEBUF_READ_DATA3   0x60
#define	BRIDGE_TRACEBUF_STATUS   0x61
#define	BRIDGE_ADDRESS_ERROR0   0x62
#define	BRIDGE_ADDRESS_ERROR1   0x63
#define	BRIDGE_ADDRESS_ERROR2   0x64
#define	BRIDGE_TAG_ECC_ADDR_ERROR0   0x65
#define	BRIDGE_TAG_ECC_ADDR_ERROR1   0x66
#define	BRIDGE_TAG_ECC_ADDR_ERROR2   0x67
#define	BRIDGE_LINE_FLUSH0   0x68
#define	BRIDGE_LINE_FLUSH1   0x69
#define	BRIDGE_NODE_ID   0x6a
#define	BRIDGE_ERROR_INTERRUPT_EN   0x6b
#define	BRIDGE_PCIE0_WEIGHT   0x2c0
#define	BRIDGE_PCIE1_WEIGHT   0x2c1
#define	BRIDGE_PCIE2_WEIGHT   0x2c2
#define	BRIDGE_PCIE3_WEIGHT   0x2c3
#define	BRIDGE_USB_WEIGHT   0x2c4
#define	BRIDGE_NET_WEIGHT   0x2c5
#define	BRIDGE_POE_WEIGHT   0x2c6
#define	BRIDGE_CMS_WEIGHT   0x2c7
#define	BRIDGE_DMAENG_WEIGHT   0x2c8
#define	BRIDGE_SEC_WEIGHT   0x2c9
#define	BRIDGE_COMP_WEIGHT   0x2ca
#define	BRIDGE_GIO_WEIGHT   0x2cb
#define	BRIDGE_FLASH_WEIGHT   0x2cc
#define	nlm_read_bridge_reg(b, r)   nlm_read_reg(b, r)
#define	nlm_write_bridge_reg(b, r, v)   nlm_write_reg(b, r, v)
#define	nlm_get_bridge_pcibase(node)   nlm_pcicfg_base(XLP_IO_BRIDGE_OFFSET(node))
#define	nlm_get_bridge_regbase(node)   (nlm_get_bridge_pcibase(node) + XLP_IO_PCI_HDRSZ)

Macro Definition Documentation

#define BRIDGE_ADDRESS_ERROR0   0x62

Definition at line 153 of file bridge.h.

#define BRIDGE_ADDRESS_ERROR1   0x63

Definition at line 154 of file bridge.h.

#define BRIDGE_ADDRESS_ERROR2   0x64

Definition at line 155 of file bridge.h.

#define BRIDGE_BUSNUM_BAR0   0x05

Definition at line 55 of file bridge.h.

#define BRIDGE_BUSNUM_BAR1   0x06

Definition at line 56 of file bridge.h.

#define BRIDGE_BUSNUM_BAR2   0x07

Definition at line 57 of file bridge.h.

#define BRIDGE_BUSNUM_BAR3   0x08

Definition at line 58 of file bridge.h.

#define BRIDGE_BUSNUM_BAR4   0x09

Definition at line 59 of file bridge.h.

#define BRIDGE_BUSNUM_BAR5   0x0a

Definition at line 60 of file bridge.h.

#define BRIDGE_BUSNUM_BAR6   0x0b

Definition at line 61 of file bridge.h.

#define BRIDGE_CMS_WEIGHT   0x2c7

Definition at line 170 of file bridge.h.

#define BRIDGE_COMP_WEIGHT   0x2ca

Definition at line 173 of file bridge.h.

#define BRIDGE_DMAENG_WEIGHT   0x2c8

Definition at line 171 of file bridge.h.

#define BRIDGE_DRAM_BAR

(

i

)

(0x14 + (i))

Definition at line 71 of file bridge.h.

#define BRIDGE_DRAM_BAR0   0x14

Definition at line 72 of file bridge.h.

#define BRIDGE_DRAM_BAR1   0x15

Definition at line 73 of file bridge.h.

#define BRIDGE_DRAM_BAR2   0x16

Definition at line 74 of file bridge.h.

#define BRIDGE_DRAM_BAR3   0x17

Definition at line 75 of file bridge.h.

#define BRIDGE_DRAM_BAR4   0x18

Definition at line 76 of file bridge.h.

#define BRIDGE_DRAM_BAR5   0x19

Definition at line 77 of file bridge.h.

#define BRIDGE_DRAM_BAR6   0x1a

Definition at line 78 of file bridge.h.

#define BRIDGE_DRAM_BAR7   0x1b

Definition at line 79 of file bridge.h.

#define BRIDGE_DRAM_CHNL_TRANSLN0   0x2c

Definition at line 99 of file bridge.h.

#define BRIDGE_DRAM_CHNL_TRANSLN1   0x2d

Definition at line 100 of file bridge.h.

#define BRIDGE_DRAM_CHNL_TRANSLN2   0x2e

Definition at line 101 of file bridge.h.

#define BRIDGE_DRAM_CHNL_TRANSLN3   0x2f

Definition at line 102 of file bridge.h.

#define BRIDGE_DRAM_CHNL_TRANSLN4   0x30

Definition at line 103 of file bridge.h.

#define BRIDGE_DRAM_CHNL_TRANSLN5   0x31

Definition at line 104 of file bridge.h.

#define BRIDGE_DRAM_CHNL_TRANSLN6   0x32

Definition at line 105 of file bridge.h.

#define BRIDGE_DRAM_CHNL_TRANSLN7   0x33

Definition at line 106 of file bridge.h.

#define BRIDGE_DRAM_LIMIT

(

i

)

(0x1c + (i))

Definition at line 81 of file bridge.h.

#define BRIDGE_DRAM_LIMIT0   0x1c

Definition at line 82 of file bridge.h.

#define BRIDGE_DRAM_LIMIT1   0x1d

Definition at line 83 of file bridge.h.

#define BRIDGE_DRAM_LIMIT2   0x1e

Definition at line 84 of file bridge.h.

#define BRIDGE_DRAM_LIMIT3   0x1f

Definition at line 85 of file bridge.h.

#define BRIDGE_DRAM_LIMIT4   0x20

Definition at line 86 of file bridge.h.

#define BRIDGE_DRAM_LIMIT5   0x21

Definition at line 87 of file bridge.h.

#define BRIDGE_DRAM_LIMIT6   0x22

Definition at line 88 of file bridge.h.

#define BRIDGE_DRAM_LIMIT7   0x23

Definition at line 89 of file bridge.h.

#define BRIDGE_DRAM_NODE_TRANSLN0   0x24

Definition at line 91 of file bridge.h.

#define BRIDGE_DRAM_NODE_TRANSLN1   0x25

Definition at line 92 of file bridge.h.

#define BRIDGE_DRAM_NODE_TRANSLN2   0x26

Definition at line 93 of file bridge.h.

#define BRIDGE_DRAM_NODE_TRANSLN3   0x27

Definition at line 94 of file bridge.h.

#define BRIDGE_DRAM_NODE_TRANSLN4   0x28

Definition at line 95 of file bridge.h.

#define BRIDGE_DRAM_NODE_TRANSLN5   0x29

Definition at line 96 of file bridge.h.

#define BRIDGE_DRAM_NODE_TRANSLN6   0x2a

Definition at line 97 of file bridge.h.

#define BRIDGE_DRAM_NODE_TRANSLN7   0x2b

Definition at line 98 of file bridge.h.

#define BRIDGE_ERROR_INTERRUPT_EN   0x6b

Definition at line 162 of file bridge.h.

#define BRIDGE_EVNT_CNT_CTL2   0x53

Definition at line 138 of file bridge.h.

#define BRIDGE_EVNTCTR1_HI   0x52

Definition at line 137 of file bridge.h.

#define BRIDGE_EVNTCTR1_LOW   0x51

Definition at line 136 of file bridge.h.

#define BRIDGE_EVNTCTR2_HI   0x55

Definition at line 140 of file bridge.h.

#define BRIDGE_EVNTCTR2_LOW   0x54

Definition at line 139 of file bridge.h.

#define BRIDGE_FLASH_BAR0   0x0c

Definition at line 62 of file bridge.h.

#define BRIDGE_FLASH_BAR1   0x0d

Definition at line 63 of file bridge.h.

#define BRIDGE_FLASH_BAR2   0x0e

Definition at line 64 of file bridge.h.

#define BRIDGE_FLASH_BAR3   0x0f

Definition at line 65 of file bridge.h.

#define BRIDGE_FLASH_LIMIT0   0x10

Definition at line 66 of file bridge.h.

#define BRIDGE_FLASH_LIMIT1   0x11

Definition at line 67 of file bridge.h.

#define BRIDGE_FLASH_LIMIT2   0x12

Definition at line 68 of file bridge.h.

#define BRIDGE_FLASH_LIMIT3   0x13

Definition at line 69 of file bridge.h.

#define BRIDGE_FLASH_WEIGHT   0x2cc

Definition at line 175 of file bridge.h.

#define BRIDGE_GIO_WEIGHT   0x2cb

Definition at line 174 of file bridge.h.

#define BRIDGE_LINE_FLUSH0   0x68

Definition at line 159 of file bridge.h.

#define BRIDGE_LINE_FLUSH1   0x69

Definition at line 160 of file bridge.h.

#define BRIDGE_MODE   0x00

Basic definitions of XLP memory and io subsystem.

mio.h

Author

Netlogic Microsystems

Definition at line 50 of file bridge.h.

#define BRIDGE_NBU_EVENT_CNT_CTL   0x50

Definition at line 135 of file bridge.h.

#define BRIDGE_NET_WEIGHT   0x2c5

Definition at line 168 of file bridge.h.

#define BRIDGE_NODE_ID   0x6a

Definition at line 161 of file bridge.h.

#define BRIDGE_PCI_CFG_BASE   0x01

Definition at line 51 of file bridge.h.

#define BRIDGE_PCI_CFG_LIMIT   0x02

Definition at line 52 of file bridge.h.

#define BRIDGE_PCIE0_WEIGHT   0x2c0

Definition at line 163 of file bridge.h.

#define BRIDGE_PCIE1_WEIGHT   0x2c1

Definition at line 164 of file bridge.h.

#define BRIDGE_PCIE2_WEIGHT   0x2c2

Definition at line 165 of file bridge.h.

#define BRIDGE_PCIE3_WEIGHT   0x2c3

Definition at line 166 of file bridge.h.

#define BRIDGE_PCIE_CFG_BASE   0x03

Definition at line 53 of file bridge.h.

#define BRIDGE_PCIE_CFG_LIMIT   0x04

Definition at line 54 of file bridge.h.

#define BRIDGE_PCIEIO_BASE0   0x3c

Definition at line 115 of file bridge.h.

#define BRIDGE_PCIEIO_BASE1   0x3d

Definition at line 116 of file bridge.h.

#define BRIDGE_PCIEIO_BASE2   0x3e

Definition at line 117 of file bridge.h.

#define BRIDGE_PCIEIO_BASE3   0x3f

Definition at line 118 of file bridge.h.

#define BRIDGE_PCIEIO_BASE4   0x4a

Definition at line 129 of file bridge.h.

#define BRIDGE_PCIEIO_BASE5   0x4b

Definition at line 130 of file bridge.h.

#define BRIDGE_PCIEIO_BASE6   0x4c

Definition at line 131 of file bridge.h.

#define BRIDGE_PCIEIO_LIMIT0   0x40

Definition at line 119 of file bridge.h.

#define BRIDGE_PCIEIO_LIMIT1   0x41

Definition at line 120 of file bridge.h.

#define BRIDGE_PCIEIO_LIMIT2   0x42

Definition at line 121 of file bridge.h.

#define BRIDGE_PCIEIO_LIMIT3   0x43

Definition at line 122 of file bridge.h.

#define BRIDGE_PCIEIO_LIMIT4   0x4d

Definition at line 132 of file bridge.h.

#define BRIDGE_PCIEIO_LIMIT5   0x4e

Definition at line 133 of file bridge.h.

#define BRIDGE_PCIEIO_LIMIT6   0x4f

Definition at line 134 of file bridge.h.

#define BRIDGE_PCIEMEM_BASE0   0x34

Definition at line 107 of file bridge.h.

#define BRIDGE_PCIEMEM_BASE1   0x35

Definition at line 108 of file bridge.h.

#define BRIDGE_PCIEMEM_BASE2   0x36

Definition at line 109 of file bridge.h.

#define BRIDGE_PCIEMEM_BASE3   0x37

Definition at line 110 of file bridge.h.

#define BRIDGE_PCIEMEM_BASE4   0x44

Definition at line 123 of file bridge.h.

#define BRIDGE_PCIEMEM_BASE5   0x45

Definition at line 124 of file bridge.h.

#define BRIDGE_PCIEMEM_BASE6   0x46

Definition at line 125 of file bridge.h.

#define BRIDGE_PCIEMEM_LIMIT0   0x38

Definition at line 111 of file bridge.h.

#define BRIDGE_PCIEMEM_LIMIT1   0x39

Definition at line 112 of file bridge.h.

#define BRIDGE_PCIEMEM_LIMIT2   0x3a

Definition at line 113 of file bridge.h.

#define BRIDGE_PCIEMEM_LIMIT3   0x3b

Definition at line 114 of file bridge.h.

#define BRIDGE_PCIEMEM_LIMIT4   0x47

Definition at line 126 of file bridge.h.

#define BRIDGE_PCIEMEM_LIMIT5   0x48

Definition at line 127 of file bridge.h.

#define BRIDGE_PCIEMEM_LIMIT6   0x49

Definition at line 128 of file bridge.h.

#define BRIDGE_POE_WEIGHT   0x2c6

Definition at line 169 of file bridge.h.

#define BRIDGE_SEC_WEIGHT   0x2c9

Definition at line 172 of file bridge.h.

#define BRIDGE_TAG_ECC_ADDR_ERROR0   0x65

Definition at line 156 of file bridge.h.

#define BRIDGE_TAG_ECC_ADDR_ERROR1   0x66

Definition at line 157 of file bridge.h.

#define BRIDGE_TAG_ECC_ADDR_ERROR2   0x67

Definition at line 158 of file bridge.h.

#define BRIDGE_TRACEBUF_ACCESS   0x5c

Definition at line 147 of file bridge.h.

#define BRIDGE_TRACEBUF_CTRL   0x5a

Definition at line 145 of file bridge.h.

#define BRIDGE_TRACEBUF_INIT   0x5b

Definition at line 146 of file bridge.h.

#define BRIDGE_TRACEBUF_MATCH0   0x56

Definition at line 141 of file bridge.h.

#define BRIDGE_TRACEBUF_MATCH1   0x57

Definition at line 142 of file bridge.h.

#define BRIDGE_TRACEBUF_MATCH_HI   0x59

Definition at line 144 of file bridge.h.

#define BRIDGE_TRACEBUF_MATCH_LOW   0x58

Definition at line 143 of file bridge.h.

#define BRIDGE_TRACEBUF_READ_DATA0   0x5d

Definition at line 148 of file bridge.h.

#define BRIDGE_TRACEBUF_READ_DATA1   0x5d

Definition at line 149 of file bridge.h.

#define BRIDGE_TRACEBUF_READ_DATA2   0x5f

Definition at line 150 of file bridge.h.

#define BRIDGE_TRACEBUF_READ_DATA3   0x60

Definition at line 151 of file bridge.h.

#define BRIDGE_TRACEBUF_STATUS   0x61

Definition at line 152 of file bridge.h.

#define BRIDGE_USB_WEIGHT   0x2c4

Definition at line 167 of file bridge.h.

#define nlm_get_bridge_pcibase

(

node

)

nlm_pcicfg_base(XLP_IO_BRIDGE_OFFSET(node))

Definition at line 181 of file bridge.h.

#define nlm_get_bridge_regbase

(

node

)

(nlm_get_bridge_pcibase(node) + XLP_IO_PCI_HDRSZ)

Definition at line 183 of file bridge.h.

#define nlm_read_bridge_reg	(		b,
			r
	)		nlm_read_reg(b, r)

Definition at line 179 of file bridge.h.

#define nlm_write_bridge_reg	(		b,
			r,
			v
	)		nlm_write_reg(b, r, v)

Definition at line 180 of file bridge.h.