Macros
#define	CAYMAN_MAX_SH_GPRS 256

#define	CAYMAN_MAX_TEMP_GPRS 16

#define	CAYMAN_MAX_SH_THREADS 256

#define	CAYMAN_MAX_SH_STACK_ENTRIES 4096

#define	CAYMAN_MAX_FRC_EOV_CNT 16384

#define	CAYMAN_MAX_BACKENDS 8

#define	CAYMAN_MAX_BACKENDS_MASK 0xFF

#define	CAYMAN_MAX_BACKENDS_PER_SE_MASK 0xF

#define	CAYMAN_MAX_SIMDS 16

#define	CAYMAN_MAX_SIMDS_MASK 0xFFFF

#define	CAYMAN_MAX_SIMDS_PER_SE_MASK 0xFFF

#define	CAYMAN_MAX_PIPES 8

#define	CAYMAN_MAX_PIPES_MASK 0xFF

#define	CAYMAN_MAX_LDS_NUM 0xFFFF

#define	CAYMAN_MAX_TCC 16

#define	CAYMAN_MAX_TCC_MASK 0xFF

#define	CAYMAN_GB_ADDR_CONFIG_GOLDEN 0x02011003

#define	ARUBA_GB_ADDR_CONFIG_GOLDEN 0x12010001

#define	DMIF_ADDR_CONFIG 0xBD4

#define	SRBM_GFX_CNTL 0x0E44

#define	RINGID(x) (((x) & 0x3) << 0)

#define	VMID(x) (((x) & 0x7) << 0)

#define	SRBM_STATUS 0x0E50

#define	VM_CONTEXT0_REQUEST_RESPONSE 0x1470

#define	REQUEST_TYPE(x) (((x) & 0xf) << 0)

#define	RESPONSE_TYPE_MASK 0x000000F0

#define	RESPONSE_TYPE_SHIFT 4

#define	VM_L2_CNTL 0x1400

#define	ENABLE_L2_CACHE (1 << 0)

#define	ENABLE_L2_FRAGMENT_PROCESSING (1 << 1)

#define	ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9)

#define	ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE (1 << 10)

#define	EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 14)

#define	CONTEXT1_IDENTITY_ACCESS_MODE(x) (((x) & 3) << 18)

#define	VM_L2_CNTL2 0x1404

#define	INVALIDATE_ALL_L1_TLBS (1 << 0)

#define	INVALIDATE_L2_CACHE (1 << 1)

#define	VM_L2_CNTL3 0x1408

#define	BANK_SELECT(x) ((x) << 0)

#define	CACHE_UPDATE_MODE(x) ((x) << 6)

#define	L2_CACHE_BIGK_ASSOCIATIVITY (1 << 20)

#define	L2_CACHE_BIGK_FRAGMENT_SIZE(x) ((x) << 15)

#define	VM_L2_STATUS 0x140C

#define	L2_BUSY (1 << 0)

#define	VM_CONTEXT0_CNTL 0x1410

#define	ENABLE_CONTEXT (1 << 0)

#define	PAGE_TABLE_DEPTH(x) (((x) & 3) << 1)

#define	RANGE_PROTECTION_FAULT_ENABLE_DEFAULT (1 << 4)

#define	VM_CONTEXT1_CNTL 0x1414

#define	VM_CONTEXT0_CNTL2 0x1430

#define	VM_CONTEXT1_CNTL2 0x1434

#define	VM_INVALIDATE_REQUEST 0x1478

#define	VM_INVALIDATE_RESPONSE 0x147c

#define	VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR 0x1518

#define	VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR 0x151c

#define	VM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x153C

#define	VM_CONTEXT0_PAGE_TABLE_START_ADDR 0x155C

#define	VM_CONTEXT0_PAGE_TABLE_END_ADDR 0x157C

#define	MC_SHARED_CHMAP 0x2004

#define	NOOFCHAN_SHIFT 12

#define	NOOFCHAN_MASK 0x00003000

#define	MC_SHARED_CHREMAP 0x2008

#define	MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2034

#define	MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2038

#define	MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x203C

#define	MC_VM_MX_L1_TLB_CNTL 0x2064

#define	ENABLE_L1_TLB (1 << 0)

#define	ENABLE_L1_FRAGMENT_PROCESSING (1 << 1)

#define	SYSTEM_ACCESS_MODE_PA_ONLY (0 << 3)

#define	SYSTEM_ACCESS_MODE_USE_SYS_MAP (1 << 3)

#define	SYSTEM_ACCESS_MODE_IN_SYS (2 << 3)

#define	SYSTEM_ACCESS_MODE_NOT_IN_SYS (3 << 3)

#define	SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU (0 << 5)

#define	ENABLE_ADVANCED_DRIVER_MODEL (1 << 6)

#define	FUS_MC_VM_FB_OFFSET 0x2068

#define	MC_SHARED_BLACKOUT_CNTL 0x20ac

#define	MC_ARB_RAMCFG 0x2760

#define	NOOFBANK_SHIFT 0

#define	NOOFBANK_MASK 0x00000003

#define	NOOFRANK_SHIFT 2

#define	NOOFRANK_MASK 0x00000004

#define	NOOFROWS_SHIFT 3

#define	NOOFROWS_MASK 0x00000038

#define	NOOFCOLS_SHIFT 6

#define	NOOFCOLS_MASK 0x000000C0

#define	CHANSIZE_SHIFT 8

#define	CHANSIZE_MASK 0x00000100

#define	BURSTLENGTH_SHIFT 9

#define	BURSTLENGTH_MASK 0x00000200

#define	CHANSIZE_OVERRIDE (1 << 11)

#define	MC_SEQ_SUP_CNTL 0x28c8

#define	RUN_MASK (1 << 0)

#define	MC_SEQ_SUP_PGM 0x28cc

#define	MC_IO_PAD_CNTL_D0 0x29d0

#define	MEM_FALL_OUT_CMD (1 << 8)

#define	MC_SEQ_MISC0 0x2a00

#define	MC_SEQ_MISC0_GDDR5_SHIFT 28

#define	MC_SEQ_MISC0_GDDR5_MASK 0xf0000000

#define	MC_SEQ_MISC0_GDDR5_VALUE 5

#define	MC_SEQ_IO_DEBUG_INDEX 0x2a44

#define	MC_SEQ_IO_DEBUG_DATA 0x2a48

#define	HDP_HOST_PATH_CNTL 0x2C00

#define	HDP_NONSURFACE_BASE 0x2C04

#define	HDP_NONSURFACE_INFO 0x2C08

#define	HDP_NONSURFACE_SIZE 0x2C0C

#define	HDP_ADDR_CONFIG 0x2F48

#define	HDP_MISC_CNTL 0x2F4C

#define	HDP_FLUSH_INVALIDATE_CACHE (1 << 0)

#define	CC_SYS_RB_BACKEND_DISABLE 0x3F88

#define	GC_USER_SYS_RB_BACKEND_DISABLE 0x3F8C

#define	CGTS_SYS_TCC_DISABLE 0x3F90

#define	CGTS_USER_SYS_TCC_DISABLE 0x3F94

#define	RLC_GFX_INDEX 0x3FC4

#define	CONFIG_MEMSIZE 0x5428

#define	HDP_MEM_COHERENCY_FLUSH_CNTL 0x5480

#define	HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0

#define	GRBM_CNTL 0x8000

#define	GRBM_READ_TIMEOUT(x) ((x) << 0)

#define	GRBM_STATUS 0x8010

#define	CMDFIFO_AVAIL_MASK 0x0000000F

#define	RING2_RQ_PENDING (1 << 4)

#define	SRBM_RQ_PENDING (1 << 5)

#define	RING1_RQ_PENDING (1 << 6)

#define	CF_RQ_PENDING (1 << 7)

#define	PF_RQ_PENDING (1 << 8)

#define	GDS_DMA_RQ_PENDING (1 << 9)

#define	GRBM_EE_BUSY (1 << 10)

#define	SX_CLEAN (1 << 11)

#define	DB_CLEAN (1 << 12)

#define	CB_CLEAN (1 << 13)

#define	TA_BUSY (1 << 14)

#define	GDS_BUSY (1 << 15)

#define	VGT_BUSY_NO_DMA (1 << 16)

#define	VGT_BUSY (1 << 17)

#define	IA_BUSY_NO_DMA (1 << 18)

#define	IA_BUSY (1 << 19)

#define	SX_BUSY (1 << 20)

#define	SH_BUSY (1 << 21)

#define	SPI_BUSY (1 << 22)

#define	SC_BUSY (1 << 24)

#define	PA_BUSY (1 << 25)

#define	DB_BUSY (1 << 26)

#define	CP_COHERENCY_BUSY (1 << 28)

#define	CP_BUSY (1 << 29)

#define	CB_BUSY (1 << 30)

#define	GUI_ACTIVE (1 << 31)

#define	GRBM_STATUS_SE0 0x8014

#define	GRBM_STATUS_SE1 0x8018

#define	SE_SX_CLEAN (1 << 0)

#define	SE_DB_CLEAN (1 << 1)

#define	SE_CB_CLEAN (1 << 2)

#define	SE_VGT_BUSY (1 << 23)

#define	SE_PA_BUSY (1 << 24)

#define	SE_TA_BUSY (1 << 25)

#define	SE_SX_BUSY (1 << 26)

#define	SE_SPI_BUSY (1 << 27)

#define	SE_SH_BUSY (1 << 28)

#define	SE_SC_BUSY (1 << 29)

#define	SE_DB_BUSY (1 << 30)

#define	SE_CB_BUSY (1 << 31)

#define	GRBM_SOFT_RESET 0x8020

#define	SOFT_RESET_CP (1 << 0)

#define	SOFT_RESET_CB (1 << 1)

#define	SOFT_RESET_DB (1 << 3)

#define	SOFT_RESET_GDS (1 << 4)

#define	SOFT_RESET_PA (1 << 5)

#define	SOFT_RESET_SC (1 << 6)

#define	SOFT_RESET_SPI (1 << 8)

#define	SOFT_RESET_SH (1 << 9)

#define	SOFT_RESET_SX (1 << 10)

#define	SOFT_RESET_TC (1 << 11)

#define	SOFT_RESET_TA (1 << 12)

#define	SOFT_RESET_VGT (1 << 14)

#define	SOFT_RESET_IA (1 << 15)

#define	GRBM_GFX_INDEX 0x802C

#define	INSTANCE_INDEX(x) ((x) << 0)

#define	SE_INDEX(x) ((x) << 16)

#define	INSTANCE_BROADCAST_WRITES (1 << 30)

#define	SE_BROADCAST_WRITES (1 << 31)

#define	SCRATCH_REG0 0x8500

#define	SCRATCH_REG1 0x8504

#define	SCRATCH_REG2 0x8508

#define	SCRATCH_REG3 0x850C

#define	SCRATCH_REG4 0x8510

#define	SCRATCH_REG5 0x8514

#define	SCRATCH_REG6 0x8518

#define	SCRATCH_REG7 0x851C

#define	SCRATCH_UMSK 0x8540

#define	SCRATCH_ADDR 0x8544

#define	CP_SEM_WAIT_TIMER 0x85BC

#define	CP_SEM_INCOMPLETE_TIMER_CNTL 0x85C8

#define	CP_COHER_CNTL2 0x85E8

#define	CP_STALLED_STAT1 0x8674

#define	CP_STALLED_STAT2 0x8678

#define	CP_BUSY_STAT 0x867C

#define	CP_STAT 0x8680

#define	CP_ME_CNTL 0x86D8

#define	CP_ME_HALT (1 << 28)

#define	CP_PFP_HALT (1 << 26)

#define	CP_RB2_RPTR 0x86f8

#define	CP_RB1_RPTR 0x86fc

#define	CP_RB0_RPTR 0x8700

#define	CP_RB_WPTR_DELAY 0x8704

#define	CP_MEQ_THRESHOLDS 0x8764

#define	MEQ1_START(x) ((x) << 0)

#define	MEQ2_START(x) ((x) << 8)

#define	CP_PERFMON_CNTL 0x87FC

#define	VGT_CACHE_INVALIDATION 0x88C4

#define	CACHE_INVALIDATION(x) ((x) << 0)

#define	VC_ONLY 0

#define	TC_ONLY 1

#define	VC_AND_TC 2

#define	AUTO_INVLD_EN(x) ((x) << 6)

#define	NO_AUTO 0

#define	ES_AUTO 1

#define	GS_AUTO 2

#define	ES_AND_GS_AUTO 3

#define	VGT_GS_VERTEX_REUSE 0x88D4

#define	CC_GC_SHADER_PIPE_CONFIG 0x8950

#define	GC_USER_SHADER_PIPE_CONFIG 0x8954

#define	INACTIVE_QD_PIPES(x) ((x) << 8)

#define	INACTIVE_QD_PIPES_MASK 0x0000FF00

#define	INACTIVE_QD_PIPES_SHIFT 8

#define	INACTIVE_SIMDS(x) ((x) << 16)

#define	INACTIVE_SIMDS_MASK 0xFFFF0000

#define	INACTIVE_SIMDS_SHIFT 16

#define	VGT_PRIMITIVE_TYPE 0x8958

#define	VGT_NUM_INSTANCES 0x8974

#define	VGT_TF_RING_SIZE 0x8988

#define	VGT_OFFCHIP_LDS_BASE 0x89b4

#define	PA_SC_LINE_STIPPLE_STATE 0x8B10

#define	PA_CL_ENHANCE 0x8A14

#define	CLIP_VTX_REORDER_ENA (1 << 0)

#define	NUM_CLIP_SEQ(x) ((x) << 1)

#define	PA_SC_FIFO_SIZE 0x8BCC

#define	SC_PRIM_FIFO_SIZE(x) ((x) << 0)

#define	SC_HIZ_TILE_FIFO_SIZE(x) ((x) << 12)

#define	SC_EARLYZ_TILE_FIFO_SIZE(x) ((x) << 20)

#define	PA_SC_FORCE_EOV_MAX_CNTS 0x8B24

#define	FORCE_EOV_MAX_CLK_CNT(x) ((x) << 0)

#define	FORCE_EOV_MAX_REZ_CNT(x) ((x) << 16)

#define	SQ_CONFIG 0x8C00

#define	VC_ENABLE (1 << 0)

#define	EXPORT_SRC_C (1 << 1)

#define	GFX_PRIO(x) ((x) << 2)

#define	CS1_PRIO(x) ((x) << 4)

#define	CS2_PRIO(x) ((x) << 6)

#define	SQ_GPR_RESOURCE_MGMT_1 0x8C04

#define	NUM_PS_GPRS(x) ((x) << 0)

#define	NUM_VS_GPRS(x) ((x) << 16)

#define	NUM_CLAUSE_TEMP_GPRS(x) ((x) << 28)

#define	SQ_ESGS_RING_SIZE 0x8c44

#define	SQ_GSVS_RING_SIZE 0x8c4c

#define	SQ_ESTMP_RING_BASE 0x8c50

#define	SQ_ESTMP_RING_SIZE 0x8c54

#define	SQ_GSTMP_RING_BASE 0x8c58

#define	SQ_GSTMP_RING_SIZE 0x8c5c

#define	SQ_VSTMP_RING_BASE 0x8c60

#define	SQ_VSTMP_RING_SIZE 0x8c64

#define	SQ_PSTMP_RING_BASE 0x8c68

#define	SQ_PSTMP_RING_SIZE 0x8c6c

#define	SQ_MS_FIFO_SIZES 0x8CF0

#define	CACHE_FIFO_SIZE(x) ((x) << 0)

#define	FETCH_FIFO_HIWATER(x) ((x) << 8)

#define	DONE_FIFO_HIWATER(x) ((x) << 16)

#define	ALU_UPDATE_FIFO_HIWATER(x) ((x) << 24)

#define	SQ_LSTMP_RING_BASE 0x8e10

#define	SQ_LSTMP_RING_SIZE 0x8e14

#define	SQ_HSTMP_RING_BASE 0x8e18

#define	SQ_HSTMP_RING_SIZE 0x8e1c

#define	SQ_DYN_GPR_CNTL_PS_FLUSH_REQ 0x8D8C

#define	DYN_GPR_ENABLE (1 << 8)

#define	SQ_CONST_MEM_BASE 0x8df8

#define	SX_EXPORT_BUFFER_SIZES 0x900C

#define	COLOR_BUFFER_SIZE(x) ((x) << 0)

#define	POSITION_BUFFER_SIZE(x) ((x) << 8)

#define	SMX_BUFFER_SIZE(x) ((x) << 16)

#define	SX_DEBUG_1 0x9058

#define	ENABLE_NEW_SMX_ADDRESS (1 << 16)

#define	SPI_CONFIG_CNTL 0x9100

#define	GPR_WRITE_PRIORITY(x) ((x) << 0)

#define	SPI_CONFIG_CNTL_1 0x913C

#define	VTX_DONE_DELAY(x) ((x) << 0)

#define	INTERP_ONE_PRIM_PER_ROW (1 << 4)

#define	CRC_SIMD_ID_WADDR_DISABLE (1 << 8)

#define	CGTS_TCC_DISABLE 0x9148

#define	CGTS_USER_TCC_DISABLE 0x914C

#define	TCC_DISABLE_MASK 0xFFFF0000

#define	TCC_DISABLE_SHIFT 16

#define	CGTS_SM_CTRL_REG 0x9150

#define	OVERRIDE (1 << 21)

#define	TA_CNTL_AUX 0x9508

#define	DISABLE_CUBE_WRAP (1 << 0)

#define	DISABLE_CUBE_ANISO (1 << 1)

#define	TCP_CHAN_STEER_LO 0x960c

#define	TCP_CHAN_STEER_HI 0x9610

#define	CC_RB_BACKEND_DISABLE 0x98F4

#define	BACKEND_DISABLE(x) ((x) << 16)

#define	GB_ADDR_CONFIG 0x98F8

#define	NUM_PIPES(x) ((x) << 0)

#define	NUM_PIPES_MASK 0x00000007

#define	NUM_PIPES_SHIFT 0

#define	PIPE_INTERLEAVE_SIZE(x) ((x) << 4)

#define	PIPE_INTERLEAVE_SIZE_MASK 0x00000070

#define	PIPE_INTERLEAVE_SIZE_SHIFT 4

#define	BANK_INTERLEAVE_SIZE(x) ((x) << 8)

#define	NUM_SHADER_ENGINES(x) ((x) << 12)

#define	NUM_SHADER_ENGINES_MASK 0x00003000

#define	NUM_SHADER_ENGINES_SHIFT 12

#define	SHADER_ENGINE_TILE_SIZE(x) ((x) << 16)

#define	SHADER_ENGINE_TILE_SIZE_MASK 0x00070000

#define	SHADER_ENGINE_TILE_SIZE_SHIFT 16

#define	NUM_GPUS(x) ((x) << 20)

#define	NUM_GPUS_MASK 0x00700000

#define	NUM_GPUS_SHIFT 20

#define	MULTI_GPU_TILE_SIZE(x) ((x) << 24)

#define	MULTI_GPU_TILE_SIZE_MASK 0x03000000

#define	MULTI_GPU_TILE_SIZE_SHIFT 24

#define	ROW_SIZE(x) ((x) << 28)

#define	ROW_SIZE_MASK 0x30000000

#define	ROW_SIZE_SHIFT 28

#define	NUM_LOWER_PIPES(x) ((x) << 30)

#define	NUM_LOWER_PIPES_MASK 0x40000000

#define	NUM_LOWER_PIPES_SHIFT 30

#define	GB_BACKEND_MAP 0x98FC

#define	CB_PERF_CTR0_SEL_0 0x9A20

#define	CB_PERF_CTR0_SEL_1 0x9A24

#define	CB_PERF_CTR1_SEL_0 0x9A28

#define	CB_PERF_CTR1_SEL_1 0x9A2C

#define	CB_PERF_CTR2_SEL_0 0x9A30

#define	CB_PERF_CTR2_SEL_1 0x9A34

#define	CB_PERF_CTR3_SEL_0 0x9A38

#define	CB_PERF_CTR3_SEL_1 0x9A3C

#define	GC_USER_RB_BACKEND_DISABLE 0x9B7C

#define	BACKEND_DISABLE_MASK 0x00FF0000

#define	BACKEND_DISABLE_SHIFT 16

#define	SMX_DC_CTL0 0xA020

#define	USE_HASH_FUNCTION (1 << 0)

#define	NUMBER_OF_SETS(x) ((x) << 1)

#define	FLUSH_ALL_ON_EVENT (1 << 10)

#define	STALL_ON_EVENT (1 << 11)

#define	SMX_EVENT_CTL 0xA02C

#define	ES_FLUSH_CTL(x) ((x) << 0)

#define	GS_FLUSH_CTL(x) ((x) << 3)

#define	ACK_FLUSH_CTL(x) ((x) << 6)

#define	SYNC_FLUSH_CTL (1 << 8)

#define	CP_RB0_BASE 0xC100

#define	CP_RB0_CNTL 0xC104

#define	RB_BUFSZ(x) ((x) << 0)

#define	RB_BLKSZ(x) ((x) << 8)

#define	RB_NO_UPDATE (1 << 27)

#define	RB_RPTR_WR_ENA (1 << 31)

#define	BUF_SWAP_32BIT (2 << 16)

#define	CP_RB0_RPTR_ADDR 0xC10C

#define	CP_RB0_RPTR_ADDR_HI 0xC110

#define	CP_RB0_WPTR 0xC114

#define	CP_INT_CNTL 0xC124

#define	CNTX_BUSY_INT_ENABLE (1 << 19)

#define	CNTX_EMPTY_INT_ENABLE (1 << 20)

#define	TIME_STAMP_INT_ENABLE (1 << 26)

#define	CP_RB1_BASE 0xC180

#define	CP_RB1_CNTL 0xC184

#define	CP_RB1_RPTR_ADDR 0xC188

#define	CP_RB1_RPTR_ADDR_HI 0xC18C

#define	CP_RB1_WPTR 0xC190

#define	CP_RB2_BASE 0xC194

#define	CP_RB2_CNTL 0xC198

#define	CP_RB2_RPTR_ADDR 0xC19C

#define	CP_RB2_RPTR_ADDR_HI 0xC1A0

#define	CP_RB2_WPTR 0xC1A4

#define	CP_PFP_UCODE_ADDR 0xC150

#define	CP_PFP_UCODE_DATA 0xC154

#define	CP_ME_RAM_RADDR 0xC158

#define	CP_ME_RAM_WADDR 0xC15C

#define	CP_ME_RAM_DATA 0xC160

#define	CP_DEBUG 0xC1FC

#define	VGT_EVENT_INITIATOR 0x28a90

#define	CACHE_FLUSH_AND_INV_EVENT_TS (0x14 << 0)

#define	CACHE_FLUSH_AND_INV_EVENT (0x16 << 0)

#define	PACKET_TYPE0 0

#define	PACKET_TYPE1 1

#define	PACKET_TYPE2 2

#define	PACKET_TYPE3 3

#define	CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)

#define	CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)

#define	CP_PACKET0_GET_REG(h) (((h) & 0xFFFF) << 2)

#define	CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)

#define	PACKET0(reg, n)

#define	CP_PACKET2 0x80000000

#define	PACKET2_PAD_SHIFT 0

#define	PACKET2_PAD_MASK (0x3fffffff << 0)

#define	PACKET2(v) (CP_PACKET2 \| REG_SET(PACKET2_PAD, (v)))

#define	PACKET3(op, n)

#define	PACKET3_NOP 0x10

#define	PACKET3_SET_BASE 0x11

#define	PACKET3_CLEAR_STATE 0x12

#define	PACKET3_INDEX_BUFFER_SIZE 0x13

#define	PACKET3_DEALLOC_STATE 0x14

#define	PACKET3_DISPATCH_DIRECT 0x15

#define	PACKET3_DISPATCH_INDIRECT 0x16

#define	PACKET3_INDIRECT_BUFFER_END 0x17

#define	PACKET3_MODE_CONTROL 0x18

#define	PACKET3_SET_PREDICATION 0x20

#define	PACKET3_REG_RMW 0x21

#define	PACKET3_COND_EXEC 0x22

#define	PACKET3_PRED_EXEC 0x23

#define	PACKET3_DRAW_INDIRECT 0x24

#define	PACKET3_DRAW_INDEX_INDIRECT 0x25

#define	PACKET3_INDEX_BASE 0x26

#define	PACKET3_DRAW_INDEX_2 0x27

#define	PACKET3_CONTEXT_CONTROL 0x28

#define	PACKET3_DRAW_INDEX_OFFSET 0x29

#define	PACKET3_INDEX_TYPE 0x2A

#define	PACKET3_DRAW_INDEX 0x2B

#define	PACKET3_DRAW_INDEX_AUTO 0x2D

#define	PACKET3_DRAW_INDEX_IMMD 0x2E

#define	PACKET3_NUM_INSTANCES 0x2F

#define	PACKET3_DRAW_INDEX_MULTI_AUTO 0x30

#define	PACKET3_INDIRECT_BUFFER 0x32

#define	PACKET3_STRMOUT_BUFFER_UPDATE 0x34

#define	PACKET3_DRAW_INDEX_OFFSET_2 0x35

#define	PACKET3_DRAW_INDEX_MULTI_ELEMENT 0x36

#define	PACKET3_WRITE_DATA 0x37

#define	PACKET3_MEM_SEMAPHORE 0x39

#define	PACKET3_MPEG_INDEX 0x3A

#define	PACKET3_WAIT_REG_MEM 0x3C

#define	PACKET3_MEM_WRITE 0x3D

#define	PACKET3_PFP_SYNC_ME 0x42

#define	PACKET3_SURFACE_SYNC 0x43

#define	PACKET3_CB0_DEST_BASE_ENA (1 << 6)

#define	PACKET3_CB1_DEST_BASE_ENA (1 << 7)

#define	PACKET3_CB2_DEST_BASE_ENA (1 << 8)

#define	PACKET3_CB3_DEST_BASE_ENA (1 << 9)

#define	PACKET3_CB4_DEST_BASE_ENA (1 << 10)

#define	PACKET3_CB5_DEST_BASE_ENA (1 << 11)

#define	PACKET3_CB6_DEST_BASE_ENA (1 << 12)

#define	PACKET3_CB7_DEST_BASE_ENA (1 << 13)

#define	PACKET3_DB_DEST_BASE_ENA (1 << 14)

#define	PACKET3_CB8_DEST_BASE_ENA (1 << 15)

#define	PACKET3_CB9_DEST_BASE_ENA (1 << 16)

#define	PACKET3_CB10_DEST_BASE_ENA (1 << 17)

#define	PACKET3_CB11_DEST_BASE_ENA (1 << 18)

#define	PACKET3_FULL_CACHE_ENA (1 << 20)

#define	PACKET3_TC_ACTION_ENA (1 << 23)

#define	PACKET3_CB_ACTION_ENA (1 << 25)

#define	PACKET3_DB_ACTION_ENA (1 << 26)

#define	PACKET3_SH_ACTION_ENA (1 << 27)

#define	PACKET3_SX_ACTION_ENA (1 << 28)

#define	PACKET3_ME_INITIALIZE 0x44

#define	PACKET3_ME_INITIALIZE_DEVICE_ID(x) ((x) << 16)

#define	PACKET3_COND_WRITE 0x45

#define	PACKET3_EVENT_WRITE 0x46

#define	EVENT_TYPE(x) ((x) << 0)

#define	EVENT_INDEX(x) ((x) << 8)

#define	PACKET3_EVENT_WRITE_EOP 0x47

#define	DATA_SEL(x) ((x) << 29)

#define	INT_SEL(x) ((x) << 24)

#define	PACKET3_EVENT_WRITE_EOS 0x48

#define	PACKET3_PREAMBLE_CNTL 0x4A

#define	PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28)

#define	PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28)

#define	PACKET3_ALU_PS_CONST_BUFFER_COPY 0x4C

#define	PACKET3_ALU_VS_CONST_BUFFER_COPY 0x4D

#define	PACKET3_ALU_PS_CONST_UPDATE 0x4E

#define	PACKET3_ALU_VS_CONST_UPDATE 0x4F

#define	PACKET3_ONE_REG_WRITE 0x57

#define	PACKET3_SET_CONFIG_REG 0x68

#define	PACKET3_SET_CONFIG_REG_START 0x00008000

#define	PACKET3_SET_CONFIG_REG_END 0x0000ac00

#define	PACKET3_SET_CONTEXT_REG 0x69

#define	PACKET3_SET_CONTEXT_REG_START 0x00028000

#define	PACKET3_SET_CONTEXT_REG_END 0x00029000

#define	PACKET3_SET_ALU_CONST 0x6A

#define	PACKET3_SET_BOOL_CONST 0x6B

#define	PACKET3_SET_BOOL_CONST_START 0x0003a500

#define	PACKET3_SET_BOOL_CONST_END 0x0003a518

#define	PACKET3_SET_LOOP_CONST 0x6C

#define	PACKET3_SET_LOOP_CONST_START 0x0003a200

#define	PACKET3_SET_LOOP_CONST_END 0x0003a500

#define	PACKET3_SET_RESOURCE 0x6D

#define	PACKET3_SET_RESOURCE_START 0x00030000

#define	PACKET3_SET_RESOURCE_END 0x00038000

#define	PACKET3_SET_SAMPLER 0x6E

#define	PACKET3_SET_SAMPLER_START 0x0003c000

#define	PACKET3_SET_SAMPLER_END 0x0003c600

#define	PACKET3_SET_CTL_CONST 0x6F

#define	PACKET3_SET_CTL_CONST_START 0x0003cff0

#define	PACKET3_SET_CTL_CONST_END 0x0003ff0c

#define	PACKET3_SET_RESOURCE_OFFSET 0x70

#define	PACKET3_SET_ALU_CONST_VS 0x71

#define	PACKET3_SET_ALU_CONST_DI 0x72

#define	PACKET3_SET_CONTEXT_REG_INDIRECT 0x73

#define	PACKET3_SET_RESOURCE_INDIRECT 0x74

#define	PACKET3_SET_APPEND_CNT 0x75

#define	PACKET3_ME_WRITE 0x7A

Macro Definition Documentation

#define ACK_FLUSH_CTL ( x ) ((x) << 6)

Definition at line 405 of file nid.h.

#define ALU_UPDATE_FIFO_HIWATER ( x ) ((x) << 24)

Definition at line 317 of file nid.h.

#define ARUBA_GB_ADDR_CONFIG_GOLDEN 0x12010001

Definition at line 45 of file nid.h.

#define AUTO_INVLD_EN ( x ) ((x) << 6)

Definition at line 260 of file nid.h.

#define BACKEND_DISABLE ( x ) ((x) << 16)

Definition at line 355 of file nid.h.

#define BACKEND_DISABLE_MASK 0x00FF0000

Definition at line 394 of file nid.h.

#define BACKEND_DISABLE_SHIFT 16

Definition at line 395 of file nid.h.

#define BANK_INTERLEAVE_SIZE ( x ) ((x) << 8)

Definition at line 363 of file nid.h.

#define BANK_SELECT ( x ) ((x) << 0)

Definition at line 74 of file nid.h.

#define BUF_SWAP_32BIT (2 << 16)

Definition at line 414 of file nid.h.

#define BURSTLENGTH_MASK 0x00000200

Definition at line 127 of file nid.h.

#define BURSTLENGTH_SHIFT 9

Definition at line 126 of file nid.h.

#define CACHE_FIFO_SIZE ( x ) ((x) << 0)

Definition at line 314 of file nid.h.

#define CACHE_FLUSH_AND_INV_EVENT (0x16 << 0)

Definition at line 443 of file nid.h.

#define CACHE_FLUSH_AND_INV_EVENT_TS (0x14 << 0)

Definition at line 442 of file nid.h.

#define CACHE_INVALIDATION ( x ) ((x) << 0)

Definition at line 256 of file nid.h.

#define CACHE_UPDATE_MODE ( x ) ((x) << 6)

Definition at line 75 of file nid.h.

#define CAYMAN_GB_ADDR_CONFIG_GOLDEN 0x02011003

Definition at line 44 of file nid.h.

#define CAYMAN_MAX_BACKENDS 8

Definition at line 32 of file nid.h.

#define CAYMAN_MAX_BACKENDS_MASK 0xFF

Definition at line 33 of file nid.h.

#define CAYMAN_MAX_BACKENDS_PER_SE_MASK 0xF

Definition at line 34 of file nid.h.

#define CAYMAN_MAX_FRC_EOV_CNT 16384

Definition at line 31 of file nid.h.

#define CAYMAN_MAX_LDS_NUM 0xFFFF

Definition at line 40 of file nid.h.

#define CAYMAN_MAX_PIPES 8

Definition at line 38 of file nid.h.

#define CAYMAN_MAX_PIPES_MASK 0xFF

Definition at line 39 of file nid.h.

#define CAYMAN_MAX_SH_GPRS 256

Definition at line 27 of file nid.h.

#define CAYMAN_MAX_SH_STACK_ENTRIES 4096

Definition at line 30 of file nid.h.

#define CAYMAN_MAX_SH_THREADS 256

Definition at line 29 of file nid.h.

#define CAYMAN_MAX_SIMDS 16

Definition at line 35 of file nid.h.

#define CAYMAN_MAX_SIMDS_MASK 0xFFFF

Definition at line 36 of file nid.h.

#define CAYMAN_MAX_SIMDS_PER_SE_MASK 0xFFF

Definition at line 37 of file nid.h.

#define CAYMAN_MAX_TCC 16

Definition at line 41 of file nid.h.

#define CAYMAN_MAX_TCC_MASK 0xFF

Definition at line 42 of file nid.h.

#define CAYMAN_MAX_TEMP_GPRS 16

Definition at line 28 of file nid.h.

#define CB_BUSY (1 << 30)

Definition at line 189 of file nid.h.

#define CB_CLEAN (1 << 13)

Definition at line 174 of file nid.h.

#define CB_PERF_CTR0_SEL_0 0x9A20

Definition at line 384 of file nid.h.

#define CB_PERF_CTR0_SEL_1 0x9A24

Definition at line 385 of file nid.h.

#define CB_PERF_CTR1_SEL_0 0x9A28

Definition at line 386 of file nid.h.

#define CB_PERF_CTR1_SEL_1 0x9A2C

Definition at line 387 of file nid.h.

#define CB_PERF_CTR2_SEL_0 0x9A30

Definition at line 388 of file nid.h.

#define CB_PERF_CTR2_SEL_1 0x9A34

Definition at line 389 of file nid.h.

#define CB_PERF_CTR3_SEL_0 0x9A38

Definition at line 390 of file nid.h.

#define CB_PERF_CTR3_SEL_1 0x9A3C

Definition at line 391 of file nid.h.

#define CC_GC_SHADER_PIPE_CONFIG 0x8950

Definition at line 267 of file nid.h.

#define CC_RB_BACKEND_DISABLE 0x98F4

Definition at line 354 of file nid.h.

#define CC_SYS_RB_BACKEND_DISABLE 0x3F88

Definition at line 149 of file nid.h.

#define CF_RQ_PENDING (1 << 7)

Definition at line 168 of file nid.h.

#define CGTS_SM_CTRL_REG 0x9150

Definition at line 344 of file nid.h.

#define CGTS_SYS_TCC_DISABLE 0x3F90

Definition at line 151 of file nid.h.

#define CGTS_TCC_DISABLE 0x9148

Definition at line 340 of file nid.h.

#define CGTS_USER_SYS_TCC_DISABLE 0x3F94

Definition at line 152 of file nid.h.

#define CGTS_USER_TCC_DISABLE 0x914C

Definition at line 341 of file nid.h.

#define CHANSIZE_MASK 0x00000100

Definition at line 125 of file nid.h.

#define CHANSIZE_OVERRIDE (1 << 11)

Definition at line 128 of file nid.h.

#define CHANSIZE_SHIFT 8

Definition at line 124 of file nid.h.

#define CLIP_VTX_REORDER_ENA (1 << 0)

Definition at line 283 of file nid.h.

#define CMDFIFO_AVAIL_MASK 0x0000000F

Definition at line 164 of file nid.h.

#define CNTX_BUSY_INT_ENABLE (1 << 19)

Definition at line 420 of file nid.h.

#define CNTX_EMPTY_INT_ENABLE (1 << 20)

Definition at line 421 of file nid.h.

#define COLOR_BUFFER_SIZE ( x ) ((x) << 0)

Definition at line 327 of file nid.h.

#define CONFIG_MEMSIZE 0x5428

Definition at line 156 of file nid.h.

#define CONTEXT1_IDENTITY_ACCESS_MODE ( x ) (((x) & 3) << 18)

Definition at line 63 of file nid.h.

#define CP_BUSY (1 << 29)

Definition at line 188 of file nid.h.

#define CP_BUSY_STAT 0x867C

Definition at line 241 of file nid.h.

#define CP_COHER_CNTL2 0x85E8

Definition at line 238 of file nid.h.

#define CP_COHERENCY_BUSY (1 << 28)

Definition at line 187 of file nid.h.

#define CP_DEBUG 0xC1FC

Definition at line 439 of file nid.h.

#define CP_INT_CNTL 0xC124

Definition at line 419 of file nid.h.

#define CP_ME_CNTL 0x86D8

Definition at line 243 of file nid.h.

#define CP_ME_HALT (1 << 28)

Definition at line 244 of file nid.h.

#define CP_ME_RAM_DATA 0xC160

Definition at line 438 of file nid.h.

#define CP_ME_RAM_RADDR 0xC158

Definition at line 436 of file nid.h.

#define CP_ME_RAM_WADDR 0xC15C

Definition at line 437 of file nid.h.

#define CP_MEQ_THRESHOLDS 0x8764

Definition at line 250 of file nid.h.

#define CP_PACKET0_GET_REG ( h ) (((h) & 0xFFFF) << 2)

Definition at line 455 of file nid.h.

#define CP_PACKET2 0x80000000

Definition at line 460 of file nid.h.

#define CP_PACKET3_GET_OPCODE ( h ) (((h) >> 8) & 0xFF)

Definition at line 456 of file nid.h.

#define CP_PACKET_GET_COUNT ( h ) (((h) >> 16) & 0x3FFF)

Definition at line 454 of file nid.h.

#define CP_PACKET_GET_TYPE ( h ) (((h) >> 30) & 3)

Definition at line 453 of file nid.h.

#define CP_PERFMON_CNTL 0x87FC

Definition at line 253 of file nid.h.

#define CP_PFP_HALT (1 << 26)

Definition at line 245 of file nid.h.

#define CP_PFP_UCODE_ADDR 0xC150

Definition at line 434 of file nid.h.

#define CP_PFP_UCODE_DATA 0xC154

Definition at line 435 of file nid.h.

#define CP_RB0_BASE 0xC100

Definition at line 408 of file nid.h.

#define CP_RB0_CNTL 0xC104

Definition at line 409 of file nid.h.

#define CP_RB0_RPTR 0x8700

Definition at line 248 of file nid.h.

#define CP_RB0_RPTR_ADDR 0xC10C

Definition at line 415 of file nid.h.

#define CP_RB0_RPTR_ADDR_HI 0xC110

Definition at line 416 of file nid.h.

#define CP_RB0_WPTR 0xC114

Definition at line 417 of file nid.h.

#define CP_RB1_BASE 0xC180

Definition at line 424 of file nid.h.

#define CP_RB1_CNTL 0xC184

Definition at line 425 of file nid.h.

#define CP_RB1_RPTR 0x86fc

Definition at line 247 of file nid.h.

#define CP_RB1_RPTR_ADDR 0xC188

Definition at line 426 of file nid.h.

#define CP_RB1_RPTR_ADDR_HI 0xC18C

Definition at line 427 of file nid.h.

#define CP_RB1_WPTR 0xC190

Definition at line 428 of file nid.h.

#define CP_RB2_BASE 0xC194

Definition at line 429 of file nid.h.

#define CP_RB2_CNTL 0xC198

Definition at line 430 of file nid.h.

#define CP_RB2_RPTR 0x86f8

Definition at line 246 of file nid.h.

#define CP_RB2_RPTR_ADDR 0xC19C

Definition at line 431 of file nid.h.

#define CP_RB2_RPTR_ADDR_HI 0xC1A0

Definition at line 432 of file nid.h.

#define CP_RB2_WPTR 0xC1A4

Definition at line 433 of file nid.h.

#define CP_RB_WPTR_DELAY 0x8704

Definition at line 249 of file nid.h.

#define CP_SEM_INCOMPLETE_TIMER_CNTL 0x85C8

Definition at line 237 of file nid.h.

#define CP_SEM_WAIT_TIMER 0x85BC

Definition at line 236 of file nid.h.

#define CP_STALLED_STAT1 0x8674

Definition at line 239 of file nid.h.

#define CP_STALLED_STAT2 0x8678

Definition at line 240 of file nid.h.

#define CP_STAT 0x8680

Definition at line 242 of file nid.h.

#define CRC_SIMD_ID_WADDR_DISABLE (1 << 8)

Definition at line 338 of file nid.h.

#define CS1_PRIO ( x ) ((x) << 4)

Definition at line 297 of file nid.h.

#define CS2_PRIO ( x ) ((x) << 6)

Definition at line 298 of file nid.h.

#define DATA_SEL ( x ) ((x) << 29)

Definition at line 540 of file nid.h.

#define DB_BUSY (1 << 26)

Definition at line 186 of file nid.h.

#define DB_CLEAN (1 << 12)

Definition at line 173 of file nid.h.

#define DISABLE_CUBE_ANISO (1 << 1)

Definition at line 349 of file nid.h.

#define DISABLE_CUBE_WRAP (1 << 0)

Definition at line 348 of file nid.h.

#define DMIF_ADDR_CONFIG 0xBD4

Definition at line 47 of file nid.h.

#define DONE_FIFO_HIWATER ( x ) ((x) << 16)

Definition at line 316 of file nid.h.

#define DYN_GPR_ENABLE (1 << 8)

Definition at line 323 of file nid.h.

#define EFFECTIVE_L2_QUEUE_SIZE ( x ) (((x) & 7) << 14)

Definition at line 62 of file nid.h.

#define ENABLE_ADVANCED_DRIVER_MODEL (1 << 6)

Definition at line 111 of file nid.h.

#define ENABLE_CONTEXT (1 << 0)

Definition at line 81 of file nid.h.

#define ENABLE_L1_FRAGMENT_PROCESSING (1 << 1)

Definition at line 105 of file nid.h.

#define ENABLE_L1_TLB (1 << 0)

Definition at line 104 of file nid.h.

#define ENABLE_L2_CACHE (1 << 0)

Definition at line 58 of file nid.h.

#define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1)

Definition at line 59 of file nid.h.

#define ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE (1 << 10)

Definition at line 61 of file nid.h.

#define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9)

Definition at line 60 of file nid.h.

#define ENABLE_NEW_SMX_ADDRESS (1 << 16)

Definition at line 331 of file nid.h.

#define ES_AND_GS_AUTO 3

Definition at line 264 of file nid.h.

#define ES_AUTO 1

Definition at line 262 of file nid.h.

#define ES_FLUSH_CTL ( x ) ((x) << 0)

Definition at line 403 of file nid.h.

#define EVENT_INDEX ( x ) ((x) << 8)

Definition at line 531 of file nid.h.

#define EVENT_TYPE ( x ) ((x) << 0)

Definition at line 530 of file nid.h.

#define EXPORT_SRC_C (1 << 1)

Definition at line 295 of file nid.h.

#define FETCH_FIFO_HIWATER ( x ) ((x) << 8)

Definition at line 315 of file nid.h.

#define FLUSH_ALL_ON_EVENT (1 << 10)

Definition at line 400 of file nid.h.

#define FORCE_EOV_MAX_CLK_CNT ( x ) ((x) << 0)

Definition at line 290 of file nid.h.

#define FORCE_EOV_MAX_REZ_CNT ( x ) ((x) << 16)

Definition at line 291 of file nid.h.

#define FUS_MC_VM_FB_OFFSET 0x2068

Definition at line 112 of file nid.h.

#define GB_ADDR_CONFIG 0x98F8

Definition at line 356 of file nid.h.

#define GB_BACKEND_MAP 0x98FC

Definition at line 382 of file nid.h.

#define GC_USER_RB_BACKEND_DISABLE 0x9B7C

Definition at line 393 of file nid.h.

#define GC_USER_SHADER_PIPE_CONFIG 0x8954

Definition at line 268 of file nid.h.

#define GC_USER_SYS_RB_BACKEND_DISABLE 0x3F8C

Definition at line 150 of file nid.h.

#define GDS_BUSY (1 << 15)

Definition at line 176 of file nid.h.

#define GDS_DMA_RQ_PENDING (1 << 9)

Definition at line 170 of file nid.h.

#define GFX_PRIO ( x ) ((x) << 2)

Definition at line 296 of file nid.h.

#define GPR_WRITE_PRIORITY ( x ) ((x) << 0)

Definition at line 334 of file nid.h.

#define GRBM_CNTL 0x8000

Definition at line 161 of file nid.h.

#define GRBM_EE_BUSY (1 << 10)

Definition at line 171 of file nid.h.

#define GRBM_GFX_INDEX 0x802C

Definition at line 220 of file nid.h.

#define GRBM_READ_TIMEOUT ( x ) ((x) << 0)

Definition at line 162 of file nid.h.

#define GRBM_SOFT_RESET 0x8020

Definition at line 205 of file nid.h.

#define GRBM_STATUS 0x8010

Definition at line 163 of file nid.h.

#define GRBM_STATUS_SE0 0x8014

Definition at line 191 of file nid.h.

#define GRBM_STATUS_SE1 0x8018

Definition at line 192 of file nid.h.

#define GS_AUTO 2

Definition at line 263 of file nid.h.

#define GS_FLUSH_CTL ( x ) ((x) << 3)

Definition at line 404 of file nid.h.

#define GUI_ACTIVE (1 << 31)

Definition at line 190 of file nid.h.

#define HDP_ADDR_CONFIG 0x2F48

Definition at line 145 of file nid.h.

#define HDP_FLUSH_INVALIDATE_CACHE (1 << 0)

Definition at line 147 of file nid.h.

#define HDP_HOST_PATH_CNTL 0x2C00

Definition at line 141 of file nid.h.

#define HDP_MEM_COHERENCY_FLUSH_CNTL 0x5480

Definition at line 158 of file nid.h.

#define HDP_MISC_CNTL 0x2F4C

Definition at line 146 of file nid.h.

#define HDP_NONSURFACE_BASE 0x2C04

Definition at line 142 of file nid.h.

#define HDP_NONSURFACE_INFO 0x2C08

Definition at line 143 of file nid.h.

#define HDP_NONSURFACE_SIZE 0x2C0C

Definition at line 144 of file nid.h.

#define HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0

Definition at line 159 of file nid.h.

#define IA_BUSY (1 << 19)

Definition at line 180 of file nid.h.

#define IA_BUSY_NO_DMA (1 << 18)

Definition at line 179 of file nid.h.

#define INACTIVE_QD_PIPES ( x ) ((x) << 8)

Definition at line 269 of file nid.h.

#define INACTIVE_QD_PIPES_MASK 0x0000FF00

Definition at line 270 of file nid.h.

#define INACTIVE_QD_PIPES_SHIFT 8

Definition at line 271 of file nid.h.

#define INACTIVE_SIMDS ( x ) ((x) << 16)

Definition at line 272 of file nid.h.

#define INACTIVE_SIMDS_MASK 0xFFFF0000

Definition at line 273 of file nid.h.

#define INACTIVE_SIMDS_SHIFT 16

Definition at line 274 of file nid.h.

#define INSTANCE_BROADCAST_WRITES (1 << 30)

Definition at line 223 of file nid.h.

#define INSTANCE_INDEX ( x ) ((x) << 0)

Definition at line 221 of file nid.h.

#define INT_SEL ( x ) ((x) << 24)

Definition at line 546 of file nid.h.

#define INTERP_ONE_PRIM_PER_ROW (1 << 4)

Definition at line 337 of file nid.h.

#define INVALIDATE_ALL_L1_TLBS (1 << 0)

Definition at line 71 of file nid.h.

#define INVALIDATE_L2_CACHE (1 << 1)

Definition at line 72 of file nid.h.

#define L2_BUSY (1 << 0)

Definition at line 79 of file nid.h.

#define L2_CACHE_BIGK_ASSOCIATIVITY (1 << 20)

Definition at line 76 of file nid.h.

#define L2_CACHE_BIGK_FRAGMENT_SIZE ( x ) ((x) << 15)

Definition at line 77 of file nid.h.

#define MC_ARB_RAMCFG 0x2760

Definition at line 115 of file nid.h.

#define MC_IO_PAD_CNTL_D0 0x29d0

Definition at line 132 of file nid.h.

#define MC_SEQ_IO_DEBUG_DATA 0x2a48

Definition at line 139 of file nid.h.

#define MC_SEQ_IO_DEBUG_INDEX 0x2a44

Definition at line 138 of file nid.h.

#define MC_SEQ_MISC0 0x2a00

Definition at line 134 of file nid.h.

#define MC_SEQ_MISC0_GDDR5_MASK 0xf0000000

Definition at line 136 of file nid.h.

#define MC_SEQ_MISC0_GDDR5_SHIFT 28

Definition at line 135 of file nid.h.

#define MC_SEQ_MISC0_GDDR5_VALUE 5

Definition at line 137 of file nid.h.

#define MC_SEQ_SUP_CNTL 0x28c8

Definition at line 129 of file nid.h.

#define MC_SEQ_SUP_PGM 0x28cc

Definition at line 131 of file nid.h.

#define MC_SHARED_BLACKOUT_CNTL 0x20ac

Definition at line 114 of file nid.h.

#define MC_SHARED_CHMAP 0x2004

Definition at line 95 of file nid.h.

#define MC_SHARED_CHREMAP 0x2008

Definition at line 98 of file nid.h.

#define MC_VM_MX_L1_TLB_CNTL 0x2064

Definition at line 103 of file nid.h.

#define MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x203C

Definition at line 102 of file nid.h.

#define MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2038

Definition at line 101 of file nid.h.

#define MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2034

Definition at line 100 of file nid.h.

#define MEM_FALL_OUT_CMD (1 << 8)

Definition at line 133 of file nid.h.

#define MEQ1_START ( x ) ((x) << 0)

Definition at line 251 of file nid.h.

#define MEQ2_START ( x ) ((x) << 8)

Definition at line 252 of file nid.h.

#define MULTI_GPU_TILE_SIZE ( x ) ((x) << 24)

Definition at line 373 of file nid.h.

#define MULTI_GPU_TILE_SIZE_MASK 0x03000000

Definition at line 374 of file nid.h.

#define MULTI_GPU_TILE_SIZE_SHIFT 24

Definition at line 375 of file nid.h.

#define NO_AUTO 0

Definition at line 261 of file nid.h.

#define NOOFBANK_MASK 0x00000003

Definition at line 117 of file nid.h.

#define NOOFBANK_SHIFT 0

Definition at line 116 of file nid.h.

#define NOOFCHAN_MASK 0x00003000

Definition at line 97 of file nid.h.

#define NOOFCHAN_SHIFT 12

Definition at line 96 of file nid.h.

#define NOOFCOLS_MASK 0x000000C0

Definition at line 123 of file nid.h.

#define NOOFCOLS_SHIFT 6

Definition at line 122 of file nid.h.

#define NOOFRANK_MASK 0x00000004

Definition at line 119 of file nid.h.

#define NOOFRANK_SHIFT 2

Definition at line 118 of file nid.h.

#define NOOFROWS_MASK 0x00000038

Definition at line 121 of file nid.h.

#define NOOFROWS_SHIFT 3

Definition at line 120 of file nid.h.

#define NUM_CLAUSE_TEMP_GPRS ( x ) ((x) << 28)

Definition at line 302 of file nid.h.

#define NUM_CLIP_SEQ ( x ) ((x) << 1)

Definition at line 284 of file nid.h.

#define NUM_GPUS ( x ) ((x) << 20)

Definition at line 370 of file nid.h.

#define NUM_GPUS_MASK 0x00700000

Definition at line 371 of file nid.h.

#define NUM_GPUS_SHIFT 20

Definition at line 372 of file nid.h.

#define NUM_LOWER_PIPES ( x ) ((x) << 30)

Definition at line 379 of file nid.h.

#define NUM_LOWER_PIPES_MASK 0x40000000

Definition at line 380 of file nid.h.

#define NUM_LOWER_PIPES_SHIFT 30

Definition at line 381 of file nid.h.

#define NUM_PIPES ( x ) ((x) << 0)

Definition at line 357 of file nid.h.

#define NUM_PIPES_MASK 0x00000007

Definition at line 358 of file nid.h.

#define NUM_PIPES_SHIFT 0

Definition at line 359 of file nid.h.

#define NUM_PS_GPRS ( x ) ((x) << 0)

Definition at line 300 of file nid.h.

#define NUM_SHADER_ENGINES ( x ) ((x) << 12)

Definition at line 364 of file nid.h.

#define NUM_SHADER_ENGINES_MASK 0x00003000

Definition at line 365 of file nid.h.

#define NUM_SHADER_ENGINES_SHIFT 12

Definition at line 366 of file nid.h.

#define NUM_VS_GPRS ( x ) ((x) << 16)

Definition at line 301 of file nid.h.

#define NUMBER_OF_SETS ( x ) ((x) << 1)

Definition at line 399 of file nid.h.

#define OVERRIDE (1 << 21)

Definition at line 345 of file nid.h.

#define PA_BUSY (1 << 25)

Definition at line 185 of file nid.h.

#define PA_CL_ENHANCE 0x8A14

Definition at line 282 of file nid.h.

#define PA_SC_FIFO_SIZE 0x8BCC

Definition at line 285 of file nid.h.

#define PA_SC_FORCE_EOV_MAX_CNTS 0x8B24

Definition at line 289 of file nid.h.

#define PA_SC_LINE_STIPPLE_STATE 0x8B10

Definition at line 281 of file nid.h.

#define PACKET0	(	reg,
		n
	)

Value:

((PACKET_TYPE0 << 30) |             \
             (((reg) >> 2) & 0xFFFF) |          \
             ((n) & 0x3FFF) << 16)

Definition at line 457 of file nid.h.

#define PACKET2 ( v ) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v)))

Definition at line 464 of file nid.h.

#define PACKET2_PAD_MASK (0x3fffffff << 0)

Definition at line 462 of file nid.h.

#define PACKET2_PAD_SHIFT 0

Definition at line 461 of file nid.h.

#define PACKET3	(	op,
		n
	)

Value:

((PACKET_TYPE3 << 30) |             \
             (((op) & 0xFF) << 8) |             \
             ((n) & 0x3FFF) << 16)

Definition at line 466 of file nid.h.

#define PACKET3_ALU_PS_CONST_BUFFER_COPY 0x4C

Definition at line 555 of file nid.h.

#define PACKET3_ALU_PS_CONST_UPDATE 0x4E

Definition at line 557 of file nid.h.

#define PACKET3_ALU_VS_CONST_BUFFER_COPY 0x4D

Definition at line 556 of file nid.h.

#define PACKET3_ALU_VS_CONST_UPDATE 0x4F

Definition at line 558 of file nid.h.

#define PACKET3_CB0_DEST_BASE_ENA (1 << 6)

Definition at line 507 of file nid.h.

#define PACKET3_CB10_DEST_BASE_ENA (1 << 17)

Definition at line 518 of file nid.h.

#define PACKET3_CB11_DEST_BASE_ENA (1 << 18)

Definition at line 519 of file nid.h.

#define PACKET3_CB1_DEST_BASE_ENA (1 << 7)

Definition at line 508 of file nid.h.

#define PACKET3_CB2_DEST_BASE_ENA (1 << 8)

Definition at line 509 of file nid.h.

#define PACKET3_CB3_DEST_BASE_ENA (1 << 9)

Definition at line 510 of file nid.h.

#define PACKET3_CB4_DEST_BASE_ENA (1 << 10)

Definition at line 511 of file nid.h.

#define PACKET3_CB5_DEST_BASE_ENA (1 << 11)

Definition at line 512 of file nid.h.

#define PACKET3_CB6_DEST_BASE_ENA (1 << 12)

Definition at line 513 of file nid.h.

#define PACKET3_CB7_DEST_BASE_ENA (1 << 13)

Definition at line 514 of file nid.h.

#define PACKET3_CB8_DEST_BASE_ENA (1 << 15)

Definition at line 516 of file nid.h.

#define PACKET3_CB9_DEST_BASE_ENA (1 << 16)

Definition at line 517 of file nid.h.

#define PACKET3_CB_ACTION_ENA (1 << 25)

Definition at line 522 of file nid.h.

#define PACKET3_CLEAR_STATE 0x12

Definition at line 473 of file nid.h.

#define PACKET3_COND_EXEC 0x22

Definition at line 482 of file nid.h.

#define PACKET3_COND_WRITE 0x45

Definition at line 528 of file nid.h.

#define PACKET3_CONTEXT_CONTROL 0x28

Definition at line 488 of file nid.h.

#define PACKET3_DB_ACTION_ENA (1 << 26)

Definition at line 523 of file nid.h.

#define PACKET3_DB_DEST_BASE_ENA (1 << 14)

Definition at line 515 of file nid.h.

#define PACKET3_DEALLOC_STATE 0x14

Definition at line 475 of file nid.h.

#define PACKET3_DISPATCH_DIRECT 0x15

Definition at line 476 of file nid.h.

#define PACKET3_DISPATCH_INDIRECT 0x16

Definition at line 477 of file nid.h.

#define PACKET3_DRAW_INDEX 0x2B

Definition at line 491 of file nid.h.

#define PACKET3_DRAW_INDEX_2 0x27

Definition at line 487 of file nid.h.

#define PACKET3_DRAW_INDEX_AUTO 0x2D

Definition at line 492 of file nid.h.

#define PACKET3_DRAW_INDEX_IMMD 0x2E

Definition at line 493 of file nid.h.

#define PACKET3_DRAW_INDEX_INDIRECT 0x25

Definition at line 485 of file nid.h.

#define PACKET3_DRAW_INDEX_MULTI_AUTO 0x30

Definition at line 495 of file nid.h.

#define PACKET3_DRAW_INDEX_MULTI_ELEMENT 0x36

Definition at line 499 of file nid.h.

#define PACKET3_DRAW_INDEX_OFFSET 0x29

Definition at line 489 of file nid.h.

#define PACKET3_DRAW_INDEX_OFFSET_2 0x35

Definition at line 498 of file nid.h.

#define PACKET3_DRAW_INDIRECT 0x24

Definition at line 484 of file nid.h.

#define PACKET3_EVENT_WRITE 0x46

Definition at line 529 of file nid.h.

#define PACKET3_EVENT_WRITE_EOP 0x47

Definition at line 539 of file nid.h.

#define PACKET3_EVENT_WRITE_EOS 0x48

Definition at line 551 of file nid.h.

#define PACKET3_FULL_CACHE_ENA (1 << 20)

Definition at line 520 of file nid.h.

#define PACKET3_INDEX_BASE 0x26

Definition at line 486 of file nid.h.

#define PACKET3_INDEX_BUFFER_SIZE 0x13

Definition at line 474 of file nid.h.

#define PACKET3_INDEX_TYPE 0x2A

Definition at line 490 of file nid.h.

#define PACKET3_INDIRECT_BUFFER 0x32

Definition at line 496 of file nid.h.

#define PACKET3_INDIRECT_BUFFER_END 0x17

Definition at line 478 of file nid.h.

#define PACKET3_ME_INITIALIZE 0x44

Definition at line 526 of file nid.h.

#define PACKET3_ME_INITIALIZE_DEVICE_ID ( x ) ((x) << 16)

Definition at line 527 of file nid.h.

#define PACKET3_ME_WRITE 0x7A

Definition at line 589 of file nid.h.

#define PACKET3_MEM_SEMAPHORE 0x39

Definition at line 501 of file nid.h.

#define PACKET3_MEM_WRITE 0x3D

Definition at line 504 of file nid.h.

#define PACKET3_MODE_CONTROL 0x18

Definition at line 479 of file nid.h.

#define PACKET3_MPEG_INDEX 0x3A

Definition at line 502 of file nid.h.

#define PACKET3_NOP 0x10

Definition at line 471 of file nid.h.

#define PACKET3_NUM_INSTANCES 0x2F

Definition at line 494 of file nid.h.

#define PACKET3_ONE_REG_WRITE 0x57

Definition at line 559 of file nid.h.

#define PACKET3_PFP_SYNC_ME 0x42

Definition at line 505 of file nid.h.

#define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28)

Definition at line 553 of file nid.h.

#define PACKET3_PREAMBLE_CNTL 0x4A

Definition at line 552 of file nid.h.

#define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28)

Definition at line 554 of file nid.h.

#define PACKET3_PRED_EXEC 0x23

Definition at line 483 of file nid.h.

#define PACKET3_REG_RMW 0x21

Definition at line 481 of file nid.h.

#define PACKET3_SET_ALU_CONST 0x6A

Definition at line 566 of file nid.h.

#define PACKET3_SET_ALU_CONST_DI 0x72

Definition at line 585 of file nid.h.

#define PACKET3_SET_ALU_CONST_VS 0x71

Definition at line 584 of file nid.h.

#define PACKET3_SET_APPEND_CNT 0x75

Definition at line 588 of file nid.h.

#define PACKET3_SET_BASE 0x11

Definition at line 472 of file nid.h.

#define PACKET3_SET_BOOL_CONST 0x6B

Definition at line 568 of file nid.h.

#define PACKET3_SET_BOOL_CONST_END 0x0003a518

Definition at line 570 of file nid.h.

#define PACKET3_SET_BOOL_CONST_START 0x0003a500

Definition at line 569 of file nid.h.

#define PACKET3_SET_CONFIG_REG 0x68

Definition at line 560 of file nid.h.

#define PACKET3_SET_CONFIG_REG_END 0x0000ac00

Definition at line 562 of file nid.h.

#define PACKET3_SET_CONFIG_REG_START 0x00008000

Definition at line 561 of file nid.h.

#define PACKET3_SET_CONTEXT_REG 0x69

Definition at line 563 of file nid.h.

#define PACKET3_SET_CONTEXT_REG_END 0x00029000

Definition at line 565 of file nid.h.

#define PACKET3_SET_CONTEXT_REG_INDIRECT 0x73

Definition at line 586 of file nid.h.

#define PACKET3_SET_CONTEXT_REG_START 0x00028000

Definition at line 564 of file nid.h.

#define PACKET3_SET_CTL_CONST 0x6F

Definition at line 580 of file nid.h.

#define PACKET3_SET_CTL_CONST_END 0x0003ff0c

Definition at line 582 of file nid.h.

#define PACKET3_SET_CTL_CONST_START 0x0003cff0

Definition at line 581 of file nid.h.

#define PACKET3_SET_LOOP_CONST 0x6C

Definition at line 571 of file nid.h.

#define PACKET3_SET_LOOP_CONST_END 0x0003a500

Definition at line 573 of file nid.h.

#define PACKET3_SET_LOOP_CONST_START 0x0003a200

Definition at line 572 of file nid.h.

#define PACKET3_SET_PREDICATION 0x20

Definition at line 480 of file nid.h.

#define PACKET3_SET_RESOURCE 0x6D

Definition at line 574 of file nid.h.

#define PACKET3_SET_RESOURCE_END 0x00038000

Definition at line 576 of file nid.h.

#define PACKET3_SET_RESOURCE_INDIRECT 0x74

Definition at line 587 of file nid.h.

#define PACKET3_SET_RESOURCE_OFFSET 0x70

Definition at line 583 of file nid.h.

#define PACKET3_SET_RESOURCE_START 0x00030000

Definition at line 575 of file nid.h.

#define PACKET3_SET_SAMPLER 0x6E

Definition at line 577 of file nid.h.

#define PACKET3_SET_SAMPLER_END 0x0003c600

Definition at line 579 of file nid.h.

#define PACKET3_SET_SAMPLER_START 0x0003c000

Definition at line 578 of file nid.h.

#define PACKET3_SH_ACTION_ENA (1 << 27)

Definition at line 524 of file nid.h.

#define PACKET3_STRMOUT_BUFFER_UPDATE 0x34

Definition at line 497 of file nid.h.

#define PACKET3_SURFACE_SYNC 0x43

Definition at line 506 of file nid.h.

#define PACKET3_SX_ACTION_ENA (1 << 28)

Definition at line 525 of file nid.h.

#define PACKET3_TC_ACTION_ENA (1 << 23)

Definition at line 521 of file nid.h.

#define PACKET3_WAIT_REG_MEM 0x3C

Definition at line 503 of file nid.h.

#define PACKET3_WRITE_DATA 0x37

Definition at line 500 of file nid.h.

#define PACKET_TYPE0 0

Definition at line 448 of file nid.h.

#define PACKET_TYPE1 1

Definition at line 449 of file nid.h.

#define PACKET_TYPE2 2

Definition at line 450 of file nid.h.

#define PACKET_TYPE3 3

Definition at line 451 of file nid.h.

#define PAGE_TABLE_DEPTH ( x ) (((x) & 3) << 1)

Definition at line 82 of file nid.h.

#define PF_RQ_PENDING (1 << 8)

Definition at line 169 of file nid.h.

#define PIPE_INTERLEAVE_SIZE ( x ) ((x) << 4)

Definition at line 360 of file nid.h.

#define PIPE_INTERLEAVE_SIZE_MASK 0x00000070

Definition at line 361 of file nid.h.

#define PIPE_INTERLEAVE_SIZE_SHIFT 4

Definition at line 362 of file nid.h.

#define POSITION_BUFFER_SIZE ( x ) ((x) << 8)

Definition at line 328 of file nid.h.

#define RANGE_PROTECTION_FAULT_ENABLE_DEFAULT (1 << 4)

Definition at line 83 of file nid.h.

#define RB_BLKSZ ( x ) ((x) << 8)

Definition at line 411 of file nid.h.

#define RB_BUFSZ ( x ) ((x) << 0)

Definition at line 410 of file nid.h.

#define RB_NO_UPDATE (1 << 27)

Definition at line 412 of file nid.h.

#define RB_RPTR_WR_ENA (1 << 31)

Definition at line 413 of file nid.h.

#define REQUEST_TYPE ( x ) (((x) & 0xf) << 0)

Definition at line 54 of file nid.h.

#define RESPONSE_TYPE_MASK 0x000000F0

Definition at line 55 of file nid.h.

#define RESPONSE_TYPE_SHIFT 4

Definition at line 56 of file nid.h.

#define RING1_RQ_PENDING (1 << 6)

Definition at line 167 of file nid.h.

#define RING2_RQ_PENDING (1 << 4)

Definition at line 165 of file nid.h.

#define RINGID ( x ) (((x) & 0x3) << 0)

Definition at line 49 of file nid.h.

#define RLC_GFX_INDEX 0x3FC4

Definition at line 154 of file nid.h.

#define ROW_SIZE ( x ) ((x) << 28)

Definition at line 376 of file nid.h.

#define ROW_SIZE_MASK 0x30000000

Definition at line 377 of file nid.h.

#define ROW_SIZE_SHIFT 28

Definition at line 378 of file nid.h.

#define RUN_MASK (1 << 0)

Definition at line 130 of file nid.h.

#define SC_BUSY (1 << 24)

Definition at line 184 of file nid.h.

#define SC_EARLYZ_TILE_FIFO_SIZE ( x ) ((x) << 20)

Definition at line 288 of file nid.h.

#define SC_HIZ_TILE_FIFO_SIZE ( x ) ((x) << 12)

Definition at line 287 of file nid.h.

#define SC_PRIM_FIFO_SIZE ( x ) ((x) << 0)

Definition at line 286 of file nid.h.

#define SCRATCH_ADDR 0x8544

Definition at line 235 of file nid.h.

#define SCRATCH_REG0 0x8500

Definition at line 226 of file nid.h.

#define SCRATCH_REG1 0x8504

Definition at line 227 of file nid.h.

#define SCRATCH_REG2 0x8508

Definition at line 228 of file nid.h.

#define SCRATCH_REG3 0x850C

Definition at line 229 of file nid.h.

#define SCRATCH_REG4 0x8510

Definition at line 230 of file nid.h.

#define SCRATCH_REG5 0x8514

Definition at line 231 of file nid.h.

#define SCRATCH_REG6 0x8518

Definition at line 232 of file nid.h.

#define SCRATCH_REG7 0x851C

Definition at line 233 of file nid.h.

#define SCRATCH_UMSK 0x8540

Definition at line 234 of file nid.h.

#define SE_BROADCAST_WRITES (1 << 31)

Definition at line 224 of file nid.h.

#define SE_CB_BUSY (1 << 31)

Definition at line 204 of file nid.h.

#define SE_CB_CLEAN (1 << 2)

Definition at line 195 of file nid.h.

#define SE_DB_BUSY (1 << 30)

Definition at line 203 of file nid.h.

#define SE_DB_CLEAN (1 << 1)

Definition at line 194 of file nid.h.

#define SE_INDEX ( x ) ((x) << 16)

Definition at line 222 of file nid.h.

#define SE_PA_BUSY (1 << 24)

Definition at line 197 of file nid.h.

#define SE_SC_BUSY (1 << 29)

Definition at line 202 of file nid.h.

#define SE_SH_BUSY (1 << 28)

Definition at line 201 of file nid.h.

#define SE_SPI_BUSY (1 << 27)

Definition at line 200 of file nid.h.

#define SE_SX_BUSY (1 << 26)

Definition at line 199 of file nid.h.

#define SE_SX_CLEAN (1 << 0)

Definition at line 193 of file nid.h.

#define SE_TA_BUSY (1 << 25)

Definition at line 198 of file nid.h.

#define SE_VGT_BUSY (1 << 23)

Definition at line 196 of file nid.h.

#define SH_BUSY (1 << 21)

Definition at line 182 of file nid.h.

#define SHADER_ENGINE_TILE_SIZE ( x ) ((x) << 16)

Definition at line 367 of file nid.h.

#define SHADER_ENGINE_TILE_SIZE_MASK 0x00070000

Definition at line 368 of file nid.h.

#define SHADER_ENGINE_TILE_SIZE_SHIFT 16

Definition at line 369 of file nid.h.

#define SMX_BUFFER_SIZE ( x ) ((x) << 16)

Definition at line 329 of file nid.h.

#define SMX_DC_CTL0 0xA020

Definition at line 397 of file nid.h.

#define SMX_EVENT_CTL 0xA02C

Definition at line 402 of file nid.h.

#define SOFT_RESET_CB (1 << 1)

Definition at line 207 of file nid.h.

#define SOFT_RESET_CP (1 << 0)

Definition at line 206 of file nid.h.

#define SOFT_RESET_DB (1 << 3)

Definition at line 208 of file nid.h.

#define SOFT_RESET_GDS (1 << 4)

Definition at line 209 of file nid.h.

#define SOFT_RESET_IA (1 << 15)

Definition at line 218 of file nid.h.

#define SOFT_RESET_PA (1 << 5)

Definition at line 210 of file nid.h.

#define SOFT_RESET_SC (1 << 6)

Definition at line 211 of file nid.h.

#define SOFT_RESET_SH (1 << 9)

Definition at line 213 of file nid.h.

#define SOFT_RESET_SPI (1 << 8)

Definition at line 212 of file nid.h.

#define SOFT_RESET_SX (1 << 10)

Definition at line 214 of file nid.h.

#define SOFT_RESET_TA (1 << 12)

Definition at line 216 of file nid.h.

#define SOFT_RESET_TC (1 << 11)

Definition at line 215 of file nid.h.

#define SOFT_RESET_VGT (1 << 14)

Definition at line 217 of file nid.h.

#define SPI_BUSY (1 << 22)

Definition at line 183 of file nid.h.

#define SPI_CONFIG_CNTL 0x9100

Definition at line 333 of file nid.h.

#define SPI_CONFIG_CNTL_1 0x913C

Definition at line 335 of file nid.h.

#define SQ_CONFIG 0x8C00

Definition at line 293 of file nid.h.

#define SQ_CONST_MEM_BASE 0x8df8

Definition at line 324 of file nid.h.

#define SQ_DYN_GPR_CNTL_PS_FLUSH_REQ 0x8D8C

Definition at line 322 of file nid.h.

#define SQ_ESGS_RING_SIZE 0x8c44

Definition at line 303 of file nid.h.

#define SQ_ESTMP_RING_BASE 0x8c50

Definition at line 305 of file nid.h.

#define SQ_ESTMP_RING_SIZE 0x8c54

Definition at line 306 of file nid.h.

#define SQ_GPR_RESOURCE_MGMT_1 0x8C04

Definition at line 299 of file nid.h.

#define SQ_GSTMP_RING_BASE 0x8c58

Definition at line 307 of file nid.h.

#define SQ_GSTMP_RING_SIZE 0x8c5c

Definition at line 308 of file nid.h.

#define SQ_GSVS_RING_SIZE 0x8c4c

Definition at line 304 of file nid.h.

#define SQ_HSTMP_RING_BASE 0x8e18

Definition at line 320 of file nid.h.

#define SQ_HSTMP_RING_SIZE 0x8e1c

Definition at line 321 of file nid.h.

#define SQ_LSTMP_RING_BASE 0x8e10

Definition at line 318 of file nid.h.

#define SQ_LSTMP_RING_SIZE 0x8e14

Definition at line 319 of file nid.h.

#define SQ_MS_FIFO_SIZES 0x8CF0

Definition at line 313 of file nid.h.

#define SQ_PSTMP_RING_BASE 0x8c68

Definition at line 311 of file nid.h.

#define SQ_PSTMP_RING_SIZE 0x8c6c

Definition at line 312 of file nid.h.

#define SQ_VSTMP_RING_BASE 0x8c60

Definition at line 309 of file nid.h.

#define SQ_VSTMP_RING_SIZE 0x8c64

Definition at line 310 of file nid.h.

#define SRBM_GFX_CNTL 0x0E44

Definition at line 48 of file nid.h.

#define SRBM_RQ_PENDING (1 << 5)

Definition at line 166 of file nid.h.

#define SRBM_STATUS 0x0E50

Definition at line 51 of file nid.h.

#define STALL_ON_EVENT (1 << 11)

Definition at line 401 of file nid.h.

#define SX_BUSY (1 << 20)

Definition at line 181 of file nid.h.

#define SX_CLEAN (1 << 11)

Definition at line 172 of file nid.h.

#define SX_DEBUG_1 0x9058

Definition at line 330 of file nid.h.

#define SX_EXPORT_BUFFER_SIZES 0x900C

Definition at line 326 of file nid.h.

#define SYNC_FLUSH_CTL (1 << 8)

Definition at line 406 of file nid.h.

#define SYSTEM_ACCESS_MODE_IN_SYS (2 << 3)

Definition at line 108 of file nid.h.

#define SYSTEM_ACCESS_MODE_NOT_IN_SYS (3 << 3)

Definition at line 109 of file nid.h.

#define SYSTEM_ACCESS_MODE_PA_ONLY (0 << 3)

Definition at line 106 of file nid.h.

#define SYSTEM_ACCESS_MODE_USE_SYS_MAP (1 << 3)

Definition at line 107 of file nid.h.

#define SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU (0 << 5)

Definition at line 110 of file nid.h.

#define TA_BUSY (1 << 14)

Definition at line 175 of file nid.h.

#define TA_CNTL_AUX 0x9508

Definition at line 347 of file nid.h.

#define TC_ONLY 1

Definition at line 258 of file nid.h.

#define TCC_DISABLE_MASK 0xFFFF0000

Definition at line 342 of file nid.h.

#define TCC_DISABLE_SHIFT 16

Definition at line 343 of file nid.h.

#define TCP_CHAN_STEER_HI 0x9610

Definition at line 352 of file nid.h.

#define TCP_CHAN_STEER_LO 0x960c

Definition at line 351 of file nid.h.

#define TIME_STAMP_INT_ENABLE (1 << 26)

Definition at line 422 of file nid.h.

#define USE_HASH_FUNCTION (1 << 0)

Definition at line 398 of file nid.h.

#define VC_AND_TC 2

Definition at line 259 of file nid.h.

#define VC_ENABLE (1 << 0)

Definition at line 294 of file nid.h.

#define VC_ONLY 0

Definition at line 257 of file nid.h.

#define VGT_BUSY (1 << 17)

Definition at line 178 of file nid.h.

#define VGT_BUSY_NO_DMA (1 << 16)

Definition at line 177 of file nid.h.

#define VGT_CACHE_INVALIDATION 0x88C4

Definition at line 255 of file nid.h.

#define VGT_EVENT_INITIATOR 0x28a90

Definition at line 441 of file nid.h.

#define VGT_GS_VERTEX_REUSE 0x88D4

Definition at line 265 of file nid.h.

#define VGT_NUM_INSTANCES 0x8974

Definition at line 277 of file nid.h.

#define VGT_OFFCHIP_LDS_BASE 0x89b4

Definition at line 279 of file nid.h.

#define VGT_PRIMITIVE_TYPE 0x8958

Definition at line 276 of file nid.h.

#define VGT_TF_RING_SIZE 0x8988

Definition at line 278 of file nid.h.

#define VM_CONTEXT0_CNTL 0x1410

Definition at line 80 of file nid.h.

#define VM_CONTEXT0_CNTL2 0x1430

Definition at line 85 of file nid.h.

#define VM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x153C

Definition at line 91 of file nid.h.

#define VM_CONTEXT0_PAGE_TABLE_END_ADDR 0x157C

Definition at line 93 of file nid.h.

#define VM_CONTEXT0_PAGE_TABLE_START_ADDR 0x155C

Definition at line 92 of file nid.h.

#define VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR 0x1518

Definition at line 89 of file nid.h.

#define VM_CONTEXT0_REQUEST_RESPONSE 0x1470

Definition at line 53 of file nid.h.

#define VM_CONTEXT1_CNTL 0x1414

Definition at line 84 of file nid.h.

#define VM_CONTEXT1_CNTL2 0x1434

Definition at line 86 of file nid.h.

#define VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR 0x151c

Definition at line 90 of file nid.h.

#define VM_INVALIDATE_REQUEST 0x1478

Definition at line 87 of file nid.h.

#define VM_INVALIDATE_RESPONSE 0x147c

Definition at line 88 of file nid.h.

#define VM_L2_CNTL 0x1400

Definition at line 57 of file nid.h.

#define VM_L2_CNTL2 0x1404

Definition at line 70 of file nid.h.

#define VM_L2_CNTL3 0x1408

Definition at line 73 of file nid.h.

#define VM_L2_STATUS 0x140C

Definition at line 78 of file nid.h.

#define VMID ( x ) (((x) & 0x7) << 0)

Definition at line 50 of file nid.h.

#define VTX_DONE_DELAY ( x ) ((x) << 0)

Definition at line 336 of file nid.h.

Macros

Macro Definition Documentation