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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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#include <linux/err.h>#include <linux/io.h>#include <linux/kernel.h>#include <linux/i2c/twl.h>#include "voltage.h"#include "pm.h"Go to the source code of this file.
Functions | |
| int __init | omap4_twl_init (void) |
| int __init | omap3_twl_init (void) |
| int __init | omap3_twl_set_sr_bit (bool enable) |
| #define OMAP3430_VP1_VLIMITTO_VDDMAX 0x42 |
Definition at line 34 of file omap_twl.c.
| #define OMAP3430_VP1_VLIMITTO_VDDMIN 0x14 |
Definition at line 33 of file omap_twl.c.
| #define OMAP3430_VP2_VLIMITTO_VDDMAX 0x2c |
Definition at line 36 of file omap_twl.c.
| #define OMAP3430_VP2_VLIMITTO_VDDMIN 0x18 |
Definition at line 35 of file omap_twl.c.
| #define OMAP3630_VP1_VLIMITTO_VDDMAX 0x3c |
Definition at line 39 of file omap_twl.c.
| #define OMAP3630_VP1_VLIMITTO_VDDMIN 0x18 |
Definition at line 38 of file omap_twl.c.
| #define OMAP3630_VP2_VLIMITTO_VDDMAX 0x30 |
Definition at line 41 of file omap_twl.c.
| #define OMAP3630_VP2_VLIMITTO_VDDMIN 0x18 |
Definition at line 40 of file omap_twl.c.
| #define OMAP3_SRI2C_SLAVE_ADDR 0x12 |
OMAP and TWL PMIC specific intializations.
Copyright (C) 2010 Texas Instruments Incorporated. Thara Gopinath Copyright (C) 2009 Texas Instruments Incorporated. Nishanth Menon Copyright (C) 2009 Nokia Corporation Paul Walmsley
This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License version 2 as published by the Free Software Foundation.
Definition at line 25 of file omap_twl.c.
| #define OMAP3_VDD_CORE_SR_CONTROL_REG 0x01 |
Definition at line 27 of file omap_twl.c.
| #define OMAP3_VDD_MPU_SR_CONTROL_REG 0x00 |
Definition at line 26 of file omap_twl.c.
| #define OMAP3_VP_CONFIG_ERROROFFSET 0x00 |
Definition at line 28 of file omap_twl.c.
| #define OMAP3_VP_VLIMITTO_TIMEOUT_US 200 |
Definition at line 31 of file omap_twl.c.
| #define OMAP3_VP_VSTEPMAX_VSTEPMAX 0x04 |
Definition at line 30 of file omap_twl.c.
| #define OMAP3_VP_VSTEPMIN_VSTEPMIN 0x1 |
Definition at line 29 of file omap_twl.c.
| #define OMAP4_SRI2C_SLAVE_ADDR 0x12 |
Definition at line 43 of file omap_twl.c.
| #define OMAP4_VDD_CORE_SR_CMD_REG 0x62 |
Definition at line 49 of file omap_twl.c.
| #define OMAP4_VDD_CORE_SR_VOLT_REG 0x61 |
Definition at line 48 of file omap_twl.c.
| #define OMAP4_VDD_IVA_SR_CMD_REG 0x5C |
Definition at line 47 of file omap_twl.c.
| #define OMAP4_VDD_IVA_SR_VOLT_REG 0x5B |
Definition at line 46 of file omap_twl.c.
| #define OMAP4_VDD_MPU_SR_CMD_REG 0x56 |
Definition at line 45 of file omap_twl.c.
| #define OMAP4_VDD_MPU_SR_VOLT_REG 0x55 |
Definition at line 44 of file omap_twl.c.
| #define OMAP4_VP_CONFIG_ERROROFFSET 0x00 |
Definition at line 51 of file omap_twl.c.
| #define OMAP4_VP_CORE_VLIMITTO_VDDMAX 0x28 |
Definition at line 61 of file omap_twl.c.
| #define OMAP4_VP_CORE_VLIMITTO_VDDMIN 0xA |
Definition at line 60 of file omap_twl.c.
| #define OMAP4_VP_IVA_VLIMITTO_VDDMAX 0x2D |
Definition at line 59 of file omap_twl.c.
| #define OMAP4_VP_IVA_VLIMITTO_VDDMIN 0xA |
Definition at line 58 of file omap_twl.c.
| #define OMAP4_VP_MPU_VLIMITTO_VDDMAX 0x39 |
Definition at line 57 of file omap_twl.c.
| #define OMAP4_VP_MPU_VLIMITTO_VDDMIN 0xA |
Definition at line 56 of file omap_twl.c.
| #define OMAP4_VP_VLIMITTO_TIMEOUT_US 200 |
Definition at line 54 of file omap_twl.c.
| #define OMAP4_VP_VSTEPMAX_VSTEPMAX 0x04 |
Definition at line 53 of file omap_twl.c.
| #define OMAP4_VP_VSTEPMIN_VSTEPMIN 0x01 |
Definition at line 52 of file omap_twl.c.
| #define REG_SMPS_OFFSET 0xE0 |
Definition at line 72 of file omap_twl.c.
| #define SMARTREFLEX_ENABLE BIT(3) |
Definition at line 73 of file omap_twl.c.
| #define TWL4030_DCDC_GLOBAL_CFG 0x06 |
Definition at line 71 of file omap_twl.c.
Definition at line 284 of file omap_twl.c.
omap3_twl_set_sr_bit() - Set/Clear SR bit on TWL : enable SR mode in twl or not
If 'enable' is true, enables Smartreflex bit on TWL 4030 to make sure voltage scaling through OMAP SR works. Else, the smartreflex bit on twl4030 is cleared as there are platforms which use OMAP3 and T2 but use Synchronized Scaling Hardware Strategy (ENABLE_VMODE=1) and Direct Strategy Software Scaling Mode (ENABLE_VMODE=0), for setting the voltages, in those scenarios this bit is to be cleared (enable = false).
Returns 0 on success, error is returned if I2C read/write fails.
Definition at line 332 of file omap_twl.c.
Definition at line 265 of file omap_twl.c.
1.8.2