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Macros
onenand_regs.h File Reference

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Macros

#define ONENAND_MEMORY_MAP(x)   ((x) << 1)
 
#define ONENAND_BOOTRAM   ONENAND_MEMORY_MAP(0x0000)
 
#define ONENAND_DATARAM   ONENAND_MEMORY_MAP(0x0200)
 
#define ONENAND_SPARERAM   ONENAND_MEMORY_MAP(0x8010)
 
#define ONENAND_REG_MANUFACTURER_ID   ONENAND_MEMORY_MAP(0xF000)
 
#define ONENAND_REG_DEVICE_ID   ONENAND_MEMORY_MAP(0xF001)
 
#define ONENAND_REG_VERSION_ID   ONENAND_MEMORY_MAP(0xF002)
 
#define ONENAND_REG_DATA_BUFFER_SIZE   ONENAND_MEMORY_MAP(0xF003)
 
#define ONENAND_REG_BOOT_BUFFER_SIZE   ONENAND_MEMORY_MAP(0xF004)
 
#define ONENAND_REG_NUM_BUFFERS   ONENAND_MEMORY_MAP(0xF005)
 
#define ONENAND_REG_TECHNOLOGY   ONENAND_MEMORY_MAP(0xF006)
 
#define ONENAND_REG_START_ADDRESS1   ONENAND_MEMORY_MAP(0xF100)
 
#define ONENAND_REG_START_ADDRESS2   ONENAND_MEMORY_MAP(0xF101)
 
#define ONENAND_REG_START_ADDRESS3   ONENAND_MEMORY_MAP(0xF102)
 
#define ONENAND_REG_START_ADDRESS4   ONENAND_MEMORY_MAP(0xF103)
 
#define ONENAND_REG_START_ADDRESS5   ONENAND_MEMORY_MAP(0xF104)
 
#define ONENAND_REG_START_ADDRESS6   ONENAND_MEMORY_MAP(0xF105)
 
#define ONENAND_REG_START_ADDRESS7   ONENAND_MEMORY_MAP(0xF106)
 
#define ONENAND_REG_START_ADDRESS8   ONENAND_MEMORY_MAP(0xF107)
 
#define ONENAND_REG_START_BUFFER   ONENAND_MEMORY_MAP(0xF200)
 
#define ONENAND_REG_COMMAND   ONENAND_MEMORY_MAP(0xF220)
 
#define ONENAND_REG_SYS_CFG1   ONENAND_MEMORY_MAP(0xF221)
 
#define ONENAND_REG_SYS_CFG2   ONENAND_MEMORY_MAP(0xF222)
 
#define ONENAND_REG_CTRL_STATUS   ONENAND_MEMORY_MAP(0xF240)
 
#define ONENAND_REG_INTERRUPT   ONENAND_MEMORY_MAP(0xF241)
 
#define ONENAND_REG_START_BLOCK_ADDRESS   ONENAND_MEMORY_MAP(0xF24C)
 
#define ONENAND_REG_END_BLOCK_ADDRESS   ONENAND_MEMORY_MAP(0xF24D)
 
#define ONENAND_REG_WP_STATUS   ONENAND_MEMORY_MAP(0xF24E)
 
#define ONENAND_REG_ECC_STATUS   ONENAND_MEMORY_MAP(0xFF00)
 
#define ONENAND_REG_ECC_M0   ONENAND_MEMORY_MAP(0xFF01)
 
#define ONENAND_REG_ECC_S0   ONENAND_MEMORY_MAP(0xFF02)
 
#define ONENAND_REG_ECC_M1   ONENAND_MEMORY_MAP(0xFF03)
 
#define ONENAND_REG_ECC_S1   ONENAND_MEMORY_MAP(0xFF04)
 
#define ONENAND_REG_ECC_M2   ONENAND_MEMORY_MAP(0xFF05)
 
#define ONENAND_REG_ECC_S2   ONENAND_MEMORY_MAP(0xFF06)
 
#define ONENAND_REG_ECC_M3   ONENAND_MEMORY_MAP(0xFF07)
 
#define ONENAND_REG_ECC_S3   ONENAND_MEMORY_MAP(0xFF08)
 
#define DEVICE_IS_FLEXONENAND   (1 << 9)
 
#define FLEXONENAND_PI_MASK   (0x3ff)
 
#define FLEXONENAND_PI_UNLOCK_SHIFT   (14)
 
#define ONENAND_DEVICE_DENSITY_MASK   (0xf)
 
#define ONENAND_DEVICE_DENSITY_SHIFT   (4)
 
#define ONENAND_DEVICE_IS_DDP   (1 << 3)
 
#define ONENAND_DEVICE_IS_DEMUX   (1 << 2)
 
#define ONENAND_DEVICE_VCC_MASK   (0x3)
 
#define ONENAND_DEVICE_DENSITY_512Mb   (0x002)
 
#define ONENAND_DEVICE_DENSITY_1Gb   (0x003)
 
#define ONENAND_DEVICE_DENSITY_2Gb   (0x004)
 
#define ONENAND_DEVICE_DENSITY_4Gb   (0x005)
 
#define ONENAND_VERSION_PROCESS_SHIFT   (8)
 
#define ONENAND_TECHNOLOGY_IS_MLC   (1 << 0)
 
#define ONENAND_DDP_SHIFT   (15)
 
#define ONENAND_DDP_CHIP0   (0)
 
#define ONENAND_DDP_CHIP1   (1 << ONENAND_DDP_SHIFT)
 
#define ONENAND_FPA_MASK   (0x7f)
 
#define ONENAND_FPA_SHIFT   (2)
 
#define ONENAND_FSA_MASK   (0x03)
 
#define ONENAND_BSA_MASK   (0x03)
 
#define ONENAND_BSA_SHIFT   (8)
 
#define ONENAND_BSA_BOOTRAM   (0 << 2)
 
#define ONENAND_BSA_DATARAM0   (2 << 2)
 
#define ONENAND_BSA_DATARAM1   (3 << 2)
 
#define ONENAND_BSC_MASK   (0x07)
 
#define ONENAND_CMD_READ   (0x00)
 
#define ONENAND_CMD_READOOB   (0x13)
 
#define ONENAND_CMD_PROG   (0x80)
 
#define ONENAND_CMD_PROGOOB   (0x1A)
 
#define ONENAND_CMD_2X_PROG   (0x7D)
 
#define ONENAND_CMD_2X_CACHE_PROG   (0x7F)
 
#define ONENAND_CMD_UNLOCK   (0x23)
 
#define ONENAND_CMD_LOCK   (0x2A)
 
#define ONENAND_CMD_LOCK_TIGHT   (0x2C)
 
#define ONENAND_CMD_UNLOCK_ALL   (0x27)
 
#define ONENAND_CMD_ERASE   (0x94)
 
#define ONENAND_CMD_MULTIBLOCK_ERASE   (0x95)
 
#define ONENAND_CMD_ERASE_VERIFY   (0x71)
 
#define ONENAND_CMD_RESET   (0xF0)
 
#define ONENAND_CMD_OTP_ACCESS   (0x65)
 
#define ONENAND_CMD_READID   (0x90)
 
#define FLEXONENAND_CMD_PI_UPDATE   (0x05)
 
#define FLEXONENAND_CMD_PI_ACCESS   (0x66)
 
#define FLEXONENAND_CMD_RECOVER_LSB   (0x05)
 
#define ONENAND_CMD_BUFFERRAM   (0x1978)
 
#define FLEXONENAND_CMD_READ_PI   (0x1985)
 
#define ONENAND_SYS_CFG1_SYNC_READ   (1 << 15)
 
#define ONENAND_SYS_CFG1_BRL_7   (7 << 12)
 
#define ONENAND_SYS_CFG1_BRL_6   (6 << 12)
 
#define ONENAND_SYS_CFG1_BRL_5   (5 << 12)
 
#define ONENAND_SYS_CFG1_BRL_4   (4 << 12)
 
#define ONENAND_SYS_CFG1_BRL_3   (3 << 12)
 
#define ONENAND_SYS_CFG1_BRL_10   (2 << 12)
 
#define ONENAND_SYS_CFG1_BRL_9   (1 << 12)
 
#define ONENAND_SYS_CFG1_BRL_8   (0 << 12)
 
#define ONENAND_SYS_CFG1_BRL_SHIFT   (12)
 
#define ONENAND_SYS_CFG1_BL_32   (4 << 9)
 
#define ONENAND_SYS_CFG1_BL_16   (3 << 9)
 
#define ONENAND_SYS_CFG1_BL_8   (2 << 9)
 
#define ONENAND_SYS_CFG1_BL_4   (1 << 9)
 
#define ONENAND_SYS_CFG1_BL_CONT   (0 << 9)
 
#define ONENAND_SYS_CFG1_BL_SHIFT   (9)
 
#define ONENAND_SYS_CFG1_NO_ECC   (1 << 8)
 
#define ONENAND_SYS_CFG1_RDY   (1 << 7)
 
#define ONENAND_SYS_CFG1_INT   (1 << 6)
 
#define ONENAND_SYS_CFG1_IOBE   (1 << 5)
 
#define ONENAND_SYS_CFG1_RDY_CONF   (1 << 4)
 
#define ONENAND_SYS_CFG1_VHF   (1 << 3)
 
#define ONENAND_SYS_CFG1_HF   (1 << 2)
 
#define ONENAND_SYS_CFG1_SYNC_WRITE   (1 << 1)
 
#define ONENAND_CTRL_ONGO   (1 << 15)
 
#define ONENAND_CTRL_LOCK   (1 << 14)
 
#define ONENAND_CTRL_LOAD   (1 << 13)
 
#define ONENAND_CTRL_PROGRAM   (1 << 12)
 
#define ONENAND_CTRL_ERASE   (1 << 11)
 
#define ONENAND_CTRL_ERROR   (1 << 10)
 
#define ONENAND_CTRL_RSTB   (1 << 7)
 
#define ONENAND_CTRL_OTP_L   (1 << 6)
 
#define ONENAND_CTRL_OTP_BL   (1 << 5)
 
#define ONENAND_INT_MASTER   (1 << 15)
 
#define ONENAND_INT_READ   (1 << 7)
 
#define ONENAND_INT_WRITE   (1 << 6)
 
#define ONENAND_INT_ERASE   (1 << 5)
 
#define ONENAND_INT_RESET   (1 << 4)
 
#define ONENAND_INT_CLEAR   (0 << 0)
 
#define ONENAND_WP_US   (1 << 2)
 
#define ONENAND_WP_LS   (1 << 1)
 
#define ONENAND_WP_LTS   (1 << 0)
 
#define ONENAND_ECC_1BIT   (1 << 0)
 
#define ONENAND_ECC_1BIT_ALL   (0x5555)
 
#define ONENAND_ECC_2BIT   (1 << 1)
 
#define ONENAND_ECC_2BIT_ALL   (0xAAAA)
 
#define FLEXONENAND_UNCORRECTABLE_ERROR   (0x1010)
 
#define ONENAND_ECC_3BIT   (1 << 2)
 
#define ONENAND_ECC_4BIT   (1 << 3)
 
#define ONENAND_ECC_4BIT_UNCORRECTABLE   (0x1010)
 
#define FLEXONENAND_OTP_LOCK_OFFSET   (2048)
 
#define ONENAND_OTP_LOCK_OFFSET   (14)
 

Macro Definition Documentation

#define DEVICE_IS_FLEXONENAND   (1 << 9)

Definition at line 70 of file onenand_regs.h.

#define FLEXONENAND_CMD_PI_ACCESS   (0x66)

Definition at line 140 of file onenand_regs.h.

#define FLEXONENAND_CMD_PI_UPDATE   (0x05)

Definition at line 139 of file onenand_regs.h.

#define FLEXONENAND_CMD_READ_PI   (0x1985)

Definition at line 145 of file onenand_regs.h.

#define FLEXONENAND_CMD_RECOVER_LSB   (0x05)

Definition at line 141 of file onenand_regs.h.

#define FLEXONENAND_OTP_LOCK_OFFSET   (2048)

Definition at line 220 of file onenand_regs.h.

#define FLEXONENAND_PI_MASK   (0x3ff)

Definition at line 71 of file onenand_regs.h.

#define FLEXONENAND_PI_UNLOCK_SHIFT   (14)

Definition at line 72 of file onenand_regs.h.

#define FLEXONENAND_UNCORRECTABLE_ERROR   (0x1010)

Definition at line 212 of file onenand_regs.h.

#define ONENAND_BOOTRAM   ONENAND_MEMORY_MAP(0x0000)

Definition at line 23 of file onenand_regs.h.

#define ONENAND_BSA_BOOTRAM   (0 << 2)

Definition at line 114 of file onenand_regs.h.

#define ONENAND_BSA_DATARAM0   (2 << 2)

Definition at line 115 of file onenand_regs.h.

#define ONENAND_BSA_DATARAM1   (3 << 2)

Definition at line 116 of file onenand_regs.h.

#define ONENAND_BSA_MASK   (0x03)

Definition at line 112 of file onenand_regs.h.

#define ONENAND_BSA_SHIFT   (8)

Definition at line 113 of file onenand_regs.h.

#define ONENAND_BSC_MASK   (0x07)

Definition at line 118 of file onenand_regs.h.

#define ONENAND_CMD_2X_CACHE_PROG   (0x7F)

Definition at line 128 of file onenand_regs.h.

#define ONENAND_CMD_2X_PROG   (0x7D)

Definition at line 127 of file onenand_regs.h.

#define ONENAND_CMD_BUFFERRAM   (0x1978)

Definition at line 144 of file onenand_regs.h.

#define ONENAND_CMD_ERASE   (0x94)

Definition at line 133 of file onenand_regs.h.

#define ONENAND_CMD_ERASE_VERIFY   (0x71)

Definition at line 135 of file onenand_regs.h.

#define ONENAND_CMD_LOCK   (0x2A)

Definition at line 130 of file onenand_regs.h.

#define ONENAND_CMD_LOCK_TIGHT   (0x2C)

Definition at line 131 of file onenand_regs.h.

#define ONENAND_CMD_MULTIBLOCK_ERASE   (0x95)

Definition at line 134 of file onenand_regs.h.

#define ONENAND_CMD_OTP_ACCESS   (0x65)

Definition at line 137 of file onenand_regs.h.

#define ONENAND_CMD_PROG   (0x80)

Definition at line 125 of file onenand_regs.h.

#define ONENAND_CMD_PROGOOB   (0x1A)

Definition at line 126 of file onenand_regs.h.

#define ONENAND_CMD_READ   (0x00)

Definition at line 123 of file onenand_regs.h.

#define ONENAND_CMD_READID   (0x90)

Definition at line 138 of file onenand_regs.h.

#define ONENAND_CMD_READOOB   (0x13)

Definition at line 124 of file onenand_regs.h.

#define ONENAND_CMD_RESET   (0xF0)

Definition at line 136 of file onenand_regs.h.

#define ONENAND_CMD_UNLOCK   (0x23)

Definition at line 129 of file onenand_regs.h.

#define ONENAND_CMD_UNLOCK_ALL   (0x27)

Definition at line 132 of file onenand_regs.h.

#define ONENAND_CTRL_ERASE   (1 << 11)

Definition at line 182 of file onenand_regs.h.

#define ONENAND_CTRL_ERROR   (1 << 10)

Definition at line 183 of file onenand_regs.h.

#define ONENAND_CTRL_LOAD   (1 << 13)

Definition at line 180 of file onenand_regs.h.

#define ONENAND_CTRL_LOCK   (1 << 14)

Definition at line 179 of file onenand_regs.h.

#define ONENAND_CTRL_ONGO   (1 << 15)

Definition at line 178 of file onenand_regs.h.

#define ONENAND_CTRL_OTP_BL   (1 << 5)

Definition at line 186 of file onenand_regs.h.

#define ONENAND_CTRL_OTP_L   (1 << 6)

Definition at line 185 of file onenand_regs.h.

#define ONENAND_CTRL_PROGRAM   (1 << 12)

Definition at line 181 of file onenand_regs.h.

#define ONENAND_CTRL_RSTB   (1 << 7)

Definition at line 184 of file onenand_regs.h.

#define ONENAND_DATARAM   ONENAND_MEMORY_MAP(0x0200)

Definition at line 24 of file onenand_regs.h.

#define ONENAND_DDP_CHIP0   (0)

Definition at line 98 of file onenand_regs.h.

#define ONENAND_DDP_CHIP1   (1 << ONENAND_DDP_SHIFT)

Definition at line 99 of file onenand_regs.h.

#define ONENAND_DDP_SHIFT   (15)

Definition at line 97 of file onenand_regs.h.

#define ONENAND_DEVICE_DENSITY_1Gb   (0x003)

Definition at line 80 of file onenand_regs.h.

#define ONENAND_DEVICE_DENSITY_2Gb   (0x004)

Definition at line 81 of file onenand_regs.h.

#define ONENAND_DEVICE_DENSITY_4Gb   (0x005)

Definition at line 82 of file onenand_regs.h.

#define ONENAND_DEVICE_DENSITY_512Mb   (0x002)

Definition at line 79 of file onenand_regs.h.

#define ONENAND_DEVICE_DENSITY_MASK   (0xf)

Definition at line 73 of file onenand_regs.h.

#define ONENAND_DEVICE_DENSITY_SHIFT   (4)

Definition at line 74 of file onenand_regs.h.

#define ONENAND_DEVICE_IS_DDP   (1 << 3)

Definition at line 75 of file onenand_regs.h.

#define ONENAND_DEVICE_IS_DEMUX   (1 << 2)

Definition at line 76 of file onenand_regs.h.

#define ONENAND_DEVICE_VCC_MASK   (0x3)

Definition at line 77 of file onenand_regs.h.

#define ONENAND_ECC_1BIT   (1 << 0)

Definition at line 208 of file onenand_regs.h.

#define ONENAND_ECC_1BIT_ALL   (0x5555)

Definition at line 209 of file onenand_regs.h.

#define ONENAND_ECC_2BIT   (1 << 1)

Definition at line 210 of file onenand_regs.h.

#define ONENAND_ECC_2BIT_ALL   (0xAAAA)

Definition at line 211 of file onenand_regs.h.

#define ONENAND_ECC_3BIT   (1 << 2)

Definition at line 213 of file onenand_regs.h.

#define ONENAND_ECC_4BIT   (1 << 3)

Definition at line 214 of file onenand_regs.h.

#define ONENAND_ECC_4BIT_UNCORRECTABLE   (0x1010)

Definition at line 215 of file onenand_regs.h.

#define ONENAND_FPA_MASK   (0x7f)

Definition at line 105 of file onenand_regs.h.

#define ONENAND_FPA_SHIFT   (2)

Definition at line 106 of file onenand_regs.h.

#define ONENAND_FSA_MASK   (0x03)

Definition at line 107 of file onenand_regs.h.

#define ONENAND_INT_CLEAR   (0 << 0)

Definition at line 196 of file onenand_regs.h.

#define ONENAND_INT_ERASE   (1 << 5)

Definition at line 194 of file onenand_regs.h.

#define ONENAND_INT_MASTER   (1 << 15)

Definition at line 191 of file onenand_regs.h.

#define ONENAND_INT_READ   (1 << 7)

Definition at line 192 of file onenand_regs.h.

#define ONENAND_INT_RESET   (1 << 4)

Definition at line 195 of file onenand_regs.h.

#define ONENAND_INT_WRITE   (1 << 6)

Definition at line 193 of file onenand_regs.h.

#define ONENAND_MEMORY_MAP (   x)    ((x) << 1)

Definition at line 18 of file onenand_regs.h.

#define ONENAND_OTP_LOCK_OFFSET   (14)

Definition at line 221 of file onenand_regs.h.

#define ONENAND_REG_BOOT_BUFFER_SIZE   ONENAND_MEMORY_MAP(0xF004)

Definition at line 34 of file onenand_regs.h.

#define ONENAND_REG_COMMAND   ONENAND_MEMORY_MAP(0xF220)

Definition at line 48 of file onenand_regs.h.

#define ONENAND_REG_CTRL_STATUS   ONENAND_MEMORY_MAP(0xF240)

Definition at line 51 of file onenand_regs.h.

#define ONENAND_REG_DATA_BUFFER_SIZE   ONENAND_MEMORY_MAP(0xF003)

Definition at line 33 of file onenand_regs.h.

#define ONENAND_REG_DEVICE_ID   ONENAND_MEMORY_MAP(0xF001)

Definition at line 31 of file onenand_regs.h.

#define ONENAND_REG_ECC_M0   ONENAND_MEMORY_MAP(0xFF01)

Definition at line 58 of file onenand_regs.h.

#define ONENAND_REG_ECC_M1   ONENAND_MEMORY_MAP(0xFF03)

Definition at line 60 of file onenand_regs.h.

#define ONENAND_REG_ECC_M2   ONENAND_MEMORY_MAP(0xFF05)

Definition at line 62 of file onenand_regs.h.

#define ONENAND_REG_ECC_M3   ONENAND_MEMORY_MAP(0xFF07)

Definition at line 64 of file onenand_regs.h.

#define ONENAND_REG_ECC_S0   ONENAND_MEMORY_MAP(0xFF02)

Definition at line 59 of file onenand_regs.h.

#define ONENAND_REG_ECC_S1   ONENAND_MEMORY_MAP(0xFF04)

Definition at line 61 of file onenand_regs.h.

#define ONENAND_REG_ECC_S2   ONENAND_MEMORY_MAP(0xFF06)

Definition at line 63 of file onenand_regs.h.

#define ONENAND_REG_ECC_S3   ONENAND_MEMORY_MAP(0xFF08)

Definition at line 65 of file onenand_regs.h.

#define ONENAND_REG_ECC_STATUS   ONENAND_MEMORY_MAP(0xFF00)

Definition at line 57 of file onenand_regs.h.

#define ONENAND_REG_END_BLOCK_ADDRESS   ONENAND_MEMORY_MAP(0xF24D)

Definition at line 54 of file onenand_regs.h.

#define ONENAND_REG_INTERRUPT   ONENAND_MEMORY_MAP(0xF241)

Definition at line 52 of file onenand_regs.h.

#define ONENAND_REG_MANUFACTURER_ID   ONENAND_MEMORY_MAP(0xF000)

Definition at line 30 of file onenand_regs.h.

#define ONENAND_REG_NUM_BUFFERS   ONENAND_MEMORY_MAP(0xF005)

Definition at line 35 of file onenand_regs.h.

#define ONENAND_REG_START_ADDRESS1   ONENAND_MEMORY_MAP(0xF100)

Definition at line 38 of file onenand_regs.h.

#define ONENAND_REG_START_ADDRESS2   ONENAND_MEMORY_MAP(0xF101)

Definition at line 39 of file onenand_regs.h.

#define ONENAND_REG_START_ADDRESS3   ONENAND_MEMORY_MAP(0xF102)

Definition at line 40 of file onenand_regs.h.

#define ONENAND_REG_START_ADDRESS4   ONENAND_MEMORY_MAP(0xF103)

Definition at line 41 of file onenand_regs.h.

#define ONENAND_REG_START_ADDRESS5   ONENAND_MEMORY_MAP(0xF104)

Definition at line 42 of file onenand_regs.h.

#define ONENAND_REG_START_ADDRESS6   ONENAND_MEMORY_MAP(0xF105)

Definition at line 43 of file onenand_regs.h.

#define ONENAND_REG_START_ADDRESS7   ONENAND_MEMORY_MAP(0xF106)

Definition at line 44 of file onenand_regs.h.

#define ONENAND_REG_START_ADDRESS8   ONENAND_MEMORY_MAP(0xF107)

Definition at line 45 of file onenand_regs.h.

#define ONENAND_REG_START_BLOCK_ADDRESS   ONENAND_MEMORY_MAP(0xF24C)

Definition at line 53 of file onenand_regs.h.

#define ONENAND_REG_START_BUFFER   ONENAND_MEMORY_MAP(0xF200)

Definition at line 47 of file onenand_regs.h.

#define ONENAND_REG_SYS_CFG1   ONENAND_MEMORY_MAP(0xF221)

Definition at line 49 of file onenand_regs.h.

#define ONENAND_REG_SYS_CFG2   ONENAND_MEMORY_MAP(0xF222)

Definition at line 50 of file onenand_regs.h.

#define ONENAND_REG_TECHNOLOGY   ONENAND_MEMORY_MAP(0xF006)

Definition at line 36 of file onenand_regs.h.

#define ONENAND_REG_VERSION_ID   ONENAND_MEMORY_MAP(0xF002)

Definition at line 32 of file onenand_regs.h.

#define ONENAND_REG_WP_STATUS   ONENAND_MEMORY_MAP(0xF24E)

Definition at line 55 of file onenand_regs.h.

#define ONENAND_SPARERAM   ONENAND_MEMORY_MAP(0x8010)

Definition at line 25 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_BL_16   (3 << 9)

Definition at line 161 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_BL_32   (4 << 9)

Definition at line 160 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_BL_4   (1 << 9)

Definition at line 163 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_BL_8   (2 << 9)

Definition at line 162 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_BL_CONT   (0 << 9)

Definition at line 164 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_BL_SHIFT   (9)

Definition at line 165 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_BRL_10   (2 << 12)

Definition at line 156 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_BRL_3   (3 << 12)

Definition at line 155 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_BRL_4   (4 << 12)

Definition at line 154 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_BRL_5   (5 << 12)

Definition at line 153 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_BRL_6   (6 << 12)

Definition at line 152 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_BRL_7   (7 << 12)

Definition at line 151 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_BRL_8   (0 << 12)

Definition at line 158 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_BRL_9   (1 << 12)

Definition at line 157 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_BRL_SHIFT   (12)

Definition at line 159 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_HF   (1 << 2)

Definition at line 172 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_INT   (1 << 6)

Definition at line 168 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_IOBE   (1 << 5)

Definition at line 169 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_NO_ECC   (1 << 8)

Definition at line 166 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_RDY   (1 << 7)

Definition at line 167 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_RDY_CONF   (1 << 4)

Definition at line 170 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_SYNC_READ   (1 << 15)

Definition at line 150 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_SYNC_WRITE   (1 << 1)

Definition at line 173 of file onenand_regs.h.

#define ONENAND_SYS_CFG1_VHF   (1 << 3)

Definition at line 171 of file onenand_regs.h.

#define ONENAND_TECHNOLOGY_IS_MLC   (1 << 0)

Definition at line 92 of file onenand_regs.h.

#define ONENAND_VERSION_PROCESS_SHIFT   (8)

Definition at line 87 of file onenand_regs.h.

#define ONENAND_WP_LS   (1 << 1)

Definition at line 202 of file onenand_regs.h.

#define ONENAND_WP_LTS   (1 << 0)

Definition at line 203 of file onenand_regs.h.

#define ONENAND_WP_US   (1 << 2)

Definition at line 201 of file onenand_regs.h.