Linux Kernel
3.7.1
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#include <linux/fs.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/cdev.h>
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/mutex.h>
#include <linux/nsc_gpio.h>
#include <linux/platform_device.h>
#include <asm/uaccess.h>
Go to the source code of this file.
Macros | |
#define | DEVNAME "pc8736x_gpio" |
#define | SIO_BASE1 0x2E /* 1st command-reg to check */ |
#define | SIO_BASE2 0x4E /* alt command-reg to check */ |
#define | SIO_SID 0x20 /* SuperI/O ID Register */ |
#define | SIO_SID_PC87365 0xe5 /* Expected value in ID Register for PC87365 */ |
#define | SIO_SID_PC87366 0xe9 /* Expected value in ID Register for PC87366 */ |
#define | SIO_CF1 0x21 /* chip config, bit0 is chip enable */ |
#define | PC8736X_GPIO_RANGE 16 /* ioaddr range */ |
#define | PC8736X_GPIO_CT 32 /* minors matching 4 8 bit ports */ |
#define | SIO_UNIT_SEL 0x7 /* unit select reg */ |
#define | SIO_UNIT_ACT 0x30 /* unit enable */ |
#define | SIO_GPIO_UNIT 0x7 /* unit number of GPIO */ |
#define | SIO_VLM_UNIT 0x0D |
#define | SIO_TMS_UNIT 0x0E |
#define | SIO_BASE_HADDR 0x60 |
#define | SIO_BASE_LADDR 0x61 |
#define | SIO_GPIO_PIN_SELECT 0xF0 |
#define | SIO_GPIO_PIN_CONFIG 0xF1 |
#define | SIO_GPIO_PIN_EVENT 0xF2 |
#define | PORT_OUT 0 |
#define | PORT_IN 1 |
#define | PORT_EVT_EN 2 |
#define | PORT_EVT_STST 3 |
Functions | |
MODULE_AUTHOR ("Jim Cromie <jim.cromie@gmail.com>") | |
MODULE_DESCRIPTION ("NatSemi/Winbond PC-8736x GPIO Pin Driver") | |
MODULE_LICENSE ("GPL") | |
module_param (major, int, 0) | |
MODULE_PARM_DESC (major,"Major device number") | |
module_init (pc8736x_gpio_init) | |
module_exit (pc8736x_gpio_cleanup) | |
#define DEVNAME "pc8736x_gpio" |
Definition at line 25 of file pc8736x_gpio.c.
Definition at line 49 of file pc8736x_gpio.c.
#define PC8736X_GPIO_RANGE 16 /* ioaddr range */ |
Definition at line 48 of file pc8736x_gpio.c.
#define PORT_EVT_EN 2 |
Definition at line 75 of file pc8736x_gpio.c.
#define PORT_EVT_STST 3 |
Definition at line 76 of file pc8736x_gpio.c.
#define PORT_IN 1 |
Definition at line 74 of file pc8736x_gpio.c.
#define PORT_OUT 0 |
Definition at line 73 of file pc8736x_gpio.c.
#define SIO_BASE1 0x2E /* 1st command-reg to check */ |
Definition at line 39 of file pc8736x_gpio.c.
#define SIO_BASE2 0x4E /* alt command-reg to check */ |
Definition at line 40 of file pc8736x_gpio.c.
#define SIO_BASE_HADDR 0x60 |
Definition at line 58 of file pc8736x_gpio.c.
#define SIO_BASE_LADDR 0x61 |
Definition at line 59 of file pc8736x_gpio.c.
#define SIO_CF1 0x21 /* chip config, bit0 is chip enable */ |
Definition at line 46 of file pc8736x_gpio.c.
#define SIO_GPIO_PIN_CONFIG 0xF1 |
Definition at line 63 of file pc8736x_gpio.c.
#define SIO_GPIO_PIN_EVENT 0xF2 |
Definition at line 64 of file pc8736x_gpio.c.
#define SIO_GPIO_PIN_SELECT 0xF0 |
Definition at line 62 of file pc8736x_gpio.c.
#define SIO_GPIO_UNIT 0x7 /* unit number of GPIO */ |
Definition at line 53 of file pc8736x_gpio.c.
#define SIO_SID 0x20 /* SuperI/O ID Register */ |
Definition at line 42 of file pc8736x_gpio.c.
#define SIO_SID_PC87365 0xe5 /* Expected value in ID Register for PC87365 */ |
Definition at line 43 of file pc8736x_gpio.c.
#define SIO_SID_PC87366 0xe9 /* Expected value in ID Register for PC87366 */ |
Definition at line 44 of file pc8736x_gpio.c.
#define SIO_TMS_UNIT 0x0E |
Definition at line 55 of file pc8736x_gpio.c.
#define SIO_UNIT_ACT 0x30 /* unit enable */ |
Definition at line 52 of file pc8736x_gpio.c.
#define SIO_UNIT_SEL 0x7 /* unit select reg */ |
Definition at line 51 of file pc8736x_gpio.c.
#define SIO_VLM_UNIT 0x0D |
Definition at line 54 of file pc8736x_gpio.c.
MODULE_AUTHOR | ( | "Jim Cromie <jim.cromie@gmail.com>" | ) |
MODULE_DESCRIPTION | ( | "NatSemi/Winbond PC-8736x GPIO Pin Driver" | ) |
module_exit | ( | pc8736x_gpio_cleanup | ) |
module_init | ( | pc8736x_gpio_init | ) |
MODULE_LICENSE | ( | "GPL" | ) |