#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/fs.h>
#include <linux/uaccess.h>
#include <linux/string.h>
#include <linux/pci.h>
#include <linux/io.h>
#include <linux/delay.h>
#include <linux/mutex.h>
#include <linux/if_ether.h>
#include <linux/ctype.h>
#include <linux/dmi.h>
Go to the source code of this file.
| #define CLKCFG_BAUDDIV (2 << 20) |
| #define CLKCFG_CAN_50MHZ 0x12000000 |
| #define CLKCFG_CANCLK_MASK 0xFF000000 |
| #define CLKCFG_PLL2VCO (8 << 9) |
| #define CLKCFG_REG_OFFSET 0x500 |
| #define CLKCFG_UART_48MHZ (1 << 16) |
| #define CLKCFG_UART_MASK 0xFFFFFF |
| #define CLKCFG_UARTCLKSEL (1 << 18) |
| #define FUNCSEL_REG_OFFSET 0x508 |
| #define MAX_NUM_INT_REDUCE_CONTROL_REG 128 |
| #define PCH_PHUB_BRI_QUEUE_MAXSIZE_REG 0x000C |
| #define PCH_PHUB_BUS_SLAVE_CONTROL_REG 0x0014 |
| #define PCH_PHUB_COMP_RESP_TIMEOUT_REG 0x0010 |
| #define PCH_PHUB_DEADLOCK_AVOID_TYPE_REG 0x0018 |
| #define PCH_PHUB_ID_REG 0x0000 |
| #define PCH_PHUB_INT_REDUCE_CONTROL_REG_BASE 0x0040 |
| #define PCH_PHUB_INTPIN_REG_WPERMIT_REG0 0x0020 |
| #define PCH_PHUB_INTPIN_REG_WPERMIT_REG1 0x0024 |
| #define PCH_PHUB_INTPIN_REG_WPERMIT_REG2 0x0028 |
| #define PCH_PHUB_INTPIN_REG_WPERMIT_REG3 0x002C |
| #define PCH_PHUB_MAC_START_ADDR_EG20T |
| #define PCH_PHUB_MAC_START_ADDR_ML7223 |
| #define PCH_PHUB_OROM_SIZE 15360 |
| #define PCH_PHUB_QUEUE_PRI_VAL_REG 0x0004 |
| #define PCH_PHUB_RC_QUEUE_MAXSIZE_REG 0x0008 |
| #define pch_phub_resume NULL |
| #define PCH_PHUB_ROM_START_ADDR_EG20T |
| #define PCH_PHUB_ROM_START_ADDR_ML7213 |
| #define PCH_PHUB_ROM_START_ADDR_ML7223 |
| #define PCH_PHUB_ROM_WRITE_DISABLE 0x00 /* Disabling for writing ROM */ |
| #define PCH_PHUB_ROM_WRITE_ENABLE 0x01 /* Enabling for writing ROM */ |
| #define pch_phub_suspend NULL |
| #define PCH_WORD_ADDR_MASK (~((1 << 2) - 1)) |
| #define PCI_DEVICE_ID_PCH1_PHUB 0x8801 |
| #define PCI_DEVICE_ID_ROHM_ML7213_PHUB 0x801A |
| #define PCI_DEVICE_ID_ROHM_ML7223_mPHUB 0x8012 /* for Bus-m */ |
| #define PCI_DEVICE_ID_ROHM_ML7223_nPHUB 0x8002 /* for Bus-n */ |
| #define PCI_DEVICE_ID_ROHM_ML7831_PHUB 0x8801 |
| #define PCI_VENDOR_ID_ROHM 0x10db |
| #define PHUB_CONTROL 0x04 /* Control Register offset */ |
| #define PHUB_STATUS 0x00 /* Status Register offset */ |
| #define PHUB_TIMEOUT 0x05 /* Time out value for Status Register */ |
| MODULE_DESCRIPTION |
( |
"Intel EG20T PCH/LAPIS Semiconductor IOH(ML7213/ML7223) PHUB" |
| ) |
|
| MODULE_DEVICE_TABLE |
( |
pci |
, |
|
|
pch_phub_pcidev_id |
|
|
) |
| |
| module_pci_driver |
( |
pch_phub_driver |
| ) |
|
1.8.2