pci-sh7780.h File Reference

Go to the source code of this file.

Macros
#define	PCIECR   0xFE000008
#define	PCIECR_ENBL   0x01
#define	SH7780_PCI_CONFIG_BASE   0xFD000000 /* Config space base addr */
#define	SH7780_PCI_CONFIG_SIZE   0x01000000 /* Config space size */
#define	SH7780_PCIREG_BASE   0xFE040000 /* PCI regs base address */
#define	SH7780_PCIIR   0x114 /* PCI Interrupt Register */
#define	SH7780_PCIIMR   0x118 /* PCI Interrupt Mask Register */
#define	SH7780_PCIAIR   0x11C /* Error Address Register */
#define	SH7780_PCICIR   0x120 /* Error Command/Data Register */
#define	SH7780_PCIAINT   0x130 /* Arbiter Interrupt Register */
#define	SH7780_PCIAINTM   0x134 /* Arbiter Int. Mask Register */
#define	SH7780_PCIBMIR   0x138 /* Error Bus Master Register */
#define	SH7780_PCIPAR   0x1C0 /* PIO Address Register */
#define	SH7780_PCIPINT   0x1CC /* Power Mgmnt Int. Register */
#define	SH7780_PCIPINTM   0x1D0 /* Power Mgmnt Mask Register */
#define	SH7780_PCIMBR(x)   (0x1E0 + ((x) * 8))
#define	SH7780_PCIMBMR(x)   (0x1E4 + ((x) * 8))
#define	SH7780_PCIIOBR   0x1F8
#define	SH7780_PCIIOBMR   0x1FC
#define	SH7780_PCICSCR0   0x210 /* Cache Snoop1 Cnt. Register */
#define	SH7780_PCICSCR1   0x214 /* Cache Snoop2 Cnt. Register */
#define	SH7780_PCICSAR0   0x218 /* Cache Snoop1 Addr. Register */
#define	SH7780_PCICSAR1   0x21C /* Cache Snoop2 Addr. Register */

Macro Definition Documentation

#define PCIECR   0xFE000008

Definition at line 16 of file pci-sh7780.h.

#define PCIECR_ENBL   0x01

Definition at line 17 of file pci-sh7780.h.

#define SH7780_PCI_CONFIG_BASE   0xFD000000 /* Config space base addr */

Definition at line 20 of file pci-sh7780.h.

#define SH7780_PCI_CONFIG_SIZE   0x01000000 /* Config space size */

Definition at line 21 of file pci-sh7780.h.

#define SH7780_PCIAINT   0x130 /* Arbiter Interrupt Register */

Definition at line 30 of file pci-sh7780.h.

#define SH7780_PCIAINTM   0x134 /* Arbiter Int. Mask Register */

Definition at line 31 of file pci-sh7780.h.

#define SH7780_PCIAIR   0x11C /* Error Address Register */

Definition at line 28 of file pci-sh7780.h.

#define SH7780_PCIBMIR   0x138 /* Error Bus Master Register */

Definition at line 32 of file pci-sh7780.h.

#define SH7780_PCICIR   0x120 /* Error Command/Data Register */

Definition at line 29 of file pci-sh7780.h.

#define SH7780_PCICSAR0   0x218 /* Cache Snoop1 Addr. Register */

Definition at line 43 of file pci-sh7780.h.

#define SH7780_PCICSAR1   0x21C /* Cache Snoop2 Addr. Register */

Definition at line 44 of file pci-sh7780.h.

#define SH7780_PCICSCR0   0x210 /* Cache Snoop1 Cnt. Register */

Definition at line 41 of file pci-sh7780.h.

#define SH7780_PCICSCR1   0x214 /* Cache Snoop2 Cnt. Register */

Definition at line 42 of file pci-sh7780.h.

#define SH7780_PCIIMR   0x118 /* PCI Interrupt Mask Register */

Definition at line 27 of file pci-sh7780.h.

#define SH7780_PCIIOBMR   0x1FC

Definition at line 40 of file pci-sh7780.h.

#define SH7780_PCIIOBR   0x1F8

Definition at line 39 of file pci-sh7780.h.

#define SH7780_PCIIR   0x114 /* PCI Interrupt Register */

Definition at line 26 of file pci-sh7780.h.

#define SH7780_PCIMBMR

(

x

)

(0x1E4 + ((x) * 8))

Definition at line 38 of file pci-sh7780.h.

#define SH7780_PCIMBR

(

x

)

(0x1E0 + ((x) * 8))

Definition at line 37 of file pci-sh7780.h.

#define SH7780_PCIPAR   0x1C0 /* PIO Address Register */

Definition at line 33 of file pci-sh7780.h.

#define SH7780_PCIPINT   0x1CC /* Power Mgmnt Int. Register */

Definition at line 34 of file pci-sh7780.h.

#define SH7780_PCIPINTM   0x1D0 /* Power Mgmnt Mask Register */

Definition at line 35 of file pci-sh7780.h.

#define SH7780_PCIREG_BASE   0xFE040000 /* PCI regs base address */

Definition at line 23 of file pci-sh7780.h.