Linux Kernel  3.7.1
 All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
Data Structures | Macros
pcic.h File Reference
#include <linux/types.h>
#include <linux/smp.h>
#include <linux/pci.h>
#include <linux/ioport.h>
#include <asm/pbm.h>

Go to the source code of this file.

Data Structures

struct  linux_pcic
 

Macros

#define PCI_SPACE_SIZE   0x1000000 /* 16 MB */
 
#define PCI_DIAGNOSTIC_0   0x40 /* 32 bits */
 
#define PCI_SIZE_0   0x44 /* 32 bits */
 
#define PCI_SIZE_1   0x48 /* 32 bits */
 
#define PCI_SIZE_2   0x4c /* 32 bits */
 
#define PCI_SIZE_3   0x50 /* 32 bits */
 
#define PCI_SIZE_4   0x54 /* 32 bits */
 
#define PCI_SIZE_5   0x58 /* 32 bits */
 
#define PCI_PIO_CONTROL   0x60 /* 8 bits */
 
#define PCI_DVMA_CONTROL   0x62 /* 8 bits */
 
#define PCI_DVMA_CONTROL_INACTIVITY_REQ   (1<<0)
 
#define PCI_DVMA_CONTROL_IOTLB_ENABLE   (1<<0)
 
#define PCI_DVMA_CONTROL_IOTLB_DISABLE   0
 
#define PCI_DVMA_CONTROL_INACTIVITY_ACK   (1<<4)
 
#define PCI_INTERRUPT_CONTROL   0x63 /* 8 bits */
 
#define PCI_CPU_INTERRUPT_PENDING   0x64 /* 32 bits */
 
#define PCI_DIAGNOSTIC_1   0x68 /* 16 bits */
 
#define PCI_SOFTWARE_INT_CLEAR   0x6a /* 16 bits */
 
#define PCI_SOFTWARE_INT_SET   0x6e /* 16 bits */
 
#define PCI_SYS_INT_PENDING   0x70 /* 32 bits */
 
#define PCI_SYS_INT_PENDING_PIO   0x40000000
 
#define PCI_SYS_INT_PENDING_DMA   0x20000000
 
#define PCI_SYS_INT_PENDING_PCI   0x10000000
 
#define PCI_SYS_INT_PENDING_APSR   0x08000000
 
#define PCI_SYS_INT_TARGET_MASK   0x74 /* 32 bits */
 
#define PCI_SYS_INT_TARGET_MASK_CLEAR   0x78 /* 32 bits */
 
#define PCI_SYS_INT_TARGET_MASK_SET   0x7c /* 32 bits */
 
#define PCI_SYS_INT_PENDING_CLEAR   0x83 /* 8 bits */
 
#define PCI_SYS_INT_PENDING_CLEAR_ALL   0x80
 
#define PCI_SYS_INT_PENDING_CLEAR_PIO   0x40
 
#define PCI_SYS_INT_PENDING_CLEAR_DMA   0x20
 
#define PCI_SYS_INT_PENDING_CLEAR_PCI   0x10
 
#define PCI_IOTLB_CONTROL   0x84 /* 8 bits */
 
#define PCI_INT_SELECT_LO   0x88 /* 16 bits */
 
#define PCI_ARBITRATION_SELECT   0x8a /* 16 bits */
 
#define PCI_INT_SELECT_HI   0x8c /* 16 bits */
 
#define PCI_HW_INT_OUTPUT   0x8e /* 16 bits */
 
#define PCI_IOTLB_RAM_INPUT   0x90 /* 32 bits */
 
#define PCI_IOTLB_CAM_INPUT   0x94 /* 32 bits */
 
#define PCI_IOTLB_RAM_OUTPUT   0x98 /* 32 bits */
 
#define PCI_IOTLB_CAM_OUTPUT   0x9c /* 32 bits */
 
#define PCI_SMBAR0   0xa0 /* 8 bits */
 
#define PCI_MSIZE0   0xa1 /* 8 bits */
 
#define PCI_PMBAR0   0xa2 /* 8 bits */
 
#define PCI_SMBAR1   0xa4 /* 8 bits */
 
#define PCI_MSIZE1   0xa5 /* 8 bits */
 
#define PCI_PMBAR1   0xa6 /* 8 bits */
 
#define PCI_SIBAR   0xa8 /* 8 bits */
 
#define PCI_SIBAR_ADDRESS_MASK   0xf
 
#define PCI_ISIZE   0xa9 /* 8 bits */
 
#define PCI_ISIZE_16M   0xf
 
#define PCI_ISIZE_32M   0xe
 
#define PCI_ISIZE_64M   0xc
 
#define PCI_ISIZE_128M   0x8
 
#define PCI_ISIZE_256M   0x0
 
#define PCI_PIBAR   0xaa /* 8 bits */
 
#define PCI_CPU_COUNTER_LIMIT_HI   0xac /* 32 bits */
 
#define PCI_CPU_COUNTER_LIMIT_LO   0xb0 /* 32 bits */
 
#define PCI_CPU_COUNTER_LIMIT   0xb4 /* 32 bits */
 
#define PCI_SYS_LIMIT   0xb8 /* 32 bits */
 
#define PCI_SYS_COUNTER   0xbc /* 32 bits */
 
#define PCI_SYS_COUNTER_OVERFLOW   (1<<31) /* Limit reached */
 
#define PCI_SYS_LIMIT_PSEUDO   0xc0 /* 32 bits */
 
#define PCI_USER_TIMER_CONTROL   0xc4 /* 8 bits */
 
#define PCI_USER_TIMER_CONFIG   0xc5 /* 8 bits */
 
#define PCI_COUNTER_IRQ   0xc6 /* 8 bits */
 
#define PCI_COUNTER_IRQ_SET(sys_irq, cpu_irq)
 
#define PCI_COUNTER_IRQ_SYS(v)   (((v) >> 4) & 0xf)
 
#define PCI_COUNTER_IRQ_CPU(v)   ((v) & 0xf)
 
#define PCI_PIO_ERROR_COMMAND   0xc7 /* 8 bits */
 
#define PCI_PIO_ERROR_ADDRESS   0xc8 /* 32 bits */
 
#define PCI_IOTLB_ERROR_ADDRESS   0xcc /* 32 bits */
 
#define PCI_SYS_STATUS   0xd0 /* 8 bits */
 
#define PCI_SYS_STATUS_RESET_ENABLE   (1<<0)
 
#define PCI_SYS_STATUS_RESET   (1<<1)
 
#define PCI_SYS_STATUS_WATCHDOG_RESET   (1<<4)
 
#define PCI_SYS_STATUS_PCI_RESET   (1<<5)
 
#define PCI_SYS_STATUS_PCI_RESET_ENABLE   (1<<6)
 
#define PCI_SYS_STATUS_PCI_SATTELITE_MODE   (1<<7)
 

Macro Definition Documentation

#define PCI_ARBITRATION_SELECT   0x8a /* 16 bits */

Definition at line 82 of file pcic.h.

#define PCI_COUNTER_IRQ   0xc6 /* 8 bits */

Definition at line 113 of file pcic.h.

#define PCI_COUNTER_IRQ_CPU (   v)    ((v) & 0xf)

Definition at line 117 of file pcic.h.

#define PCI_COUNTER_IRQ_SET (   sys_irq,
  cpu_irq 
)
Value:
((((sys_irq) & 0xf) << 4) | \
((cpu_irq) & 0xf))

Definition at line 114 of file pcic.h.

#define PCI_COUNTER_IRQ_SYS (   v)    (((v) >> 4) & 0xf)

Definition at line 116 of file pcic.h.

#define PCI_CPU_COUNTER_LIMIT   0xb4 /* 32 bits */

Definition at line 106 of file pcic.h.

#define PCI_CPU_COUNTER_LIMIT_HI   0xac /* 32 bits */

Definition at line 104 of file pcic.h.

#define PCI_CPU_COUNTER_LIMIT_LO   0xb0 /* 32 bits */

Definition at line 105 of file pcic.h.

#define PCI_CPU_INTERRUPT_PENDING   0x64 /* 32 bits */

Definition at line 63 of file pcic.h.

#define PCI_DIAGNOSTIC_0   0x40 /* 32 bits */

Definition at line 49 of file pcic.h.

#define PCI_DIAGNOSTIC_1   0x68 /* 16 bits */

Definition at line 64 of file pcic.h.

#define PCI_DVMA_CONTROL   0x62 /* 8 bits */

Definition at line 57 of file pcic.h.

#define PCI_DVMA_CONTROL_INACTIVITY_ACK   (1<<4)

Definition at line 61 of file pcic.h.

#define PCI_DVMA_CONTROL_INACTIVITY_REQ   (1<<0)

Definition at line 58 of file pcic.h.

#define PCI_DVMA_CONTROL_IOTLB_DISABLE   0

Definition at line 60 of file pcic.h.

#define PCI_DVMA_CONTROL_IOTLB_ENABLE   (1<<0)

Definition at line 59 of file pcic.h.

#define PCI_HW_INT_OUTPUT   0x8e /* 16 bits */

Definition at line 84 of file pcic.h.

#define PCI_INT_SELECT_HI   0x8c /* 16 bits */

Definition at line 83 of file pcic.h.

#define PCI_INT_SELECT_LO   0x88 /* 16 bits */

Definition at line 81 of file pcic.h.

#define PCI_INTERRUPT_CONTROL   0x63 /* 8 bits */

Definition at line 62 of file pcic.h.

#define PCI_IOTLB_CAM_INPUT   0x94 /* 32 bits */

Definition at line 86 of file pcic.h.

#define PCI_IOTLB_CAM_OUTPUT   0x9c /* 32 bits */

Definition at line 88 of file pcic.h.

#define PCI_IOTLB_CONTROL   0x84 /* 8 bits */

Definition at line 80 of file pcic.h.

#define PCI_IOTLB_ERROR_ADDRESS   0xcc /* 32 bits */

Definition at line 120 of file pcic.h.

#define PCI_IOTLB_RAM_INPUT   0x90 /* 32 bits */

Definition at line 85 of file pcic.h.

#define PCI_IOTLB_RAM_OUTPUT   0x98 /* 32 bits */

Definition at line 87 of file pcic.h.

#define PCI_ISIZE   0xa9 /* 8 bits */

Definition at line 97 of file pcic.h.

#define PCI_ISIZE_128M   0x8

Definition at line 101 of file pcic.h.

#define PCI_ISIZE_16M   0xf

Definition at line 98 of file pcic.h.

#define PCI_ISIZE_256M   0x0

Definition at line 102 of file pcic.h.

#define PCI_ISIZE_32M   0xe

Definition at line 99 of file pcic.h.

#define PCI_ISIZE_64M   0xc

Definition at line 100 of file pcic.h.

#define PCI_MSIZE0   0xa1 /* 8 bits */

Definition at line 90 of file pcic.h.

#define PCI_MSIZE1   0xa5 /* 8 bits */

Definition at line 93 of file pcic.h.

#define PCI_PIBAR   0xaa /* 8 bits */

Definition at line 103 of file pcic.h.

#define PCI_PIO_CONTROL   0x60 /* 8 bits */

Definition at line 56 of file pcic.h.

#define PCI_PIO_ERROR_ADDRESS   0xc8 /* 32 bits */

Definition at line 119 of file pcic.h.

#define PCI_PIO_ERROR_COMMAND   0xc7 /* 8 bits */

Definition at line 118 of file pcic.h.

#define PCI_PMBAR0   0xa2 /* 8 bits */

Definition at line 91 of file pcic.h.

#define PCI_PMBAR1   0xa6 /* 8 bits */

Definition at line 94 of file pcic.h.

#define PCI_SIBAR   0xa8 /* 8 bits */

Definition at line 95 of file pcic.h.

#define PCI_SIBAR_ADDRESS_MASK   0xf

Definition at line 96 of file pcic.h.

#define PCI_SIZE_0   0x44 /* 32 bits */

Definition at line 50 of file pcic.h.

#define PCI_SIZE_1   0x48 /* 32 bits */

Definition at line 51 of file pcic.h.

#define PCI_SIZE_2   0x4c /* 32 bits */

Definition at line 52 of file pcic.h.

#define PCI_SIZE_3   0x50 /* 32 bits */

Definition at line 53 of file pcic.h.

#define PCI_SIZE_4   0x54 /* 32 bits */

Definition at line 54 of file pcic.h.

#define PCI_SIZE_5   0x58 /* 32 bits */

Definition at line 55 of file pcic.h.

#define PCI_SMBAR0   0xa0 /* 8 bits */

Definition at line 89 of file pcic.h.

#define PCI_SMBAR1   0xa4 /* 8 bits */

Definition at line 92 of file pcic.h.

#define PCI_SOFTWARE_INT_CLEAR   0x6a /* 16 bits */

Definition at line 65 of file pcic.h.

#define PCI_SOFTWARE_INT_SET   0x6e /* 16 bits */

Definition at line 66 of file pcic.h.

#define PCI_SPACE_SIZE   0x1000000 /* 16 MB */

Definition at line 46 of file pcic.h.

#define PCI_SYS_COUNTER   0xbc /* 32 bits */

Definition at line 108 of file pcic.h.

#define PCI_SYS_COUNTER_OVERFLOW   (1<<31) /* Limit reached */

Definition at line 109 of file pcic.h.

#define PCI_SYS_INT_PENDING   0x70 /* 32 bits */

Definition at line 67 of file pcic.h.

#define PCI_SYS_INT_PENDING_APSR   0x08000000

Definition at line 71 of file pcic.h.

#define PCI_SYS_INT_PENDING_CLEAR   0x83 /* 8 bits */

Definition at line 75 of file pcic.h.

#define PCI_SYS_INT_PENDING_CLEAR_ALL   0x80

Definition at line 76 of file pcic.h.

#define PCI_SYS_INT_PENDING_CLEAR_DMA   0x20

Definition at line 78 of file pcic.h.

#define PCI_SYS_INT_PENDING_CLEAR_PCI   0x10

Definition at line 79 of file pcic.h.

#define PCI_SYS_INT_PENDING_CLEAR_PIO   0x40

Definition at line 77 of file pcic.h.

#define PCI_SYS_INT_PENDING_DMA   0x20000000

Definition at line 69 of file pcic.h.

#define PCI_SYS_INT_PENDING_PCI   0x10000000

Definition at line 70 of file pcic.h.

#define PCI_SYS_INT_PENDING_PIO   0x40000000

Definition at line 68 of file pcic.h.

#define PCI_SYS_INT_TARGET_MASK   0x74 /* 32 bits */

Definition at line 72 of file pcic.h.

#define PCI_SYS_INT_TARGET_MASK_CLEAR   0x78 /* 32 bits */

Definition at line 73 of file pcic.h.

#define PCI_SYS_INT_TARGET_MASK_SET   0x7c /* 32 bits */

Definition at line 74 of file pcic.h.

#define PCI_SYS_LIMIT   0xb8 /* 32 bits */

Definition at line 107 of file pcic.h.

#define PCI_SYS_LIMIT_PSEUDO   0xc0 /* 32 bits */

Definition at line 110 of file pcic.h.

#define PCI_SYS_STATUS   0xd0 /* 8 bits */

Definition at line 121 of file pcic.h.

#define PCI_SYS_STATUS_PCI_RESET   (1<<5)

Definition at line 125 of file pcic.h.

#define PCI_SYS_STATUS_PCI_RESET_ENABLE   (1<<6)

Definition at line 126 of file pcic.h.

#define PCI_SYS_STATUS_PCI_SATTELITE_MODE   (1<<7)

Definition at line 127 of file pcic.h.

#define PCI_SYS_STATUS_RESET   (1<<1)

Definition at line 123 of file pcic.h.

#define PCI_SYS_STATUS_RESET_ENABLE   (1<<0)

Definition at line 122 of file pcic.h.

#define PCI_SYS_STATUS_WATCHDOG_RESET   (1<<4)

Definition at line 124 of file pcic.h.

#define PCI_USER_TIMER_CONFIG   0xc5 /* 8 bits */

Definition at line 112 of file pcic.h.

#define PCI_USER_TIMER_CONTROL   0xc4 /* 8 bits */

Definition at line 111 of file pcic.h.