#include <linux/err.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include "pinctrl-spear3xx.h"

Macros
#define	DRIVER_NAME "spear320-pinmux"

#define	PMX_CONFIG_REG 0x0C

#define	MODE_CONFIG_REG 0x10

#define	MODE_EXT_CONFIG_REG 0x18

#define	AUTO_NET_SMII_MODE (1 << 0)

#define	AUTO_NET_MII_MODE (1 << 1)

#define	AUTO_EXP_MODE (1 << 2)

#define	SMALL_PRINTERS_MODE (1 << 3)

#define	EXTENDED_MODE (1 << 4)

#define	EXT_CTRL_REG 0x0018

#define	MII_MDIO_MASK (1 << 4)

#define	MII_MDIO_10_11_VAL 0

#define	MII_MDIO_81_VAL (1 << 4)

#define	EMI_FSMC_DYNAMIC_MUX_MASK (1 << 5)

#define	MAC_MODE_MII 0

#define	MAC_MODE_RMII 1

#define	MAC_MODE_SMII 2

#define	MAC_MODE_SS_SMII 3

#define	MAC_MODE_MASK 0x3

#define	MAC1_MODE_SHIFT 16

#define	MAC2_MODE_SHIFT 18

#define	IP_SEL_PAD_0_9_REG 0x00A4

#define	PMX_PL_0_1_MASK (0x3F << 0)

#define	PMX_UART2_PL_0_1_VAL 0x0

#define	PMX_I2C2_PL_0_1_VAL (0x4 \| (0x4 << 3))

#define	PMX_PL_2_3_MASK (0x3F << 6)

#define	PMX_I2C2_PL_2_3_VAL 0x0

#define	PMX_UART6_PL_2_3_VAL ((0x1 << 6) \| (0x1 << 9))

#define	PMX_UART1_ENH_PL_2_3_VAL ((0x4 << 6) \| (0x4 << 9))

#define	PMX_PL_4_5_MASK (0x3F << 12)

#define	PMX_UART5_PL_4_5_VAL ((0x1 << 12) \| (0x1 << 15))

#define	PMX_UART1_ENH_PL_4_5_VAL ((0x4 << 12) \| (0x4 << 15))

#define	PMX_PL_5_MASK (0x7 << 15)

#define	PMX_TOUCH_Y_PL_5_VAL 0x0

#define	PMX_PL_6_7_MASK (0x3F << 18)

#define	PMX_PL_6_MASK (0x7 << 18)

#define	PMX_PL_7_MASK (0x7 << 21)

#define	PMX_UART4_PL_6_7_VAL ((0x1 << 18) \| (0x1 << 21))

#define	PMX_PWM_3_PL_6_VAL (0x2 << 18)

#define	PMX_PWM_2_PL_7_VAL (0x2 << 21)

#define	PMX_UART1_ENH_PL_6_7_VAL ((0x4 << 18) \| (0x4 << 21))

#define	PMX_PL_8_9_MASK (0x3F << 24)

#define	PMX_UART3_PL_8_9_VAL ((0x1 << 24) \| (0x1 << 27))

#define	PMX_PWM_0_1_PL_8_9_VAL ((0x2 << 24) \| (0x2 << 27))

#define	PMX_I2C1_PL_8_9_VAL ((0x4 << 24) \| (0x4 << 27))

#define	IP_SEL_PAD_10_19_REG 0x00A8

#define	PMX_PL_10_11_MASK (0x3F << 0)

#define	PMX_SMII_PL_10_11_VAL 0

#define	PMX_RMII_PL_10_11_VAL ((0x4 << 0) \| (0x4 << 3))

#define	PMX_PL_12_MASK (0x7 << 6)

#define	PMX_PWM3_PL_12_VAL 0

#define	PMX_SDHCI_CD_PL_12_VAL (0x4 << 6)

#define	PMX_PL_13_14_MASK (0x3F << 9)

#define	PMX_PL_13_MASK (0x7 << 9)

#define	PMX_PL_14_MASK (0x7 << 12)

#define	PMX_SSP2_PL_13_14_15_16_VAL 0

#define	PMX_UART4_PL_13_14_VAL ((0x1 << 9) \| (0x1 << 12))

#define	PMX_RMII_PL_13_14_VAL ((0x4 << 9) \| (0x4 << 12))

#define	PMX_PWM2_PL_13_VAL (0x2 << 9)

#define	PMX_PWM1_PL_14_VAL (0x2 << 12)

#define	PMX_PL_15_MASK (0x7 << 15)

#define	PMX_PWM0_PL_15_VAL (0x2 << 15)

#define	PMX_PL_15_16_MASK (0x3F << 15)

#define	PMX_UART3_PL_15_16_VAL ((0x1 << 15) \| (0x1 << 18))

#define	PMX_RMII_PL_15_16_VAL ((0x4 << 15) \| (0x4 << 18))

#define	PMX_PL_17_18_MASK (0x3F << 21)

#define	PMX_SSP1_PL_17_18_19_20_VAL 0

#define	PMX_RMII_PL_17_18_VAL ((0x4 << 21) \| (0x4 << 24))

#define	PMX_PL_19_MASK (0x7 << 27)

#define	PMX_I2C2_PL_19_VAL (0x1 << 27)

#define	PMX_RMII_PL_19_VAL (0x4 << 27)

#define	IP_SEL_PAD_20_29_REG 0x00AC

#define	PMX_PL_20_MASK (0x7 << 0)

#define	PMX_I2C2_PL_20_VAL (0x1 << 0)

#define	PMX_RMII_PL_20_VAL (0x4 << 0)

#define	PMX_PL_21_TO_27_MASK (0x1FFFFF << 3)

#define	PMX_SMII_PL_21_TO_27_VAL 0

#define	PMX_RMII_PL_21_TO_27_VAL ((0x4 << 3) \| (0x4 << 6) \| (0x4 << 9) \| (0x4 << 12) \| (0x4 << 15) \| (0x4 << 18) \| (0x4 << 21))

#define	PMX_PL_28_29_MASK (0x3F << 24)

#define	PMX_PL_28_MASK (0x7 << 24)

#define	PMX_PL_29_MASK (0x7 << 27)

#define	PMX_UART1_PL_28_29_VAL 0

#define	PMX_PWM_3_PL_28_VAL (0x4 << 24)

#define	PMX_PWM_2_PL_29_VAL (0x4 << 27)

#define	IP_SEL_PAD_30_39_REG 0x00B0

#define	PMX_PL_30_31_MASK (0x3F << 0)

#define	PMX_CAN1_PL_30_31_VAL (0)

#define	PMX_PL_30_MASK (0x7 << 0)

#define	PMX_PL_31_MASK (0x7 << 3)

#define	PMX_PWM1_EXT_PL_30_VAL (0x4 << 0)

#define	PMX_PWM0_EXT_PL_31_VAL (0x4 << 3)

#define	PMX_UART1_ENH_PL_31_VAL (0x3 << 3)

#define	PMX_PL_32_33_MASK (0x3F << 6)

#define	PMX_CAN0_PL_32_33_VAL 0

#define	PMX_UART1_ENH_PL_32_33_VAL ((0x3 << 6) \| (0x3 << 9))

#define	PMX_SSP2_PL_32_33_VAL ((0x4 << 6) \| (0x4 << 9))

#define	PMX_PL_34_MASK (0x7 << 12)

#define	PMX_PWM2_PL_34_VAL 0

#define	PMX_UART1_ENH_PL_34_VAL (0x2 << 12)

#define	PMX_SSP2_PL_34_VAL (0x4 << 12)

#define	PMX_PL_35_MASK (0x7 << 15)

#define	PMX_I2S_REF_CLK_PL_35_VAL 0

#define	PMX_UART1_ENH_PL_35_VAL (0x2 << 15)

#define	PMX_SSP2_PL_35_VAL (0x4 << 15)

#define	PMX_PL_36_MASK (0x7 << 18)

#define	PMX_TOUCH_X_PL_36_VAL 0

#define	PMX_UART1_ENH_PL_36_VAL (0x2 << 18)

#define	PMX_SSP1_PL_36_VAL (0x4 << 18)

#define	PMX_PL_37_38_MASK (0x3F << 21)

#define	PMX_PWM0_1_PL_37_38_VAL 0

#define	PMX_UART5_PL_37_38_VAL ((0x2 << 21) \| (0x2 << 24))

#define	PMX_SSP1_PL_37_38_VAL ((0x4 << 21) \| (0x4 << 24))

#define	PMX_PL_39_MASK (0x7 << 27)

#define	PMX_I2S_PL_39_VAL 0

#define	PMX_UART4_PL_39_VAL (0x2 << 27)

#define	PMX_SSP1_PL_39_VAL (0x4 << 27)

#define	IP_SEL_PAD_40_49_REG 0x00B4

#define	PMX_PL_40_MASK (0x7 << 0)

#define	PMX_I2S_PL_40_VAL 0

#define	PMX_UART4_PL_40_VAL (0x2 << 0)

#define	PMX_PWM3_PL_40_VAL (0x4 << 0)

#define	PMX_PL_41_42_MASK (0x3F << 3)

#define	PMX_PL_41_MASK (0x7 << 3)

#define	PMX_PL_42_MASK (0x7 << 6)

#define	PMX_I2S_PL_41_42_VAL 0

#define	PMX_UART3_PL_41_42_VAL ((0x2 << 3) \| (0x2 << 6))

#define	PMX_PWM2_PL_41_VAL (0x4 << 3)

#define	PMX_PWM1_PL_42_VAL (0x4 << 6)

#define	PMX_PL_43_MASK (0x7 << 9)

#define	PMX_SDHCI_PL_43_VAL 0

#define	PMX_UART1_ENH_PL_43_VAL (0x2 << 9)

#define	PMX_PWM0_PL_43_VAL (0x4 << 9)

#define	PMX_PL_44_45_MASK (0x3F << 12)

#define	PMX_SDHCI_PL_44_45_VAL 0

#define	PMX_UART1_ENH_PL_44_45_VAL ((0x2 << 12) \| (0x2 << 15))

#define	PMX_SSP2_PL_44_45_VAL ((0x4 << 12) \| (0x4 << 15))

#define	PMX_PL_46_47_MASK (0x3F << 18)

#define	PMX_SDHCI_PL_46_47_VAL 0

#define	PMX_FSMC_EMI_PL_46_47_VAL ((0x2 << 18) \| (0x2 << 21))

#define	PMX_SSP2_PL_46_47_VAL ((0x4 << 18) \| (0x4 << 21))

#define	PMX_PL_48_49_MASK (0x3F << 24)

#define	PMX_SDHCI_PL_48_49_VAL 0

#define	PMX_FSMC_EMI_PL_48_49_VAL ((0x2 << 24) \| (0x2 << 27))

#define	PMX_SSP1_PL_48_49_VAL ((0x4 << 24) \| (0x4 << 27))

#define	IP_SEL_PAD_50_59_REG 0x00B8

#define	PMX_PL_50_51_MASK (0x3F << 0)

#define	PMX_EMI_PL_50_51_VAL ((0x2 << 0) \| (0x2 << 3))

#define	PMX_SSP1_PL_50_51_VAL ((0x4 << 0) \| (0x4 << 3))

#define	PMX_PL_50_MASK (0x7 << 0)

#define	PMX_PL_51_MASK (0x7 << 3)

#define	PMX_SDHCI_PL_50_VAL 0

#define	PMX_SDHCI_CD_PL_51_VAL 0

#define	PMX_PL_52_53_MASK (0x3F << 6)

#define	PMX_FSMC_PL_52_53_VAL 0

#define	PMX_EMI_PL_52_53_VAL ((0x2 << 6) \| (0x2 << 9))

#define	PMX_UART3_PL_52_53_VAL ((0x4 << 6) \| (0x4 << 9))

#define	PMX_PL_54_55_56_MASK (0x1FF << 12)

#define	PMX_FSMC_EMI_PL_54_55_56_VAL ((0x2 << 12) \| (0x2 << 15) \| (0x2 << 18))

#define	PMX_PL_57_MASK (0x7 << 21)

#define	PMX_FSMC_PL_57_VAL 0

#define	PMX_PWM3_PL_57_VAL (0x4 << 21)

#define	PMX_PL_58_59_MASK (0x3F << 24)

#define	PMX_PL_58_MASK (0x7 << 24)

#define	PMX_PL_59_MASK (0x7 << 27)

#define	PMX_FSMC_EMI_PL_58_59_VAL ((0x2 << 24) \| (0x2 << 27))

#define	PMX_PWM2_PL_58_VAL (0x4 << 24)

#define	PMX_PWM1_PL_59_VAL (0x4 << 27)

#define	IP_SEL_PAD_60_69_REG 0x00BC

#define	PMX_PL_60_MASK (0x7 << 0)

#define	PMX_FSMC_PL_60_VAL 0

#define	PMX_PWM0_PL_60_VAL (0x4 << 0)

#define	PMX_PL_61_TO_64_MASK (0xFFF << 3)

#define	PMX_FSMC_PL_61_TO_64_VAL ((0x2 << 3) \| (0x2 << 6) \| (0x2 << 9) \| (0x2 << 12))

#define	PMX_SSP2_PL_61_TO_64_VAL ((0x4 << 3) \| (0x4 << 6) \| (0x4 << 9) \| (0x4 << 12))

#define	PMX_PL_65_TO_68_MASK (0xFFF << 15)

#define	PMX_FSMC_PL_65_TO_68_VAL ((0x2 << 15) \| (0x2 << 18) \| (0x2 << 21) \| (0x2 << 24))

#define	PMX_SSP1_PL_65_TO_68_VAL ((0x4 << 15) \| (0x4 << 18) \| (0x4 << 21) \| (0x4 << 24))

#define	PMX_PL_69_MASK (0x7 << 27)

#define	PMX_CLCD_PL_69_VAL (0)

#define	PMX_EMI_PL_69_VAL (0x2 << 27)

#define	PMX_SPP_PL_69_VAL (0x3 << 27)

#define	PMX_UART5_PL_69_VAL (0x4 << 27)

#define	IP_SEL_PAD_70_79_REG 0x00C0

#define	PMX_PL_70_MASK (0x7 << 0)

#define	PMX_CLCD_PL_70_VAL (0)

#define	PMX_FSMC_EMI_PL_70_VAL (0x2 << 0)

#define	PMX_SPP_PL_70_VAL (0x3 << 0)

#define	PMX_UART5_PL_70_VAL (0x4 << 0)

#define	PMX_PL_71_72_MASK (0x3F << 3)

#define	PMX_CLCD_PL_71_72_VAL (0)

#define	PMX_FSMC_EMI_PL_71_72_VAL ((0x2 << 3) \| (0x2 << 6))

#define	PMX_SPP_PL_71_72_VAL ((0x3 << 3) \| (0x3 << 6))

#define	PMX_UART4_PL_71_72_VAL ((0x4 << 3) \| (0x4 << 6))

#define	PMX_PL_73_MASK (0x7 << 9)

#define	PMX_CLCD_PL_73_VAL (0)

#define	PMX_FSMC_EMI_PL_73_VAL (0x2 << 9)

#define	PMX_SPP_PL_73_VAL (0x3 << 9)

#define	PMX_UART3_PL_73_VAL (0x4 << 9)

#define	PMX_PL_74_MASK (0x7 << 12)

#define	PMX_CLCD_PL_74_VAL (0)

#define	PMX_EMI_PL_74_VAL (0x2 << 12)

#define	PMX_SPP_PL_74_VAL (0x3 << 12)

#define	PMX_UART3_PL_74_VAL (0x4 << 12)

#define	PMX_PL_75_76_MASK (0x3F << 15)

#define	PMX_CLCD_PL_75_76_VAL (0)

#define	PMX_EMI_PL_75_76_VAL ((0x2 << 15) \| (0x2 << 18))

#define	PMX_SPP_PL_75_76_VAL ((0x3 << 15) \| (0x3 << 18))

#define	PMX_I2C2_PL_75_76_VAL ((0x4 << 15) \| (0x4 << 18))

#define	PMX_PL_77_78_79_MASK (0x1FF << 21)

#define	PMX_CLCD_PL_77_78_79_VAL (0)

#define	PMX_EMI_PL_77_78_79_VAL ((0x2 << 21) \| (0x2 << 24) \| (0x2 << 27))

#define	PMX_SPP_PL_77_78_79_VAL ((0x3 << 21) \| (0x3 << 24) \| (0x3 << 27))

#define	PMX_RS485_PL_77_78_79_VAL ((0x4 << 21) \| (0x4 << 24) \| (0x4 << 27))

#define	IP_SEL_PAD_80_89_REG 0x00C4

#define	PMX_PL_80_TO_85_MASK (0x3FFFF << 0)

#define	PMX_CLCD_PL_80_TO_85_VAL 0

#define	PMX_MII2_PL_80_TO_85_VAL ((0x1 << 0) \| (0x1 << 3) \| (0x1 << 6) \| (0x1 << 9) \| (0x1 << 12) \| (0x1 << 15))

#define	PMX_EMI_PL_80_TO_85_VAL ((0x2 << 0) \| (0x2 << 3) \| (0x2 << 6) \| (0x2 << 9) \| (0x2 << 12) \| (0x2 << 15))

#define	PMX_SPP_PL_80_TO_85_VAL ((0x3 << 0) \| (0x3 << 3) \| (0x3 << 6) \| (0x3 << 9) \| (0x3 << 12) \| (0x3 << 15))

#define	PMX_UART1_ENH_PL_80_TO_85_VAL ((0x4 << 0) \| (0x4 << 3) \| (0x4 << 6) \| (0x4 << 9) \| (0x4 << 12) \| (0x4 << 15))

#define	PMX_PL_86_87_MASK (0x3F << 18)

#define	PMX_PL_86_MASK (0x7 << 18)

#define	PMX_PL_87_MASK (0x7 << 21)

#define	PMX_CLCD_PL_86_87_VAL 0

#define	PMX_MII2_PL_86_87_VAL ((0x1 << 18) \| (0x1 << 21))

#define	PMX_EMI_PL_86_87_VAL ((0x2 << 18) \| (0x2 << 21))

#define	PMX_PWM3_PL_86_VAL (0x4 << 18)

#define	PMX_PWM2_PL_87_VAL (0x4 << 21)

#define	PMX_PL_88_89_MASK (0x3F << 24)

#define	PMX_CLCD_PL_88_89_VAL 0

#define	PMX_MII2_PL_88_89_VAL ((0x1 << 24) \| (0x1 << 27))

#define	PMX_EMI_PL_88_89_VAL ((0x2 << 24) \| (0x2 << 27))

#define	PMX_UART6_PL_88_89_VAL ((0x3 << 24) \| (0x3 << 27))

#define	PMX_PWM0_1_PL_88_89_VAL ((0x4 << 24) \| (0x4 << 27))

#define	IP_SEL_PAD_90_99_REG 0x00C8

#define	PMX_PL_90_91_MASK (0x3F << 0)

#define	PMX_CLCD_PL_90_91_VAL 0

#define	PMX_MII2_PL_90_91_VAL ((0x1 << 0) \| (0x1 << 3))

#define	PMX_EMI1_PL_90_91_VAL ((0x2 << 0) \| (0x2 << 3))

#define	PMX_UART5_PL_90_91_VAL ((0x3 << 0) \| (0x3 << 3))

#define	PMX_SSP2_PL_90_91_VAL ((0x4 << 0) \| (0x4 << 3))

#define	PMX_PL_92_93_MASK (0x3F << 6)

#define	PMX_CLCD_PL_92_93_VAL 0

#define	PMX_MII2_PL_92_93_VAL ((0x1 << 6) \| (0x1 << 9))

#define	PMX_EMI1_PL_92_93_VAL ((0x2 << 6) \| (0x2 << 9))

#define	PMX_UART4_PL_92_93_VAL ((0x3 << 6) \| (0x3 << 9))

#define	PMX_SSP2_PL_92_93_VAL ((0x4 << 6) \| (0x4 << 9))

#define	PMX_PL_94_95_MASK (0x3F << 12)

#define	PMX_CLCD_PL_94_95_VAL 0

#define	PMX_MII2_PL_94_95_VAL ((0x1 << 12) \| (0x1 << 15))

#define	PMX_EMI1_PL_94_95_VAL ((0x2 << 12) \| (0x2 << 15))

#define	PMX_UART3_PL_94_95_VAL ((0x3 << 12) \| (0x3 << 15))

#define	PMX_SSP1_PL_94_95_VAL ((0x4 << 12) \| (0x4 << 15))

#define	PMX_PL_96_97_MASK (0x3F << 18)

#define	PMX_CLCD_PL_96_97_VAL 0

#define	PMX_MII2_PL_96_97_VAL ((0x1 << 18) \| (0x1 << 21))

#define	PMX_EMI1_PL_96_97_VAL ((0x2 << 18) \| (0x2 << 21))

#define	PMX_I2C2_PL_96_97_VAL ((0x3 << 18) \| (0x3 << 21))

#define	PMX_SSP1_PL_96_97_VAL ((0x4 << 18) \| (0x4 << 21))

#define	PMX_PL_98_MASK (0x7 << 24)

#define	PMX_CLCD_PL_98_VAL 0

#define	PMX_I2C1_PL_98_VAL (0x2 << 24)

#define	PMX_UART3_PL_98_VAL (0x4 << 24)

#define	PMX_PL_99_MASK (0x7 << 27)

#define	PMX_SDHCI_PL_99_VAL 0

#define	PMX_I2C1_PL_99_VAL (0x2 << 27)

#define	PMX_UART3_PL_99_VAL (0x4 << 27)

#define	IP_SEL_MIX_PAD_REG 0x00CC

#define	PMX_PL_100_101_MASK (0x3F << 0)

#define	PMX_SDHCI_PL_100_101_VAL 0

#define	PMX_UART4_PL_100_101_VAL ((0x4 << 0) \| (0x4 << 3))

#define	PMX_SSP1_PORT_SEL_MASK (0x7 << 8)

#define	PMX_SSP1_PORT_94_TO_97_VAL 0

#define	PMX_SSP1_PORT_65_TO_68_VAL (0x1 << 8)

#define	PMX_SSP1_PORT_48_TO_51_VAL (0x2 << 8)

#define	PMX_SSP1_PORT_36_TO_39_VAL (0x3 << 8)

#define	PMX_SSP1_PORT_17_TO_20_VAL (0x4 << 8)

#define	PMX_SSP2_PORT_SEL_MASK (0x7 << 11)

#define	PMX_SSP2_PORT_90_TO_93_VAL 0

#define	PMX_SSP2_PORT_61_TO_64_VAL (0x1 << 11)

#define	PMX_SSP2_PORT_44_TO_47_VAL (0x2 << 11)

#define	PMX_SSP2_PORT_32_TO_35_VAL (0x3 << 11)

#define	PMX_SSP2_PORT_13_TO_16_VAL (0x4 << 11)

#define	PMX_UART1_ENH_PORT_SEL_MASK (0x3 << 14)

#define	PMX_UART1_ENH_PORT_81_TO_85_VAL 0

#define	PMX_UART1_ENH_PORT_44_45_34_36_VAL (0x1 << 14)

#define	PMX_UART1_ENH_PORT_32_TO_34_36_VAL (0x2 << 14)

#define	PMX_UART1_ENH_PORT_3_TO_5_7_VAL (0x3 << 14)

#define	PMX_UART3_PORT_SEL_MASK (0x7 << 16)

#define	PMX_UART3_PORT_94_VAL 0

#define	PMX_UART3_PORT_73_VAL (0x1 << 16)

#define	PMX_UART3_PORT_52_VAL (0x2 << 16)

#define	PMX_UART3_PORT_41_VAL (0x3 << 16)

#define	PMX_UART3_PORT_15_VAL (0x4 << 16)

#define	PMX_UART3_PORT_8_VAL (0x5 << 16)

#define	PMX_UART3_PORT_99_VAL (0x6 << 16)

#define	PMX_UART4_PORT_SEL_MASK (0x7 << 19)

#define	PMX_UART4_PORT_92_VAL 0

#define	PMX_UART4_PORT_71_VAL (0x1 << 19)

#define	PMX_UART4_PORT_39_VAL (0x2 << 19)

#define	PMX_UART4_PORT_13_VAL (0x3 << 19)

#define	PMX_UART4_PORT_6_VAL (0x4 << 19)

#define	PMX_UART4_PORT_101_VAL (0x5 << 19)

#define	PMX_UART5_PORT_SEL_MASK (0x3 << 22)

#define	PMX_UART5_PORT_90_VAL 0

#define	PMX_UART5_PORT_69_VAL (0x1 << 22)

#define	PMX_UART5_PORT_37_VAL (0x2 << 22)

#define	PMX_UART5_PORT_4_VAL (0x3 << 22)

#define	PMX_UART6_PORT_SEL_MASK (0x1 << 24)

#define	PMX_UART6_PORT_88_VAL 0

#define	PMX_UART6_PORT_2_VAL (0x1 << 24)

#define	PMX_I2C1_PORT_SEL_MASK (0x1 << 25)

#define	PMX_I2C1_PORT_8_9_VAL 0

#define	PMX_I2C1_PORT_98_99_VAL (0x1 << 25)

#define	PMX_I2C2_PORT_SEL_MASK (0x3 << 26)

#define	PMX_I2C2_PORT_96_97_VAL 0

#define	PMX_I2C2_PORT_75_76_VAL (0x1 << 26)

#define	PMX_I2C2_PORT_19_20_VAL (0x2 << 26)

#define	PMX_I2C2_PORT_2_3_VAL (0x3 << 26)

#define	PMX_I2C2_PORT_0_1_VAL (0x4 << 26)

#define	PMX_SDHCI_CD_PORT_SEL_MASK (0x1 << 29)

#define	PMX_SDHCI_CD_PORT_12_VAL 0

#define	PMX_SDHCI_CD_PORT_51_VAL (0x1 << 29)

#define	pmx_sdhci_common_modemux

Functions
	arch_initcall (spear320_pinctrl_init)

	module_exit (spear320_pinctrl_exit)

	MODULE_AUTHOR ("Viresh Kumar <[email protected]>")

	MODULE_DESCRIPTION ("ST Microelectronics SPEAr320 pinctrl driver")

	MODULE_LICENSE ("GPL v2")

	MODULE_DEVICE_TABLE (of, spear320_pinctrl_of_match)

Macro Definition Documentation

#define AUTO_EXP_MODE (1 << 2)

Definition at line 29 of file pinctrl-spear320.c.

#define AUTO_NET_MII_MODE (1 << 1)

Definition at line 28 of file pinctrl-spear320.c.

#define AUTO_NET_SMII_MODE (1 << 0)

Definition at line 27 of file pinctrl-spear320.c.

#define DRIVER_NAME "spear320-pinmux"

Definition at line 19 of file pinctrl-spear320.c.

#define EMI_FSMC_DYNAMIC_MUX_MASK (1 << 5)

Definition at line 86 of file pinctrl-spear320.c.

#define EXT_CTRL_REG 0x0018

Definition at line 82 of file pinctrl-spear320.c.

#define EXTENDED_MODE (1 << 4)

Definition at line 31 of file pinctrl-spear320.c.

#define IP_SEL_MIX_PAD_REG 0x00CC

Definition at line 392 of file pinctrl-spear320.c.

#define IP_SEL_PAD_0_9_REG 0x00A4

Definition at line 95 of file pinctrl-spear320.c.

#define IP_SEL_PAD_10_19_REG 0x00A8

Definition at line 124 of file pinctrl-spear320.c.

#define IP_SEL_PAD_20_29_REG 0x00AC

Definition at line 156 of file pinctrl-spear320.c.

#define IP_SEL_PAD_30_39_REG 0x00B0

Definition at line 172 of file pinctrl-spear320.c.

#define IP_SEL_PAD_40_49_REG 0x00B4

Definition at line 211 of file pinctrl-spear320.c.

#define IP_SEL_PAD_50_59_REG 0x00B8

Definition at line 245 of file pinctrl-spear320.c.

#define IP_SEL_PAD_60_69_REG 0x00BC

Definition at line 273 of file pinctrl-spear320.c.

#define IP_SEL_PAD_70_79_REG 0x00C0

Definition at line 292 of file pinctrl-spear320.c.

#define IP_SEL_PAD_80_89_REG 0x00C4

Definition at line 329 of file pinctrl-spear320.c.

#define IP_SEL_PAD_90_99_REG 0x00C8

Definition at line 353 of file pinctrl-spear320.c.

#define MAC1_MODE_SHIFT 16

Definition at line 92 of file pinctrl-spear320.c.

#define MAC2_MODE_SHIFT 18

Definition at line 93 of file pinctrl-spear320.c.

#define MAC_MODE_MASK 0x3

Definition at line 91 of file pinctrl-spear320.c.

#define MAC_MODE_MII 0

Definition at line 87 of file pinctrl-spear320.c.

#define MAC_MODE_RMII 1

Definition at line 88 of file pinctrl-spear320.c.

#define MAC_MODE_SMII 2

Definition at line 89 of file pinctrl-spear320.c.

#define MAC_MODE_SS_SMII 3

Definition at line 90 of file pinctrl-spear320.c.

#define MII_MDIO_10_11_VAL 0

Definition at line 84 of file pinctrl-spear320.c.

#define MII_MDIO_81_VAL (1 << 4)

Definition at line 85 of file pinctrl-spear320.c.

#define MII_MDIO_MASK (1 << 4)

Definition at line 83 of file pinctrl-spear320.c.

#define MODE_CONFIG_REG 0x10

Definition at line 23 of file pinctrl-spear320.c.

#define MODE_EXT_CONFIG_REG 0x18

Definition at line 24 of file pinctrl-spear320.c.

#define PMX_CAN0_PL_32_33_VAL 0

Definition at line 182 of file pinctrl-spear320.c.

#define PMX_CAN1_PL_30_31_VAL (0)

Definition at line 174 of file pinctrl-spear320.c.

#define PMX_CLCD_PL_69_VAL (0)

Definition at line 287 of file pinctrl-spear320.c.

#define PMX_CLCD_PL_70_VAL (0)

Definition at line 294 of file pinctrl-spear320.c.

#define PMX_CLCD_PL_71_72_VAL (0)

Definition at line 300 of file pinctrl-spear320.c.

#define PMX_CLCD_PL_73_VAL (0)

Definition at line 306 of file pinctrl-spear320.c.

#define PMX_CLCD_PL_74_VAL (0)

Definition at line 312 of file pinctrl-spear320.c.

#define PMX_CLCD_PL_75_76_VAL (0)

Definition at line 318 of file pinctrl-spear320.c.

#define PMX_CLCD_PL_77_78_79_VAL (0)

Definition at line 324 of file pinctrl-spear320.c.

#define PMX_CLCD_PL_80_TO_85_VAL 0

Definition at line 331 of file pinctrl-spear320.c.

#define PMX_CLCD_PL_86_87_VAL 0

Definition at line 340 of file pinctrl-spear320.c.

#define PMX_CLCD_PL_88_89_VAL 0

Definition at line 347 of file pinctrl-spear320.c.

#define PMX_CLCD_PL_90_91_VAL 0

Definition at line 355 of file pinctrl-spear320.c.

#define PMX_CLCD_PL_92_93_VAL 0

Definition at line 362 of file pinctrl-spear320.c.

#define PMX_CLCD_PL_94_95_VAL 0

Definition at line 369 of file pinctrl-spear320.c.

#define PMX_CLCD_PL_96_97_VAL 0

Definition at line 376 of file pinctrl-spear320.c.

#define PMX_CLCD_PL_98_VAL 0

Definition at line 383 of file pinctrl-spear320.c.

#define PMX_CONFIG_REG 0x0C

Definition at line 22 of file pinctrl-spear320.c.

#define PMX_EMI1_PL_90_91_VAL ((0x2 << 0) | (0x2 << 3))

Definition at line 357 of file pinctrl-spear320.c.

#define PMX_EMI1_PL_92_93_VAL ((0x2 << 6) | (0x2 << 9))

Definition at line 364 of file pinctrl-spear320.c.

#define PMX_EMI1_PL_94_95_VAL ((0x2 << 12) | (0x2 << 15))

Definition at line 371 of file pinctrl-spear320.c.

#define PMX_EMI1_PL_96_97_VAL ((0x2 << 18) | (0x2 << 21))

Definition at line 378 of file pinctrl-spear320.c.

#define PMX_EMI_PL_50_51_VAL ((0x2 << 0) | (0x2 << 3))

Definition at line 247 of file pinctrl-spear320.c.

#define PMX_EMI_PL_52_53_VAL ((0x2 << 6) | (0x2 << 9))

Definition at line 256 of file pinctrl-spear320.c.

#define PMX_EMI_PL_69_VAL (0x2 << 27)

Definition at line 288 of file pinctrl-spear320.c.

#define PMX_EMI_PL_74_VAL (0x2 << 12)

Definition at line 313 of file pinctrl-spear320.c.

#define PMX_EMI_PL_75_76_VAL ((0x2 << 15) | (0x2 << 18))

Definition at line 319 of file pinctrl-spear320.c.

#define PMX_EMI_PL_77_78_79_VAL ((0x2 << 21) | (0x2 << 24) | (0x2 << 27))

Definition at line 325 of file pinctrl-spear320.c.

#define PMX_EMI_PL_80_TO_85_VAL ((0x2 << 0) | (0x2 << 3) | (0x2 << 6) | (0x2 << 9) | (0x2 << 12) | (0x2 << 15))

Definition at line 333 of file pinctrl-spear320.c.

#define PMX_EMI_PL_86_87_VAL ((0x2 << 18) | (0x2 << 21))

Definition at line 342 of file pinctrl-spear320.c.

#define PMX_EMI_PL_88_89_VAL ((0x2 << 24) | (0x2 << 27))

Definition at line 349 of file pinctrl-spear320.c.

#define PMX_FSMC_EMI_PL_46_47_VAL ((0x2 << 18) | (0x2 << 21))

Definition at line 237 of file pinctrl-spear320.c.

#define PMX_FSMC_EMI_PL_48_49_VAL ((0x2 << 24) | (0x2 << 27))

Definition at line 242 of file pinctrl-spear320.c.

#define PMX_FSMC_EMI_PL_54_55_56_VAL ((0x2 << 12) | (0x2 << 15) | (0x2 << 18))

Definition at line 260 of file pinctrl-spear320.c.

#define PMX_FSMC_EMI_PL_58_59_VAL ((0x2 << 24) | (0x2 << 27))

Definition at line 269 of file pinctrl-spear320.c.

#define PMX_FSMC_EMI_PL_70_VAL (0x2 << 0)

Definition at line 295 of file pinctrl-spear320.c.

#define PMX_FSMC_EMI_PL_71_72_VAL ((0x2 << 3) | (0x2 << 6))

Definition at line 301 of file pinctrl-spear320.c.

#define PMX_FSMC_EMI_PL_73_VAL (0x2 << 9)

Definition at line 307 of file pinctrl-spear320.c.

#define PMX_FSMC_PL_52_53_VAL 0

Definition at line 255 of file pinctrl-spear320.c.

#define PMX_FSMC_PL_57_VAL 0

Definition at line 263 of file pinctrl-spear320.c.

#define PMX_FSMC_PL_60_VAL 0

Definition at line 275 of file pinctrl-spear320.c.

#define PMX_FSMC_PL_61_TO_64_VAL ((0x2 << 3) | (0x2 << 6) | (0x2 << 9) | (0x2 << 12))

Definition at line 279 of file pinctrl-spear320.c.

#define PMX_FSMC_PL_65_TO_68_VAL ((0x2 << 15) | (0x2 << 18) | (0x2 << 21) | (0x2 << 24))

Definition at line 283 of file pinctrl-spear320.c.

#define PMX_I2C1_PL_8_9_VAL ((0x4 << 24) | (0x4 << 27))

Definition at line 122 of file pinctrl-spear320.c.

#define PMX_I2C1_PL_98_VAL (0x2 << 24)

Definition at line 384 of file pinctrl-spear320.c.

#define PMX_I2C1_PL_99_VAL (0x2 << 27)

Definition at line 389 of file pinctrl-spear320.c.

#define PMX_I2C1_PORT_8_9_VAL 0

Definition at line 445 of file pinctrl-spear320.c.

#define PMX_I2C1_PORT_98_99_VAL (0x1 << 25)

Definition at line 446 of file pinctrl-spear320.c.

#define PMX_I2C1_PORT_SEL_MASK (0x1 << 25)

Definition at line 444 of file pinctrl-spear320.c.

#define PMX_I2C2_PL_0_1_VAL (0x4 | (0x4 << 3))

Definition at line 98 of file pinctrl-spear320.c.

#define PMX_I2C2_PL_19_VAL (0x1 << 27)

Definition at line 153 of file pinctrl-spear320.c.

#define PMX_I2C2_PL_20_VAL (0x1 << 0)

Definition at line 158 of file pinctrl-spear320.c.

#define PMX_I2C2_PL_2_3_VAL 0x0

Definition at line 101 of file pinctrl-spear320.c.

#define PMX_I2C2_PL_75_76_VAL ((0x4 << 15) | (0x4 << 18))

Definition at line 321 of file pinctrl-spear320.c.

#define PMX_I2C2_PL_96_97_VAL ((0x3 << 18) | (0x3 << 21))

Definition at line 379 of file pinctrl-spear320.c.

#define PMX_I2C2_PORT_0_1_VAL (0x4 << 26)

Definition at line 453 of file pinctrl-spear320.c.

#define PMX_I2C2_PORT_19_20_VAL (0x2 << 26)

Definition at line 451 of file pinctrl-spear320.c.

#define PMX_I2C2_PORT_2_3_VAL (0x3 << 26)

Definition at line 452 of file pinctrl-spear320.c.

#define PMX_I2C2_PORT_75_76_VAL (0x1 << 26)

Definition at line 450 of file pinctrl-spear320.c.

#define PMX_I2C2_PORT_96_97_VAL 0

Definition at line 449 of file pinctrl-spear320.c.

#define PMX_I2C2_PORT_SEL_MASK (0x3 << 26)

Definition at line 448 of file pinctrl-spear320.c.

#define PMX_I2S_PL_39_VAL 0

Definition at line 207 of file pinctrl-spear320.c.

#define PMX_I2S_PL_40_VAL 0

Definition at line 213 of file pinctrl-spear320.c.

#define PMX_I2S_PL_41_42_VAL 0

Definition at line 220 of file pinctrl-spear320.c.

#define PMX_I2S_REF_CLK_PL_35_VAL 0

Definition at line 192 of file pinctrl-spear320.c.

#define PMX_MII2_PL_80_TO_85_VAL ((0x1 << 0) | (0x1 << 3) | (0x1 << 6) | (0x1 << 9) | (0x1 << 12) | (0x1 << 15))

Definition at line 332 of file pinctrl-spear320.c.

#define PMX_MII2_PL_86_87_VAL ((0x1 << 18) | (0x1 << 21))

Definition at line 341 of file pinctrl-spear320.c.

#define PMX_MII2_PL_88_89_VAL ((0x1 << 24) | (0x1 << 27))

Definition at line 348 of file pinctrl-spear320.c.

#define PMX_MII2_PL_90_91_VAL ((0x1 << 0) | (0x1 << 3))

Definition at line 356 of file pinctrl-spear320.c.

#define PMX_MII2_PL_92_93_VAL ((0x1 << 6) | (0x1 << 9))

Definition at line 363 of file pinctrl-spear320.c.

#define PMX_MII2_PL_94_95_VAL ((0x1 << 12) | (0x1 << 15))

Definition at line 370 of file pinctrl-spear320.c.

#define PMX_MII2_PL_96_97_VAL ((0x1 << 18) | (0x1 << 21))

Definition at line 377 of file pinctrl-spear320.c.

#define PMX_PL_0_1_MASK (0x3F << 0)

Definition at line 96 of file pinctrl-spear320.c.

#define PMX_PL_100_101_MASK (0x3F << 0)

Definition at line 393 of file pinctrl-spear320.c.

#define PMX_PL_10_11_MASK (0x3F << 0)

Definition at line 125 of file pinctrl-spear320.c.

#define PMX_PL_12_MASK (0x7 << 6)

Definition at line 129 of file pinctrl-spear320.c.

#define PMX_PL_13_14_MASK (0x3F << 9)

Definition at line 133 of file pinctrl-spear320.c.

#define PMX_PL_13_MASK (0x7 << 9)

Definition at line 134 of file pinctrl-spear320.c.

#define PMX_PL_14_MASK (0x7 << 12)

Definition at line 135 of file pinctrl-spear320.c.

#define PMX_PL_15_16_MASK (0x3F << 15)

Definition at line 144 of file pinctrl-spear320.c.

#define PMX_PL_15_MASK (0x7 << 15)

Definition at line 142 of file pinctrl-spear320.c.

#define PMX_PL_17_18_MASK (0x3F << 21)

Definition at line 148 of file pinctrl-spear320.c.

#define PMX_PL_19_MASK (0x7 << 27)

Definition at line 152 of file pinctrl-spear320.c.

#define PMX_PL_20_MASK (0x7 << 0)

Definition at line 157 of file pinctrl-spear320.c.

#define PMX_PL_21_TO_27_MASK (0x1FFFFF << 3)

Definition at line 161 of file pinctrl-spear320.c.

#define PMX_PL_28_29_MASK (0x3F << 24)

Definition at line 165 of file pinctrl-spear320.c.

#define PMX_PL_28_MASK (0x7 << 24)

Definition at line 166 of file pinctrl-spear320.c.

#define PMX_PL_29_MASK (0x7 << 27)

Definition at line 167 of file pinctrl-spear320.c.

#define PMX_PL_2_3_MASK (0x3F << 6)

Definition at line 100 of file pinctrl-spear320.c.

#define PMX_PL_30_31_MASK (0x3F << 0)

Definition at line 173 of file pinctrl-spear320.c.

#define PMX_PL_30_MASK (0x7 << 0)

Definition at line 175 of file pinctrl-spear320.c.

#define PMX_PL_31_MASK (0x7 << 3)

Definition at line 176 of file pinctrl-spear320.c.

#define PMX_PL_32_33_MASK (0x3F << 6)

Definition at line 181 of file pinctrl-spear320.c.

#define PMX_PL_34_MASK (0x7 << 12)

Definition at line 186 of file pinctrl-spear320.c.

#define PMX_PL_35_MASK (0x7 << 15)

Definition at line 191 of file pinctrl-spear320.c.

#define PMX_PL_36_MASK (0x7 << 18)

Definition at line 196 of file pinctrl-spear320.c.

#define PMX_PL_37_38_MASK (0x3F << 21)

Definition at line 201 of file pinctrl-spear320.c.

#define PMX_PL_39_MASK (0x7 << 27)

Definition at line 206 of file pinctrl-spear320.c.

#define PMX_PL_40_MASK (0x7 << 0)

Definition at line 212 of file pinctrl-spear320.c.

#define PMX_PL_41_42_MASK (0x3F << 3)

Definition at line 217 of file pinctrl-spear320.c.

#define PMX_PL_41_MASK (0x7 << 3)

Definition at line 218 of file pinctrl-spear320.c.

#define PMX_PL_42_MASK (0x7 << 6)

Definition at line 219 of file pinctrl-spear320.c.

#define PMX_PL_43_MASK (0x7 << 9)

Definition at line 225 of file pinctrl-spear320.c.

#define PMX_PL_44_45_MASK (0x3F << 12)

Definition at line 230 of file pinctrl-spear320.c.

#define PMX_PL_46_47_MASK (0x3F << 18)

Definition at line 235 of file pinctrl-spear320.c.

#define PMX_PL_48_49_MASK (0x3F << 24)

Definition at line 240 of file pinctrl-spear320.c.

#define PMX_PL_4_5_MASK (0x3F << 12)

Definition at line 105 of file pinctrl-spear320.c.

#define PMX_PL_50_51_MASK (0x3F << 0)

Definition at line 246 of file pinctrl-spear320.c.

#define PMX_PL_50_MASK (0x7 << 0)

Definition at line 249 of file pinctrl-spear320.c.

#define PMX_PL_51_MASK (0x7 << 3)

Definition at line 250 of file pinctrl-spear320.c.

#define PMX_PL_52_53_MASK (0x3F << 6)

Definition at line 254 of file pinctrl-spear320.c.

#define PMX_PL_54_55_56_MASK (0x1FF << 12)

Definition at line 259 of file pinctrl-spear320.c.

#define PMX_PL_57_MASK (0x7 << 21)

Definition at line 262 of file pinctrl-spear320.c.

#define PMX_PL_58_59_MASK (0x3F << 24)

Definition at line 266 of file pinctrl-spear320.c.

#define PMX_PL_58_MASK (0x7 << 24)

Definition at line 267 of file pinctrl-spear320.c.

#define PMX_PL_59_MASK (0x7 << 27)

Definition at line 268 of file pinctrl-spear320.c.

#define PMX_PL_5_MASK (0x7 << 15)

Definition at line 108 of file pinctrl-spear320.c.

#define PMX_PL_60_MASK (0x7 << 0)

Definition at line 274 of file pinctrl-spear320.c.

#define PMX_PL_61_TO_64_MASK (0xFFF << 3)

Definition at line 278 of file pinctrl-spear320.c.

#define PMX_PL_65_TO_68_MASK (0xFFF << 15)

Definition at line 282 of file pinctrl-spear320.c.

#define PMX_PL_69_MASK (0x7 << 27)

Definition at line 286 of file pinctrl-spear320.c.

#define PMX_PL_6_7_MASK (0x3F << 18)

Definition at line 111 of file pinctrl-spear320.c.

#define PMX_PL_6_MASK (0x7 << 18)

Definition at line 112 of file pinctrl-spear320.c.

#define PMX_PL_70_MASK (0x7 << 0)

Definition at line 293 of file pinctrl-spear320.c.

#define PMX_PL_71_72_MASK (0x3F << 3)

Definition at line 299 of file pinctrl-spear320.c.

#define PMX_PL_73_MASK (0x7 << 9)

Definition at line 305 of file pinctrl-spear320.c.

#define PMX_PL_74_MASK (0x7 << 12)

Definition at line 311 of file pinctrl-spear320.c.

#define PMX_PL_75_76_MASK (0x3F << 15)

Definition at line 317 of file pinctrl-spear320.c.

#define PMX_PL_77_78_79_MASK (0x1FF << 21)

Definition at line 323 of file pinctrl-spear320.c.

#define PMX_PL_7_MASK (0x7 << 21)

Definition at line 113 of file pinctrl-spear320.c.

#define PMX_PL_80_TO_85_MASK (0x3FFFF << 0)

Definition at line 330 of file pinctrl-spear320.c.

#define PMX_PL_86_87_MASK (0x3F << 18)

Definition at line 337 of file pinctrl-spear320.c.

#define PMX_PL_86_MASK (0x7 << 18)

Definition at line 338 of file pinctrl-spear320.c.

#define PMX_PL_87_MASK (0x7 << 21)

Definition at line 339 of file pinctrl-spear320.c.

#define PMX_PL_88_89_MASK (0x3F << 24)

Definition at line 346 of file pinctrl-spear320.c.

#define PMX_PL_8_9_MASK (0x3F << 24)

Definition at line 119 of file pinctrl-spear320.c.

#define PMX_PL_90_91_MASK (0x3F << 0)

Definition at line 354 of file pinctrl-spear320.c.

#define PMX_PL_92_93_MASK (0x3F << 6)

Definition at line 361 of file pinctrl-spear320.c.

#define PMX_PL_94_95_MASK (0x3F << 12)

Definition at line 368 of file pinctrl-spear320.c.

#define PMX_PL_96_97_MASK (0x3F << 18)

Definition at line 375 of file pinctrl-spear320.c.

#define PMX_PL_98_MASK (0x7 << 24)

Definition at line 382 of file pinctrl-spear320.c.

#define PMX_PL_99_MASK (0x7 << 27)

Definition at line 387 of file pinctrl-spear320.c.

#define PMX_PWM0_1_PL_37_38_VAL 0

Definition at line 202 of file pinctrl-spear320.c.

#define PMX_PWM0_1_PL_88_89_VAL ((0x4 << 24) | (0x4 << 27))

Definition at line 351 of file pinctrl-spear320.c.

#define PMX_PWM0_EXT_PL_31_VAL (0x4 << 3)

Definition at line 178 of file pinctrl-spear320.c.

#define PMX_PWM0_PL_15_VAL (0x2 << 15)

Definition at line 143 of file pinctrl-spear320.c.

#define PMX_PWM0_PL_43_VAL (0x4 << 9)

Definition at line 228 of file pinctrl-spear320.c.

#define PMX_PWM0_PL_60_VAL (0x4 << 0)

Definition at line 276 of file pinctrl-spear320.c.

#define PMX_PWM1_EXT_PL_30_VAL (0x4 << 0)

Definition at line 177 of file pinctrl-spear320.c.

#define PMX_PWM1_PL_14_VAL (0x2 << 12)

Definition at line 140 of file pinctrl-spear320.c.

#define PMX_PWM1_PL_42_VAL (0x4 << 6)

Definition at line 223 of file pinctrl-spear320.c.

#define PMX_PWM1_PL_59_VAL (0x4 << 27)

Definition at line 271 of file pinctrl-spear320.c.

#define PMX_PWM2_PL_13_VAL (0x2 << 9)

Definition at line 139 of file pinctrl-spear320.c.

#define PMX_PWM2_PL_34_VAL 0

Definition at line 187 of file pinctrl-spear320.c.

#define PMX_PWM2_PL_41_VAL (0x4 << 3)

Definition at line 222 of file pinctrl-spear320.c.

#define PMX_PWM2_PL_58_VAL (0x4 << 24)

Definition at line 270 of file pinctrl-spear320.c.

#define PMX_PWM2_PL_87_VAL (0x4 << 21)

Definition at line 344 of file pinctrl-spear320.c.

#define PMX_PWM3_PL_12_VAL 0

Definition at line 130 of file pinctrl-spear320.c.

#define PMX_PWM3_PL_40_VAL (0x4 << 0)

Definition at line 215 of file pinctrl-spear320.c.

#define PMX_PWM3_PL_57_VAL (0x4 << 21)

Definition at line 264 of file pinctrl-spear320.c.

#define PMX_PWM3_PL_86_VAL (0x4 << 18)

Definition at line 343 of file pinctrl-spear320.c.

#define PMX_PWM_0_1_PL_8_9_VAL ((0x2 << 24) | (0x2 << 27))

Definition at line 121 of file pinctrl-spear320.c.

#define PMX_PWM_2_PL_29_VAL (0x4 << 27)

Definition at line 170 of file pinctrl-spear320.c.

#define PMX_PWM_2_PL_7_VAL (0x2 << 21)

Definition at line 116 of file pinctrl-spear320.c.

#define PMX_PWM_3_PL_28_VAL (0x4 << 24)

Definition at line 169 of file pinctrl-spear320.c.

#define PMX_PWM_3_PL_6_VAL (0x2 << 18)

Definition at line 115 of file pinctrl-spear320.c.

#define PMX_RMII_PL_10_11_VAL ((0x4 << 0) | (0x4 << 3))

Definition at line 127 of file pinctrl-spear320.c.

#define PMX_RMII_PL_13_14_VAL ((0x4 << 9) | (0x4 << 12))

Definition at line 138 of file pinctrl-spear320.c.

#define PMX_RMII_PL_15_16_VAL ((0x4 << 15) | (0x4 << 18))

Definition at line 146 of file pinctrl-spear320.c.

#define PMX_RMII_PL_17_18_VAL ((0x4 << 21) | (0x4 << 24))

Definition at line 150 of file pinctrl-spear320.c.

#define PMX_RMII_PL_19_VAL (0x4 << 27)

Definition at line 154 of file pinctrl-spear320.c.

#define PMX_RMII_PL_20_VAL (0x4 << 0)

Definition at line 159 of file pinctrl-spear320.c.

#define PMX_RMII_PL_21_TO_27_VAL ((0x4 << 3) | (0x4 << 6) | (0x4 << 9) | (0x4 << 12) | (0x4 << 15) | (0x4 << 18) | (0x4 << 21))

Definition at line 163 of file pinctrl-spear320.c.

#define PMX_RS485_PL_77_78_79_VAL ((0x4 << 21) | (0x4 << 24) | (0x4 << 27))

Definition at line 327 of file pinctrl-spear320.c.

#define PMX_SDHCI_CD_PL_12_VAL (0x4 << 6)

Definition at line 131 of file pinctrl-spear320.c.

#define PMX_SDHCI_CD_PL_51_VAL 0

Definition at line 252 of file pinctrl-spear320.c.

#define PMX_SDHCI_CD_PORT_12_VAL 0

Definition at line 456 of file pinctrl-spear320.c.

#define PMX_SDHCI_CD_PORT_51_VAL (0x1 << 29)

Definition at line 457 of file pinctrl-spear320.c.

#define PMX_SDHCI_CD_PORT_SEL_MASK (0x1 << 29)

Definition at line 455 of file pinctrl-spear320.c.

#define pmx_sdhci_common_modemux

Value:

{                               \
        .modes = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE |   \
            SMALL_PRINTERS_MODE | EXTENDED_MODE,        \
        .muxregs = sdhci_muxreg,                \
        .nmuxregs = ARRAY_SIZE(sdhci_muxreg),           \
    }, {                                \
        .modes = EXTENDED_MODE,                 \
        .muxregs = sdhci_ext_muxreg,                \
        .nmuxregs = ARRAY_SIZE(sdhci_ext_muxreg),       \
    }

Definition at line 837 of file pinctrl-spear320.c.

#define PMX_SDHCI_PL_100_101_VAL 0

Definition at line 394 of file pinctrl-spear320.c.

#define PMX_SDHCI_PL_43_VAL 0

Definition at line 226 of file pinctrl-spear320.c.

#define PMX_SDHCI_PL_44_45_VAL 0

Definition at line 231 of file pinctrl-spear320.c.

#define PMX_SDHCI_PL_46_47_VAL 0

Definition at line 236 of file pinctrl-spear320.c.

#define PMX_SDHCI_PL_48_49_VAL 0

Definition at line 241 of file pinctrl-spear320.c.

#define PMX_SDHCI_PL_50_VAL 0

Definition at line 251 of file pinctrl-spear320.c.

#define PMX_SDHCI_PL_99_VAL 0

Definition at line 388 of file pinctrl-spear320.c.

#define PMX_SMII_PL_10_11_VAL 0

Definition at line 126 of file pinctrl-spear320.c.

#define PMX_SMII_PL_21_TO_27_VAL 0

Definition at line 162 of file pinctrl-spear320.c.

#define PMX_SPP_PL_69_VAL (0x3 << 27)

Definition at line 289 of file pinctrl-spear320.c.

#define PMX_SPP_PL_70_VAL (0x3 << 0)

Definition at line 296 of file pinctrl-spear320.c.

#define PMX_SPP_PL_71_72_VAL ((0x3 << 3) | (0x3 << 6))

Definition at line 302 of file pinctrl-spear320.c.

#define PMX_SPP_PL_73_VAL (0x3 << 9)

Definition at line 308 of file pinctrl-spear320.c.

#define PMX_SPP_PL_74_VAL (0x3 << 12)

Definition at line 314 of file pinctrl-spear320.c.

#define PMX_SPP_PL_75_76_VAL ((0x3 << 15) | (0x3 << 18))

Definition at line 320 of file pinctrl-spear320.c.

#define PMX_SPP_PL_77_78_79_VAL ((0x3 << 21) | (0x3 << 24) | (0x3 << 27))

Definition at line 326 of file pinctrl-spear320.c.

#define PMX_SPP_PL_80_TO_85_VAL ((0x3 << 0) | (0x3 << 3) | (0x3 << 6) | (0x3 << 9) | (0x3 << 12) | (0x3 << 15))

Definition at line 334 of file pinctrl-spear320.c.

#define PMX_SSP1_PL_17_18_19_20_VAL 0

Definition at line 149 of file pinctrl-spear320.c.

#define PMX_SSP1_PL_36_VAL (0x4 << 18)

Definition at line 199 of file pinctrl-spear320.c.

#define PMX_SSP1_PL_37_38_VAL ((0x4 << 21) | (0x4 << 24))

Definition at line 204 of file pinctrl-spear320.c.

#define PMX_SSP1_PL_39_VAL (0x4 << 27)

Definition at line 209 of file pinctrl-spear320.c.

#define PMX_SSP1_PL_48_49_VAL ((0x4 << 24) | (0x4 << 27))

Definition at line 243 of file pinctrl-spear320.c.

#define PMX_SSP1_PL_50_51_VAL ((0x4 << 0) | (0x4 << 3))

Definition at line 248 of file pinctrl-spear320.c.

#define PMX_SSP1_PL_65_TO_68_VAL ((0x4 << 15) | (0x4 << 18) | (0x4 << 21) | (0x4 << 24))

Definition at line 284 of file pinctrl-spear320.c.

#define PMX_SSP1_PL_94_95_VAL ((0x4 << 12) | (0x4 << 15))

Definition at line 373 of file pinctrl-spear320.c.

#define PMX_SSP1_PL_96_97_VAL ((0x4 << 18) | (0x4 << 21))

Definition at line 380 of file pinctrl-spear320.c.

#define PMX_SSP1_PORT_17_TO_20_VAL (0x4 << 8)

Definition at line 402 of file pinctrl-spear320.c.

#define PMX_SSP1_PORT_36_TO_39_VAL (0x3 << 8)

Definition at line 401 of file pinctrl-spear320.c.

#define PMX_SSP1_PORT_48_TO_51_VAL (0x2 << 8)

Definition at line 400 of file pinctrl-spear320.c.

#define PMX_SSP1_PORT_65_TO_68_VAL (0x1 << 8)

Definition at line 399 of file pinctrl-spear320.c.

#define PMX_SSP1_PORT_94_TO_97_VAL 0

Definition at line 398 of file pinctrl-spear320.c.

#define PMX_SSP1_PORT_SEL_MASK (0x7 << 8)

Definition at line 397 of file pinctrl-spear320.c.

#define PMX_SSP2_PL_13_14_15_16_VAL 0

Definition at line 136 of file pinctrl-spear320.c.

#define PMX_SSP2_PL_32_33_VAL ((0x4 << 6) | (0x4 << 9))

Definition at line 184 of file pinctrl-spear320.c.

#define PMX_SSP2_PL_34_VAL (0x4 << 12)

Definition at line 189 of file pinctrl-spear320.c.

#define PMX_SSP2_PL_35_VAL (0x4 << 15)

Definition at line 194 of file pinctrl-spear320.c.

#define PMX_SSP2_PL_44_45_VAL ((0x4 << 12) | (0x4 << 15))

Definition at line 233 of file pinctrl-spear320.c.

#define PMX_SSP2_PL_46_47_VAL ((0x4 << 18) | (0x4 << 21))

Definition at line 238 of file pinctrl-spear320.c.

#define PMX_SSP2_PL_61_TO_64_VAL ((0x4 << 3) | (0x4 << 6) | (0x4 << 9) | (0x4 << 12))

Definition at line 280 of file pinctrl-spear320.c.

#define PMX_SSP2_PL_90_91_VAL ((0x4 << 0) | (0x4 << 3))

Definition at line 359 of file pinctrl-spear320.c.

#define PMX_SSP2_PL_92_93_VAL ((0x4 << 6) | (0x4 << 9))

Definition at line 366 of file pinctrl-spear320.c.

#define PMX_SSP2_PORT_13_TO_16_VAL (0x4 << 11)

Definition at line 409 of file pinctrl-spear320.c.

#define PMX_SSP2_PORT_32_TO_35_VAL (0x3 << 11)

Definition at line 408 of file pinctrl-spear320.c.

#define PMX_SSP2_PORT_44_TO_47_VAL (0x2 << 11)

Definition at line 407 of file pinctrl-spear320.c.

#define PMX_SSP2_PORT_61_TO_64_VAL (0x1 << 11)

Definition at line 406 of file pinctrl-spear320.c.

#define PMX_SSP2_PORT_90_TO_93_VAL 0

Definition at line 405 of file pinctrl-spear320.c.

#define PMX_SSP2_PORT_SEL_MASK (0x7 << 11)

Definition at line 404 of file pinctrl-spear320.c.

#define PMX_TOUCH_X_PL_36_VAL 0

Definition at line 197 of file pinctrl-spear320.c.

#define PMX_TOUCH_Y_PL_5_VAL 0x0

Definition at line 109 of file pinctrl-spear320.c.

#define PMX_UART1_ENH_PL_2_3_VAL ((0x4 << 6) | (0x4 << 9))

Definition at line 103 of file pinctrl-spear320.c.

#define PMX_UART1_ENH_PL_31_VAL (0x3 << 3)

Definition at line 179 of file pinctrl-spear320.c.

#define PMX_UART1_ENH_PL_32_33_VAL ((0x3 << 6) | (0x3 << 9))

Definition at line 183 of file pinctrl-spear320.c.

#define PMX_UART1_ENH_PL_34_VAL (0x2 << 12)

Definition at line 188 of file pinctrl-spear320.c.

#define PMX_UART1_ENH_PL_35_VAL (0x2 << 15)

Definition at line 193 of file pinctrl-spear320.c.

#define PMX_UART1_ENH_PL_36_VAL (0x2 << 18)

Definition at line 198 of file pinctrl-spear320.c.

#define PMX_UART1_ENH_PL_43_VAL (0x2 << 9)

Definition at line 227 of file pinctrl-spear320.c.

#define PMX_UART1_ENH_PL_44_45_VAL ((0x2 << 12) | (0x2 << 15))

Definition at line 232 of file pinctrl-spear320.c.

#define PMX_UART1_ENH_PL_4_5_VAL ((0x4 << 12) | (0x4 << 15))

Definition at line 107 of file pinctrl-spear320.c.

#define PMX_UART1_ENH_PL_6_7_VAL ((0x4 << 18) | (0x4 << 21))

Definition at line 117 of file pinctrl-spear320.c.

#define PMX_UART1_ENH_PL_80_TO_85_VAL ((0x4 << 0) | (0x4 << 3) | (0x4 << 6) | (0x4 << 9) | (0x4 << 12) | (0x4 << 15))

Definition at line 335 of file pinctrl-spear320.c.

#define PMX_UART1_ENH_PORT_32_TO_34_36_VAL (0x2 << 14)

Definition at line 414 of file pinctrl-spear320.c.

#define PMX_UART1_ENH_PORT_3_TO_5_7_VAL (0x3 << 14)

Definition at line 415 of file pinctrl-spear320.c.

#define PMX_UART1_ENH_PORT_44_45_34_36_VAL (0x1 << 14)

Definition at line 413 of file pinctrl-spear320.c.

#define PMX_UART1_ENH_PORT_81_TO_85_VAL 0

Definition at line 412 of file pinctrl-spear320.c.

#define PMX_UART1_ENH_PORT_SEL_MASK (0x3 << 14)

Definition at line 411 of file pinctrl-spear320.c.

#define PMX_UART1_PL_28_29_VAL 0

Definition at line 168 of file pinctrl-spear320.c.

#define PMX_UART2_PL_0_1_VAL 0x0

Definition at line 97 of file pinctrl-spear320.c.

#define PMX_UART3_PL_15_16_VAL ((0x1 << 15) | (0x1 << 18))

Definition at line 145 of file pinctrl-spear320.c.

#define PMX_UART3_PL_41_42_VAL ((0x2 << 3) | (0x2 << 6))

Definition at line 221 of file pinctrl-spear320.c.

#define PMX_UART3_PL_52_53_VAL ((0x4 << 6) | (0x4 << 9))

Definition at line 257 of file pinctrl-spear320.c.

#define PMX_UART3_PL_73_VAL (0x4 << 9)

Definition at line 309 of file pinctrl-spear320.c.

#define PMX_UART3_PL_74_VAL (0x4 << 12)

Definition at line 315 of file pinctrl-spear320.c.

#define PMX_UART3_PL_8_9_VAL ((0x1 << 24) | (0x1 << 27))

Definition at line 120 of file pinctrl-spear320.c.

#define PMX_UART3_PL_94_95_VAL ((0x3 << 12) | (0x3 << 15))

Definition at line 372 of file pinctrl-spear320.c.

#define PMX_UART3_PL_98_VAL (0x4 << 24)

Definition at line 385 of file pinctrl-spear320.c.

#define PMX_UART3_PL_99_VAL (0x4 << 27)

Definition at line 390 of file pinctrl-spear320.c.

#define PMX_UART3_PORT_15_VAL (0x4 << 16)

Definition at line 422 of file pinctrl-spear320.c.

#define PMX_UART3_PORT_41_VAL (0x3 << 16)

Definition at line 421 of file pinctrl-spear320.c.

#define PMX_UART3_PORT_52_VAL (0x2 << 16)

Definition at line 420 of file pinctrl-spear320.c.

#define PMX_UART3_PORT_73_VAL (0x1 << 16)

Definition at line 419 of file pinctrl-spear320.c.

#define PMX_UART3_PORT_8_VAL (0x5 << 16)

Definition at line 423 of file pinctrl-spear320.c.

#define PMX_UART3_PORT_94_VAL 0

Definition at line 418 of file pinctrl-spear320.c.

#define PMX_UART3_PORT_99_VAL (0x6 << 16)

Definition at line 424 of file pinctrl-spear320.c.

#define PMX_UART3_PORT_SEL_MASK (0x7 << 16)

Definition at line 417 of file pinctrl-spear320.c.

#define PMX_UART4_PL_100_101_VAL ((0x4 << 0) | (0x4 << 3))

Definition at line 395 of file pinctrl-spear320.c.

#define PMX_UART4_PL_13_14_VAL ((0x1 << 9) | (0x1 << 12))

Definition at line 137 of file pinctrl-spear320.c.

#define PMX_UART4_PL_39_VAL (0x2 << 27)

Definition at line 208 of file pinctrl-spear320.c.

#define PMX_UART4_PL_40_VAL (0x2 << 0)

Definition at line 214 of file pinctrl-spear320.c.

#define PMX_UART4_PL_6_7_VAL ((0x1 << 18) | (0x1 << 21))

Definition at line 114 of file pinctrl-spear320.c.

#define PMX_UART4_PL_71_72_VAL ((0x4 << 3) | (0x4 << 6))

Definition at line 303 of file pinctrl-spear320.c.

#define PMX_UART4_PL_92_93_VAL ((0x3 << 6) | (0x3 << 9))

Definition at line 365 of file pinctrl-spear320.c.

#define PMX_UART4_PORT_101_VAL (0x5 << 19)

Definition at line 432 of file pinctrl-spear320.c.

#define PMX_UART4_PORT_13_VAL (0x3 << 19)

Definition at line 430 of file pinctrl-spear320.c.

#define PMX_UART4_PORT_39_VAL (0x2 << 19)

Definition at line 429 of file pinctrl-spear320.c.

#define PMX_UART4_PORT_6_VAL (0x4 << 19)

Definition at line 431 of file pinctrl-spear320.c.

#define PMX_UART4_PORT_71_VAL (0x1 << 19)

Definition at line 428 of file pinctrl-spear320.c.

#define PMX_UART4_PORT_92_VAL 0

Definition at line 427 of file pinctrl-spear320.c.

#define PMX_UART4_PORT_SEL_MASK (0x7 << 19)

Definition at line 426 of file pinctrl-spear320.c.

#define PMX_UART5_PL_37_38_VAL ((0x2 << 21) | (0x2 << 24))

Definition at line 203 of file pinctrl-spear320.c.

#define PMX_UART5_PL_4_5_VAL ((0x1 << 12) | (0x1 << 15))

Definition at line 106 of file pinctrl-spear320.c.

#define PMX_UART5_PL_69_VAL (0x4 << 27)

Definition at line 290 of file pinctrl-spear320.c.

#define PMX_UART5_PL_70_VAL (0x4 << 0)

Definition at line 297 of file pinctrl-spear320.c.

#define PMX_UART5_PL_90_91_VAL ((0x3 << 0) | (0x3 << 3))

Definition at line 358 of file pinctrl-spear320.c.

#define PMX_UART5_PORT_37_VAL (0x2 << 22)

Definition at line 437 of file pinctrl-spear320.c.

#define PMX_UART5_PORT_4_VAL (0x3 << 22)

Definition at line 438 of file pinctrl-spear320.c.

#define PMX_UART5_PORT_69_VAL (0x1 << 22)

Definition at line 436 of file pinctrl-spear320.c.

#define PMX_UART5_PORT_90_VAL 0

Definition at line 435 of file pinctrl-spear320.c.

#define PMX_UART5_PORT_SEL_MASK (0x3 << 22)

Definition at line 434 of file pinctrl-spear320.c.

#define PMX_UART6_PL_2_3_VAL ((0x1 << 6) | (0x1 << 9))

Definition at line 102 of file pinctrl-spear320.c.

#define PMX_UART6_PL_88_89_VAL ((0x3 << 24) | (0x3 << 27))

Definition at line 350 of file pinctrl-spear320.c.

#define PMX_UART6_PORT_2_VAL (0x1 << 24)

Definition at line 442 of file pinctrl-spear320.c.

#define PMX_UART6_PORT_88_VAL 0

Definition at line 441 of file pinctrl-spear320.c.

#define PMX_UART6_PORT_SEL_MASK (0x1 << 24)

Definition at line 440 of file pinctrl-spear320.c.

#define SMALL_PRINTERS_MODE (1 << 3)

Definition at line 30 of file pinctrl-spear320.c.

Function Documentation

arch_initcall ( spear320_pinctrl_init )

MODULE_AUTHOR ( "Viresh Kumar <[email protected]>" )

MODULE_DESCRIPTION ( "ST Microelectronics SPEAr320 pinctrl driver" )

MODULE_DEVICE_TABLE	(	of	,
		spear320_pinctrl_of_match
	)

module_exit ( spear320_pinctrl_exit )

MODULE_LICENSE ( "GPL v2" )

Macros

Functions

Macro Definition Documentation

Function Documentation