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Macros
regs-timer.h File Reference

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Macros

#define S3C_TIMERREG(x)   (S3C_VA_TIMER + (x))
 
#define S3C_TIMERREG2(tmr, reg)   S3C_TIMERREG((reg)+0x0c+((tmr)*0x0c))
 
#define S3C2410_TCFG0   S3C_TIMERREG(0x00)
 
#define S3C2410_TCFG1   S3C_TIMERREG(0x04)
 
#define S3C2410_TCON   S3C_TIMERREG(0x08)
 
#define S3C64XX_TINT_CSTAT   S3C_TIMERREG(0x44)
 
#define S3C2410_TCFG_PRESCALER0_MASK   (255<<0)
 
#define S3C2410_TCFG_PRESCALER1_MASK   (255<<8)
 
#define S3C2410_TCFG_PRESCALER1_SHIFT   (8)
 
#define S3C2410_TCFG_DEADZONE_MASK   (255<<16)
 
#define S3C2410_TCFG_DEADZONE_SHIFT   (16)
 
#define S3C2410_TCFG1_MUX4_DIV2   (0<<16)
 
#define S3C2410_TCFG1_MUX4_DIV4   (1<<16)
 
#define S3C2410_TCFG1_MUX4_DIV8   (2<<16)
 
#define S3C2410_TCFG1_MUX4_DIV16   (3<<16)
 
#define S3C2410_TCFG1_MUX4_TCLK1   (4<<16)
 
#define S3C2410_TCFG1_MUX4_MASK   (15<<16)
 
#define S3C2410_TCFG1_MUX4_SHIFT   (16)
 
#define S3C2410_TCFG1_MUX3_DIV2   (0<<12)
 
#define S3C2410_TCFG1_MUX3_DIV4   (1<<12)
 
#define S3C2410_TCFG1_MUX3_DIV8   (2<<12)
 
#define S3C2410_TCFG1_MUX3_DIV16   (3<<12)
 
#define S3C2410_TCFG1_MUX3_TCLK1   (4<<12)
 
#define S3C2410_TCFG1_MUX3_MASK   (15<<12)
 
#define S3C2410_TCFG1_MUX2_DIV2   (0<<8)
 
#define S3C2410_TCFG1_MUX2_DIV4   (1<<8)
 
#define S3C2410_TCFG1_MUX2_DIV8   (2<<8)
 
#define S3C2410_TCFG1_MUX2_DIV16   (3<<8)
 
#define S3C2410_TCFG1_MUX2_TCLK1   (4<<8)
 
#define S3C2410_TCFG1_MUX2_MASK   (15<<8)
 
#define S3C2410_TCFG1_MUX1_DIV2   (0<<4)
 
#define S3C2410_TCFG1_MUX1_DIV4   (1<<4)
 
#define S3C2410_TCFG1_MUX1_DIV8   (2<<4)
 
#define S3C2410_TCFG1_MUX1_DIV16   (3<<4)
 
#define S3C2410_TCFG1_MUX1_TCLK0   (4<<4)
 
#define S3C2410_TCFG1_MUX1_MASK   (15<<4)
 
#define S3C2410_TCFG1_MUX0_DIV2   (0<<0)
 
#define S3C2410_TCFG1_MUX0_DIV4   (1<<0)
 
#define S3C2410_TCFG1_MUX0_DIV8   (2<<0)
 
#define S3C2410_TCFG1_MUX0_DIV16   (3<<0)
 
#define S3C2410_TCFG1_MUX0_TCLK0   (4<<0)
 
#define S3C2410_TCFG1_MUX0_MASK   (15<<0)
 
#define S3C2410_TCFG1_MUX_DIV2   (0<<0)
 
#define S3C2410_TCFG1_MUX_DIV4   (1<<0)
 
#define S3C2410_TCFG1_MUX_DIV8   (2<<0)
 
#define S3C2410_TCFG1_MUX_DIV16   (3<<0)
 
#define S3C2410_TCFG1_MUX_TCLK   (4<<0)
 
#define S3C2410_TCFG1_MUX_MASK   (15<<0)
 
#define S3C64XX_TCFG1_MUX_DIV1   (0<<0)
 
#define S3C64XX_TCFG1_MUX_DIV2   (1<<0)
 
#define S3C64XX_TCFG1_MUX_DIV4   (2<<0)
 
#define S3C64XX_TCFG1_MUX_DIV8   (3<<0)
 
#define S3C64XX_TCFG1_MUX_DIV16   (4<<0)
 
#define S3C64XX_TCFG1_MUX_TCLK   (5<<0) /* 3 sets of TCLK */
 
#define S3C64XX_TCFG1_MUX_MASK   (15<<0)
 
#define S3C2410_TCFG1_SHIFT(x)   ((x) * 4)
 
#define S3C2410_TCNTB(tmr)   S3C_TIMERREG2(tmr, 0x00)
 
#define S3C2410_TCMPB(tmr)   S3C_TIMERREG2(tmr, 0x04)
 
#define S3C2410_TCNTO(tmr)   S3C_TIMERREG2(tmr, (((tmr) == 4) ? 0x04 : 0x08))
 
#define S3C2410_TCON_T4RELOAD   (1<<22)
 
#define S3C2410_TCON_T4MANUALUPD   (1<<21)
 
#define S3C2410_TCON_T4START   (1<<20)
 
#define S3C2410_TCON_T3RELOAD   (1<<19)
 
#define S3C2410_TCON_T3INVERT   (1<<18)
 
#define S3C2410_TCON_T3MANUALUPD   (1<<17)
 
#define S3C2410_TCON_T3START   (1<<16)
 
#define S3C2410_TCON_T2RELOAD   (1<<15)
 
#define S3C2410_TCON_T2INVERT   (1<<14)
 
#define S3C2410_TCON_T2MANUALUPD   (1<<13)
 
#define S3C2410_TCON_T2START   (1<<12)
 
#define S3C2410_TCON_T1RELOAD   (1<<11)
 
#define S3C2410_TCON_T1INVERT   (1<<10)
 
#define S3C2410_TCON_T1MANUALUPD   (1<<9)
 
#define S3C2410_TCON_T1START   (1<<8)
 
#define S3C2410_TCON_T0DEADZONE   (1<<4)
 
#define S3C2410_TCON_T0RELOAD   (1<<3)
 
#define S3C2410_TCON_T0INVERT   (1<<2)
 
#define S3C2410_TCON_T0MANUALUPD   (1<<1)
 
#define S3C2410_TCON_T0START   (1<<0)
 

Macro Definition Documentation

#define S3C2410_TCFG0   S3C_TIMERREG(0x00)

Definition at line 19 of file regs-timer.h.

#define S3C2410_TCFG1   S3C_TIMERREG(0x04)

Definition at line 20 of file regs-timer.h.

#define S3C2410_TCFG1_MUX0_DIV16   (3<<0)

Definition at line 65 of file regs-timer.h.

#define S3C2410_TCFG1_MUX0_DIV2   (0<<0)

Definition at line 62 of file regs-timer.h.

#define S3C2410_TCFG1_MUX0_DIV4   (1<<0)

Definition at line 63 of file regs-timer.h.

#define S3C2410_TCFG1_MUX0_DIV8   (2<<0)

Definition at line 64 of file regs-timer.h.

#define S3C2410_TCFG1_MUX0_MASK   (15<<0)

Definition at line 67 of file regs-timer.h.

#define S3C2410_TCFG1_MUX0_TCLK0   (4<<0)

Definition at line 66 of file regs-timer.h.

#define S3C2410_TCFG1_MUX1_DIV16   (3<<4)

Definition at line 58 of file regs-timer.h.

#define S3C2410_TCFG1_MUX1_DIV2   (0<<4)

Definition at line 55 of file regs-timer.h.

#define S3C2410_TCFG1_MUX1_DIV4   (1<<4)

Definition at line 56 of file regs-timer.h.

#define S3C2410_TCFG1_MUX1_DIV8   (2<<4)

Definition at line 57 of file regs-timer.h.

#define S3C2410_TCFG1_MUX1_MASK   (15<<4)

Definition at line 60 of file regs-timer.h.

#define S3C2410_TCFG1_MUX1_TCLK0   (4<<4)

Definition at line 59 of file regs-timer.h.

#define S3C2410_TCFG1_MUX2_DIV16   (3<<8)

Definition at line 50 of file regs-timer.h.

#define S3C2410_TCFG1_MUX2_DIV2   (0<<8)

Definition at line 47 of file regs-timer.h.

#define S3C2410_TCFG1_MUX2_DIV4   (1<<8)

Definition at line 48 of file regs-timer.h.

#define S3C2410_TCFG1_MUX2_DIV8   (2<<8)

Definition at line 49 of file regs-timer.h.

#define S3C2410_TCFG1_MUX2_MASK   (15<<8)

Definition at line 52 of file regs-timer.h.

#define S3C2410_TCFG1_MUX2_TCLK1   (4<<8)

Definition at line 51 of file regs-timer.h.

#define S3C2410_TCFG1_MUX3_DIV16   (3<<12)

Definition at line 42 of file regs-timer.h.

#define S3C2410_TCFG1_MUX3_DIV2   (0<<12)

Definition at line 39 of file regs-timer.h.

#define S3C2410_TCFG1_MUX3_DIV4   (1<<12)

Definition at line 40 of file regs-timer.h.

#define S3C2410_TCFG1_MUX3_DIV8   (2<<12)

Definition at line 41 of file regs-timer.h.

#define S3C2410_TCFG1_MUX3_MASK   (15<<12)

Definition at line 44 of file regs-timer.h.

#define S3C2410_TCFG1_MUX3_TCLK1   (4<<12)

Definition at line 43 of file regs-timer.h.

#define S3C2410_TCFG1_MUX4_DIV16   (3<<16)

Definition at line 34 of file regs-timer.h.

#define S3C2410_TCFG1_MUX4_DIV2   (0<<16)

Definition at line 31 of file regs-timer.h.

#define S3C2410_TCFG1_MUX4_DIV4   (1<<16)

Definition at line 32 of file regs-timer.h.

#define S3C2410_TCFG1_MUX4_DIV8   (2<<16)

Definition at line 33 of file regs-timer.h.

#define S3C2410_TCFG1_MUX4_MASK   (15<<16)

Definition at line 36 of file regs-timer.h.

#define S3C2410_TCFG1_MUX4_SHIFT   (16)

Definition at line 37 of file regs-timer.h.

#define S3C2410_TCFG1_MUX4_TCLK1   (4<<16)

Definition at line 35 of file regs-timer.h.

#define S3C2410_TCFG1_MUX_DIV16   (3<<0)

Definition at line 72 of file regs-timer.h.

#define S3C2410_TCFG1_MUX_DIV2   (0<<0)

Definition at line 69 of file regs-timer.h.

#define S3C2410_TCFG1_MUX_DIV4   (1<<0)

Definition at line 70 of file regs-timer.h.

#define S3C2410_TCFG1_MUX_DIV8   (2<<0)

Definition at line 71 of file regs-timer.h.

#define S3C2410_TCFG1_MUX_MASK   (15<<0)

Definition at line 74 of file regs-timer.h.

#define S3C2410_TCFG1_MUX_TCLK   (4<<0)

Definition at line 73 of file regs-timer.h.

#define S3C2410_TCFG1_SHIFT (   x)    ((x) * 4)

Definition at line 84 of file regs-timer.h.

#define S3C2410_TCFG_DEADZONE_MASK   (255<<16)

Definition at line 28 of file regs-timer.h.

#define S3C2410_TCFG_DEADZONE_SHIFT   (16)

Definition at line 29 of file regs-timer.h.

#define S3C2410_TCFG_PRESCALER0_MASK   (255<<0)

Definition at line 25 of file regs-timer.h.

#define S3C2410_TCFG_PRESCALER1_MASK   (255<<8)

Definition at line 26 of file regs-timer.h.

#define S3C2410_TCFG_PRESCALER1_SHIFT   (8)

Definition at line 27 of file regs-timer.h.

#define S3C2410_TCMPB (   tmr)    S3C_TIMERREG2(tmr, 0x04)

Definition at line 93 of file regs-timer.h.

#define S3C2410_TCNTB (   tmr)    S3C_TIMERREG2(tmr, 0x00)

Definition at line 92 of file regs-timer.h.

#define S3C2410_TCNTO (   tmr)    S3C_TIMERREG2(tmr, (((tmr) == 4) ? 0x04 : 0x08))

Definition at line 94 of file regs-timer.h.

#define S3C2410_TCON   S3C_TIMERREG(0x08)

Definition at line 21 of file regs-timer.h.

#define S3C2410_TCON_T0DEADZONE   (1<<4)

Definition at line 115 of file regs-timer.h.

#define S3C2410_TCON_T0INVERT   (1<<2)

Definition at line 117 of file regs-timer.h.

#define S3C2410_TCON_T0MANUALUPD   (1<<1)

Definition at line 118 of file regs-timer.h.

#define S3C2410_TCON_T0RELOAD   (1<<3)

Definition at line 116 of file regs-timer.h.

#define S3C2410_TCON_T0START   (1<<0)

Definition at line 119 of file regs-timer.h.

#define S3C2410_TCON_T1INVERT   (1<<10)

Definition at line 111 of file regs-timer.h.

#define S3C2410_TCON_T1MANUALUPD   (1<<9)

Definition at line 112 of file regs-timer.h.

#define S3C2410_TCON_T1RELOAD   (1<<11)

Definition at line 110 of file regs-timer.h.

#define S3C2410_TCON_T1START   (1<<8)

Definition at line 113 of file regs-timer.h.

#define S3C2410_TCON_T2INVERT   (1<<14)

Definition at line 106 of file regs-timer.h.

#define S3C2410_TCON_T2MANUALUPD   (1<<13)

Definition at line 107 of file regs-timer.h.

#define S3C2410_TCON_T2RELOAD   (1<<15)

Definition at line 105 of file regs-timer.h.

#define S3C2410_TCON_T2START   (1<<12)

Definition at line 108 of file regs-timer.h.

#define S3C2410_TCON_T3INVERT   (1<<18)

Definition at line 101 of file regs-timer.h.

#define S3C2410_TCON_T3MANUALUPD   (1<<17)

Definition at line 102 of file regs-timer.h.

#define S3C2410_TCON_T3RELOAD   (1<<19)

Definition at line 100 of file regs-timer.h.

#define S3C2410_TCON_T3START   (1<<16)

Definition at line 103 of file regs-timer.h.

#define S3C2410_TCON_T4MANUALUPD   (1<<21)

Definition at line 97 of file regs-timer.h.

#define S3C2410_TCON_T4RELOAD   (1<<22)

Definition at line 96 of file regs-timer.h.

#define S3C2410_TCON_T4START   (1<<20)

Definition at line 98 of file regs-timer.h.

#define S3C64XX_TCFG1_MUX_DIV1   (0<<0)

Definition at line 76 of file regs-timer.h.

#define S3C64XX_TCFG1_MUX_DIV16   (4<<0)

Definition at line 80 of file regs-timer.h.

#define S3C64XX_TCFG1_MUX_DIV2   (1<<0)

Definition at line 77 of file regs-timer.h.

#define S3C64XX_TCFG1_MUX_DIV4   (2<<0)

Definition at line 78 of file regs-timer.h.

#define S3C64XX_TCFG1_MUX_DIV8   (3<<0)

Definition at line 79 of file regs-timer.h.

#define S3C64XX_TCFG1_MUX_MASK   (15<<0)

Definition at line 82 of file regs-timer.h.

#define S3C64XX_TCFG1_MUX_TCLK   (5<<0) /* 3 sets of TCLK */

Definition at line 81 of file regs-timer.h.

#define S3C64XX_TINT_CSTAT   S3C_TIMERREG(0x44)

Definition at line 23 of file regs-timer.h.

#define S3C_TIMERREG (   x)    (S3C_VA_TIMER + (x))

Definition at line 16 of file regs-timer.h.

#define S3C_TIMERREG2 (   tmr,
  reg 
)    S3C_TIMERREG((reg)+0x0c+((tmr)*0x0c))

Definition at line 17 of file regs-timer.h.