ints.c File Reference

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <asm/traps.h>
#include <asm/machdep.h>
#include <asm/m68360.h>

Go to the source code of this file.

Macros
#define	INTERNAL_IRQS   (96)

Functions
void	cpm_interrupt_init (void)
asmlinkage void	system_call (void)
asmlinkage void	buserr (void)
asmlinkage void	trap (void)
asmlinkage void	bad_interrupt (void)
asmlinkage void	inthandler (void)
void __init	trap_init (void)
void	init_IRQ (void)

Variables
QUICC *	pquicc

Macro Definition Documentation

#define INTERNAL_IRQS   (96)

Definition at line 26 of file ints.c.

Function Documentation

asmlinkage void bad_interrupt

(

void

)

asmlinkage void buserr

(

void

)

void cpm_interrupt_init

(

void

)

Definition at line 124 of file commproc.c.

void init_IRQ

(

void

)

The hexagon core comes with a first-level interrupt controller with 32 total possible interrupts. When the core is embedded into different systems/platforms, it is typically wrapped by macro cells that provide one or more second-level interrupt controllers that are cascaded into one or more of the first-level interrupts handled here. The precise wiring of these other irqs varies from platform to platform, and are set up & configured in the platform-specific files.

The first-level interrupt controller is wrapped by the VM, which virtualizes the interrupt controller for us. It provides a very simple, fast & efficient API, and so the fasteoi handler is appropriate for this case.

Definition at line 129 of file ints.c.

asmlinkage void inthandler

(

void

)

asmlinkage void system_call

(

void

)

asmlinkage void trap

(

void

)

void __init trap_init

(

void

)

Definition at line 61 of file ints.c.

Variable Documentation

QUICC* pquicc

Definition at line 60 of file commproc.c.