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Macros
qib_6120_regs.h File Reference

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Macros

#define QIB_6120_Revision_OFFS   0x0
 
#define QIB_6120_Revision_R_Simulator_LSB   0x3F
 
#define QIB_6120_Revision_R_Simulator_RMASK   0x1
 
#define QIB_6120_Revision_Reserved_LSB   0x28
 
#define QIB_6120_Revision_Reserved_RMASK   0x7FFFFF
 
#define QIB_6120_Revision_BoardID_LSB   0x20
 
#define QIB_6120_Revision_BoardID_RMASK   0xFF
 
#define QIB_6120_Revision_R_SW_LSB   0x18
 
#define QIB_6120_Revision_R_SW_RMASK   0xFF
 
#define QIB_6120_Revision_R_Arch_LSB   0x10
 
#define QIB_6120_Revision_R_Arch_RMASK   0xFF
 
#define QIB_6120_Revision_R_ChipRevMajor_LSB   0x8
 
#define QIB_6120_Revision_R_ChipRevMajor_RMASK   0xFF
 
#define QIB_6120_Revision_R_ChipRevMinor_LSB   0x0
 
#define QIB_6120_Revision_R_ChipRevMinor_RMASK   0xFF
 
#define QIB_6120_Control_OFFS   0x8
 
#define QIB_6120_Control_TxLatency_LSB   0x4
 
#define QIB_6120_Control_TxLatency_RMASK   0x1
 
#define QIB_6120_Control_PCIERetryBufDiagEn_LSB   0x3
 
#define QIB_6120_Control_PCIERetryBufDiagEn_RMASK   0x1
 
#define QIB_6120_Control_LinkEn_LSB   0x2
 
#define QIB_6120_Control_LinkEn_RMASK   0x1
 
#define QIB_6120_Control_FreezeMode_LSB   0x1
 
#define QIB_6120_Control_FreezeMode_RMASK   0x1
 
#define QIB_6120_Control_SyncReset_LSB   0x0
 
#define QIB_6120_Control_SyncReset_RMASK   0x1
 
#define QIB_6120_PageAlign_OFFS   0x10
 
#define QIB_6120_PortCnt_OFFS   0x18
 
#define QIB_6120_SendRegBase_OFFS   0x30
 
#define QIB_6120_UserRegBase_OFFS   0x38
 
#define QIB_6120_CntrRegBase_OFFS   0x40
 
#define QIB_6120_Scratch_OFFS   0x48
 
#define QIB_6120_Scratch_TopHalf_LSB   0x20
 
#define QIB_6120_Scratch_TopHalf_RMASK   0xFFFFFFFF
 
#define QIB_6120_Scratch_BottomHalf_LSB   0x0
 
#define QIB_6120_Scratch_BottomHalf_RMASK   0xFFFFFFFF
 
#define QIB_6120_IntBlocked_OFFS   0x60
 
#define QIB_6120_IntBlocked_ErrorIntBlocked_LSB   0x1F
 
#define QIB_6120_IntBlocked_ErrorIntBlocked_RMASK   0x1
 
#define QIB_6120_IntBlocked_PioSetIntBlocked_LSB   0x1E
 
#define QIB_6120_IntBlocked_PioSetIntBlocked_RMASK   0x1
 
#define QIB_6120_IntBlocked_PioBufAvailIntBlocked_LSB   0x1D
 
#define QIB_6120_IntBlocked_PioBufAvailIntBlocked_RMASK   0x1
 
#define QIB_6120_IntBlocked_assertGPIOIntBlocked_LSB   0x1C
 
#define QIB_6120_IntBlocked_assertGPIOIntBlocked_RMASK   0x1
 
#define QIB_6120_IntBlocked_Reserved_LSB   0xF
 
#define QIB_6120_IntBlocked_Reserved_RMASK   0x1FFF
 
#define QIB_6120_IntBlocked_RcvAvail4IntBlocked_LSB   0x10
 
#define QIB_6120_IntBlocked_RcvAvail4IntBlocked_RMASK   0x1
 
#define QIB_6120_IntBlocked_RcvAvail3IntBlocked_LSB   0xF
 
#define QIB_6120_IntBlocked_RcvAvail3IntBlocked_RMASK   0x1
 
#define QIB_6120_IntBlocked_RcvAvail2IntBlocked_LSB   0xE
 
#define QIB_6120_IntBlocked_RcvAvail2IntBlocked_RMASK   0x1
 
#define QIB_6120_IntBlocked_RcvAvail1IntBlocked_LSB   0xD
 
#define QIB_6120_IntBlocked_RcvAvail1IntBlocked_RMASK   0x1
 
#define QIB_6120_IntBlocked_RcvAvail0IntBlocked_LSB   0xC
 
#define QIB_6120_IntBlocked_RcvAvail0IntBlocked_RMASK   0x1
 
#define QIB_6120_IntBlocked_Reserved1_LSB   0x5
 
#define QIB_6120_IntBlocked_Reserved1_RMASK   0x7F
 
#define QIB_6120_IntBlocked_RcvUrg4IntBlocked_LSB   0x4
 
#define QIB_6120_IntBlocked_RcvUrg4IntBlocked_RMASK   0x1
 
#define QIB_6120_IntBlocked_RcvUrg3IntBlocked_LSB   0x3
 
#define QIB_6120_IntBlocked_RcvUrg3IntBlocked_RMASK   0x1
 
#define QIB_6120_IntBlocked_RcvUrg2IntBlocked_LSB   0x2
 
#define QIB_6120_IntBlocked_RcvUrg2IntBlocked_RMASK   0x1
 
#define QIB_6120_IntBlocked_RcvUrg1IntBlocked_LSB   0x1
 
#define QIB_6120_IntBlocked_RcvUrg1IntBlocked_RMASK   0x1
 
#define QIB_6120_IntBlocked_RcvUrg0IntBlocked_LSB   0x0
 
#define QIB_6120_IntBlocked_RcvUrg0IntBlocked_RMASK   0x1
 
#define QIB_6120_IntMask_OFFS   0x68
 
#define QIB_6120_IntMask_ErrorIntMask_LSB   0x1F
 
#define QIB_6120_IntMask_ErrorIntMask_RMASK   0x1
 
#define QIB_6120_IntMask_PioSetIntMask_LSB   0x1E
 
#define QIB_6120_IntMask_PioSetIntMask_RMASK   0x1
 
#define QIB_6120_IntMask_PioBufAvailIntMask_LSB   0x1D
 
#define QIB_6120_IntMask_PioBufAvailIntMask_RMASK   0x1
 
#define QIB_6120_IntMask_assertGPIOIntMask_LSB   0x1C
 
#define QIB_6120_IntMask_assertGPIOIntMask_RMASK   0x1
 
#define QIB_6120_IntMask_Reserved_LSB   0x11
 
#define QIB_6120_IntMask_Reserved_RMASK   0x7FF
 
#define QIB_6120_IntMask_RcvAvail4IntMask_LSB   0x10
 
#define QIB_6120_IntMask_RcvAvail4IntMask_RMASK   0x1
 
#define QIB_6120_IntMask_RcvAvail3IntMask_LSB   0xF
 
#define QIB_6120_IntMask_RcvAvail3IntMask_RMASK   0x1
 
#define QIB_6120_IntMask_RcvAvail2IntMask_LSB   0xE
 
#define QIB_6120_IntMask_RcvAvail2IntMask_RMASK   0x1
 
#define QIB_6120_IntMask_RcvAvail1IntMask_LSB   0xD
 
#define QIB_6120_IntMask_RcvAvail1IntMask_RMASK   0x1
 
#define QIB_6120_IntMask_RcvAvail0IntMask_LSB   0xC
 
#define QIB_6120_IntMask_RcvAvail0IntMask_RMASK   0x1
 
#define QIB_6120_IntMask_Reserved1_LSB   0x5
 
#define QIB_6120_IntMask_Reserved1_RMASK   0x7F
 
#define QIB_6120_IntMask_RcvUrg4IntMask_LSB   0x4
 
#define QIB_6120_IntMask_RcvUrg4IntMask_RMASK   0x1
 
#define QIB_6120_IntMask_RcvUrg3IntMask_LSB   0x3
 
#define QIB_6120_IntMask_RcvUrg3IntMask_RMASK   0x1
 
#define QIB_6120_IntMask_RcvUrg2IntMask_LSB   0x2
 
#define QIB_6120_IntMask_RcvUrg2IntMask_RMASK   0x1
 
#define QIB_6120_IntMask_RcvUrg1IntMask_LSB   0x1
 
#define QIB_6120_IntMask_RcvUrg1IntMask_RMASK   0x1
 
#define QIB_6120_IntMask_RcvUrg0IntMask_LSB   0x0
 
#define QIB_6120_IntMask_RcvUrg0IntMask_RMASK   0x1
 
#define QIB_6120_IntStatus_OFFS   0x70
 
#define QIB_6120_IntStatus_Error_LSB   0x1F
 
#define QIB_6120_IntStatus_Error_RMASK   0x1
 
#define QIB_6120_IntStatus_PioSent_LSB   0x1E
 
#define QIB_6120_IntStatus_PioSent_RMASK   0x1
 
#define QIB_6120_IntStatus_PioBufAvail_LSB   0x1D
 
#define QIB_6120_IntStatus_PioBufAvail_RMASK   0x1
 
#define QIB_6120_IntStatus_assertGPIO_LSB   0x1C
 
#define QIB_6120_IntStatus_assertGPIO_RMASK   0x1
 
#define QIB_6120_IntStatus_Reserved_LSB   0xF
 
#define QIB_6120_IntStatus_Reserved_RMASK   0x1FFF
 
#define QIB_6120_IntStatus_RcvAvail4_LSB   0x10
 
#define QIB_6120_IntStatus_RcvAvail4_RMASK   0x1
 
#define QIB_6120_IntStatus_RcvAvail3_LSB   0xF
 
#define QIB_6120_IntStatus_RcvAvail3_RMASK   0x1
 
#define QIB_6120_IntStatus_RcvAvail2_LSB   0xE
 
#define QIB_6120_IntStatus_RcvAvail2_RMASK   0x1
 
#define QIB_6120_IntStatus_RcvAvail1_LSB   0xD
 
#define QIB_6120_IntStatus_RcvAvail1_RMASK   0x1
 
#define QIB_6120_IntStatus_RcvAvail0_LSB   0xC
 
#define QIB_6120_IntStatus_RcvAvail0_RMASK   0x1
 
#define QIB_6120_IntStatus_Reserved1_LSB   0x5
 
#define QIB_6120_IntStatus_Reserved1_RMASK   0x7F
 
#define QIB_6120_IntStatus_RcvUrg4_LSB   0x4
 
#define QIB_6120_IntStatus_RcvUrg4_RMASK   0x1
 
#define QIB_6120_IntStatus_RcvUrg3_LSB   0x3
 
#define QIB_6120_IntStatus_RcvUrg3_RMASK   0x1
 
#define QIB_6120_IntStatus_RcvUrg2_LSB   0x2
 
#define QIB_6120_IntStatus_RcvUrg2_RMASK   0x1
 
#define QIB_6120_IntStatus_RcvUrg1_LSB   0x1
 
#define QIB_6120_IntStatus_RcvUrg1_RMASK   0x1
 
#define QIB_6120_IntStatus_RcvUrg0_LSB   0x0
 
#define QIB_6120_IntStatus_RcvUrg0_RMASK   0x1
 
#define QIB_6120_IntClear_OFFS   0x78
 
#define QIB_6120_IntClear_ErrorIntClear_LSB   0x1F
 
#define QIB_6120_IntClear_ErrorIntClear_RMASK   0x1
 
#define QIB_6120_IntClear_PioSetIntClear_LSB   0x1E
 
#define QIB_6120_IntClear_PioSetIntClear_RMASK   0x1
 
#define QIB_6120_IntClear_PioBufAvailIntClear_LSB   0x1D
 
#define QIB_6120_IntClear_PioBufAvailIntClear_RMASK   0x1
 
#define QIB_6120_IntClear_assertGPIOIntClear_LSB   0x1C
 
#define QIB_6120_IntClear_assertGPIOIntClear_RMASK   0x1
 
#define QIB_6120_IntClear_Reserved_LSB   0xF
 
#define QIB_6120_IntClear_Reserved_RMASK   0x1FFF
 
#define QIB_6120_IntClear_RcvAvail4IntClear_LSB   0x10
 
#define QIB_6120_IntClear_RcvAvail4IntClear_RMASK   0x1
 
#define QIB_6120_IntClear_RcvAvail3IntClear_LSB   0xF
 
#define QIB_6120_IntClear_RcvAvail3IntClear_RMASK   0x1
 
#define QIB_6120_IntClear_RcvAvail2IntClear_LSB   0xE
 
#define QIB_6120_IntClear_RcvAvail2IntClear_RMASK   0x1
 
#define QIB_6120_IntClear_RcvAvail1IntClear_LSB   0xD
 
#define QIB_6120_IntClear_RcvAvail1IntClear_RMASK   0x1
 
#define QIB_6120_IntClear_RcvAvail0IntClear_LSB   0xC
 
#define QIB_6120_IntClear_RcvAvail0IntClear_RMASK   0x1
 
#define QIB_6120_IntClear_Reserved1_LSB   0x5
 
#define QIB_6120_IntClear_Reserved1_RMASK   0x7F
 
#define QIB_6120_IntClear_RcvUrg4IntClear_LSB   0x4
 
#define QIB_6120_IntClear_RcvUrg4IntClear_RMASK   0x1
 
#define QIB_6120_IntClear_RcvUrg3IntClear_LSB   0x3
 
#define QIB_6120_IntClear_RcvUrg3IntClear_RMASK   0x1
 
#define QIB_6120_IntClear_RcvUrg2IntClear_LSB   0x2
 
#define QIB_6120_IntClear_RcvUrg2IntClear_RMASK   0x1
 
#define QIB_6120_IntClear_RcvUrg1IntClear_LSB   0x1
 
#define QIB_6120_IntClear_RcvUrg1IntClear_RMASK   0x1
 
#define QIB_6120_IntClear_RcvUrg0IntClear_LSB   0x0
 
#define QIB_6120_IntClear_RcvUrg0IntClear_RMASK   0x1
 
#define QIB_6120_ErrMask_OFFS   0x80
 
#define QIB_6120_ErrMask_Reserved_LSB   0x34
 
#define QIB_6120_ErrMask_Reserved_RMASK   0xFFF
 
#define QIB_6120_ErrMask_HardwareErrMask_LSB   0x33
 
#define QIB_6120_ErrMask_HardwareErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_ResetNegatedMask_LSB   0x32
 
#define QIB_6120_ErrMask_ResetNegatedMask_RMASK   0x1
 
#define QIB_6120_ErrMask_InvalidAddrErrMask_LSB   0x31
 
#define QIB_6120_ErrMask_InvalidAddrErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_IBStatusChangedMask_LSB   0x30
 
#define QIB_6120_ErrMask_IBStatusChangedMask_RMASK   0x1
 
#define QIB_6120_ErrMask_Reserved1_LSB   0x26
 
#define QIB_6120_ErrMask_Reserved1_RMASK   0x3FF
 
#define QIB_6120_ErrMask_SendUnsupportedVLErrMask_LSB   0x25
 
#define QIB_6120_ErrMask_SendUnsupportedVLErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_SendUnexpectedPktNumErrMask_LSB   0x24
 
#define QIB_6120_ErrMask_SendUnexpectedPktNumErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_SendPioArmLaunchErrMask_LSB   0x23
 
#define QIB_6120_ErrMask_SendPioArmLaunchErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_SendDroppedDataPktErrMask_LSB   0x22
 
#define QIB_6120_ErrMask_SendDroppedDataPktErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_SendDroppedSmpPktErrMask_LSB   0x21
 
#define QIB_6120_ErrMask_SendDroppedSmpPktErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_SendPktLenErrMask_LSB   0x20
 
#define QIB_6120_ErrMask_SendPktLenErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_SendUnderRunErrMask_LSB   0x1F
 
#define QIB_6120_ErrMask_SendUnderRunErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_SendMaxPktLenErrMask_LSB   0x1E
 
#define QIB_6120_ErrMask_SendMaxPktLenErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_SendMinPktLenErrMask_LSB   0x1D
 
#define QIB_6120_ErrMask_SendMinPktLenErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_Reserved2_LSB   0x12
 
#define QIB_6120_ErrMask_Reserved2_RMASK   0x7FF
 
#define QIB_6120_ErrMask_RcvIBLostLinkErrMask_LSB   0x11
 
#define QIB_6120_ErrMask_RcvIBLostLinkErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_RcvHdrErrMask_LSB   0x10
 
#define QIB_6120_ErrMask_RcvHdrErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_RcvHdrLenErrMask_LSB   0xF
 
#define QIB_6120_ErrMask_RcvHdrLenErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_RcvBadTidErrMask_LSB   0xE
 
#define QIB_6120_ErrMask_RcvBadTidErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_RcvHdrFullErrMask_LSB   0xD
 
#define QIB_6120_ErrMask_RcvHdrFullErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_RcvEgrFullErrMask_LSB   0xC
 
#define QIB_6120_ErrMask_RcvEgrFullErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_RcvBadVersionErrMask_LSB   0xB
 
#define QIB_6120_ErrMask_RcvBadVersionErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_RcvIBFlowErrMask_LSB   0xA
 
#define QIB_6120_ErrMask_RcvIBFlowErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_RcvEBPErrMask_LSB   0x9
 
#define QIB_6120_ErrMask_RcvEBPErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_RcvUnsupportedVLErrMask_LSB   0x8
 
#define QIB_6120_ErrMask_RcvUnsupportedVLErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_RcvUnexpectedCharErrMask_LSB   0x7
 
#define QIB_6120_ErrMask_RcvUnexpectedCharErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_RcvShortPktLenErrMask_LSB   0x6
 
#define QIB_6120_ErrMask_RcvShortPktLenErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_RcvLongPktLenErrMask_LSB   0x5
 
#define QIB_6120_ErrMask_RcvLongPktLenErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_RcvMaxPktLenErrMask_LSB   0x4
 
#define QIB_6120_ErrMask_RcvMaxPktLenErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_RcvMinPktLenErrMask_LSB   0x3
 
#define QIB_6120_ErrMask_RcvMinPktLenErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_RcvICRCErrMask_LSB   0x2
 
#define QIB_6120_ErrMask_RcvICRCErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_RcvVCRCErrMask_LSB   0x1
 
#define QIB_6120_ErrMask_RcvVCRCErrMask_RMASK   0x1
 
#define QIB_6120_ErrMask_RcvFormatErrMask_LSB   0x0
 
#define QIB_6120_ErrMask_RcvFormatErrMask_RMASK   0x1
 
#define QIB_6120_ErrStatus_OFFS   0x88
 
#define QIB_6120_ErrStatus_Reserved_LSB   0x34
 
#define QIB_6120_ErrStatus_Reserved_RMASK   0xFFF
 
#define QIB_6120_ErrStatus_HardwareErr_LSB   0x33
 
#define QIB_6120_ErrStatus_HardwareErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_ResetNegated_LSB   0x32
 
#define QIB_6120_ErrStatus_ResetNegated_RMASK   0x1
 
#define QIB_6120_ErrStatus_InvalidAddrErr_LSB   0x31
 
#define QIB_6120_ErrStatus_InvalidAddrErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_IBStatusChanged_LSB   0x30
 
#define QIB_6120_ErrStatus_IBStatusChanged_RMASK   0x1
 
#define QIB_6120_ErrStatus_Reserved1_LSB   0x26
 
#define QIB_6120_ErrStatus_Reserved1_RMASK   0x3FF
 
#define QIB_6120_ErrStatus_SendUnsupportedVLErr_LSB   0x25
 
#define QIB_6120_ErrStatus_SendUnsupportedVLErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_SendUnexpectedPktNumErr_LSB   0x24
 
#define QIB_6120_ErrStatus_SendUnexpectedPktNumErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_SendPioArmLaunchErr_LSB   0x23
 
#define QIB_6120_ErrStatus_SendPioArmLaunchErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_SendDroppedDataPktErr_LSB   0x22
 
#define QIB_6120_ErrStatus_SendDroppedDataPktErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_SendDroppedSmpPktErr_LSB   0x21
 
#define QIB_6120_ErrStatus_SendDroppedSmpPktErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_SendPktLenErr_LSB   0x20
 
#define QIB_6120_ErrStatus_SendPktLenErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_SendUnderRunErr_LSB   0x1F
 
#define QIB_6120_ErrStatus_SendUnderRunErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_SendMaxPktLenErr_LSB   0x1E
 
#define QIB_6120_ErrStatus_SendMaxPktLenErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_SendMinPktLenErr_LSB   0x1D
 
#define QIB_6120_ErrStatus_SendMinPktLenErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_Reserved2_LSB   0x12
 
#define QIB_6120_ErrStatus_Reserved2_RMASK   0x7FF
 
#define QIB_6120_ErrStatus_RcvIBLostLinkErr_LSB   0x11
 
#define QIB_6120_ErrStatus_RcvIBLostLinkErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_RcvHdrErr_LSB   0x10
 
#define QIB_6120_ErrStatus_RcvHdrErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_RcvHdrLenErr_LSB   0xF
 
#define QIB_6120_ErrStatus_RcvHdrLenErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_RcvBadTidErr_LSB   0xE
 
#define QIB_6120_ErrStatus_RcvBadTidErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_RcvHdrFullErr_LSB   0xD
 
#define QIB_6120_ErrStatus_RcvHdrFullErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_RcvEgrFullErr_LSB   0xC
 
#define QIB_6120_ErrStatus_RcvEgrFullErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_RcvBadVersionErr_LSB   0xB
 
#define QIB_6120_ErrStatus_RcvBadVersionErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_RcvIBFlowErr_LSB   0xA
 
#define QIB_6120_ErrStatus_RcvIBFlowErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_RcvEBPErr_LSB   0x9
 
#define QIB_6120_ErrStatus_RcvEBPErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_RcvUnsupportedVLErr_LSB   0x8
 
#define QIB_6120_ErrStatus_RcvUnsupportedVLErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_RcvUnexpectedCharErr_LSB   0x7
 
#define QIB_6120_ErrStatus_RcvUnexpectedCharErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_RcvShortPktLenErr_LSB   0x6
 
#define QIB_6120_ErrStatus_RcvShortPktLenErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_RcvLongPktLenErr_LSB   0x5
 
#define QIB_6120_ErrStatus_RcvLongPktLenErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_RcvMaxPktLenErr_LSB   0x4
 
#define QIB_6120_ErrStatus_RcvMaxPktLenErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_RcvMinPktLenErr_LSB   0x3
 
#define QIB_6120_ErrStatus_RcvMinPktLenErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_RcvICRCErr_LSB   0x2
 
#define QIB_6120_ErrStatus_RcvICRCErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_RcvVCRCErr_LSB   0x1
 
#define QIB_6120_ErrStatus_RcvVCRCErr_RMASK   0x1
 
#define QIB_6120_ErrStatus_RcvFormatErr_LSB   0x0
 
#define QIB_6120_ErrStatus_RcvFormatErr_RMASK   0x1
 
#define QIB_6120_ErrClear_OFFS   0x90
 
#define QIB_6120_ErrClear_Reserved_LSB   0x34
 
#define QIB_6120_ErrClear_Reserved_RMASK   0xFFF
 
#define QIB_6120_ErrClear_HardwareErrClear_LSB   0x33
 
#define QIB_6120_ErrClear_HardwareErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_ResetNegatedClear_LSB   0x32
 
#define QIB_6120_ErrClear_ResetNegatedClear_RMASK   0x1
 
#define QIB_6120_ErrClear_InvalidAddrErrClear_LSB   0x31
 
#define QIB_6120_ErrClear_InvalidAddrErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_IBStatusChangedClear_LSB   0x30
 
#define QIB_6120_ErrClear_IBStatusChangedClear_RMASK   0x1
 
#define QIB_6120_ErrClear_Reserved1_LSB   0x26
 
#define QIB_6120_ErrClear_Reserved1_RMASK   0x3FF
 
#define QIB_6120_ErrClear_SendUnsupportedVLErrClear_LSB   0x25
 
#define QIB_6120_ErrClear_SendUnsupportedVLErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_SendUnexpectedPktNumErrClear_LSB   0x24
 
#define QIB_6120_ErrClear_SendUnexpectedPktNumErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_SendPioArmLaunchErrClear_LSB   0x23
 
#define QIB_6120_ErrClear_SendPioArmLaunchErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_SendDroppedDataPktErrClear_LSB   0x22
 
#define QIB_6120_ErrClear_SendDroppedDataPktErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_SendDroppedSmpPktErrClear_LSB   0x21
 
#define QIB_6120_ErrClear_SendDroppedSmpPktErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_SendPktLenErrClear_LSB   0x20
 
#define QIB_6120_ErrClear_SendPktLenErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_SendUnderRunErrClear_LSB   0x1F
 
#define QIB_6120_ErrClear_SendUnderRunErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_SendMaxPktLenErrClear_LSB   0x1E
 
#define QIB_6120_ErrClear_SendMaxPktLenErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_SendMinPktLenErrClear_LSB   0x1D
 
#define QIB_6120_ErrClear_SendMinPktLenErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_Reserved2_LSB   0x12
 
#define QIB_6120_ErrClear_Reserved2_RMASK   0x7FF
 
#define QIB_6120_ErrClear_RcvIBLostLinkErrClear_LSB   0x11
 
#define QIB_6120_ErrClear_RcvIBLostLinkErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_RcvHdrErrClear_LSB   0x10
 
#define QIB_6120_ErrClear_RcvHdrErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_RcvHdrLenErrClear_LSB   0xF
 
#define QIB_6120_ErrClear_RcvHdrLenErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_RcvBadTidErrClear_LSB   0xE
 
#define QIB_6120_ErrClear_RcvBadTidErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_RcvHdrFullErrClear_LSB   0xD
 
#define QIB_6120_ErrClear_RcvHdrFullErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_RcvEgrFullErrClear_LSB   0xC
 
#define QIB_6120_ErrClear_RcvEgrFullErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_RcvBadVersionErrClear_LSB   0xB
 
#define QIB_6120_ErrClear_RcvBadVersionErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_RcvIBFlowErrClear_LSB   0xA
 
#define QIB_6120_ErrClear_RcvIBFlowErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_RcvEBPErrClear_LSB   0x9
 
#define QIB_6120_ErrClear_RcvEBPErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_RcvUnsupportedVLErrClear_LSB   0x8
 
#define QIB_6120_ErrClear_RcvUnsupportedVLErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_RcvUnexpectedCharErrClear_LSB   0x7
 
#define QIB_6120_ErrClear_RcvUnexpectedCharErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_RcvShortPktLenErrClear_LSB   0x6
 
#define QIB_6120_ErrClear_RcvShortPktLenErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_RcvLongPktLenErrClear_LSB   0x5
 
#define QIB_6120_ErrClear_RcvLongPktLenErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_RcvMaxPktLenErrClear_LSB   0x4
 
#define QIB_6120_ErrClear_RcvMaxPktLenErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_RcvMinPktLenErrClear_LSB   0x3
 
#define QIB_6120_ErrClear_RcvMinPktLenErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_RcvICRCErrClear_LSB   0x2
 
#define QIB_6120_ErrClear_RcvICRCErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_RcvVCRCErrClear_LSB   0x1
 
#define QIB_6120_ErrClear_RcvVCRCErrClear_RMASK   0x1
 
#define QIB_6120_ErrClear_RcvFormatErrClear_LSB   0x0
 
#define QIB_6120_ErrClear_RcvFormatErrClear_RMASK   0x1
 
#define QIB_6120_HwErrMask_OFFS   0x98
 
#define QIB_6120_HwErrMask_IBCBusFromSPCParityErrMask_LSB   0x3F
 
#define QIB_6120_HwErrMask_IBCBusFromSPCParityErrMask_RMASK   0x1
 
#define QIB_6120_HwErrMask_IBCBusToSPCParityErrMask_LSB   0x3E
 
#define QIB_6120_HwErrMask_IBCBusToSPCParityErrMask_RMASK   0x1
 
#define QIB_6120_HwErrMask_Reserved_LSB   0x3D
 
#define QIB_6120_HwErrMask_Reserved_RMASK   0x1
 
#define QIB_6120_HwErrMask_IBSerdesPClkNotDetectMask_LSB   0x3C
 
#define QIB_6120_HwErrMask_IBSerdesPClkNotDetectMask_RMASK   0x1
 
#define QIB_6120_HwErrMask_PCIESerdesQ0PClkNotDetectMask_LSB   0x3B
 
#define QIB_6120_HwErrMask_PCIESerdesQ0PClkNotDetectMask_RMASK   0x1
 
#define QIB_6120_HwErrMask_PCIESerdesQ1PClkNotDetectMask_LSB   0x3A
 
#define QIB_6120_HwErrMask_PCIESerdesQ1PClkNotDetectMask_RMASK   0x1
 
#define QIB_6120_HwErrMask_Reserved1_LSB   0x39
 
#define QIB_6120_HwErrMask_Reserved1_RMASK   0x1
 
#define QIB_6120_HwErrMask_IBPLLrfSlipMask_LSB   0x38
 
#define QIB_6120_HwErrMask_IBPLLrfSlipMask_RMASK   0x1
 
#define QIB_6120_HwErrMask_IBPLLfbSlipMask_LSB   0x37
 
#define QIB_6120_HwErrMask_IBPLLfbSlipMask_RMASK   0x1
 
#define QIB_6120_HwErrMask_PowerOnBISTFailedMask_LSB   0x36
 
#define QIB_6120_HwErrMask_PowerOnBISTFailedMask_RMASK   0x1
 
#define QIB_6120_HwErrMask_Reserved2_LSB   0x33
 
#define QIB_6120_HwErrMask_Reserved2_RMASK   0x7
 
#define QIB_6120_HwErrMask_RXEMemParityErrMask_LSB   0x2C
 
#define QIB_6120_HwErrMask_RXEMemParityErrMask_RMASK   0x7F
 
#define QIB_6120_HwErrMask_TXEMemParityErrMask_LSB   0x28
 
#define QIB_6120_HwErrMask_TXEMemParityErrMask_RMASK   0xF
 
#define QIB_6120_HwErrMask_Reserved3_LSB   0x22
 
#define QIB_6120_HwErrMask_Reserved3_RMASK   0x3F
 
#define QIB_6120_HwErrMask_PCIeBusParityErrMask_LSB   0x1F
 
#define QIB_6120_HwErrMask_PCIeBusParityErrMask_RMASK   0x7
 
#define QIB_6120_HwErrMask_PcieCplTimeoutMask_LSB   0x1E
 
#define QIB_6120_HwErrMask_PcieCplTimeoutMask_RMASK   0x1
 
#define QIB_6120_HwErrMask_PoisonedTLPMask_LSB   0x1D
 
#define QIB_6120_HwErrMask_PoisonedTLPMask_RMASK   0x1
 
#define QIB_6120_HwErrMask_Reserved4_LSB   0x6
 
#define QIB_6120_HwErrMask_Reserved4_RMASK   0x7FFFFF
 
#define QIB_6120_HwErrMask_PCIeMemParityErrMask_LSB   0x0
 
#define QIB_6120_HwErrMask_PCIeMemParityErrMask_RMASK   0x3F
 
#define QIB_6120_HwErrStatus_OFFS   0xA0
 
#define QIB_6120_HwErrStatus_IBCBusFromSPCParityErr_LSB   0x3F
 
#define QIB_6120_HwErrStatus_IBCBusFromSPCParityErr_RMASK   0x1
 
#define QIB_6120_HwErrStatus_IBCBusToSPCParityErr_LSB   0x3E
 
#define QIB_6120_HwErrStatus_IBCBusToSPCParityErr_RMASK   0x1
 
#define QIB_6120_HwErrStatus_Reserved_LSB   0x3D
 
#define QIB_6120_HwErrStatus_Reserved_RMASK   0x1
 
#define QIB_6120_HwErrStatus_IBSerdesPClkNotDetect_LSB   0x3C
 
#define QIB_6120_HwErrStatus_IBSerdesPClkNotDetect_RMASK   0x1
 
#define QIB_6120_HwErrStatus_PCIESerdesQ0PClkNotDetect_LSB   0x3B
 
#define QIB_6120_HwErrStatus_PCIESerdesQ0PClkNotDetect_RMASK   0x1
 
#define QIB_6120_HwErrStatus_PCIESerdesQ1PClkNotDetect_LSB   0x3A
 
#define QIB_6120_HwErrStatus_PCIESerdesQ1PClkNotDetect_RMASK   0x1
 
#define QIB_6120_HwErrStatus_Reserved1_LSB   0x39
 
#define QIB_6120_HwErrStatus_Reserved1_RMASK   0x1
 
#define QIB_6120_HwErrStatus_IBPLLrfSlip_LSB   0x38
 
#define QIB_6120_HwErrStatus_IBPLLrfSlip_RMASK   0x1
 
#define QIB_6120_HwErrStatus_IBPLLfbSlip_LSB   0x37
 
#define QIB_6120_HwErrStatus_IBPLLfbSlip_RMASK   0x1
 
#define QIB_6120_HwErrStatus_PowerOnBISTFailed_LSB   0x36
 
#define QIB_6120_HwErrStatus_PowerOnBISTFailed_RMASK   0x1
 
#define QIB_6120_HwErrStatus_Reserved2_LSB   0x33
 
#define QIB_6120_HwErrStatus_Reserved2_RMASK   0x7
 
#define QIB_6120_HwErrStatus_RXEMemParity_LSB   0x2C
 
#define QIB_6120_HwErrStatus_RXEMemParity_RMASK   0x7F
 
#define QIB_6120_HwErrStatus_TXEMemParity_LSB   0x28
 
#define QIB_6120_HwErrStatus_TXEMemParity_RMASK   0xF
 
#define QIB_6120_HwErrStatus_Reserved3_LSB   0x22
 
#define QIB_6120_HwErrStatus_Reserved3_RMASK   0x3F
 
#define QIB_6120_HwErrStatus_PCIeBusParity_LSB   0x1F
 
#define QIB_6120_HwErrStatus_PCIeBusParity_RMASK   0x7
 
#define QIB_6120_HwErrStatus_PcieCplTimeout_LSB   0x1E
 
#define QIB_6120_HwErrStatus_PcieCplTimeout_RMASK   0x1
 
#define QIB_6120_HwErrStatus_PoisenedTLP_LSB   0x1D
 
#define QIB_6120_HwErrStatus_PoisenedTLP_RMASK   0x1
 
#define QIB_6120_HwErrStatus_Reserved4_LSB   0x6
 
#define QIB_6120_HwErrStatus_Reserved4_RMASK   0x7FFFFF
 
#define QIB_6120_HwErrStatus_PCIeMemParity_LSB   0x0
 
#define QIB_6120_HwErrStatus_PCIeMemParity_RMASK   0x3F
 
#define QIB_6120_HwErrClear_OFFS   0xA8
 
#define QIB_6120_HwErrClear_IBCBusFromSPCParityErrClear_LSB   0x3F
 
#define QIB_6120_HwErrClear_IBCBusFromSPCParityErrClear_RMASK   0x1
 
#define QIB_6120_HwErrClear_IBCBusToSPCparityErrClear_LSB   0x3E
 
#define QIB_6120_HwErrClear_IBCBusToSPCparityErrClear_RMASK   0x1
 
#define QIB_6120_HwErrClear_Reserved_LSB   0x3D
 
#define QIB_6120_HwErrClear_Reserved_RMASK   0x1
 
#define QIB_6120_HwErrClear_IBSerdesPClkNotDetectClear_LSB   0x3C
 
#define QIB_6120_HwErrClear_IBSerdesPClkNotDetectClear_RMASK   0x1
 
#define QIB_6120_HwErrClear_PCIESerdesQ0PClkNotDetectClear_LSB   0x3B
 
#define QIB_6120_HwErrClear_PCIESerdesQ0PClkNotDetectClear_RMASK   0x1
 
#define QIB_6120_HwErrClear_PCIESerdesQ1PClkNotDetectClear_LSB   0x3A
 
#define QIB_6120_HwErrClear_PCIESerdesQ1PClkNotDetectClear_RMASK   0x1
 
#define QIB_6120_HwErrClear_Reserved1_LSB   0x39
 
#define QIB_6120_HwErrClear_Reserved1_RMASK   0x1
 
#define QIB_6120_HwErrClear_IBPLLrfSlipClear_LSB   0x38
 
#define QIB_6120_HwErrClear_IBPLLrfSlipClear_RMASK   0x1
 
#define QIB_6120_HwErrClear_IBPLLfbSlipClear_LSB   0x37
 
#define QIB_6120_HwErrClear_IBPLLfbSlipClear_RMASK   0x1
 
#define QIB_6120_HwErrClear_PowerOnBISTFailedClear_LSB   0x36
 
#define QIB_6120_HwErrClear_PowerOnBISTFailedClear_RMASK   0x1
 
#define QIB_6120_HwErrClear_Reserved2_LSB   0x33
 
#define QIB_6120_HwErrClear_Reserved2_RMASK   0x7
 
#define QIB_6120_HwErrClear_RXEMemParityClear_LSB   0x2C
 
#define QIB_6120_HwErrClear_RXEMemParityClear_RMASK   0x7F
 
#define QIB_6120_HwErrClear_TXEMemParityClear_LSB   0x28
 
#define QIB_6120_HwErrClear_TXEMemParityClear_RMASK   0xF
 
#define QIB_6120_HwErrClear_Reserved3_LSB   0x22
 
#define QIB_6120_HwErrClear_Reserved3_RMASK   0x3F
 
#define QIB_6120_HwErrClear_PCIeBusParityClr_LSB   0x1F
 
#define QIB_6120_HwErrClear_PCIeBusParityClr_RMASK   0x7
 
#define QIB_6120_HwErrClear_PcieCplTimeoutClear_LSB   0x1E
 
#define QIB_6120_HwErrClear_PcieCplTimeoutClear_RMASK   0x1
 
#define QIB_6120_HwErrClear_PoisonedTLPClear_LSB   0x1D
 
#define QIB_6120_HwErrClear_PoisonedTLPClear_RMASK   0x1
 
#define QIB_6120_HwErrClear_Reserved4_LSB   0x6
 
#define QIB_6120_HwErrClear_Reserved4_RMASK   0x7FFFFF
 
#define QIB_6120_HwErrClear_PCIeMemParityClr_LSB   0x0
 
#define QIB_6120_HwErrClear_PCIeMemParityClr_RMASK   0x3F
 
#define QIB_6120_HwDiagCtrl_OFFS   0xB0
 
#define QIB_6120_HwDiagCtrl_ForceIBCBusFromSPCParityErr_LSB   0x3F
 
#define QIB_6120_HwDiagCtrl_ForceIBCBusFromSPCParityErr_RMASK   0x1
 
#define QIB_6120_HwDiagCtrl_ForceIBCBusToSPCParityErr_LSB   0x3E
 
#define QIB_6120_HwDiagCtrl_ForceIBCBusToSPCParityErr_RMASK   0x1
 
#define QIB_6120_HwDiagCtrl_CounterWrEnable_LSB   0x3D
 
#define QIB_6120_HwDiagCtrl_CounterWrEnable_RMASK   0x1
 
#define QIB_6120_HwDiagCtrl_CounterDisable_LSB   0x3C
 
#define QIB_6120_HwDiagCtrl_CounterDisable_RMASK   0x1
 
#define QIB_6120_HwDiagCtrl_Reserved_LSB   0x33
 
#define QIB_6120_HwDiagCtrl_Reserved_RMASK   0x1FF
 
#define QIB_6120_HwDiagCtrl_ForceRxMemParityErr_LSB   0x2C
 
#define QIB_6120_HwDiagCtrl_ForceRxMemParityErr_RMASK   0x7F
 
#define QIB_6120_HwDiagCtrl_ForceTxMemparityErr_LSB   0x28
 
#define QIB_6120_HwDiagCtrl_ForceTxMemparityErr_RMASK   0xF
 
#define QIB_6120_HwDiagCtrl_Reserved1_LSB   0x23
 
#define QIB_6120_HwDiagCtrl_Reserved1_RMASK   0x1F
 
#define QIB_6120_HwDiagCtrl_forcePCIeBusParity_LSB   0x1F
 
#define QIB_6120_HwDiagCtrl_forcePCIeBusParity_RMASK   0xF
 
#define QIB_6120_HwDiagCtrl_Reserved2_LSB   0x6
 
#define QIB_6120_HwDiagCtrl_Reserved2_RMASK   0x1FFFFFF
 
#define QIB_6120_HwDiagCtrl_forcePCIeMemParity_LSB   0x0
 
#define QIB_6120_HwDiagCtrl_forcePCIeMemParity_RMASK   0x3F
 
#define QIB_6120_IBCStatus_OFFS   0xC0
 
#define QIB_6120_IBCStatus_TxCreditOk_LSB   0x1F
 
#define QIB_6120_IBCStatus_TxCreditOk_RMASK   0x1
 
#define QIB_6120_IBCStatus_TxReady_LSB   0x1E
 
#define QIB_6120_IBCStatus_TxReady_RMASK   0x1
 
#define QIB_6120_IBCStatus_Reserved_LSB   0x7
 
#define QIB_6120_IBCStatus_Reserved_RMASK   0x7FFFFF
 
#define QIB_6120_IBCStatus_LinkState_LSB   0x4
 
#define QIB_6120_IBCStatus_LinkState_RMASK   0x7
 
#define QIB_6120_IBCStatus_LinkTrainingState_LSB   0x0
 
#define QIB_6120_IBCStatus_LinkTrainingState_RMASK   0xF
 
#define QIB_6120_IBCCtrl_OFFS   0xC8
 
#define QIB_6120_IBCCtrl_Loopback_LSB   0x3F
 
#define QIB_6120_IBCCtrl_Loopback_RMASK   0x1
 
#define QIB_6120_IBCCtrl_LinkDownDefaultState_LSB   0x3E
 
#define QIB_6120_IBCCtrl_LinkDownDefaultState_RMASK   0x1
 
#define QIB_6120_IBCCtrl_Reserved_LSB   0x2B
 
#define QIB_6120_IBCCtrl_Reserved_RMASK   0x7FFFF
 
#define QIB_6120_IBCCtrl_CreditScale_LSB   0x28
 
#define QIB_6120_IBCCtrl_CreditScale_RMASK   0x7
 
#define QIB_6120_IBCCtrl_OverrunThreshold_LSB   0x24
 
#define QIB_6120_IBCCtrl_OverrunThreshold_RMASK   0xF
 
#define QIB_6120_IBCCtrl_PhyerrThreshold_LSB   0x20
 
#define QIB_6120_IBCCtrl_PhyerrThreshold_RMASK   0xF
 
#define QIB_6120_IBCCtrl_Reserved1_LSB   0x1F
 
#define QIB_6120_IBCCtrl_Reserved1_RMASK   0x1
 
#define QIB_6120_IBCCtrl_MaxPktLen_LSB   0x14
 
#define QIB_6120_IBCCtrl_MaxPktLen_RMASK   0x7FF
 
#define QIB_6120_IBCCtrl_LinkCmd_LSB   0x12
 
#define QIB_6120_IBCCtrl_LinkCmd_RMASK   0x3
 
#define QIB_6120_IBCCtrl_LinkInitCmd_LSB   0x10
 
#define QIB_6120_IBCCtrl_LinkInitCmd_RMASK   0x3
 
#define QIB_6120_IBCCtrl_FlowCtrlWaterMark_LSB   0x8
 
#define QIB_6120_IBCCtrl_FlowCtrlWaterMark_RMASK   0xFF
 
#define QIB_6120_IBCCtrl_FlowCtrlPeriod_LSB   0x0
 
#define QIB_6120_IBCCtrl_FlowCtrlPeriod_RMASK   0xFF
 
#define QIB_6120_EXTStatus_OFFS   0xD0
 
#define QIB_6120_EXTStatus_GPIOIn_LSB   0x30
 
#define QIB_6120_EXTStatus_GPIOIn_RMASK   0xFFFF
 
#define QIB_6120_EXTStatus_Reserved_LSB   0x20
 
#define QIB_6120_EXTStatus_Reserved_RMASK   0xFFFF
 
#define QIB_6120_EXTStatus_Reserved1_LSB   0x10
 
#define QIB_6120_EXTStatus_Reserved1_RMASK   0xFFFF
 
#define QIB_6120_EXTStatus_MemBISTFoundErr_LSB   0xF
 
#define QIB_6120_EXTStatus_MemBISTFoundErr_RMASK   0x1
 
#define QIB_6120_EXTStatus_MemBISTEndTest_LSB   0xE
 
#define QIB_6120_EXTStatus_MemBISTEndTest_RMASK   0x1
 
#define QIB_6120_EXTStatus_Reserved2_LSB   0x0
 
#define QIB_6120_EXTStatus_Reserved2_RMASK   0x3FFF
 
#define QIB_6120_EXTCtrl_OFFS   0xD8
 
#define QIB_6120_EXTCtrl_GPIOOe_LSB   0x30
 
#define QIB_6120_EXTCtrl_GPIOOe_RMASK   0xFFFF
 
#define QIB_6120_EXTCtrl_GPIOInvert_LSB   0x20
 
#define QIB_6120_EXTCtrl_GPIOInvert_RMASK   0xFFFF
 
#define QIB_6120_EXTCtrl_Reserved_LSB   0x4
 
#define QIB_6120_EXTCtrl_Reserved_RMASK   0xFFFFFFF
 
#define QIB_6120_EXTCtrl_LEDPriPortGreenOn_LSB   0x3
 
#define QIB_6120_EXTCtrl_LEDPriPortGreenOn_RMASK   0x1
 
#define QIB_6120_EXTCtrl_LEDPriPortYellowOn_LSB   0x2
 
#define QIB_6120_EXTCtrl_LEDPriPortYellowOn_RMASK   0x1
 
#define QIB_6120_EXTCtrl_LEDGblOkGreenOn_LSB   0x1
 
#define QIB_6120_EXTCtrl_LEDGblOkGreenOn_RMASK   0x1
 
#define QIB_6120_EXTCtrl_LEDGblErrRedOff_LSB   0x0
 
#define QIB_6120_EXTCtrl_LEDGblErrRedOff_RMASK   0x1
 
#define QIB_6120_GPIOOut_OFFS   0xE0
 
#define QIB_6120_GPIOMask_OFFS   0xE8
 
#define QIB_6120_GPIOStatus_OFFS   0xF0
 
#define QIB_6120_GPIOClear_OFFS   0xF8
 
#define QIB_6120_RcvCtrl_OFFS   0x100
 
#define QIB_6120_RcvCtrl_TailUpd_LSB   0x1F
 
#define QIB_6120_RcvCtrl_TailUpd_RMASK   0x1
 
#define QIB_6120_RcvCtrl_RcvPartitionKeyDisable_LSB   0x1E
 
#define QIB_6120_RcvCtrl_RcvPartitionKeyDisable_RMASK   0x1
 
#define QIB_6120_RcvCtrl_Reserved_LSB   0x15
 
#define QIB_6120_RcvCtrl_Reserved_RMASK   0x1FF
 
#define QIB_6120_RcvCtrl_IntrAvail_LSB   0x10
 
#define QIB_6120_RcvCtrl_IntrAvail_RMASK   0x1F
 
#define QIB_6120_RcvCtrl_Reserved1_LSB   0x9
 
#define QIB_6120_RcvCtrl_Reserved1_RMASK   0x7F
 
#define QIB_6120_RcvCtrl_Reserved2_LSB   0x5
 
#define QIB_6120_RcvCtrl_Reserved2_RMASK   0xF
 
#define QIB_6120_RcvCtrl_PortEnable_LSB   0x0
 
#define QIB_6120_RcvCtrl_PortEnable_RMASK   0x1F
 
#define QIB_6120_RcvBTHQP_OFFS   0x108
 
#define QIB_6120_RcvBTHQP_BTHQP_Mask_LSB   0x1E
 
#define QIB_6120_RcvBTHQP_BTHQP_Mask_RMASK   0x3
 
#define QIB_6120_RcvBTHQP_Reserved_LSB   0x18
 
#define QIB_6120_RcvBTHQP_Reserved_RMASK   0x3F
 
#define QIB_6120_RcvBTHQP_RcvBTHQP_LSB   0x0
 
#define QIB_6120_RcvBTHQP_RcvBTHQP_RMASK   0xFFFFFF
 
#define QIB_6120_RcvHdrSize_OFFS   0x110
 
#define QIB_6120_RcvHdrCnt_OFFS   0x118
 
#define QIB_6120_RcvHdrEntSize_OFFS   0x120
 
#define QIB_6120_RcvTIDBase_OFFS   0x128
 
#define QIB_6120_RcvTIDCnt_OFFS   0x130
 
#define QIB_6120_RcvEgrBase_OFFS   0x138
 
#define QIB_6120_RcvEgrCnt_OFFS   0x140
 
#define QIB_6120_RcvBufBase_OFFS   0x148
 
#define QIB_6120_RcvBufSize_OFFS   0x150
 
#define QIB_6120_RxIntMemBase_OFFS   0x158
 
#define QIB_6120_RxIntMemSize_OFFS   0x160
 
#define QIB_6120_RcvPartitionKey_OFFS   0x168
 
#define QIB_6120_RcvPktLEDCnt_OFFS   0x178
 
#define QIB_6120_RcvPktLEDCnt_ONperiod_LSB   0x20
 
#define QIB_6120_RcvPktLEDCnt_ONperiod_RMASK   0xFFFFFFFF
 
#define QIB_6120_RcvPktLEDCnt_OFFperiod_LSB   0x0
 
#define QIB_6120_RcvPktLEDCnt_OFFperiod_RMASK   0xFFFFFFFF
 
#define QIB_6120_SendCtrl_OFFS   0x1C0
 
#define QIB_6120_SendCtrl_Disarm_LSB   0x1F
 
#define QIB_6120_SendCtrl_Disarm_RMASK   0x1
 
#define QIB_6120_SendCtrl_Reserved_LSB   0x17
 
#define QIB_6120_SendCtrl_Reserved_RMASK   0xFF
 
#define QIB_6120_SendCtrl_DisarmPIOBuf_LSB   0x10
 
#define QIB_6120_SendCtrl_DisarmPIOBuf_RMASK   0x7F
 
#define QIB_6120_SendCtrl_Reserved1_LSB   0x4
 
#define QIB_6120_SendCtrl_Reserved1_RMASK   0xFFF
 
#define QIB_6120_SendCtrl_PIOEnable_LSB   0x3
 
#define QIB_6120_SendCtrl_PIOEnable_RMASK   0x1
 
#define QIB_6120_SendCtrl_PIOBufAvailUpd_LSB   0x2
 
#define QIB_6120_SendCtrl_PIOBufAvailUpd_RMASK   0x1
 
#define QIB_6120_SendCtrl_PIOIntBufAvail_LSB   0x1
 
#define QIB_6120_SendCtrl_PIOIntBufAvail_RMASK   0x1
 
#define QIB_6120_SendCtrl_Abort_LSB   0x0
 
#define QIB_6120_SendCtrl_Abort_RMASK   0x1
 
#define QIB_6120_SendPIOBufBase_OFFS   0x1C8
 
#define QIB_6120_SendPIOBufBase_Reserved_LSB   0x35
 
#define QIB_6120_SendPIOBufBase_Reserved_RMASK   0x7FF
 
#define QIB_6120_SendPIOBufBase_BaseAddr_LargePIO_LSB   0x20
 
#define QIB_6120_SendPIOBufBase_BaseAddr_LargePIO_RMASK   0x1FFFFF
 
#define QIB_6120_SendPIOBufBase_Reserved1_LSB   0x15
 
#define QIB_6120_SendPIOBufBase_Reserved1_RMASK   0x7FF
 
#define QIB_6120_SendPIOBufBase_BaseAddr_SmallPIO_LSB   0x0
 
#define QIB_6120_SendPIOBufBase_BaseAddr_SmallPIO_RMASK   0x1FFFFF
 
#define QIB_6120_SendPIOSize_OFFS   0x1D0
 
#define QIB_6120_SendPIOSize_Reserved_LSB   0x2D
 
#define QIB_6120_SendPIOSize_Reserved_RMASK   0xFFFFF
 
#define QIB_6120_SendPIOSize_Size_LargePIO_LSB   0x20
 
#define QIB_6120_SendPIOSize_Size_LargePIO_RMASK   0x1FFF
 
#define QIB_6120_SendPIOSize_Reserved1_LSB   0xC
 
#define QIB_6120_SendPIOSize_Reserved1_RMASK   0xFFFFF
 
#define QIB_6120_SendPIOSize_Size_SmallPIO_LSB   0x0
 
#define QIB_6120_SendPIOSize_Size_SmallPIO_RMASK   0xFFF
 
#define QIB_6120_SendPIOBufCnt_OFFS   0x1D8
 
#define QIB_6120_SendPIOBufCnt_Reserved_LSB   0x24
 
#define QIB_6120_SendPIOBufCnt_Reserved_RMASK   0xFFFFFFF
 
#define QIB_6120_SendPIOBufCnt_Num_LargePIO_LSB   0x20
 
#define QIB_6120_SendPIOBufCnt_Num_LargePIO_RMASK   0xF
 
#define QIB_6120_SendPIOBufCnt_Reserved1_LSB   0x9
 
#define QIB_6120_SendPIOBufCnt_Reserved1_RMASK   0x7FFFFF
 
#define QIB_6120_SendPIOBufCnt_Num_SmallPIO_LSB   0x0
 
#define QIB_6120_SendPIOBufCnt_Num_SmallPIO_RMASK   0x1FF
 
#define QIB_6120_SendPIOAvailAddr_OFFS   0x1E0
 
#define QIB_6120_SendPIOAvailAddr_SendPIOAvailAddr_LSB   0x6
 
#define QIB_6120_SendPIOAvailAddr_SendPIOAvailAddr_RMASK   0x3FFFFFFFF
 
#define QIB_6120_SendPIOAvailAddr_Reserved_LSB   0x0
 
#define QIB_6120_SendPIOAvailAddr_Reserved_RMASK   0x3F
 
#define QIB_6120_SendBufErr0_OFFS   0x240
 
#define QIB_6120_SendBufErr0_SendBufErrPIO_63_0_LSB   0x0
 
#define QIB_6120_SendBufErr0_SendBufErrPIO_63_0_RMASK   0x0
 
#define QIB_6120_RcvHdrAddr0_OFFS   0x280
 
#define QIB_6120_RcvHdrAddr0_RcvHdrAddr0_LSB   0x2
 
#define QIB_6120_RcvHdrAddr0_RcvHdrAddr0_RMASK   0x3FFFFFFFFF
 
#define QIB_6120_RcvHdrAddr0_Reserved_LSB   0x0
 
#define QIB_6120_RcvHdrAddr0_Reserved_RMASK   0x3
 
#define QIB_6120_RcvHdrTailAddr0_OFFS   0x300
 
#define QIB_6120_RcvHdrTailAddr0_RcvHdrTailAddr0_LSB   0x2
 
#define QIB_6120_RcvHdrTailAddr0_RcvHdrTailAddr0_RMASK   0x3FFFFFFFFF
 
#define QIB_6120_RcvHdrTailAddr0_Reserved_LSB   0x0
 
#define QIB_6120_RcvHdrTailAddr0_Reserved_RMASK   0x3
 
#define QIB_6120_SerdesCfg0_OFFS   0x3C0
 
#define QIB_6120_SerdesCfg0_DisableIBTxIdleDetect_LSB   0x3F
 
#define QIB_6120_SerdesCfg0_DisableIBTxIdleDetect_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_Reserved_LSB   0x38
 
#define QIB_6120_SerdesCfg0_Reserved_RMASK   0x7F
 
#define QIB_6120_SerdesCfg0_RxEqCtl_LSB   0x36
 
#define QIB_6120_SerdesCfg0_RxEqCtl_RMASK   0x3
 
#define QIB_6120_SerdesCfg0_TxTermAdj_LSB   0x34
 
#define QIB_6120_SerdesCfg0_TxTermAdj_RMASK   0x3
 
#define QIB_6120_SerdesCfg0_RxTermAdj_LSB   0x32
 
#define QIB_6120_SerdesCfg0_RxTermAdj_RMASK   0x3
 
#define QIB_6120_SerdesCfg0_TermAdj1_LSB   0x31
 
#define QIB_6120_SerdesCfg0_TermAdj1_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_TermAdj0_LSB   0x30
 
#define QIB_6120_SerdesCfg0_TermAdj0_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_LPBKA_LSB   0x2F
 
#define QIB_6120_SerdesCfg0_LPBKA_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_LPBKB_LSB   0x2E
 
#define QIB_6120_SerdesCfg0_LPBKB_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_LPBKC_LSB   0x2D
 
#define QIB_6120_SerdesCfg0_LPBKC_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_LPBKD_LSB   0x2C
 
#define QIB_6120_SerdesCfg0_LPBKD_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_PW_LSB   0x2B
 
#define QIB_6120_SerdesCfg0_PW_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_RefSel_LSB   0x29
 
#define QIB_6120_SerdesCfg0_RefSel_RMASK   0x3
 
#define QIB_6120_SerdesCfg0_ParReset_LSB   0x28
 
#define QIB_6120_SerdesCfg0_ParReset_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_ParLPBK_LSB   0x27
 
#define QIB_6120_SerdesCfg0_ParLPBK_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_OffsetEn_LSB   0x26
 
#define QIB_6120_SerdesCfg0_OffsetEn_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_Offset_LSB   0x1E
 
#define QIB_6120_SerdesCfg0_Offset_RMASK   0xFF
 
#define QIB_6120_SerdesCfg0_L2PwrDn_LSB   0x1D
 
#define QIB_6120_SerdesCfg0_L2PwrDn_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_ResetPLL_LSB   0x1C
 
#define QIB_6120_SerdesCfg0_ResetPLL_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_RxTermEnX_LSB   0x18
 
#define QIB_6120_SerdesCfg0_RxTermEnX_RMASK   0xF
 
#define QIB_6120_SerdesCfg0_BeaconTxEnX_LSB   0x14
 
#define QIB_6120_SerdesCfg0_BeaconTxEnX_RMASK   0xF
 
#define QIB_6120_SerdesCfg0_RxDetEnX_LSB   0x10
 
#define QIB_6120_SerdesCfg0_RxDetEnX_RMASK   0xF
 
#define QIB_6120_SerdesCfg0_TxIdeEnX_LSB   0xC
 
#define QIB_6120_SerdesCfg0_TxIdeEnX_RMASK   0xF
 
#define QIB_6120_SerdesCfg0_RxIdleEnX_LSB   0x8
 
#define QIB_6120_SerdesCfg0_RxIdleEnX_RMASK   0xF
 
#define QIB_6120_SerdesCfg0_L1PwrDnA_LSB   0x7
 
#define QIB_6120_SerdesCfg0_L1PwrDnA_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_L1PwrDnB_LSB   0x6
 
#define QIB_6120_SerdesCfg0_L1PwrDnB_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_L1PwrDnC_LSB   0x5
 
#define QIB_6120_SerdesCfg0_L1PwrDnC_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_L1PwrDnD_LSB   0x4
 
#define QIB_6120_SerdesCfg0_L1PwrDnD_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_ResetA_LSB   0x3
 
#define QIB_6120_SerdesCfg0_ResetA_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_ResetB_LSB   0x2
 
#define QIB_6120_SerdesCfg0_ResetB_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_ResetC_LSB   0x1
 
#define QIB_6120_SerdesCfg0_ResetC_RMASK   0x1
 
#define QIB_6120_SerdesCfg0_ResetD_LSB   0x0
 
#define QIB_6120_SerdesCfg0_ResetD_RMASK   0x1
 
#define QIB_6120_SerdesStat_OFFS   0x3D0
 
#define QIB_6120_SerdesStat_Reserved_LSB   0xC
 
#define QIB_6120_SerdesStat_Reserved_RMASK   0xFFFFFFFFFFFFF
 
#define QIB_6120_SerdesStat_BeaconDetA_LSB   0xB
 
#define QIB_6120_SerdesStat_BeaconDetA_RMASK   0x1
 
#define QIB_6120_SerdesStat_BeaconDetB_LSB   0xA
 
#define QIB_6120_SerdesStat_BeaconDetB_RMASK   0x1
 
#define QIB_6120_SerdesStat_BeaconDetC_LSB   0x9
 
#define QIB_6120_SerdesStat_BeaconDetC_RMASK   0x1
 
#define QIB_6120_SerdesStat_BeaconDetD_LSB   0x8
 
#define QIB_6120_SerdesStat_BeaconDetD_RMASK   0x1
 
#define QIB_6120_SerdesStat_RxDetA_LSB   0x7
 
#define QIB_6120_SerdesStat_RxDetA_RMASK   0x1
 
#define QIB_6120_SerdesStat_RxDetB_LSB   0x6
 
#define QIB_6120_SerdesStat_RxDetB_RMASK   0x1
 
#define QIB_6120_SerdesStat_RxDetC_LSB   0x5
 
#define QIB_6120_SerdesStat_RxDetC_RMASK   0x1
 
#define QIB_6120_SerdesStat_RxDetD_LSB   0x4
 
#define QIB_6120_SerdesStat_RxDetD_RMASK   0x1
 
#define QIB_6120_SerdesStat_TxIdleDetA_LSB   0x3
 
#define QIB_6120_SerdesStat_TxIdleDetA_RMASK   0x1
 
#define QIB_6120_SerdesStat_TxIdleDetB_LSB   0x2
 
#define QIB_6120_SerdesStat_TxIdleDetB_RMASK   0x1
 
#define QIB_6120_SerdesStat_TxIdleDetC_LSB   0x1
 
#define QIB_6120_SerdesStat_TxIdleDetC_RMASK   0x1
 
#define QIB_6120_SerdesStat_TxIdleDetD_LSB   0x0
 
#define QIB_6120_SerdesStat_TxIdleDetD_RMASK   0x1
 
#define QIB_6120_XGXSCfg_OFFS   0x3D8
 
#define QIB_6120_XGXSCfg_ArmLaunchErrorDisable_LSB   0x3F
 
#define QIB_6120_XGXSCfg_ArmLaunchErrorDisable_RMASK   0x1
 
#define QIB_6120_XGXSCfg_Reserved_LSB   0x17
 
#define QIB_6120_XGXSCfg_Reserved_RMASK   0xFFFFFFFFFF
 
#define QIB_6120_XGXSCfg_polarity_inv_LSB   0x13
 
#define QIB_6120_XGXSCfg_polarity_inv_RMASK   0xF
 
#define QIB_6120_XGXSCfg_link_sync_mask_LSB   0x9
 
#define QIB_6120_XGXSCfg_link_sync_mask_RMASK   0x3FF
 
#define QIB_6120_XGXSCfg_port_addr_LSB   0x4
 
#define QIB_6120_XGXSCfg_port_addr_RMASK   0x1F
 
#define QIB_6120_XGXSCfg_mdd_30_LSB   0x3
 
#define QIB_6120_XGXSCfg_mdd_30_RMASK   0x1
 
#define QIB_6120_XGXSCfg_xcv_resetn_LSB   0x2
 
#define QIB_6120_XGXSCfg_xcv_resetn_RMASK   0x1
 
#define QIB_6120_XGXSCfg_Reserved1_LSB   0x1
 
#define QIB_6120_XGXSCfg_Reserved1_RMASK   0x1
 
#define QIB_6120_XGXSCfg_tx_rx_resetn_LSB   0x0
 
#define QIB_6120_XGXSCfg_tx_rx_resetn_RMASK   0x1
 
#define QIB_6120_LBIntCnt_OFFS   0x12000
 
#define QIB_6120_LBFlowStallCnt_OFFS   0x12008
 
#define QIB_6120_TxUnsupVLErrCnt_OFFS   0x12018
 
#define QIB_6120_TxDataPktCnt_OFFS   0x12020
 
#define QIB_6120_TxFlowPktCnt_OFFS   0x12028
 
#define QIB_6120_TxDwordCnt_OFFS   0x12030
 
#define QIB_6120_TxLenErrCnt_OFFS   0x12038
 
#define QIB_6120_TxMaxMinLenErrCnt_OFFS   0x12040
 
#define QIB_6120_TxUnderrunCnt_OFFS   0x12048
 
#define QIB_6120_TxFlowStallCnt_OFFS   0x12050
 
#define QIB_6120_TxDroppedPktCnt_OFFS   0x12058
 
#define QIB_6120_RxDroppedPktCnt_OFFS   0x12060
 
#define QIB_6120_RxDataPktCnt_OFFS   0x12068
 
#define QIB_6120_RxFlowPktCnt_OFFS   0x12070
 
#define QIB_6120_RxDwordCnt_OFFS   0x12078
 
#define QIB_6120_RxLenErrCnt_OFFS   0x12080
 
#define QIB_6120_RxMaxMinLenErrCnt_OFFS   0x12088
 
#define QIB_6120_RxICRCErrCnt_OFFS   0x12090
 
#define QIB_6120_RxVCRCErrCnt_OFFS   0x12098
 
#define QIB_6120_RxFlowCtrlErrCnt_OFFS   0x120A0
 
#define QIB_6120_RxBadFormatCnt_OFFS   0x120A8
 
#define QIB_6120_RxLinkProblemCnt_OFFS   0x120B0
 
#define QIB_6120_RxEBPCnt_OFFS   0x120B8
 
#define QIB_6120_RxLPCRCErrCnt_OFFS   0x120C0
 
#define QIB_6120_RxBufOvflCnt_OFFS   0x120C8
 
#define QIB_6120_RxTIDFullErrCnt_OFFS   0x120D0
 
#define QIB_6120_RxTIDValidErrCnt_OFFS   0x120D8
 
#define QIB_6120_RxPKeyMismatchCnt_OFFS   0x120E0
 
#define QIB_6120_RxP0HdrEgrOvflCnt_OFFS   0x120E8
 
#define QIB_6120_IBStatusChangeCnt_OFFS   0x12140
 
#define QIB_6120_IBLinkErrRecoveryCnt_OFFS   0x12148
 
#define QIB_6120_IBLinkDownedCnt_OFFS   0x12150
 
#define QIB_6120_IBSymbolErrCnt_OFFS   0x12158
 
#define QIB_6120_PcieRetryBufDiagQwordCnt_OFFS   0x12170
 
#define QIB_6120_RcvEgrArray0_OFFS   0x14000
 
#define QIB_6120_RcvTIDArray0_OFFS   0x54000
 
#define QIB_6120_PIOLaunchFIFO_OFFS   0x64000
 
#define QIB_6120_SendPIOpbcCache_OFFS   0x64800
 
#define QIB_6120_RcvBuf1_OFFS   0x72000
 
#define QIB_6120_RcvBuf2_OFFS   0x75000
 
#define QIB_6120_RcvFlags_OFFS   0x77000
 
#define QIB_6120_RcvLookupBuf1_OFFS   0x79000
 
#define QIB_6120_RcvDMABuf_OFFS   0x7B000
 
#define QIB_6120_MiscRXEIntMem_OFFS   0x7C000
 
#define QIB_6120_PCIERcvBuf_OFFS   0x80000
 
#define QIB_6120_PCIERetryBuf_OFFS   0x82000
 
#define QIB_6120_PCIERcvBufRdToWrAddr_OFFS   0x84000
 
#define QIB_6120_PIOBuf0_MA_OFFS   0x100000
 

Macro Definition Documentation

#define QIB_6120_CntrRegBase_OFFS   0x40

Definition at line 71 of file qib_6120_regs.h.

#define QIB_6120_Control_FreezeMode_LSB   0x1

Definition at line 58 of file qib_6120_regs.h.

#define QIB_6120_Control_FreezeMode_RMASK   0x1

Definition at line 59 of file qib_6120_regs.h.

#define QIB_6120_Control_LinkEn_LSB   0x2

Definition at line 56 of file qib_6120_regs.h.

#define QIB_6120_Control_LinkEn_RMASK   0x1

Definition at line 57 of file qib_6120_regs.h.

#define QIB_6120_Control_OFFS   0x8

Definition at line 51 of file qib_6120_regs.h.

#define QIB_6120_Control_PCIERetryBufDiagEn_LSB   0x3

Definition at line 54 of file qib_6120_regs.h.

#define QIB_6120_Control_PCIERetryBufDiagEn_RMASK   0x1

Definition at line 55 of file qib_6120_regs.h.

#define QIB_6120_Control_SyncReset_LSB   0x0

Definition at line 60 of file qib_6120_regs.h.

#define QIB_6120_Control_SyncReset_RMASK   0x1

Definition at line 61 of file qib_6120_regs.h.

#define QIB_6120_Control_TxLatency_LSB   0x4

Definition at line 52 of file qib_6120_regs.h.

#define QIB_6120_Control_TxLatency_RMASK   0x1

Definition at line 53 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_HardwareErrClear_LSB   0x33

Definition at line 358 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_HardwareErrClear_RMASK   0x1

Definition at line 359 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_IBStatusChangedClear_LSB   0x30

Definition at line 364 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_IBStatusChangedClear_RMASK   0x1

Definition at line 365 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_InvalidAddrErrClear_LSB   0x31

Definition at line 362 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_InvalidAddrErrClear_RMASK   0x1

Definition at line 363 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_OFFS   0x90

Definition at line 355 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvBadTidErrClear_LSB   0xE

Definition at line 394 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvBadTidErrClear_RMASK   0x1

Definition at line 395 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvBadVersionErrClear_LSB   0xB

Definition at line 400 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvBadVersionErrClear_RMASK   0x1

Definition at line 401 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvEBPErrClear_LSB   0x9

Definition at line 404 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvEBPErrClear_RMASK   0x1

Definition at line 405 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvEgrFullErrClear_LSB   0xC

Definition at line 398 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvEgrFullErrClear_RMASK   0x1

Definition at line 399 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvFormatErrClear_LSB   0x0

Definition at line 422 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvFormatErrClear_RMASK   0x1

Definition at line 423 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvHdrErrClear_LSB   0x10

Definition at line 390 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvHdrErrClear_RMASK   0x1

Definition at line 391 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvHdrFullErrClear_LSB   0xD

Definition at line 396 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvHdrFullErrClear_RMASK   0x1

Definition at line 397 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvHdrLenErrClear_LSB   0xF

Definition at line 392 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvHdrLenErrClear_RMASK   0x1

Definition at line 393 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvIBFlowErrClear_LSB   0xA

Definition at line 402 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvIBFlowErrClear_RMASK   0x1

Definition at line 403 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvIBLostLinkErrClear_LSB   0x11

Definition at line 388 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvIBLostLinkErrClear_RMASK   0x1

Definition at line 389 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvICRCErrClear_LSB   0x2

Definition at line 418 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvICRCErrClear_RMASK   0x1

Definition at line 419 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvLongPktLenErrClear_LSB   0x5

Definition at line 412 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvLongPktLenErrClear_RMASK   0x1

Definition at line 413 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvMaxPktLenErrClear_LSB   0x4

Definition at line 414 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvMaxPktLenErrClear_RMASK   0x1

Definition at line 415 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvMinPktLenErrClear_LSB   0x3

Definition at line 416 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvMinPktLenErrClear_RMASK   0x1

Definition at line 417 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvShortPktLenErrClear_LSB   0x6

Definition at line 410 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvShortPktLenErrClear_RMASK   0x1

Definition at line 411 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvUnexpectedCharErrClear_LSB   0x7

Definition at line 408 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvUnexpectedCharErrClear_RMASK   0x1

Definition at line 409 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvUnsupportedVLErrClear_LSB   0x8

Definition at line 406 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvUnsupportedVLErrClear_RMASK   0x1

Definition at line 407 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvVCRCErrClear_LSB   0x1

Definition at line 420 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_RcvVCRCErrClear_RMASK   0x1

Definition at line 421 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_Reserved1_LSB   0x26

Definition at line 366 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_Reserved1_RMASK   0x3FF

Definition at line 367 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_Reserved2_LSB   0x12

Definition at line 386 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_Reserved2_RMASK   0x7FF

Definition at line 387 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_Reserved_LSB   0x34

Definition at line 356 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_Reserved_RMASK   0xFFF

Definition at line 357 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_ResetNegatedClear_LSB   0x32

Definition at line 360 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_ResetNegatedClear_RMASK   0x1

Definition at line 361 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_SendDroppedDataPktErrClear_LSB   0x22

Definition at line 374 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_SendDroppedDataPktErrClear_RMASK   0x1

Definition at line 375 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_SendDroppedSmpPktErrClear_LSB   0x21

Definition at line 376 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_SendDroppedSmpPktErrClear_RMASK   0x1

Definition at line 377 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_SendMaxPktLenErrClear_LSB   0x1E

Definition at line 382 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_SendMaxPktLenErrClear_RMASK   0x1

Definition at line 383 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_SendMinPktLenErrClear_LSB   0x1D

Definition at line 384 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_SendMinPktLenErrClear_RMASK   0x1

Definition at line 385 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_SendPioArmLaunchErrClear_LSB   0x23

Definition at line 372 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_SendPioArmLaunchErrClear_RMASK   0x1

Definition at line 373 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_SendPktLenErrClear_LSB   0x20

Definition at line 378 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_SendPktLenErrClear_RMASK   0x1

Definition at line 379 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_SendUnderRunErrClear_LSB   0x1F

Definition at line 380 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_SendUnderRunErrClear_RMASK   0x1

Definition at line 381 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_SendUnexpectedPktNumErrClear_LSB   0x24

Definition at line 370 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_SendUnexpectedPktNumErrClear_RMASK   0x1

Definition at line 371 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_SendUnsupportedVLErrClear_LSB   0x25

Definition at line 368 of file qib_6120_regs.h.

#define QIB_6120_ErrClear_SendUnsupportedVLErrClear_RMASK   0x1

Definition at line 369 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_HardwareErrMask_LSB   0x33

Definition at line 218 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_HardwareErrMask_RMASK   0x1

Definition at line 219 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_IBStatusChangedMask_LSB   0x30

Definition at line 224 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_IBStatusChangedMask_RMASK   0x1

Definition at line 225 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_InvalidAddrErrMask_LSB   0x31

Definition at line 222 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_InvalidAddrErrMask_RMASK   0x1

Definition at line 223 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_OFFS   0x80

Definition at line 215 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvBadTidErrMask_LSB   0xE

Definition at line 254 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvBadTidErrMask_RMASK   0x1

Definition at line 255 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvBadVersionErrMask_LSB   0xB

Definition at line 260 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvBadVersionErrMask_RMASK   0x1

Definition at line 261 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvEBPErrMask_LSB   0x9

Definition at line 264 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvEBPErrMask_RMASK   0x1

Definition at line 265 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvEgrFullErrMask_LSB   0xC

Definition at line 258 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvEgrFullErrMask_RMASK   0x1

Definition at line 259 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvFormatErrMask_LSB   0x0

Definition at line 282 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvFormatErrMask_RMASK   0x1

Definition at line 283 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvHdrErrMask_LSB   0x10

Definition at line 250 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvHdrErrMask_RMASK   0x1

Definition at line 251 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvHdrFullErrMask_LSB   0xD

Definition at line 256 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvHdrFullErrMask_RMASK   0x1

Definition at line 257 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvHdrLenErrMask_LSB   0xF

Definition at line 252 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvHdrLenErrMask_RMASK   0x1

Definition at line 253 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvIBFlowErrMask_LSB   0xA

Definition at line 262 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvIBFlowErrMask_RMASK   0x1

Definition at line 263 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvIBLostLinkErrMask_LSB   0x11

Definition at line 248 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvIBLostLinkErrMask_RMASK   0x1

Definition at line 249 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvICRCErrMask_LSB   0x2

Definition at line 278 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvICRCErrMask_RMASK   0x1

Definition at line 279 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvLongPktLenErrMask_LSB   0x5

Definition at line 272 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvLongPktLenErrMask_RMASK   0x1

Definition at line 273 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvMaxPktLenErrMask_LSB   0x4

Definition at line 274 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvMaxPktLenErrMask_RMASK   0x1

Definition at line 275 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvMinPktLenErrMask_LSB   0x3

Definition at line 276 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvMinPktLenErrMask_RMASK   0x1

Definition at line 277 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvShortPktLenErrMask_LSB   0x6

Definition at line 270 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvShortPktLenErrMask_RMASK   0x1

Definition at line 271 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvUnexpectedCharErrMask_LSB   0x7

Definition at line 268 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvUnexpectedCharErrMask_RMASK   0x1

Definition at line 269 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvUnsupportedVLErrMask_LSB   0x8

Definition at line 266 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvUnsupportedVLErrMask_RMASK   0x1

Definition at line 267 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvVCRCErrMask_LSB   0x1

Definition at line 280 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_RcvVCRCErrMask_RMASK   0x1

Definition at line 281 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_Reserved1_LSB   0x26

Definition at line 226 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_Reserved1_RMASK   0x3FF

Definition at line 227 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_Reserved2_LSB   0x12

Definition at line 246 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_Reserved2_RMASK   0x7FF

Definition at line 247 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_Reserved_LSB   0x34

Definition at line 216 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_Reserved_RMASK   0xFFF

Definition at line 217 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_ResetNegatedMask_LSB   0x32

Definition at line 220 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_ResetNegatedMask_RMASK   0x1

Definition at line 221 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_SendDroppedDataPktErrMask_LSB   0x22

Definition at line 234 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_SendDroppedDataPktErrMask_RMASK   0x1

Definition at line 235 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_SendDroppedSmpPktErrMask_LSB   0x21

Definition at line 236 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_SendDroppedSmpPktErrMask_RMASK   0x1

Definition at line 237 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_SendMaxPktLenErrMask_LSB   0x1E

Definition at line 242 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_SendMaxPktLenErrMask_RMASK   0x1

Definition at line 243 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_SendMinPktLenErrMask_LSB   0x1D

Definition at line 244 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_SendMinPktLenErrMask_RMASK   0x1

Definition at line 245 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_SendPioArmLaunchErrMask_LSB   0x23

Definition at line 232 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_SendPioArmLaunchErrMask_RMASK   0x1

Definition at line 233 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_SendPktLenErrMask_LSB   0x20

Definition at line 238 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_SendPktLenErrMask_RMASK   0x1

Definition at line 239 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_SendUnderRunErrMask_LSB   0x1F

Definition at line 240 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_SendUnderRunErrMask_RMASK   0x1

Definition at line 241 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_SendUnexpectedPktNumErrMask_LSB   0x24

Definition at line 230 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_SendUnexpectedPktNumErrMask_RMASK   0x1

Definition at line 231 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_SendUnsupportedVLErrMask_LSB   0x25

Definition at line 228 of file qib_6120_regs.h.

#define QIB_6120_ErrMask_SendUnsupportedVLErrMask_RMASK   0x1

Definition at line 229 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_HardwareErr_LSB   0x33

Definition at line 288 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_HardwareErr_RMASK   0x1

Definition at line 289 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_IBStatusChanged_LSB   0x30

Definition at line 294 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_IBStatusChanged_RMASK   0x1

Definition at line 295 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_InvalidAddrErr_LSB   0x31

Definition at line 292 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_InvalidAddrErr_RMASK   0x1

Definition at line 293 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_OFFS   0x88

Definition at line 285 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvBadTidErr_LSB   0xE

Definition at line 324 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvBadTidErr_RMASK   0x1

Definition at line 325 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvBadVersionErr_LSB   0xB

Definition at line 330 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvBadVersionErr_RMASK   0x1

Definition at line 331 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvEBPErr_LSB   0x9

Definition at line 334 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvEBPErr_RMASK   0x1

Definition at line 335 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvEgrFullErr_LSB   0xC

Definition at line 328 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvEgrFullErr_RMASK   0x1

Definition at line 329 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvFormatErr_LSB   0x0

Definition at line 352 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvFormatErr_RMASK   0x1

Definition at line 353 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvHdrErr_LSB   0x10

Definition at line 320 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvHdrErr_RMASK   0x1

Definition at line 321 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvHdrFullErr_LSB   0xD

Definition at line 326 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvHdrFullErr_RMASK   0x1

Definition at line 327 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvHdrLenErr_LSB   0xF

Definition at line 322 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvHdrLenErr_RMASK   0x1

Definition at line 323 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvIBFlowErr_LSB   0xA

Definition at line 332 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvIBFlowErr_RMASK   0x1

Definition at line 333 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvIBLostLinkErr_LSB   0x11

Definition at line 318 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvIBLostLinkErr_RMASK   0x1

Definition at line 319 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvICRCErr_LSB   0x2

Definition at line 348 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvICRCErr_RMASK   0x1

Definition at line 349 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvLongPktLenErr_LSB   0x5

Definition at line 342 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvLongPktLenErr_RMASK   0x1

Definition at line 343 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvMaxPktLenErr_LSB   0x4

Definition at line 344 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvMaxPktLenErr_RMASK   0x1

Definition at line 345 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvMinPktLenErr_LSB   0x3

Definition at line 346 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvMinPktLenErr_RMASK   0x1

Definition at line 347 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvShortPktLenErr_LSB   0x6

Definition at line 340 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvShortPktLenErr_RMASK   0x1

Definition at line 341 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvUnexpectedCharErr_LSB   0x7

Definition at line 338 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvUnexpectedCharErr_RMASK   0x1

Definition at line 339 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvUnsupportedVLErr_LSB   0x8

Definition at line 336 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvUnsupportedVLErr_RMASK   0x1

Definition at line 337 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvVCRCErr_LSB   0x1

Definition at line 350 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_RcvVCRCErr_RMASK   0x1

Definition at line 351 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_Reserved1_LSB   0x26

Definition at line 296 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_Reserved1_RMASK   0x3FF

Definition at line 297 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_Reserved2_LSB   0x12

Definition at line 316 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_Reserved2_RMASK   0x7FF

Definition at line 317 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_Reserved_LSB   0x34

Definition at line 286 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_Reserved_RMASK   0xFFF

Definition at line 287 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_ResetNegated_LSB   0x32

Definition at line 290 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_ResetNegated_RMASK   0x1

Definition at line 291 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_SendDroppedDataPktErr_LSB   0x22

Definition at line 304 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_SendDroppedDataPktErr_RMASK   0x1

Definition at line 305 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_SendDroppedSmpPktErr_LSB   0x21

Definition at line 306 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_SendDroppedSmpPktErr_RMASK   0x1

Definition at line 307 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_SendMaxPktLenErr_LSB   0x1E

Definition at line 312 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_SendMaxPktLenErr_RMASK   0x1

Definition at line 313 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_SendMinPktLenErr_LSB   0x1D

Definition at line 314 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_SendMinPktLenErr_RMASK   0x1

Definition at line 315 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_SendPioArmLaunchErr_LSB   0x23

Definition at line 302 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_SendPioArmLaunchErr_RMASK   0x1

Definition at line 303 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_SendPktLenErr_LSB   0x20

Definition at line 308 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_SendPktLenErr_RMASK   0x1

Definition at line 309 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_SendUnderRunErr_LSB   0x1F

Definition at line 310 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_SendUnderRunErr_RMASK   0x1

Definition at line 311 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_SendUnexpectedPktNumErr_LSB   0x24

Definition at line 300 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_SendUnexpectedPktNumErr_RMASK   0x1

Definition at line 301 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_SendUnsupportedVLErr_LSB   0x25

Definition at line 298 of file qib_6120_regs.h.

#define QIB_6120_ErrStatus_SendUnsupportedVLErr_RMASK   0x1

Definition at line 299 of file qib_6120_regs.h.

#define QIB_6120_EXTCtrl_GPIOInvert_LSB   0x20

Definition at line 624 of file qib_6120_regs.h.

#define QIB_6120_EXTCtrl_GPIOInvert_RMASK   0xFFFF

Definition at line 625 of file qib_6120_regs.h.

#define QIB_6120_EXTCtrl_GPIOOe_LSB   0x30

Definition at line 622 of file qib_6120_regs.h.

#define QIB_6120_EXTCtrl_GPIOOe_RMASK   0xFFFF

Definition at line 623 of file qib_6120_regs.h.

#define QIB_6120_EXTCtrl_LEDGblErrRedOff_LSB   0x0

Definition at line 634 of file qib_6120_regs.h.

#define QIB_6120_EXTCtrl_LEDGblErrRedOff_RMASK   0x1

Definition at line 635 of file qib_6120_regs.h.

#define QIB_6120_EXTCtrl_LEDGblOkGreenOn_LSB   0x1

Definition at line 632 of file qib_6120_regs.h.

#define QIB_6120_EXTCtrl_LEDGblOkGreenOn_RMASK   0x1

Definition at line 633 of file qib_6120_regs.h.

#define QIB_6120_EXTCtrl_LEDPriPortGreenOn_LSB   0x3

Definition at line 628 of file qib_6120_regs.h.

#define QIB_6120_EXTCtrl_LEDPriPortGreenOn_RMASK   0x1

Definition at line 629 of file qib_6120_regs.h.

#define QIB_6120_EXTCtrl_LEDPriPortYellowOn_LSB   0x2

Definition at line 630 of file qib_6120_regs.h.

#define QIB_6120_EXTCtrl_LEDPriPortYellowOn_RMASK   0x1

Definition at line 631 of file qib_6120_regs.h.

#define QIB_6120_EXTCtrl_OFFS   0xD8

Definition at line 621 of file qib_6120_regs.h.

#define QIB_6120_EXTCtrl_Reserved_LSB   0x4

Definition at line 626 of file qib_6120_regs.h.

#define QIB_6120_EXTCtrl_Reserved_RMASK   0xFFFFFFF

Definition at line 627 of file qib_6120_regs.h.

#define QIB_6120_EXTStatus_GPIOIn_LSB   0x30

Definition at line 608 of file qib_6120_regs.h.

#define QIB_6120_EXTStatus_GPIOIn_RMASK   0xFFFF

Definition at line 609 of file qib_6120_regs.h.

#define QIB_6120_EXTStatus_MemBISTEndTest_LSB   0xE

Definition at line 616 of file qib_6120_regs.h.

#define QIB_6120_EXTStatus_MemBISTEndTest_RMASK   0x1

Definition at line 617 of file qib_6120_regs.h.

#define QIB_6120_EXTStatus_MemBISTFoundErr_LSB   0xF

Definition at line 614 of file qib_6120_regs.h.

#define QIB_6120_EXTStatus_MemBISTFoundErr_RMASK   0x1

Definition at line 615 of file qib_6120_regs.h.

#define QIB_6120_EXTStatus_OFFS   0xD0

Definition at line 607 of file qib_6120_regs.h.

#define QIB_6120_EXTStatus_Reserved1_LSB   0x10

Definition at line 612 of file qib_6120_regs.h.

#define QIB_6120_EXTStatus_Reserved1_RMASK   0xFFFF

Definition at line 613 of file qib_6120_regs.h.

#define QIB_6120_EXTStatus_Reserved2_LSB   0x0

Definition at line 618 of file qib_6120_regs.h.

#define QIB_6120_EXTStatus_Reserved2_RMASK   0x3FFF

Definition at line 619 of file qib_6120_regs.h.

#define QIB_6120_EXTStatus_Reserved_LSB   0x20

Definition at line 610 of file qib_6120_regs.h.

#define QIB_6120_EXTStatus_Reserved_RMASK   0xFFFF

Definition at line 611 of file qib_6120_regs.h.

#define QIB_6120_GPIOClear_OFFS   0xF8

Definition at line 643 of file qib_6120_regs.h.

#define QIB_6120_GPIOMask_OFFS   0xE8

Definition at line 639 of file qib_6120_regs.h.

#define QIB_6120_GPIOOut_OFFS   0xE0

Definition at line 637 of file qib_6120_regs.h.

#define QIB_6120_GPIOStatus_OFFS   0xF0

Definition at line 641 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_CounterDisable_LSB   0x3C

Definition at line 552 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_CounterDisable_RMASK   0x1

Definition at line 553 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_CounterWrEnable_LSB   0x3D

Definition at line 550 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_CounterWrEnable_RMASK   0x1

Definition at line 551 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_ForceIBCBusFromSPCParityErr_LSB   0x3F

Definition at line 546 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_ForceIBCBusFromSPCParityErr_RMASK   0x1

Definition at line 547 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_ForceIBCBusToSPCParityErr_LSB   0x3E

Definition at line 548 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_ForceIBCBusToSPCParityErr_RMASK   0x1

Definition at line 549 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_forcePCIeBusParity_LSB   0x1F

Definition at line 562 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_forcePCIeBusParity_RMASK   0xF

Definition at line 563 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_forcePCIeMemParity_LSB   0x0

Definition at line 566 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_forcePCIeMemParity_RMASK   0x3F

Definition at line 567 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_ForceRxMemParityErr_LSB   0x2C

Definition at line 556 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_ForceRxMemParityErr_RMASK   0x7F

Definition at line 557 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_ForceTxMemparityErr_LSB   0x28

Definition at line 558 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_ForceTxMemparityErr_RMASK   0xF

Definition at line 559 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_OFFS   0xB0

Definition at line 545 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_Reserved1_LSB   0x23

Definition at line 560 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_Reserved1_RMASK   0x1F

Definition at line 561 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_Reserved2_LSB   0x6

Definition at line 564 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_Reserved2_RMASK   0x1FFFFFF

Definition at line 565 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_Reserved_LSB   0x33

Definition at line 554 of file qib_6120_regs.h.

#define QIB_6120_HwDiagCtrl_Reserved_RMASK   0x1FF

Definition at line 555 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_IBCBusFromSPCParityErrClear_LSB   0x3F

Definition at line 506 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_IBCBusFromSPCParityErrClear_RMASK   0x1

Definition at line 507 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_IBCBusToSPCparityErrClear_LSB   0x3E

Definition at line 508 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_IBCBusToSPCparityErrClear_RMASK   0x1

Definition at line 509 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_IBPLLfbSlipClear_LSB   0x37

Definition at line 522 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_IBPLLfbSlipClear_RMASK   0x1

Definition at line 523 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_IBPLLrfSlipClear_LSB   0x38

Definition at line 520 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_IBPLLrfSlipClear_RMASK   0x1

Definition at line 521 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_IBSerdesPClkNotDetectClear_LSB   0x3C

Definition at line 512 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_IBSerdesPClkNotDetectClear_RMASK   0x1

Definition at line 513 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_OFFS   0xA8

Definition at line 505 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_PCIeBusParityClr_LSB   0x1F

Definition at line 534 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_PCIeBusParityClr_RMASK   0x7

Definition at line 535 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_PcieCplTimeoutClear_LSB   0x1E

Definition at line 536 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_PcieCplTimeoutClear_RMASK   0x1

Definition at line 537 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_PCIeMemParityClr_LSB   0x0

Definition at line 542 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_PCIeMemParityClr_RMASK   0x3F

Definition at line 543 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_PCIESerdesQ0PClkNotDetectClear_LSB   0x3B

Definition at line 514 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_PCIESerdesQ0PClkNotDetectClear_RMASK   0x1

Definition at line 515 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_PCIESerdesQ1PClkNotDetectClear_LSB   0x3A

Definition at line 516 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_PCIESerdesQ1PClkNotDetectClear_RMASK   0x1

Definition at line 517 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_PoisonedTLPClear_LSB   0x1D

Definition at line 538 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_PoisonedTLPClear_RMASK   0x1

Definition at line 539 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_PowerOnBISTFailedClear_LSB   0x36

Definition at line 524 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_PowerOnBISTFailedClear_RMASK   0x1

Definition at line 525 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_Reserved1_LSB   0x39

Definition at line 518 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_Reserved1_RMASK   0x1

Definition at line 519 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_Reserved2_LSB   0x33

Definition at line 526 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_Reserved2_RMASK   0x7

Definition at line 527 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_Reserved3_LSB   0x22

Definition at line 532 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_Reserved3_RMASK   0x3F

Definition at line 533 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_Reserved4_LSB   0x6

Definition at line 540 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_Reserved4_RMASK   0x7FFFFF

Definition at line 541 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_Reserved_LSB   0x3D

Definition at line 510 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_Reserved_RMASK   0x1

Definition at line 511 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_RXEMemParityClear_LSB   0x2C

Definition at line 528 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_RXEMemParityClear_RMASK   0x7F

Definition at line 529 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_TXEMemParityClear_LSB   0x28

Definition at line 530 of file qib_6120_regs.h.

#define QIB_6120_HwErrClear_TXEMemParityClear_RMASK   0xF

Definition at line 531 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_IBCBusFromSPCParityErrMask_LSB   0x3F

Definition at line 426 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_IBCBusFromSPCParityErrMask_RMASK   0x1

Definition at line 427 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_IBCBusToSPCParityErrMask_LSB   0x3E

Definition at line 428 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_IBCBusToSPCParityErrMask_RMASK   0x1

Definition at line 429 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_IBPLLfbSlipMask_LSB   0x37

Definition at line 442 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_IBPLLfbSlipMask_RMASK   0x1

Definition at line 443 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_IBPLLrfSlipMask_LSB   0x38

Definition at line 440 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_IBPLLrfSlipMask_RMASK   0x1

Definition at line 441 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_IBSerdesPClkNotDetectMask_LSB   0x3C

Definition at line 432 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_IBSerdesPClkNotDetectMask_RMASK   0x1

Definition at line 433 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_OFFS   0x98

Definition at line 425 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_PCIeBusParityErrMask_LSB   0x1F

Definition at line 454 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_PCIeBusParityErrMask_RMASK   0x7

Definition at line 455 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_PcieCplTimeoutMask_LSB   0x1E

Definition at line 456 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_PcieCplTimeoutMask_RMASK   0x1

Definition at line 457 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_PCIeMemParityErrMask_LSB   0x0

Definition at line 462 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_PCIeMemParityErrMask_RMASK   0x3F

Definition at line 463 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_PCIESerdesQ0PClkNotDetectMask_LSB   0x3B

Definition at line 434 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_PCIESerdesQ0PClkNotDetectMask_RMASK   0x1

Definition at line 435 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_PCIESerdesQ1PClkNotDetectMask_LSB   0x3A

Definition at line 436 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_PCIESerdesQ1PClkNotDetectMask_RMASK   0x1

Definition at line 437 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_PoisonedTLPMask_LSB   0x1D

Definition at line 458 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_PoisonedTLPMask_RMASK   0x1

Definition at line 459 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_PowerOnBISTFailedMask_LSB   0x36

Definition at line 444 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_PowerOnBISTFailedMask_RMASK   0x1

Definition at line 445 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_Reserved1_LSB   0x39

Definition at line 438 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_Reserved1_RMASK   0x1

Definition at line 439 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_Reserved2_LSB   0x33

Definition at line 446 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_Reserved2_RMASK   0x7

Definition at line 447 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_Reserved3_LSB   0x22

Definition at line 452 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_Reserved3_RMASK   0x3F

Definition at line 453 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_Reserved4_LSB   0x6

Definition at line 460 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_Reserved4_RMASK   0x7FFFFF

Definition at line 461 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_Reserved_LSB   0x3D

Definition at line 430 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_Reserved_RMASK   0x1

Definition at line 431 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_RXEMemParityErrMask_LSB   0x2C

Definition at line 448 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_RXEMemParityErrMask_RMASK   0x7F

Definition at line 449 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_TXEMemParityErrMask_LSB   0x28

Definition at line 450 of file qib_6120_regs.h.

#define QIB_6120_HwErrMask_TXEMemParityErrMask_RMASK   0xF

Definition at line 451 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_IBCBusFromSPCParityErr_LSB   0x3F

Definition at line 466 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_IBCBusFromSPCParityErr_RMASK   0x1

Definition at line 467 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_IBCBusToSPCParityErr_LSB   0x3E

Definition at line 468 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_IBCBusToSPCParityErr_RMASK   0x1

Definition at line 469 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_IBPLLfbSlip_LSB   0x37

Definition at line 482 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_IBPLLfbSlip_RMASK   0x1

Definition at line 483 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_IBPLLrfSlip_LSB   0x38

Definition at line 480 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_IBPLLrfSlip_RMASK   0x1

Definition at line 481 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_IBSerdesPClkNotDetect_LSB   0x3C

Definition at line 472 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_IBSerdesPClkNotDetect_RMASK   0x1

Definition at line 473 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_OFFS   0xA0

Definition at line 465 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_PCIeBusParity_LSB   0x1F

Definition at line 494 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_PCIeBusParity_RMASK   0x7

Definition at line 495 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_PcieCplTimeout_LSB   0x1E

Definition at line 496 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_PcieCplTimeout_RMASK   0x1

Definition at line 497 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_PCIeMemParity_LSB   0x0

Definition at line 502 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_PCIeMemParity_RMASK   0x3F

Definition at line 503 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_PCIESerdesQ0PClkNotDetect_LSB   0x3B

Definition at line 474 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_PCIESerdesQ0PClkNotDetect_RMASK   0x1

Definition at line 475 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_PCIESerdesQ1PClkNotDetect_LSB   0x3A

Definition at line 476 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_PCIESerdesQ1PClkNotDetect_RMASK   0x1

Definition at line 477 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_PoisenedTLP_LSB   0x1D

Definition at line 498 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_PoisenedTLP_RMASK   0x1

Definition at line 499 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_PowerOnBISTFailed_LSB   0x36

Definition at line 484 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_PowerOnBISTFailed_RMASK   0x1

Definition at line 485 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_Reserved1_LSB   0x39

Definition at line 478 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_Reserved1_RMASK   0x1

Definition at line 479 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_Reserved2_LSB   0x33

Definition at line 486 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_Reserved2_RMASK   0x7

Definition at line 487 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_Reserved3_LSB   0x22

Definition at line 492 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_Reserved3_RMASK   0x3F

Definition at line 493 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_Reserved4_LSB   0x6

Definition at line 500 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_Reserved4_RMASK   0x7FFFFF

Definition at line 501 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_Reserved_LSB   0x3D

Definition at line 470 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_Reserved_RMASK   0x1

Definition at line 471 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_RXEMemParity_LSB   0x2C

Definition at line 488 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_RXEMemParity_RMASK   0x7F

Definition at line 489 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_TXEMemParity_LSB   0x28

Definition at line 490 of file qib_6120_regs.h.

#define QIB_6120_HwErrStatus_TXEMemParity_RMASK   0xF

Definition at line 491 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_CreditScale_LSB   0x28

Definition at line 588 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_CreditScale_RMASK   0x7

Definition at line 589 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_FlowCtrlPeriod_LSB   0x0

Definition at line 604 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_FlowCtrlPeriod_RMASK   0xFF

Definition at line 605 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_FlowCtrlWaterMark_LSB   0x8

Definition at line 602 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_FlowCtrlWaterMark_RMASK   0xFF

Definition at line 603 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_LinkCmd_LSB   0x12

Definition at line 598 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_LinkCmd_RMASK   0x3

Definition at line 599 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_LinkDownDefaultState_LSB   0x3E

Definition at line 584 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_LinkDownDefaultState_RMASK   0x1

Definition at line 585 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_LinkInitCmd_LSB   0x10

Definition at line 600 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_LinkInitCmd_RMASK   0x3

Definition at line 601 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_Loopback_LSB   0x3F

Definition at line 582 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_Loopback_RMASK   0x1

Definition at line 583 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_MaxPktLen_LSB   0x14

Definition at line 596 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_MaxPktLen_RMASK   0x7FF

Definition at line 597 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_OFFS   0xC8

Definition at line 581 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_OverrunThreshold_LSB   0x24

Definition at line 590 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_OverrunThreshold_RMASK   0xF

Definition at line 591 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_PhyerrThreshold_LSB   0x20

Definition at line 592 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_PhyerrThreshold_RMASK   0xF

Definition at line 593 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_Reserved1_LSB   0x1F

Definition at line 594 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_Reserved1_RMASK   0x1

Definition at line 595 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_Reserved_LSB   0x2B

Definition at line 586 of file qib_6120_regs.h.

#define QIB_6120_IBCCtrl_Reserved_RMASK   0x7FFFF

Definition at line 587 of file qib_6120_regs.h.

#define QIB_6120_IBCStatus_LinkState_LSB   0x4

Definition at line 576 of file qib_6120_regs.h.

#define QIB_6120_IBCStatus_LinkState_RMASK   0x7

Definition at line 577 of file qib_6120_regs.h.

#define QIB_6120_IBCStatus_LinkTrainingState_LSB   0x0

Definition at line 578 of file qib_6120_regs.h.

#define QIB_6120_IBCStatus_LinkTrainingState_RMASK   0xF

Definition at line 579 of file qib_6120_regs.h.

#define QIB_6120_IBCStatus_OFFS   0xC0

Definition at line 569 of file qib_6120_regs.h.

#define QIB_6120_IBCStatus_Reserved_LSB   0x7

Definition at line 574 of file qib_6120_regs.h.

#define QIB_6120_IBCStatus_Reserved_RMASK   0x7FFFFF

Definition at line 575 of file qib_6120_regs.h.

#define QIB_6120_IBCStatus_TxCreditOk_LSB   0x1F

Definition at line 570 of file qib_6120_regs.h.

#define QIB_6120_IBCStatus_TxCreditOk_RMASK   0x1

Definition at line 571 of file qib_6120_regs.h.

#define QIB_6120_IBCStatus_TxReady_LSB   0x1E

Definition at line 572 of file qib_6120_regs.h.

#define QIB_6120_IBCStatus_TxReady_RMASK   0x1

Definition at line 573 of file qib_6120_regs.h.

#define QIB_6120_IBLinkDownedCnt_OFFS   0x12150

Definition at line 945 of file qib_6120_regs.h.

#define QIB_6120_IBLinkErrRecoveryCnt_OFFS   0x12148

Definition at line 943 of file qib_6120_regs.h.

#define QIB_6120_IBStatusChangeCnt_OFFS   0x12140

Definition at line 941 of file qib_6120_regs.h.

#define QIB_6120_IBSymbolErrCnt_OFFS   0x12158

Definition at line 947 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_assertGPIOIntBlocked_LSB   0x1C

Definition at line 86 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_assertGPIOIntBlocked_RMASK   0x1

Definition at line 87 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_ErrorIntBlocked_LSB   0x1F

Definition at line 80 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_ErrorIntBlocked_RMASK   0x1

Definition at line 81 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_OFFS   0x60

Definition at line 79 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_PioBufAvailIntBlocked_LSB   0x1D

Definition at line 84 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_PioBufAvailIntBlocked_RMASK   0x1

Definition at line 85 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_PioSetIntBlocked_LSB   0x1E

Definition at line 82 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_PioSetIntBlocked_RMASK   0x1

Definition at line 83 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvAvail0IntBlocked_LSB   0xC

Definition at line 98 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvAvail0IntBlocked_RMASK   0x1

Definition at line 99 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvAvail1IntBlocked_LSB   0xD

Definition at line 96 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvAvail1IntBlocked_RMASK   0x1

Definition at line 97 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvAvail2IntBlocked_LSB   0xE

Definition at line 94 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvAvail2IntBlocked_RMASK   0x1

Definition at line 95 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvAvail3IntBlocked_LSB   0xF

Definition at line 92 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvAvail3IntBlocked_RMASK   0x1

Definition at line 93 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvAvail4IntBlocked_LSB   0x10

Definition at line 90 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvAvail4IntBlocked_RMASK   0x1

Definition at line 91 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvUrg0IntBlocked_LSB   0x0

Definition at line 110 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvUrg0IntBlocked_RMASK   0x1

Definition at line 111 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvUrg1IntBlocked_LSB   0x1

Definition at line 108 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvUrg1IntBlocked_RMASK   0x1

Definition at line 109 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvUrg2IntBlocked_LSB   0x2

Definition at line 106 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvUrg2IntBlocked_RMASK   0x1

Definition at line 107 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvUrg3IntBlocked_LSB   0x3

Definition at line 104 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvUrg3IntBlocked_RMASK   0x1

Definition at line 105 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvUrg4IntBlocked_LSB   0x4

Definition at line 102 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_RcvUrg4IntBlocked_RMASK   0x1

Definition at line 103 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_Reserved1_LSB   0x5

Definition at line 100 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_Reserved1_RMASK   0x7F

Definition at line 101 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_Reserved_LSB   0xF

Definition at line 88 of file qib_6120_regs.h.

#define QIB_6120_IntBlocked_Reserved_RMASK   0x1FFF

Definition at line 89 of file qib_6120_regs.h.

#define QIB_6120_IntClear_assertGPIOIntClear_LSB   0x1C

Definition at line 188 of file qib_6120_regs.h.

#define QIB_6120_IntClear_assertGPIOIntClear_RMASK   0x1

Definition at line 189 of file qib_6120_regs.h.

#define QIB_6120_IntClear_ErrorIntClear_LSB   0x1F

Definition at line 182 of file qib_6120_regs.h.

#define QIB_6120_IntClear_ErrorIntClear_RMASK   0x1

Definition at line 183 of file qib_6120_regs.h.

#define QIB_6120_IntClear_OFFS   0x78

Definition at line 181 of file qib_6120_regs.h.

#define QIB_6120_IntClear_PioBufAvailIntClear_LSB   0x1D

Definition at line 186 of file qib_6120_regs.h.

#define QIB_6120_IntClear_PioBufAvailIntClear_RMASK   0x1

Definition at line 187 of file qib_6120_regs.h.

#define QIB_6120_IntClear_PioSetIntClear_LSB   0x1E

Definition at line 184 of file qib_6120_regs.h.

#define QIB_6120_IntClear_PioSetIntClear_RMASK   0x1

Definition at line 185 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvAvail0IntClear_LSB   0xC

Definition at line 200 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvAvail0IntClear_RMASK   0x1

Definition at line 201 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvAvail1IntClear_LSB   0xD

Definition at line 198 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvAvail1IntClear_RMASK   0x1

Definition at line 199 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvAvail2IntClear_LSB   0xE

Definition at line 196 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvAvail2IntClear_RMASK   0x1

Definition at line 197 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvAvail3IntClear_LSB   0xF

Definition at line 194 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvAvail3IntClear_RMASK   0x1

Definition at line 195 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvAvail4IntClear_LSB   0x10

Definition at line 192 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvAvail4IntClear_RMASK   0x1

Definition at line 193 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvUrg0IntClear_LSB   0x0

Definition at line 212 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvUrg0IntClear_RMASK   0x1

Definition at line 213 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvUrg1IntClear_LSB   0x1

Definition at line 210 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvUrg1IntClear_RMASK   0x1

Definition at line 211 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvUrg2IntClear_LSB   0x2

Definition at line 208 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvUrg2IntClear_RMASK   0x1

Definition at line 209 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvUrg3IntClear_LSB   0x3

Definition at line 206 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvUrg3IntClear_RMASK   0x1

Definition at line 207 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvUrg4IntClear_LSB   0x4

Definition at line 204 of file qib_6120_regs.h.

#define QIB_6120_IntClear_RcvUrg4IntClear_RMASK   0x1

Definition at line 205 of file qib_6120_regs.h.

#define QIB_6120_IntClear_Reserved1_LSB   0x5

Definition at line 202 of file qib_6120_regs.h.

#define QIB_6120_IntClear_Reserved1_RMASK   0x7F

Definition at line 203 of file qib_6120_regs.h.

#define QIB_6120_IntClear_Reserved_LSB   0xF

Definition at line 190 of file qib_6120_regs.h.

#define QIB_6120_IntClear_Reserved_RMASK   0x1FFF

Definition at line 191 of file qib_6120_regs.h.

#define QIB_6120_IntMask_assertGPIOIntMask_LSB   0x1C

Definition at line 120 of file qib_6120_regs.h.

#define QIB_6120_IntMask_assertGPIOIntMask_RMASK   0x1

Definition at line 121 of file qib_6120_regs.h.

#define QIB_6120_IntMask_ErrorIntMask_LSB   0x1F

Definition at line 114 of file qib_6120_regs.h.

#define QIB_6120_IntMask_ErrorIntMask_RMASK   0x1

Definition at line 115 of file qib_6120_regs.h.

#define QIB_6120_IntMask_OFFS   0x68

Definition at line 113 of file qib_6120_regs.h.

#define QIB_6120_IntMask_PioBufAvailIntMask_LSB   0x1D

Definition at line 118 of file qib_6120_regs.h.

#define QIB_6120_IntMask_PioBufAvailIntMask_RMASK   0x1

Definition at line 119 of file qib_6120_regs.h.

#define QIB_6120_IntMask_PioSetIntMask_LSB   0x1E

Definition at line 116 of file qib_6120_regs.h.

#define QIB_6120_IntMask_PioSetIntMask_RMASK   0x1

Definition at line 117 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvAvail0IntMask_LSB   0xC

Definition at line 132 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvAvail0IntMask_RMASK   0x1

Definition at line 133 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvAvail1IntMask_LSB   0xD

Definition at line 130 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvAvail1IntMask_RMASK   0x1

Definition at line 131 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvAvail2IntMask_LSB   0xE

Definition at line 128 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvAvail2IntMask_RMASK   0x1

Definition at line 129 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvAvail3IntMask_LSB   0xF

Definition at line 126 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvAvail3IntMask_RMASK   0x1

Definition at line 127 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvAvail4IntMask_LSB   0x10

Definition at line 124 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvAvail4IntMask_RMASK   0x1

Definition at line 125 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvUrg0IntMask_LSB   0x0

Definition at line 144 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvUrg0IntMask_RMASK   0x1

Definition at line 145 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvUrg1IntMask_LSB   0x1

Definition at line 142 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvUrg1IntMask_RMASK   0x1

Definition at line 143 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvUrg2IntMask_LSB   0x2

Definition at line 140 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvUrg2IntMask_RMASK   0x1

Definition at line 141 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvUrg3IntMask_LSB   0x3

Definition at line 138 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvUrg3IntMask_RMASK   0x1

Definition at line 139 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvUrg4IntMask_LSB   0x4

Definition at line 136 of file qib_6120_regs.h.

#define QIB_6120_IntMask_RcvUrg4IntMask_RMASK   0x1

Definition at line 137 of file qib_6120_regs.h.

#define QIB_6120_IntMask_Reserved1_LSB   0x5

Definition at line 134 of file qib_6120_regs.h.

#define QIB_6120_IntMask_Reserved1_RMASK   0x7F

Definition at line 135 of file qib_6120_regs.h.

#define QIB_6120_IntMask_Reserved_LSB   0x11

Definition at line 122 of file qib_6120_regs.h.

#define QIB_6120_IntMask_Reserved_RMASK   0x7FF

Definition at line 123 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_assertGPIO_LSB   0x1C

Definition at line 154 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_assertGPIO_RMASK   0x1

Definition at line 155 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_Error_LSB   0x1F

Definition at line 148 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_Error_RMASK   0x1

Definition at line 149 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_OFFS   0x70

Definition at line 147 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_PioBufAvail_LSB   0x1D

Definition at line 152 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_PioBufAvail_RMASK   0x1

Definition at line 153 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_PioSent_LSB   0x1E

Definition at line 150 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_PioSent_RMASK   0x1

Definition at line 151 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvAvail0_LSB   0xC

Definition at line 166 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvAvail0_RMASK   0x1

Definition at line 167 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvAvail1_LSB   0xD

Definition at line 164 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvAvail1_RMASK   0x1

Definition at line 165 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvAvail2_LSB   0xE

Definition at line 162 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvAvail2_RMASK   0x1

Definition at line 163 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvAvail3_LSB   0xF

Definition at line 160 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvAvail3_RMASK   0x1

Definition at line 161 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvAvail4_LSB   0x10

Definition at line 158 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvAvail4_RMASK   0x1

Definition at line 159 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvUrg0_LSB   0x0

Definition at line 178 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvUrg0_RMASK   0x1

Definition at line 179 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvUrg1_LSB   0x1

Definition at line 176 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvUrg1_RMASK   0x1

Definition at line 177 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvUrg2_LSB   0x2

Definition at line 174 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvUrg2_RMASK   0x1

Definition at line 175 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvUrg3_LSB   0x3

Definition at line 172 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvUrg3_RMASK   0x1

Definition at line 173 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvUrg4_LSB   0x4

Definition at line 170 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_RcvUrg4_RMASK   0x1

Definition at line 171 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_Reserved1_LSB   0x5

Definition at line 168 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_Reserved1_RMASK   0x7F

Definition at line 169 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_Reserved_LSB   0xF

Definition at line 156 of file qib_6120_regs.h.

#define QIB_6120_IntStatus_Reserved_RMASK   0x1FFF

Definition at line 157 of file qib_6120_regs.h.

#define QIB_6120_LBFlowStallCnt_OFFS   0x12008

Definition at line 885 of file qib_6120_regs.h.

#define QIB_6120_LBIntCnt_OFFS   0x12000

Definition at line 883 of file qib_6120_regs.h.

#define QIB_6120_MiscRXEIntMem_OFFS   0x7C000

Definition at line 969 of file qib_6120_regs.h.

#define QIB_6120_PageAlign_OFFS   0x10

Definition at line 63 of file qib_6120_regs.h.

#define QIB_6120_PCIERcvBuf_OFFS   0x80000

Definition at line 971 of file qib_6120_regs.h.

#define QIB_6120_PCIERcvBufRdToWrAddr_OFFS   0x84000

Definition at line 975 of file qib_6120_regs.h.

#define QIB_6120_PCIERetryBuf_OFFS   0x82000

Definition at line 973 of file qib_6120_regs.h.

#define QIB_6120_PcieRetryBufDiagQwordCnt_OFFS   0x12170

Definition at line 949 of file qib_6120_regs.h.

#define QIB_6120_PIOBuf0_MA_OFFS   0x100000

Definition at line 977 of file qib_6120_regs.h.

#define QIB_6120_PIOLaunchFIFO_OFFS   0x64000

Definition at line 955 of file qib_6120_regs.h.

#define QIB_6120_PortCnt_OFFS   0x18

Definition at line 65 of file qib_6120_regs.h.

#define QIB_6120_RcvBTHQP_BTHQP_Mask_LSB   0x1E

Definition at line 662 of file qib_6120_regs.h.

#define QIB_6120_RcvBTHQP_BTHQP_Mask_RMASK   0x3

Definition at line 663 of file qib_6120_regs.h.

#define QIB_6120_RcvBTHQP_OFFS   0x108

Definition at line 661 of file qib_6120_regs.h.

#define QIB_6120_RcvBTHQP_RcvBTHQP_LSB   0x0

Definition at line 666 of file qib_6120_regs.h.

#define QIB_6120_RcvBTHQP_RcvBTHQP_RMASK   0xFFFFFF

Definition at line 667 of file qib_6120_regs.h.

#define QIB_6120_RcvBTHQP_Reserved_LSB   0x18

Definition at line 664 of file qib_6120_regs.h.

#define QIB_6120_RcvBTHQP_Reserved_RMASK   0x3F

Definition at line 665 of file qib_6120_regs.h.

#define QIB_6120_RcvBuf1_OFFS   0x72000

Definition at line 959 of file qib_6120_regs.h.

#define QIB_6120_RcvBuf2_OFFS   0x75000

Definition at line 961 of file qib_6120_regs.h.

#define QIB_6120_RcvBufBase_OFFS   0x148

Definition at line 683 of file qib_6120_regs.h.

#define QIB_6120_RcvBufSize_OFFS   0x150

Definition at line 685 of file qib_6120_regs.h.

#define QIB_6120_RcvCtrl_IntrAvail_LSB   0x10

Definition at line 652 of file qib_6120_regs.h.

#define QIB_6120_RcvCtrl_IntrAvail_RMASK   0x1F

Definition at line 653 of file qib_6120_regs.h.

#define QIB_6120_RcvCtrl_OFFS   0x100

Definition at line 645 of file qib_6120_regs.h.

#define QIB_6120_RcvCtrl_PortEnable_LSB   0x0

Definition at line 658 of file qib_6120_regs.h.

#define QIB_6120_RcvCtrl_PortEnable_RMASK   0x1F

Definition at line 659 of file qib_6120_regs.h.

#define QIB_6120_RcvCtrl_RcvPartitionKeyDisable_LSB   0x1E

Definition at line 648 of file qib_6120_regs.h.

#define QIB_6120_RcvCtrl_RcvPartitionKeyDisable_RMASK   0x1

Definition at line 649 of file qib_6120_regs.h.

#define QIB_6120_RcvCtrl_Reserved1_LSB   0x9

Definition at line 654 of file qib_6120_regs.h.

#define QIB_6120_RcvCtrl_Reserved1_RMASK   0x7F

Definition at line 655 of file qib_6120_regs.h.

#define QIB_6120_RcvCtrl_Reserved2_LSB   0x5

Definition at line 656 of file qib_6120_regs.h.

#define QIB_6120_RcvCtrl_Reserved2_RMASK   0xF

Definition at line 657 of file qib_6120_regs.h.

#define QIB_6120_RcvCtrl_Reserved_LSB   0x15

Definition at line 650 of file qib_6120_regs.h.

#define QIB_6120_RcvCtrl_Reserved_RMASK   0x1FF

Definition at line 651 of file qib_6120_regs.h.

#define QIB_6120_RcvCtrl_TailUpd_LSB   0x1F

Definition at line 646 of file qib_6120_regs.h.

#define QIB_6120_RcvCtrl_TailUpd_RMASK   0x1

Definition at line 647 of file qib_6120_regs.h.

#define QIB_6120_RcvDMABuf_OFFS   0x7B000

Definition at line 967 of file qib_6120_regs.h.

#define QIB_6120_RcvEgrArray0_OFFS   0x14000

Definition at line 951 of file qib_6120_regs.h.

#define QIB_6120_RcvEgrBase_OFFS   0x138

Definition at line 679 of file qib_6120_regs.h.

#define QIB_6120_RcvEgrCnt_OFFS   0x140

Definition at line 681 of file qib_6120_regs.h.

#define QIB_6120_RcvFlags_OFFS   0x77000

Definition at line 963 of file qib_6120_regs.h.

#define QIB_6120_RcvHdrAddr0_OFFS   0x280

Definition at line 757 of file qib_6120_regs.h.

#define QIB_6120_RcvHdrAddr0_RcvHdrAddr0_LSB   0x2

Definition at line 758 of file qib_6120_regs.h.

#define QIB_6120_RcvHdrAddr0_RcvHdrAddr0_RMASK   0x3FFFFFFFFF

Definition at line 759 of file qib_6120_regs.h.

#define QIB_6120_RcvHdrAddr0_Reserved_LSB   0x0

Definition at line 760 of file qib_6120_regs.h.

#define QIB_6120_RcvHdrAddr0_Reserved_RMASK   0x3

Definition at line 761 of file qib_6120_regs.h.

#define QIB_6120_RcvHdrCnt_OFFS   0x118

Definition at line 671 of file qib_6120_regs.h.

#define QIB_6120_RcvHdrEntSize_OFFS   0x120

Definition at line 673 of file qib_6120_regs.h.

#define QIB_6120_RcvHdrSize_OFFS   0x110

Definition at line 669 of file qib_6120_regs.h.

#define QIB_6120_RcvHdrTailAddr0_OFFS   0x300

Definition at line 763 of file qib_6120_regs.h.

#define QIB_6120_RcvHdrTailAddr0_RcvHdrTailAddr0_LSB   0x2

Definition at line 764 of file qib_6120_regs.h.

#define QIB_6120_RcvHdrTailAddr0_RcvHdrTailAddr0_RMASK   0x3FFFFFFFFF

Definition at line 765 of file qib_6120_regs.h.

#define QIB_6120_RcvHdrTailAddr0_Reserved_LSB   0x0

Definition at line 766 of file qib_6120_regs.h.

#define QIB_6120_RcvHdrTailAddr0_Reserved_RMASK   0x3

Definition at line 767 of file qib_6120_regs.h.

#define QIB_6120_RcvLookupBuf1_OFFS   0x79000

Definition at line 965 of file qib_6120_regs.h.

#define QIB_6120_RcvPartitionKey_OFFS   0x168

Definition at line 691 of file qib_6120_regs.h.

#define QIB_6120_RcvPktLEDCnt_OFFperiod_LSB   0x0

Definition at line 696 of file qib_6120_regs.h.

#define QIB_6120_RcvPktLEDCnt_OFFperiod_RMASK   0xFFFFFFFF

Definition at line 697 of file qib_6120_regs.h.

#define QIB_6120_RcvPktLEDCnt_OFFS   0x178

Definition at line 693 of file qib_6120_regs.h.

#define QIB_6120_RcvPktLEDCnt_ONperiod_LSB   0x20

Definition at line 694 of file qib_6120_regs.h.

#define QIB_6120_RcvPktLEDCnt_ONperiod_RMASK   0xFFFFFFFF

Definition at line 695 of file qib_6120_regs.h.

#define QIB_6120_RcvTIDArray0_OFFS   0x54000

Definition at line 953 of file qib_6120_regs.h.

#define QIB_6120_RcvTIDBase_OFFS   0x128

Definition at line 675 of file qib_6120_regs.h.

#define QIB_6120_RcvTIDCnt_OFFS   0x130

Definition at line 677 of file qib_6120_regs.h.

#define QIB_6120_Revision_BoardID_LSB   0x20

Definition at line 40 of file qib_6120_regs.h.

#define QIB_6120_Revision_BoardID_RMASK   0xFF

Definition at line 41 of file qib_6120_regs.h.

#define QIB_6120_Revision_OFFS   0x0

Definition at line 35 of file qib_6120_regs.h.

#define QIB_6120_Revision_R_Arch_LSB   0x10

Definition at line 44 of file qib_6120_regs.h.

#define QIB_6120_Revision_R_Arch_RMASK   0xFF

Definition at line 45 of file qib_6120_regs.h.

#define QIB_6120_Revision_R_ChipRevMajor_LSB   0x8

Definition at line 46 of file qib_6120_regs.h.

#define QIB_6120_Revision_R_ChipRevMajor_RMASK   0xFF

Definition at line 47 of file qib_6120_regs.h.

#define QIB_6120_Revision_R_ChipRevMinor_LSB   0x0

Definition at line 48 of file qib_6120_regs.h.

#define QIB_6120_Revision_R_ChipRevMinor_RMASK   0xFF

Definition at line 49 of file qib_6120_regs.h.

#define QIB_6120_Revision_R_Simulator_LSB   0x3F

Definition at line 36 of file qib_6120_regs.h.

#define QIB_6120_Revision_R_Simulator_RMASK   0x1

Definition at line 37 of file qib_6120_regs.h.

#define QIB_6120_Revision_R_SW_LSB   0x18

Definition at line 42 of file qib_6120_regs.h.

#define QIB_6120_Revision_R_SW_RMASK   0xFF

Definition at line 43 of file qib_6120_regs.h.

#define QIB_6120_Revision_Reserved_LSB   0x28

Definition at line 38 of file qib_6120_regs.h.

#define QIB_6120_Revision_Reserved_RMASK   0x7FFFFF

Definition at line 39 of file qib_6120_regs.h.

#define QIB_6120_RxBadFormatCnt_OFFS   0x120A8

Definition at line 923 of file qib_6120_regs.h.

#define QIB_6120_RxBufOvflCnt_OFFS   0x120C8

Definition at line 931 of file qib_6120_regs.h.

#define QIB_6120_RxDataPktCnt_OFFS   0x12068

Definition at line 907 of file qib_6120_regs.h.

#define QIB_6120_RxDroppedPktCnt_OFFS   0x12060

Definition at line 905 of file qib_6120_regs.h.

#define QIB_6120_RxDwordCnt_OFFS   0x12078

Definition at line 911 of file qib_6120_regs.h.

#define QIB_6120_RxEBPCnt_OFFS   0x120B8

Definition at line 927 of file qib_6120_regs.h.

#define QIB_6120_RxFlowCtrlErrCnt_OFFS   0x120A0

Definition at line 921 of file qib_6120_regs.h.

#define QIB_6120_RxFlowPktCnt_OFFS   0x12070

Definition at line 909 of file qib_6120_regs.h.

#define QIB_6120_RxICRCErrCnt_OFFS   0x12090

Definition at line 917 of file qib_6120_regs.h.

#define QIB_6120_RxIntMemBase_OFFS   0x158

Definition at line 687 of file qib_6120_regs.h.

#define QIB_6120_RxIntMemSize_OFFS   0x160

Definition at line 689 of file qib_6120_regs.h.

#define QIB_6120_RxLenErrCnt_OFFS   0x12080

Definition at line 913 of file qib_6120_regs.h.

#define QIB_6120_RxLinkProblemCnt_OFFS   0x120B0

Definition at line 925 of file qib_6120_regs.h.

#define QIB_6120_RxLPCRCErrCnt_OFFS   0x120C0

Definition at line 929 of file qib_6120_regs.h.

#define QIB_6120_RxMaxMinLenErrCnt_OFFS   0x12088

Definition at line 915 of file qib_6120_regs.h.

#define QIB_6120_RxP0HdrEgrOvflCnt_OFFS   0x120E8

Definition at line 939 of file qib_6120_regs.h.

#define QIB_6120_RxPKeyMismatchCnt_OFFS   0x120E0

Definition at line 937 of file qib_6120_regs.h.

#define QIB_6120_RxTIDFullErrCnt_OFFS   0x120D0

Definition at line 933 of file qib_6120_regs.h.

#define QIB_6120_RxTIDValidErrCnt_OFFS   0x120D8

Definition at line 935 of file qib_6120_regs.h.

#define QIB_6120_RxVCRCErrCnt_OFFS   0x12098

Definition at line 919 of file qib_6120_regs.h.

#define QIB_6120_Scratch_BottomHalf_LSB   0x0

Definition at line 76 of file qib_6120_regs.h.

#define QIB_6120_Scratch_BottomHalf_RMASK   0xFFFFFFFF

Definition at line 77 of file qib_6120_regs.h.

#define QIB_6120_Scratch_OFFS   0x48

Definition at line 73 of file qib_6120_regs.h.

#define QIB_6120_Scratch_TopHalf_LSB   0x20

Definition at line 74 of file qib_6120_regs.h.

#define QIB_6120_Scratch_TopHalf_RMASK   0xFFFFFFFF

Definition at line 75 of file qib_6120_regs.h.

#define QIB_6120_SendBufErr0_OFFS   0x240

Definition at line 753 of file qib_6120_regs.h.

#define QIB_6120_SendBufErr0_SendBufErrPIO_63_0_LSB   0x0

Definition at line 754 of file qib_6120_regs.h.

#define QIB_6120_SendBufErr0_SendBufErrPIO_63_0_RMASK   0x0

Definition at line 755 of file qib_6120_regs.h.

#define QIB_6120_SendCtrl_Abort_LSB   0x0

Definition at line 714 of file qib_6120_regs.h.

#define QIB_6120_SendCtrl_Abort_RMASK   0x1

Definition at line 715 of file qib_6120_regs.h.

#define QIB_6120_SendCtrl_Disarm_LSB   0x1F

Definition at line 700 of file qib_6120_regs.h.

#define QIB_6120_SendCtrl_Disarm_RMASK   0x1

Definition at line 701 of file qib_6120_regs.h.

#define QIB_6120_SendCtrl_DisarmPIOBuf_LSB   0x10

Definition at line 704 of file qib_6120_regs.h.

#define QIB_6120_SendCtrl_DisarmPIOBuf_RMASK   0x7F

Definition at line 705 of file qib_6120_regs.h.

#define QIB_6120_SendCtrl_OFFS   0x1C0

Definition at line 699 of file qib_6120_regs.h.

#define QIB_6120_SendCtrl_PIOBufAvailUpd_LSB   0x2

Definition at line 710 of file qib_6120_regs.h.

#define QIB_6120_SendCtrl_PIOBufAvailUpd_RMASK   0x1

Definition at line 711 of file qib_6120_regs.h.

#define QIB_6120_SendCtrl_PIOEnable_LSB   0x3

Definition at line 708 of file qib_6120_regs.h.

#define QIB_6120_SendCtrl_PIOEnable_RMASK   0x1

Definition at line 709 of file qib_6120_regs.h.

#define QIB_6120_SendCtrl_PIOIntBufAvail_LSB   0x1

Definition at line 712 of file qib_6120_regs.h.

#define QIB_6120_SendCtrl_PIOIntBufAvail_RMASK   0x1

Definition at line 713 of file qib_6120_regs.h.

#define QIB_6120_SendCtrl_Reserved1_LSB   0x4

Definition at line 706 of file qib_6120_regs.h.

#define QIB_6120_SendCtrl_Reserved1_RMASK   0xFFF

Definition at line 707 of file qib_6120_regs.h.

#define QIB_6120_SendCtrl_Reserved_LSB   0x17

Definition at line 702 of file qib_6120_regs.h.

#define QIB_6120_SendCtrl_Reserved_RMASK   0xFF

Definition at line 703 of file qib_6120_regs.h.

#define QIB_6120_SendPIOAvailAddr_OFFS   0x1E0

Definition at line 747 of file qib_6120_regs.h.

#define QIB_6120_SendPIOAvailAddr_Reserved_LSB   0x0

Definition at line 750 of file qib_6120_regs.h.

#define QIB_6120_SendPIOAvailAddr_Reserved_RMASK   0x3F

Definition at line 751 of file qib_6120_regs.h.

#define QIB_6120_SendPIOAvailAddr_SendPIOAvailAddr_LSB   0x6

Definition at line 748 of file qib_6120_regs.h.

#define QIB_6120_SendPIOAvailAddr_SendPIOAvailAddr_RMASK   0x3FFFFFFFF

Definition at line 749 of file qib_6120_regs.h.

#define QIB_6120_SendPIOBufBase_BaseAddr_LargePIO_LSB   0x20

Definition at line 720 of file qib_6120_regs.h.

#define QIB_6120_SendPIOBufBase_BaseAddr_LargePIO_RMASK   0x1FFFFF

Definition at line 721 of file qib_6120_regs.h.

#define QIB_6120_SendPIOBufBase_BaseAddr_SmallPIO_LSB   0x0

Definition at line 724 of file qib_6120_regs.h.

#define QIB_6120_SendPIOBufBase_BaseAddr_SmallPIO_RMASK   0x1FFFFF

Definition at line 725 of file qib_6120_regs.h.

#define QIB_6120_SendPIOBufBase_OFFS   0x1C8

Definition at line 717 of file qib_6120_regs.h.

#define QIB_6120_SendPIOBufBase_Reserved1_LSB   0x15

Definition at line 722 of file qib_6120_regs.h.

#define QIB_6120_SendPIOBufBase_Reserved1_RMASK   0x7FF

Definition at line 723 of file qib_6120_regs.h.

#define QIB_6120_SendPIOBufBase_Reserved_LSB   0x35

Definition at line 718 of file qib_6120_regs.h.

#define QIB_6120_SendPIOBufBase_Reserved_RMASK   0x7FF

Definition at line 719 of file qib_6120_regs.h.

#define QIB_6120_SendPIOBufCnt_Num_LargePIO_LSB   0x20

Definition at line 740 of file qib_6120_regs.h.

#define QIB_6120_SendPIOBufCnt_Num_LargePIO_RMASK   0xF

Definition at line 741 of file qib_6120_regs.h.

#define QIB_6120_SendPIOBufCnt_Num_SmallPIO_LSB   0x0

Definition at line 744 of file qib_6120_regs.h.

#define QIB_6120_SendPIOBufCnt_Num_SmallPIO_RMASK   0x1FF

Definition at line 745 of file qib_6120_regs.h.

#define QIB_6120_SendPIOBufCnt_OFFS   0x1D8

Definition at line 737 of file qib_6120_regs.h.

#define QIB_6120_SendPIOBufCnt_Reserved1_LSB   0x9

Definition at line 742 of file qib_6120_regs.h.

#define QIB_6120_SendPIOBufCnt_Reserved1_RMASK   0x7FFFFF

Definition at line 743 of file qib_6120_regs.h.

#define QIB_6120_SendPIOBufCnt_Reserved_LSB   0x24

Definition at line 738 of file qib_6120_regs.h.

#define QIB_6120_SendPIOBufCnt_Reserved_RMASK   0xFFFFFFF

Definition at line 739 of file qib_6120_regs.h.

#define QIB_6120_SendPIOpbcCache_OFFS   0x64800

Definition at line 957 of file qib_6120_regs.h.

#define QIB_6120_SendPIOSize_OFFS   0x1D0

Definition at line 727 of file qib_6120_regs.h.

#define QIB_6120_SendPIOSize_Reserved1_LSB   0xC

Definition at line 732 of file qib_6120_regs.h.

#define QIB_6120_SendPIOSize_Reserved1_RMASK   0xFFFFF

Definition at line 733 of file qib_6120_regs.h.

#define QIB_6120_SendPIOSize_Reserved_LSB   0x2D

Definition at line 728 of file qib_6120_regs.h.

#define QIB_6120_SendPIOSize_Reserved_RMASK   0xFFFFF

Definition at line 729 of file qib_6120_regs.h.

#define QIB_6120_SendPIOSize_Size_LargePIO_LSB   0x20

Definition at line 730 of file qib_6120_regs.h.

#define QIB_6120_SendPIOSize_Size_LargePIO_RMASK   0x1FFF

Definition at line 731 of file qib_6120_regs.h.

#define QIB_6120_SendPIOSize_Size_SmallPIO_LSB   0x0

Definition at line 734 of file qib_6120_regs.h.

#define QIB_6120_SendPIOSize_Size_SmallPIO_RMASK   0xFFF

Definition at line 735 of file qib_6120_regs.h.

#define QIB_6120_SendRegBase_OFFS   0x30

Definition at line 67 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_BeaconTxEnX_LSB   0x14

Definition at line 810 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_BeaconTxEnX_RMASK   0xF

Definition at line 811 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_DisableIBTxIdleDetect_LSB   0x3F

Definition at line 770 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_DisableIBTxIdleDetect_RMASK   0x1

Definition at line 771 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_L1PwrDnA_LSB   0x7

Definition at line 818 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_L1PwrDnA_RMASK   0x1

Definition at line 819 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_L1PwrDnB_LSB   0x6

Definition at line 820 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_L1PwrDnB_RMASK   0x1

Definition at line 821 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_L1PwrDnC_LSB   0x5

Definition at line 822 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_L1PwrDnC_RMASK   0x1

Definition at line 823 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_L1PwrDnD_LSB   0x4

Definition at line 824 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_L1PwrDnD_RMASK   0x1

Definition at line 825 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_L2PwrDn_LSB   0x1D

Definition at line 804 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_L2PwrDn_RMASK   0x1

Definition at line 805 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_LPBKA_LSB   0x2F

Definition at line 784 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_LPBKA_RMASK   0x1

Definition at line 785 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_LPBKB_LSB   0x2E

Definition at line 786 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_LPBKB_RMASK   0x1

Definition at line 787 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_LPBKC_LSB   0x2D

Definition at line 788 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_LPBKC_RMASK   0x1

Definition at line 789 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_LPBKD_LSB   0x2C

Definition at line 790 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_LPBKD_RMASK   0x1

Definition at line 791 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_OFFS   0x3C0

Definition at line 769 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_Offset_LSB   0x1E

Definition at line 802 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_Offset_RMASK   0xFF

Definition at line 803 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_OffsetEn_LSB   0x26

Definition at line 800 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_OffsetEn_RMASK   0x1

Definition at line 801 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_ParLPBK_LSB   0x27

Definition at line 798 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_ParLPBK_RMASK   0x1

Definition at line 799 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_ParReset_LSB   0x28

Definition at line 796 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_ParReset_RMASK   0x1

Definition at line 797 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_PW_LSB   0x2B

Definition at line 792 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_PW_RMASK   0x1

Definition at line 793 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_RefSel_LSB   0x29

Definition at line 794 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_RefSel_RMASK   0x3

Definition at line 795 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_Reserved_LSB   0x38

Definition at line 772 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_Reserved_RMASK   0x7F

Definition at line 773 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_ResetA_LSB   0x3

Definition at line 826 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_ResetA_RMASK   0x1

Definition at line 827 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_ResetB_LSB   0x2

Definition at line 828 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_ResetB_RMASK   0x1

Definition at line 829 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_ResetC_LSB   0x1

Definition at line 830 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_ResetC_RMASK   0x1

Definition at line 831 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_ResetD_LSB   0x0

Definition at line 832 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_ResetD_RMASK   0x1

Definition at line 833 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_ResetPLL_LSB   0x1C

Definition at line 806 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_ResetPLL_RMASK   0x1

Definition at line 807 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_RxDetEnX_LSB   0x10

Definition at line 812 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_RxDetEnX_RMASK   0xF

Definition at line 813 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_RxEqCtl_LSB   0x36

Definition at line 774 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_RxEqCtl_RMASK   0x3

Definition at line 775 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_RxIdleEnX_LSB   0x8

Definition at line 816 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_RxIdleEnX_RMASK   0xF

Definition at line 817 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_RxTermAdj_LSB   0x32

Definition at line 778 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_RxTermAdj_RMASK   0x3

Definition at line 779 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_RxTermEnX_LSB   0x18

Definition at line 808 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_RxTermEnX_RMASK   0xF

Definition at line 809 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_TermAdj0_LSB   0x30

Definition at line 782 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_TermAdj0_RMASK   0x1

Definition at line 783 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_TermAdj1_LSB   0x31

Definition at line 780 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_TermAdj1_RMASK   0x1

Definition at line 781 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_TxIdeEnX_LSB   0xC

Definition at line 814 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_TxIdeEnX_RMASK   0xF

Definition at line 815 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_TxTermAdj_LSB   0x34

Definition at line 776 of file qib_6120_regs.h.

#define QIB_6120_SerdesCfg0_TxTermAdj_RMASK   0x3

Definition at line 777 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_BeaconDetA_LSB   0xB

Definition at line 838 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_BeaconDetA_RMASK   0x1

Definition at line 839 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_BeaconDetB_LSB   0xA

Definition at line 840 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_BeaconDetB_RMASK   0x1

Definition at line 841 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_BeaconDetC_LSB   0x9

Definition at line 842 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_BeaconDetC_RMASK   0x1

Definition at line 843 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_BeaconDetD_LSB   0x8

Definition at line 844 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_BeaconDetD_RMASK   0x1

Definition at line 845 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_OFFS   0x3D0

Definition at line 835 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_Reserved_LSB   0xC

Definition at line 836 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_Reserved_RMASK   0xFFFFFFFFFFFFF

Definition at line 837 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_RxDetA_LSB   0x7

Definition at line 846 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_RxDetA_RMASK   0x1

Definition at line 847 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_RxDetB_LSB   0x6

Definition at line 848 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_RxDetB_RMASK   0x1

Definition at line 849 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_RxDetC_LSB   0x5

Definition at line 850 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_RxDetC_RMASK   0x1

Definition at line 851 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_RxDetD_LSB   0x4

Definition at line 852 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_RxDetD_RMASK   0x1

Definition at line 853 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_TxIdleDetA_LSB   0x3

Definition at line 854 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_TxIdleDetA_RMASK   0x1

Definition at line 855 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_TxIdleDetB_LSB   0x2

Definition at line 856 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_TxIdleDetB_RMASK   0x1

Definition at line 857 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_TxIdleDetC_LSB   0x1

Definition at line 858 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_TxIdleDetC_RMASK   0x1

Definition at line 859 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_TxIdleDetD_LSB   0x0

Definition at line 860 of file qib_6120_regs.h.

#define QIB_6120_SerdesStat_TxIdleDetD_RMASK   0x1

Definition at line 861 of file qib_6120_regs.h.

#define QIB_6120_TxDataPktCnt_OFFS   0x12020

Definition at line 889 of file qib_6120_regs.h.

#define QIB_6120_TxDroppedPktCnt_OFFS   0x12058

Definition at line 903 of file qib_6120_regs.h.

#define QIB_6120_TxDwordCnt_OFFS   0x12030

Definition at line 893 of file qib_6120_regs.h.

#define QIB_6120_TxFlowPktCnt_OFFS   0x12028

Definition at line 891 of file qib_6120_regs.h.

#define QIB_6120_TxFlowStallCnt_OFFS   0x12050

Definition at line 901 of file qib_6120_regs.h.

#define QIB_6120_TxLenErrCnt_OFFS   0x12038

Definition at line 895 of file qib_6120_regs.h.

#define QIB_6120_TxMaxMinLenErrCnt_OFFS   0x12040

Definition at line 897 of file qib_6120_regs.h.

#define QIB_6120_TxUnderrunCnt_OFFS   0x12048

Definition at line 899 of file qib_6120_regs.h.

#define QIB_6120_TxUnsupVLErrCnt_OFFS   0x12018

Definition at line 887 of file qib_6120_regs.h.

#define QIB_6120_UserRegBase_OFFS   0x38

Definition at line 69 of file qib_6120_regs.h.

#define QIB_6120_XGXSCfg_ArmLaunchErrorDisable_LSB   0x3F

Definition at line 864 of file qib_6120_regs.h.

#define QIB_6120_XGXSCfg_ArmLaunchErrorDisable_RMASK   0x1

Definition at line 865 of file qib_6120_regs.h.

#define QIB_6120_XGXSCfg_link_sync_mask_LSB   0x9

Definition at line 870 of file qib_6120_regs.h.

#define QIB_6120_XGXSCfg_link_sync_mask_RMASK   0x3FF

Definition at line 871 of file qib_6120_regs.h.

#define QIB_6120_XGXSCfg_mdd_30_LSB   0x3

Definition at line 874 of file qib_6120_regs.h.

#define QIB_6120_XGXSCfg_mdd_30_RMASK   0x1

Definition at line 875 of file qib_6120_regs.h.

#define QIB_6120_XGXSCfg_OFFS   0x3D8

Definition at line 863 of file qib_6120_regs.h.

#define QIB_6120_XGXSCfg_polarity_inv_LSB   0x13

Definition at line 868 of file qib_6120_regs.h.

#define QIB_6120_XGXSCfg_polarity_inv_RMASK   0xF

Definition at line 869 of file qib_6120_regs.h.

#define QIB_6120_XGXSCfg_port_addr_LSB   0x4

Definition at line 872 of file qib_6120_regs.h.

#define QIB_6120_XGXSCfg_port_addr_RMASK   0x1F

Definition at line 873 of file qib_6120_regs.h.

#define QIB_6120_XGXSCfg_Reserved1_LSB   0x1

Definition at line 878 of file qib_6120_regs.h.

#define QIB_6120_XGXSCfg_Reserved1_RMASK   0x1

Definition at line 879 of file qib_6120_regs.h.

#define QIB_6120_XGXSCfg_Reserved_LSB   0x17

Definition at line 866 of file qib_6120_regs.h.

#define QIB_6120_XGXSCfg_Reserved_RMASK   0xFFFFFFFFFF

Definition at line 867 of file qib_6120_regs.h.

#define QIB_6120_XGXSCfg_tx_rx_resetn_LSB   0x0

Definition at line 880 of file qib_6120_regs.h.

#define QIB_6120_XGXSCfg_tx_rx_resetn_RMASK   0x1

Definition at line 881 of file qib_6120_regs.h.

#define QIB_6120_XGXSCfg_xcv_resetn_LSB   0x2

Definition at line 876 of file qib_6120_regs.h.

#define QIB_6120_XGXSCfg_xcv_resetn_RMASK   0x1

Definition at line 877 of file qib_6120_regs.h.

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