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Macros
qib_7322_regs.h File Reference

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Macros

#define QIB_7322_Revision_OFFS   0x0
 
#define QIB_7322_Revision_DEF   0x0000000002010601
 
#define QIB_7322_Revision_R_Simulator_LSB   0x3F
 
#define QIB_7322_Revision_R_Simulator_MSB   0x3F
 
#define QIB_7322_Revision_R_Simulator_RMASK   0x1
 
#define QIB_7322_Revision_R_Emulation_LSB   0x3E
 
#define QIB_7322_Revision_R_Emulation_MSB   0x3E
 
#define QIB_7322_Revision_R_Emulation_RMASK   0x1
 
#define QIB_7322_Revision_R_Emulation_Revcode_LSB   0x28
 
#define QIB_7322_Revision_R_Emulation_Revcode_MSB   0x3D
 
#define QIB_7322_Revision_R_Emulation_Revcode_RMASK   0x3FFFFF
 
#define QIB_7322_Revision_BoardID_LSB   0x20
 
#define QIB_7322_Revision_BoardID_MSB   0x27
 
#define QIB_7322_Revision_BoardID_RMASK   0xFF
 
#define QIB_7322_Revision_R_SW_LSB   0x18
 
#define QIB_7322_Revision_R_SW_MSB   0x1F
 
#define QIB_7322_Revision_R_SW_RMASK   0xFF
 
#define QIB_7322_Revision_R_Arch_LSB   0x10
 
#define QIB_7322_Revision_R_Arch_MSB   0x17
 
#define QIB_7322_Revision_R_Arch_RMASK   0xFF
 
#define QIB_7322_Revision_R_ChipRevMajor_LSB   0x8
 
#define QIB_7322_Revision_R_ChipRevMajor_MSB   0xF
 
#define QIB_7322_Revision_R_ChipRevMajor_RMASK   0xFF
 
#define QIB_7322_Revision_R_ChipRevMinor_LSB   0x0
 
#define QIB_7322_Revision_R_ChipRevMinor_MSB   0x7
 
#define QIB_7322_Revision_R_ChipRevMinor_RMASK   0xFF
 
#define QIB_7322_Control_OFFS   0x8
 
#define QIB_7322_Control_DEF   0x0000000000000000
 
#define QIB_7322_Control_PCIECplQDiagEn_LSB   0x6
 
#define QIB_7322_Control_PCIECplQDiagEn_MSB   0x6
 
#define QIB_7322_Control_PCIECplQDiagEn_RMASK   0x1
 
#define QIB_7322_Control_PCIEPostQDiagEn_LSB   0x5
 
#define QIB_7322_Control_PCIEPostQDiagEn_MSB   0x5
 
#define QIB_7322_Control_PCIEPostQDiagEn_RMASK   0x1
 
#define QIB_7322_Control_SDmaDescFetchPriorityEn_LSB   0x4
 
#define QIB_7322_Control_SDmaDescFetchPriorityEn_MSB   0x4
 
#define QIB_7322_Control_SDmaDescFetchPriorityEn_RMASK   0x1
 
#define QIB_7322_Control_PCIERetryBufDiagEn_LSB   0x3
 
#define QIB_7322_Control_PCIERetryBufDiagEn_MSB   0x3
 
#define QIB_7322_Control_PCIERetryBufDiagEn_RMASK   0x1
 
#define QIB_7322_Control_FreezeMode_LSB   0x1
 
#define QIB_7322_Control_FreezeMode_MSB   0x1
 
#define QIB_7322_Control_FreezeMode_RMASK   0x1
 
#define QIB_7322_Control_SyncReset_LSB   0x0
 
#define QIB_7322_Control_SyncReset_MSB   0x0
 
#define QIB_7322_Control_SyncReset_RMASK   0x1
 
#define QIB_7322_PageAlign_OFFS   0x10
 
#define QIB_7322_PageAlign_DEF   0x0000000000001000
 
#define QIB_7322_ContextCnt_OFFS   0x18
 
#define QIB_7322_ContextCnt_DEF   0x0000000000000012
 
#define QIB_7322_Scratch_OFFS   0x20
 
#define QIB_7322_Scratch_DEF   0x0000000000000000
 
#define QIB_7322_CntrRegBase_OFFS   0x28
 
#define QIB_7322_CntrRegBase_DEF   0x0000000000011000
 
#define QIB_7322_SendRegBase_OFFS   0x30
 
#define QIB_7322_SendRegBase_DEF   0x0000000000003000
 
#define QIB_7322_UserRegBase_OFFS   0x38
 
#define QIB_7322_UserRegBase_DEF   0x0000000000200000
 
#define QIB_7322_IntMask_OFFS   0x68
 
#define QIB_7322_IntMask_DEF   0x0000000000000000
 
#define QIB_7322_IntMask_SDmaIntMask_1_LSB   0x3F
 
#define QIB_7322_IntMask_SDmaIntMask_1_MSB   0x3F
 
#define QIB_7322_IntMask_SDmaIntMask_1_RMASK   0x1
 
#define QIB_7322_IntMask_SDmaIntMask_0_LSB   0x3E
 
#define QIB_7322_IntMask_SDmaIntMask_0_MSB   0x3E
 
#define QIB_7322_IntMask_SDmaIntMask_0_RMASK   0x1
 
#define QIB_7322_IntMask_SDmaProgressIntMask_1_LSB   0x3D
 
#define QIB_7322_IntMask_SDmaProgressIntMask_1_MSB   0x3D
 
#define QIB_7322_IntMask_SDmaProgressIntMask_1_RMASK   0x1
 
#define QIB_7322_IntMask_SDmaProgressIntMask_0_LSB   0x3C
 
#define QIB_7322_IntMask_SDmaProgressIntMask_0_MSB   0x3C
 
#define QIB_7322_IntMask_SDmaProgressIntMask_0_RMASK   0x1
 
#define QIB_7322_IntMask_SDmaIdleIntMask_1_LSB   0x3B
 
#define QIB_7322_IntMask_SDmaIdleIntMask_1_MSB   0x3B
 
#define QIB_7322_IntMask_SDmaIdleIntMask_1_RMASK   0x1
 
#define QIB_7322_IntMask_SDmaIdleIntMask_0_LSB   0x3A
 
#define QIB_7322_IntMask_SDmaIdleIntMask_0_MSB   0x3A
 
#define QIB_7322_IntMask_SDmaIdleIntMask_0_RMASK   0x1
 
#define QIB_7322_IntMask_SDmaCleanupDoneMask_1_LSB   0x39
 
#define QIB_7322_IntMask_SDmaCleanupDoneMask_1_MSB   0x39
 
#define QIB_7322_IntMask_SDmaCleanupDoneMask_1_RMASK   0x1
 
#define QIB_7322_IntMask_SDmaCleanupDoneMask_0_LSB   0x38
 
#define QIB_7322_IntMask_SDmaCleanupDoneMask_0_MSB   0x38
 
#define QIB_7322_IntMask_SDmaCleanupDoneMask_0_RMASK   0x1
 
#define QIB_7322_IntMask_RcvUrg17IntMask_LSB   0x31
 
#define QIB_7322_IntMask_RcvUrg17IntMask_MSB   0x31
 
#define QIB_7322_IntMask_RcvUrg17IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvUrg16IntMask_LSB   0x30
 
#define QIB_7322_IntMask_RcvUrg16IntMask_MSB   0x30
 
#define QIB_7322_IntMask_RcvUrg16IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvUrg15IntMask_LSB   0x2F
 
#define QIB_7322_IntMask_RcvUrg15IntMask_MSB   0x2F
 
#define QIB_7322_IntMask_RcvUrg15IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvUrg14IntMask_LSB   0x2E
 
#define QIB_7322_IntMask_RcvUrg14IntMask_MSB   0x2E
 
#define QIB_7322_IntMask_RcvUrg14IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvUrg13IntMask_LSB   0x2D
 
#define QIB_7322_IntMask_RcvUrg13IntMask_MSB   0x2D
 
#define QIB_7322_IntMask_RcvUrg13IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvUrg12IntMask_LSB   0x2C
 
#define QIB_7322_IntMask_RcvUrg12IntMask_MSB   0x2C
 
#define QIB_7322_IntMask_RcvUrg12IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvUrg11IntMask_LSB   0x2B
 
#define QIB_7322_IntMask_RcvUrg11IntMask_MSB   0x2B
 
#define QIB_7322_IntMask_RcvUrg11IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvUrg10IntMask_LSB   0x2A
 
#define QIB_7322_IntMask_RcvUrg10IntMask_MSB   0x2A
 
#define QIB_7322_IntMask_RcvUrg10IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvUrg9IntMask_LSB   0x29
 
#define QIB_7322_IntMask_RcvUrg9IntMask_MSB   0x29
 
#define QIB_7322_IntMask_RcvUrg9IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvUrg8IntMask_LSB   0x28
 
#define QIB_7322_IntMask_RcvUrg8IntMask_MSB   0x28
 
#define QIB_7322_IntMask_RcvUrg8IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvUrg7IntMask_LSB   0x27
 
#define QIB_7322_IntMask_RcvUrg7IntMask_MSB   0x27
 
#define QIB_7322_IntMask_RcvUrg7IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvUrg6IntMask_LSB   0x26
 
#define QIB_7322_IntMask_RcvUrg6IntMask_MSB   0x26
 
#define QIB_7322_IntMask_RcvUrg6IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvUrg5IntMask_LSB   0x25
 
#define QIB_7322_IntMask_RcvUrg5IntMask_MSB   0x25
 
#define QIB_7322_IntMask_RcvUrg5IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvUrg4IntMask_LSB   0x24
 
#define QIB_7322_IntMask_RcvUrg4IntMask_MSB   0x24
 
#define QIB_7322_IntMask_RcvUrg4IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvUrg3IntMask_LSB   0x23
 
#define QIB_7322_IntMask_RcvUrg3IntMask_MSB   0x23
 
#define QIB_7322_IntMask_RcvUrg3IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvUrg2IntMask_LSB   0x22
 
#define QIB_7322_IntMask_RcvUrg2IntMask_MSB   0x22
 
#define QIB_7322_IntMask_RcvUrg2IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvUrg1IntMask_LSB   0x21
 
#define QIB_7322_IntMask_RcvUrg1IntMask_MSB   0x21
 
#define QIB_7322_IntMask_RcvUrg1IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvUrg0IntMask_LSB   0x20
 
#define QIB_7322_IntMask_RcvUrg0IntMask_MSB   0x20
 
#define QIB_7322_IntMask_RcvUrg0IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_ErrIntMask_1_LSB   0x1F
 
#define QIB_7322_IntMask_ErrIntMask_1_MSB   0x1F
 
#define QIB_7322_IntMask_ErrIntMask_1_RMASK   0x1
 
#define QIB_7322_IntMask_ErrIntMask_0_LSB   0x1E
 
#define QIB_7322_IntMask_ErrIntMask_0_MSB   0x1E
 
#define QIB_7322_IntMask_ErrIntMask_0_RMASK   0x1
 
#define QIB_7322_IntMask_ErrIntMask_LSB   0x1D
 
#define QIB_7322_IntMask_ErrIntMask_MSB   0x1D
 
#define QIB_7322_IntMask_ErrIntMask_RMASK   0x1
 
#define QIB_7322_IntMask_AssertGPIOIntMask_LSB   0x1C
 
#define QIB_7322_IntMask_AssertGPIOIntMask_MSB   0x1C
 
#define QIB_7322_IntMask_AssertGPIOIntMask_RMASK   0x1
 
#define QIB_7322_IntMask_SendDoneIntMask_1_LSB   0x19
 
#define QIB_7322_IntMask_SendDoneIntMask_1_MSB   0x19
 
#define QIB_7322_IntMask_SendDoneIntMask_1_RMASK   0x1
 
#define QIB_7322_IntMask_SendDoneIntMask_0_LSB   0x18
 
#define QIB_7322_IntMask_SendDoneIntMask_0_MSB   0x18
 
#define QIB_7322_IntMask_SendDoneIntMask_0_RMASK   0x1
 
#define QIB_7322_IntMask_SendBufAvailIntMask_LSB   0x17
 
#define QIB_7322_IntMask_SendBufAvailIntMask_MSB   0x17
 
#define QIB_7322_IntMask_SendBufAvailIntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvAvail17IntMask_LSB   0x11
 
#define QIB_7322_IntMask_RcvAvail17IntMask_MSB   0x11
 
#define QIB_7322_IntMask_RcvAvail17IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvAvail16IntMask_LSB   0x10
 
#define QIB_7322_IntMask_RcvAvail16IntMask_MSB   0x10
 
#define QIB_7322_IntMask_RcvAvail16IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvAvail15IntMask_LSB   0xF
 
#define QIB_7322_IntMask_RcvAvail15IntMask_MSB   0xF
 
#define QIB_7322_IntMask_RcvAvail15IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvAvail14IntMask_LSB   0xE
 
#define QIB_7322_IntMask_RcvAvail14IntMask_MSB   0xE
 
#define QIB_7322_IntMask_RcvAvail14IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvAvail13IntMask_LSB   0xD
 
#define QIB_7322_IntMask_RcvAvail13IntMask_MSB   0xD
 
#define QIB_7322_IntMask_RcvAvail13IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvAvail12IntMask_LSB   0xC
 
#define QIB_7322_IntMask_RcvAvail12IntMask_MSB   0xC
 
#define QIB_7322_IntMask_RcvAvail12IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvAvail11IntMask_LSB   0xB
 
#define QIB_7322_IntMask_RcvAvail11IntMask_MSB   0xB
 
#define QIB_7322_IntMask_RcvAvail11IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvAvail10IntMask_LSB   0xA
 
#define QIB_7322_IntMask_RcvAvail10IntMask_MSB   0xA
 
#define QIB_7322_IntMask_RcvAvail10IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvAvail9IntMask_LSB   0x9
 
#define QIB_7322_IntMask_RcvAvail9IntMask_MSB   0x9
 
#define QIB_7322_IntMask_RcvAvail9IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvAvail8IntMask_LSB   0x8
 
#define QIB_7322_IntMask_RcvAvail8IntMask_MSB   0x8
 
#define QIB_7322_IntMask_RcvAvail8IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvAvail7IntMask_LSB   0x7
 
#define QIB_7322_IntMask_RcvAvail7IntMask_MSB   0x7
 
#define QIB_7322_IntMask_RcvAvail7IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvAvail6IntMask_LSB   0x6
 
#define QIB_7322_IntMask_RcvAvail6IntMask_MSB   0x6
 
#define QIB_7322_IntMask_RcvAvail6IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvAvail5IntMask_LSB   0x5
 
#define QIB_7322_IntMask_RcvAvail5IntMask_MSB   0x5
 
#define QIB_7322_IntMask_RcvAvail5IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvAvail4IntMask_LSB   0x4
 
#define QIB_7322_IntMask_RcvAvail4IntMask_MSB   0x4
 
#define QIB_7322_IntMask_RcvAvail4IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvAvail3IntMask_LSB   0x3
 
#define QIB_7322_IntMask_RcvAvail3IntMask_MSB   0x3
 
#define QIB_7322_IntMask_RcvAvail3IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvAvail2IntMask_LSB   0x2
 
#define QIB_7322_IntMask_RcvAvail2IntMask_MSB   0x2
 
#define QIB_7322_IntMask_RcvAvail2IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvAvail1IntMask_LSB   0x1
 
#define QIB_7322_IntMask_RcvAvail1IntMask_MSB   0x1
 
#define QIB_7322_IntMask_RcvAvail1IntMask_RMASK   0x1
 
#define QIB_7322_IntMask_RcvAvail0IntMask_LSB   0x0
 
#define QIB_7322_IntMask_RcvAvail0IntMask_MSB   0x0
 
#define QIB_7322_IntMask_RcvAvail0IntMask_RMASK   0x1
 
#define QIB_7322_IntStatus_OFFS   0x70
 
#define QIB_7322_IntStatus_DEF   0x0000000000000000
 
#define QIB_7322_IntStatus_SDmaInt_1_LSB   0x3F
 
#define QIB_7322_IntStatus_SDmaInt_1_MSB   0x3F
 
#define QIB_7322_IntStatus_SDmaInt_1_RMASK   0x1
 
#define QIB_7322_IntStatus_SDmaInt_0_LSB   0x3E
 
#define QIB_7322_IntStatus_SDmaInt_0_MSB   0x3E
 
#define QIB_7322_IntStatus_SDmaInt_0_RMASK   0x1
 
#define QIB_7322_IntStatus_SDmaProgressInt_1_LSB   0x3D
 
#define QIB_7322_IntStatus_SDmaProgressInt_1_MSB   0x3D
 
#define QIB_7322_IntStatus_SDmaProgressInt_1_RMASK   0x1
 
#define QIB_7322_IntStatus_SDmaProgressInt_0_LSB   0x3C
 
#define QIB_7322_IntStatus_SDmaProgressInt_0_MSB   0x3C
 
#define QIB_7322_IntStatus_SDmaProgressInt_0_RMASK   0x1
 
#define QIB_7322_IntStatus_SDmaIdleInt_1_LSB   0x3B
 
#define QIB_7322_IntStatus_SDmaIdleInt_1_MSB   0x3B
 
#define QIB_7322_IntStatus_SDmaIdleInt_1_RMASK   0x1
 
#define QIB_7322_IntStatus_SDmaIdleInt_0_LSB   0x3A
 
#define QIB_7322_IntStatus_SDmaIdleInt_0_MSB   0x3A
 
#define QIB_7322_IntStatus_SDmaIdleInt_0_RMASK   0x1
 
#define QIB_7322_IntStatus_SDmaCleanupDone_1_LSB   0x39
 
#define QIB_7322_IntStatus_SDmaCleanupDone_1_MSB   0x39
 
#define QIB_7322_IntStatus_SDmaCleanupDone_1_RMASK   0x1
 
#define QIB_7322_IntStatus_SDmaCleanupDone_0_LSB   0x38
 
#define QIB_7322_IntStatus_SDmaCleanupDone_0_MSB   0x38
 
#define QIB_7322_IntStatus_SDmaCleanupDone_0_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvUrg17_LSB   0x31
 
#define QIB_7322_IntStatus_RcvUrg17_MSB   0x31
 
#define QIB_7322_IntStatus_RcvUrg17_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvUrg16_LSB   0x30
 
#define QIB_7322_IntStatus_RcvUrg16_MSB   0x30
 
#define QIB_7322_IntStatus_RcvUrg16_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvUrg15_LSB   0x2F
 
#define QIB_7322_IntStatus_RcvUrg15_MSB   0x2F
 
#define QIB_7322_IntStatus_RcvUrg15_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvUrg14_LSB   0x2E
 
#define QIB_7322_IntStatus_RcvUrg14_MSB   0x2E
 
#define QIB_7322_IntStatus_RcvUrg14_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvUrg13_LSB   0x2D
 
#define QIB_7322_IntStatus_RcvUrg13_MSB   0x2D
 
#define QIB_7322_IntStatus_RcvUrg13_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvUrg12_LSB   0x2C
 
#define QIB_7322_IntStatus_RcvUrg12_MSB   0x2C
 
#define QIB_7322_IntStatus_RcvUrg12_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvUrg11_LSB   0x2B
 
#define QIB_7322_IntStatus_RcvUrg11_MSB   0x2B
 
#define QIB_7322_IntStatus_RcvUrg11_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvUrg10_LSB   0x2A
 
#define QIB_7322_IntStatus_RcvUrg10_MSB   0x2A
 
#define QIB_7322_IntStatus_RcvUrg10_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvUrg9_LSB   0x29
 
#define QIB_7322_IntStatus_RcvUrg9_MSB   0x29
 
#define QIB_7322_IntStatus_RcvUrg9_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvUrg8_LSB   0x28
 
#define QIB_7322_IntStatus_RcvUrg8_MSB   0x28
 
#define QIB_7322_IntStatus_RcvUrg8_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvUrg7_LSB   0x27
 
#define QIB_7322_IntStatus_RcvUrg7_MSB   0x27
 
#define QIB_7322_IntStatus_RcvUrg7_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvUrg6_LSB   0x26
 
#define QIB_7322_IntStatus_RcvUrg6_MSB   0x26
 
#define QIB_7322_IntStatus_RcvUrg6_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvUrg5_LSB   0x25
 
#define QIB_7322_IntStatus_RcvUrg5_MSB   0x25
 
#define QIB_7322_IntStatus_RcvUrg5_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvUrg4_LSB   0x24
 
#define QIB_7322_IntStatus_RcvUrg4_MSB   0x24
 
#define QIB_7322_IntStatus_RcvUrg4_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvUrg3_LSB   0x23
 
#define QIB_7322_IntStatus_RcvUrg3_MSB   0x23
 
#define QIB_7322_IntStatus_RcvUrg3_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvUrg2_LSB   0x22
 
#define QIB_7322_IntStatus_RcvUrg2_MSB   0x22
 
#define QIB_7322_IntStatus_RcvUrg2_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvUrg1_LSB   0x21
 
#define QIB_7322_IntStatus_RcvUrg1_MSB   0x21
 
#define QIB_7322_IntStatus_RcvUrg1_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvUrg0_LSB   0x20
 
#define QIB_7322_IntStatus_RcvUrg0_MSB   0x20
 
#define QIB_7322_IntStatus_RcvUrg0_RMASK   0x1
 
#define QIB_7322_IntStatus_Err_1_LSB   0x1F
 
#define QIB_7322_IntStatus_Err_1_MSB   0x1F
 
#define QIB_7322_IntStatus_Err_1_RMASK   0x1
 
#define QIB_7322_IntStatus_Err_0_LSB   0x1E
 
#define QIB_7322_IntStatus_Err_0_MSB   0x1E
 
#define QIB_7322_IntStatus_Err_0_RMASK   0x1
 
#define QIB_7322_IntStatus_Err_LSB   0x1D
 
#define QIB_7322_IntStatus_Err_MSB   0x1D
 
#define QIB_7322_IntStatus_Err_RMASK   0x1
 
#define QIB_7322_IntStatus_AssertGPIO_LSB   0x1C
 
#define QIB_7322_IntStatus_AssertGPIO_MSB   0x1C
 
#define QIB_7322_IntStatus_AssertGPIO_RMASK   0x1
 
#define QIB_7322_IntStatus_SendDone_1_LSB   0x19
 
#define QIB_7322_IntStatus_SendDone_1_MSB   0x19
 
#define QIB_7322_IntStatus_SendDone_1_RMASK   0x1
 
#define QIB_7322_IntStatus_SendDone_0_LSB   0x18
 
#define QIB_7322_IntStatus_SendDone_0_MSB   0x18
 
#define QIB_7322_IntStatus_SendDone_0_RMASK   0x1
 
#define QIB_7322_IntStatus_SendBufAvail_LSB   0x17
 
#define QIB_7322_IntStatus_SendBufAvail_MSB   0x17
 
#define QIB_7322_IntStatus_SendBufAvail_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvAvail17_LSB   0x11
 
#define QIB_7322_IntStatus_RcvAvail17_MSB   0x11
 
#define QIB_7322_IntStatus_RcvAvail17_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvAvail16_LSB   0x10
 
#define QIB_7322_IntStatus_RcvAvail16_MSB   0x10
 
#define QIB_7322_IntStatus_RcvAvail16_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvAvail15_LSB   0xF
 
#define QIB_7322_IntStatus_RcvAvail15_MSB   0xF
 
#define QIB_7322_IntStatus_RcvAvail15_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvAvail14_LSB   0xE
 
#define QIB_7322_IntStatus_RcvAvail14_MSB   0xE
 
#define QIB_7322_IntStatus_RcvAvail14_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvAvail13_LSB   0xD
 
#define QIB_7322_IntStatus_RcvAvail13_MSB   0xD
 
#define QIB_7322_IntStatus_RcvAvail13_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvAvail12_LSB   0xC
 
#define QIB_7322_IntStatus_RcvAvail12_MSB   0xC
 
#define QIB_7322_IntStatus_RcvAvail12_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvAvail11_LSB   0xB
 
#define QIB_7322_IntStatus_RcvAvail11_MSB   0xB
 
#define QIB_7322_IntStatus_RcvAvail11_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvAvail10_LSB   0xA
 
#define QIB_7322_IntStatus_RcvAvail10_MSB   0xA
 
#define QIB_7322_IntStatus_RcvAvail10_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvAvail9_LSB   0x9
 
#define QIB_7322_IntStatus_RcvAvail9_MSB   0x9
 
#define QIB_7322_IntStatus_RcvAvail9_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvAvail8_LSB   0x8
 
#define QIB_7322_IntStatus_RcvAvail8_MSB   0x8
 
#define QIB_7322_IntStatus_RcvAvail8_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvAvail7_LSB   0x7
 
#define QIB_7322_IntStatus_RcvAvail7_MSB   0x7
 
#define QIB_7322_IntStatus_RcvAvail7_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvAvail6_LSB   0x6
 
#define QIB_7322_IntStatus_RcvAvail6_MSB   0x6
 
#define QIB_7322_IntStatus_RcvAvail6_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvAvail5_LSB   0x5
 
#define QIB_7322_IntStatus_RcvAvail5_MSB   0x5
 
#define QIB_7322_IntStatus_RcvAvail5_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvAvail4_LSB   0x4
 
#define QIB_7322_IntStatus_RcvAvail4_MSB   0x4
 
#define QIB_7322_IntStatus_RcvAvail4_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvAvail3_LSB   0x3
 
#define QIB_7322_IntStatus_RcvAvail3_MSB   0x3
 
#define QIB_7322_IntStatus_RcvAvail3_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvAvail2_LSB   0x2
 
#define QIB_7322_IntStatus_RcvAvail2_MSB   0x2
 
#define QIB_7322_IntStatus_RcvAvail2_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvAvail1_LSB   0x1
 
#define QIB_7322_IntStatus_RcvAvail1_MSB   0x1
 
#define QIB_7322_IntStatus_RcvAvail1_RMASK   0x1
 
#define QIB_7322_IntStatus_RcvAvail0_LSB   0x0
 
#define QIB_7322_IntStatus_RcvAvail0_MSB   0x0
 
#define QIB_7322_IntStatus_RcvAvail0_RMASK   0x1
 
#define QIB_7322_IntClear_OFFS   0x78
 
#define QIB_7322_IntClear_DEF   0x0000000000000000
 
#define QIB_7322_IntClear_SDmaIntClear_1_LSB   0x3F
 
#define QIB_7322_IntClear_SDmaIntClear_1_MSB   0x3F
 
#define QIB_7322_IntClear_SDmaIntClear_1_RMASK   0x1
 
#define QIB_7322_IntClear_SDmaIntClear_0_LSB   0x3E
 
#define QIB_7322_IntClear_SDmaIntClear_0_MSB   0x3E
 
#define QIB_7322_IntClear_SDmaIntClear_0_RMASK   0x1
 
#define QIB_7322_IntClear_SDmaProgressIntClear_1_LSB   0x3D
 
#define QIB_7322_IntClear_SDmaProgressIntClear_1_MSB   0x3D
 
#define QIB_7322_IntClear_SDmaProgressIntClear_1_RMASK   0x1
 
#define QIB_7322_IntClear_SDmaProgressIntClear_0_LSB   0x3C
 
#define QIB_7322_IntClear_SDmaProgressIntClear_0_MSB   0x3C
 
#define QIB_7322_IntClear_SDmaProgressIntClear_0_RMASK   0x1
 
#define QIB_7322_IntClear_SDmaIdleIntClear_1_LSB   0x3B
 
#define QIB_7322_IntClear_SDmaIdleIntClear_1_MSB   0x3B
 
#define QIB_7322_IntClear_SDmaIdleIntClear_1_RMASK   0x1
 
#define QIB_7322_IntClear_SDmaIdleIntClear_0_LSB   0x3A
 
#define QIB_7322_IntClear_SDmaIdleIntClear_0_MSB   0x3A
 
#define QIB_7322_IntClear_SDmaIdleIntClear_0_RMASK   0x1
 
#define QIB_7322_IntClear_SDmaCleanupDoneClear_1_LSB   0x39
 
#define QIB_7322_IntClear_SDmaCleanupDoneClear_1_MSB   0x39
 
#define QIB_7322_IntClear_SDmaCleanupDoneClear_1_RMASK   0x1
 
#define QIB_7322_IntClear_SDmaCleanupDoneClear_0_LSB   0x38
 
#define QIB_7322_IntClear_SDmaCleanupDoneClear_0_MSB   0x38
 
#define QIB_7322_IntClear_SDmaCleanupDoneClear_0_RMASK   0x1
 
#define QIB_7322_IntClear_RcvUrg17IntClear_LSB   0x31
 
#define QIB_7322_IntClear_RcvUrg17IntClear_MSB   0x31
 
#define QIB_7322_IntClear_RcvUrg17IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvUrg16IntClear_LSB   0x30
 
#define QIB_7322_IntClear_RcvUrg16IntClear_MSB   0x30
 
#define QIB_7322_IntClear_RcvUrg16IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvUrg15IntClear_LSB   0x2F
 
#define QIB_7322_IntClear_RcvUrg15IntClear_MSB   0x2F
 
#define QIB_7322_IntClear_RcvUrg15IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvUrg14IntClear_LSB   0x2E
 
#define QIB_7322_IntClear_RcvUrg14IntClear_MSB   0x2E
 
#define QIB_7322_IntClear_RcvUrg14IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvUrg13IntClear_LSB   0x2D
 
#define QIB_7322_IntClear_RcvUrg13IntClear_MSB   0x2D
 
#define QIB_7322_IntClear_RcvUrg13IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvUrg12IntClear_LSB   0x2C
 
#define QIB_7322_IntClear_RcvUrg12IntClear_MSB   0x2C
 
#define QIB_7322_IntClear_RcvUrg12IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvUrg11IntClear_LSB   0x2B
 
#define QIB_7322_IntClear_RcvUrg11IntClear_MSB   0x2B
 
#define QIB_7322_IntClear_RcvUrg11IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvUrg10IntClear_LSB   0x2A
 
#define QIB_7322_IntClear_RcvUrg10IntClear_MSB   0x2A
 
#define QIB_7322_IntClear_RcvUrg10IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvUrg9IntClear_LSB   0x29
 
#define QIB_7322_IntClear_RcvUrg9IntClear_MSB   0x29
 
#define QIB_7322_IntClear_RcvUrg9IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvUrg8IntClear_LSB   0x28
 
#define QIB_7322_IntClear_RcvUrg8IntClear_MSB   0x28
 
#define QIB_7322_IntClear_RcvUrg8IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvUrg7IntClear_LSB   0x27
 
#define QIB_7322_IntClear_RcvUrg7IntClear_MSB   0x27
 
#define QIB_7322_IntClear_RcvUrg7IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvUrg6IntClear_LSB   0x26
 
#define QIB_7322_IntClear_RcvUrg6IntClear_MSB   0x26
 
#define QIB_7322_IntClear_RcvUrg6IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvUrg5IntClear_LSB   0x25
 
#define QIB_7322_IntClear_RcvUrg5IntClear_MSB   0x25
 
#define QIB_7322_IntClear_RcvUrg5IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvUrg4IntClear_LSB   0x24
 
#define QIB_7322_IntClear_RcvUrg4IntClear_MSB   0x24
 
#define QIB_7322_IntClear_RcvUrg4IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvUrg3IntClear_LSB   0x23
 
#define QIB_7322_IntClear_RcvUrg3IntClear_MSB   0x23
 
#define QIB_7322_IntClear_RcvUrg3IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvUrg2IntClear_LSB   0x22
 
#define QIB_7322_IntClear_RcvUrg2IntClear_MSB   0x22
 
#define QIB_7322_IntClear_RcvUrg2IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvUrg1IntClear_LSB   0x21
 
#define QIB_7322_IntClear_RcvUrg1IntClear_MSB   0x21
 
#define QIB_7322_IntClear_RcvUrg1IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvUrg0IntClear_LSB   0x20
 
#define QIB_7322_IntClear_RcvUrg0IntClear_MSB   0x20
 
#define QIB_7322_IntClear_RcvUrg0IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_ErrIntClear_1_LSB   0x1F
 
#define QIB_7322_IntClear_ErrIntClear_1_MSB   0x1F
 
#define QIB_7322_IntClear_ErrIntClear_1_RMASK   0x1
 
#define QIB_7322_IntClear_ErrIntClear_0_LSB   0x1E
 
#define QIB_7322_IntClear_ErrIntClear_0_MSB   0x1E
 
#define QIB_7322_IntClear_ErrIntClear_0_RMASK   0x1
 
#define QIB_7322_IntClear_ErrIntClear_LSB   0x1D
 
#define QIB_7322_IntClear_ErrIntClear_MSB   0x1D
 
#define QIB_7322_IntClear_ErrIntClear_RMASK   0x1
 
#define QIB_7322_IntClear_AssertGPIOIntClear_LSB   0x1C
 
#define QIB_7322_IntClear_AssertGPIOIntClear_MSB   0x1C
 
#define QIB_7322_IntClear_AssertGPIOIntClear_RMASK   0x1
 
#define QIB_7322_IntClear_SendDoneIntClear_1_LSB   0x19
 
#define QIB_7322_IntClear_SendDoneIntClear_1_MSB   0x19
 
#define QIB_7322_IntClear_SendDoneIntClear_1_RMASK   0x1
 
#define QIB_7322_IntClear_SendDoneIntClear_0_LSB   0x18
 
#define QIB_7322_IntClear_SendDoneIntClear_0_MSB   0x18
 
#define QIB_7322_IntClear_SendDoneIntClear_0_RMASK   0x1
 
#define QIB_7322_IntClear_SendBufAvailIntClear_LSB   0x17
 
#define QIB_7322_IntClear_SendBufAvailIntClear_MSB   0x17
 
#define QIB_7322_IntClear_SendBufAvailIntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvAvail17IntClear_LSB   0x11
 
#define QIB_7322_IntClear_RcvAvail17IntClear_MSB   0x11
 
#define QIB_7322_IntClear_RcvAvail17IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvAvail16IntClear_LSB   0x10
 
#define QIB_7322_IntClear_RcvAvail16IntClear_MSB   0x10
 
#define QIB_7322_IntClear_RcvAvail16IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvAvail15IntClear_LSB   0xF
 
#define QIB_7322_IntClear_RcvAvail15IntClear_MSB   0xF
 
#define QIB_7322_IntClear_RcvAvail15IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvAvail14IntClear_LSB   0xE
 
#define QIB_7322_IntClear_RcvAvail14IntClear_MSB   0xE
 
#define QIB_7322_IntClear_RcvAvail14IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvAvail13IntClear_LSB   0xD
 
#define QIB_7322_IntClear_RcvAvail13IntClear_MSB   0xD
 
#define QIB_7322_IntClear_RcvAvail13IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvAvail12IntClear_LSB   0xC
 
#define QIB_7322_IntClear_RcvAvail12IntClear_MSB   0xC
 
#define QIB_7322_IntClear_RcvAvail12IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvAvail11IntClear_LSB   0xB
 
#define QIB_7322_IntClear_RcvAvail11IntClear_MSB   0xB
 
#define QIB_7322_IntClear_RcvAvail11IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvAvail10IntClear_LSB   0xA
 
#define QIB_7322_IntClear_RcvAvail10IntClear_MSB   0xA
 
#define QIB_7322_IntClear_RcvAvail10IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvAvail9IntClear_LSB   0x9
 
#define QIB_7322_IntClear_RcvAvail9IntClear_MSB   0x9
 
#define QIB_7322_IntClear_RcvAvail9IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvAvail8IntClear_LSB   0x8
 
#define QIB_7322_IntClear_RcvAvail8IntClear_MSB   0x8
 
#define QIB_7322_IntClear_RcvAvail8IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvAvail7IntClear_LSB   0x7
 
#define QIB_7322_IntClear_RcvAvail7IntClear_MSB   0x7
 
#define QIB_7322_IntClear_RcvAvail7IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvAvail6IntClear_LSB   0x6
 
#define QIB_7322_IntClear_RcvAvail6IntClear_MSB   0x6
 
#define QIB_7322_IntClear_RcvAvail6IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvAvail5IntClear_LSB   0x5
 
#define QIB_7322_IntClear_RcvAvail5IntClear_MSB   0x5
 
#define QIB_7322_IntClear_RcvAvail5IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvAvail4IntClear_LSB   0x4
 
#define QIB_7322_IntClear_RcvAvail4IntClear_MSB   0x4
 
#define QIB_7322_IntClear_RcvAvail4IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvAvail3IntClear_LSB   0x3
 
#define QIB_7322_IntClear_RcvAvail3IntClear_MSB   0x3
 
#define QIB_7322_IntClear_RcvAvail3IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvAvail2IntClear_LSB   0x2
 
#define QIB_7322_IntClear_RcvAvail2IntClear_MSB   0x2
 
#define QIB_7322_IntClear_RcvAvail2IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvAvail1IntClear_LSB   0x1
 
#define QIB_7322_IntClear_RcvAvail1IntClear_MSB   0x1
 
#define QIB_7322_IntClear_RcvAvail1IntClear_RMASK   0x1
 
#define QIB_7322_IntClear_RcvAvail0IntClear_LSB   0x0
 
#define QIB_7322_IntClear_RcvAvail0IntClear_MSB   0x0
 
#define QIB_7322_IntClear_RcvAvail0IntClear_RMASK   0x1
 
#define QIB_7322_ErrMask_OFFS   0x80
 
#define QIB_7322_ErrMask_DEF   0x0000000000000000
 
#define QIB_7322_ErrMask_ResetNegatedMask_LSB   0x3F
 
#define QIB_7322_ErrMask_ResetNegatedMask_MSB   0x3F
 
#define QIB_7322_ErrMask_ResetNegatedMask_RMASK   0x1
 
#define QIB_7322_ErrMask_HardwareErrMask_LSB   0x3E
 
#define QIB_7322_ErrMask_HardwareErrMask_MSB   0x3E
 
#define QIB_7322_ErrMask_HardwareErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_InvalidAddrErrMask_LSB   0x3D
 
#define QIB_7322_ErrMask_InvalidAddrErrMask_MSB   0x3D
 
#define QIB_7322_ErrMask_InvalidAddrErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_SDmaVL15ErrMask_LSB   0x38
 
#define QIB_7322_ErrMask_SDmaVL15ErrMask_MSB   0x38
 
#define QIB_7322_ErrMask_SDmaVL15ErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_SBufVL15MisUseErrMask_LSB   0x37
 
#define QIB_7322_ErrMask_SBufVL15MisUseErrMask_MSB   0x37
 
#define QIB_7322_ErrMask_SBufVL15MisUseErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_InvalidEEPCmdMask_LSB   0x35
 
#define QIB_7322_ErrMask_InvalidEEPCmdMask_MSB   0x35
 
#define QIB_7322_ErrMask_InvalidEEPCmdMask_RMASK   0x1
 
#define QIB_7322_ErrMask_RcvContextShareErrMask_LSB   0x34
 
#define QIB_7322_ErrMask_RcvContextShareErrMask_MSB   0x34
 
#define QIB_7322_ErrMask_RcvContextShareErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_SendVLMismatchErrMask_LSB   0x24
 
#define QIB_7322_ErrMask_SendVLMismatchErrMask_MSB   0x24
 
#define QIB_7322_ErrMask_SendVLMismatchErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_SendArmLaunchErrMask_LSB   0x23
 
#define QIB_7322_ErrMask_SendArmLaunchErrMask_MSB   0x23
 
#define QIB_7322_ErrMask_SendArmLaunchErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_SendSpecialTriggerErrMask_LSB   0x1B
 
#define QIB_7322_ErrMask_SendSpecialTriggerErrMask_MSB   0x1B
 
#define QIB_7322_ErrMask_SendSpecialTriggerErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_SDmaWrongPortErrMask_LSB   0x1A
 
#define QIB_7322_ErrMask_SDmaWrongPortErrMask_MSB   0x1A
 
#define QIB_7322_ErrMask_SDmaWrongPortErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_SDmaBufMaskDuplicateErrMask_LSB   0x19
 
#define QIB_7322_ErrMask_SDmaBufMaskDuplicateErrMask_MSB   0x19
 
#define QIB_7322_ErrMask_SDmaBufMaskDuplicateErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_RcvHdrFullErrMask_LSB   0xD
 
#define QIB_7322_ErrMask_RcvHdrFullErrMask_MSB   0xD
 
#define QIB_7322_ErrMask_RcvHdrFullErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_RcvEgrFullErrMask_LSB   0xC
 
#define QIB_7322_ErrMask_RcvEgrFullErrMask_MSB   0xC
 
#define QIB_7322_ErrMask_RcvEgrFullErrMask_RMASK   0x1
 
#define QIB_7322_ErrStatus_OFFS   0x88
 
#define QIB_7322_ErrStatus_DEF   0x0000000000000000
 
#define QIB_7322_ErrStatus_ResetNegated_LSB   0x3F
 
#define QIB_7322_ErrStatus_ResetNegated_MSB   0x3F
 
#define QIB_7322_ErrStatus_ResetNegated_RMASK   0x1
 
#define QIB_7322_ErrStatus_HardwareErr_LSB   0x3E
 
#define QIB_7322_ErrStatus_HardwareErr_MSB   0x3E
 
#define QIB_7322_ErrStatus_HardwareErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_InvalidAddrErr_LSB   0x3D
 
#define QIB_7322_ErrStatus_InvalidAddrErr_MSB   0x3D
 
#define QIB_7322_ErrStatus_InvalidAddrErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_SDmaVL15Err_LSB   0x38
 
#define QIB_7322_ErrStatus_SDmaVL15Err_MSB   0x38
 
#define QIB_7322_ErrStatus_SDmaVL15Err_RMASK   0x1
 
#define QIB_7322_ErrStatus_SBufVL15MisUseErr_LSB   0x37
 
#define QIB_7322_ErrStatus_SBufVL15MisUseErr_MSB   0x37
 
#define QIB_7322_ErrStatus_SBufVL15MisUseErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_InvalidEEPCmdErr_LSB   0x35
 
#define QIB_7322_ErrStatus_InvalidEEPCmdErr_MSB   0x35
 
#define QIB_7322_ErrStatus_InvalidEEPCmdErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_RcvContextShareErr_LSB   0x34
 
#define QIB_7322_ErrStatus_RcvContextShareErr_MSB   0x34
 
#define QIB_7322_ErrStatus_RcvContextShareErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_SendVLMismatchErr_LSB   0x24
 
#define QIB_7322_ErrStatus_SendVLMismatchErr_MSB   0x24
 
#define QIB_7322_ErrStatus_SendVLMismatchErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_SendArmLaunchErr_LSB   0x23
 
#define QIB_7322_ErrStatus_SendArmLaunchErr_MSB   0x23
 
#define QIB_7322_ErrStatus_SendArmLaunchErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_SendSpecialTriggerErr_LSB   0x1B
 
#define QIB_7322_ErrStatus_SendSpecialTriggerErr_MSB   0x1B
 
#define QIB_7322_ErrStatus_SendSpecialTriggerErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_SDmaWrongPortErr_LSB   0x1A
 
#define QIB_7322_ErrStatus_SDmaWrongPortErr_MSB   0x1A
 
#define QIB_7322_ErrStatus_SDmaWrongPortErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_SDmaBufMaskDuplicateErr_LSB   0x19
 
#define QIB_7322_ErrStatus_SDmaBufMaskDuplicateErr_MSB   0x19
 
#define QIB_7322_ErrStatus_SDmaBufMaskDuplicateErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_RcvHdrFullErr_LSB   0xD
 
#define QIB_7322_ErrStatus_RcvHdrFullErr_MSB   0xD
 
#define QIB_7322_ErrStatus_RcvHdrFullErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_RcvEgrFullErr_LSB   0xC
 
#define QIB_7322_ErrStatus_RcvEgrFullErr_MSB   0xC
 
#define QIB_7322_ErrStatus_RcvEgrFullErr_RMASK   0x1
 
#define QIB_7322_ErrClear_OFFS   0x90
 
#define QIB_7322_ErrClear_DEF   0x0000000000000000
 
#define QIB_7322_ErrClear_ResetNegatedClear_LSB   0x3F
 
#define QIB_7322_ErrClear_ResetNegatedClear_MSB   0x3F
 
#define QIB_7322_ErrClear_ResetNegatedClear_RMASK   0x1
 
#define QIB_7322_ErrClear_HardwareErrClear_LSB   0x3E
 
#define QIB_7322_ErrClear_HardwareErrClear_MSB   0x3E
 
#define QIB_7322_ErrClear_HardwareErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_InvalidAddrErrClear_LSB   0x3D
 
#define QIB_7322_ErrClear_InvalidAddrErrClear_MSB   0x3D
 
#define QIB_7322_ErrClear_InvalidAddrErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_SDmaVL15ErrClear_LSB   0x38
 
#define QIB_7322_ErrClear_SDmaVL15ErrClear_MSB   0x38
 
#define QIB_7322_ErrClear_SDmaVL15ErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_SBufVL15MisUseErrClear_LSB   0x37
 
#define QIB_7322_ErrClear_SBufVL15MisUseErrClear_MSB   0x37
 
#define QIB_7322_ErrClear_SBufVL15MisUseErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_InvalidEEPCmdErrClear_LSB   0x35
 
#define QIB_7322_ErrClear_InvalidEEPCmdErrClear_MSB   0x35
 
#define QIB_7322_ErrClear_InvalidEEPCmdErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_RcvContextShareErrClear_LSB   0x34
 
#define QIB_7322_ErrClear_RcvContextShareErrClear_MSB   0x34
 
#define QIB_7322_ErrClear_RcvContextShareErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_SendVLMismatchErrMask_LSB   0x24
 
#define QIB_7322_ErrClear_SendVLMismatchErrMask_MSB   0x24
 
#define QIB_7322_ErrClear_SendVLMismatchErrMask_RMASK   0x1
 
#define QIB_7322_ErrClear_SendArmLaunchErrClear_LSB   0x23
 
#define QIB_7322_ErrClear_SendArmLaunchErrClear_MSB   0x23
 
#define QIB_7322_ErrClear_SendArmLaunchErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_SendSpecialTriggerErrClear_LSB   0x1B
 
#define QIB_7322_ErrClear_SendSpecialTriggerErrClear_MSB   0x1B
 
#define QIB_7322_ErrClear_SendSpecialTriggerErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_SDmaWrongPortErrClear_LSB   0x1A
 
#define QIB_7322_ErrClear_SDmaWrongPortErrClear_MSB   0x1A
 
#define QIB_7322_ErrClear_SDmaWrongPortErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_SDmaBufMaskDuplicateErrClear_LSB   0x19
 
#define QIB_7322_ErrClear_SDmaBufMaskDuplicateErrClear_MSB   0x19
 
#define QIB_7322_ErrClear_SDmaBufMaskDuplicateErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_RcvHdrFullErrClear_LSB   0xD
 
#define QIB_7322_ErrClear_RcvHdrFullErrClear_MSB   0xD
 
#define QIB_7322_ErrClear_RcvHdrFullErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_RcvEgrFullErrClear_LSB   0xC
 
#define QIB_7322_ErrClear_RcvEgrFullErrClear_MSB   0xC
 
#define QIB_7322_ErrClear_RcvEgrFullErrClear_RMASK   0x1
 
#define QIB_7322_HwErrMask_OFFS   0x98
 
#define QIB_7322_HwErrMask_DEF   0x0000000000000000
 
#define QIB_7322_HwErrMask_IBSerdesPClkNotDetectMask_1_LSB   0x3F
 
#define QIB_7322_HwErrMask_IBSerdesPClkNotDetectMask_1_MSB   0x3F
 
#define QIB_7322_HwErrMask_IBSerdesPClkNotDetectMask_1_RMASK   0x1
 
#define QIB_7322_HwErrMask_IBSerdesPClkNotDetectMask_0_LSB   0x3E
 
#define QIB_7322_HwErrMask_IBSerdesPClkNotDetectMask_0_MSB   0x3E
 
#define QIB_7322_HwErrMask_IBSerdesPClkNotDetectMask_0_RMASK   0x1
 
#define QIB_7322_HwErrMask_PCIESerdesPClkNotDetectMask_LSB   0x37
 
#define QIB_7322_HwErrMask_PCIESerdesPClkNotDetectMask_MSB   0x37
 
#define QIB_7322_HwErrMask_PCIESerdesPClkNotDetectMask_RMASK   0x1
 
#define QIB_7322_HwErrMask_PowerOnBISTFailedMask_LSB   0x36
 
#define QIB_7322_HwErrMask_PowerOnBISTFailedMask_MSB   0x36
 
#define QIB_7322_HwErrMask_PowerOnBISTFailedMask_RMASK   0x1
 
#define QIB_7322_HwErrMask_TempsenseTholdReachedMask_LSB   0x35
 
#define QIB_7322_HwErrMask_TempsenseTholdReachedMask_MSB   0x35
 
#define QIB_7322_HwErrMask_TempsenseTholdReachedMask_RMASK   0x1
 
#define QIB_7322_HwErrMask_MemoryErrMask_LSB   0x30
 
#define QIB_7322_HwErrMask_MemoryErrMask_MSB   0x30
 
#define QIB_7322_HwErrMask_MemoryErrMask_RMASK   0x1
 
#define QIB_7322_HwErrMask_pcie_phy_txParityErr_LSB   0x22
 
#define QIB_7322_HwErrMask_pcie_phy_txParityErr_MSB   0x22
 
#define QIB_7322_HwErrMask_pcie_phy_txParityErr_RMASK   0x1
 
#define QIB_7322_HwErrMask_PCIeBusParityErrMask_LSB   0x1F
 
#define QIB_7322_HwErrMask_PCIeBusParityErrMask_MSB   0x21
 
#define QIB_7322_HwErrMask_PCIeBusParityErrMask_RMASK   0x7
 
#define QIB_7322_HwErrMask_PcieCplTimeoutMask_LSB   0x1E
 
#define QIB_7322_HwErrMask_PcieCplTimeoutMask_MSB   0x1E
 
#define QIB_7322_HwErrMask_PcieCplTimeoutMask_RMASK   0x1
 
#define QIB_7322_HwErrMask_PciePoisonedTLPMask_LSB   0x1D
 
#define QIB_7322_HwErrMask_PciePoisonedTLPMask_MSB   0x1D
 
#define QIB_7322_HwErrMask_PciePoisonedTLPMask_RMASK   0x1
 
#define QIB_7322_HwErrMask_SDmaMemReadErrMask_1_LSB   0x1C
 
#define QIB_7322_HwErrMask_SDmaMemReadErrMask_1_MSB   0x1C
 
#define QIB_7322_HwErrMask_SDmaMemReadErrMask_1_RMASK   0x1
 
#define QIB_7322_HwErrMask_SDmaMemReadErrMask_0_LSB   0x1B
 
#define QIB_7322_HwErrMask_SDmaMemReadErrMask_0_MSB   0x1B
 
#define QIB_7322_HwErrMask_SDmaMemReadErrMask_0_RMASK   0x1
 
#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_LSB   0xF
 
#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_MSB   0xF
 
#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_RMASK   0x1
 
#define QIB_7322_HwErrMask_IBCBusToSPCParityErrMask_1_LSB   0xE
 
#define QIB_7322_HwErrMask_IBCBusToSPCParityErrMask_1_MSB   0xE
 
#define QIB_7322_HwErrMask_IBCBusToSPCParityErrMask_1_RMASK   0x1
 
#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_LSB   0xD
 
#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_MSB   0xD
 
#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_RMASK   0x1
 
#define QIB_7322_HwErrMask_statusValidNoEopMask_LSB   0xC
 
#define QIB_7322_HwErrMask_statusValidNoEopMask_MSB   0xC
 
#define QIB_7322_HwErrMask_statusValidNoEopMask_RMASK   0x1
 
#define QIB_7322_HwErrMask_LATriggeredMask_LSB   0xB
 
#define QIB_7322_HwErrMask_LATriggeredMask_MSB   0xB
 
#define QIB_7322_HwErrMask_LATriggeredMask_RMASK   0x1
 
#define QIB_7322_HwErrStatus_OFFS   0xA0
 
#define QIB_7322_HwErrStatus_DEF   0x0000000000000000
 
#define QIB_7322_HwErrStatus_IBSerdesPClkNotDetect_1_LSB   0x3F
 
#define QIB_7322_HwErrStatus_IBSerdesPClkNotDetect_1_MSB   0x3F
 
#define QIB_7322_HwErrStatus_IBSerdesPClkNotDetect_1_RMASK   0x1
 
#define QIB_7322_HwErrStatus_IBSerdesPClkNotDetect_0_LSB   0x3E
 
#define QIB_7322_HwErrStatus_IBSerdesPClkNotDetect_0_MSB   0x3E
 
#define QIB_7322_HwErrStatus_IBSerdesPClkNotDetect_0_RMASK   0x1
 
#define QIB_7322_HwErrStatus_PCIESerdesPClkNotDetect_LSB   0x37
 
#define QIB_7322_HwErrStatus_PCIESerdesPClkNotDetect_MSB   0x37
 
#define QIB_7322_HwErrStatus_PCIESerdesPClkNotDetect_RMASK   0x1
 
#define QIB_7322_HwErrStatus_PowerOnBISTFailed_LSB   0x36
 
#define QIB_7322_HwErrStatus_PowerOnBISTFailed_MSB   0x36
 
#define QIB_7322_HwErrStatus_PowerOnBISTFailed_RMASK   0x1
 
#define QIB_7322_HwErrStatus_TempsenseTholdReached_LSB   0x35
 
#define QIB_7322_HwErrStatus_TempsenseTholdReached_MSB   0x35
 
#define QIB_7322_HwErrStatus_TempsenseTholdReached_RMASK   0x1
 
#define QIB_7322_HwErrStatus_MemoryErr_LSB   0x30
 
#define QIB_7322_HwErrStatus_MemoryErr_MSB   0x30
 
#define QIB_7322_HwErrStatus_MemoryErr_RMASK   0x1
 
#define QIB_7322_HwErrStatus_pcie_phy_txParityErr_LSB   0x22
 
#define QIB_7322_HwErrStatus_pcie_phy_txParityErr_MSB   0x22
 
#define QIB_7322_HwErrStatus_pcie_phy_txParityErr_RMASK   0x1
 
#define QIB_7322_HwErrStatus_PCIeBusParity_LSB   0x1F
 
#define QIB_7322_HwErrStatus_PCIeBusParity_MSB   0x21
 
#define QIB_7322_HwErrStatus_PCIeBusParity_RMASK   0x7
 
#define QIB_7322_HwErrStatus_PcieCplTimeout_LSB   0x1E
 
#define QIB_7322_HwErrStatus_PcieCplTimeout_MSB   0x1E
 
#define QIB_7322_HwErrStatus_PcieCplTimeout_RMASK   0x1
 
#define QIB_7322_HwErrStatus_PciePoisonedTLP_LSB   0x1D
 
#define QIB_7322_HwErrStatus_PciePoisonedTLP_MSB   0x1D
 
#define QIB_7322_HwErrStatus_PciePoisonedTLP_RMASK   0x1
 
#define QIB_7322_HwErrStatus_SDmaMemReadErr_1_LSB   0x1C
 
#define QIB_7322_HwErrStatus_SDmaMemReadErr_1_MSB   0x1C
 
#define QIB_7322_HwErrStatus_SDmaMemReadErr_1_RMASK   0x1
 
#define QIB_7322_HwErrStatus_SDmaMemReadErr_0_LSB   0x1B
 
#define QIB_7322_HwErrStatus_SDmaMemReadErr_0_MSB   0x1B
 
#define QIB_7322_HwErrStatus_SDmaMemReadErr_0_RMASK   0x1
 
#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_LSB   0xF
 
#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_MSB   0xF
 
#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_RMASK   0x1
 
#define QIB_7322_HwErrStatus_IBCBusToSPCParityErr_1_LSB   0xE
 
#define QIB_7322_HwErrStatus_IBCBusToSPCParityErr_1_MSB   0xE
 
#define QIB_7322_HwErrStatus_IBCBusToSPCParityErr_1_RMASK   0x1
 
#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_LSB   0xD
 
#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_MSB   0xD
 
#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_RMASK   0x1
 
#define QIB_7322_HwErrStatus_statusValidNoEop_LSB   0xC
 
#define QIB_7322_HwErrStatus_statusValidNoEop_MSB   0xC
 
#define QIB_7322_HwErrStatus_statusValidNoEop_RMASK   0x1
 
#define QIB_7322_HwErrStatus_LATriggered_LSB   0xB
 
#define QIB_7322_HwErrStatus_LATriggered_MSB   0xB
 
#define QIB_7322_HwErrStatus_LATriggered_RMASK   0x1
 
#define QIB_7322_HwErrClear_OFFS   0xA8
 
#define QIB_7322_HwErrClear_DEF   0x0000000000000000
 
#define QIB_7322_HwErrClear_IBSerdesPClkNotDetectClear_1_LSB   0x3F
 
#define QIB_7322_HwErrClear_IBSerdesPClkNotDetectClear_1_MSB   0x3F
 
#define QIB_7322_HwErrClear_IBSerdesPClkNotDetectClear_1_RMASK   0x1
 
#define QIB_7322_HwErrClear_IBSerdesPClkNotDetectClear_0_LSB   0x3E
 
#define QIB_7322_HwErrClear_IBSerdesPClkNotDetectClear_0_MSB   0x3E
 
#define QIB_7322_HwErrClear_IBSerdesPClkNotDetectClear_0_RMASK   0x1
 
#define QIB_7322_HwErrClear_PCIESerdesPClkNotDetectClear_LSB   0x37
 
#define QIB_7322_HwErrClear_PCIESerdesPClkNotDetectClear_MSB   0x37
 
#define QIB_7322_HwErrClear_PCIESerdesPClkNotDetectClear_RMASK   0x1
 
#define QIB_7322_HwErrClear_PowerOnBISTFailedClear_LSB   0x36
 
#define QIB_7322_HwErrClear_PowerOnBISTFailedClear_MSB   0x36
 
#define QIB_7322_HwErrClear_PowerOnBISTFailedClear_RMASK   0x1
 
#define QIB_7322_HwErrClear_TempsenseTholdReachedClear_LSB   0x35
 
#define QIB_7322_HwErrClear_TempsenseTholdReachedClear_MSB   0x35
 
#define QIB_7322_HwErrClear_TempsenseTholdReachedClear_RMASK   0x1
 
#define QIB_7322_HwErrClear_MemoryErrClear_LSB   0x30
 
#define QIB_7322_HwErrClear_MemoryErrClear_MSB   0x30
 
#define QIB_7322_HwErrClear_MemoryErrClear_RMASK   0x1
 
#define QIB_7322_HwErrClear_pcie_phy_txParityErr_LSB   0x22
 
#define QIB_7322_HwErrClear_pcie_phy_txParityErr_MSB   0x22
 
#define QIB_7322_HwErrClear_pcie_phy_txParityErr_RMASK   0x1
 
#define QIB_7322_HwErrClear_PCIeBusParityClear_LSB   0x1F
 
#define QIB_7322_HwErrClear_PCIeBusParityClear_MSB   0x21
 
#define QIB_7322_HwErrClear_PCIeBusParityClear_RMASK   0x7
 
#define QIB_7322_HwErrClear_PcieCplTimeoutClear_LSB   0x1E
 
#define QIB_7322_HwErrClear_PcieCplTimeoutClear_MSB   0x1E
 
#define QIB_7322_HwErrClear_PcieCplTimeoutClear_RMASK   0x1
 
#define QIB_7322_HwErrClear_PciePoisonedTLPClear_LSB   0x1D
 
#define QIB_7322_HwErrClear_PciePoisonedTLPClear_MSB   0x1D
 
#define QIB_7322_HwErrClear_PciePoisonedTLPClear_RMASK   0x1
 
#define QIB_7322_HwErrClear_SDmaMemReadErrClear_1_LSB   0x1C
 
#define QIB_7322_HwErrClear_SDmaMemReadErrClear_1_MSB   0x1C
 
#define QIB_7322_HwErrClear_SDmaMemReadErrClear_1_RMASK   0x1
 
#define QIB_7322_HwErrClear_SDmaMemReadErrClear_0_LSB   0x1B
 
#define QIB_7322_HwErrClear_SDmaMemReadErrClear_0_MSB   0x1B
 
#define QIB_7322_HwErrClear_SDmaMemReadErrClear_0_RMASK   0x1
 
#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_LSB   0xF
 
#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_MSB   0xF
 
#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_RMASK   0x1
 
#define QIB_7322_HwErrClear_IBCBusToSPCParityErrClear_1_LSB   0xE
 
#define QIB_7322_HwErrClear_IBCBusToSPCParityErrClear_1_MSB   0xE
 
#define QIB_7322_HwErrClear_IBCBusToSPCParityErrClear_1_RMASK   0x1
 
#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_LSB   0xD
 
#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_MSB   0xD
 
#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_RMASK   0x1
 
#define QIB_7322_HwErrClear_statusValidNoEopClear_LSB   0xC
 
#define QIB_7322_HwErrClear_statusValidNoEopClear_MSB   0xC
 
#define QIB_7322_HwErrClear_statusValidNoEopClear_RMASK   0x1
 
#define QIB_7322_HwErrClear_LATriggeredClear_LSB   0xB
 
#define QIB_7322_HwErrClear_LATriggeredClear_MSB   0xB
 
#define QIB_7322_HwErrClear_LATriggeredClear_RMASK   0x1
 
#define QIB_7322_HwDiagCtrl_OFFS   0xB0
 
#define QIB_7322_HwDiagCtrl_DEF   0x0000000000000000
 
#define QIB_7322_HwDiagCtrl_Diagnostic_LSB   0x3F
 
#define QIB_7322_HwDiagCtrl_Diagnostic_MSB   0x3F
 
#define QIB_7322_HwDiagCtrl_Diagnostic_RMASK   0x1
 
#define QIB_7322_HwDiagCtrl_CounterWrEnable_LSB   0x3D
 
#define QIB_7322_HwDiagCtrl_CounterWrEnable_MSB   0x3D
 
#define QIB_7322_HwDiagCtrl_CounterWrEnable_RMASK   0x1
 
#define QIB_7322_HwDiagCtrl_CounterDisable_LSB   0x3C
 
#define QIB_7322_HwDiagCtrl_CounterDisable_MSB   0x3C
 
#define QIB_7322_HwDiagCtrl_CounterDisable_RMASK   0x1
 
#define QIB_7322_HwDiagCtrl_forcePCIeBusParity_LSB   0x1F
 
#define QIB_7322_HwDiagCtrl_forcePCIeBusParity_MSB   0x22
 
#define QIB_7322_HwDiagCtrl_forcePCIeBusParity_RMASK   0xF
 
#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_LSB   0xF
 
#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_MSB   0xF
 
#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_RMASK   0x1
 
#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_1_LSB   0xE
 
#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_1_MSB   0xE
 
#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_1_RMASK   0x1
 
#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_LSB   0xD
 
#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_MSB   0xD
 
#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_RMASK   0x1
 
#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_0_LSB   0xC
 
#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_0_MSB   0xC
 
#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_0_RMASK   0x1
 
#define QIB_7322_EXTStatus_OFFS   0xC0
 
#define QIB_7322_EXTStatus_DEF   0x000000000000X000
 
#define QIB_7322_EXTStatus_GPIOIn_LSB   0x30
 
#define QIB_7322_EXTStatus_GPIOIn_MSB   0x3F
 
#define QIB_7322_EXTStatus_GPIOIn_RMASK   0xFFFF
 
#define QIB_7322_EXTStatus_MemBISTDisabled_LSB   0xF
 
#define QIB_7322_EXTStatus_MemBISTDisabled_MSB   0xF
 
#define QIB_7322_EXTStatus_MemBISTDisabled_RMASK   0x1
 
#define QIB_7322_EXTStatus_MemBISTEndTest_LSB   0xE
 
#define QIB_7322_EXTStatus_MemBISTEndTest_MSB   0xE
 
#define QIB_7322_EXTStatus_MemBISTEndTest_RMASK   0x1
 
#define QIB_7322_EXTCtrl_OFFS   0xC8
 
#define QIB_7322_EXTCtrl_DEF   0x0000000000000000
 
#define QIB_7322_EXTCtrl_GPIOOe_LSB   0x30
 
#define QIB_7322_EXTCtrl_GPIOOe_MSB   0x3F
 
#define QIB_7322_EXTCtrl_GPIOOe_RMASK   0xFFFF
 
#define QIB_7322_EXTCtrl_GPIOInvert_LSB   0x20
 
#define QIB_7322_EXTCtrl_GPIOInvert_MSB   0x2F
 
#define QIB_7322_EXTCtrl_GPIOInvert_RMASK   0xFFFF
 
#define QIB_7322_EXTCtrl_LEDPort1GreenOn_LSB   0x3
 
#define QIB_7322_EXTCtrl_LEDPort1GreenOn_MSB   0x3
 
#define QIB_7322_EXTCtrl_LEDPort1GreenOn_RMASK   0x1
 
#define QIB_7322_EXTCtrl_LEDPort1YellowOn_LSB   0x2
 
#define QIB_7322_EXTCtrl_LEDPort1YellowOn_MSB   0x2
 
#define QIB_7322_EXTCtrl_LEDPort1YellowOn_RMASK   0x1
 
#define QIB_7322_EXTCtrl_LEDPort0GreenOn_LSB   0x1
 
#define QIB_7322_EXTCtrl_LEDPort0GreenOn_MSB   0x1
 
#define QIB_7322_EXTCtrl_LEDPort0GreenOn_RMASK   0x1
 
#define QIB_7322_EXTCtrl_LEDPort0YellowOn_LSB   0x0
 
#define QIB_7322_EXTCtrl_LEDPort0YellowOn_MSB   0x0
 
#define QIB_7322_EXTCtrl_LEDPort0YellowOn_RMASK   0x1
 
#define QIB_7322_GPIOOut_OFFS   0xE0
 
#define QIB_7322_GPIOOut_DEF   0x0000000000000000
 
#define QIB_7322_GPIOMask_OFFS   0xE8
 
#define QIB_7322_GPIOMask_DEF   0x0000000000000000
 
#define QIB_7322_GPIOStatus_OFFS   0xF0
 
#define QIB_7322_GPIOStatus_DEF   0x0000000000000000
 
#define QIB_7322_GPIOClear_OFFS   0xF8
 
#define QIB_7322_GPIOClear_DEF   0x0000000000000000
 
#define QIB_7322_RcvCtrl_OFFS   0x100
 
#define QIB_7322_RcvCtrl_DEF   0x0000000000000000
 
#define QIB_7322_RcvCtrl_TidReDirect_LSB   0x30
 
#define QIB_7322_RcvCtrl_TidReDirect_MSB   0x3F
 
#define QIB_7322_RcvCtrl_TidReDirect_RMASK   0xFFFF
 
#define QIB_7322_RcvCtrl_TailUpd_LSB   0x2F
 
#define QIB_7322_RcvCtrl_TailUpd_MSB   0x2F
 
#define QIB_7322_RcvCtrl_TailUpd_RMASK   0x1
 
#define QIB_7322_RcvCtrl_XrcTypeCode_LSB   0x2C
 
#define QIB_7322_RcvCtrl_XrcTypeCode_MSB   0x2E
 
#define QIB_7322_RcvCtrl_XrcTypeCode_RMASK   0x7
 
#define QIB_7322_RcvCtrl_TidFlowEnable_LSB   0x2B
 
#define QIB_7322_RcvCtrl_TidFlowEnable_MSB   0x2B
 
#define QIB_7322_RcvCtrl_TidFlowEnable_RMASK   0x1
 
#define QIB_7322_RcvCtrl_ContextCfg_LSB   0x29
 
#define QIB_7322_RcvCtrl_ContextCfg_MSB   0x2A
 
#define QIB_7322_RcvCtrl_ContextCfg_RMASK   0x3
 
#define QIB_7322_RcvCtrl_IntrAvail_LSB   0x14
 
#define QIB_7322_RcvCtrl_IntrAvail_MSB   0x25
 
#define QIB_7322_RcvCtrl_IntrAvail_RMASK   0x3FFFF
 
#define QIB_7322_RcvCtrl_dontDropRHQFull_LSB   0x0
 
#define QIB_7322_RcvCtrl_dontDropRHQFull_MSB   0x11
 
#define QIB_7322_RcvCtrl_dontDropRHQFull_RMASK   0x3FFFF
 
#define QIB_7322_RcvHdrSize_OFFS   0x110
 
#define QIB_7322_RcvHdrSize_DEF   0x0000000000000000
 
#define QIB_7322_RcvHdrCnt_OFFS   0x118
 
#define QIB_7322_RcvHdrCnt_DEF   0x0000000000000000
 
#define QIB_7322_RcvHdrEntSize_OFFS   0x120
 
#define QIB_7322_RcvHdrEntSize_DEF   0x0000000000000000
 
#define QIB_7322_RcvTIDBase_OFFS   0x128
 
#define QIB_7322_RcvTIDBase_DEF   0x0000000000050000
 
#define QIB_7322_RcvTIDCnt_OFFS   0x130
 
#define QIB_7322_RcvTIDCnt_DEF   0x0000000000000200
 
#define QIB_7322_RcvEgrBase_OFFS   0x138
 
#define QIB_7322_RcvEgrBase_DEF   0x0000000000014000
 
#define QIB_7322_RcvEgrCnt_OFFS   0x140
 
#define QIB_7322_RcvEgrCnt_DEF   0x0000000000001000
 
#define QIB_7322_RcvBufBase_OFFS   0x148
 
#define QIB_7322_RcvBufBase_DEF   0x0000000000080000
 
#define QIB_7322_RcvBufSize_OFFS   0x150
 
#define QIB_7322_RcvBufSize_DEF   0x0000000000005000
 
#define QIB_7322_RxIntMemBase_OFFS   0x158
 
#define QIB_7322_RxIntMemBase_DEF   0x0000000000077000
 
#define QIB_7322_RxIntMemSize_OFFS   0x160
 
#define QIB_7322_RxIntMemSize_DEF   0x0000000000007000
 
#define QIB_7322_feature_mask_OFFS   0x190
 
#define QIB_7322_feature_mask_DEF   0x00000000000000XX
 
#define QIB_7322_active_feature_mask_OFFS   0x198
 
#define QIB_7322_active_feature_mask_DEF   0x00000000000000XX
 
#define QIB_7322_active_feature_mask_Port1_QDR_Enabled_LSB   0x5
 
#define QIB_7322_active_feature_mask_Port1_QDR_Enabled_MSB   0x5
 
#define QIB_7322_active_feature_mask_Port1_QDR_Enabled_RMASK   0x1
 
#define QIB_7322_active_feature_mask_Port1_DDR_Enabled_LSB   0x4
 
#define QIB_7322_active_feature_mask_Port1_DDR_Enabled_MSB   0x4
 
#define QIB_7322_active_feature_mask_Port1_DDR_Enabled_RMASK   0x1
 
#define QIB_7322_active_feature_mask_Port1_SDR_Enabled_LSB   0x3
 
#define QIB_7322_active_feature_mask_Port1_SDR_Enabled_MSB   0x3
 
#define QIB_7322_active_feature_mask_Port1_SDR_Enabled_RMASK   0x1
 
#define QIB_7322_active_feature_mask_Port0_QDR_Enabled_LSB   0x2
 
#define QIB_7322_active_feature_mask_Port0_QDR_Enabled_MSB   0x2
 
#define QIB_7322_active_feature_mask_Port0_QDR_Enabled_RMASK   0x1
 
#define QIB_7322_active_feature_mask_Port0_DDR_Enabled_LSB   0x1
 
#define QIB_7322_active_feature_mask_Port0_DDR_Enabled_MSB   0x1
 
#define QIB_7322_active_feature_mask_Port0_DDR_Enabled_RMASK   0x1
 
#define QIB_7322_active_feature_mask_Port0_SDR_Enabled_LSB   0x0
 
#define QIB_7322_active_feature_mask_Port0_SDR_Enabled_MSB   0x0
 
#define QIB_7322_active_feature_mask_Port0_SDR_Enabled_RMASK   0x1
 
#define QIB_7322_SendCtrl_OFFS   0x1C0
 
#define QIB_7322_SendCtrl_DEF   0x0000000000000000
 
#define QIB_7322_SendCtrl_Disarm_LSB   0x1F
 
#define QIB_7322_SendCtrl_Disarm_MSB   0x1F
 
#define QIB_7322_SendCtrl_Disarm_RMASK   0x1
 
#define QIB_7322_SendCtrl_SendBufAvailPad64Byte_LSB   0x1D
 
#define QIB_7322_SendCtrl_SendBufAvailPad64Byte_MSB   0x1D
 
#define QIB_7322_SendCtrl_SendBufAvailPad64Byte_RMASK   0x1
 
#define QIB_7322_SendCtrl_AvailUpdThld_LSB   0x18
 
#define QIB_7322_SendCtrl_AvailUpdThld_MSB   0x1C
 
#define QIB_7322_SendCtrl_AvailUpdThld_RMASK   0x1F
 
#define QIB_7322_SendCtrl_DisarmSendBuf_LSB   0x10
 
#define QIB_7322_SendCtrl_DisarmSendBuf_MSB   0x17
 
#define QIB_7322_SendCtrl_DisarmSendBuf_RMASK   0xFF
 
#define QIB_7322_SendCtrl_SpecialTriggerEn_LSB   0x4
 
#define QIB_7322_SendCtrl_SpecialTriggerEn_MSB   0x4
 
#define QIB_7322_SendCtrl_SpecialTriggerEn_RMASK   0x1
 
#define QIB_7322_SendCtrl_SendBufAvailUpd_LSB   0x2
 
#define QIB_7322_SendCtrl_SendBufAvailUpd_MSB   0x2
 
#define QIB_7322_SendCtrl_SendBufAvailUpd_RMASK   0x1
 
#define QIB_7322_SendCtrl_SendIntBufAvail_LSB   0x1
 
#define QIB_7322_SendCtrl_SendIntBufAvail_MSB   0x1
 
#define QIB_7322_SendCtrl_SendIntBufAvail_RMASK   0x1
 
#define QIB_7322_SendBufBase_OFFS   0x1C8
 
#define QIB_7322_SendBufBase_DEF   0x0018000000100000
 
#define QIB_7322_SendBufBase_BaseAddr_LargePIO_LSB   0x20
 
#define QIB_7322_SendBufBase_BaseAddr_LargePIO_MSB   0x34
 
#define QIB_7322_SendBufBase_BaseAddr_LargePIO_RMASK   0x1FFFFF
 
#define QIB_7322_SendBufBase_BaseAddr_SmallPIO_LSB   0x0
 
#define QIB_7322_SendBufBase_BaseAddr_SmallPIO_MSB   0x14
 
#define QIB_7322_SendBufBase_BaseAddr_SmallPIO_RMASK   0x1FFFFF
 
#define QIB_7322_SendBufSize_OFFS   0x1D0
 
#define QIB_7322_SendBufSize_DEF   0x0000108000000880
 
#define QIB_7322_SendBufSize_Size_LargePIO_LSB   0x20
 
#define QIB_7322_SendBufSize_Size_LargePIO_MSB   0x2C
 
#define QIB_7322_SendBufSize_Size_LargePIO_RMASK   0x1FFF
 
#define QIB_7322_SendBufSize_Size_SmallPIO_LSB   0x0
 
#define QIB_7322_SendBufSize_Size_SmallPIO_MSB   0xB
 
#define QIB_7322_SendBufSize_Size_SmallPIO_RMASK   0xFFF
 
#define QIB_7322_SendBufCnt_OFFS   0x1D8
 
#define QIB_7322_SendBufCnt_DEF   0x0000002000000080
 
#define QIB_7322_SendBufCnt_Num_LargeBuffers_LSB   0x20
 
#define QIB_7322_SendBufCnt_Num_LargeBuffers_MSB   0x25
 
#define QIB_7322_SendBufCnt_Num_LargeBuffers_RMASK   0x3F
 
#define QIB_7322_SendBufCnt_Num_SmallBuffers_LSB   0x0
 
#define QIB_7322_SendBufCnt_Num_SmallBuffers_MSB   0x8
 
#define QIB_7322_SendBufCnt_Num_SmallBuffers_RMASK   0x1FF
 
#define QIB_7322_SendBufAvailAddr_OFFS   0x1E0
 
#define QIB_7322_SendBufAvailAddr_DEF   0x0000000000000000
 
#define QIB_7322_SendBufAvailAddr_SendBufAvailAddr_LSB   0x6
 
#define QIB_7322_SendBufAvailAddr_SendBufAvailAddr_MSB   0x27
 
#define QIB_7322_SendBufAvailAddr_SendBufAvailAddr_RMASK   0x3FFFFFFFF
 
#define QIB_7322_SendBufErr0_OFFS   0x240
 
#define QIB_7322_SendBufErr0_DEF   0x0000000000000000
 
#define QIB_7322_SendBufErr0_SendBufErr_63_0_LSB   0x0
 
#define QIB_7322_SendBufErr0_SendBufErr_63_0_MSB   0x3F
 
#define QIB_7322_SendBufErr0_SendBufErr_63_0_RMASK   0x0
 
#define QIB_7322_AvailUpdCount_OFFS   0x268
 
#define QIB_7322_AvailUpdCount_DEF   0x0000000000000000
 
#define QIB_7322_AvailUpdCount_AvailUpdCount_LSB   0x0
 
#define QIB_7322_AvailUpdCount_AvailUpdCount_MSB   0x4
 
#define QIB_7322_AvailUpdCount_AvailUpdCount_RMASK   0x1F
 
#define QIB_7322_RcvHdrAddr0_OFFS   0x280
 
#define QIB_7322_RcvHdrAddr0_DEF   0x0000000000000000
 
#define QIB_7322_RcvHdrAddr0_RcvHdrAddr_LSB   0x2
 
#define QIB_7322_RcvHdrAddr0_RcvHdrAddr_MSB   0x27
 
#define QIB_7322_RcvHdrAddr0_RcvHdrAddr_RMASK   0x3FFFFFFFFF
 
#define QIB_7322_RcvHdrTailAddr0_OFFS   0x340
 
#define QIB_7322_RcvHdrTailAddr0_DEF   0x0000000000000000
 
#define QIB_7322_RcvHdrTailAddr0_RcvHdrTailAddr_LSB   0x2
 
#define QIB_7322_RcvHdrTailAddr0_RcvHdrTailAddr_MSB   0x27
 
#define QIB_7322_RcvHdrTailAddr0_RcvHdrTailAddr_RMASK   0x3FFFFFFFFF
 
#define QIB_7322_ahb_access_ctrl_OFFS   0x460
 
#define QIB_7322_ahb_access_ctrl_DEF   0x0000000000000000
 
#define QIB_7322_ahb_access_ctrl_sw_sel_ahb_trgt_LSB   0x1
 
#define QIB_7322_ahb_access_ctrl_sw_sel_ahb_trgt_MSB   0x2
 
#define QIB_7322_ahb_access_ctrl_sw_sel_ahb_trgt_RMASK   0x3
 
#define QIB_7322_ahb_access_ctrl_sw_ahb_sel_LSB   0x0
 
#define QIB_7322_ahb_access_ctrl_sw_ahb_sel_MSB   0x0
 
#define QIB_7322_ahb_access_ctrl_sw_ahb_sel_RMASK   0x1
 
#define QIB_7322_ahb_transaction_reg_OFFS   0x468
 
#define QIB_7322_ahb_transaction_reg_DEF   0x0000000080000000
 
#define QIB_7322_ahb_transaction_reg_ahb_data_LSB   0x20
 
#define QIB_7322_ahb_transaction_reg_ahb_data_MSB   0x3F
 
#define QIB_7322_ahb_transaction_reg_ahb_data_RMASK   0xFFFFFFFF
 
#define QIB_7322_ahb_transaction_reg_ahb_rdy_LSB   0x1F
 
#define QIB_7322_ahb_transaction_reg_ahb_rdy_MSB   0x1F
 
#define QIB_7322_ahb_transaction_reg_ahb_rdy_RMASK   0x1
 
#define QIB_7322_ahb_transaction_reg_ahb_req_err_LSB   0x1E
 
#define QIB_7322_ahb_transaction_reg_ahb_req_err_MSB   0x1E
 
#define QIB_7322_ahb_transaction_reg_ahb_req_err_RMASK   0x1
 
#define QIB_7322_ahb_transaction_reg_write_not_read_LSB   0x1B
 
#define QIB_7322_ahb_transaction_reg_write_not_read_MSB   0x1B
 
#define QIB_7322_ahb_transaction_reg_write_not_read_RMASK   0x1
 
#define QIB_7322_ahb_transaction_reg_ahb_address_LSB   0x10
 
#define QIB_7322_ahb_transaction_reg_ahb_address_MSB   0x1A
 
#define QIB_7322_ahb_transaction_reg_ahb_address_RMASK   0x7FF
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_OFFS   0x470
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_DEF   0x0000000000000001
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_SPC_JTAG_ACCESS_EN_LSB   0xA
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_SPC_JTAG_ACCESS_EN_MSB   0xA
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_SPC_JTAG_ACCESS_EN_RMASK   0x1
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_bist_en_LSB   0x5
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_bist_en_MSB   0x9
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_bist_en_RMASK   0x1F
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_opcode_LSB   0x3
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_opcode_MSB   0x4
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_opcode_RMASK   0x3
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_tdi_LSB   0x2
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_tdi_MSB   0x2
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_tdi_RMASK   0x1
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_tdo_LSB   0x1
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_tdo_MSB   0x1
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_tdo_RMASK   0x1
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_rdy_LSB   0x0
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_rdy_MSB   0x0
 
#define QIB_7322_SPC_JTAG_ACCESS_REG_rdy_RMASK   0x1
 
#define QIB_7322_SendCheckMask0_OFFS   0x4C0
 
#define QIB_7322_SendCheckMask0_DEF   0x0000000000000000
 
#define QIB_7322_SendCheckMask0_SendCheckMask_63_32_LSB   0x0
 
#define QIB_7322_SendCheckMask0_SendCheckMask_63_32_MSB   0x3F
 
#define QIB_7322_SendCheckMask0_SendCheckMask_63_32_RMASK   0x0
 
#define QIB_7322_SendGRHCheckMask0_OFFS   0x4E0
 
#define QIB_7322_SendGRHCheckMask0_DEF   0x0000000000000000
 
#define QIB_7322_SendGRHCheckMask0_SendGRHCheckMask_63_32_LSB   0x0
 
#define QIB_7322_SendGRHCheckMask0_SendGRHCheckMask_63_32_MSB   0x3F
 
#define QIB_7322_SendGRHCheckMask0_SendGRHCheckMask_63_32_RMASK   0x0
 
#define QIB_7322_SendIBPacketMask0_OFFS   0x500
 
#define QIB_7322_SendIBPacketMask0_DEF   0x0000000000000000
 
#define QIB_7322_SendIBPacketMask0_SendIBPacketMask_63_32_LSB   0x0
 
#define QIB_7322_SendIBPacketMask0_SendIBPacketMask_63_32_MSB   0x3F
 
#define QIB_7322_SendIBPacketMask0_SendIBPacketMask_63_32_RMASK   0x0
 
#define QIB_7322_IntRedirect0_OFFS   0x540
 
#define QIB_7322_IntRedirect0_DEF   0x0000000000000000
 
#define QIB_7322_IntRedirect0_vec11_LSB   0x37
 
#define QIB_7322_IntRedirect0_vec11_MSB   0x3B
 
#define QIB_7322_IntRedirect0_vec11_RMASK   0x1F
 
#define QIB_7322_IntRedirect0_vec10_LSB   0x32
 
#define QIB_7322_IntRedirect0_vec10_MSB   0x36
 
#define QIB_7322_IntRedirect0_vec10_RMASK   0x1F
 
#define QIB_7322_IntRedirect0_vec9_LSB   0x2D
 
#define QIB_7322_IntRedirect0_vec9_MSB   0x31
 
#define QIB_7322_IntRedirect0_vec9_RMASK   0x1F
 
#define QIB_7322_IntRedirect0_vec8_LSB   0x28
 
#define QIB_7322_IntRedirect0_vec8_MSB   0x2C
 
#define QIB_7322_IntRedirect0_vec8_RMASK   0x1F
 
#define QIB_7322_IntRedirect0_vec7_LSB   0x23
 
#define QIB_7322_IntRedirect0_vec7_MSB   0x27
 
#define QIB_7322_IntRedirect0_vec7_RMASK   0x1F
 
#define QIB_7322_IntRedirect0_vec6_LSB   0x1E
 
#define QIB_7322_IntRedirect0_vec6_MSB   0x22
 
#define QIB_7322_IntRedirect0_vec6_RMASK   0x1F
 
#define QIB_7322_IntRedirect0_vec5_LSB   0x19
 
#define QIB_7322_IntRedirect0_vec5_MSB   0x1D
 
#define QIB_7322_IntRedirect0_vec5_RMASK   0x1F
 
#define QIB_7322_IntRedirect0_vec4_LSB   0x14
 
#define QIB_7322_IntRedirect0_vec4_MSB   0x18
 
#define QIB_7322_IntRedirect0_vec4_RMASK   0x1F
 
#define QIB_7322_IntRedirect0_vec3_LSB   0xF
 
#define QIB_7322_IntRedirect0_vec3_MSB   0x13
 
#define QIB_7322_IntRedirect0_vec3_RMASK   0x1F
 
#define QIB_7322_IntRedirect0_vec2_LSB   0xA
 
#define QIB_7322_IntRedirect0_vec2_MSB   0xE
 
#define QIB_7322_IntRedirect0_vec2_RMASK   0x1F
 
#define QIB_7322_IntRedirect0_vec1_LSB   0x5
 
#define QIB_7322_IntRedirect0_vec1_MSB   0x9
 
#define QIB_7322_IntRedirect0_vec1_RMASK   0x1F
 
#define QIB_7322_IntRedirect0_vec0_LSB   0x0
 
#define QIB_7322_IntRedirect0_vec0_MSB   0x4
 
#define QIB_7322_IntRedirect0_vec0_RMASK   0x1F
 
#define QIB_7322_Int_Granted_OFFS   0x570
 
#define QIB_7322_Int_Granted_DEF   0x0000000000000000
 
#define QIB_7322_vec_clr_without_int_OFFS   0x578
 
#define QIB_7322_vec_clr_without_int_DEF   0x0000000000000000
 
#define QIB_7322_DCACtrlA_OFFS   0x580
 
#define QIB_7322_DCACtrlA_DEF   0x0000000000000000
 
#define QIB_7322_DCACtrlA_SendDMAHead1DCAEnable_LSB   0x4
 
#define QIB_7322_DCACtrlA_SendDMAHead1DCAEnable_MSB   0x4
 
#define QIB_7322_DCACtrlA_SendDMAHead1DCAEnable_RMASK   0x1
 
#define QIB_7322_DCACtrlA_SendDMAHead0DCAEnable_LSB   0x3
 
#define QIB_7322_DCACtrlA_SendDMAHead0DCAEnable_MSB   0x3
 
#define QIB_7322_DCACtrlA_SendDMAHead0DCAEnable_RMASK   0x1
 
#define QIB_7322_DCACtrlA_RcvTailUpdDCAEnable_LSB   0x2
 
#define QIB_7322_DCACtrlA_RcvTailUpdDCAEnable_MSB   0x2
 
#define QIB_7322_DCACtrlA_RcvTailUpdDCAEnable_RMASK   0x1
 
#define QIB_7322_DCACtrlA_EagerDCAEnable_LSB   0x1
 
#define QIB_7322_DCACtrlA_EagerDCAEnable_MSB   0x1
 
#define QIB_7322_DCACtrlA_EagerDCAEnable_RMASK   0x1
 
#define QIB_7322_DCACtrlA_RcvHdrqDCAEnable_LSB   0x0
 
#define QIB_7322_DCACtrlA_RcvHdrqDCAEnable_MSB   0x0
 
#define QIB_7322_DCACtrlA_RcvHdrqDCAEnable_RMASK   0x1
 
#define QIB_7322_DCACtrlB_OFFS   0x588
 
#define QIB_7322_DCACtrlB_DEF   0x0000000000000000
 
#define QIB_7322_DCACtrlB_RcvHdrq3DCAXfrCnt_LSB   0x36
 
#define QIB_7322_DCACtrlB_RcvHdrq3DCAXfrCnt_MSB   0x3B
 
#define QIB_7322_DCACtrlB_RcvHdrq3DCAXfrCnt_RMASK   0x3F
 
#define QIB_7322_DCACtrlB_RcvHdrq3DCAOPH_LSB   0x2E
 
#define QIB_7322_DCACtrlB_RcvHdrq3DCAOPH_MSB   0x35
 
#define QIB_7322_DCACtrlB_RcvHdrq3DCAOPH_RMASK   0xFF
 
#define QIB_7322_DCACtrlB_RcvHdrq2DCAXfrCnt_LSB   0x28
 
#define QIB_7322_DCACtrlB_RcvHdrq2DCAXfrCnt_MSB   0x2D
 
#define QIB_7322_DCACtrlB_RcvHdrq2DCAXfrCnt_RMASK   0x3F
 
#define QIB_7322_DCACtrlB_RcvHdrq2DCAOPH_LSB   0x20
 
#define QIB_7322_DCACtrlB_RcvHdrq2DCAOPH_MSB   0x27
 
#define QIB_7322_DCACtrlB_RcvHdrq2DCAOPH_RMASK   0xFF
 
#define QIB_7322_DCACtrlB_RcvHdrq1DCAXfrCnt_LSB   0x16
 
#define QIB_7322_DCACtrlB_RcvHdrq1DCAXfrCnt_MSB   0x1B
 
#define QIB_7322_DCACtrlB_RcvHdrq1DCAXfrCnt_RMASK   0x3F
 
#define QIB_7322_DCACtrlB_RcvHdrq1DCAOPH_LSB   0xE
 
#define QIB_7322_DCACtrlB_RcvHdrq1DCAOPH_MSB   0x15
 
#define QIB_7322_DCACtrlB_RcvHdrq1DCAOPH_RMASK   0xFF
 
#define QIB_7322_DCACtrlB_RcvHdrq0DCAXfrCnt_LSB   0x8
 
#define QIB_7322_DCACtrlB_RcvHdrq0DCAXfrCnt_MSB   0xD
 
#define QIB_7322_DCACtrlB_RcvHdrq0DCAXfrCnt_RMASK   0x3F
 
#define QIB_7322_DCACtrlB_RcvHdrq0DCAOPH_LSB   0x0
 
#define QIB_7322_DCACtrlB_RcvHdrq0DCAOPH_MSB   0x7
 
#define QIB_7322_DCACtrlB_RcvHdrq0DCAOPH_RMASK   0xFF
 
#define QIB_7322_DCACtrlC_OFFS   0x590
 
#define QIB_7322_DCACtrlC_DEF   0x0000000000000000
 
#define QIB_7322_DCACtrlC_RcvHdrq7DCAXfrCnt_LSB   0x36
 
#define QIB_7322_DCACtrlC_RcvHdrq7DCAXfrCnt_MSB   0x3B
 
#define QIB_7322_DCACtrlC_RcvHdrq7DCAXfrCnt_RMASK   0x3F
 
#define QIB_7322_DCACtrlC_RcvHdrq7DCAOPH_LSB   0x2E
 
#define QIB_7322_DCACtrlC_RcvHdrq7DCAOPH_MSB   0x35
 
#define QIB_7322_DCACtrlC_RcvHdrq7DCAOPH_RMASK   0xFF
 
#define QIB_7322_DCACtrlC_RcvHdrq6DCAXfrCnt_LSB   0x28
 
#define QIB_7322_DCACtrlC_RcvHdrq6DCAXfrCnt_MSB   0x2D
 
#define QIB_7322_DCACtrlC_RcvHdrq6DCAXfrCnt_RMASK   0x3F
 
#define QIB_7322_DCACtrlC_RcvHdrq6DCAOPH_LSB   0x20
 
#define QIB_7322_DCACtrlC_RcvHdrq6DCAOPH_MSB   0x27
 
#define QIB_7322_DCACtrlC_RcvHdrq6DCAOPH_RMASK   0xFF
 
#define QIB_7322_DCACtrlC_RcvHdrq5DCAXfrCnt_LSB   0x16
 
#define QIB_7322_DCACtrlC_RcvHdrq5DCAXfrCnt_MSB   0x1B
 
#define QIB_7322_DCACtrlC_RcvHdrq5DCAXfrCnt_RMASK   0x3F
 
#define QIB_7322_DCACtrlC_RcvHdrq5DCAOPH_LSB   0xE
 
#define QIB_7322_DCACtrlC_RcvHdrq5DCAOPH_MSB   0x15
 
#define QIB_7322_DCACtrlC_RcvHdrq5DCAOPH_RMASK   0xFF
 
#define QIB_7322_DCACtrlC_RcvHdrq4DCAXfrCnt_LSB   0x8
 
#define QIB_7322_DCACtrlC_RcvHdrq4DCAXfrCnt_MSB   0xD
 
#define QIB_7322_DCACtrlC_RcvHdrq4DCAXfrCnt_RMASK   0x3F
 
#define QIB_7322_DCACtrlC_RcvHdrq4DCAOPH_LSB   0x0
 
#define QIB_7322_DCACtrlC_RcvHdrq4DCAOPH_MSB   0x7
 
#define QIB_7322_DCACtrlC_RcvHdrq4DCAOPH_RMASK   0xFF
 
#define QIB_7322_DCACtrlD_OFFS   0x598
 
#define QIB_7322_DCACtrlD_DEF   0x0000000000000000
 
#define QIB_7322_DCACtrlD_RcvHdrq11DCAXfrCnt_LSB   0x36
 
#define QIB_7322_DCACtrlD_RcvHdrq11DCAXfrCnt_MSB   0x3B
 
#define QIB_7322_DCACtrlD_RcvHdrq11DCAXfrCnt_RMASK   0x3F
 
#define QIB_7322_DCACtrlD_RcvHdrq11DCAOPH_LSB   0x2E
 
#define QIB_7322_DCACtrlD_RcvHdrq11DCAOPH_MSB   0x35
 
#define QIB_7322_DCACtrlD_RcvHdrq11DCAOPH_RMASK   0xFF
 
#define QIB_7322_DCACtrlD_RcvHdrq10DCAXfrCnt_LSB   0x28
 
#define QIB_7322_DCACtrlD_RcvHdrq10DCAXfrCnt_MSB   0x2D
 
#define QIB_7322_DCACtrlD_RcvHdrq10DCAXfrCnt_RMASK   0x3F
 
#define QIB_7322_DCACtrlD_RcvHdrq10DCAOPH_LSB   0x20
 
#define QIB_7322_DCACtrlD_RcvHdrq10DCAOPH_MSB   0x27
 
#define QIB_7322_DCACtrlD_RcvHdrq10DCAOPH_RMASK   0xFF
 
#define QIB_7322_DCACtrlD_RcvHdrq9DCAXfrCnt_LSB   0x16
 
#define QIB_7322_DCACtrlD_RcvHdrq9DCAXfrCnt_MSB   0x1B
 
#define QIB_7322_DCACtrlD_RcvHdrq9DCAXfrCnt_RMASK   0x3F
 
#define QIB_7322_DCACtrlD_RcvHdrq9DCAOPH_LSB   0xE
 
#define QIB_7322_DCACtrlD_RcvHdrq9DCAOPH_MSB   0x15
 
#define QIB_7322_DCACtrlD_RcvHdrq9DCAOPH_RMASK   0xFF
 
#define QIB_7322_DCACtrlD_RcvHdrq8DCAXfrCnt_LSB   0x8
 
#define QIB_7322_DCACtrlD_RcvHdrq8DCAXfrCnt_MSB   0xD
 
#define QIB_7322_DCACtrlD_RcvHdrq8DCAXfrCnt_RMASK   0x3F
 
#define QIB_7322_DCACtrlD_RcvHdrq8DCAOPH_LSB   0x0
 
#define QIB_7322_DCACtrlD_RcvHdrq8DCAOPH_MSB   0x7
 
#define QIB_7322_DCACtrlD_RcvHdrq8DCAOPH_RMASK   0xFF
 
#define QIB_7322_DCACtrlE_OFFS   0x5A0
 
#define QIB_7322_DCACtrlE_DEF   0x0000000000000000
 
#define QIB_7322_DCACtrlE_RcvHdrq15DCAXfrCnt_LSB   0x36
 
#define QIB_7322_DCACtrlE_RcvHdrq15DCAXfrCnt_MSB   0x3B
 
#define QIB_7322_DCACtrlE_RcvHdrq15DCAXfrCnt_RMASK   0x3F
 
#define QIB_7322_DCACtrlE_RcvHdrq15DCAOPH_LSB   0x2E
 
#define QIB_7322_DCACtrlE_RcvHdrq15DCAOPH_MSB   0x35
 
#define QIB_7322_DCACtrlE_RcvHdrq15DCAOPH_RMASK   0xFF
 
#define QIB_7322_DCACtrlE_RcvHdrq14DCAXfrCnt_LSB   0x28
 
#define QIB_7322_DCACtrlE_RcvHdrq14DCAXfrCnt_MSB   0x2D
 
#define QIB_7322_DCACtrlE_RcvHdrq14DCAXfrCnt_RMASK   0x3F
 
#define QIB_7322_DCACtrlE_RcvHdrq14DCAOPH_LSB   0x20
 
#define QIB_7322_DCACtrlE_RcvHdrq14DCAOPH_MSB   0x27
 
#define QIB_7322_DCACtrlE_RcvHdrq14DCAOPH_RMASK   0xFF
 
#define QIB_7322_DCACtrlE_RcvHdrq13DCAXfrCnt_LSB   0x16
 
#define QIB_7322_DCACtrlE_RcvHdrq13DCAXfrCnt_MSB   0x1B
 
#define QIB_7322_DCACtrlE_RcvHdrq13DCAXfrCnt_RMASK   0x3F
 
#define QIB_7322_DCACtrlE_RcvHdrq13DCAOPH_LSB   0xE
 
#define QIB_7322_DCACtrlE_RcvHdrq13DCAOPH_MSB   0x15
 
#define QIB_7322_DCACtrlE_RcvHdrq13DCAOPH_RMASK   0xFF
 
#define QIB_7322_DCACtrlE_RcvHdrq12DCAXfrCnt_LSB   0x8
 
#define QIB_7322_DCACtrlE_RcvHdrq12DCAXfrCnt_MSB   0xD
 
#define QIB_7322_DCACtrlE_RcvHdrq12DCAXfrCnt_RMASK   0x3F
 
#define QIB_7322_DCACtrlE_RcvHdrq12DCAOPH_LSB   0x0
 
#define QIB_7322_DCACtrlE_RcvHdrq12DCAOPH_MSB   0x7
 
#define QIB_7322_DCACtrlE_RcvHdrq12DCAOPH_RMASK   0xFF
 
#define QIB_7322_DCACtrlF_OFFS   0x5A8
 
#define QIB_7322_DCACtrlF_DEF   0x0000000000000000
 
#define QIB_7322_DCACtrlF_SendDma1DCAOPH_LSB   0x28
 
#define QIB_7322_DCACtrlF_SendDma1DCAOPH_MSB   0x2F
 
#define QIB_7322_DCACtrlF_SendDma1DCAOPH_RMASK   0xFF
 
#define QIB_7322_DCACtrlF_SendDma0DCAOPH_LSB   0x20
 
#define QIB_7322_DCACtrlF_SendDma0DCAOPH_MSB   0x27
 
#define QIB_7322_DCACtrlF_SendDma0DCAOPH_RMASK   0xFF
 
#define QIB_7322_DCACtrlF_RcvHdrq17DCAXfrCnt_LSB   0x16
 
#define QIB_7322_DCACtrlF_RcvHdrq17DCAXfrCnt_MSB   0x1B
 
#define QIB_7322_DCACtrlF_RcvHdrq17DCAXfrCnt_RMASK   0x3F
 
#define QIB_7322_DCACtrlF_RcvHdrq17DCAOPH_LSB   0xE
 
#define QIB_7322_DCACtrlF_RcvHdrq17DCAOPH_MSB   0x15
 
#define QIB_7322_DCACtrlF_RcvHdrq17DCAOPH_RMASK   0xFF
 
#define QIB_7322_DCACtrlF_RcvHdrq16DCAXfrCnt_LSB   0x8
 
#define QIB_7322_DCACtrlF_RcvHdrq16DCAXfrCnt_MSB   0xD
 
#define QIB_7322_DCACtrlF_RcvHdrq16DCAXfrCnt_RMASK   0x3F
 
#define QIB_7322_DCACtrlF_RcvHdrq16DCAOPH_LSB   0x0
 
#define QIB_7322_DCACtrlF_RcvHdrq16DCAOPH_MSB   0x7
 
#define QIB_7322_DCACtrlF_RcvHdrq16DCAOPH_RMASK   0xFF
 
#define QIB_7322_RcvAvailTimeOut0_OFFS   0xC00
 
#define QIB_7322_RcvAvailTimeOut0_DEF   0x0000000000000000
 
#define QIB_7322_RcvAvailTimeOut0_RcvAvailTOCount_LSB   0x10
 
#define QIB_7322_RcvAvailTimeOut0_RcvAvailTOCount_MSB   0x1F
 
#define QIB_7322_RcvAvailTimeOut0_RcvAvailTOCount_RMASK   0xFFFF
 
#define QIB_7322_RcvAvailTimeOut0_RcvAvailTOReload_LSB   0x0
 
#define QIB_7322_RcvAvailTimeOut0_RcvAvailTOReload_MSB   0xF
 
#define QIB_7322_RcvAvailTimeOut0_RcvAvailTOReload_RMASK   0xFFFF
 
#define QIB_7322_CntrRegBase_0_OFFS   0x1028
 
#define QIB_7322_CntrRegBase_0_DEF   0x0000000000012000
 
#define QIB_7322_ErrMask_0_OFFS   0x1080
 
#define QIB_7322_ErrMask_0_DEF   0x0000000000000000
 
#define QIB_7322_ErrMask_0_IBStatusChangedMask_LSB   0x3A
 
#define QIB_7322_ErrMask_0_IBStatusChangedMask_MSB   0x3A
 
#define QIB_7322_ErrMask_0_IBStatusChangedMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SHeadersErrMask_LSB   0x39
 
#define QIB_7322_ErrMask_0_SHeadersErrMask_MSB   0x39
 
#define QIB_7322_ErrMask_0_SHeadersErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_VL15BufMisuseErrMask_LSB   0x36
 
#define QIB_7322_ErrMask_0_VL15BufMisuseErrMask_MSB   0x36
 
#define QIB_7322_ErrMask_0_VL15BufMisuseErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SDmaHaltErrMask_LSB   0x31
 
#define QIB_7322_ErrMask_0_SDmaHaltErrMask_MSB   0x31
 
#define QIB_7322_ErrMask_0_SDmaHaltErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SDmaDescAddrMisalignErrMask_LSB   0x30
 
#define QIB_7322_ErrMask_0_SDmaDescAddrMisalignErrMask_MSB   0x30
 
#define QIB_7322_ErrMask_0_SDmaDescAddrMisalignErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SDmaUnexpDataErrMask_LSB   0x2F
 
#define QIB_7322_ErrMask_0_SDmaUnexpDataErrMask_MSB   0x2F
 
#define QIB_7322_ErrMask_0_SDmaUnexpDataErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SDmaMissingDwErrMask_LSB   0x2E
 
#define QIB_7322_ErrMask_0_SDmaMissingDwErrMask_MSB   0x2E
 
#define QIB_7322_ErrMask_0_SDmaMissingDwErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SDmaDwEnErrMask_LSB   0x2D
 
#define QIB_7322_ErrMask_0_SDmaDwEnErrMask_MSB   0x2D
 
#define QIB_7322_ErrMask_0_SDmaDwEnErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SDmaRpyTagErrMask_LSB   0x2C
 
#define QIB_7322_ErrMask_0_SDmaRpyTagErrMask_MSB   0x2C
 
#define QIB_7322_ErrMask_0_SDmaRpyTagErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SDma1stDescErrMask_LSB   0x2B
 
#define QIB_7322_ErrMask_0_SDma1stDescErrMask_MSB   0x2B
 
#define QIB_7322_ErrMask_0_SDma1stDescErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SDmaBaseErrMask_LSB   0x2A
 
#define QIB_7322_ErrMask_0_SDmaBaseErrMask_MSB   0x2A
 
#define QIB_7322_ErrMask_0_SDmaBaseErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SDmaTailOutOfBoundErrMask_LSB   0x29
 
#define QIB_7322_ErrMask_0_SDmaTailOutOfBoundErrMask_MSB   0x29
 
#define QIB_7322_ErrMask_0_SDmaTailOutOfBoundErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SDmaOutOfBoundErrMask_LSB   0x28
 
#define QIB_7322_ErrMask_0_SDmaOutOfBoundErrMask_MSB   0x28
 
#define QIB_7322_ErrMask_0_SDmaOutOfBoundErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SDmaGenMismatchErrMask_LSB   0x27
 
#define QIB_7322_ErrMask_0_SDmaGenMismatchErrMask_MSB   0x27
 
#define QIB_7322_ErrMask_0_SDmaGenMismatchErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SendBufMisuseErrMask_LSB   0x26
 
#define QIB_7322_ErrMask_0_SendBufMisuseErrMask_MSB   0x26
 
#define QIB_7322_ErrMask_0_SendBufMisuseErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SendUnsupportedVLErrMask_LSB   0x25
 
#define QIB_7322_ErrMask_0_SendUnsupportedVLErrMask_MSB   0x25
 
#define QIB_7322_ErrMask_0_SendUnsupportedVLErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SendUnexpectedPktNumErrMask_LSB   0x24
 
#define QIB_7322_ErrMask_0_SendUnexpectedPktNumErrMask_MSB   0x24
 
#define QIB_7322_ErrMask_0_SendUnexpectedPktNumErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SendDroppedDataPktErrMask_LSB   0x22
 
#define QIB_7322_ErrMask_0_SendDroppedDataPktErrMask_MSB   0x22
 
#define QIB_7322_ErrMask_0_SendDroppedDataPktErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SendDroppedSmpPktErrMask_LSB   0x21
 
#define QIB_7322_ErrMask_0_SendDroppedSmpPktErrMask_MSB   0x21
 
#define QIB_7322_ErrMask_0_SendDroppedSmpPktErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SendPktLenErrMask_LSB   0x20
 
#define QIB_7322_ErrMask_0_SendPktLenErrMask_MSB   0x20
 
#define QIB_7322_ErrMask_0_SendPktLenErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SendUnderRunErrMask_LSB   0x1F
 
#define QIB_7322_ErrMask_0_SendUnderRunErrMask_MSB   0x1F
 
#define QIB_7322_ErrMask_0_SendUnderRunErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SendMaxPktLenErrMask_LSB   0x1E
 
#define QIB_7322_ErrMask_0_SendMaxPktLenErrMask_MSB   0x1E
 
#define QIB_7322_ErrMask_0_SendMaxPktLenErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_SendMinPktLenErrMask_LSB   0x1D
 
#define QIB_7322_ErrMask_0_SendMinPktLenErrMask_MSB   0x1D
 
#define QIB_7322_ErrMask_0_SendMinPktLenErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_RcvIBLostLinkErrMask_LSB   0x11
 
#define QIB_7322_ErrMask_0_RcvIBLostLinkErrMask_MSB   0x11
 
#define QIB_7322_ErrMask_0_RcvIBLostLinkErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_RcvHdrErrMask_LSB   0x10
 
#define QIB_7322_ErrMask_0_RcvHdrErrMask_MSB   0x10
 
#define QIB_7322_ErrMask_0_RcvHdrErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_RcvHdrLenErrMask_LSB   0xF
 
#define QIB_7322_ErrMask_0_RcvHdrLenErrMask_MSB   0xF
 
#define QIB_7322_ErrMask_0_RcvHdrLenErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_RcvBadTidErrMask_LSB   0xE
 
#define QIB_7322_ErrMask_0_RcvBadTidErrMask_MSB   0xE
 
#define QIB_7322_ErrMask_0_RcvBadTidErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_RcvBadVersionErrMask_LSB   0xB
 
#define QIB_7322_ErrMask_0_RcvBadVersionErrMask_MSB   0xB
 
#define QIB_7322_ErrMask_0_RcvBadVersionErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_RcvIBFlowErrMask_LSB   0xA
 
#define QIB_7322_ErrMask_0_RcvIBFlowErrMask_MSB   0xA
 
#define QIB_7322_ErrMask_0_RcvIBFlowErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_RcvEBPErrMask_LSB   0x9
 
#define QIB_7322_ErrMask_0_RcvEBPErrMask_MSB   0x9
 
#define QIB_7322_ErrMask_0_RcvEBPErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_RcvUnsupportedVLErrMask_LSB   0x8
 
#define QIB_7322_ErrMask_0_RcvUnsupportedVLErrMask_MSB   0x8
 
#define QIB_7322_ErrMask_0_RcvUnsupportedVLErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_RcvUnexpectedCharErrMask_LSB   0x7
 
#define QIB_7322_ErrMask_0_RcvUnexpectedCharErrMask_MSB   0x7
 
#define QIB_7322_ErrMask_0_RcvUnexpectedCharErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_RcvShortPktLenErrMask_LSB   0x6
 
#define QIB_7322_ErrMask_0_RcvShortPktLenErrMask_MSB   0x6
 
#define QIB_7322_ErrMask_0_RcvShortPktLenErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_RcvLongPktLenErrMask_LSB   0x5
 
#define QIB_7322_ErrMask_0_RcvLongPktLenErrMask_MSB   0x5
 
#define QIB_7322_ErrMask_0_RcvLongPktLenErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_RcvMaxPktLenErrMask_LSB   0x4
 
#define QIB_7322_ErrMask_0_RcvMaxPktLenErrMask_MSB   0x4
 
#define QIB_7322_ErrMask_0_RcvMaxPktLenErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_RcvMinPktLenErrMask_LSB   0x3
 
#define QIB_7322_ErrMask_0_RcvMinPktLenErrMask_MSB   0x3
 
#define QIB_7322_ErrMask_0_RcvMinPktLenErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_RcvICRCErrMask_LSB   0x2
 
#define QIB_7322_ErrMask_0_RcvICRCErrMask_MSB   0x2
 
#define QIB_7322_ErrMask_0_RcvICRCErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_RcvVCRCErrMask_LSB   0x1
 
#define QIB_7322_ErrMask_0_RcvVCRCErrMask_MSB   0x1
 
#define QIB_7322_ErrMask_0_RcvVCRCErrMask_RMASK   0x1
 
#define QIB_7322_ErrMask_0_RcvFormatErrMask_LSB   0x0
 
#define QIB_7322_ErrMask_0_RcvFormatErrMask_MSB   0x0
 
#define QIB_7322_ErrMask_0_RcvFormatErrMask_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_OFFS   0x1088
 
#define QIB_7322_ErrStatus_0_DEF   0x0000000000000000
 
#define QIB_7322_ErrStatus_0_IBStatusChanged_LSB   0x3A
 
#define QIB_7322_ErrStatus_0_IBStatusChanged_MSB   0x3A
 
#define QIB_7322_ErrStatus_0_IBStatusChanged_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SHeadersErr_LSB   0x39
 
#define QIB_7322_ErrStatus_0_SHeadersErr_MSB   0x39
 
#define QIB_7322_ErrStatus_0_SHeadersErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_VL15BufMisuseErr_LSB   0x36
 
#define QIB_7322_ErrStatus_0_VL15BufMisuseErr_MSB   0x36
 
#define QIB_7322_ErrStatus_0_VL15BufMisuseErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SDmaHaltErr_LSB   0x31
 
#define QIB_7322_ErrStatus_0_SDmaHaltErr_MSB   0x31
 
#define QIB_7322_ErrStatus_0_SDmaHaltErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SDmaDescAddrMisalignErr_LSB   0x30
 
#define QIB_7322_ErrStatus_0_SDmaDescAddrMisalignErr_MSB   0x30
 
#define QIB_7322_ErrStatus_0_SDmaDescAddrMisalignErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SDmaUnexpDataErr_LSB   0x2F
 
#define QIB_7322_ErrStatus_0_SDmaUnexpDataErr_MSB   0x2F
 
#define QIB_7322_ErrStatus_0_SDmaUnexpDataErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SDmaMissingDwErr_LSB   0x2E
 
#define QIB_7322_ErrStatus_0_SDmaMissingDwErr_MSB   0x2E
 
#define QIB_7322_ErrStatus_0_SDmaMissingDwErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SDmaDwEnErr_LSB   0x2D
 
#define QIB_7322_ErrStatus_0_SDmaDwEnErr_MSB   0x2D
 
#define QIB_7322_ErrStatus_0_SDmaDwEnErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SDmaRpyTagErr_LSB   0x2C
 
#define QIB_7322_ErrStatus_0_SDmaRpyTagErr_MSB   0x2C
 
#define QIB_7322_ErrStatus_0_SDmaRpyTagErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SDma1stDescErr_LSB   0x2B
 
#define QIB_7322_ErrStatus_0_SDma1stDescErr_MSB   0x2B
 
#define QIB_7322_ErrStatus_0_SDma1stDescErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SDmaBaseErr_LSB   0x2A
 
#define QIB_7322_ErrStatus_0_SDmaBaseErr_MSB   0x2A
 
#define QIB_7322_ErrStatus_0_SDmaBaseErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SDmaTailOutOfBoundErr_LSB   0x29
 
#define QIB_7322_ErrStatus_0_SDmaTailOutOfBoundErr_MSB   0x29
 
#define QIB_7322_ErrStatus_0_SDmaTailOutOfBoundErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SDmaOutOfBoundErr_LSB   0x28
 
#define QIB_7322_ErrStatus_0_SDmaOutOfBoundErr_MSB   0x28
 
#define QIB_7322_ErrStatus_0_SDmaOutOfBoundErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SDmaGenMismatchErr_LSB   0x27
 
#define QIB_7322_ErrStatus_0_SDmaGenMismatchErr_MSB   0x27
 
#define QIB_7322_ErrStatus_0_SDmaGenMismatchErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SendBufMisuseErr_LSB   0x26
 
#define QIB_7322_ErrStatus_0_SendBufMisuseErr_MSB   0x26
 
#define QIB_7322_ErrStatus_0_SendBufMisuseErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SendUnsupportedVLErr_LSB   0x25
 
#define QIB_7322_ErrStatus_0_SendUnsupportedVLErr_MSB   0x25
 
#define QIB_7322_ErrStatus_0_SendUnsupportedVLErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SendUnexpectedPktNumErr_LSB   0x24
 
#define QIB_7322_ErrStatus_0_SendUnexpectedPktNumErr_MSB   0x24
 
#define QIB_7322_ErrStatus_0_SendUnexpectedPktNumErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SendDroppedDataPktErr_LSB   0x22
 
#define QIB_7322_ErrStatus_0_SendDroppedDataPktErr_MSB   0x22
 
#define QIB_7322_ErrStatus_0_SendDroppedDataPktErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SendDroppedSmpPktErr_LSB   0x21
 
#define QIB_7322_ErrStatus_0_SendDroppedSmpPktErr_MSB   0x21
 
#define QIB_7322_ErrStatus_0_SendDroppedSmpPktErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SendPktLenErr_LSB   0x20
 
#define QIB_7322_ErrStatus_0_SendPktLenErr_MSB   0x20
 
#define QIB_7322_ErrStatus_0_SendPktLenErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SendUnderRunErr_LSB   0x1F
 
#define QIB_7322_ErrStatus_0_SendUnderRunErr_MSB   0x1F
 
#define QIB_7322_ErrStatus_0_SendUnderRunErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SendMaxPktLenErr_LSB   0x1E
 
#define QIB_7322_ErrStatus_0_SendMaxPktLenErr_MSB   0x1E
 
#define QIB_7322_ErrStatus_0_SendMaxPktLenErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_SendMinPktLenErr_LSB   0x1D
 
#define QIB_7322_ErrStatus_0_SendMinPktLenErr_MSB   0x1D
 
#define QIB_7322_ErrStatus_0_SendMinPktLenErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_RcvIBLostLinkErr_LSB   0x11
 
#define QIB_7322_ErrStatus_0_RcvIBLostLinkErr_MSB   0x11
 
#define QIB_7322_ErrStatus_0_RcvIBLostLinkErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_RcvHdrErr_LSB   0x10
 
#define QIB_7322_ErrStatus_0_RcvHdrErr_MSB   0x10
 
#define QIB_7322_ErrStatus_0_RcvHdrErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_RcvHdrLenErr_LSB   0xF
 
#define QIB_7322_ErrStatus_0_RcvHdrLenErr_MSB   0xF
 
#define QIB_7322_ErrStatus_0_RcvHdrLenErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_RcvBadTidErr_LSB   0xE
 
#define QIB_7322_ErrStatus_0_RcvBadTidErr_MSB   0xE
 
#define QIB_7322_ErrStatus_0_RcvBadTidErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_RcvBadVersionErr_LSB   0xB
 
#define QIB_7322_ErrStatus_0_RcvBadVersionErr_MSB   0xB
 
#define QIB_7322_ErrStatus_0_RcvBadVersionErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_RcvIBFlowErr_LSB   0xA
 
#define QIB_7322_ErrStatus_0_RcvIBFlowErr_MSB   0xA
 
#define QIB_7322_ErrStatus_0_RcvIBFlowErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_RcvEBPErr_LSB   0x9
 
#define QIB_7322_ErrStatus_0_RcvEBPErr_MSB   0x9
 
#define QIB_7322_ErrStatus_0_RcvEBPErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_RcvUnsupportedVLErr_LSB   0x8
 
#define QIB_7322_ErrStatus_0_RcvUnsupportedVLErr_MSB   0x8
 
#define QIB_7322_ErrStatus_0_RcvUnsupportedVLErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_RcvUnexpectedCharErr_LSB   0x7
 
#define QIB_7322_ErrStatus_0_RcvUnexpectedCharErr_MSB   0x7
 
#define QIB_7322_ErrStatus_0_RcvUnexpectedCharErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_RcvShortPktLenErr_LSB   0x6
 
#define QIB_7322_ErrStatus_0_RcvShortPktLenErr_MSB   0x6
 
#define QIB_7322_ErrStatus_0_RcvShortPktLenErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_RcvLongPktLenErr_LSB   0x5
 
#define QIB_7322_ErrStatus_0_RcvLongPktLenErr_MSB   0x5
 
#define QIB_7322_ErrStatus_0_RcvLongPktLenErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_RcvMaxPktLenErr_LSB   0x4
 
#define QIB_7322_ErrStatus_0_RcvMaxPktLenErr_MSB   0x4
 
#define QIB_7322_ErrStatus_0_RcvMaxPktLenErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_RcvMinPktLenErr_LSB   0x3
 
#define QIB_7322_ErrStatus_0_RcvMinPktLenErr_MSB   0x3
 
#define QIB_7322_ErrStatus_0_RcvMinPktLenErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_RcvICRCErr_LSB   0x2
 
#define QIB_7322_ErrStatus_0_RcvICRCErr_MSB   0x2
 
#define QIB_7322_ErrStatus_0_RcvICRCErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_RcvVCRCErr_LSB   0x1
 
#define QIB_7322_ErrStatus_0_RcvVCRCErr_MSB   0x1
 
#define QIB_7322_ErrStatus_0_RcvVCRCErr_RMASK   0x1
 
#define QIB_7322_ErrStatus_0_RcvFormatErr_LSB   0x0
 
#define QIB_7322_ErrStatus_0_RcvFormatErr_MSB   0x0
 
#define QIB_7322_ErrStatus_0_RcvFormatErr_RMASK   0x1
 
#define QIB_7322_ErrClear_0_OFFS   0x1090
 
#define QIB_7322_ErrClear_0_DEF   0x0000000000000000
 
#define QIB_7322_ErrClear_0_IBStatusChangedClear_LSB   0x3A
 
#define QIB_7322_ErrClear_0_IBStatusChangedClear_MSB   0x3A
 
#define QIB_7322_ErrClear_0_IBStatusChangedClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SHeadersErrClear_LSB   0x39
 
#define QIB_7322_ErrClear_0_SHeadersErrClear_MSB   0x39
 
#define QIB_7322_ErrClear_0_SHeadersErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_VL15BufMisuseErrClear_LSB   0x36
 
#define QIB_7322_ErrClear_0_VL15BufMisuseErrClear_MSB   0x36
 
#define QIB_7322_ErrClear_0_VL15BufMisuseErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SDmaHaltErrClear_LSB   0x31
 
#define QIB_7322_ErrClear_0_SDmaHaltErrClear_MSB   0x31
 
#define QIB_7322_ErrClear_0_SDmaHaltErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SDmaDescAddrMisalignErrClear_LSB   0x30
 
#define QIB_7322_ErrClear_0_SDmaDescAddrMisalignErrClear_MSB   0x30
 
#define QIB_7322_ErrClear_0_SDmaDescAddrMisalignErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SDmaUnexpDataErrClear_LSB   0x2F
 
#define QIB_7322_ErrClear_0_SDmaUnexpDataErrClear_MSB   0x2F
 
#define QIB_7322_ErrClear_0_SDmaUnexpDataErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SDmaMissingDwErrClear_LSB   0x2E
 
#define QIB_7322_ErrClear_0_SDmaMissingDwErrClear_MSB   0x2E
 
#define QIB_7322_ErrClear_0_SDmaMissingDwErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SDmaDwEnErrClear_LSB   0x2D
 
#define QIB_7322_ErrClear_0_SDmaDwEnErrClear_MSB   0x2D
 
#define QIB_7322_ErrClear_0_SDmaDwEnErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SDmaRpyTagErrClear_LSB   0x2C
 
#define QIB_7322_ErrClear_0_SDmaRpyTagErrClear_MSB   0x2C
 
#define QIB_7322_ErrClear_0_SDmaRpyTagErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SDma1stDescErrClear_LSB   0x2B
 
#define QIB_7322_ErrClear_0_SDma1stDescErrClear_MSB   0x2B
 
#define QIB_7322_ErrClear_0_SDma1stDescErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SDmaBaseErrClear_LSB   0x2A
 
#define QIB_7322_ErrClear_0_SDmaBaseErrClear_MSB   0x2A
 
#define QIB_7322_ErrClear_0_SDmaBaseErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SDmaTailOutOfBoundErrClear_LSB   0x29
 
#define QIB_7322_ErrClear_0_SDmaTailOutOfBoundErrClear_MSB   0x29
 
#define QIB_7322_ErrClear_0_SDmaTailOutOfBoundErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SDmaOutOfBoundErrClear_LSB   0x28
 
#define QIB_7322_ErrClear_0_SDmaOutOfBoundErrClear_MSB   0x28
 
#define QIB_7322_ErrClear_0_SDmaOutOfBoundErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SDmaGenMismatchErrClear_LSB   0x27
 
#define QIB_7322_ErrClear_0_SDmaGenMismatchErrClear_MSB   0x27
 
#define QIB_7322_ErrClear_0_SDmaGenMismatchErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SendBufMisuseErrClear_LSB   0x26
 
#define QIB_7322_ErrClear_0_SendBufMisuseErrClear_MSB   0x26
 
#define QIB_7322_ErrClear_0_SendBufMisuseErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SendUnsupportedVLErrClear_LSB   0x25
 
#define QIB_7322_ErrClear_0_SendUnsupportedVLErrClear_MSB   0x25
 
#define QIB_7322_ErrClear_0_SendUnsupportedVLErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SendUnexpectedPktNumErrClear_LSB   0x24
 
#define QIB_7322_ErrClear_0_SendUnexpectedPktNumErrClear_MSB   0x24
 
#define QIB_7322_ErrClear_0_SendUnexpectedPktNumErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SendDroppedDataPktErrClear_LSB   0x22
 
#define QIB_7322_ErrClear_0_SendDroppedDataPktErrClear_MSB   0x22
 
#define QIB_7322_ErrClear_0_SendDroppedDataPktErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SendDroppedSmpPktErrClear_LSB   0x21
 
#define QIB_7322_ErrClear_0_SendDroppedSmpPktErrClear_MSB   0x21
 
#define QIB_7322_ErrClear_0_SendDroppedSmpPktErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SendPktLenErrClear_LSB   0x20
 
#define QIB_7322_ErrClear_0_SendPktLenErrClear_MSB   0x20
 
#define QIB_7322_ErrClear_0_SendPktLenErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SendUnderRunErrClear_LSB   0x1F
 
#define QIB_7322_ErrClear_0_SendUnderRunErrClear_MSB   0x1F
 
#define QIB_7322_ErrClear_0_SendUnderRunErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SendMaxPktLenErrClear_LSB   0x1E
 
#define QIB_7322_ErrClear_0_SendMaxPktLenErrClear_MSB   0x1E
 
#define QIB_7322_ErrClear_0_SendMaxPktLenErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_SendMinPktLenErrClear_LSB   0x1D
 
#define QIB_7322_ErrClear_0_SendMinPktLenErrClear_MSB   0x1D
 
#define QIB_7322_ErrClear_0_SendMinPktLenErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_RcvIBLostLinkErrClear_LSB   0x11
 
#define QIB_7322_ErrClear_0_RcvIBLostLinkErrClear_MSB   0x11
 
#define QIB_7322_ErrClear_0_RcvIBLostLinkErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_RcvHdrErrClear_LSB   0x10
 
#define QIB_7322_ErrClear_0_RcvHdrErrClear_MSB   0x10
 
#define QIB_7322_ErrClear_0_RcvHdrErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_RcvHdrLenErrClear_LSB   0xF
 
#define QIB_7322_ErrClear_0_RcvHdrLenErrClear_MSB   0xF
 
#define QIB_7322_ErrClear_0_RcvHdrLenErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_RcvBadTidErrClear_LSB   0xE
 
#define QIB_7322_ErrClear_0_RcvBadTidErrClear_MSB   0xE
 
#define QIB_7322_ErrClear_0_RcvBadTidErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_RcvBadVersionErrClear_LSB   0xB
 
#define QIB_7322_ErrClear_0_RcvBadVersionErrClear_MSB   0xB
 
#define QIB_7322_ErrClear_0_RcvBadVersionErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_RcvIBFlowErrClear_LSB   0xA
 
#define QIB_7322_ErrClear_0_RcvIBFlowErrClear_MSB   0xA
 
#define QIB_7322_ErrClear_0_RcvIBFlowErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_RcvEBPErrClear_LSB   0x9
 
#define QIB_7322_ErrClear_0_RcvEBPErrClear_MSB   0x9
 
#define QIB_7322_ErrClear_0_RcvEBPErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_RcvUnsupportedVLErrClear_LSB   0x8
 
#define QIB_7322_ErrClear_0_RcvUnsupportedVLErrClear_MSB   0x8
 
#define QIB_7322_ErrClear_0_RcvUnsupportedVLErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_RcvUnexpectedCharErrClear_LSB   0x7
 
#define QIB_7322_ErrClear_0_RcvUnexpectedCharErrClear_MSB   0x7
 
#define QIB_7322_ErrClear_0_RcvUnexpectedCharErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_RcvShortPktLenErrClear_LSB   0x6
 
#define QIB_7322_ErrClear_0_RcvShortPktLenErrClear_MSB   0x6
 
#define QIB_7322_ErrClear_0_RcvShortPktLenErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_RcvLongPktLenErrClear_LSB   0x5
 
#define QIB_7322_ErrClear_0_RcvLongPktLenErrClear_MSB   0x5
 
#define QIB_7322_ErrClear_0_RcvLongPktLenErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_RcvMaxPktLenErrClear_LSB   0x4
 
#define QIB_7322_ErrClear_0_RcvMaxPktLenErrClear_MSB   0x4
 
#define QIB_7322_ErrClear_0_RcvMaxPktLenErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_RcvMinPktLenErrClear_LSB   0x3
 
#define QIB_7322_ErrClear_0_RcvMinPktLenErrClear_MSB   0x3
 
#define QIB_7322_ErrClear_0_RcvMinPktLenErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_RcvICRCErrClear_LSB   0x2
 
#define QIB_7322_ErrClear_0_RcvICRCErrClear_MSB   0x2
 
#define QIB_7322_ErrClear_0_RcvICRCErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_RcvVCRCErrClear_LSB   0x1
 
#define QIB_7322_ErrClear_0_RcvVCRCErrClear_MSB   0x1
 
#define QIB_7322_ErrClear_0_RcvVCRCErrClear_RMASK   0x1
 
#define QIB_7322_ErrClear_0_RcvFormatErrClear_LSB   0x0
 
#define QIB_7322_ErrClear_0_RcvFormatErrClear_MSB   0x0
 
#define QIB_7322_ErrClear_0_RcvFormatErrClear_RMASK   0x1
 
#define QIB_7322_TXEStatus_0_OFFS   0x10B8
 
#define QIB_7322_TXEStatus_0_DEF   0x0000000XC00080FF
 
#define QIB_7322_TXEStatus_0_TXE_IBC_Idle_LSB   0x1F
 
#define QIB_7322_TXEStatus_0_TXE_IBC_Idle_MSB   0x1F
 
#define QIB_7322_TXEStatus_0_TXE_IBC_Idle_RMASK   0x1
 
#define QIB_7322_TXEStatus_0_RmFifoEmpty_LSB   0x1E
 
#define QIB_7322_TXEStatus_0_RmFifoEmpty_MSB   0x1E
 
#define QIB_7322_TXEStatus_0_RmFifoEmpty_RMASK   0x1
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL15_LSB   0xF
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL15_MSB   0xF
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL15_RMASK   0x1
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL7_LSB   0x7
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL7_MSB   0x7
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL7_RMASK   0x1
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL6_LSB   0x6
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL6_MSB   0x6
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL6_RMASK   0x1
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL5_LSB   0x5
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL5_MSB   0x5
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL5_RMASK   0x1
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL4_LSB   0x4
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL4_MSB   0x4
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL4_RMASK   0x1
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL3_LSB   0x3
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL3_MSB   0x3
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL3_RMASK   0x1
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL2_LSB   0x2
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL2_MSB   0x2
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL2_RMASK   0x1
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL1_LSB   0x1
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL1_MSB   0x1
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL1_RMASK   0x1
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL0_LSB   0x0
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL0_MSB   0x0
 
#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL0_RMASK   0x1
 
#define QIB_7322_RcvCtrl_0_OFFS   0x1100
 
#define QIB_7322_RcvCtrl_0_DEF   0x0000000000000000
 
#define QIB_7322_RcvCtrl_0_RcvResetCredit_LSB   0x2A
 
#define QIB_7322_RcvCtrl_0_RcvResetCredit_MSB   0x2A
 
#define QIB_7322_RcvCtrl_0_RcvResetCredit_RMASK   0x1
 
#define QIB_7322_RcvCtrl_0_RcvPartitionKeyDisable_LSB   0x29
 
#define QIB_7322_RcvCtrl_0_RcvPartitionKeyDisable_MSB   0x29
 
#define QIB_7322_RcvCtrl_0_RcvPartitionKeyDisable_RMASK   0x1
 
#define QIB_7322_RcvCtrl_0_RcvQPMapEnable_LSB   0x28
 
#define QIB_7322_RcvCtrl_0_RcvQPMapEnable_MSB   0x28
 
#define QIB_7322_RcvCtrl_0_RcvQPMapEnable_RMASK   0x1
 
#define QIB_7322_RcvCtrl_0_RcvIBPortEnable_LSB   0x27
 
#define QIB_7322_RcvCtrl_0_RcvIBPortEnable_MSB   0x27
 
#define QIB_7322_RcvCtrl_0_RcvIBPortEnable_RMASK   0x1
 
#define QIB_7322_RcvCtrl_0_ContextEnableUser_LSB   0x2
 
#define QIB_7322_RcvCtrl_0_ContextEnableUser_MSB   0x11
 
#define QIB_7322_RcvCtrl_0_ContextEnableUser_RMASK   0xFFFF
 
#define QIB_7322_RcvCtrl_0_ContextEnableKernel_LSB   0x0
 
#define QIB_7322_RcvCtrl_0_ContextEnableKernel_MSB   0x0
 
#define QIB_7322_RcvCtrl_0_ContextEnableKernel_RMASK   0x1
 
#define QIB_7322_RcvBTHQP_0_OFFS   0x1108
 
#define QIB_7322_RcvBTHQP_0_DEF   0x0000000000000000
 
#define QIB_7322_RcvBTHQP_0_RcvBTHQP_LSB   0x0
 
#define QIB_7322_RcvBTHQP_0_RcvBTHQP_MSB   0x17
 
#define QIB_7322_RcvBTHQP_0_RcvBTHQP_RMASK   0xFFFFFF
 
#define QIB_7322_RcvQPMapTableA_0_OFFS   0x1110
 
#define QIB_7322_RcvQPMapTableA_0_DEF   0x0000000000000000
 
#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext5_LSB   0x19
 
#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext5_MSB   0x1D
 
#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext5_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext4_LSB   0x14
 
#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext4_MSB   0x18
 
#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext4_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext3_LSB   0xF
 
#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext3_MSB   0x13
 
#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext3_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext2_LSB   0xA
 
#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext2_MSB   0xE
 
#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext2_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext1_LSB   0x5
 
#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext1_MSB   0x9
 
#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext1_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext0_LSB   0x0
 
#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext0_MSB   0x4
 
#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext0_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableB_0_OFFS   0x1118
 
#define QIB_7322_RcvQPMapTableB_0_DEF   0x0000000000000000
 
#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext11_LSB   0x19
 
#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext11_MSB   0x1D
 
#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext11_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext10_LSB   0x14
 
#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext10_MSB   0x18
 
#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext10_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext9_LSB   0xF
 
#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext9_MSB   0x13
 
#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext9_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext8_LSB   0xA
 
#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext8_MSB   0xE
 
#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext8_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext7_LSB   0x5
 
#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext7_MSB   0x9
 
#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext7_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext6_LSB   0x0
 
#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext6_MSB   0x4
 
#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext6_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableC_0_OFFS   0x1120
 
#define QIB_7322_RcvQPMapTableC_0_DEF   0x0000000000000000
 
#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext17_LSB   0x19
 
#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext17_MSB   0x1D
 
#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext17_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext16_LSB   0x14
 
#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext16_MSB   0x18
 
#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext16_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext15_LSB   0xF
 
#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext15_MSB   0x13
 
#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext15_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext14_LSB   0xA
 
#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext14_MSB   0xE
 
#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext14_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext13_LSB   0x5
 
#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext13_MSB   0x9
 
#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext13_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext12_LSB   0x0
 
#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext12_MSB   0x4
 
#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext12_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableD_0_OFFS   0x1128
 
#define QIB_7322_RcvQPMapTableD_0_DEF   0x0000000000000000
 
#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext23_LSB   0x19
 
#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext23_MSB   0x1D
 
#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext23_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext22_LSB   0x14
 
#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext22_MSB   0x18
 
#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext22_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext21_LSB   0xF
 
#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext21_MSB   0x13
 
#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext21_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext20_LSB   0xA
 
#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext20_MSB   0xE
 
#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext20_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext19_LSB   0x5
 
#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext19_MSB   0x9
 
#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext19_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext18_LSB   0x0
 
#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext18_MSB   0x4
 
#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext18_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableE_0_OFFS   0x1130
 
#define QIB_7322_RcvQPMapTableE_0_DEF   0x0000000000000000
 
#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext29_LSB   0x19
 
#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext29_MSB   0x1D
 
#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext29_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext28_LSB   0x14
 
#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext28_MSB   0x18
 
#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext28_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext27_LSB   0xF
 
#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext27_MSB   0x13
 
#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext27_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext26_LSB   0xA
 
#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext26_MSB   0xE
 
#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext26_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext25_LSB   0x5
 
#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext25_MSB   0x9
 
#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext25_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext24_LSB   0x0
 
#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext24_MSB   0x4
 
#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext24_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableF_0_OFFS   0x1138
 
#define QIB_7322_RcvQPMapTableF_0_DEF   0x0000000000000000
 
#define QIB_7322_RcvQPMapTableF_0_RcvQPMapContext31_LSB   0x5
 
#define QIB_7322_RcvQPMapTableF_0_RcvQPMapContext31_MSB   0x9
 
#define QIB_7322_RcvQPMapTableF_0_RcvQPMapContext31_RMASK   0x1F
 
#define QIB_7322_RcvQPMapTableF_0_RcvQPMapContext30_LSB   0x0
 
#define QIB_7322_RcvQPMapTableF_0_RcvQPMapContext30_MSB   0x4
 
#define QIB_7322_RcvQPMapTableF_0_RcvQPMapContext30_RMASK   0x1F
 
#define QIB_7322_PSStat_0_OFFS   0x1140
 
#define QIB_7322_PSStat_0_DEF   0x0000000000000000
 
#define QIB_7322_PSStart_0_OFFS   0x1148
 
#define QIB_7322_PSStart_0_DEF   0x0000000000000000
 
#define QIB_7322_PSInterval_0_OFFS   0x1150
 
#define QIB_7322_PSInterval_0_DEF   0x0000000000000000
 
#define QIB_7322_RcvStatus_0_OFFS   0x1160
 
#define QIB_7322_RcvStatus_0_DEF   0x0000000000000000
 
#define QIB_7322_RcvStatus_0_DmaeqBlockingContext_LSB   0x1
 
#define QIB_7322_RcvStatus_0_DmaeqBlockingContext_MSB   0x5
 
#define QIB_7322_RcvStatus_0_DmaeqBlockingContext_RMASK   0x1F
 
#define QIB_7322_RcvStatus_0_RxPktInProgress_LSB   0x0
 
#define QIB_7322_RcvStatus_0_RxPktInProgress_MSB   0x0
 
#define QIB_7322_RcvStatus_0_RxPktInProgress_RMASK   0x1
 
#define QIB_7322_RcvPartitionKey_0_OFFS   0x1168
 
#define QIB_7322_RcvPartitionKey_0_DEF   0x0000000000000000
 
#define QIB_7322_RcvQPMulticastContext_0_OFFS   0x1170
 
#define QIB_7322_RcvQPMulticastContext_0_DEF   0x0000000000000000
 
#define QIB_7322_RcvQPMulticastContext_0_RcvQpMcContext_LSB   0x0
 
#define QIB_7322_RcvQPMulticastContext_0_RcvQpMcContext_MSB   0x4
 
#define QIB_7322_RcvQPMulticastContext_0_RcvQpMcContext_RMASK   0x1F
 
#define QIB_7322_RcvPktLEDCnt_0_OFFS   0x1178
 
#define QIB_7322_RcvPktLEDCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RcvPktLEDCnt_0_ONperiod_LSB   0x20
 
#define QIB_7322_RcvPktLEDCnt_0_ONperiod_MSB   0x3F
 
#define QIB_7322_RcvPktLEDCnt_0_ONperiod_RMASK   0xFFFFFFFF
 
#define QIB_7322_RcvPktLEDCnt_0_OFFperiod_LSB   0x0
 
#define QIB_7322_RcvPktLEDCnt_0_OFFperiod_MSB   0x1F
 
#define QIB_7322_RcvPktLEDCnt_0_OFFperiod_RMASK   0xFFFFFFFF
 
#define QIB_7322_SendDmaIdleCnt_0_OFFS   0x1180
 
#define QIB_7322_SendDmaIdleCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_SendDmaIdleCnt_0_SendDmaIdleCnt_LSB   0x0
 
#define QIB_7322_SendDmaIdleCnt_0_SendDmaIdleCnt_MSB   0xF
 
#define QIB_7322_SendDmaIdleCnt_0_SendDmaIdleCnt_RMASK   0xFFFF
 
#define QIB_7322_SendDmaReloadCnt_0_OFFS   0x1188
 
#define QIB_7322_SendDmaReloadCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_SendDmaReloadCnt_0_SendDmaReloadCnt_LSB   0x0
 
#define QIB_7322_SendDmaReloadCnt_0_SendDmaReloadCnt_MSB   0xF
 
#define QIB_7322_SendDmaReloadCnt_0_SendDmaReloadCnt_RMASK   0xFFFF
 
#define QIB_7322_SendDmaDescCnt_0_OFFS   0x1190
 
#define QIB_7322_SendDmaDescCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_SendDmaDescCnt_0_SendDmaDescCnt_LSB   0x0
 
#define QIB_7322_SendDmaDescCnt_0_SendDmaDescCnt_MSB   0xF
 
#define QIB_7322_SendDmaDescCnt_0_SendDmaDescCnt_RMASK   0xFFFF
 
#define QIB_7322_SendCtrl_0_OFFS   0x11C0
 
#define QIB_7322_SendCtrl_0_DEF   0x0000000000000000
 
#define QIB_7322_SendCtrl_0_IBVLArbiterEn_LSB   0xF
 
#define QIB_7322_SendCtrl_0_IBVLArbiterEn_MSB   0xF
 
#define QIB_7322_SendCtrl_0_IBVLArbiterEn_RMASK   0x1
 
#define QIB_7322_SendCtrl_0_TxeDrainRmFifo_LSB   0xE
 
#define QIB_7322_SendCtrl_0_TxeDrainRmFifo_MSB   0xE
 
#define QIB_7322_SendCtrl_0_TxeDrainRmFifo_RMASK   0x1
 
#define QIB_7322_SendCtrl_0_TxeDrainLaFifo_LSB   0xD
 
#define QIB_7322_SendCtrl_0_TxeDrainLaFifo_MSB   0xD
 
#define QIB_7322_SendCtrl_0_TxeDrainLaFifo_RMASK   0x1
 
#define QIB_7322_SendCtrl_0_SDmaHalt_LSB   0xC
 
#define QIB_7322_SendCtrl_0_SDmaHalt_MSB   0xC
 
#define QIB_7322_SendCtrl_0_SDmaHalt_RMASK   0x1
 
#define QIB_7322_SendCtrl_0_SDmaEnable_LSB   0xB
 
#define QIB_7322_SendCtrl_0_SDmaEnable_MSB   0xB
 
#define QIB_7322_SendCtrl_0_SDmaEnable_RMASK   0x1
 
#define QIB_7322_SendCtrl_0_SDmaSingleDescriptor_LSB   0xA
 
#define QIB_7322_SendCtrl_0_SDmaSingleDescriptor_MSB   0xA
 
#define QIB_7322_SendCtrl_0_SDmaSingleDescriptor_RMASK   0x1
 
#define QIB_7322_SendCtrl_0_SDmaIntEnable_LSB   0x9
 
#define QIB_7322_SendCtrl_0_SDmaIntEnable_MSB   0x9
 
#define QIB_7322_SendCtrl_0_SDmaIntEnable_RMASK   0x1
 
#define QIB_7322_SendCtrl_0_SDmaCleanup_LSB   0x8
 
#define QIB_7322_SendCtrl_0_SDmaCleanup_MSB   0x8
 
#define QIB_7322_SendCtrl_0_SDmaCleanup_RMASK   0x1
 
#define QIB_7322_SendCtrl_0_ForceCreditUpToDate_LSB   0x7
 
#define QIB_7322_SendCtrl_0_ForceCreditUpToDate_MSB   0x7
 
#define QIB_7322_SendCtrl_0_ForceCreditUpToDate_RMASK   0x1
 
#define QIB_7322_SendCtrl_0_SendEnable_LSB   0x3
 
#define QIB_7322_SendCtrl_0_SendEnable_MSB   0x3
 
#define QIB_7322_SendCtrl_0_SendEnable_RMASK   0x1
 
#define QIB_7322_SendCtrl_0_TxeBypassIbc_LSB   0x1
 
#define QIB_7322_SendCtrl_0_TxeBypassIbc_MSB   0x1
 
#define QIB_7322_SendCtrl_0_TxeBypassIbc_RMASK   0x1
 
#define QIB_7322_SendCtrl_0_TxeAbortIbc_LSB   0x0
 
#define QIB_7322_SendCtrl_0_TxeAbortIbc_MSB   0x0
 
#define QIB_7322_SendCtrl_0_TxeAbortIbc_RMASK   0x1
 
#define QIB_7322_SendDmaBase_0_OFFS   0x11F8
 
#define QIB_7322_SendDmaBase_0_DEF   0x0000000000000000
 
#define QIB_7322_SendDmaBase_0_SendDmaBase_LSB   0x0
 
#define QIB_7322_SendDmaBase_0_SendDmaBase_MSB   0x2F
 
#define QIB_7322_SendDmaBase_0_SendDmaBase_RMASK   0xFFFFFFFFFFFF
 
#define QIB_7322_SendDmaLenGen_0_OFFS   0x1200
 
#define QIB_7322_SendDmaLenGen_0_DEF   0x0000000000000000
 
#define QIB_7322_SendDmaLenGen_0_Generation_LSB   0x10
 
#define QIB_7322_SendDmaLenGen_0_Generation_MSB   0x12
 
#define QIB_7322_SendDmaLenGen_0_Generation_RMASK   0x7
 
#define QIB_7322_SendDmaLenGen_0_Length_LSB   0x0
 
#define QIB_7322_SendDmaLenGen_0_Length_MSB   0xF
 
#define QIB_7322_SendDmaLenGen_0_Length_RMASK   0xFFFF
 
#define QIB_7322_SendDmaTail_0_OFFS   0x1208
 
#define QIB_7322_SendDmaTail_0_DEF   0x0000000000000000
 
#define QIB_7322_SendDmaTail_0_SendDmaTail_LSB   0x0
 
#define QIB_7322_SendDmaTail_0_SendDmaTail_MSB   0xF
 
#define QIB_7322_SendDmaTail_0_SendDmaTail_RMASK   0xFFFF
 
#define QIB_7322_SendDmaHead_0_OFFS   0x1210
 
#define QIB_7322_SendDmaHead_0_DEF   0x0000000000000000
 
#define QIB_7322_SendDmaHead_0_InternalSendDmaHead_LSB   0x20
 
#define QIB_7322_SendDmaHead_0_InternalSendDmaHead_MSB   0x2F
 
#define QIB_7322_SendDmaHead_0_InternalSendDmaHead_RMASK   0xFFFF
 
#define QIB_7322_SendDmaHead_0_SendDmaHead_LSB   0x0
 
#define QIB_7322_SendDmaHead_0_SendDmaHead_MSB   0xF
 
#define QIB_7322_SendDmaHead_0_SendDmaHead_RMASK   0xFFFF
 
#define QIB_7322_SendDmaHeadAddr_0_OFFS   0x1218
 
#define QIB_7322_SendDmaHeadAddr_0_DEF   0x0000000000000000
 
#define QIB_7322_SendDmaHeadAddr_0_SendDmaHeadAddr_LSB   0x0
 
#define QIB_7322_SendDmaHeadAddr_0_SendDmaHeadAddr_MSB   0x2F
 
#define QIB_7322_SendDmaHeadAddr_0_SendDmaHeadAddr_RMASK   0xFFFFFFFFFFFF
 
#define QIB_7322_SendDmaBufMask0_0_OFFS   0x1220
 
#define QIB_7322_SendDmaBufMask0_0_DEF   0x0000000000000000
 
#define QIB_7322_SendDmaBufMask0_0_BufMask_63_0_LSB   0x0
 
#define QIB_7322_SendDmaBufMask0_0_BufMask_63_0_MSB   0x3F
 
#define QIB_7322_SendDmaBufMask0_0_BufMask_63_0_RMASK   0x0
 
#define QIB_7322_SendDmaStatus_0_OFFS   0x1238
 
#define QIB_7322_SendDmaStatus_0_DEF   0x0000000042000000
 
#define QIB_7322_SendDmaStatus_0_ScoreBoardDrainInProg_LSB   0x3F
 
#define QIB_7322_SendDmaStatus_0_ScoreBoardDrainInProg_MSB   0x3F
 
#define QIB_7322_SendDmaStatus_0_ScoreBoardDrainInProg_RMASK   0x1
 
#define QIB_7322_SendDmaStatus_0_HaltInProg_LSB   0x3E
 
#define QIB_7322_SendDmaStatus_0_HaltInProg_MSB   0x3E
 
#define QIB_7322_SendDmaStatus_0_HaltInProg_RMASK   0x1
 
#define QIB_7322_SendDmaStatus_0_InternalSDmaHalt_LSB   0x3D
 
#define QIB_7322_SendDmaStatus_0_InternalSDmaHalt_MSB   0x3D
 
#define QIB_7322_SendDmaStatus_0_InternalSDmaHalt_RMASK   0x1
 
#define QIB_7322_SendDmaStatus_0_ScbDescIndex_13_0_LSB   0x2F
 
#define QIB_7322_SendDmaStatus_0_ScbDescIndex_13_0_MSB   0x3C
 
#define QIB_7322_SendDmaStatus_0_ScbDescIndex_13_0_RMASK   0x3FFF
 
#define QIB_7322_SendDmaStatus_0_RpyLowAddr_6_0_LSB   0x28
 
#define QIB_7322_SendDmaStatus_0_RpyLowAddr_6_0_MSB   0x2E
 
#define QIB_7322_SendDmaStatus_0_RpyLowAddr_6_0_RMASK   0x7F
 
#define QIB_7322_SendDmaStatus_0_RpyTag_7_0_LSB   0x20
 
#define QIB_7322_SendDmaStatus_0_RpyTag_7_0_MSB   0x27
 
#define QIB_7322_SendDmaStatus_0_RpyTag_7_0_RMASK   0xFF
 
#define QIB_7322_SendDmaStatus_0_ScbFull_LSB   0x1F
 
#define QIB_7322_SendDmaStatus_0_ScbFull_MSB   0x1F
 
#define QIB_7322_SendDmaStatus_0_ScbFull_RMASK   0x1
 
#define QIB_7322_SendDmaStatus_0_ScbEmpty_LSB   0x1E
 
#define QIB_7322_SendDmaStatus_0_ScbEmpty_MSB   0x1E
 
#define QIB_7322_SendDmaStatus_0_ScbEmpty_RMASK   0x1
 
#define QIB_7322_SendDmaStatus_0_ScbEntryValid_LSB   0x1D
 
#define QIB_7322_SendDmaStatus_0_ScbEntryValid_MSB   0x1D
 
#define QIB_7322_SendDmaStatus_0_ScbEntryValid_RMASK   0x1
 
#define QIB_7322_SendDmaStatus_0_ScbFetchDescFlag_LSB   0x1C
 
#define QIB_7322_SendDmaStatus_0_ScbFetchDescFlag_MSB   0x1C
 
#define QIB_7322_SendDmaStatus_0_ScbFetchDescFlag_RMASK   0x1
 
#define QIB_7322_SendDmaStatus_0_SplFifoReadyToGo_LSB   0x1B
 
#define QIB_7322_SendDmaStatus_0_SplFifoReadyToGo_MSB   0x1B
 
#define QIB_7322_SendDmaStatus_0_SplFifoReadyToGo_RMASK   0x1
 
#define QIB_7322_SendDmaStatus_0_SplFifoDisarmed_LSB   0x1A
 
#define QIB_7322_SendDmaStatus_0_SplFifoDisarmed_MSB   0x1A
 
#define QIB_7322_SendDmaStatus_0_SplFifoDisarmed_RMASK   0x1
 
#define QIB_7322_SendDmaStatus_0_SplFifoEmpty_LSB   0x19
 
#define QIB_7322_SendDmaStatus_0_SplFifoEmpty_MSB   0x19
 
#define QIB_7322_SendDmaStatus_0_SplFifoEmpty_RMASK   0x1
 
#define QIB_7322_SendDmaStatus_0_SplFifoFull_LSB   0x18
 
#define QIB_7322_SendDmaStatus_0_SplFifoFull_MSB   0x18
 
#define QIB_7322_SendDmaStatus_0_SplFifoFull_RMASK   0x1
 
#define QIB_7322_SendDmaStatus_0_SplFifoBufNum_LSB   0x10
 
#define QIB_7322_SendDmaStatus_0_SplFifoBufNum_MSB   0x17
 
#define QIB_7322_SendDmaStatus_0_SplFifoBufNum_RMASK   0xFF
 
#define QIB_7322_SendDmaStatus_0_SplFifoDescIndex_LSB   0x0
 
#define QIB_7322_SendDmaStatus_0_SplFifoDescIndex_MSB   0xF
 
#define QIB_7322_SendDmaStatus_0_SplFifoDescIndex_RMASK   0xFFFF
 
#define QIB_7322_SendDmaPriorityThld_0_OFFS   0x1258
 
#define QIB_7322_SendDmaPriorityThld_0_DEF   0x0000000000000000
 
#define QIB_7322_SendDmaPriorityThld_0_PriorityThreshold_LSB   0x0
 
#define QIB_7322_SendDmaPriorityThld_0_PriorityThreshold_MSB   0x3
 
#define QIB_7322_SendDmaPriorityThld_0_PriorityThreshold_RMASK   0xF
 
#define QIB_7322_SendHdrErrSymptom_0_OFFS   0x1260
 
#define QIB_7322_SendHdrErrSymptom_0_DEF   0x0000000000000000
 
#define QIB_7322_SendHdrErrSymptom_0_NonKeyPacket_LSB   0x6
 
#define QIB_7322_SendHdrErrSymptom_0_NonKeyPacket_MSB   0x6
 
#define QIB_7322_SendHdrErrSymptom_0_NonKeyPacket_RMASK   0x1
 
#define QIB_7322_SendHdrErrSymptom_0_GRHFail_LSB   0x5
 
#define QIB_7322_SendHdrErrSymptom_0_GRHFail_MSB   0x5
 
#define QIB_7322_SendHdrErrSymptom_0_GRHFail_RMASK   0x1
 
#define QIB_7322_SendHdrErrSymptom_0_PkeyFail_LSB   0x4
 
#define QIB_7322_SendHdrErrSymptom_0_PkeyFail_MSB   0x4
 
#define QIB_7322_SendHdrErrSymptom_0_PkeyFail_RMASK   0x1
 
#define QIB_7322_SendHdrErrSymptom_0_QPFail_LSB   0x3
 
#define QIB_7322_SendHdrErrSymptom_0_QPFail_MSB   0x3
 
#define QIB_7322_SendHdrErrSymptom_0_QPFail_RMASK   0x1
 
#define QIB_7322_SendHdrErrSymptom_0_SLIDFail_LSB   0x2
 
#define QIB_7322_SendHdrErrSymptom_0_SLIDFail_MSB   0x2
 
#define QIB_7322_SendHdrErrSymptom_0_SLIDFail_RMASK   0x1
 
#define QIB_7322_SendHdrErrSymptom_0_RawIPV6_LSB   0x1
 
#define QIB_7322_SendHdrErrSymptom_0_RawIPV6_MSB   0x1
 
#define QIB_7322_SendHdrErrSymptom_0_RawIPV6_RMASK   0x1
 
#define QIB_7322_SendHdrErrSymptom_0_PacketTooSmall_LSB   0x0
 
#define QIB_7322_SendHdrErrSymptom_0_PacketTooSmall_MSB   0x0
 
#define QIB_7322_SendHdrErrSymptom_0_PacketTooSmall_RMASK   0x1
 
#define QIB_7322_RxCreditVL0_0_OFFS   0x1280
 
#define QIB_7322_RxCreditVL0_0_DEF   0x0000000000000000
 
#define QIB_7322_RxCreditVL0_0_RxBufrConsumedVL_LSB   0x10
 
#define QIB_7322_RxCreditVL0_0_RxBufrConsumedVL_MSB   0x1B
 
#define QIB_7322_RxCreditVL0_0_RxBufrConsumedVL_RMASK   0xFFF
 
#define QIB_7322_RxCreditVL0_0_RxMaxCreditVL_LSB   0x0
 
#define QIB_7322_RxCreditVL0_0_RxMaxCreditVL_MSB   0xB
 
#define QIB_7322_RxCreditVL0_0_RxMaxCreditVL_RMASK   0xFFF
 
#define QIB_7322_SendDmaBufUsed0_0_OFFS   0x1480
 
#define QIB_7322_SendDmaBufUsed0_0_DEF   0x0000000000000000
 
#define QIB_7322_SendDmaBufUsed0_0_BufUsed_63_0_LSB   0x0
 
#define QIB_7322_SendDmaBufUsed0_0_BufUsed_63_0_MSB   0x3F
 
#define QIB_7322_SendDmaBufUsed0_0_BufUsed_63_0_RMASK   0x0
 
#define QIB_7322_SendCheckControl_0_OFFS   0x14A8
 
#define QIB_7322_SendCheckControl_0_DEF   0x0000000000000000
 
#define QIB_7322_SendCheckControl_0_PKey_En_LSB   0x4
 
#define QIB_7322_SendCheckControl_0_PKey_En_MSB   0x4
 
#define QIB_7322_SendCheckControl_0_PKey_En_RMASK   0x1
 
#define QIB_7322_SendCheckControl_0_BTHQP_En_LSB   0x3
 
#define QIB_7322_SendCheckControl_0_BTHQP_En_MSB   0x3
 
#define QIB_7322_SendCheckControl_0_BTHQP_En_RMASK   0x1
 
#define QIB_7322_SendCheckControl_0_SLID_En_LSB   0x2
 
#define QIB_7322_SendCheckControl_0_SLID_En_MSB   0x2
 
#define QIB_7322_SendCheckControl_0_SLID_En_RMASK   0x1
 
#define QIB_7322_SendCheckControl_0_RawIPV6_En_LSB   0x1
 
#define QIB_7322_SendCheckControl_0_RawIPV6_En_MSB   0x1
 
#define QIB_7322_SendCheckControl_0_RawIPV6_En_RMASK   0x1
 
#define QIB_7322_SendCheckControl_0_PacketTooSmall_En_LSB   0x0
 
#define QIB_7322_SendCheckControl_0_PacketTooSmall_En_MSB   0x0
 
#define QIB_7322_SendCheckControl_0_PacketTooSmall_En_RMASK   0x1
 
#define QIB_7322_SendIBSLIDMask_0_OFFS   0x14B0
 
#define QIB_7322_SendIBSLIDMask_0_DEF   0x0000000000000000
 
#define QIB_7322_SendIBSLIDMask_0_SendIBSLIDMask_15_0_LSB   0x0
 
#define QIB_7322_SendIBSLIDMask_0_SendIBSLIDMask_15_0_MSB   0xF
 
#define QIB_7322_SendIBSLIDMask_0_SendIBSLIDMask_15_0_RMASK   0xFFFF
 
#define QIB_7322_SendIBSLIDAssign_0_OFFS   0x14B8
 
#define QIB_7322_SendIBSLIDAssign_0_DEF   0x0000000000000000
 
#define QIB_7322_SendIBSLIDAssign_0_SendIBSLIDAssign_15_0_LSB   0x0
 
#define QIB_7322_SendIBSLIDAssign_0_SendIBSLIDAssign_15_0_MSB   0xF
 
#define QIB_7322_SendIBSLIDAssign_0_SendIBSLIDAssign_15_0_RMASK   0xFFFF
 
#define QIB_7322_IBCStatusA_0_OFFS   0x1540
 
#define QIB_7322_IBCStatusA_0_DEF   0x0000000000000X02
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL7_LSB   0x27
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL7_MSB   0x27
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL7_RMASK   0x1
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL6_LSB   0x26
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL6_MSB   0x26
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL6_RMASK   0x1
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL5_LSB   0x25
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL5_MSB   0x25
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL5_RMASK   0x1
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL4_LSB   0x24
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL4_MSB   0x24
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL4_RMASK   0x1
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL3_LSB   0x23
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL3_MSB   0x23
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL3_RMASK   0x1
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL2_LSB   0x22
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL2_MSB   0x22
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL2_RMASK   0x1
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL1_LSB   0x21
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL1_MSB   0x21
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL1_RMASK   0x1
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL0_LSB   0x20
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL0_MSB   0x20
 
#define QIB_7322_IBCStatusA_0_TxCreditOk_VL0_RMASK   0x1
 
#define QIB_7322_IBCStatusA_0_TxReady_LSB   0x1E
 
#define QIB_7322_IBCStatusA_0_TxReady_MSB   0x1E
 
#define QIB_7322_IBCStatusA_0_TxReady_RMASK   0x1
 
#define QIB_7322_IBCStatusA_0_LinkSpeedQDR_LSB   0x1D
 
#define QIB_7322_IBCStatusA_0_LinkSpeedQDR_MSB   0x1D
 
#define QIB_7322_IBCStatusA_0_LinkSpeedQDR_RMASK   0x1
 
#define QIB_7322_IBCStatusA_0_ScrambleCapRemote_LSB   0xF
 
#define QIB_7322_IBCStatusA_0_ScrambleCapRemote_MSB   0xF
 
#define QIB_7322_IBCStatusA_0_ScrambleCapRemote_RMASK   0x1
 
#define QIB_7322_IBCStatusA_0_ScrambleEn_LSB   0xE
 
#define QIB_7322_IBCStatusA_0_ScrambleEn_MSB   0xE
 
#define QIB_7322_IBCStatusA_0_ScrambleEn_RMASK   0x1
 
#define QIB_7322_IBCStatusA_0_IBTxLaneReversed_LSB   0xD
 
#define QIB_7322_IBCStatusA_0_IBTxLaneReversed_MSB   0xD
 
#define QIB_7322_IBCStatusA_0_IBTxLaneReversed_RMASK   0x1
 
#define QIB_7322_IBCStatusA_0_IBRxLaneReversed_LSB   0xC
 
#define QIB_7322_IBCStatusA_0_IBRxLaneReversed_MSB   0xC
 
#define QIB_7322_IBCStatusA_0_IBRxLaneReversed_RMASK   0x1
 
#define QIB_7322_IBCStatusA_0_DDS_RXEQ_FAIL_LSB   0xA
 
#define QIB_7322_IBCStatusA_0_DDS_RXEQ_FAIL_MSB   0xA
 
#define QIB_7322_IBCStatusA_0_DDS_RXEQ_FAIL_RMASK   0x1
 
#define QIB_7322_IBCStatusA_0_LinkWidthActive_LSB   0x9
 
#define QIB_7322_IBCStatusA_0_LinkWidthActive_MSB   0x9
 
#define QIB_7322_IBCStatusA_0_LinkWidthActive_RMASK   0x1
 
#define QIB_7322_IBCStatusA_0_LinkSpeedActive_LSB   0x8
 
#define QIB_7322_IBCStatusA_0_LinkSpeedActive_MSB   0x8
 
#define QIB_7322_IBCStatusA_0_LinkSpeedActive_RMASK   0x1
 
#define QIB_7322_IBCStatusA_0_LinkState_LSB   0x5
 
#define QIB_7322_IBCStatusA_0_LinkState_MSB   0x7
 
#define QIB_7322_IBCStatusA_0_LinkState_RMASK   0x7
 
#define QIB_7322_IBCStatusA_0_LinkTrainingState_LSB   0x0
 
#define QIB_7322_IBCStatusA_0_LinkTrainingState_MSB   0x4
 
#define QIB_7322_IBCStatusA_0_LinkTrainingState_RMASK   0x1F
 
#define QIB_7322_IBCStatusB_0_OFFS   0x1548
 
#define QIB_7322_IBCStatusB_0_DEF   0x00000000XXXXXXXX
 
#define QIB_7322_IBCStatusB_0_ibsd_adaptation_timer_debug_LSB   0x27
 
#define QIB_7322_IBCStatusB_0_ibsd_adaptation_timer_debug_MSB   0x27
 
#define QIB_7322_IBCStatusB_0_ibsd_adaptation_timer_debug_RMASK   0x1
 
#define QIB_7322_IBCStatusB_0_ibsd_adaptation_timer_reached_threshold_LSB   0x26
 
#define QIB_7322_IBCStatusB_0_ibsd_adaptation_timer_reached_threshold_MSB   0x26
 
#define QIB_7322_IBCStatusB_0_ibsd_adaptation_timer_reached_threshold_RMASK   0x1
 
#define QIB_7322_IBCStatusB_0_ibsd_adaptation_timer_started_LSB   0x25
 
#define QIB_7322_IBCStatusB_0_ibsd_adaptation_timer_started_MSB   0x25
 
#define QIB_7322_IBCStatusB_0_ibsd_adaptation_timer_started_RMASK   0x1
 
#define QIB_7322_IBCStatusB_0_heartbeat_timed_out_LSB   0x24
 
#define QIB_7322_IBCStatusB_0_heartbeat_timed_out_MSB   0x24
 
#define QIB_7322_IBCStatusB_0_heartbeat_timed_out_RMASK   0x1
 
#define QIB_7322_IBCStatusB_0_heartbeat_crosstalk_LSB   0x20
 
#define QIB_7322_IBCStatusB_0_heartbeat_crosstalk_MSB   0x23
 
#define QIB_7322_IBCStatusB_0_heartbeat_crosstalk_RMASK   0xF
 
#define QIB_7322_IBCStatusB_0_RxEqLocalDevice_LSB   0x1E
 
#define QIB_7322_IBCStatusB_0_RxEqLocalDevice_MSB   0x1F
 
#define QIB_7322_IBCStatusB_0_RxEqLocalDevice_RMASK   0x3
 
#define QIB_7322_IBCStatusB_0_ReqDDSLocalFromRmt_LSB   0x1A
 
#define QIB_7322_IBCStatusB_0_ReqDDSLocalFromRmt_MSB   0x1D
 
#define QIB_7322_IBCStatusB_0_ReqDDSLocalFromRmt_RMASK   0xF
 
#define QIB_7322_IBCStatusB_0_LinkRoundTripLatency_LSB   0x0
 
#define QIB_7322_IBCStatusB_0_LinkRoundTripLatency_MSB   0x19
 
#define QIB_7322_IBCStatusB_0_LinkRoundTripLatency_RMASK   0x3FFFFFF
 
#define QIB_7322_IBCCtrlA_0_OFFS   0x1560
 
#define QIB_7322_IBCCtrlA_0_DEF   0x0000000000000000
 
#define QIB_7322_IBCCtrlA_0_Loopback_LSB   0x3F
 
#define QIB_7322_IBCCtrlA_0_Loopback_MSB   0x3F
 
#define QIB_7322_IBCCtrlA_0_Loopback_RMASK   0x1
 
#define QIB_7322_IBCCtrlA_0_LinkDownDefaultState_LSB   0x3E
 
#define QIB_7322_IBCCtrlA_0_LinkDownDefaultState_MSB   0x3E
 
#define QIB_7322_IBCCtrlA_0_LinkDownDefaultState_RMASK   0x1
 
#define QIB_7322_IBCCtrlA_0_IBLinkEn_LSB   0x3D
 
#define QIB_7322_IBCCtrlA_0_IBLinkEn_MSB   0x3D
 
#define QIB_7322_IBCCtrlA_0_IBLinkEn_RMASK   0x1
 
#define QIB_7322_IBCCtrlA_0_IBStatIntReductionEn_LSB   0x3C
 
#define QIB_7322_IBCCtrlA_0_IBStatIntReductionEn_MSB   0x3C
 
#define QIB_7322_IBCCtrlA_0_IBStatIntReductionEn_RMASK   0x1
 
#define QIB_7322_IBCCtrlA_0_NumVLane_LSB   0x30
 
#define QIB_7322_IBCCtrlA_0_NumVLane_MSB   0x32
 
#define QIB_7322_IBCCtrlA_0_NumVLane_RMASK   0x7
 
#define QIB_7322_IBCCtrlA_0_OverrunThreshold_LSB   0x24
 
#define QIB_7322_IBCCtrlA_0_OverrunThreshold_MSB   0x27
 
#define QIB_7322_IBCCtrlA_0_OverrunThreshold_RMASK   0xF
 
#define QIB_7322_IBCCtrlA_0_PhyerrThreshold_LSB   0x20
 
#define QIB_7322_IBCCtrlA_0_PhyerrThreshold_MSB   0x23
 
#define QIB_7322_IBCCtrlA_0_PhyerrThreshold_RMASK   0xF
 
#define QIB_7322_IBCCtrlA_0_MaxPktLen_LSB   0x15
 
#define QIB_7322_IBCCtrlA_0_MaxPktLen_MSB   0x1F
 
#define QIB_7322_IBCCtrlA_0_MaxPktLen_RMASK   0x7FF
 
#define QIB_7322_IBCCtrlA_0_LinkCmd_LSB   0x13
 
#define QIB_7322_IBCCtrlA_0_LinkCmd_MSB   0x14
 
#define QIB_7322_IBCCtrlA_0_LinkCmd_RMASK   0x3
 
#define QIB_7322_IBCCtrlA_0_LinkInitCmd_LSB   0x10
 
#define QIB_7322_IBCCtrlA_0_LinkInitCmd_MSB   0x12
 
#define QIB_7322_IBCCtrlA_0_LinkInitCmd_RMASK   0x7
 
#define QIB_7322_IBCCtrlA_0_FlowCtrlWaterMark_LSB   0x8
 
#define QIB_7322_IBCCtrlA_0_FlowCtrlWaterMark_MSB   0xF
 
#define QIB_7322_IBCCtrlA_0_FlowCtrlWaterMark_RMASK   0xFF
 
#define QIB_7322_IBCCtrlA_0_FlowCtrlPeriod_LSB   0x0
 
#define QIB_7322_IBCCtrlA_0_FlowCtrlPeriod_MSB   0x7
 
#define QIB_7322_IBCCtrlA_0_FlowCtrlPeriod_RMASK   0xFF
 
#define QIB_7322_IBCCtrlB_0_OFFS   0x1568
 
#define QIB_7322_IBCCtrlB_0_DEF   0x00000000000305FF
 
#define QIB_7322_IBCCtrlB_0_IB_DLID_MASK_LSB   0x30
 
#define QIB_7322_IBCCtrlB_0_IB_DLID_MASK_MSB   0x3F
 
#define QIB_7322_IBCCtrlB_0_IB_DLID_MASK_RMASK   0xFFFF
 
#define QIB_7322_IBCCtrlB_0_IB_DLID_LSB   0x20
 
#define QIB_7322_IBCCtrlB_0_IB_DLID_MSB   0x2F
 
#define QIB_7322_IBCCtrlB_0_IB_DLID_RMASK   0xFFFF
 
#define QIB_7322_IBCCtrlB_0_IB_ENABLE_FILT_DPKT_LSB   0x1B
 
#define QIB_7322_IBCCtrlB_0_IB_ENABLE_FILT_DPKT_MSB   0x1B
 
#define QIB_7322_IBCCtrlB_0_IB_ENABLE_FILT_DPKT_RMASK   0x1
 
#define QIB_7322_IBCCtrlB_0_HRTBT_REQ_LSB   0x1A
 
#define QIB_7322_IBCCtrlB_0_HRTBT_REQ_MSB   0x1A
 
#define QIB_7322_IBCCtrlB_0_HRTBT_REQ_RMASK   0x1
 
#define QIB_7322_IBCCtrlB_0_HRTBT_PORT_LSB   0x12
 
#define QIB_7322_IBCCtrlB_0_HRTBT_PORT_MSB   0x19
 
#define QIB_7322_IBCCtrlB_0_HRTBT_PORT_RMASK   0xFF
 
#define QIB_7322_IBCCtrlB_0_HRTBT_AUTO_LSB   0x11
 
#define QIB_7322_IBCCtrlB_0_HRTBT_AUTO_MSB   0x11
 
#define QIB_7322_IBCCtrlB_0_HRTBT_AUTO_RMASK   0x1
 
#define QIB_7322_IBCCtrlB_0_HRTBT_ENB_LSB   0x10
 
#define QIB_7322_IBCCtrlB_0_HRTBT_ENB_MSB   0x10
 
#define QIB_7322_IBCCtrlB_0_HRTBT_ENB_RMASK   0x1
 
#define QIB_7322_IBCCtrlB_0_SD_DDS_LSB   0xC
 
#define QIB_7322_IBCCtrlB_0_SD_DDS_MSB   0xF
 
#define QIB_7322_IBCCtrlB_0_SD_DDS_RMASK   0xF
 
#define QIB_7322_IBCCtrlB_0_SD_DDSV_LSB   0xB
 
#define QIB_7322_IBCCtrlB_0_SD_DDSV_MSB   0xB
 
#define QIB_7322_IBCCtrlB_0_SD_DDSV_RMASK   0x1
 
#define QIB_7322_IBCCtrlB_0_SD_ADD_ENB_LSB   0xA
 
#define QIB_7322_IBCCtrlB_0_SD_ADD_ENB_MSB   0xA
 
#define QIB_7322_IBCCtrlB_0_SD_ADD_ENB_RMASK   0x1
 
#define QIB_7322_IBCCtrlB_0_SD_RX_EQUAL_ENABLE_LSB   0x9
 
#define QIB_7322_IBCCtrlB_0_SD_RX_EQUAL_ENABLE_MSB   0x9
 
#define QIB_7322_IBCCtrlB_0_SD_RX_EQUAL_ENABLE_RMASK   0x1
 
#define QIB_7322_IBCCtrlB_0_IB_LANE_REV_SUPPORTED_LSB   0x8
 
#define QIB_7322_IBCCtrlB_0_IB_LANE_REV_SUPPORTED_MSB   0x8
 
#define QIB_7322_IBCCtrlB_0_IB_LANE_REV_SUPPORTED_RMASK   0x1
 
#define QIB_7322_IBCCtrlB_0_IB_POLARITY_REV_SUPP_LSB   0x7
 
#define QIB_7322_IBCCtrlB_0_IB_POLARITY_REV_SUPP_MSB   0x7
 
#define QIB_7322_IBCCtrlB_0_IB_POLARITY_REV_SUPP_RMASK   0x1
 
#define QIB_7322_IBCCtrlB_0_IB_NUM_CHANNELS_LSB   0x5
 
#define QIB_7322_IBCCtrlB_0_IB_NUM_CHANNELS_MSB   0x6
 
#define QIB_7322_IBCCtrlB_0_IB_NUM_CHANNELS_RMASK   0x3
 
#define QIB_7322_IBCCtrlB_0_SD_SPEED_QDR_LSB   0x4
 
#define QIB_7322_IBCCtrlB_0_SD_SPEED_QDR_MSB   0x4
 
#define QIB_7322_IBCCtrlB_0_SD_SPEED_QDR_RMASK   0x1
 
#define QIB_7322_IBCCtrlB_0_SD_SPEED_DDR_LSB   0x3
 
#define QIB_7322_IBCCtrlB_0_SD_SPEED_DDR_MSB   0x3
 
#define QIB_7322_IBCCtrlB_0_SD_SPEED_DDR_RMASK   0x1
 
#define QIB_7322_IBCCtrlB_0_SD_SPEED_SDR_LSB   0x2
 
#define QIB_7322_IBCCtrlB_0_SD_SPEED_SDR_MSB   0x2
 
#define QIB_7322_IBCCtrlB_0_SD_SPEED_SDR_RMASK   0x1
 
#define QIB_7322_IBCCtrlB_0_SD_SPEED_LSB   0x1
 
#define QIB_7322_IBCCtrlB_0_SD_SPEED_MSB   0x1
 
#define QIB_7322_IBCCtrlB_0_SD_SPEED_RMASK   0x1
 
#define QIB_7322_IBCCtrlB_0_IB_ENHANCED_MODE_LSB   0x0
 
#define QIB_7322_IBCCtrlB_0_IB_ENHANCED_MODE_MSB   0x0
 
#define QIB_7322_IBCCtrlB_0_IB_ENHANCED_MODE_RMASK   0x1
 
#define QIB_7322_IBCCtrlC_0_OFFS   0x1570
 
#define QIB_7322_IBCCtrlC_0_DEF   0x0000000000000301
 
#define QIB_7322_IBCCtrlC_0_IB_BACK_PORCH_LSB   0x5
 
#define QIB_7322_IBCCtrlC_0_IB_BACK_PORCH_MSB   0x9
 
#define QIB_7322_IBCCtrlC_0_IB_BACK_PORCH_RMASK   0x1F
 
#define QIB_7322_IBCCtrlC_0_IB_FRONT_PORCH_LSB   0x0
 
#define QIB_7322_IBCCtrlC_0_IB_FRONT_PORCH_MSB   0x4
 
#define QIB_7322_IBCCtrlC_0_IB_FRONT_PORCH_RMASK   0x1F
 
#define QIB_7322_HRTBT_GUID_0_OFFS   0x1588
 
#define QIB_7322_HRTBT_GUID_0_DEF   0x0000000000000000
 
#define QIB_7322_IB_SDTEST_IF_TX_0_OFFS   0x1590
 
#define QIB_7322_IB_SDTEST_IF_TX_0_DEF   0x0000000000000000
 
#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_RX_CFG_LSB   0x30
 
#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_RX_CFG_MSB   0x3F
 
#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_RX_CFG_RMASK   0xFFFF
 
#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_TX_CFG_LSB   0x20
 
#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_TX_CFG_MSB   0x2F
 
#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_TX_CFG_RMASK   0xFFFF
 
#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_SPEED_LSB   0xD
 
#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_SPEED_MSB   0xF
 
#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_SPEED_RMASK   0x7
 
#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_OPCODE_LSB   0xB
 
#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_OPCODE_MSB   0xC
 
#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_OPCODE_RMASK   0x3
 
#define QIB_7322_IB_SDTEST_IF_TX_0_CREDIT_CHANGE_LSB   0x4
 
#define QIB_7322_IB_SDTEST_IF_TX_0_CREDIT_CHANGE_MSB   0x4
 
#define QIB_7322_IB_SDTEST_IF_TX_0_CREDIT_CHANGE_RMASK   0x1
 
#define QIB_7322_IB_SDTEST_IF_TX_0_VL_CAP_LSB   0x2
 
#define QIB_7322_IB_SDTEST_IF_TX_0_VL_CAP_MSB   0x3
 
#define QIB_7322_IB_SDTEST_IF_TX_0_VL_CAP_RMASK   0x3
 
#define QIB_7322_IB_SDTEST_IF_TX_0_TS_3_TX_VALID_LSB   0x1
 
#define QIB_7322_IB_SDTEST_IF_TX_0_TS_3_TX_VALID_MSB   0x1
 
#define QIB_7322_IB_SDTEST_IF_TX_0_TS_3_TX_VALID_RMASK   0x1
 
#define QIB_7322_IB_SDTEST_IF_TX_0_TS_T_TX_VALID_LSB   0x0
 
#define QIB_7322_IB_SDTEST_IF_TX_0_TS_T_TX_VALID_MSB   0x0
 
#define QIB_7322_IB_SDTEST_IF_TX_0_TS_T_TX_VALID_RMASK   0x1
 
#define QIB_7322_IB_SDTEST_IF_RX_0_OFFS   0x1598
 
#define QIB_7322_IB_SDTEST_IF_RX_0_DEF   0x0000000000000000
 
#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_RX_CFG_LSB   0x30
 
#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_RX_CFG_MSB   0x3F
 
#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_RX_CFG_RMASK   0xFFFF
 
#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_TX_CFG_LSB   0x20
 
#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_TX_CFG_MSB   0x2F
 
#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_TX_CFG_RMASK   0xFFFF
 
#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_B_LSB   0x18
 
#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_B_MSB   0x1F
 
#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_B_RMASK   0xFF
 
#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_A_LSB   0x10
 
#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_A_MSB   0x17
 
#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_A_RMASK   0xFF
 
#define QIB_7322_IB_SDTEST_IF_RX_0_TS_3_RX_VALID_LSB   0x1
 
#define QIB_7322_IB_SDTEST_IF_RX_0_TS_3_RX_VALID_MSB   0x1
 
#define QIB_7322_IB_SDTEST_IF_RX_0_TS_3_RX_VALID_RMASK   0x1
 
#define QIB_7322_IB_SDTEST_IF_RX_0_TS_T_RX_VALID_LSB   0x0
 
#define QIB_7322_IB_SDTEST_IF_RX_0_TS_T_RX_VALID_MSB   0x0
 
#define QIB_7322_IB_SDTEST_IF_RX_0_TS_T_RX_VALID_RMASK   0x1
 
#define QIB_7322_IBNCModeCtrl_0_OFFS   0x15B8
 
#define QIB_7322_IBNCModeCtrl_0_DEF   0x0000000000000000
 
#define QIB_7322_IBNCModeCtrl_0_ScrambleCapRemoteForce_LSB   0x22
 
#define QIB_7322_IBNCModeCtrl_0_ScrambleCapRemoteForce_MSB   0x22
 
#define QIB_7322_IBNCModeCtrl_0_ScrambleCapRemoteForce_RMASK   0x1
 
#define QIB_7322_IBNCModeCtrl_0_ScrambleCapRemoteMask_LSB   0x21
 
#define QIB_7322_IBNCModeCtrl_0_ScrambleCapRemoteMask_MSB   0x21
 
#define QIB_7322_IBNCModeCtrl_0_ScrambleCapRemoteMask_RMASK   0x1
 
#define QIB_7322_IBNCModeCtrl_0_ScrambleCapLocal_LSB   0x20
 
#define QIB_7322_IBNCModeCtrl_0_ScrambleCapLocal_MSB   0x20
 
#define QIB_7322_IBNCModeCtrl_0_ScrambleCapLocal_RMASK   0x1
 
#define QIB_7322_IBNCModeCtrl_0_TSMCode_TS2_LSB   0x11
 
#define QIB_7322_IBNCModeCtrl_0_TSMCode_TS2_MSB   0x19
 
#define QIB_7322_IBNCModeCtrl_0_TSMCode_TS2_RMASK   0x1FF
 
#define QIB_7322_IBNCModeCtrl_0_TSMCode_TS1_LSB   0x8
 
#define QIB_7322_IBNCModeCtrl_0_TSMCode_TS1_MSB   0x10
 
#define QIB_7322_IBNCModeCtrl_0_TSMCode_TS1_RMASK   0x1FF
 
#define QIB_7322_IBNCModeCtrl_0_TSMEnable_ignore_TSM_on_rx_LSB   0x2
 
#define QIB_7322_IBNCModeCtrl_0_TSMEnable_ignore_TSM_on_rx_MSB   0x2
 
#define QIB_7322_IBNCModeCtrl_0_TSMEnable_ignore_TSM_on_rx_RMASK   0x1
 
#define QIB_7322_IBNCModeCtrl_0_TSMEnable_send_TS2_LSB   0x1
 
#define QIB_7322_IBNCModeCtrl_0_TSMEnable_send_TS2_MSB   0x1
 
#define QIB_7322_IBNCModeCtrl_0_TSMEnable_send_TS2_RMASK   0x1
 
#define QIB_7322_IBNCModeCtrl_0_TSMEnable_send_TS1_LSB   0x0
 
#define QIB_7322_IBNCModeCtrl_0_TSMEnable_send_TS1_MSB   0x0
 
#define QIB_7322_IBNCModeCtrl_0_TSMEnable_send_TS1_RMASK   0x1
 
#define QIB_7322_IBSerdesStatus_0_OFFS   0x15D0
 
#define QIB_7322_IBSerdesStatus_0_DEF   0x0000000000000000
 
#define QIB_7322_IBPCSConfig_0_OFFS   0x15D8
 
#define QIB_7322_IBPCSConfig_0_DEF   0x0000000000000007
 
#define QIB_7322_IBPCSConfig_0_link_sync_mask_LSB   0x9
 
#define QIB_7322_IBPCSConfig_0_link_sync_mask_MSB   0x12
 
#define QIB_7322_IBPCSConfig_0_link_sync_mask_RMASK   0x3FF
 
#define QIB_7322_IBPCSConfig_0_xcv_rreset_LSB   0x2
 
#define QIB_7322_IBPCSConfig_0_xcv_rreset_MSB   0x2
 
#define QIB_7322_IBPCSConfig_0_xcv_rreset_RMASK   0x1
 
#define QIB_7322_IBPCSConfig_0_xcv_treset_LSB   0x1
 
#define QIB_7322_IBPCSConfig_0_xcv_treset_MSB   0x1
 
#define QIB_7322_IBPCSConfig_0_xcv_treset_RMASK   0x1
 
#define QIB_7322_IBPCSConfig_0_tx_rx_reset_LSB   0x0
 
#define QIB_7322_IBPCSConfig_0_tx_rx_reset_MSB   0x0
 
#define QIB_7322_IBPCSConfig_0_tx_rx_reset_RMASK   0x1
 
#define QIB_7322_IBSerdesCtrl_0_OFFS   0x15E0
 
#define QIB_7322_IBSerdesCtrl_0_DEF   0x0000000000FFA00F
 
#define QIB_7322_IBSerdesCtrl_0_DISABLE_RXLATOFF_QDR_LSB   0x1A
 
#define QIB_7322_IBSerdesCtrl_0_DISABLE_RXLATOFF_QDR_MSB   0x1A
 
#define QIB_7322_IBSerdesCtrl_0_DISABLE_RXLATOFF_QDR_RMASK   0x1
 
#define QIB_7322_IBSerdesCtrl_0_DISABLE_RXLATOFF_DDR_LSB   0x19
 
#define QIB_7322_IBSerdesCtrl_0_DISABLE_RXLATOFF_DDR_MSB   0x19
 
#define QIB_7322_IBSerdesCtrl_0_DISABLE_RXLATOFF_DDR_RMASK   0x1
 
#define QIB_7322_IBSerdesCtrl_0_DISABLE_RXLATOFF_SDR_LSB   0x18
 
#define QIB_7322_IBSerdesCtrl_0_DISABLE_RXLATOFF_SDR_MSB   0x18
 
#define QIB_7322_IBSerdesCtrl_0_DISABLE_RXLATOFF_SDR_RMASK   0x1
 
#define QIB_7322_IBSerdesCtrl_0_CHANNEL_RESET_N_LSB   0x14
 
#define QIB_7322_IBSerdesCtrl_0_CHANNEL_RESET_N_MSB   0x17
 
#define QIB_7322_IBSerdesCtrl_0_CHANNEL_RESET_N_RMASK   0xF
 
#define QIB_7322_IBSerdesCtrl_0_CGMODE_LSB   0x10
 
#define QIB_7322_IBSerdesCtrl_0_CGMODE_MSB   0x13
 
#define QIB_7322_IBSerdesCtrl_0_CGMODE_RMASK   0xF
 
#define QIB_7322_IBSerdesCtrl_0_IB_LAT_MODE_LSB   0xF
 
#define QIB_7322_IBSerdesCtrl_0_IB_LAT_MODE_MSB   0xF
 
#define QIB_7322_IBSerdesCtrl_0_IB_LAT_MODE_RMASK   0x1
 
#define QIB_7322_IBSerdesCtrl_0_RXLOSEN_LSB   0xD
 
#define QIB_7322_IBSerdesCtrl_0_RXLOSEN_MSB   0xD
 
#define QIB_7322_IBSerdesCtrl_0_RXLOSEN_RMASK   0x1
 
#define QIB_7322_IBSerdesCtrl_0_LPEN_LSB   0xC
 
#define QIB_7322_IBSerdesCtrl_0_LPEN_MSB   0xC
 
#define QIB_7322_IBSerdesCtrl_0_LPEN_RMASK   0x1
 
#define QIB_7322_IBSerdesCtrl_0_PLLPD_LSB   0xB
 
#define QIB_7322_IBSerdesCtrl_0_PLLPD_MSB   0xB
 
#define QIB_7322_IBSerdesCtrl_0_PLLPD_RMASK   0x1
 
#define QIB_7322_IBSerdesCtrl_0_TXPD_LSB   0xA
 
#define QIB_7322_IBSerdesCtrl_0_TXPD_MSB   0xA
 
#define QIB_7322_IBSerdesCtrl_0_TXPD_RMASK   0x1
 
#define QIB_7322_IBSerdesCtrl_0_RXPD_LSB   0x9
 
#define QIB_7322_IBSerdesCtrl_0_RXPD_MSB   0x9
 
#define QIB_7322_IBSerdesCtrl_0_RXPD_RMASK   0x1
 
#define QIB_7322_IBSerdesCtrl_0_TXIDLE_LSB   0x8
 
#define QIB_7322_IBSerdesCtrl_0_TXIDLE_MSB   0x8
 
#define QIB_7322_IBSerdesCtrl_0_TXIDLE_RMASK   0x1
 
#define QIB_7322_IBSerdesCtrl_0_CMODE_LSB   0x0
 
#define QIB_7322_IBSerdesCtrl_0_CMODE_MSB   0x6
 
#define QIB_7322_IBSerdesCtrl_0_CMODE_RMASK   0x7F
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_OFFS   0x1600
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_DEF   0x0000000000000000
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_tx_override_deemphasis_select_LSB   0x1F
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_tx_override_deemphasis_select_MSB   0x1F
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_tx_override_deemphasis_select_RMASK   0x1
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_reset_tx_deemphasis_override_LSB   0x1E
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_reset_tx_deemphasis_override_MSB   0x1E
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_reset_tx_deemphasis_override_RMASK   0x1
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txampcntl_d2a_LSB   0xE
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txampcntl_d2a_MSB   0x11
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txampcntl_d2a_RMASK   0xF
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txc0_ena_LSB   0x9
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txc0_ena_MSB   0xD
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txc0_ena_RMASK   0x1F
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txcp1_ena_LSB   0x5
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txcp1_ena_MSB   0x8
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txcp1_ena_RMASK   0xF
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txcn1_xtra_emph0_LSB   0x3
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txcn1_xtra_emph0_MSB   0x4
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txcn1_xtra_emph0_RMASK   0x3
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txcn1_ena_LSB   0x0
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txcn1_ena_MSB   0x2
 
#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txcn1_ena_RMASK   0x7
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_OFFS   0x1640
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_DEF   0x0000000000000000
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch3_LSB   0x27
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch3_MSB   0x27
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch3_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch2_LSB   0x26
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch2_MSB   0x26
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch2_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch1_LSB   0x25
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch1_MSB   0x25
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch1_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch0_LSB   0x24
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch0_MSB   0x24
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch0_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch3_LSB   0x23
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch3_MSB   0x23
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch3_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch2_LSB   0x22
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch2_MSB   0x22
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch2_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch1_LSB   0x21
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch1_MSB   0x21
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch1_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch0_LSB   0x20
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch0_MSB   0x20
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch0_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch3_LSB   0x18
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch3_MSB   0x1F
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch3_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch2_LSB   0x10
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch2_MSB   0x17
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch2_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch1_LSB   0x8
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch1_MSB   0xF
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch1_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch0_LSB   0x0
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch0_MSB   0x7
 
#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch0_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_OFFS   0x1648
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_DEF   0x0000000000000000
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch3_LSB   0x27
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch3_MSB   0x27
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch3_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch2_LSB   0x26
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch2_MSB   0x26
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch2_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch1_LSB   0x25
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch1_MSB   0x25
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch1_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch0_LSB   0x24
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch0_MSB   0x24
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch0_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch3_LSB   0x23
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch3_MSB   0x23
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch3_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch2_LSB   0x22
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch2_MSB   0x22
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch2_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch1_LSB   0x21
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch1_MSB   0x21
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch1_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch0_LSB   0x20
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch0_MSB   0x20
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch0_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch3_LSB   0x18
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch3_MSB   0x1F
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch3_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch2_LSB   0x10
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch2_MSB   0x17
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch2_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch1_LSB   0x8
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch1_MSB   0xF
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch1_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch0_LSB   0x0
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch0_MSB   0x7
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch0_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_OFFS   0x1650
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_DEF   0x0000000000000000
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch3_LSB   0x27
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch3_MSB   0x27
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch3_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch2_LSB   0x26
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch2_MSB   0x26
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch2_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch1_LSB   0x25
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch1_MSB   0x25
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch1_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch0_LSB   0x24
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch0_MSB   0x24
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch0_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch3_LSB   0x23
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch3_MSB   0x23
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch3_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch2_LSB   0x22
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch2_MSB   0x22
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch2_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch1_LSB   0x21
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch1_MSB   0x21
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch1_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch0_LSB   0x20
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch0_MSB   0x20
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch0_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch3_LSB   0x18
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch3_MSB   0x1F
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch3_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch2_LSB   0x10
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch2_MSB   0x17
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch2_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch1_LSB   0x8
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch1_MSB   0xF
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch1_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch0_LSB   0x0
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch0_MSB   0x7
 
#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch0_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_OFFS   0x1658
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_DEF   0x0000000000000000
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch3_LSB   0x27
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch3_MSB   0x27
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch3_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch2_LSB   0x26
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch2_MSB   0x26
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch2_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch1_LSB   0x25
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch1_MSB   0x25
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch1_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch0_LSB   0x24
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch0_MSB   0x24
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch0_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch3_LSB   0x23
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch3_MSB   0x23
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch3_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch2_LSB   0x22
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch2_MSB   0x22
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch2_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch1_LSB   0x21
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch1_MSB   0x21
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch1_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch0_LSB   0x20
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch0_MSB   0x20
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch0_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch3_LSB   0x18
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch3_MSB   0x1F
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch3_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch2_LSB   0x10
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch2_MSB   0x17
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch2_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch1_LSB   0x8
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch1_MSB   0xF
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch1_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch0_LSB   0x0
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch0_MSB   0x7
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch0_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_OFFS   0x1660
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_DEF   0x0000000000000000
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch3_LSB   0x27
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch3_MSB   0x27
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch3_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch2_LSB   0x26
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch2_MSB   0x26
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch2_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch1_LSB   0x25
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch1_MSB   0x25
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch1_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch0_LSB   0x24
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch0_MSB   0x24
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch0_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch3_LSB   0x23
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch3_MSB   0x23
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch3_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch2_LSB   0x22
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch2_MSB   0x22
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch2_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch1_LSB   0x21
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch1_MSB   0x21
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch1_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch0_LSB   0x20
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch0_MSB   0x20
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch0_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch3_LSB   0x18
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch3_MSB   0x1F
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch3_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch2_LSB   0x10
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch2_MSB   0x17
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch2_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch1_LSB   0x8
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch1_MSB   0xF
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch1_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch0_LSB   0x0
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch0_MSB   0x7
 
#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch0_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_OFFS   0x1668
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_DEF   0x0000000000000000
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch3_LSB   0x27
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch3_MSB   0x27
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch3_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch2_LSB   0x26
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch2_MSB   0x26
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch2_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch1_LSB   0x25
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch1_MSB   0x25
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch1_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch0_LSB   0x24
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch0_MSB   0x24
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch0_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch3_LSB   0x23
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch3_MSB   0x23
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch3_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch2_LSB   0x22
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch2_MSB   0x22
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch2_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch1_LSB   0x21
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch1_MSB   0x21
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch1_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch0_LSB   0x20
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch0_MSB   0x20
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch0_RMASK   0x1
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch3_LSB   0x18
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch3_MSB   0x1F
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch3_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch2_LSB   0x10
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch2_MSB   0x17
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch2_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch1_LSB   0x8
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch1_MSB   0xF
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch1_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch0_LSB   0x0
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch0_MSB   0x7
 
#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch0_RMASK   0xFF
 
#define QIB_7322_ADAPT_DISABLE_TIMER_THRESHOLD_0_OFFS   0x1670
 
#define QIB_7322_ADAPT_DISABLE_TIMER_THRESHOLD_0_DEF   0x0000000000000000
 
#define QIB_7322_HighPriorityLimit_0_OFFS   0x1BC0
 
#define QIB_7322_HighPriorityLimit_0_DEF   0x0000000000000000
 
#define QIB_7322_HighPriorityLimit_0_Limit_LSB   0x0
 
#define QIB_7322_HighPriorityLimit_0_Limit_MSB   0x7
 
#define QIB_7322_HighPriorityLimit_0_Limit_RMASK   0xFF
 
#define QIB_7322_LowPriority0_0_OFFS   0x1C00
 
#define QIB_7322_LowPriority0_0_DEF   0x0000000000000000
 
#define QIB_7322_LowPriority0_0_VirtualLane_LSB   0x10
 
#define QIB_7322_LowPriority0_0_VirtualLane_MSB   0x12
 
#define QIB_7322_LowPriority0_0_VirtualLane_RMASK   0x7
 
#define QIB_7322_LowPriority0_0_Weight_LSB   0x0
 
#define QIB_7322_LowPriority0_0_Weight_MSB   0x7
 
#define QIB_7322_LowPriority0_0_Weight_RMASK   0xFF
 
#define QIB_7322_HighPriority0_0_OFFS   0x1E00
 
#define QIB_7322_HighPriority0_0_DEF   0x0000000000000000
 
#define QIB_7322_HighPriority0_0_VirtualLane_LSB   0x10
 
#define QIB_7322_HighPriority0_0_VirtualLane_MSB   0x12
 
#define QIB_7322_HighPriority0_0_VirtualLane_RMASK   0x7
 
#define QIB_7322_HighPriority0_0_Weight_LSB   0x0
 
#define QIB_7322_HighPriority0_0_Weight_MSB   0x7
 
#define QIB_7322_HighPriority0_0_Weight_RMASK   0xFF
 
#define QIB_7322_CntrRegBase_1_OFFS   0x2028
 
#define QIB_7322_CntrRegBase_1_DEF   0x0000000000013000
 
#define QIB_7322_RcvQPMulticastContext_1_OFFS   0x2170
 
#define QIB_7322_SendCtrl_1_OFFS   0x21C0
 
#define QIB_7322_SendBufAvail0_OFFS   0x3000
 
#define QIB_7322_SendBufAvail0_DEF   0x0000000000000000
 
#define QIB_7322_SendBufAvail0_SendBuf_31_0_LSB   0x0
 
#define QIB_7322_SendBufAvail0_SendBuf_31_0_MSB   0x3F
 
#define QIB_7322_SendBufAvail0_SendBuf_31_0_RMASK   0x0
 
#define QIB_7322_MsixTable_OFFS   0x8000
 
#define QIB_7322_MsixTable_DEF   0x0000000000000000
 
#define QIB_7322_MsixPba_OFFS   0x9000
 
#define QIB_7322_MsixPba_DEF   0x0000000000000000
 
#define QIB_7322_LAMemory_OFFS   0xA000
 
#define QIB_7322_LAMemory_DEF   0x0000000000000000
 
#define QIB_7322_LBIntCnt_OFFS   0x11000
 
#define QIB_7322_LBIntCnt_DEF   0x0000000000000000
 
#define QIB_7322_LBFlowStallCnt_OFFS   0x11008
 
#define QIB_7322_LBFlowStallCnt_DEF   0x0000000000000000
 
#define QIB_7322_RxTIDFullErrCnt_OFFS   0x110D0
 
#define QIB_7322_RxTIDFullErrCnt_DEF   0x0000000000000000
 
#define QIB_7322_RxTIDValidErrCnt_OFFS   0x110D8
 
#define QIB_7322_RxTIDValidErrCnt_DEF   0x0000000000000000
 
#define QIB_7322_RxP0HdrEgrOvflCnt_OFFS   0x110E8
 
#define QIB_7322_RxP0HdrEgrOvflCnt_DEF   0x0000000000000000
 
#define QIB_7322_PcieRetryBufDiagQwordCnt_OFFS   0x111A0
 
#define QIB_7322_PcieRetryBufDiagQwordCnt_DEF   0x0000000000000000
 
#define QIB_7322_RxTidFlowDropCnt_OFFS   0x111E0
 
#define QIB_7322_RxTidFlowDropCnt_DEF   0x0000000000000000
 
#define QIB_7322_LBIntCnt_0_OFFS   0x12000
 
#define QIB_7322_LBIntCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_TxCreditUpToDateTimeOut_0_OFFS   0x12008
 
#define QIB_7322_TxCreditUpToDateTimeOut_0_DEF   0x0000000000000000
 
#define QIB_7322_TxSDmaDescCnt_0_OFFS   0x12010
 
#define QIB_7322_TxSDmaDescCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_TxUnsupVLErrCnt_0_OFFS   0x12018
 
#define QIB_7322_TxUnsupVLErrCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_TxDataPktCnt_0_OFFS   0x12020
 
#define QIB_7322_TxDataPktCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_TxFlowPktCnt_0_OFFS   0x12028
 
#define QIB_7322_TxFlowPktCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_TxDwordCnt_0_OFFS   0x12030
 
#define QIB_7322_TxDwordCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_TxLenErrCnt_0_OFFS   0x12038
 
#define QIB_7322_TxLenErrCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_TxMaxMinLenErrCnt_0_OFFS   0x12040
 
#define QIB_7322_TxMaxMinLenErrCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_TxUnderrunCnt_0_OFFS   0x12048
 
#define QIB_7322_TxUnderrunCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_TxFlowStallCnt_0_OFFS   0x12050
 
#define QIB_7322_TxFlowStallCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_TxDroppedPktCnt_0_OFFS   0x12058
 
#define QIB_7322_TxDroppedPktCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxDroppedPktCnt_0_OFFS   0x12060
 
#define QIB_7322_RxDroppedPktCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxDataPktCnt_0_OFFS   0x12068
 
#define QIB_7322_RxDataPktCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxFlowPktCnt_0_OFFS   0x12070
 
#define QIB_7322_RxFlowPktCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxDwordCnt_0_OFFS   0x12078
 
#define QIB_7322_RxDwordCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxLenErrCnt_0_OFFS   0x12080
 
#define QIB_7322_RxLenErrCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxMaxMinLenErrCnt_0_OFFS   0x12088
 
#define QIB_7322_RxMaxMinLenErrCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxICRCErrCnt_0_OFFS   0x12090
 
#define QIB_7322_RxICRCErrCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxVCRCErrCnt_0_OFFS   0x12098
 
#define QIB_7322_RxVCRCErrCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxFlowCtrlViolCnt_0_OFFS   0x120A0
 
#define QIB_7322_RxFlowCtrlViolCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxVersionErrCnt_0_OFFS   0x120A8
 
#define QIB_7322_RxVersionErrCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxLinkMalformCnt_0_OFFS   0x120B0
 
#define QIB_7322_RxLinkMalformCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxEBPCnt_0_OFFS   0x120B8
 
#define QIB_7322_RxEBPCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxLPCRCErrCnt_0_OFFS   0x120C0
 
#define QIB_7322_RxLPCRCErrCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxBufOvflCnt_0_OFFS   0x120C8
 
#define QIB_7322_RxBufOvflCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxLenTruncateCnt_0_OFFS   0x120D0
 
#define QIB_7322_RxLenTruncateCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxPKeyMismatchCnt_0_OFFS   0x120E0
 
#define QIB_7322_RxPKeyMismatchCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_IBLinkDownedCnt_0_OFFS   0x12180
 
#define QIB_7322_IBLinkDownedCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_IBSymbolErrCnt_0_OFFS   0x12188
 
#define QIB_7322_IBSymbolErrCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_IBStatusChangeCnt_0_OFFS   0x12190
 
#define QIB_7322_IBStatusChangeCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_IBLinkErrRecoveryCnt_0_OFFS   0x12198
 
#define QIB_7322_IBLinkErrRecoveryCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_ExcessBufferOvflCnt_0_OFFS   0x121A8
 
#define QIB_7322_ExcessBufferOvflCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_LocalLinkIntegrityErrCnt_0_OFFS   0x121B0
 
#define QIB_7322_LocalLinkIntegrityErrCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxVlErrCnt_0_OFFS   0x121B8
 
#define QIB_7322_RxVlErrCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxDlidFltrCnt_0_OFFS   0x121C0
 
#define QIB_7322_RxDlidFltrCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxVL15DroppedPktCnt_0_OFFS   0x121C8
 
#define QIB_7322_RxVL15DroppedPktCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxOtherLocalPhyErrCnt_0_OFFS   0x121D0
 
#define QIB_7322_RxOtherLocalPhyErrCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_RxQPInvalidContextCnt_0_OFFS   0x121D8
 
#define QIB_7322_RxQPInvalidContextCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_TxHeadersErrCnt_0_OFFS   0x121F8
 
#define QIB_7322_TxHeadersErrCnt_0_DEF   0x0000000000000000
 
#define QIB_7322_PSRcvDataCount_0_OFFS   0x12218
 
#define QIB_7322_PSRcvDataCount_0_DEF   0x0000000000000000
 
#define QIB_7322_PSRcvPktsCount_0_OFFS   0x12220
 
#define QIB_7322_PSRcvPktsCount_0_DEF   0x0000000000000000
 
#define QIB_7322_PSXmitDataCount_0_OFFS   0x12228
 
#define QIB_7322_PSXmitDataCount_0_DEF   0x0000000000000000
 
#define QIB_7322_PSXmitPktsCount_0_OFFS   0x12230
 
#define QIB_7322_PSXmitPktsCount_0_DEF   0x0000000000000000
 
#define QIB_7322_PSXmitWaitCount_0_OFFS   0x12238
 
#define QIB_7322_PSXmitWaitCount_0_DEF   0x0000000000000000
 
#define QIB_7322_LBIntCnt_1_OFFS   0x13000
 
#define QIB_7322_LBIntCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_TxCreditUpToDateTimeOut_1_OFFS   0x13008
 
#define QIB_7322_TxCreditUpToDateTimeOut_1_DEF   0x0000000000000000
 
#define QIB_7322_TxSDmaDescCnt_1_OFFS   0x13010
 
#define QIB_7322_TxSDmaDescCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_TxUnsupVLErrCnt_1_OFFS   0x13018
 
#define QIB_7322_TxUnsupVLErrCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_TxDataPktCnt_1_OFFS   0x13020
 
#define QIB_7322_TxDataPktCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_TxFlowPktCnt_1_OFFS   0x13028
 
#define QIB_7322_TxFlowPktCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_TxDwordCnt_1_OFFS   0x13030
 
#define QIB_7322_TxDwordCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_TxLenErrCnt_1_OFFS   0x13038
 
#define QIB_7322_TxLenErrCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_TxMaxMinLenErrCnt_1_OFFS   0x13040
 
#define QIB_7322_TxMaxMinLenErrCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_TxUnderrunCnt_1_OFFS   0x13048
 
#define QIB_7322_TxUnderrunCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_TxFlowStallCnt_1_OFFS   0x13050
 
#define QIB_7322_TxFlowStallCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_TxDroppedPktCnt_1_OFFS   0x13058
 
#define QIB_7322_TxDroppedPktCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxDroppedPktCnt_1_OFFS   0x13060
 
#define QIB_7322_RxDroppedPktCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxDataPktCnt_1_OFFS   0x13068
 
#define QIB_7322_RxDataPktCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxFlowPktCnt_1_OFFS   0x13070
 
#define QIB_7322_RxFlowPktCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxDwordCnt_1_OFFS   0x13078
 
#define QIB_7322_RxDwordCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxLenErrCnt_1_OFFS   0x13080
 
#define QIB_7322_RxLenErrCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxMaxMinLenErrCnt_1_OFFS   0x13088
 
#define QIB_7322_RxMaxMinLenErrCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxICRCErrCnt_1_OFFS   0x13090
 
#define QIB_7322_RxICRCErrCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxVCRCErrCnt_1_OFFS   0x13098
 
#define QIB_7322_RxVCRCErrCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxFlowCtrlViolCnt_1_OFFS   0x130A0
 
#define QIB_7322_RxFlowCtrlViolCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxVersionErrCnt_1_OFFS   0x130A8
 
#define QIB_7322_RxVersionErrCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxLinkMalformCnt_1_OFFS   0x130B0
 
#define QIB_7322_RxLinkMalformCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxEBPCnt_1_OFFS   0x130B8
 
#define QIB_7322_RxEBPCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxLPCRCErrCnt_1_OFFS   0x130C0
 
#define QIB_7322_RxLPCRCErrCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxBufOvflCnt_1_OFFS   0x130C8
 
#define QIB_7322_RxBufOvflCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxLenTruncateCnt_1_OFFS   0x130D0
 
#define QIB_7322_RxLenTruncateCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxPKeyMismatchCnt_1_OFFS   0x130E0
 
#define QIB_7322_RxPKeyMismatchCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_IBLinkDownedCnt_1_OFFS   0x13180
 
#define QIB_7322_IBLinkDownedCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_IBSymbolErrCnt_1_OFFS   0x13188
 
#define QIB_7322_IBSymbolErrCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_IBStatusChangeCnt_1_OFFS   0x13190
 
#define QIB_7322_IBStatusChangeCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_IBLinkErrRecoveryCnt_1_OFFS   0x13198
 
#define QIB_7322_IBLinkErrRecoveryCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_ExcessBufferOvflCnt_1_OFFS   0x131A8
 
#define QIB_7322_ExcessBufferOvflCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_LocalLinkIntegrityErrCnt_1_OFFS   0x131B0
 
#define QIB_7322_LocalLinkIntegrityErrCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxVlErrCnt_1_OFFS   0x131B8
 
#define QIB_7322_RxVlErrCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxDlidFltrCnt_1_OFFS   0x131C0
 
#define QIB_7322_RxDlidFltrCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxVL15DroppedPktCnt_1_OFFS   0x131C8
 
#define QIB_7322_RxVL15DroppedPktCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxOtherLocalPhyErrCnt_1_OFFS   0x131D0
 
#define QIB_7322_RxOtherLocalPhyErrCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_RxQPInvalidContextCnt_1_OFFS   0x131D8
 
#define QIB_7322_RxQPInvalidContextCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_TxHeadersErrCnt_1_OFFS   0x131F8
 
#define QIB_7322_TxHeadersErrCnt_1_DEF   0x0000000000000000
 
#define QIB_7322_PSRcvDataCount_1_OFFS   0x13218
 
#define QIB_7322_PSRcvDataCount_1_DEF   0x0000000000000000
 
#define QIB_7322_PSRcvPktsCount_1_OFFS   0x13220
 
#define QIB_7322_PSRcvPktsCount_1_DEF   0x0000000000000000
 
#define QIB_7322_PSXmitDataCount_1_OFFS   0x13228
 
#define QIB_7322_PSXmitDataCount_1_DEF   0x0000000000000000
 
#define QIB_7322_PSXmitPktsCount_1_OFFS   0x13230
 
#define QIB_7322_PSXmitPktsCount_1_DEF   0x0000000000000000
 
#define QIB_7322_PSXmitWaitCount_1_OFFS   0x13238
 
#define QIB_7322_PSXmitWaitCount_1_DEF   0x0000000000000000
 
#define QIB_7322_RcvEgrArray_OFFS   0x14000
 
#define QIB_7322_RcvEgrArray_DEF   0x0000000000000000
 
#define QIB_7322_RcvEgrArray_RT_BufSize_LSB   0x25
 
#define QIB_7322_RcvEgrArray_RT_BufSize_MSB   0x27
 
#define QIB_7322_RcvEgrArray_RT_BufSize_RMASK   0x7
 
#define QIB_7322_RcvEgrArray_RT_Addr_LSB   0x0
 
#define QIB_7322_RcvEgrArray_RT_Addr_MSB   0x24
 
#define QIB_7322_RcvEgrArray_RT_Addr_RMASK   0x1FFFFFFFFF
 
#define QIB_7322_RcvTIDArray0_OFFS   0x50000
 
#define QIB_7322_RcvTIDArray0_DEF   0x0000000000000000
 
#define QIB_7322_RcvTIDArray0_RT_BufSize_LSB   0x25
 
#define QIB_7322_RcvTIDArray0_RT_BufSize_MSB   0x27
 
#define QIB_7322_RcvTIDArray0_RT_BufSize_RMASK   0x7
 
#define QIB_7322_RcvTIDArray0_RT_Addr_LSB   0x0
 
#define QIB_7322_RcvTIDArray0_RT_Addr_MSB   0x24
 
#define QIB_7322_RcvTIDArray0_RT_Addr_RMASK   0x1FFFFFFFFF
 
#define QIB_7322_IBSD_DDS_MAP_TABLE_0_OFFS   0xD0000
 
#define QIB_7322_IBSD_DDS_MAP_TABLE_0_DEF   0x0000000000000000
 
#define QIB_7322_RcvHdrTail0_OFFS   0x200000
 
#define QIB_7322_RcvHdrTail0_DEF   0x0000000000000000
 
#define QIB_7322_RcvHdrHead0_OFFS   0x200008
 
#define QIB_7322_RcvHdrHead0_DEF   0x0000000000000000
 
#define QIB_7322_RcvHdrHead0_counter_LSB   0x20
 
#define QIB_7322_RcvHdrHead0_counter_MSB   0x2F
 
#define QIB_7322_RcvHdrHead0_counter_RMASK   0xFFFF
 
#define QIB_7322_RcvHdrHead0_RcvHeadPointer_LSB   0x0
 
#define QIB_7322_RcvHdrHead0_RcvHeadPointer_MSB   0x1F
 
#define QIB_7322_RcvHdrHead0_RcvHeadPointer_RMASK   0xFFFFFFFF
 
#define QIB_7322_RcvEgrIndexTail0_OFFS   0x200010
 
#define QIB_7322_RcvEgrIndexTail0_DEF   0x0000000000000000
 
#define QIB_7322_RcvEgrIndexHead0_OFFS   0x200018
 
#define QIB_7322_RcvEgrIndexHead0_DEF   0x0000000000000000
 
#define QIB_7322_RcvTIDFlowTable0_OFFS   0x201000
 
#define QIB_7322_RcvTIDFlowTable0_DEF   0x0000000000000000
 
#define QIB_7322_RcvTIDFlowTable0_GenMismatch_LSB   0x1C
 
#define QIB_7322_RcvTIDFlowTable0_GenMismatch_MSB   0x1C
 
#define QIB_7322_RcvTIDFlowTable0_GenMismatch_RMASK   0x1
 
#define QIB_7322_RcvTIDFlowTable0_SeqMismatch_LSB   0x1B
 
#define QIB_7322_RcvTIDFlowTable0_SeqMismatch_MSB   0x1B
 
#define QIB_7322_RcvTIDFlowTable0_SeqMismatch_RMASK   0x1
 
#define QIB_7322_RcvTIDFlowTable0_KeepOnGenErr_LSB   0x16
 
#define QIB_7322_RcvTIDFlowTable0_KeepOnGenErr_MSB   0x16
 
#define QIB_7322_RcvTIDFlowTable0_KeepOnGenErr_RMASK   0x1
 
#define QIB_7322_RcvTIDFlowTable0_KeepAfterSeqErr_LSB   0x15
 
#define QIB_7322_RcvTIDFlowTable0_KeepAfterSeqErr_MSB   0x15
 
#define QIB_7322_RcvTIDFlowTable0_KeepAfterSeqErr_RMASK   0x1
 
#define QIB_7322_RcvTIDFlowTable0_HdrSuppEnabled_LSB   0x14
 
#define QIB_7322_RcvTIDFlowTable0_HdrSuppEnabled_MSB   0x14
 
#define QIB_7322_RcvTIDFlowTable0_HdrSuppEnabled_RMASK   0x1
 
#define QIB_7322_RcvTIDFlowTable0_FlowValid_LSB   0x13
 
#define QIB_7322_RcvTIDFlowTable0_FlowValid_MSB   0x13
 
#define QIB_7322_RcvTIDFlowTable0_FlowValid_RMASK   0x1
 
#define QIB_7322_RcvTIDFlowTable0_GenVal_LSB   0xB
 
#define QIB_7322_RcvTIDFlowTable0_GenVal_MSB   0x12
 
#define QIB_7322_RcvTIDFlowTable0_GenVal_RMASK   0xFF
 
#define QIB_7322_RcvTIDFlowTable0_SeqNum_LSB   0x0
 
#define QIB_7322_RcvTIDFlowTable0_SeqNum_MSB   0xA
 
#define QIB_7322_RcvTIDFlowTable0_SeqNum_RMASK   0x7FF
 

Macro Definition Documentation

#define QIB_7322_active_feature_mask_DEF   0x00000000000000XX

Definition at line 999 of file qib_7322_regs.h.

#define QIB_7322_active_feature_mask_OFFS   0x198

Definition at line 998 of file qib_7322_regs.h.

#define QIB_7322_active_feature_mask_Port0_DDR_Enabled_LSB   0x1

Definition at line 1012 of file qib_7322_regs.h.

#define QIB_7322_active_feature_mask_Port0_DDR_Enabled_MSB   0x1

Definition at line 1013 of file qib_7322_regs.h.

#define QIB_7322_active_feature_mask_Port0_DDR_Enabled_RMASK   0x1

Definition at line 1014 of file qib_7322_regs.h.

#define QIB_7322_active_feature_mask_Port0_QDR_Enabled_LSB   0x2

Definition at line 1009 of file qib_7322_regs.h.

#define QIB_7322_active_feature_mask_Port0_QDR_Enabled_MSB   0x2

Definition at line 1010 of file qib_7322_regs.h.

#define QIB_7322_active_feature_mask_Port0_QDR_Enabled_RMASK   0x1

Definition at line 1011 of file qib_7322_regs.h.

#define QIB_7322_active_feature_mask_Port0_SDR_Enabled_LSB   0x0

Definition at line 1015 of file qib_7322_regs.h.

#define QIB_7322_active_feature_mask_Port0_SDR_Enabled_MSB   0x0

Definition at line 1016 of file qib_7322_regs.h.

#define QIB_7322_active_feature_mask_Port0_SDR_Enabled_RMASK   0x1

Definition at line 1017 of file qib_7322_regs.h.

#define QIB_7322_active_feature_mask_Port1_DDR_Enabled_LSB   0x4

Definition at line 1003 of file qib_7322_regs.h.

#define QIB_7322_active_feature_mask_Port1_DDR_Enabled_MSB   0x4

Definition at line 1004 of file qib_7322_regs.h.

#define QIB_7322_active_feature_mask_Port1_DDR_Enabled_RMASK   0x1

Definition at line 1005 of file qib_7322_regs.h.

#define QIB_7322_active_feature_mask_Port1_QDR_Enabled_LSB   0x5

Definition at line 1000 of file qib_7322_regs.h.

#define QIB_7322_active_feature_mask_Port1_QDR_Enabled_MSB   0x5

Definition at line 1001 of file qib_7322_regs.h.

#define QIB_7322_active_feature_mask_Port1_QDR_Enabled_RMASK   0x1

Definition at line 1002 of file qib_7322_regs.h.

#define QIB_7322_active_feature_mask_Port1_SDR_Enabled_LSB   0x3

Definition at line 1006 of file qib_7322_regs.h.

#define QIB_7322_active_feature_mask_Port1_SDR_Enabled_MSB   0x3

Definition at line 1007 of file qib_7322_regs.h.

#define QIB_7322_active_feature_mask_Port1_SDR_Enabled_RMASK   0x1

Definition at line 1008 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_DEF   0x0000000000000000

Definition at line 2643 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch0_LSB   0x0

Definition at line 2677 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch0_MSB   0x7

Definition at line 2678 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch0_RMASK   0xFF

Definition at line 2679 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch1_LSB   0x8

Definition at line 2674 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch1_MSB   0xF

Definition at line 2675 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch1_RMASK   0xFF

Definition at line 2676 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch2_LSB   0x10

Definition at line 2671 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch2_MSB   0x17

Definition at line 2672 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch2_RMASK   0xFF

Definition at line 2673 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch3_LSB   0x18

Definition at line 2668 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch3_MSB   0x1F

Definition at line 2669 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenadfe_ddr_ch3_RMASK   0xFF

Definition at line 2670 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch0_LSB   0x24

Definition at line 2653 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch0_MSB   0x24

Definition at line 2654 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch0_RMASK   0x1

Definition at line 2655 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch1_LSB   0x25

Definition at line 2650 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch1_MSB   0x25

Definition at line 2651 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch1_RMASK   0x1

Definition at line 2652 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch2_LSB   0x26

Definition at line 2647 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch2_MSB   0x26

Definition at line 2648 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch2_RMASK   0x1

Definition at line 2649 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch3_LSB   0x27

Definition at line 2644 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch3_MSB   0x27

Definition at line 2645 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenagain_ddr_ch3_RMASK   0x1

Definition at line 2646 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch0_LSB   0x20

Definition at line 2665 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch0_MSB   0x20

Definition at line 2666 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch0_RMASK   0x1

Definition at line 2667 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch1_LSB   0x21

Definition at line 2662 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch1_MSB   0x21

Definition at line 2663 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch1_RMASK   0x1

Definition at line 2664 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch2_LSB   0x22

Definition at line 2659 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch2_MSB   0x22

Definition at line 2660 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch2_RMASK   0x1

Definition at line 2661 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch3_LSB   0x23

Definition at line 2656 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch3_MSB   0x23

Definition at line 2657 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_dyn_disable_rxenale_ddr_ch3_RMASK   0x1

Definition at line 2658 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_DDR_0_OFFS   0x1658

Definition at line 2642 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_DEF   0x0000000000000000

Definition at line 2721 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch0_LSB   0x0

Definition at line 2755 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch0_MSB   0x7

Definition at line 2756 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch0_RMASK   0xFF

Definition at line 2757 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch1_LSB   0x8

Definition at line 2752 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch1_MSB   0xF

Definition at line 2753 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch1_RMASK   0xFF

Definition at line 2754 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch2_LSB   0x10

Definition at line 2749 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch2_MSB   0x17

Definition at line 2750 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch2_RMASK   0xFF

Definition at line 2751 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch3_LSB   0x18

Definition at line 2746 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch3_MSB   0x1F

Definition at line 2747 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenadfe_qdr_ch3_RMASK   0xFF

Definition at line 2748 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch0_LSB   0x24

Definition at line 2731 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch0_MSB   0x24

Definition at line 2732 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch0_RMASK   0x1

Definition at line 2733 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch1_LSB   0x25

Definition at line 2728 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch1_MSB   0x25

Definition at line 2729 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch1_RMASK   0x1

Definition at line 2730 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch2_LSB   0x26

Definition at line 2725 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch2_MSB   0x26

Definition at line 2726 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch2_RMASK   0x1

Definition at line 2727 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch3_LSB   0x27

Definition at line 2722 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch3_MSB   0x27

Definition at line 2723 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenagain_qdr_ch3_RMASK   0x1

Definition at line 2724 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch0_LSB   0x20

Definition at line 2743 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch0_MSB   0x20

Definition at line 2744 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch0_RMASK   0x1

Definition at line 2745 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch1_LSB   0x21

Definition at line 2740 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch1_MSB   0x21

Definition at line 2741 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch1_RMASK   0x1

Definition at line 2742 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch2_LSB   0x22

Definition at line 2737 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch2_MSB   0x22

Definition at line 2738 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch2_RMASK   0x1

Definition at line 2739 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch3_LSB   0x23

Definition at line 2734 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch3_MSB   0x23

Definition at line 2735 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_dyn_disable_rxenale_qdr_ch3_RMASK   0x1

Definition at line 2736 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_QDR_0_OFFS   0x1668

Definition at line 2720 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_DEF   0x0000000000000000

Definition at line 2565 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch0_LSB   0x0

Definition at line 2599 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch0_MSB   0x7

Definition at line 2600 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch0_RMASK   0xFF

Definition at line 2601 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch1_LSB   0x8

Definition at line 2596 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch1_MSB   0xF

Definition at line 2597 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch1_RMASK   0xFF

Definition at line 2598 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch2_LSB   0x10

Definition at line 2593 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch2_MSB   0x17

Definition at line 2594 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch2_RMASK   0xFF

Definition at line 2595 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch3_LSB   0x18

Definition at line 2590 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch3_MSB   0x1F

Definition at line 2591 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenadfe_sdr_ch3_RMASK   0xFF

Definition at line 2592 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch0_LSB   0x24

Definition at line 2575 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch0_MSB   0x24

Definition at line 2576 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch0_RMASK   0x1

Definition at line 2577 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch1_LSB   0x25

Definition at line 2572 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch1_MSB   0x25

Definition at line 2573 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch1_RMASK   0x1

Definition at line 2574 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch2_LSB   0x26

Definition at line 2569 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch2_MSB   0x26

Definition at line 2570 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch2_RMASK   0x1

Definition at line 2571 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch3_LSB   0x27

Definition at line 2566 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch3_MSB   0x27

Definition at line 2567 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenagain_sdr_ch3_RMASK   0x1

Definition at line 2568 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch0_LSB   0x20

Definition at line 2587 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch0_MSB   0x20

Definition at line 2588 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch0_RMASK   0x1

Definition at line 2589 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch1_LSB   0x21

Definition at line 2584 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch1_MSB   0x21

Definition at line 2585 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch1_RMASK   0x1

Definition at line 2586 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch2_LSB   0x22

Definition at line 2581 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch2_MSB   0x22

Definition at line 2582 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch2_RMASK   0x1

Definition at line 2583 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch3_LSB   0x23

Definition at line 2578 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch3_MSB   0x23

Definition at line 2579 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_dyn_disable_rxenale_sdr_ch3_RMASK   0x1

Definition at line 2580 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_DYNAMIC_SDR_0_OFFS   0x1648

Definition at line 2564 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_DEF   0x0000000000000000

Definition at line 2604 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_OFFS   0x1650

Definition at line 2603 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch0_LSB   0x0

Definition at line 2638 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch0_MSB   0x7

Definition at line 2639 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch0_RMASK   0xFF

Definition at line 2640 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch1_LSB   0x8

Definition at line 2635 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch1_MSB   0xF

Definition at line 2636 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch1_RMASK   0xFF

Definition at line 2637 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch2_LSB   0x10

Definition at line 2632 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch2_MSB   0x17

Definition at line 2633 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch2_RMASK   0xFF

Definition at line 2634 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch3_LSB   0x18

Definition at line 2629 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch3_MSB   0x1F

Definition at line 2630 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenadfe_ddr_ch3_RMASK   0xFF

Definition at line 2631 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch0_LSB   0x24

Definition at line 2614 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch0_MSB   0x24

Definition at line 2615 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch0_RMASK   0x1

Definition at line 2616 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch1_LSB   0x25

Definition at line 2611 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch1_MSB   0x25

Definition at line 2612 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch1_RMASK   0x1

Definition at line 2613 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch2_LSB   0x26

Definition at line 2608 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch2_MSB   0x26

Definition at line 2609 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch2_RMASK   0x1

Definition at line 2610 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch3_LSB   0x27

Definition at line 2605 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch3_MSB   0x27

Definition at line 2606 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenagain_ddr_ch3_RMASK   0x1

Definition at line 2607 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch0_LSB   0x20

Definition at line 2626 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch0_MSB   0x20

Definition at line 2627 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch0_RMASK   0x1

Definition at line 2628 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch1_LSB   0x21

Definition at line 2623 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch1_MSB   0x21

Definition at line 2624 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch1_RMASK   0x1

Definition at line 2625 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch2_LSB   0x22

Definition at line 2620 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch2_MSB   0x22

Definition at line 2621 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch2_RMASK   0x1

Definition at line 2622 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch3_LSB   0x23

Definition at line 2617 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch3_MSB   0x23

Definition at line 2618 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_DDR_0_static_disable_rxenale_ddr_ch3_RMASK   0x1

Definition at line 2619 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_DEF   0x0000000000000000

Definition at line 2682 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_OFFS   0x1660

Definition at line 2681 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch0_LSB   0x0

Definition at line 2716 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch0_MSB   0x7

Definition at line 2717 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch0_RMASK   0xFF

Definition at line 2718 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch1_LSB   0x8

Definition at line 2713 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch1_MSB   0xF

Definition at line 2714 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch1_RMASK   0xFF

Definition at line 2715 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch2_LSB   0x10

Definition at line 2710 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch2_MSB   0x17

Definition at line 2711 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch2_RMASK   0xFF

Definition at line 2712 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch3_LSB   0x18

Definition at line 2707 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch3_MSB   0x1F

Definition at line 2708 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenadfe_qdr_ch3_RMASK   0xFF

Definition at line 2709 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch0_LSB   0x24

Definition at line 2692 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch0_MSB   0x24

Definition at line 2693 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch0_RMASK   0x1

Definition at line 2694 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch1_LSB   0x25

Definition at line 2689 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch1_MSB   0x25

Definition at line 2690 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch1_RMASK   0x1

Definition at line 2691 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch2_LSB   0x26

Definition at line 2686 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch2_MSB   0x26

Definition at line 2687 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch2_RMASK   0x1

Definition at line 2688 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch3_LSB   0x27

Definition at line 2683 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch3_MSB   0x27

Definition at line 2684 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenagain_qdr_ch3_RMASK   0x1

Definition at line 2685 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch0_LSB   0x20

Definition at line 2704 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch0_MSB   0x20

Definition at line 2705 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch0_RMASK   0x1

Definition at line 2706 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch1_LSB   0x21

Definition at line 2701 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch1_MSB   0x21

Definition at line 2702 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch1_RMASK   0x1

Definition at line 2703 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch2_LSB   0x22

Definition at line 2698 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch2_MSB   0x22

Definition at line 2699 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch2_RMASK   0x1

Definition at line 2700 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch3_LSB   0x23

Definition at line 2695 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch3_MSB   0x23

Definition at line 2696 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_QDR_0_static_disable_rxenale_qdr_ch3_RMASK   0x1

Definition at line 2697 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_DEF   0x0000000000000000

Definition at line 2526 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_OFFS   0x1640

Definition at line 2525 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch0_LSB   0x0

Definition at line 2560 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch0_MSB   0x7

Definition at line 2561 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch0_RMASK   0xFF

Definition at line 2562 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch1_LSB   0x8

Definition at line 2557 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch1_MSB   0xF

Definition at line 2558 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch1_RMASK   0xFF

Definition at line 2559 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch2_LSB   0x10

Definition at line 2554 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch2_MSB   0x17

Definition at line 2555 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch2_RMASK   0xFF

Definition at line 2556 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch3_LSB   0x18

Definition at line 2551 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch3_MSB   0x1F

Definition at line 2552 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenadfe_sdr_ch3_RMASK   0xFF

Definition at line 2553 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch0_LSB   0x24

Definition at line 2536 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch0_MSB   0x24

Definition at line 2537 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch0_RMASK   0x1

Definition at line 2538 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch1_LSB   0x25

Definition at line 2533 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch1_MSB   0x25

Definition at line 2534 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch1_RMASK   0x1

Definition at line 2535 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch2_LSB   0x26

Definition at line 2530 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch2_MSB   0x26

Definition at line 2531 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch2_RMASK   0x1

Definition at line 2532 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch3_LSB   0x27

Definition at line 2527 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch3_MSB   0x27

Definition at line 2528 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenagain_sdr_ch3_RMASK   0x1

Definition at line 2529 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch0_LSB   0x20

Definition at line 2548 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch0_MSB   0x20

Definition at line 2549 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch0_RMASK   0x1

Definition at line 2550 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch1_LSB   0x21

Definition at line 2545 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch1_MSB   0x21

Definition at line 2546 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch1_RMASK   0x1

Definition at line 2547 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch2_LSB   0x22

Definition at line 2542 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch2_MSB   0x22

Definition at line 2543 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch2_RMASK   0x1

Definition at line 2544 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch3_LSB   0x23

Definition at line 2539 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch3_MSB   0x23

Definition at line 2540 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_STATIC_SDR_0_static_disable_rxenale_sdr_ch3_RMASK   0x1

Definition at line 2541 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_TIMER_THRESHOLD_0_DEF   0x0000000000000000

Definition at line 2760 of file qib_7322_regs.h.

#define QIB_7322_ADAPT_DISABLE_TIMER_THRESHOLD_0_OFFS   0x1670

Definition at line 2759 of file qib_7322_regs.h.

#define QIB_7322_ahb_access_ctrl_DEF   0x0000000000000000

Definition at line 1101 of file qib_7322_regs.h.

#define QIB_7322_ahb_access_ctrl_OFFS   0x460

Definition at line 1100 of file qib_7322_regs.h.

#define QIB_7322_ahb_access_ctrl_sw_ahb_sel_LSB   0x0

Definition at line 1105 of file qib_7322_regs.h.

#define QIB_7322_ahb_access_ctrl_sw_ahb_sel_MSB   0x0

Definition at line 1106 of file qib_7322_regs.h.

#define QIB_7322_ahb_access_ctrl_sw_ahb_sel_RMASK   0x1

Definition at line 1107 of file qib_7322_regs.h.

#define QIB_7322_ahb_access_ctrl_sw_sel_ahb_trgt_LSB   0x1

Definition at line 1102 of file qib_7322_regs.h.

#define QIB_7322_ahb_access_ctrl_sw_sel_ahb_trgt_MSB   0x2

Definition at line 1103 of file qib_7322_regs.h.

#define QIB_7322_ahb_access_ctrl_sw_sel_ahb_trgt_RMASK   0x3

Definition at line 1104 of file qib_7322_regs.h.

#define QIB_7322_ahb_transaction_reg_ahb_address_LSB   0x10

Definition at line 1123 of file qib_7322_regs.h.

#define QIB_7322_ahb_transaction_reg_ahb_address_MSB   0x1A

Definition at line 1124 of file qib_7322_regs.h.

#define QIB_7322_ahb_transaction_reg_ahb_address_RMASK   0x7FF

Definition at line 1125 of file qib_7322_regs.h.

#define QIB_7322_ahb_transaction_reg_ahb_data_LSB   0x20

Definition at line 1111 of file qib_7322_regs.h.

#define QIB_7322_ahb_transaction_reg_ahb_data_MSB   0x3F

Definition at line 1112 of file qib_7322_regs.h.

#define QIB_7322_ahb_transaction_reg_ahb_data_RMASK   0xFFFFFFFF

Definition at line 1113 of file qib_7322_regs.h.

#define QIB_7322_ahb_transaction_reg_ahb_rdy_LSB   0x1F

Definition at line 1114 of file qib_7322_regs.h.

#define QIB_7322_ahb_transaction_reg_ahb_rdy_MSB   0x1F

Definition at line 1115 of file qib_7322_regs.h.

#define QIB_7322_ahb_transaction_reg_ahb_rdy_RMASK   0x1

Definition at line 1116 of file qib_7322_regs.h.

#define QIB_7322_ahb_transaction_reg_ahb_req_err_LSB   0x1E

Definition at line 1117 of file qib_7322_regs.h.

#define QIB_7322_ahb_transaction_reg_ahb_req_err_MSB   0x1E

Definition at line 1118 of file qib_7322_regs.h.

#define QIB_7322_ahb_transaction_reg_ahb_req_err_RMASK   0x1

Definition at line 1119 of file qib_7322_regs.h.

#define QIB_7322_ahb_transaction_reg_DEF   0x0000000080000000

Definition at line 1110 of file qib_7322_regs.h.

#define QIB_7322_ahb_transaction_reg_OFFS   0x468

Definition at line 1109 of file qib_7322_regs.h.

#define QIB_7322_ahb_transaction_reg_write_not_read_LSB   0x1B

Definition at line 1120 of file qib_7322_regs.h.

#define QIB_7322_ahb_transaction_reg_write_not_read_MSB   0x1B

Definition at line 1121 of file qib_7322_regs.h.

#define QIB_7322_ahb_transaction_reg_write_not_read_RMASK   0x1

Definition at line 1122 of file qib_7322_regs.h.

#define QIB_7322_AvailUpdCount_AvailUpdCount_LSB   0x0

Definition at line 1084 of file qib_7322_regs.h.

#define QIB_7322_AvailUpdCount_AvailUpdCount_MSB   0x4

Definition at line 1085 of file qib_7322_regs.h.

#define QIB_7322_AvailUpdCount_AvailUpdCount_RMASK   0x1F

Definition at line 1086 of file qib_7322_regs.h.

#define QIB_7322_AvailUpdCount_DEF   0x0000000000000000

Definition at line 1083 of file qib_7322_regs.h.

#define QIB_7322_AvailUpdCount_OFFS   0x268

Definition at line 1082 of file qib_7322_regs.h.

#define QIB_7322_CntrRegBase_0_DEF   0x0000000000012000

Definition at line 1368 of file qib_7322_regs.h.

#define QIB_7322_CntrRegBase_0_OFFS   0x1028

Definition at line 1367 of file qib_7322_regs.h.

#define QIB_7322_CntrRegBase_1_DEF   0x0000000000013000

Definition at line 2787 of file qib_7322_regs.h.

#define QIB_7322_CntrRegBase_1_OFFS   0x2028

Definition at line 2786 of file qib_7322_regs.h.

#define QIB_7322_CntrRegBase_DEF   0x0000000000011000

Definition at line 93 of file qib_7322_regs.h.

#define QIB_7322_CntrRegBase_OFFS   0x28

Definition at line 92 of file qib_7322_regs.h.

#define QIB_7322_ContextCnt_DEF   0x0000000000000012

Definition at line 87 of file qib_7322_regs.h.

#define QIB_7322_ContextCnt_OFFS   0x18

Definition at line 86 of file qib_7322_regs.h.

#define QIB_7322_Control_DEF   0x0000000000000000

Definition at line 63 of file qib_7322_regs.h.

#define QIB_7322_Control_FreezeMode_LSB   0x1

Definition at line 76 of file qib_7322_regs.h.

#define QIB_7322_Control_FreezeMode_MSB   0x1

Definition at line 77 of file qib_7322_regs.h.

#define QIB_7322_Control_FreezeMode_RMASK   0x1

Definition at line 78 of file qib_7322_regs.h.

#define QIB_7322_Control_OFFS   0x8

Definition at line 62 of file qib_7322_regs.h.

#define QIB_7322_Control_PCIECplQDiagEn_LSB   0x6

Definition at line 64 of file qib_7322_regs.h.

#define QIB_7322_Control_PCIECplQDiagEn_MSB   0x6

Definition at line 65 of file qib_7322_regs.h.

#define QIB_7322_Control_PCIECplQDiagEn_RMASK   0x1

Definition at line 66 of file qib_7322_regs.h.

#define QIB_7322_Control_PCIEPostQDiagEn_LSB   0x5

Definition at line 67 of file qib_7322_regs.h.

#define QIB_7322_Control_PCIEPostQDiagEn_MSB   0x5

Definition at line 68 of file qib_7322_regs.h.

#define QIB_7322_Control_PCIEPostQDiagEn_RMASK   0x1

Definition at line 69 of file qib_7322_regs.h.

#define QIB_7322_Control_PCIERetryBufDiagEn_LSB   0x3

Definition at line 73 of file qib_7322_regs.h.

#define QIB_7322_Control_PCIERetryBufDiagEn_MSB   0x3

Definition at line 74 of file qib_7322_regs.h.

#define QIB_7322_Control_PCIERetryBufDiagEn_RMASK   0x1

Definition at line 75 of file qib_7322_regs.h.

#define QIB_7322_Control_SDmaDescFetchPriorityEn_LSB   0x4

Definition at line 70 of file qib_7322_regs.h.

#define QIB_7322_Control_SDmaDescFetchPriorityEn_MSB   0x4

Definition at line 71 of file qib_7322_regs.h.

#define QIB_7322_Control_SDmaDescFetchPriorityEn_RMASK   0x1

Definition at line 72 of file qib_7322_regs.h.

#define QIB_7322_Control_SyncReset_LSB   0x0

Definition at line 79 of file qib_7322_regs.h.

#define QIB_7322_Control_SyncReset_MSB   0x0

Definition at line 80 of file qib_7322_regs.h.

#define QIB_7322_Control_SyncReset_RMASK   0x1

Definition at line 81 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlA_DEF   0x0000000000000000

Definition at line 1212 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlA_EagerDCAEnable_LSB   0x1

Definition at line 1222 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlA_EagerDCAEnable_MSB   0x1

Definition at line 1223 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlA_EagerDCAEnable_RMASK   0x1

Definition at line 1224 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlA_OFFS   0x580

Definition at line 1211 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlA_RcvHdrqDCAEnable_LSB   0x0

Definition at line 1225 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlA_RcvHdrqDCAEnable_MSB   0x0

Definition at line 1226 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlA_RcvHdrqDCAEnable_RMASK   0x1

Definition at line 1227 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlA_RcvTailUpdDCAEnable_LSB   0x2

Definition at line 1219 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlA_RcvTailUpdDCAEnable_MSB   0x2

Definition at line 1220 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlA_RcvTailUpdDCAEnable_RMASK   0x1

Definition at line 1221 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlA_SendDMAHead0DCAEnable_LSB   0x3

Definition at line 1216 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlA_SendDMAHead0DCAEnable_MSB   0x3

Definition at line 1217 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlA_SendDMAHead0DCAEnable_RMASK   0x1

Definition at line 1218 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlA_SendDMAHead1DCAEnable_LSB   0x4

Definition at line 1213 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlA_SendDMAHead1DCAEnable_MSB   0x4

Definition at line 1214 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlA_SendDMAHead1DCAEnable_RMASK   0x1

Definition at line 1215 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_DEF   0x0000000000000000

Definition at line 1230 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_OFFS   0x588

Definition at line 1229 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq0DCAOPH_LSB   0x0

Definition at line 1252 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq0DCAOPH_MSB   0x7

Definition at line 1253 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq0DCAOPH_RMASK   0xFF

Definition at line 1254 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq0DCAXfrCnt_LSB   0x8

Definition at line 1249 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq0DCAXfrCnt_MSB   0xD

Definition at line 1250 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq0DCAXfrCnt_RMASK   0x3F

Definition at line 1251 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq1DCAOPH_LSB   0xE

Definition at line 1246 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq1DCAOPH_MSB   0x15

Definition at line 1247 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq1DCAOPH_RMASK   0xFF

Definition at line 1248 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq1DCAXfrCnt_LSB   0x16

Definition at line 1243 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq1DCAXfrCnt_MSB   0x1B

Definition at line 1244 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq1DCAXfrCnt_RMASK   0x3F

Definition at line 1245 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq2DCAOPH_LSB   0x20

Definition at line 1240 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq2DCAOPH_MSB   0x27

Definition at line 1241 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq2DCAOPH_RMASK   0xFF

Definition at line 1242 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq2DCAXfrCnt_LSB   0x28

Definition at line 1237 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq2DCAXfrCnt_MSB   0x2D

Definition at line 1238 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq2DCAXfrCnt_RMASK   0x3F

Definition at line 1239 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq3DCAOPH_LSB   0x2E

Definition at line 1234 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq3DCAOPH_MSB   0x35

Definition at line 1235 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq3DCAOPH_RMASK   0xFF

Definition at line 1236 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq3DCAXfrCnt_LSB   0x36

Definition at line 1231 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq3DCAXfrCnt_MSB   0x3B

Definition at line 1232 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlB_RcvHdrq3DCAXfrCnt_RMASK   0x3F

Definition at line 1233 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_DEF   0x0000000000000000

Definition at line 1257 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_OFFS   0x590

Definition at line 1256 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq4DCAOPH_LSB   0x0

Definition at line 1279 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq4DCAOPH_MSB   0x7

Definition at line 1280 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq4DCAOPH_RMASK   0xFF

Definition at line 1281 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq4DCAXfrCnt_LSB   0x8

Definition at line 1276 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq4DCAXfrCnt_MSB   0xD

Definition at line 1277 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq4DCAXfrCnt_RMASK   0x3F

Definition at line 1278 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq5DCAOPH_LSB   0xE

Definition at line 1273 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq5DCAOPH_MSB   0x15

Definition at line 1274 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq5DCAOPH_RMASK   0xFF

Definition at line 1275 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq5DCAXfrCnt_LSB   0x16

Definition at line 1270 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq5DCAXfrCnt_MSB   0x1B

Definition at line 1271 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq5DCAXfrCnt_RMASK   0x3F

Definition at line 1272 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq6DCAOPH_LSB   0x20

Definition at line 1267 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq6DCAOPH_MSB   0x27

Definition at line 1268 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq6DCAOPH_RMASK   0xFF

Definition at line 1269 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq6DCAXfrCnt_LSB   0x28

Definition at line 1264 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq6DCAXfrCnt_MSB   0x2D

Definition at line 1265 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq6DCAXfrCnt_RMASK   0x3F

Definition at line 1266 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq7DCAOPH_LSB   0x2E

Definition at line 1261 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq7DCAOPH_MSB   0x35

Definition at line 1262 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq7DCAOPH_RMASK   0xFF

Definition at line 1263 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq7DCAXfrCnt_LSB   0x36

Definition at line 1258 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq7DCAXfrCnt_MSB   0x3B

Definition at line 1259 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlC_RcvHdrq7DCAXfrCnt_RMASK   0x3F

Definition at line 1260 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_DEF   0x0000000000000000

Definition at line 1284 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_OFFS   0x598

Definition at line 1283 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq10DCAOPH_LSB   0x20

Definition at line 1294 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq10DCAOPH_MSB   0x27

Definition at line 1295 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq10DCAOPH_RMASK   0xFF

Definition at line 1296 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq10DCAXfrCnt_LSB   0x28

Definition at line 1291 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq10DCAXfrCnt_MSB   0x2D

Definition at line 1292 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq10DCAXfrCnt_RMASK   0x3F

Definition at line 1293 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq11DCAOPH_LSB   0x2E

Definition at line 1288 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq11DCAOPH_MSB   0x35

Definition at line 1289 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq11DCAOPH_RMASK   0xFF

Definition at line 1290 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq11DCAXfrCnt_LSB   0x36

Definition at line 1285 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq11DCAXfrCnt_MSB   0x3B

Definition at line 1286 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq11DCAXfrCnt_RMASK   0x3F

Definition at line 1287 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq8DCAOPH_LSB   0x0

Definition at line 1306 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq8DCAOPH_MSB   0x7

Definition at line 1307 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq8DCAOPH_RMASK   0xFF

Definition at line 1308 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq8DCAXfrCnt_LSB   0x8

Definition at line 1303 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq8DCAXfrCnt_MSB   0xD

Definition at line 1304 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq8DCAXfrCnt_RMASK   0x3F

Definition at line 1305 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq9DCAOPH_LSB   0xE

Definition at line 1300 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq9DCAOPH_MSB   0x15

Definition at line 1301 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq9DCAOPH_RMASK   0xFF

Definition at line 1302 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq9DCAXfrCnt_LSB   0x16

Definition at line 1297 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq9DCAXfrCnt_MSB   0x1B

Definition at line 1298 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlD_RcvHdrq9DCAXfrCnt_RMASK   0x3F

Definition at line 1299 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_DEF   0x0000000000000000

Definition at line 1311 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_OFFS   0x5A0

Definition at line 1310 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq12DCAOPH_LSB   0x0

Definition at line 1333 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq12DCAOPH_MSB   0x7

Definition at line 1334 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq12DCAOPH_RMASK   0xFF

Definition at line 1335 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq12DCAXfrCnt_LSB   0x8

Definition at line 1330 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq12DCAXfrCnt_MSB   0xD

Definition at line 1331 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq12DCAXfrCnt_RMASK   0x3F

Definition at line 1332 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq13DCAOPH_LSB   0xE

Definition at line 1327 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq13DCAOPH_MSB   0x15

Definition at line 1328 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq13DCAOPH_RMASK   0xFF

Definition at line 1329 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq13DCAXfrCnt_LSB   0x16

Definition at line 1324 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq13DCAXfrCnt_MSB   0x1B

Definition at line 1325 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq13DCAXfrCnt_RMASK   0x3F

Definition at line 1326 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq14DCAOPH_LSB   0x20

Definition at line 1321 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq14DCAOPH_MSB   0x27

Definition at line 1322 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq14DCAOPH_RMASK   0xFF

Definition at line 1323 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq14DCAXfrCnt_LSB   0x28

Definition at line 1318 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq14DCAXfrCnt_MSB   0x2D

Definition at line 1319 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq14DCAXfrCnt_RMASK   0x3F

Definition at line 1320 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq15DCAOPH_LSB   0x2E

Definition at line 1315 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq15DCAOPH_MSB   0x35

Definition at line 1316 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq15DCAOPH_RMASK   0xFF

Definition at line 1317 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq15DCAXfrCnt_LSB   0x36

Definition at line 1312 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq15DCAXfrCnt_MSB   0x3B

Definition at line 1313 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlE_RcvHdrq15DCAXfrCnt_RMASK   0x3F

Definition at line 1314 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_DEF   0x0000000000000000

Definition at line 1338 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_OFFS   0x5A8

Definition at line 1337 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_RcvHdrq16DCAOPH_LSB   0x0

Definition at line 1354 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_RcvHdrq16DCAOPH_MSB   0x7

Definition at line 1355 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_RcvHdrq16DCAOPH_RMASK   0xFF

Definition at line 1356 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_RcvHdrq16DCAXfrCnt_LSB   0x8

Definition at line 1351 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_RcvHdrq16DCAXfrCnt_MSB   0xD

Definition at line 1352 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_RcvHdrq16DCAXfrCnt_RMASK   0x3F

Definition at line 1353 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_RcvHdrq17DCAOPH_LSB   0xE

Definition at line 1348 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_RcvHdrq17DCAOPH_MSB   0x15

Definition at line 1349 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_RcvHdrq17DCAOPH_RMASK   0xFF

Definition at line 1350 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_RcvHdrq17DCAXfrCnt_LSB   0x16

Definition at line 1345 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_RcvHdrq17DCAXfrCnt_MSB   0x1B

Definition at line 1346 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_RcvHdrq17DCAXfrCnt_RMASK   0x3F

Definition at line 1347 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_SendDma0DCAOPH_LSB   0x20

Definition at line 1342 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_SendDma0DCAOPH_MSB   0x27

Definition at line 1343 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_SendDma0DCAOPH_RMASK   0xFF

Definition at line 1344 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_SendDma1DCAOPH_LSB   0x28

Definition at line 1339 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_SendDma1DCAOPH_MSB   0x2F

Definition at line 1340 of file qib_7322_regs.h.

#define QIB_7322_DCACtrlF_SendDma1DCAOPH_RMASK   0xFF

Definition at line 1341 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_DEF   0x0000000000000000

Definition at line 1611 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_IBStatusChangedClear_LSB   0x3A

Definition at line 1612 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_IBStatusChangedClear_MSB   0x3A

Definition at line 1613 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_IBStatusChangedClear_RMASK   0x1

Definition at line 1614 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_OFFS   0x1090

Definition at line 1610 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvBadTidErrClear_LSB   0xE

Definition at line 1690 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvBadTidErrClear_MSB   0xE

Definition at line 1691 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvBadTidErrClear_RMASK   0x1

Definition at line 1692 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvBadVersionErrClear_LSB   0xB

Definition at line 1693 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvBadVersionErrClear_MSB   0xB

Definition at line 1694 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvBadVersionErrClear_RMASK   0x1

Definition at line 1695 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvEBPErrClear_LSB   0x9

Definition at line 1699 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvEBPErrClear_MSB   0x9

Definition at line 1700 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvEBPErrClear_RMASK   0x1

Definition at line 1701 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvFormatErrClear_LSB   0x0

Definition at line 1726 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvFormatErrClear_MSB   0x0

Definition at line 1727 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvFormatErrClear_RMASK   0x1

Definition at line 1728 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvHdrErrClear_LSB   0x10

Definition at line 1684 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvHdrErrClear_MSB   0x10

Definition at line 1685 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvHdrErrClear_RMASK   0x1

Definition at line 1686 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvHdrLenErrClear_LSB   0xF

Definition at line 1687 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvHdrLenErrClear_MSB   0xF

Definition at line 1688 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvHdrLenErrClear_RMASK   0x1

Definition at line 1689 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvIBFlowErrClear_LSB   0xA

Definition at line 1696 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvIBFlowErrClear_MSB   0xA

Definition at line 1697 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvIBFlowErrClear_RMASK   0x1

Definition at line 1698 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvIBLostLinkErrClear_LSB   0x11

Definition at line 1681 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvIBLostLinkErrClear_MSB   0x11

Definition at line 1682 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvIBLostLinkErrClear_RMASK   0x1

Definition at line 1683 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvICRCErrClear_LSB   0x2

Definition at line 1720 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvICRCErrClear_MSB   0x2

Definition at line 1721 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvICRCErrClear_RMASK   0x1

Definition at line 1722 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvLongPktLenErrClear_LSB   0x5

Definition at line 1711 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvLongPktLenErrClear_MSB   0x5

Definition at line 1712 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvLongPktLenErrClear_RMASK   0x1

Definition at line 1713 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvMaxPktLenErrClear_LSB   0x4

Definition at line 1714 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvMaxPktLenErrClear_MSB   0x4

Definition at line 1715 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvMaxPktLenErrClear_RMASK   0x1

Definition at line 1716 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvMinPktLenErrClear_LSB   0x3

Definition at line 1717 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvMinPktLenErrClear_MSB   0x3

Definition at line 1718 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvMinPktLenErrClear_RMASK   0x1

Definition at line 1719 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvShortPktLenErrClear_LSB   0x6

Definition at line 1708 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvShortPktLenErrClear_MSB   0x6

Definition at line 1709 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvShortPktLenErrClear_RMASK   0x1

Definition at line 1710 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvUnexpectedCharErrClear_LSB   0x7

Definition at line 1705 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvUnexpectedCharErrClear_MSB   0x7

Definition at line 1706 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvUnexpectedCharErrClear_RMASK   0x1

Definition at line 1707 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvUnsupportedVLErrClear_LSB   0x8

Definition at line 1702 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvUnsupportedVLErrClear_MSB   0x8

Definition at line 1703 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvUnsupportedVLErrClear_RMASK   0x1

Definition at line 1704 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvVCRCErrClear_LSB   0x1

Definition at line 1723 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvVCRCErrClear_MSB   0x1

Definition at line 1724 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_RcvVCRCErrClear_RMASK   0x1

Definition at line 1725 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDma1stDescErrClear_LSB   0x2B

Definition at line 1639 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDma1stDescErrClear_MSB   0x2B

Definition at line 1640 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDma1stDescErrClear_RMASK   0x1

Definition at line 1641 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaBaseErrClear_LSB   0x2A

Definition at line 1642 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaBaseErrClear_MSB   0x2A

Definition at line 1643 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaBaseErrClear_RMASK   0x1

Definition at line 1644 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaDescAddrMisalignErrClear_LSB   0x30

Definition at line 1624 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaDescAddrMisalignErrClear_MSB   0x30

Definition at line 1625 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaDescAddrMisalignErrClear_RMASK   0x1

Definition at line 1626 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaDwEnErrClear_LSB   0x2D

Definition at line 1633 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaDwEnErrClear_MSB   0x2D

Definition at line 1634 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaDwEnErrClear_RMASK   0x1

Definition at line 1635 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaGenMismatchErrClear_LSB   0x27

Definition at line 1651 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaGenMismatchErrClear_MSB   0x27

Definition at line 1652 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaGenMismatchErrClear_RMASK   0x1

Definition at line 1653 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaHaltErrClear_LSB   0x31

Definition at line 1621 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaHaltErrClear_MSB   0x31

Definition at line 1622 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaHaltErrClear_RMASK   0x1

Definition at line 1623 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaMissingDwErrClear_LSB   0x2E

Definition at line 1630 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaMissingDwErrClear_MSB   0x2E

Definition at line 1631 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaMissingDwErrClear_RMASK   0x1

Definition at line 1632 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaOutOfBoundErrClear_LSB   0x28

Definition at line 1648 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaOutOfBoundErrClear_MSB   0x28

Definition at line 1649 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaOutOfBoundErrClear_RMASK   0x1

Definition at line 1650 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaRpyTagErrClear_LSB   0x2C

Definition at line 1636 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaRpyTagErrClear_MSB   0x2C

Definition at line 1637 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaRpyTagErrClear_RMASK   0x1

Definition at line 1638 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaTailOutOfBoundErrClear_LSB   0x29

Definition at line 1645 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaTailOutOfBoundErrClear_MSB   0x29

Definition at line 1646 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaTailOutOfBoundErrClear_RMASK   0x1

Definition at line 1647 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaUnexpDataErrClear_LSB   0x2F

Definition at line 1627 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaUnexpDataErrClear_MSB   0x2F

Definition at line 1628 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SDmaUnexpDataErrClear_RMASK   0x1

Definition at line 1629 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendBufMisuseErrClear_LSB   0x26

Definition at line 1654 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendBufMisuseErrClear_MSB   0x26

Definition at line 1655 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendBufMisuseErrClear_RMASK   0x1

Definition at line 1656 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendDroppedDataPktErrClear_LSB   0x22

Definition at line 1663 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendDroppedDataPktErrClear_MSB   0x22

Definition at line 1664 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendDroppedDataPktErrClear_RMASK   0x1

Definition at line 1665 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendDroppedSmpPktErrClear_LSB   0x21

Definition at line 1666 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendDroppedSmpPktErrClear_MSB   0x21

Definition at line 1667 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendDroppedSmpPktErrClear_RMASK   0x1

Definition at line 1668 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendMaxPktLenErrClear_LSB   0x1E

Definition at line 1675 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendMaxPktLenErrClear_MSB   0x1E

Definition at line 1676 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendMaxPktLenErrClear_RMASK   0x1

Definition at line 1677 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendMinPktLenErrClear_LSB   0x1D

Definition at line 1678 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendMinPktLenErrClear_MSB   0x1D

Definition at line 1679 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendMinPktLenErrClear_RMASK   0x1

Definition at line 1680 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendPktLenErrClear_LSB   0x20

Definition at line 1669 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendPktLenErrClear_MSB   0x20

Definition at line 1670 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendPktLenErrClear_RMASK   0x1

Definition at line 1671 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendUnderRunErrClear_LSB   0x1F

Definition at line 1672 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendUnderRunErrClear_MSB   0x1F

Definition at line 1673 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendUnderRunErrClear_RMASK   0x1

Definition at line 1674 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendUnexpectedPktNumErrClear_LSB   0x24

Definition at line 1660 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendUnexpectedPktNumErrClear_MSB   0x24

Definition at line 1661 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendUnexpectedPktNumErrClear_RMASK   0x1

Definition at line 1662 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendUnsupportedVLErrClear_LSB   0x25

Definition at line 1657 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendUnsupportedVLErrClear_MSB   0x25

Definition at line 1658 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SendUnsupportedVLErrClear_RMASK   0x1

Definition at line 1659 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SHeadersErrClear_LSB   0x39

Definition at line 1615 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SHeadersErrClear_MSB   0x39

Definition at line 1616 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_SHeadersErrClear_RMASK   0x1

Definition at line 1617 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_VL15BufMisuseErrClear_LSB   0x36

Definition at line 1618 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_VL15BufMisuseErrClear_MSB   0x36

Definition at line 1619 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_0_VL15BufMisuseErrClear_RMASK   0x1

Definition at line 1620 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_DEF   0x0000000000000000

Definition at line 660 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_HardwareErrClear_LSB   0x3E

Definition at line 664 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_HardwareErrClear_MSB   0x3E

Definition at line 665 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_HardwareErrClear_RMASK   0x1

Definition at line 666 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_InvalidAddrErrClear_LSB   0x3D

Definition at line 667 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_InvalidAddrErrClear_MSB   0x3D

Definition at line 668 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_InvalidAddrErrClear_RMASK   0x1

Definition at line 669 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_InvalidEEPCmdErrClear_LSB   0x35

Definition at line 676 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_InvalidEEPCmdErrClear_MSB   0x35

Definition at line 677 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_InvalidEEPCmdErrClear_RMASK   0x1

Definition at line 678 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_OFFS   0x90

Definition at line 659 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_RcvContextShareErrClear_LSB   0x34

Definition at line 679 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_RcvContextShareErrClear_MSB   0x34

Definition at line 680 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_RcvContextShareErrClear_RMASK   0x1

Definition at line 681 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_RcvEgrFullErrClear_LSB   0xC

Definition at line 700 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_RcvEgrFullErrClear_MSB   0xC

Definition at line 701 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_RcvEgrFullErrClear_RMASK   0x1

Definition at line 702 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_RcvHdrFullErrClear_LSB   0xD

Definition at line 697 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_RcvHdrFullErrClear_MSB   0xD

Definition at line 698 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_RcvHdrFullErrClear_RMASK   0x1

Definition at line 699 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_ResetNegatedClear_LSB   0x3F

Definition at line 661 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_ResetNegatedClear_MSB   0x3F

Definition at line 662 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_ResetNegatedClear_RMASK   0x1

Definition at line 663 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SBufVL15MisUseErrClear_LSB   0x37

Definition at line 673 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SBufVL15MisUseErrClear_MSB   0x37

Definition at line 674 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SBufVL15MisUseErrClear_RMASK   0x1

Definition at line 675 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SDmaBufMaskDuplicateErrClear_LSB   0x19

Definition at line 694 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SDmaBufMaskDuplicateErrClear_MSB   0x19

Definition at line 695 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SDmaBufMaskDuplicateErrClear_RMASK   0x1

Definition at line 696 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SDmaVL15ErrClear_LSB   0x38

Definition at line 670 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SDmaVL15ErrClear_MSB   0x38

Definition at line 671 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SDmaVL15ErrClear_RMASK   0x1

Definition at line 672 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SDmaWrongPortErrClear_LSB   0x1A

Definition at line 691 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SDmaWrongPortErrClear_MSB   0x1A

Definition at line 692 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SDmaWrongPortErrClear_RMASK   0x1

Definition at line 693 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SendArmLaunchErrClear_LSB   0x23

Definition at line 685 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SendArmLaunchErrClear_MSB   0x23

Definition at line 686 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SendArmLaunchErrClear_RMASK   0x1

Definition at line 687 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SendSpecialTriggerErrClear_LSB   0x1B

Definition at line 688 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SendSpecialTriggerErrClear_MSB   0x1B

Definition at line 689 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SendSpecialTriggerErrClear_RMASK   0x1

Definition at line 690 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SendVLMismatchErrMask_LSB   0x24

Definition at line 682 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SendVLMismatchErrMask_MSB   0x24

Definition at line 683 of file qib_7322_regs.h.

#define QIB_7322_ErrClear_SendVLMismatchErrMask_RMASK   0x1

Definition at line 684 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_DEF   0x0000000000000000

Definition at line 1371 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_IBStatusChangedMask_LSB   0x3A

Definition at line 1372 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_IBStatusChangedMask_MSB   0x3A

Definition at line 1373 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_IBStatusChangedMask_RMASK   0x1

Definition at line 1374 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_OFFS   0x1080

Definition at line 1370 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvBadTidErrMask_LSB   0xE

Definition at line 1450 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvBadTidErrMask_MSB   0xE

Definition at line 1451 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvBadTidErrMask_RMASK   0x1

Definition at line 1452 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvBadVersionErrMask_LSB   0xB

Definition at line 1453 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvBadVersionErrMask_MSB   0xB

Definition at line 1454 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvBadVersionErrMask_RMASK   0x1

Definition at line 1455 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvEBPErrMask_LSB   0x9

Definition at line 1459 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvEBPErrMask_MSB   0x9

Definition at line 1460 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvEBPErrMask_RMASK   0x1

Definition at line 1461 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvFormatErrMask_LSB   0x0

Definition at line 1486 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvFormatErrMask_MSB   0x0

Definition at line 1487 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvFormatErrMask_RMASK   0x1

Definition at line 1488 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvHdrErrMask_LSB   0x10

Definition at line 1444 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvHdrErrMask_MSB   0x10

Definition at line 1445 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvHdrErrMask_RMASK   0x1

Definition at line 1446 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvHdrLenErrMask_LSB   0xF

Definition at line 1447 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvHdrLenErrMask_MSB   0xF

Definition at line 1448 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvHdrLenErrMask_RMASK   0x1

Definition at line 1449 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvIBFlowErrMask_LSB   0xA

Definition at line 1456 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvIBFlowErrMask_MSB   0xA

Definition at line 1457 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvIBFlowErrMask_RMASK   0x1

Definition at line 1458 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvIBLostLinkErrMask_LSB   0x11

Definition at line 1441 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvIBLostLinkErrMask_MSB   0x11

Definition at line 1442 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvIBLostLinkErrMask_RMASK   0x1

Definition at line 1443 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvICRCErrMask_LSB   0x2

Definition at line 1480 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvICRCErrMask_MSB   0x2

Definition at line 1481 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvICRCErrMask_RMASK   0x1

Definition at line 1482 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvLongPktLenErrMask_LSB   0x5

Definition at line 1471 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvLongPktLenErrMask_MSB   0x5

Definition at line 1472 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvLongPktLenErrMask_RMASK   0x1

Definition at line 1473 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvMaxPktLenErrMask_LSB   0x4

Definition at line 1474 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvMaxPktLenErrMask_MSB   0x4

Definition at line 1475 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvMaxPktLenErrMask_RMASK   0x1

Definition at line 1476 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvMinPktLenErrMask_LSB   0x3

Definition at line 1477 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvMinPktLenErrMask_MSB   0x3

Definition at line 1478 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvMinPktLenErrMask_RMASK   0x1

Definition at line 1479 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvShortPktLenErrMask_LSB   0x6

Definition at line 1468 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvShortPktLenErrMask_MSB   0x6

Definition at line 1469 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvShortPktLenErrMask_RMASK   0x1

Definition at line 1470 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvUnexpectedCharErrMask_LSB   0x7

Definition at line 1465 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvUnexpectedCharErrMask_MSB   0x7

Definition at line 1466 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvUnexpectedCharErrMask_RMASK   0x1

Definition at line 1467 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvUnsupportedVLErrMask_LSB   0x8

Definition at line 1462 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvUnsupportedVLErrMask_MSB   0x8

Definition at line 1463 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvUnsupportedVLErrMask_RMASK   0x1

Definition at line 1464 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvVCRCErrMask_LSB   0x1

Definition at line 1483 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvVCRCErrMask_MSB   0x1

Definition at line 1484 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_RcvVCRCErrMask_RMASK   0x1

Definition at line 1485 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDma1stDescErrMask_LSB   0x2B

Definition at line 1399 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDma1stDescErrMask_MSB   0x2B

Definition at line 1400 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDma1stDescErrMask_RMASK   0x1

Definition at line 1401 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaBaseErrMask_LSB   0x2A

Definition at line 1402 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaBaseErrMask_MSB   0x2A

Definition at line 1403 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaBaseErrMask_RMASK   0x1

Definition at line 1404 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaDescAddrMisalignErrMask_LSB   0x30

Definition at line 1384 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaDescAddrMisalignErrMask_MSB   0x30

Definition at line 1385 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaDescAddrMisalignErrMask_RMASK   0x1

Definition at line 1386 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaDwEnErrMask_LSB   0x2D

Definition at line 1393 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaDwEnErrMask_MSB   0x2D

Definition at line 1394 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaDwEnErrMask_RMASK   0x1

Definition at line 1395 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaGenMismatchErrMask_LSB   0x27

Definition at line 1411 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaGenMismatchErrMask_MSB   0x27

Definition at line 1412 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaGenMismatchErrMask_RMASK   0x1

Definition at line 1413 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaHaltErrMask_LSB   0x31

Definition at line 1381 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaHaltErrMask_MSB   0x31

Definition at line 1382 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaHaltErrMask_RMASK   0x1

Definition at line 1383 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaMissingDwErrMask_LSB   0x2E

Definition at line 1390 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaMissingDwErrMask_MSB   0x2E

Definition at line 1391 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaMissingDwErrMask_RMASK   0x1

Definition at line 1392 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaOutOfBoundErrMask_LSB   0x28

Definition at line 1408 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaOutOfBoundErrMask_MSB   0x28

Definition at line 1409 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaOutOfBoundErrMask_RMASK   0x1

Definition at line 1410 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaRpyTagErrMask_LSB   0x2C

Definition at line 1396 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaRpyTagErrMask_MSB   0x2C

Definition at line 1397 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaRpyTagErrMask_RMASK   0x1

Definition at line 1398 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaTailOutOfBoundErrMask_LSB   0x29

Definition at line 1405 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaTailOutOfBoundErrMask_MSB   0x29

Definition at line 1406 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaTailOutOfBoundErrMask_RMASK   0x1

Definition at line 1407 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaUnexpDataErrMask_LSB   0x2F

Definition at line 1387 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaUnexpDataErrMask_MSB   0x2F

Definition at line 1388 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SDmaUnexpDataErrMask_RMASK   0x1

Definition at line 1389 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendBufMisuseErrMask_LSB   0x26

Definition at line 1414 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendBufMisuseErrMask_MSB   0x26

Definition at line 1415 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendBufMisuseErrMask_RMASK   0x1

Definition at line 1416 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendDroppedDataPktErrMask_LSB   0x22

Definition at line 1423 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendDroppedDataPktErrMask_MSB   0x22

Definition at line 1424 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendDroppedDataPktErrMask_RMASK   0x1

Definition at line 1425 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendDroppedSmpPktErrMask_LSB   0x21

Definition at line 1426 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendDroppedSmpPktErrMask_MSB   0x21

Definition at line 1427 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendDroppedSmpPktErrMask_RMASK   0x1

Definition at line 1428 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendMaxPktLenErrMask_LSB   0x1E

Definition at line 1435 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendMaxPktLenErrMask_MSB   0x1E

Definition at line 1436 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendMaxPktLenErrMask_RMASK   0x1

Definition at line 1437 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendMinPktLenErrMask_LSB   0x1D

Definition at line 1438 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendMinPktLenErrMask_MSB   0x1D

Definition at line 1439 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendMinPktLenErrMask_RMASK   0x1

Definition at line 1440 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendPktLenErrMask_LSB   0x20

Definition at line 1429 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendPktLenErrMask_MSB   0x20

Definition at line 1430 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendPktLenErrMask_RMASK   0x1

Definition at line 1431 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendUnderRunErrMask_LSB   0x1F

Definition at line 1432 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendUnderRunErrMask_MSB   0x1F

Definition at line 1433 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendUnderRunErrMask_RMASK   0x1

Definition at line 1434 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendUnexpectedPktNumErrMask_LSB   0x24

Definition at line 1420 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendUnexpectedPktNumErrMask_MSB   0x24

Definition at line 1421 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendUnexpectedPktNumErrMask_RMASK   0x1

Definition at line 1422 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendUnsupportedVLErrMask_LSB   0x25

Definition at line 1417 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendUnsupportedVLErrMask_MSB   0x25

Definition at line 1418 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SendUnsupportedVLErrMask_RMASK   0x1

Definition at line 1419 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SHeadersErrMask_LSB   0x39

Definition at line 1375 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SHeadersErrMask_MSB   0x39

Definition at line 1376 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_SHeadersErrMask_RMASK   0x1

Definition at line 1377 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_VL15BufMisuseErrMask_LSB   0x36

Definition at line 1378 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_VL15BufMisuseErrMask_MSB   0x36

Definition at line 1379 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_0_VL15BufMisuseErrMask_RMASK   0x1

Definition at line 1380 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_DEF   0x0000000000000000

Definition at line 570 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_HardwareErrMask_LSB   0x3E

Definition at line 574 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_HardwareErrMask_MSB   0x3E

Definition at line 575 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_HardwareErrMask_RMASK   0x1

Definition at line 576 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_InvalidAddrErrMask_LSB   0x3D

Definition at line 577 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_InvalidAddrErrMask_MSB   0x3D

Definition at line 578 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_InvalidAddrErrMask_RMASK   0x1

Definition at line 579 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_InvalidEEPCmdMask_LSB   0x35

Definition at line 586 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_InvalidEEPCmdMask_MSB   0x35

Definition at line 587 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_InvalidEEPCmdMask_RMASK   0x1

Definition at line 588 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_OFFS   0x80

Definition at line 569 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_RcvContextShareErrMask_LSB   0x34

Definition at line 589 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_RcvContextShareErrMask_MSB   0x34

Definition at line 590 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_RcvContextShareErrMask_RMASK   0x1

Definition at line 591 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_RcvEgrFullErrMask_LSB   0xC

Definition at line 610 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_RcvEgrFullErrMask_MSB   0xC

Definition at line 611 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_RcvEgrFullErrMask_RMASK   0x1

Definition at line 612 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_RcvHdrFullErrMask_LSB   0xD

Definition at line 607 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_RcvHdrFullErrMask_MSB   0xD

Definition at line 608 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_RcvHdrFullErrMask_RMASK   0x1

Definition at line 609 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_ResetNegatedMask_LSB   0x3F

Definition at line 571 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_ResetNegatedMask_MSB   0x3F

Definition at line 572 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_ResetNegatedMask_RMASK   0x1

Definition at line 573 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SBufVL15MisUseErrMask_LSB   0x37

Definition at line 583 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SBufVL15MisUseErrMask_MSB   0x37

Definition at line 584 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SBufVL15MisUseErrMask_RMASK   0x1

Definition at line 585 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SDmaBufMaskDuplicateErrMask_LSB   0x19

Definition at line 604 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SDmaBufMaskDuplicateErrMask_MSB   0x19

Definition at line 605 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SDmaBufMaskDuplicateErrMask_RMASK   0x1

Definition at line 606 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SDmaVL15ErrMask_LSB   0x38

Definition at line 580 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SDmaVL15ErrMask_MSB   0x38

Definition at line 581 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SDmaVL15ErrMask_RMASK   0x1

Definition at line 582 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SDmaWrongPortErrMask_LSB   0x1A

Definition at line 601 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SDmaWrongPortErrMask_MSB   0x1A

Definition at line 602 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SDmaWrongPortErrMask_RMASK   0x1

Definition at line 603 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SendArmLaunchErrMask_LSB   0x23

Definition at line 595 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SendArmLaunchErrMask_MSB   0x23

Definition at line 596 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SendArmLaunchErrMask_RMASK   0x1

Definition at line 597 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SendSpecialTriggerErrMask_LSB   0x1B

Definition at line 598 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SendSpecialTriggerErrMask_MSB   0x1B

Definition at line 599 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SendSpecialTriggerErrMask_RMASK   0x1

Definition at line 600 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SendVLMismatchErrMask_LSB   0x24

Definition at line 592 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SendVLMismatchErrMask_MSB   0x24

Definition at line 593 of file qib_7322_regs.h.

#define QIB_7322_ErrMask_SendVLMismatchErrMask_RMASK   0x1

Definition at line 594 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_DEF   0x0000000000000000

Definition at line 1491 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_IBStatusChanged_LSB   0x3A

Definition at line 1492 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_IBStatusChanged_MSB   0x3A

Definition at line 1493 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_IBStatusChanged_RMASK   0x1

Definition at line 1494 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_OFFS   0x1088

Definition at line 1490 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvBadTidErr_LSB   0xE

Definition at line 1570 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvBadTidErr_MSB   0xE

Definition at line 1571 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvBadTidErr_RMASK   0x1

Definition at line 1572 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvBadVersionErr_LSB   0xB

Definition at line 1573 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvBadVersionErr_MSB   0xB

Definition at line 1574 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvBadVersionErr_RMASK   0x1

Definition at line 1575 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvEBPErr_LSB   0x9

Definition at line 1579 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvEBPErr_MSB   0x9

Definition at line 1580 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvEBPErr_RMASK   0x1

Definition at line 1581 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvFormatErr_LSB   0x0

Definition at line 1606 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvFormatErr_MSB   0x0

Definition at line 1607 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvFormatErr_RMASK   0x1

Definition at line 1608 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvHdrErr_LSB   0x10

Definition at line 1564 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvHdrErr_MSB   0x10

Definition at line 1565 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvHdrErr_RMASK   0x1

Definition at line 1566 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvHdrLenErr_LSB   0xF

Definition at line 1567 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvHdrLenErr_MSB   0xF

Definition at line 1568 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvHdrLenErr_RMASK   0x1

Definition at line 1569 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvIBFlowErr_LSB   0xA

Definition at line 1576 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvIBFlowErr_MSB   0xA

Definition at line 1577 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvIBFlowErr_RMASK   0x1

Definition at line 1578 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvIBLostLinkErr_LSB   0x11

Definition at line 1561 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvIBLostLinkErr_MSB   0x11

Definition at line 1562 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvIBLostLinkErr_RMASK   0x1

Definition at line 1563 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvICRCErr_LSB   0x2

Definition at line 1600 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvICRCErr_MSB   0x2

Definition at line 1601 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvICRCErr_RMASK   0x1

Definition at line 1602 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvLongPktLenErr_LSB   0x5

Definition at line 1591 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvLongPktLenErr_MSB   0x5

Definition at line 1592 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvLongPktLenErr_RMASK   0x1

Definition at line 1593 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvMaxPktLenErr_LSB   0x4

Definition at line 1594 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvMaxPktLenErr_MSB   0x4

Definition at line 1595 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvMaxPktLenErr_RMASK   0x1

Definition at line 1596 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvMinPktLenErr_LSB   0x3

Definition at line 1597 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvMinPktLenErr_MSB   0x3

Definition at line 1598 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvMinPktLenErr_RMASK   0x1

Definition at line 1599 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvShortPktLenErr_LSB   0x6

Definition at line 1588 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvShortPktLenErr_MSB   0x6

Definition at line 1589 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvShortPktLenErr_RMASK   0x1

Definition at line 1590 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvUnexpectedCharErr_LSB   0x7

Definition at line 1585 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvUnexpectedCharErr_MSB   0x7

Definition at line 1586 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvUnexpectedCharErr_RMASK   0x1

Definition at line 1587 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvUnsupportedVLErr_LSB   0x8

Definition at line 1582 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvUnsupportedVLErr_MSB   0x8

Definition at line 1583 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvUnsupportedVLErr_RMASK   0x1

Definition at line 1584 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvVCRCErr_LSB   0x1

Definition at line 1603 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvVCRCErr_MSB   0x1

Definition at line 1604 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_RcvVCRCErr_RMASK   0x1

Definition at line 1605 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDma1stDescErr_LSB   0x2B

Definition at line 1519 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDma1stDescErr_MSB   0x2B

Definition at line 1520 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDma1stDescErr_RMASK   0x1

Definition at line 1521 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaBaseErr_LSB   0x2A

Definition at line 1522 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaBaseErr_MSB   0x2A

Definition at line 1523 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaBaseErr_RMASK   0x1

Definition at line 1524 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaDescAddrMisalignErr_LSB   0x30

Definition at line 1504 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaDescAddrMisalignErr_MSB   0x30

Definition at line 1505 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaDescAddrMisalignErr_RMASK   0x1

Definition at line 1506 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaDwEnErr_LSB   0x2D

Definition at line 1513 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaDwEnErr_MSB   0x2D

Definition at line 1514 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaDwEnErr_RMASK   0x1

Definition at line 1515 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaGenMismatchErr_LSB   0x27

Definition at line 1531 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaGenMismatchErr_MSB   0x27

Definition at line 1532 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaGenMismatchErr_RMASK   0x1

Definition at line 1533 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaHaltErr_LSB   0x31

Definition at line 1501 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaHaltErr_MSB   0x31

Definition at line 1502 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaHaltErr_RMASK   0x1

Definition at line 1503 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaMissingDwErr_LSB   0x2E

Definition at line 1510 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaMissingDwErr_MSB   0x2E

Definition at line 1511 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaMissingDwErr_RMASK   0x1

Definition at line 1512 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaOutOfBoundErr_LSB   0x28

Definition at line 1528 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaOutOfBoundErr_MSB   0x28

Definition at line 1529 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaOutOfBoundErr_RMASK   0x1

Definition at line 1530 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaRpyTagErr_LSB   0x2C

Definition at line 1516 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaRpyTagErr_MSB   0x2C

Definition at line 1517 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaRpyTagErr_RMASK   0x1

Definition at line 1518 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaTailOutOfBoundErr_LSB   0x29

Definition at line 1525 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaTailOutOfBoundErr_MSB   0x29

Definition at line 1526 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaTailOutOfBoundErr_RMASK   0x1

Definition at line 1527 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaUnexpDataErr_LSB   0x2F

Definition at line 1507 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaUnexpDataErr_MSB   0x2F

Definition at line 1508 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SDmaUnexpDataErr_RMASK   0x1

Definition at line 1509 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendBufMisuseErr_LSB   0x26

Definition at line 1534 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendBufMisuseErr_MSB   0x26

Definition at line 1535 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendBufMisuseErr_RMASK   0x1

Definition at line 1536 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendDroppedDataPktErr_LSB   0x22

Definition at line 1543 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendDroppedDataPktErr_MSB   0x22

Definition at line 1544 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendDroppedDataPktErr_RMASK   0x1

Definition at line 1545 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendDroppedSmpPktErr_LSB   0x21

Definition at line 1546 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendDroppedSmpPktErr_MSB   0x21

Definition at line 1547 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendDroppedSmpPktErr_RMASK   0x1

Definition at line 1548 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendMaxPktLenErr_LSB   0x1E

Definition at line 1555 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendMaxPktLenErr_MSB   0x1E

Definition at line 1556 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendMaxPktLenErr_RMASK   0x1

Definition at line 1557 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendMinPktLenErr_LSB   0x1D

Definition at line 1558 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendMinPktLenErr_MSB   0x1D

Definition at line 1559 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendMinPktLenErr_RMASK   0x1

Definition at line 1560 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendPktLenErr_LSB   0x20

Definition at line 1549 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendPktLenErr_MSB   0x20

Definition at line 1550 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendPktLenErr_RMASK   0x1

Definition at line 1551 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendUnderRunErr_LSB   0x1F

Definition at line 1552 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendUnderRunErr_MSB   0x1F

Definition at line 1553 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendUnderRunErr_RMASK   0x1

Definition at line 1554 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendUnexpectedPktNumErr_LSB   0x24

Definition at line 1540 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendUnexpectedPktNumErr_MSB   0x24

Definition at line 1541 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendUnexpectedPktNumErr_RMASK   0x1

Definition at line 1542 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendUnsupportedVLErr_LSB   0x25

Definition at line 1537 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendUnsupportedVLErr_MSB   0x25

Definition at line 1538 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SendUnsupportedVLErr_RMASK   0x1

Definition at line 1539 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SHeadersErr_LSB   0x39

Definition at line 1495 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SHeadersErr_MSB   0x39

Definition at line 1496 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_SHeadersErr_RMASK   0x1

Definition at line 1497 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_VL15BufMisuseErr_LSB   0x36

Definition at line 1498 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_VL15BufMisuseErr_MSB   0x36

Definition at line 1499 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_0_VL15BufMisuseErr_RMASK   0x1

Definition at line 1500 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_DEF   0x0000000000000000

Definition at line 615 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_HardwareErr_LSB   0x3E

Definition at line 619 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_HardwareErr_MSB   0x3E

Definition at line 620 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_HardwareErr_RMASK   0x1

Definition at line 621 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_InvalidAddrErr_LSB   0x3D

Definition at line 622 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_InvalidAddrErr_MSB   0x3D

Definition at line 623 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_InvalidAddrErr_RMASK   0x1

Definition at line 624 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_InvalidEEPCmdErr_LSB   0x35

Definition at line 631 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_InvalidEEPCmdErr_MSB   0x35

Definition at line 632 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_InvalidEEPCmdErr_RMASK   0x1

Definition at line 633 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_OFFS   0x88

Definition at line 614 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_RcvContextShareErr_LSB   0x34

Definition at line 634 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_RcvContextShareErr_MSB   0x34

Definition at line 635 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_RcvContextShareErr_RMASK   0x1

Definition at line 636 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_RcvEgrFullErr_LSB   0xC

Definition at line 655 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_RcvEgrFullErr_MSB   0xC

Definition at line 656 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_RcvEgrFullErr_RMASK   0x1

Definition at line 657 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_RcvHdrFullErr_LSB   0xD

Definition at line 652 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_RcvHdrFullErr_MSB   0xD

Definition at line 653 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_RcvHdrFullErr_RMASK   0x1

Definition at line 654 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_ResetNegated_LSB   0x3F

Definition at line 616 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_ResetNegated_MSB   0x3F

Definition at line 617 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_ResetNegated_RMASK   0x1

Definition at line 618 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SBufVL15MisUseErr_LSB   0x37

Definition at line 628 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SBufVL15MisUseErr_MSB   0x37

Definition at line 629 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SBufVL15MisUseErr_RMASK   0x1

Definition at line 630 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SDmaBufMaskDuplicateErr_LSB   0x19

Definition at line 649 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SDmaBufMaskDuplicateErr_MSB   0x19

Definition at line 650 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SDmaBufMaskDuplicateErr_RMASK   0x1

Definition at line 651 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SDmaVL15Err_LSB   0x38

Definition at line 625 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SDmaVL15Err_MSB   0x38

Definition at line 626 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SDmaVL15Err_RMASK   0x1

Definition at line 627 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SDmaWrongPortErr_LSB   0x1A

Definition at line 646 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SDmaWrongPortErr_MSB   0x1A

Definition at line 647 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SDmaWrongPortErr_RMASK   0x1

Definition at line 648 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SendArmLaunchErr_LSB   0x23

Definition at line 640 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SendArmLaunchErr_MSB   0x23

Definition at line 641 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SendArmLaunchErr_RMASK   0x1

Definition at line 642 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SendSpecialTriggerErr_LSB   0x1B

Definition at line 643 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SendSpecialTriggerErr_MSB   0x1B

Definition at line 644 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SendSpecialTriggerErr_RMASK   0x1

Definition at line 645 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SendVLMismatchErr_LSB   0x24

Definition at line 637 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SendVLMismatchErr_MSB   0x24

Definition at line 638 of file qib_7322_regs.h.

#define QIB_7322_ErrStatus_SendVLMismatchErr_RMASK   0x1

Definition at line 639 of file qib_7322_regs.h.

#define QIB_7322_ExcessBufferOvflCnt_0_DEF   0x0000000000000000

Definition at line 2926 of file qib_7322_regs.h.

#define QIB_7322_ExcessBufferOvflCnt_0_OFFS   0x121A8

Definition at line 2925 of file qib_7322_regs.h.

#define QIB_7322_ExcessBufferOvflCnt_1_DEF   0x0000000000000000

Definition at line 3061 of file qib_7322_regs.h.

#define QIB_7322_ExcessBufferOvflCnt_1_OFFS   0x131A8

Definition at line 3060 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_DEF   0x0000000000000000

Definition at line 906 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_GPIOInvert_LSB   0x20

Definition at line 910 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_GPIOInvert_MSB   0x2F

Definition at line 911 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_GPIOInvert_RMASK   0xFFFF

Definition at line 912 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_GPIOOe_LSB   0x30

Definition at line 907 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_GPIOOe_MSB   0x3F

Definition at line 908 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_GPIOOe_RMASK   0xFFFF

Definition at line 909 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_LEDPort0GreenOn_LSB   0x1

Definition at line 919 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_LEDPort0GreenOn_MSB   0x1

Definition at line 920 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_LEDPort0GreenOn_RMASK   0x1

Definition at line 921 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_LEDPort0YellowOn_LSB   0x0

Definition at line 922 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_LEDPort0YellowOn_MSB   0x0

Definition at line 923 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_LEDPort0YellowOn_RMASK   0x1

Definition at line 924 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_LEDPort1GreenOn_LSB   0x3

Definition at line 913 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_LEDPort1GreenOn_MSB   0x3

Definition at line 914 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_LEDPort1GreenOn_RMASK   0x1

Definition at line 915 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_LEDPort1YellowOn_LSB   0x2

Definition at line 916 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_LEDPort1YellowOn_MSB   0x2

Definition at line 917 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_LEDPort1YellowOn_RMASK   0x1

Definition at line 918 of file qib_7322_regs.h.

#define QIB_7322_EXTCtrl_OFFS   0xC8

Definition at line 905 of file qib_7322_regs.h.

#define QIB_7322_EXTStatus_DEF   0x000000000000X000

Definition at line 894 of file qib_7322_regs.h.

#define QIB_7322_EXTStatus_GPIOIn_LSB   0x30

Definition at line 895 of file qib_7322_regs.h.

#define QIB_7322_EXTStatus_GPIOIn_MSB   0x3F

Definition at line 896 of file qib_7322_regs.h.

#define QIB_7322_EXTStatus_GPIOIn_RMASK   0xFFFF

Definition at line 897 of file qib_7322_regs.h.

#define QIB_7322_EXTStatus_MemBISTDisabled_LSB   0xF

Definition at line 898 of file qib_7322_regs.h.

#define QIB_7322_EXTStatus_MemBISTDisabled_MSB   0xF

Definition at line 899 of file qib_7322_regs.h.

#define QIB_7322_EXTStatus_MemBISTDisabled_RMASK   0x1

Definition at line 900 of file qib_7322_regs.h.

#define QIB_7322_EXTStatus_MemBISTEndTest_LSB   0xE

Definition at line 901 of file qib_7322_regs.h.

#define QIB_7322_EXTStatus_MemBISTEndTest_MSB   0xE

Definition at line 902 of file qib_7322_regs.h.

#define QIB_7322_EXTStatus_MemBISTEndTest_RMASK   0x1

Definition at line 903 of file qib_7322_regs.h.

#define QIB_7322_EXTStatus_OFFS   0xC0

Definition at line 893 of file qib_7322_regs.h.

#define QIB_7322_feature_mask_DEF   0x00000000000000XX

Definition at line 996 of file qib_7322_regs.h.

#define QIB_7322_feature_mask_OFFS   0x190

Definition at line 995 of file qib_7322_regs.h.

#define QIB_7322_GPIOClear_DEF   0x0000000000000000

Definition at line 936 of file qib_7322_regs.h.

#define QIB_7322_GPIOClear_OFFS   0xF8

Definition at line 935 of file qib_7322_regs.h.

#define QIB_7322_GPIOMask_DEF   0x0000000000000000

Definition at line 930 of file qib_7322_regs.h.

#define QIB_7322_GPIOMask_OFFS   0xE8

Definition at line 929 of file qib_7322_regs.h.

#define QIB_7322_GPIOOut_DEF   0x0000000000000000

Definition at line 927 of file qib_7322_regs.h.

#define QIB_7322_GPIOOut_OFFS   0xE0

Definition at line 926 of file qib_7322_regs.h.

#define QIB_7322_GPIOStatus_DEF   0x0000000000000000

Definition at line 933 of file qib_7322_regs.h.

#define QIB_7322_GPIOStatus_OFFS   0xF0

Definition at line 932 of file qib_7322_regs.h.

#define QIB_7322_HighPriority0_0_DEF   0x0000000000000000

Definition at line 2778 of file qib_7322_regs.h.

#define QIB_7322_HighPriority0_0_OFFS   0x1E00

Definition at line 2777 of file qib_7322_regs.h.

#define QIB_7322_HighPriority0_0_VirtualLane_LSB   0x10

Definition at line 2779 of file qib_7322_regs.h.

#define QIB_7322_HighPriority0_0_VirtualLane_MSB   0x12

Definition at line 2780 of file qib_7322_regs.h.

#define QIB_7322_HighPriority0_0_VirtualLane_RMASK   0x7

Definition at line 2781 of file qib_7322_regs.h.

#define QIB_7322_HighPriority0_0_Weight_LSB   0x0

Definition at line 2782 of file qib_7322_regs.h.

#define QIB_7322_HighPriority0_0_Weight_MSB   0x7

Definition at line 2783 of file qib_7322_regs.h.

#define QIB_7322_HighPriority0_0_Weight_RMASK   0xFF

Definition at line 2784 of file qib_7322_regs.h.

#define QIB_7322_HighPriorityLimit_0_DEF   0x0000000000000000

Definition at line 2763 of file qib_7322_regs.h.

#define QIB_7322_HighPriorityLimit_0_Limit_LSB   0x0

Definition at line 2764 of file qib_7322_regs.h.

#define QIB_7322_HighPriorityLimit_0_Limit_MSB   0x7

Definition at line 2765 of file qib_7322_regs.h.

#define QIB_7322_HighPriorityLimit_0_Limit_RMASK   0xFF

Definition at line 2766 of file qib_7322_regs.h.

#define QIB_7322_HighPriorityLimit_0_OFFS   0x1BC0

Definition at line 2762 of file qib_7322_regs.h.

#define QIB_7322_HRTBT_GUID_0_DEF   0x0000000000000000

Definition at line 2364 of file qib_7322_regs.h.

#define QIB_7322_HRTBT_GUID_0_OFFS   0x1588

Definition at line 2363 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_CounterDisable_LSB   0x3C

Definition at line 874 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_CounterDisable_MSB   0x3C

Definition at line 875 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_CounterDisable_RMASK   0x1

Definition at line 876 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_CounterWrEnable_LSB   0x3D

Definition at line 871 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_CounterWrEnable_MSB   0x3D

Definition at line 872 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_CounterWrEnable_RMASK   0x1

Definition at line 873 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_DEF   0x0000000000000000

Definition at line 867 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_Diagnostic_LSB   0x3F

Definition at line 868 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_Diagnostic_MSB   0x3F

Definition at line 869 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_Diagnostic_RMASK   0x1

Definition at line 870 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_LSB   0xD

Definition at line 886 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_MSB   0xD

Definition at line 887 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_RMASK   0x1

Definition at line 888 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_LSB   0xF

Definition at line 880 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_MSB   0xF

Definition at line 881 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_RMASK   0x1

Definition at line 882 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_0_LSB   0xC

Definition at line 889 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_0_MSB   0xC

Definition at line 890 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_0_RMASK   0x1

Definition at line 891 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_1_LSB   0xE

Definition at line 883 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_1_MSB   0xE

Definition at line 884 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_1_RMASK   0x1

Definition at line 885 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_forcePCIeBusParity_LSB   0x1F

Definition at line 877 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_forcePCIeBusParity_MSB   0x22

Definition at line 878 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_forcePCIeBusParity_RMASK   0xF

Definition at line 879 of file qib_7322_regs.h.

#define QIB_7322_HwDiagCtrl_OFFS   0xB0

Definition at line 866 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_DEF   0x0000000000000000

Definition at line 813 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_LSB   0xD

Definition at line 856 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_MSB   0xD

Definition at line 857 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_RMASK   0x1

Definition at line 858 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_LSB   0xF

Definition at line 850 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_MSB   0xF

Definition at line 851 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_RMASK   0x1

Definition at line 852 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_IBCBusToSPCParityErrClear_1_LSB   0xE

Definition at line 853 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_IBCBusToSPCParityErrClear_1_MSB   0xE

Definition at line 854 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_IBCBusToSPCParityErrClear_1_RMASK   0x1

Definition at line 855 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_IBSerdesPClkNotDetectClear_0_LSB   0x3E

Definition at line 817 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_IBSerdesPClkNotDetectClear_0_MSB   0x3E

Definition at line 818 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_IBSerdesPClkNotDetectClear_0_RMASK   0x1

Definition at line 819 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_IBSerdesPClkNotDetectClear_1_LSB   0x3F

Definition at line 814 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_IBSerdesPClkNotDetectClear_1_MSB   0x3F

Definition at line 815 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_IBSerdesPClkNotDetectClear_1_RMASK   0x1

Definition at line 816 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_LATriggeredClear_LSB   0xB

Definition at line 862 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_LATriggeredClear_MSB   0xB

Definition at line 863 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_LATriggeredClear_RMASK   0x1

Definition at line 864 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_MemoryErrClear_LSB   0x30

Definition at line 829 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_MemoryErrClear_MSB   0x30

Definition at line 830 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_MemoryErrClear_RMASK   0x1

Definition at line 831 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_OFFS   0xA8

Definition at line 812 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_pcie_phy_txParityErr_LSB   0x22

Definition at line 832 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_pcie_phy_txParityErr_MSB   0x22

Definition at line 833 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_pcie_phy_txParityErr_RMASK   0x1

Definition at line 834 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_PCIeBusParityClear_LSB   0x1F

Definition at line 835 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_PCIeBusParityClear_MSB   0x21

Definition at line 836 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_PCIeBusParityClear_RMASK   0x7

Definition at line 837 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_PcieCplTimeoutClear_LSB   0x1E

Definition at line 838 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_PcieCplTimeoutClear_MSB   0x1E

Definition at line 839 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_PcieCplTimeoutClear_RMASK   0x1

Definition at line 840 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_PciePoisonedTLPClear_LSB   0x1D

Definition at line 841 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_PciePoisonedTLPClear_MSB   0x1D

Definition at line 842 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_PciePoisonedTLPClear_RMASK   0x1

Definition at line 843 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_PCIESerdesPClkNotDetectClear_LSB   0x37

Definition at line 820 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_PCIESerdesPClkNotDetectClear_MSB   0x37

Definition at line 821 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_PCIESerdesPClkNotDetectClear_RMASK   0x1

Definition at line 822 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_PowerOnBISTFailedClear_LSB   0x36

Definition at line 823 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_PowerOnBISTFailedClear_MSB   0x36

Definition at line 824 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_PowerOnBISTFailedClear_RMASK   0x1

Definition at line 825 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_SDmaMemReadErrClear_0_LSB   0x1B

Definition at line 847 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_SDmaMemReadErrClear_0_MSB   0x1B

Definition at line 848 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_SDmaMemReadErrClear_0_RMASK   0x1

Definition at line 849 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_SDmaMemReadErrClear_1_LSB   0x1C

Definition at line 844 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_SDmaMemReadErrClear_1_MSB   0x1C

Definition at line 845 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_SDmaMemReadErrClear_1_RMASK   0x1

Definition at line 846 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_statusValidNoEopClear_LSB   0xC

Definition at line 859 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_statusValidNoEopClear_MSB   0xC

Definition at line 860 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_statusValidNoEopClear_RMASK   0x1

Definition at line 861 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_TempsenseTholdReachedClear_LSB   0x35

Definition at line 826 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_TempsenseTholdReachedClear_MSB   0x35

Definition at line 827 of file qib_7322_regs.h.

#define QIB_7322_HwErrClear_TempsenseTholdReachedClear_RMASK   0x1

Definition at line 828 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_DEF   0x0000000000000000

Definition at line 705 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_LSB   0xD

Definition at line 748 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_MSB   0xD

Definition at line 749 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_RMASK   0x1

Definition at line 750 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_LSB   0xF

Definition at line 742 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_MSB   0xF

Definition at line 743 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_RMASK   0x1

Definition at line 744 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_IBCBusToSPCParityErrMask_1_LSB   0xE

Definition at line 745 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_IBCBusToSPCParityErrMask_1_MSB   0xE

Definition at line 746 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_IBCBusToSPCParityErrMask_1_RMASK   0x1

Definition at line 747 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_IBSerdesPClkNotDetectMask_0_LSB   0x3E

Definition at line 709 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_IBSerdesPClkNotDetectMask_0_MSB   0x3E

Definition at line 710 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_IBSerdesPClkNotDetectMask_0_RMASK   0x1

Definition at line 711 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_IBSerdesPClkNotDetectMask_1_LSB   0x3F

Definition at line 706 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_IBSerdesPClkNotDetectMask_1_MSB   0x3F

Definition at line 707 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_IBSerdesPClkNotDetectMask_1_RMASK   0x1

Definition at line 708 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_LATriggeredMask_LSB   0xB

Definition at line 754 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_LATriggeredMask_MSB   0xB

Definition at line 755 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_LATriggeredMask_RMASK   0x1

Definition at line 756 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_MemoryErrMask_LSB   0x30

Definition at line 721 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_MemoryErrMask_MSB   0x30

Definition at line 722 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_MemoryErrMask_RMASK   0x1

Definition at line 723 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_OFFS   0x98

Definition at line 704 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_pcie_phy_txParityErr_LSB   0x22

Definition at line 724 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_pcie_phy_txParityErr_MSB   0x22

Definition at line 725 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_pcie_phy_txParityErr_RMASK   0x1

Definition at line 726 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_PCIeBusParityErrMask_LSB   0x1F

Definition at line 727 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_PCIeBusParityErrMask_MSB   0x21

Definition at line 728 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_PCIeBusParityErrMask_RMASK   0x7

Definition at line 729 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_PcieCplTimeoutMask_LSB   0x1E

Definition at line 730 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_PcieCplTimeoutMask_MSB   0x1E

Definition at line 731 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_PcieCplTimeoutMask_RMASK   0x1

Definition at line 732 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_PciePoisonedTLPMask_LSB   0x1D

Definition at line 733 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_PciePoisonedTLPMask_MSB   0x1D

Definition at line 734 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_PciePoisonedTLPMask_RMASK   0x1

Definition at line 735 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_PCIESerdesPClkNotDetectMask_LSB   0x37

Definition at line 712 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_PCIESerdesPClkNotDetectMask_MSB   0x37

Definition at line 713 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_PCIESerdesPClkNotDetectMask_RMASK   0x1

Definition at line 714 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_PowerOnBISTFailedMask_LSB   0x36

Definition at line 715 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_PowerOnBISTFailedMask_MSB   0x36

Definition at line 716 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_PowerOnBISTFailedMask_RMASK   0x1

Definition at line 717 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_SDmaMemReadErrMask_0_LSB   0x1B

Definition at line 739 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_SDmaMemReadErrMask_0_MSB   0x1B

Definition at line 740 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_SDmaMemReadErrMask_0_RMASK   0x1

Definition at line 741 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_SDmaMemReadErrMask_1_LSB   0x1C

Definition at line 736 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_SDmaMemReadErrMask_1_MSB   0x1C

Definition at line 737 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_SDmaMemReadErrMask_1_RMASK   0x1

Definition at line 738 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_statusValidNoEopMask_LSB   0xC

Definition at line 751 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_statusValidNoEopMask_MSB   0xC

Definition at line 752 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_statusValidNoEopMask_RMASK   0x1

Definition at line 753 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_TempsenseTholdReachedMask_LSB   0x35

Definition at line 718 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_TempsenseTholdReachedMask_MSB   0x35

Definition at line 719 of file qib_7322_regs.h.

#define QIB_7322_HwErrMask_TempsenseTholdReachedMask_RMASK   0x1

Definition at line 720 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_DEF   0x0000000000000000

Definition at line 759 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_LSB   0xD

Definition at line 802 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_MSB   0xD

Definition at line 803 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_RMASK   0x1

Definition at line 804 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_LSB   0xF

Definition at line 796 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_MSB   0xF

Definition at line 797 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_RMASK   0x1

Definition at line 798 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_IBCBusToSPCParityErr_1_LSB   0xE

Definition at line 799 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_IBCBusToSPCParityErr_1_MSB   0xE

Definition at line 800 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_IBCBusToSPCParityErr_1_RMASK   0x1

Definition at line 801 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_IBSerdesPClkNotDetect_0_LSB   0x3E

Definition at line 763 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_IBSerdesPClkNotDetect_0_MSB   0x3E

Definition at line 764 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_IBSerdesPClkNotDetect_0_RMASK   0x1

Definition at line 765 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_IBSerdesPClkNotDetect_1_LSB   0x3F

Definition at line 760 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_IBSerdesPClkNotDetect_1_MSB   0x3F

Definition at line 761 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_IBSerdesPClkNotDetect_1_RMASK   0x1

Definition at line 762 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_LATriggered_LSB   0xB

Definition at line 808 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_LATriggered_MSB   0xB

Definition at line 809 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_LATriggered_RMASK   0x1

Definition at line 810 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_MemoryErr_LSB   0x30

Definition at line 775 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_MemoryErr_MSB   0x30

Definition at line 776 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_MemoryErr_RMASK   0x1

Definition at line 777 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_OFFS   0xA0

Definition at line 758 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_pcie_phy_txParityErr_LSB   0x22

Definition at line 778 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_pcie_phy_txParityErr_MSB   0x22

Definition at line 779 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_pcie_phy_txParityErr_RMASK   0x1

Definition at line 780 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_PCIeBusParity_LSB   0x1F

Definition at line 781 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_PCIeBusParity_MSB   0x21

Definition at line 782 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_PCIeBusParity_RMASK   0x7

Definition at line 783 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_PcieCplTimeout_LSB   0x1E

Definition at line 784 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_PcieCplTimeout_MSB   0x1E

Definition at line 785 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_PcieCplTimeout_RMASK   0x1

Definition at line 786 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_PciePoisonedTLP_LSB   0x1D

Definition at line 787 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_PciePoisonedTLP_MSB   0x1D

Definition at line 788 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_PciePoisonedTLP_RMASK   0x1

Definition at line 789 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_PCIESerdesPClkNotDetect_LSB   0x37

Definition at line 766 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_PCIESerdesPClkNotDetect_MSB   0x37

Definition at line 767 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_PCIESerdesPClkNotDetect_RMASK   0x1

Definition at line 768 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_PowerOnBISTFailed_LSB   0x36

Definition at line 769 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_PowerOnBISTFailed_MSB   0x36

Definition at line 770 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_PowerOnBISTFailed_RMASK   0x1

Definition at line 771 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_SDmaMemReadErr_0_LSB   0x1B

Definition at line 793 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_SDmaMemReadErr_0_MSB   0x1B

Definition at line 794 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_SDmaMemReadErr_0_RMASK   0x1

Definition at line 795 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_SDmaMemReadErr_1_LSB   0x1C

Definition at line 790 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_SDmaMemReadErr_1_MSB   0x1C

Definition at line 791 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_SDmaMemReadErr_1_RMASK   0x1

Definition at line 792 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_statusValidNoEop_LSB   0xC

Definition at line 805 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_statusValidNoEop_MSB   0xC

Definition at line 806 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_statusValidNoEop_RMASK   0x1

Definition at line 807 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_TempsenseTholdReached_LSB   0x35

Definition at line 772 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_TempsenseTholdReached_MSB   0x35

Definition at line 773 of file qib_7322_regs.h.

#define QIB_7322_HwErrStatus_TempsenseTholdReached_RMASK   0x1

Definition at line 774 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_DEF   0x0000000000000000

Definition at line 2394 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_OFFS   0x1598

Definition at line 2393 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_TS_3_RX_VALID_LSB   0x1

Definition at line 2407 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_TS_3_RX_VALID_MSB   0x1

Definition at line 2408 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_TS_3_RX_VALID_RMASK   0x1

Definition at line 2409 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_A_LSB   0x10

Definition at line 2404 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_A_MSB   0x17

Definition at line 2405 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_A_RMASK   0xFF

Definition at line 2406 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_B_LSB   0x18

Definition at line 2401 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_B_MSB   0x1F

Definition at line 2402 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_B_RMASK   0xFF

Definition at line 2403 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_RX_CFG_LSB   0x30

Definition at line 2395 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_RX_CFG_MSB   0x3F

Definition at line 2396 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_RX_CFG_RMASK   0xFFFF

Definition at line 2397 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_TX_CFG_LSB   0x20

Definition at line 2398 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_TX_CFG_MSB   0x2F

Definition at line 2399 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_TS_RX_TX_CFG_RMASK   0xFFFF

Definition at line 2400 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_TS_T_RX_VALID_LSB   0x0

Definition at line 2410 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_TS_T_RX_VALID_MSB   0x0

Definition at line 2411 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_RX_0_TS_T_RX_VALID_RMASK   0x1

Definition at line 2412 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_CREDIT_CHANGE_LSB   0x4

Definition at line 2380 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_CREDIT_CHANGE_MSB   0x4

Definition at line 2381 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_CREDIT_CHANGE_RMASK   0x1

Definition at line 2382 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_DEF   0x0000000000000000

Definition at line 2367 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_OFFS   0x1590

Definition at line 2366 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_TS_3_TX_VALID_LSB   0x1

Definition at line 2386 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_TS_3_TX_VALID_MSB   0x1

Definition at line 2387 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_TS_3_TX_VALID_RMASK   0x1

Definition at line 2388 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_TS_T_TX_VALID_LSB   0x0

Definition at line 2389 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_TS_T_TX_VALID_MSB   0x0

Definition at line 2390 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_TS_T_TX_VALID_RMASK   0x1

Definition at line 2391 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_OPCODE_LSB   0xB

Definition at line 2377 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_OPCODE_MSB   0xC

Definition at line 2378 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_OPCODE_RMASK   0x3

Definition at line 2379 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_RX_CFG_LSB   0x30

Definition at line 2368 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_RX_CFG_MSB   0x3F

Definition at line 2369 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_RX_CFG_RMASK   0xFFFF

Definition at line 2370 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_SPEED_LSB   0xD

Definition at line 2374 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_SPEED_MSB   0xF

Definition at line 2375 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_SPEED_RMASK   0x7

Definition at line 2376 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_TX_CFG_LSB   0x20

Definition at line 2371 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_TX_CFG_MSB   0x2F

Definition at line 2372 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_TS_TX_TX_CFG_RMASK   0xFFFF

Definition at line 2373 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_VL_CAP_LSB   0x2

Definition at line 2383 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_VL_CAP_MSB   0x3

Definition at line 2384 of file qib_7322_regs.h.

#define QIB_7322_IB_SDTEST_IF_TX_0_VL_CAP_RMASK   0x3

Definition at line 2385 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_DEF   0x0000000000000000

Definition at line 2256 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_FlowCtrlPeriod_LSB   0x0

Definition at line 2290 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_FlowCtrlPeriod_MSB   0x7

Definition at line 2291 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_FlowCtrlPeriod_RMASK   0xFF

Definition at line 2292 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_FlowCtrlWaterMark_LSB   0x8

Definition at line 2287 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_FlowCtrlWaterMark_MSB   0xF

Definition at line 2288 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_FlowCtrlWaterMark_RMASK   0xFF

Definition at line 2289 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_IBLinkEn_LSB   0x3D

Definition at line 2263 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_IBLinkEn_MSB   0x3D

Definition at line 2264 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_IBLinkEn_RMASK   0x1

Definition at line 2265 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_IBStatIntReductionEn_LSB   0x3C

Definition at line 2266 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_IBStatIntReductionEn_MSB   0x3C

Definition at line 2267 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_IBStatIntReductionEn_RMASK   0x1

Definition at line 2268 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_LinkCmd_LSB   0x13

Definition at line 2281 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_LinkCmd_MSB   0x14

Definition at line 2282 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_LinkCmd_RMASK   0x3

Definition at line 2283 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_LinkDownDefaultState_LSB   0x3E

Definition at line 2260 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_LinkDownDefaultState_MSB   0x3E

Definition at line 2261 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_LinkDownDefaultState_RMASK   0x1

Definition at line 2262 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_LinkInitCmd_LSB   0x10

Definition at line 2284 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_LinkInitCmd_MSB   0x12

Definition at line 2285 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_LinkInitCmd_RMASK   0x7

Definition at line 2286 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_Loopback_LSB   0x3F

Definition at line 2257 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_Loopback_MSB   0x3F

Definition at line 2258 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_Loopback_RMASK   0x1

Definition at line 2259 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_MaxPktLen_LSB   0x15

Definition at line 2278 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_MaxPktLen_MSB   0x1F

Definition at line 2279 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_MaxPktLen_RMASK   0x7FF

Definition at line 2280 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_NumVLane_LSB   0x30

Definition at line 2269 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_NumVLane_MSB   0x32

Definition at line 2270 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_NumVLane_RMASK   0x7

Definition at line 2271 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_OFFS   0x1560

Definition at line 2255 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_OverrunThreshold_LSB   0x24

Definition at line 2272 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_OverrunThreshold_MSB   0x27

Definition at line 2273 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_OverrunThreshold_RMASK   0xF

Definition at line 2274 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_PhyerrThreshold_LSB   0x20

Definition at line 2275 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_PhyerrThreshold_MSB   0x23

Definition at line 2276 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlA_0_PhyerrThreshold_RMASK   0xF

Definition at line 2277 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_DEF   0x00000000000305FF

Definition at line 2295 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_HRTBT_AUTO_LSB   0x11

Definition at line 2311 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_HRTBT_AUTO_MSB   0x11

Definition at line 2312 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_HRTBT_AUTO_RMASK   0x1

Definition at line 2313 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_HRTBT_ENB_LSB   0x10

Definition at line 2314 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_HRTBT_ENB_MSB   0x10

Definition at line 2315 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_HRTBT_ENB_RMASK   0x1

Definition at line 2316 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_HRTBT_PORT_LSB   0x12

Definition at line 2308 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_HRTBT_PORT_MSB   0x19

Definition at line 2309 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_HRTBT_PORT_RMASK   0xFF

Definition at line 2310 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_HRTBT_REQ_LSB   0x1A

Definition at line 2305 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_HRTBT_REQ_MSB   0x1A

Definition at line 2306 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_HRTBT_REQ_RMASK   0x1

Definition at line 2307 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_DLID_LSB   0x20

Definition at line 2299 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_DLID_MASK_LSB   0x30

Definition at line 2296 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_DLID_MASK_MSB   0x3F

Definition at line 2297 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_DLID_MASK_RMASK   0xFFFF

Definition at line 2298 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_DLID_MSB   0x2F

Definition at line 2300 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_DLID_RMASK   0xFFFF

Definition at line 2301 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_ENABLE_FILT_DPKT_LSB   0x1B

Definition at line 2302 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_ENABLE_FILT_DPKT_MSB   0x1B

Definition at line 2303 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_ENABLE_FILT_DPKT_RMASK   0x1

Definition at line 2304 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_ENHANCED_MODE_LSB   0x0

Definition at line 2350 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_ENHANCED_MODE_MSB   0x0

Definition at line 2351 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_ENHANCED_MODE_RMASK   0x1

Definition at line 2352 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_LANE_REV_SUPPORTED_LSB   0x8

Definition at line 2329 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_LANE_REV_SUPPORTED_MSB   0x8

Definition at line 2330 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_LANE_REV_SUPPORTED_RMASK   0x1

Definition at line 2331 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_NUM_CHANNELS_LSB   0x5

Definition at line 2335 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_NUM_CHANNELS_MSB   0x6

Definition at line 2336 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_NUM_CHANNELS_RMASK   0x3

Definition at line 2337 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_POLARITY_REV_SUPP_LSB   0x7

Definition at line 2332 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_POLARITY_REV_SUPP_MSB   0x7

Definition at line 2333 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_IB_POLARITY_REV_SUPP_RMASK   0x1

Definition at line 2334 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_OFFS   0x1568

Definition at line 2294 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_ADD_ENB_LSB   0xA

Definition at line 2323 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_ADD_ENB_MSB   0xA

Definition at line 2324 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_ADD_ENB_RMASK   0x1

Definition at line 2325 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_DDS_LSB   0xC

Definition at line 2317 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_DDS_MSB   0xF

Definition at line 2318 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_DDS_RMASK   0xF

Definition at line 2319 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_DDSV_LSB   0xB

Definition at line 2320 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_DDSV_MSB   0xB

Definition at line 2321 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_DDSV_RMASK   0x1

Definition at line 2322 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_RX_EQUAL_ENABLE_LSB   0x9

Definition at line 2326 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_RX_EQUAL_ENABLE_MSB   0x9

Definition at line 2327 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_RX_EQUAL_ENABLE_RMASK   0x1

Definition at line 2328 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_SPEED_DDR_LSB   0x3

Definition at line 2341 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_SPEED_DDR_MSB   0x3

Definition at line 2342 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_SPEED_DDR_RMASK   0x1

Definition at line 2343 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_SPEED_LSB   0x1

Definition at line 2347 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_SPEED_MSB   0x1

Definition at line 2348 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_SPEED_QDR_LSB   0x4

Definition at line 2338 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_SPEED_QDR_MSB   0x4

Definition at line 2339 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_SPEED_QDR_RMASK   0x1

Definition at line 2340 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_SPEED_RMASK   0x1

Definition at line 2349 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_SPEED_SDR_LSB   0x2

Definition at line 2344 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_SPEED_SDR_MSB   0x2

Definition at line 2345 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlB_0_SD_SPEED_SDR_RMASK   0x1

Definition at line 2346 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlC_0_DEF   0x0000000000000301

Definition at line 2355 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlC_0_IB_BACK_PORCH_LSB   0x5

Definition at line 2356 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlC_0_IB_BACK_PORCH_MSB   0x9

Definition at line 2357 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlC_0_IB_BACK_PORCH_RMASK   0x1F

Definition at line 2358 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlC_0_IB_FRONT_PORCH_LSB   0x0

Definition at line 2359 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlC_0_IB_FRONT_PORCH_MSB   0x4

Definition at line 2360 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlC_0_IB_FRONT_PORCH_RMASK   0x1F

Definition at line 2361 of file qib_7322_regs.h.

#define QIB_7322_IBCCtrlC_0_OFFS   0x1570

Definition at line 2354 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_DDS_RXEQ_FAIL_LSB   0xA

Definition at line 2212 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_DDS_RXEQ_FAIL_MSB   0xA

Definition at line 2213 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_DDS_RXEQ_FAIL_RMASK   0x1

Definition at line 2214 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_DEF   0x0000000000000X02

Definition at line 2169 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_IBRxLaneReversed_LSB   0xC

Definition at line 2209 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_IBRxLaneReversed_MSB   0xC

Definition at line 2210 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_IBRxLaneReversed_RMASK   0x1

Definition at line 2211 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_IBTxLaneReversed_LSB   0xD

Definition at line 2206 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_IBTxLaneReversed_MSB   0xD

Definition at line 2207 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_IBTxLaneReversed_RMASK   0x1

Definition at line 2208 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_LinkSpeedActive_LSB   0x8

Definition at line 2218 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_LinkSpeedActive_MSB   0x8

Definition at line 2219 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_LinkSpeedActive_RMASK   0x1

Definition at line 2220 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_LinkSpeedQDR_LSB   0x1D

Definition at line 2197 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_LinkSpeedQDR_MSB   0x1D

Definition at line 2198 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_LinkSpeedQDR_RMASK   0x1

Definition at line 2199 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_LinkState_LSB   0x5

Definition at line 2221 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_LinkState_MSB   0x7

Definition at line 2222 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_LinkState_RMASK   0x7

Definition at line 2223 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_LinkTrainingState_LSB   0x0

Definition at line 2224 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_LinkTrainingState_MSB   0x4

Definition at line 2225 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_LinkTrainingState_RMASK   0x1F

Definition at line 2226 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_LinkWidthActive_LSB   0x9

Definition at line 2215 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_LinkWidthActive_MSB   0x9

Definition at line 2216 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_LinkWidthActive_RMASK   0x1

Definition at line 2217 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_OFFS   0x1540

Definition at line 2168 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_ScrambleCapRemote_LSB   0xF

Definition at line 2200 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_ScrambleCapRemote_MSB   0xF

Definition at line 2201 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_ScrambleCapRemote_RMASK   0x1

Definition at line 2202 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_ScrambleEn_LSB   0xE

Definition at line 2203 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_ScrambleEn_MSB   0xE

Definition at line 2204 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_ScrambleEn_RMASK   0x1

Definition at line 2205 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL0_LSB   0x20

Definition at line 2191 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL0_MSB   0x20

Definition at line 2192 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL0_RMASK   0x1

Definition at line 2193 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL1_LSB   0x21

Definition at line 2188 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL1_MSB   0x21

Definition at line 2189 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL1_RMASK   0x1

Definition at line 2190 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL2_LSB   0x22

Definition at line 2185 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL2_MSB   0x22

Definition at line 2186 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL2_RMASK   0x1

Definition at line 2187 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL3_LSB   0x23

Definition at line 2182 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL3_MSB   0x23

Definition at line 2183 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL3_RMASK   0x1

Definition at line 2184 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL4_LSB   0x24

Definition at line 2179 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL4_MSB   0x24

Definition at line 2180 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL4_RMASK   0x1

Definition at line 2181 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL5_LSB   0x25

Definition at line 2176 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL5_MSB   0x25

Definition at line 2177 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL5_RMASK   0x1

Definition at line 2178 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL6_LSB   0x26

Definition at line 2173 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL6_MSB   0x26

Definition at line 2174 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL6_RMASK   0x1

Definition at line 2175 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL7_LSB   0x27

Definition at line 2170 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL7_MSB   0x27

Definition at line 2171 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxCreditOk_VL7_RMASK   0x1

Definition at line 2172 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxReady_LSB   0x1E

Definition at line 2194 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxReady_MSB   0x1E

Definition at line 2195 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusA_0_TxReady_RMASK   0x1

Definition at line 2196 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_DEF   0x00000000XXXXXXXX

Definition at line 2229 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_heartbeat_crosstalk_LSB   0x20

Definition at line 2242 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_heartbeat_crosstalk_MSB   0x23

Definition at line 2243 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_heartbeat_crosstalk_RMASK   0xF

Definition at line 2244 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_heartbeat_timed_out_LSB   0x24

Definition at line 2239 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_heartbeat_timed_out_MSB   0x24

Definition at line 2240 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_heartbeat_timed_out_RMASK   0x1

Definition at line 2241 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_ibsd_adaptation_timer_debug_LSB   0x27

Definition at line 2230 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_ibsd_adaptation_timer_debug_MSB   0x27

Definition at line 2231 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_ibsd_adaptation_timer_debug_RMASK   0x1

Definition at line 2232 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_ibsd_adaptation_timer_reached_threshold_LSB   0x26

Definition at line 2233 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_ibsd_adaptation_timer_reached_threshold_MSB   0x26

Definition at line 2234 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_ibsd_adaptation_timer_reached_threshold_RMASK   0x1

Definition at line 2235 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_ibsd_adaptation_timer_started_LSB   0x25

Definition at line 2236 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_ibsd_adaptation_timer_started_MSB   0x25

Definition at line 2237 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_ibsd_adaptation_timer_started_RMASK   0x1

Definition at line 2238 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_LinkRoundTripLatency_LSB   0x0

Definition at line 2251 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_LinkRoundTripLatency_MSB   0x19

Definition at line 2252 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_LinkRoundTripLatency_RMASK   0x3FFFFFF

Definition at line 2253 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_OFFS   0x1548

Definition at line 2228 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_ReqDDSLocalFromRmt_LSB   0x1A

Definition at line 2248 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_ReqDDSLocalFromRmt_MSB   0x1D

Definition at line 2249 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_ReqDDSLocalFromRmt_RMASK   0xF

Definition at line 2250 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_RxEqLocalDevice_LSB   0x1E

Definition at line 2245 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_RxEqLocalDevice_MSB   0x1F

Definition at line 2246 of file qib_7322_regs.h.

#define QIB_7322_IBCStatusB_0_RxEqLocalDevice_RMASK   0x3

Definition at line 2247 of file qib_7322_regs.h.

#define QIB_7322_IBLinkDownedCnt_0_DEF   0x0000000000000000

Definition at line 2914 of file qib_7322_regs.h.

#define QIB_7322_IBLinkDownedCnt_0_OFFS   0x12180

Definition at line 2913 of file qib_7322_regs.h.

#define QIB_7322_IBLinkDownedCnt_1_DEF   0x0000000000000000

Definition at line 3049 of file qib_7322_regs.h.

#define QIB_7322_IBLinkDownedCnt_1_OFFS   0x13180

Definition at line 3048 of file qib_7322_regs.h.

#define QIB_7322_IBLinkErrRecoveryCnt_0_DEF   0x0000000000000000

Definition at line 2923 of file qib_7322_regs.h.

#define QIB_7322_IBLinkErrRecoveryCnt_0_OFFS   0x12198

Definition at line 2922 of file qib_7322_regs.h.

#define QIB_7322_IBLinkErrRecoveryCnt_1_DEF   0x0000000000000000

Definition at line 3058 of file qib_7322_regs.h.

#define QIB_7322_IBLinkErrRecoveryCnt_1_OFFS   0x13198

Definition at line 3057 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_DEF   0x0000000000000000

Definition at line 2415 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_OFFS   0x15B8

Definition at line 2414 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_ScrambleCapLocal_LSB   0x20

Definition at line 2422 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_ScrambleCapLocal_MSB   0x20

Definition at line 2423 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_ScrambleCapLocal_RMASK   0x1

Definition at line 2424 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_ScrambleCapRemoteForce_LSB   0x22

Definition at line 2416 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_ScrambleCapRemoteForce_MSB   0x22

Definition at line 2417 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_ScrambleCapRemoteForce_RMASK   0x1

Definition at line 2418 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_ScrambleCapRemoteMask_LSB   0x21

Definition at line 2419 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_ScrambleCapRemoteMask_MSB   0x21

Definition at line 2420 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_ScrambleCapRemoteMask_RMASK   0x1

Definition at line 2421 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_TSMCode_TS1_LSB   0x8

Definition at line 2428 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_TSMCode_TS1_MSB   0x10

Definition at line 2429 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_TSMCode_TS1_RMASK   0x1FF

Definition at line 2430 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_TSMCode_TS2_LSB   0x11

Definition at line 2425 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_TSMCode_TS2_MSB   0x19

Definition at line 2426 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_TSMCode_TS2_RMASK   0x1FF

Definition at line 2427 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_TSMEnable_ignore_TSM_on_rx_LSB   0x2

Definition at line 2431 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_TSMEnable_ignore_TSM_on_rx_MSB   0x2

Definition at line 2432 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_TSMEnable_ignore_TSM_on_rx_RMASK   0x1

Definition at line 2433 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_TSMEnable_send_TS1_LSB   0x0

Definition at line 2437 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_TSMEnable_send_TS1_MSB   0x0

Definition at line 2438 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_TSMEnable_send_TS1_RMASK   0x1

Definition at line 2439 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_TSMEnable_send_TS2_LSB   0x1

Definition at line 2434 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_TSMEnable_send_TS2_MSB   0x1

Definition at line 2435 of file qib_7322_regs.h.

#define QIB_7322_IBNCModeCtrl_0_TSMEnable_send_TS2_RMASK   0x1

Definition at line 2436 of file qib_7322_regs.h.

#define QIB_7322_IBPCSConfig_0_DEF   0x0000000000000007

Definition at line 2445 of file qib_7322_regs.h.

#define QIB_7322_IBPCSConfig_0_link_sync_mask_LSB   0x9

Definition at line 2446 of file qib_7322_regs.h.

#define QIB_7322_IBPCSConfig_0_link_sync_mask_MSB   0x12

Definition at line 2447 of file qib_7322_regs.h.

#define QIB_7322_IBPCSConfig_0_link_sync_mask_RMASK   0x3FF

Definition at line 2448 of file qib_7322_regs.h.

#define QIB_7322_IBPCSConfig_0_OFFS   0x15D8

Definition at line 2444 of file qib_7322_regs.h.

#define QIB_7322_IBPCSConfig_0_tx_rx_reset_LSB   0x0

Definition at line 2455 of file qib_7322_regs.h.

#define QIB_7322_IBPCSConfig_0_tx_rx_reset_MSB   0x0

Definition at line 2456 of file qib_7322_regs.h.

#define QIB_7322_IBPCSConfig_0_tx_rx_reset_RMASK   0x1

Definition at line 2457 of file qib_7322_regs.h.

#define QIB_7322_IBPCSConfig_0_xcv_rreset_LSB   0x2

Definition at line 2449 of file qib_7322_regs.h.

#define QIB_7322_IBPCSConfig_0_xcv_rreset_MSB   0x2

Definition at line 2450 of file qib_7322_regs.h.

#define QIB_7322_IBPCSConfig_0_xcv_rreset_RMASK   0x1

Definition at line 2451 of file qib_7322_regs.h.

#define QIB_7322_IBPCSConfig_0_xcv_treset_LSB   0x1

Definition at line 2452 of file qib_7322_regs.h.

#define QIB_7322_IBPCSConfig_0_xcv_treset_MSB   0x1

Definition at line 2453 of file qib_7322_regs.h.

#define QIB_7322_IBPCSConfig_0_xcv_treset_RMASK   0x1

Definition at line 2454 of file qib_7322_regs.h.

#define QIB_7322_IBSD_DDS_MAP_TABLE_0_DEF   0x0000000000000000

Definition at line 3118 of file qib_7322_regs.h.

#define QIB_7322_IBSD_DDS_MAP_TABLE_0_OFFS   0xD0000

Definition at line 3117 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_DEF   0x0000000000000000

Definition at line 2502 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_OFFS   0x1600

Definition at line 2501 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_reset_tx_deemphasis_override_LSB   0x1E

Definition at line 2506 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_reset_tx_deemphasis_override_MSB   0x1E

Definition at line 2507 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_reset_tx_deemphasis_override_RMASK   0x1

Definition at line 2508 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_tx_override_deemphasis_select_LSB   0x1F

Definition at line 2503 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_tx_override_deemphasis_select_MSB   0x1F

Definition at line 2504 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_tx_override_deemphasis_select_RMASK   0x1

Definition at line 2505 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txampcntl_d2a_LSB   0xE

Definition at line 2509 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txampcntl_d2a_MSB   0x11

Definition at line 2510 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txampcntl_d2a_RMASK   0xF

Definition at line 2511 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txc0_ena_LSB   0x9

Definition at line 2512 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txc0_ena_MSB   0xD

Definition at line 2513 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txc0_ena_RMASK   0x1F

Definition at line 2514 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txcn1_ena_LSB   0x0

Definition at line 2521 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txcn1_ena_MSB   0x2

Definition at line 2522 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txcn1_ena_RMASK   0x7

Definition at line 2523 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txcn1_xtra_emph0_LSB   0x3

Definition at line 2518 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txcn1_xtra_emph0_MSB   0x4

Definition at line 2519 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txcn1_xtra_emph0_RMASK   0x3

Definition at line 2520 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txcp1_ena_LSB   0x5

Definition at line 2515 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txcp1_ena_MSB   0x8

Definition at line 2516 of file qib_7322_regs.h.

#define QIB_7322_IBSD_TX_DEEMPHASIS_OVERRIDE_0_txcp1_ena_RMASK   0xF

Definition at line 2517 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_CGMODE_LSB   0x10

Definition at line 2473 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_CGMODE_MSB   0x13

Definition at line 2474 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_CGMODE_RMASK   0xF

Definition at line 2475 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_CHANNEL_RESET_N_LSB   0x14

Definition at line 2470 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_CHANNEL_RESET_N_MSB   0x17

Definition at line 2471 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_CHANNEL_RESET_N_RMASK   0xF

Definition at line 2472 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_CMODE_LSB   0x0

Definition at line 2497 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_CMODE_MSB   0x6

Definition at line 2498 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_CMODE_RMASK   0x7F

Definition at line 2499 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_DEF   0x0000000000FFA00F

Definition at line 2460 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_DISABLE_RXLATOFF_DDR_LSB   0x19

Definition at line 2464 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_DISABLE_RXLATOFF_DDR_MSB   0x19

Definition at line 2465 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_DISABLE_RXLATOFF_DDR_RMASK   0x1

Definition at line 2466 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_DISABLE_RXLATOFF_QDR_LSB   0x1A

Definition at line 2461 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_DISABLE_RXLATOFF_QDR_MSB   0x1A

Definition at line 2462 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_DISABLE_RXLATOFF_QDR_RMASK   0x1

Definition at line 2463 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_DISABLE_RXLATOFF_SDR_LSB   0x18

Definition at line 2467 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_DISABLE_RXLATOFF_SDR_MSB   0x18

Definition at line 2468 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_DISABLE_RXLATOFF_SDR_RMASK   0x1

Definition at line 2469 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_IB_LAT_MODE_LSB   0xF

Definition at line 2476 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_IB_LAT_MODE_MSB   0xF

Definition at line 2477 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_IB_LAT_MODE_RMASK   0x1

Definition at line 2478 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_LPEN_LSB   0xC

Definition at line 2482 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_LPEN_MSB   0xC

Definition at line 2483 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_LPEN_RMASK   0x1

Definition at line 2484 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_OFFS   0x15E0

Definition at line 2459 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_PLLPD_LSB   0xB

Definition at line 2485 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_PLLPD_MSB   0xB

Definition at line 2486 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_PLLPD_RMASK   0x1

Definition at line 2487 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_RXLOSEN_LSB   0xD

Definition at line 2479 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_RXLOSEN_MSB   0xD

Definition at line 2480 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_RXLOSEN_RMASK   0x1

Definition at line 2481 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_RXPD_LSB   0x9

Definition at line 2491 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_RXPD_MSB   0x9

Definition at line 2492 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_RXPD_RMASK   0x1

Definition at line 2493 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_TXIDLE_LSB   0x8

Definition at line 2494 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_TXIDLE_MSB   0x8

Definition at line 2495 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_TXIDLE_RMASK   0x1

Definition at line 2496 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_TXPD_LSB   0xA

Definition at line 2488 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_TXPD_MSB   0xA

Definition at line 2489 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesCtrl_0_TXPD_RMASK   0x1

Definition at line 2490 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesStatus_0_DEF   0x0000000000000000

Definition at line 2442 of file qib_7322_regs.h.

#define QIB_7322_IBSerdesStatus_0_OFFS   0x15D0

Definition at line 2441 of file qib_7322_regs.h.

#define QIB_7322_IBStatusChangeCnt_0_DEF   0x0000000000000000

Definition at line 2920 of file qib_7322_regs.h.

#define QIB_7322_IBStatusChangeCnt_0_OFFS   0x12190

Definition at line 2919 of file qib_7322_regs.h.

#define QIB_7322_IBStatusChangeCnt_1_DEF   0x0000000000000000

Definition at line 3055 of file qib_7322_regs.h.

#define QIB_7322_IBStatusChangeCnt_1_OFFS   0x13190

Definition at line 3054 of file qib_7322_regs.h.

#define QIB_7322_IBSymbolErrCnt_0_DEF   0x0000000000000000

Definition at line 2917 of file qib_7322_regs.h.

#define QIB_7322_IBSymbolErrCnt_0_OFFS   0x12188

Definition at line 2916 of file qib_7322_regs.h.

#define QIB_7322_IBSymbolErrCnt_1_DEF   0x0000000000000000

Definition at line 3052 of file qib_7322_regs.h.

#define QIB_7322_IBSymbolErrCnt_1_OFFS   0x13188

Definition at line 3051 of file qib_7322_regs.h.

#define QIB_7322_Int_Granted_DEF   0x0000000000000000

Definition at line 1206 of file qib_7322_regs.h.

#define QIB_7322_Int_Granted_OFFS   0x570

Definition at line 1205 of file qib_7322_regs.h.

#define QIB_7322_IntClear_AssertGPIOIntClear_LSB   0x1C

Definition at line 502 of file qib_7322_regs.h.

#define QIB_7322_IntClear_AssertGPIOIntClear_MSB   0x1C

Definition at line 503 of file qib_7322_regs.h.

#define QIB_7322_IntClear_AssertGPIOIntClear_RMASK   0x1

Definition at line 504 of file qib_7322_regs.h.

#define QIB_7322_IntClear_DEF   0x0000000000000000

Definition at line 414 of file qib_7322_regs.h.

#define QIB_7322_IntClear_ErrIntClear_0_LSB   0x1E

Definition at line 496 of file qib_7322_regs.h.

#define QIB_7322_IntClear_ErrIntClear_0_MSB   0x1E

Definition at line 497 of file qib_7322_regs.h.

#define QIB_7322_IntClear_ErrIntClear_0_RMASK   0x1

Definition at line 498 of file qib_7322_regs.h.

#define QIB_7322_IntClear_ErrIntClear_1_LSB   0x1F

Definition at line 493 of file qib_7322_regs.h.

#define QIB_7322_IntClear_ErrIntClear_1_MSB   0x1F

Definition at line 494 of file qib_7322_regs.h.

#define QIB_7322_IntClear_ErrIntClear_1_RMASK   0x1

Definition at line 495 of file qib_7322_regs.h.

#define QIB_7322_IntClear_ErrIntClear_LSB   0x1D

Definition at line 499 of file qib_7322_regs.h.

#define QIB_7322_IntClear_ErrIntClear_MSB   0x1D

Definition at line 500 of file qib_7322_regs.h.

#define QIB_7322_IntClear_ErrIntClear_RMASK   0x1

Definition at line 501 of file qib_7322_regs.h.

#define QIB_7322_IntClear_OFFS   0x78

Definition at line 413 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail0IntClear_LSB   0x0

Definition at line 565 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail0IntClear_MSB   0x0

Definition at line 566 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail0IntClear_RMASK   0x1

Definition at line 567 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail10IntClear_LSB   0xA

Definition at line 535 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail10IntClear_MSB   0xA

Definition at line 536 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail10IntClear_RMASK   0x1

Definition at line 537 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail11IntClear_LSB   0xB

Definition at line 532 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail11IntClear_MSB   0xB

Definition at line 533 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail11IntClear_RMASK   0x1

Definition at line 534 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail12IntClear_LSB   0xC

Definition at line 529 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail12IntClear_MSB   0xC

Definition at line 530 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail12IntClear_RMASK   0x1

Definition at line 531 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail13IntClear_LSB   0xD

Definition at line 526 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail13IntClear_MSB   0xD

Definition at line 527 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail13IntClear_RMASK   0x1

Definition at line 528 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail14IntClear_LSB   0xE

Definition at line 523 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail14IntClear_MSB   0xE

Definition at line 524 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail14IntClear_RMASK   0x1

Definition at line 525 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail15IntClear_LSB   0xF

Definition at line 520 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail15IntClear_MSB   0xF

Definition at line 521 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail15IntClear_RMASK   0x1

Definition at line 522 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail16IntClear_LSB   0x10

Definition at line 517 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail16IntClear_MSB   0x10

Definition at line 518 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail16IntClear_RMASK   0x1

Definition at line 519 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail17IntClear_LSB   0x11

Definition at line 514 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail17IntClear_MSB   0x11

Definition at line 515 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail17IntClear_RMASK   0x1

Definition at line 516 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail1IntClear_LSB   0x1

Definition at line 562 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail1IntClear_MSB   0x1

Definition at line 563 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail1IntClear_RMASK   0x1

Definition at line 564 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail2IntClear_LSB   0x2

Definition at line 559 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail2IntClear_MSB   0x2

Definition at line 560 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail2IntClear_RMASK   0x1

Definition at line 561 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail3IntClear_LSB   0x3

Definition at line 556 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail3IntClear_MSB   0x3

Definition at line 557 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail3IntClear_RMASK   0x1

Definition at line 558 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail4IntClear_LSB   0x4

Definition at line 553 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail4IntClear_MSB   0x4

Definition at line 554 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail4IntClear_RMASK   0x1

Definition at line 555 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail5IntClear_LSB   0x5

Definition at line 550 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail5IntClear_MSB   0x5

Definition at line 551 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail5IntClear_RMASK   0x1

Definition at line 552 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail6IntClear_LSB   0x6

Definition at line 547 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail6IntClear_MSB   0x6

Definition at line 548 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail6IntClear_RMASK   0x1

Definition at line 549 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail7IntClear_LSB   0x7

Definition at line 544 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail7IntClear_MSB   0x7

Definition at line 545 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail7IntClear_RMASK   0x1

Definition at line 546 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail8IntClear_LSB   0x8

Definition at line 541 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail8IntClear_MSB   0x8

Definition at line 542 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail8IntClear_RMASK   0x1

Definition at line 543 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail9IntClear_LSB   0x9

Definition at line 538 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail9IntClear_MSB   0x9

Definition at line 539 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvAvail9IntClear_RMASK   0x1

Definition at line 540 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg0IntClear_LSB   0x20

Definition at line 490 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg0IntClear_MSB   0x20

Definition at line 491 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg0IntClear_RMASK   0x1

Definition at line 492 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg10IntClear_LSB   0x2A

Definition at line 460 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg10IntClear_MSB   0x2A

Definition at line 461 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg10IntClear_RMASK   0x1

Definition at line 462 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg11IntClear_LSB   0x2B

Definition at line 457 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg11IntClear_MSB   0x2B

Definition at line 458 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg11IntClear_RMASK   0x1

Definition at line 459 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg12IntClear_LSB   0x2C

Definition at line 454 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg12IntClear_MSB   0x2C

Definition at line 455 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg12IntClear_RMASK   0x1

Definition at line 456 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg13IntClear_LSB   0x2D

Definition at line 451 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg13IntClear_MSB   0x2D

Definition at line 452 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg13IntClear_RMASK   0x1

Definition at line 453 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg14IntClear_LSB   0x2E

Definition at line 448 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg14IntClear_MSB   0x2E

Definition at line 449 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg14IntClear_RMASK   0x1

Definition at line 450 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg15IntClear_LSB   0x2F

Definition at line 445 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg15IntClear_MSB   0x2F

Definition at line 446 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg15IntClear_RMASK   0x1

Definition at line 447 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg16IntClear_LSB   0x30

Definition at line 442 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg16IntClear_MSB   0x30

Definition at line 443 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg16IntClear_RMASK   0x1

Definition at line 444 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg17IntClear_LSB   0x31

Definition at line 439 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg17IntClear_MSB   0x31

Definition at line 440 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg17IntClear_RMASK   0x1

Definition at line 441 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg1IntClear_LSB   0x21

Definition at line 487 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg1IntClear_MSB   0x21

Definition at line 488 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg1IntClear_RMASK   0x1

Definition at line 489 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg2IntClear_LSB   0x22

Definition at line 484 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg2IntClear_MSB   0x22

Definition at line 485 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg2IntClear_RMASK   0x1

Definition at line 486 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg3IntClear_LSB   0x23

Definition at line 481 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg3IntClear_MSB   0x23

Definition at line 482 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg3IntClear_RMASK   0x1

Definition at line 483 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg4IntClear_LSB   0x24

Definition at line 478 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg4IntClear_MSB   0x24

Definition at line 479 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg4IntClear_RMASK   0x1

Definition at line 480 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg5IntClear_LSB   0x25

Definition at line 475 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg5IntClear_MSB   0x25

Definition at line 476 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg5IntClear_RMASK   0x1

Definition at line 477 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg6IntClear_LSB   0x26

Definition at line 472 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg6IntClear_MSB   0x26

Definition at line 473 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg6IntClear_RMASK   0x1

Definition at line 474 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg7IntClear_LSB   0x27

Definition at line 469 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg7IntClear_MSB   0x27

Definition at line 470 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg7IntClear_RMASK   0x1

Definition at line 471 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg8IntClear_LSB   0x28

Definition at line 466 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg8IntClear_MSB   0x28

Definition at line 467 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg8IntClear_RMASK   0x1

Definition at line 468 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg9IntClear_LSB   0x29

Definition at line 463 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg9IntClear_MSB   0x29

Definition at line 464 of file qib_7322_regs.h.

#define QIB_7322_IntClear_RcvUrg9IntClear_RMASK   0x1

Definition at line 465 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaCleanupDoneClear_0_LSB   0x38

Definition at line 436 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaCleanupDoneClear_0_MSB   0x38

Definition at line 437 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaCleanupDoneClear_0_RMASK   0x1

Definition at line 438 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaCleanupDoneClear_1_LSB   0x39

Definition at line 433 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaCleanupDoneClear_1_MSB   0x39

Definition at line 434 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaCleanupDoneClear_1_RMASK   0x1

Definition at line 435 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaIdleIntClear_0_LSB   0x3A

Definition at line 430 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaIdleIntClear_0_MSB   0x3A

Definition at line 431 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaIdleIntClear_0_RMASK   0x1

Definition at line 432 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaIdleIntClear_1_LSB   0x3B

Definition at line 427 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaIdleIntClear_1_MSB   0x3B

Definition at line 428 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaIdleIntClear_1_RMASK   0x1

Definition at line 429 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaIntClear_0_LSB   0x3E

Definition at line 418 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaIntClear_0_MSB   0x3E

Definition at line 419 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaIntClear_0_RMASK   0x1

Definition at line 420 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaIntClear_1_LSB   0x3F

Definition at line 415 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaIntClear_1_MSB   0x3F

Definition at line 416 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaIntClear_1_RMASK   0x1

Definition at line 417 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaProgressIntClear_0_LSB   0x3C

Definition at line 424 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaProgressIntClear_0_MSB   0x3C

Definition at line 425 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaProgressIntClear_0_RMASK   0x1

Definition at line 426 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaProgressIntClear_1_LSB   0x3D

Definition at line 421 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaProgressIntClear_1_MSB   0x3D

Definition at line 422 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SDmaProgressIntClear_1_RMASK   0x1

Definition at line 423 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SendBufAvailIntClear_LSB   0x17

Definition at line 511 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SendBufAvailIntClear_MSB   0x17

Definition at line 512 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SendBufAvailIntClear_RMASK   0x1

Definition at line 513 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SendDoneIntClear_0_LSB   0x18

Definition at line 508 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SendDoneIntClear_0_MSB   0x18

Definition at line 509 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SendDoneIntClear_0_RMASK   0x1

Definition at line 510 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SendDoneIntClear_1_LSB   0x19

Definition at line 505 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SendDoneIntClear_1_MSB   0x19

Definition at line 506 of file qib_7322_regs.h.

#define QIB_7322_IntClear_SendDoneIntClear_1_RMASK   0x1

Definition at line 507 of file qib_7322_regs.h.

#define QIB_7322_IntMask_AssertGPIOIntMask_LSB   0x1C

Definition at line 190 of file qib_7322_regs.h.

#define QIB_7322_IntMask_AssertGPIOIntMask_MSB   0x1C

Definition at line 191 of file qib_7322_regs.h.

#define QIB_7322_IntMask_AssertGPIOIntMask_RMASK   0x1

Definition at line 192 of file qib_7322_regs.h.

#define QIB_7322_IntMask_DEF   0x0000000000000000

Definition at line 102 of file qib_7322_regs.h.

#define QIB_7322_IntMask_ErrIntMask_0_LSB   0x1E

Definition at line 184 of file qib_7322_regs.h.

#define QIB_7322_IntMask_ErrIntMask_0_MSB   0x1E

Definition at line 185 of file qib_7322_regs.h.

#define QIB_7322_IntMask_ErrIntMask_0_RMASK   0x1

Definition at line 186 of file qib_7322_regs.h.

#define QIB_7322_IntMask_ErrIntMask_1_LSB   0x1F

Definition at line 181 of file qib_7322_regs.h.

#define QIB_7322_IntMask_ErrIntMask_1_MSB   0x1F

Definition at line 182 of file qib_7322_regs.h.

#define QIB_7322_IntMask_ErrIntMask_1_RMASK   0x1

Definition at line 183 of file qib_7322_regs.h.

#define QIB_7322_IntMask_ErrIntMask_LSB   0x1D

Definition at line 187 of file qib_7322_regs.h.

#define QIB_7322_IntMask_ErrIntMask_MSB   0x1D

Definition at line 188 of file qib_7322_regs.h.

#define QIB_7322_IntMask_ErrIntMask_RMASK   0x1

Definition at line 189 of file qib_7322_regs.h.

#define QIB_7322_IntMask_OFFS   0x68

Definition at line 101 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail0IntMask_LSB   0x0

Definition at line 253 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail0IntMask_MSB   0x0

Definition at line 254 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail0IntMask_RMASK   0x1

Definition at line 255 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail10IntMask_LSB   0xA

Definition at line 223 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail10IntMask_MSB   0xA

Definition at line 224 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail10IntMask_RMASK   0x1

Definition at line 225 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail11IntMask_LSB   0xB

Definition at line 220 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail11IntMask_MSB   0xB

Definition at line 221 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail11IntMask_RMASK   0x1

Definition at line 222 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail12IntMask_LSB   0xC

Definition at line 217 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail12IntMask_MSB   0xC

Definition at line 218 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail12IntMask_RMASK   0x1

Definition at line 219 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail13IntMask_LSB   0xD

Definition at line 214 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail13IntMask_MSB   0xD

Definition at line 215 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail13IntMask_RMASK   0x1

Definition at line 216 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail14IntMask_LSB   0xE

Definition at line 211 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail14IntMask_MSB   0xE

Definition at line 212 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail14IntMask_RMASK   0x1

Definition at line 213 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail15IntMask_LSB   0xF

Definition at line 208 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail15IntMask_MSB   0xF

Definition at line 209 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail15IntMask_RMASK   0x1

Definition at line 210 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail16IntMask_LSB   0x10

Definition at line 205 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail16IntMask_MSB   0x10

Definition at line 206 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail16IntMask_RMASK   0x1

Definition at line 207 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail17IntMask_LSB   0x11

Definition at line 202 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail17IntMask_MSB   0x11

Definition at line 203 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail17IntMask_RMASK   0x1

Definition at line 204 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail1IntMask_LSB   0x1

Definition at line 250 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail1IntMask_MSB   0x1

Definition at line 251 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail1IntMask_RMASK   0x1

Definition at line 252 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail2IntMask_LSB   0x2

Definition at line 247 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail2IntMask_MSB   0x2

Definition at line 248 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail2IntMask_RMASK   0x1

Definition at line 249 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail3IntMask_LSB   0x3

Definition at line 244 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail3IntMask_MSB   0x3

Definition at line 245 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail3IntMask_RMASK   0x1

Definition at line 246 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail4IntMask_LSB   0x4

Definition at line 241 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail4IntMask_MSB   0x4

Definition at line 242 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail4IntMask_RMASK   0x1

Definition at line 243 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail5IntMask_LSB   0x5

Definition at line 238 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail5IntMask_MSB   0x5

Definition at line 239 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail5IntMask_RMASK   0x1

Definition at line 240 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail6IntMask_LSB   0x6

Definition at line 235 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail6IntMask_MSB   0x6

Definition at line 236 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail6IntMask_RMASK   0x1

Definition at line 237 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail7IntMask_LSB   0x7

Definition at line 232 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail7IntMask_MSB   0x7

Definition at line 233 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail7IntMask_RMASK   0x1

Definition at line 234 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail8IntMask_LSB   0x8

Definition at line 229 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail8IntMask_MSB   0x8

Definition at line 230 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail8IntMask_RMASK   0x1

Definition at line 231 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail9IntMask_LSB   0x9

Definition at line 226 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail9IntMask_MSB   0x9

Definition at line 227 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvAvail9IntMask_RMASK   0x1

Definition at line 228 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg0IntMask_LSB   0x20

Definition at line 178 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg0IntMask_MSB   0x20

Definition at line 179 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg0IntMask_RMASK   0x1

Definition at line 180 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg10IntMask_LSB   0x2A

Definition at line 148 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg10IntMask_MSB   0x2A

Definition at line 149 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg10IntMask_RMASK   0x1

Definition at line 150 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg11IntMask_LSB   0x2B

Definition at line 145 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg11IntMask_MSB   0x2B

Definition at line 146 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg11IntMask_RMASK   0x1

Definition at line 147 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg12IntMask_LSB   0x2C

Definition at line 142 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg12IntMask_MSB   0x2C

Definition at line 143 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg12IntMask_RMASK   0x1

Definition at line 144 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg13IntMask_LSB   0x2D

Definition at line 139 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg13IntMask_MSB   0x2D

Definition at line 140 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg13IntMask_RMASK   0x1

Definition at line 141 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg14IntMask_LSB   0x2E

Definition at line 136 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg14IntMask_MSB   0x2E

Definition at line 137 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg14IntMask_RMASK   0x1

Definition at line 138 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg15IntMask_LSB   0x2F

Definition at line 133 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg15IntMask_MSB   0x2F

Definition at line 134 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg15IntMask_RMASK   0x1

Definition at line 135 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg16IntMask_LSB   0x30

Definition at line 130 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg16IntMask_MSB   0x30

Definition at line 131 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg16IntMask_RMASK   0x1

Definition at line 132 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg17IntMask_LSB   0x31

Definition at line 127 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg17IntMask_MSB   0x31

Definition at line 128 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg17IntMask_RMASK   0x1

Definition at line 129 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg1IntMask_LSB   0x21

Definition at line 175 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg1IntMask_MSB   0x21

Definition at line 176 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg1IntMask_RMASK   0x1

Definition at line 177 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg2IntMask_LSB   0x22

Definition at line 172 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg2IntMask_MSB   0x22

Definition at line 173 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg2IntMask_RMASK   0x1

Definition at line 174 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg3IntMask_LSB   0x23

Definition at line 169 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg3IntMask_MSB   0x23

Definition at line 170 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg3IntMask_RMASK   0x1

Definition at line 171 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg4IntMask_LSB   0x24

Definition at line 166 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg4IntMask_MSB   0x24

Definition at line 167 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg4IntMask_RMASK   0x1

Definition at line 168 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg5IntMask_LSB   0x25

Definition at line 163 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg5IntMask_MSB   0x25

Definition at line 164 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg5IntMask_RMASK   0x1

Definition at line 165 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg6IntMask_LSB   0x26

Definition at line 160 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg6IntMask_MSB   0x26

Definition at line 161 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg6IntMask_RMASK   0x1

Definition at line 162 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg7IntMask_LSB   0x27

Definition at line 157 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg7IntMask_MSB   0x27

Definition at line 158 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg7IntMask_RMASK   0x1

Definition at line 159 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg8IntMask_LSB   0x28

Definition at line 154 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg8IntMask_MSB   0x28

Definition at line 155 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg8IntMask_RMASK   0x1

Definition at line 156 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg9IntMask_LSB   0x29

Definition at line 151 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg9IntMask_MSB   0x29

Definition at line 152 of file qib_7322_regs.h.

#define QIB_7322_IntMask_RcvUrg9IntMask_RMASK   0x1

Definition at line 153 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaCleanupDoneMask_0_LSB   0x38

Definition at line 124 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaCleanupDoneMask_0_MSB   0x38

Definition at line 125 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaCleanupDoneMask_0_RMASK   0x1

Definition at line 126 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaCleanupDoneMask_1_LSB   0x39

Definition at line 121 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaCleanupDoneMask_1_MSB   0x39

Definition at line 122 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaCleanupDoneMask_1_RMASK   0x1

Definition at line 123 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaIdleIntMask_0_LSB   0x3A

Definition at line 118 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaIdleIntMask_0_MSB   0x3A

Definition at line 119 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaIdleIntMask_0_RMASK   0x1

Definition at line 120 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaIdleIntMask_1_LSB   0x3B

Definition at line 115 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaIdleIntMask_1_MSB   0x3B

Definition at line 116 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaIdleIntMask_1_RMASK   0x1

Definition at line 117 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaIntMask_0_LSB   0x3E

Definition at line 106 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaIntMask_0_MSB   0x3E

Definition at line 107 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaIntMask_0_RMASK   0x1

Definition at line 108 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaIntMask_1_LSB   0x3F

Definition at line 103 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaIntMask_1_MSB   0x3F

Definition at line 104 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaIntMask_1_RMASK   0x1

Definition at line 105 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaProgressIntMask_0_LSB   0x3C

Definition at line 112 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaProgressIntMask_0_MSB   0x3C

Definition at line 113 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaProgressIntMask_0_RMASK   0x1

Definition at line 114 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaProgressIntMask_1_LSB   0x3D

Definition at line 109 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaProgressIntMask_1_MSB   0x3D

Definition at line 110 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SDmaProgressIntMask_1_RMASK   0x1

Definition at line 111 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SendBufAvailIntMask_LSB   0x17

Definition at line 199 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SendBufAvailIntMask_MSB   0x17

Definition at line 200 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SendBufAvailIntMask_RMASK   0x1

Definition at line 201 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SendDoneIntMask_0_LSB   0x18

Definition at line 196 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SendDoneIntMask_0_MSB   0x18

Definition at line 197 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SendDoneIntMask_0_RMASK   0x1

Definition at line 198 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SendDoneIntMask_1_LSB   0x19

Definition at line 193 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SendDoneIntMask_1_MSB   0x19

Definition at line 194 of file qib_7322_regs.h.

#define QIB_7322_IntMask_SendDoneIntMask_1_RMASK   0x1

Definition at line 195 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_DEF   0x0000000000000000

Definition at line 1167 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_OFFS   0x540

Definition at line 1166 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec0_LSB   0x0

Definition at line 1201 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec0_MSB   0x4

Definition at line 1202 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec0_RMASK   0x1F

Definition at line 1203 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec10_LSB   0x32

Definition at line 1171 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec10_MSB   0x36

Definition at line 1172 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec10_RMASK   0x1F

Definition at line 1173 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec11_LSB   0x37

Definition at line 1168 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec11_MSB   0x3B

Definition at line 1169 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec11_RMASK   0x1F

Definition at line 1170 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec1_LSB   0x5

Definition at line 1198 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec1_MSB   0x9

Definition at line 1199 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec1_RMASK   0x1F

Definition at line 1200 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec2_LSB   0xA

Definition at line 1195 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec2_MSB   0xE

Definition at line 1196 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec2_RMASK   0x1F

Definition at line 1197 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec3_LSB   0xF

Definition at line 1192 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec3_MSB   0x13

Definition at line 1193 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec3_RMASK   0x1F

Definition at line 1194 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec4_LSB   0x14

Definition at line 1189 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec4_MSB   0x18

Definition at line 1190 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec4_RMASK   0x1F

Definition at line 1191 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec5_LSB   0x19

Definition at line 1186 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec5_MSB   0x1D

Definition at line 1187 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec5_RMASK   0x1F

Definition at line 1188 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec6_LSB   0x1E

Definition at line 1183 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec6_MSB   0x22

Definition at line 1184 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec6_RMASK   0x1F

Definition at line 1185 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec7_LSB   0x23

Definition at line 1180 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec7_MSB   0x27

Definition at line 1181 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec7_RMASK   0x1F

Definition at line 1182 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec8_LSB   0x28

Definition at line 1177 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec8_MSB   0x2C

Definition at line 1178 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec8_RMASK   0x1F

Definition at line 1179 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec9_LSB   0x2D

Definition at line 1174 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec9_MSB   0x31

Definition at line 1175 of file qib_7322_regs.h.

#define QIB_7322_IntRedirect0_vec9_RMASK   0x1F

Definition at line 1176 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_AssertGPIO_LSB   0x1C

Definition at line 346 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_AssertGPIO_MSB   0x1C

Definition at line 347 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_AssertGPIO_RMASK   0x1

Definition at line 348 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_DEF   0x0000000000000000

Definition at line 258 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_Err_0_LSB   0x1E

Definition at line 340 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_Err_0_MSB   0x1E

Definition at line 341 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_Err_0_RMASK   0x1

Definition at line 342 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_Err_1_LSB   0x1F

Definition at line 337 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_Err_1_MSB   0x1F

Definition at line 338 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_Err_1_RMASK   0x1

Definition at line 339 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_Err_LSB   0x1D

Definition at line 343 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_Err_MSB   0x1D

Definition at line 344 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_Err_RMASK   0x1

Definition at line 345 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_OFFS   0x70

Definition at line 257 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail0_LSB   0x0

Definition at line 409 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail0_MSB   0x0

Definition at line 410 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail0_RMASK   0x1

Definition at line 411 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail10_LSB   0xA

Definition at line 379 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail10_MSB   0xA

Definition at line 380 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail10_RMASK   0x1

Definition at line 381 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail11_LSB   0xB

Definition at line 376 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail11_MSB   0xB

Definition at line 377 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail11_RMASK   0x1

Definition at line 378 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail12_LSB   0xC

Definition at line 373 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail12_MSB   0xC

Definition at line 374 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail12_RMASK   0x1

Definition at line 375 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail13_LSB   0xD

Definition at line 370 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail13_MSB   0xD

Definition at line 371 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail13_RMASK   0x1

Definition at line 372 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail14_LSB   0xE

Definition at line 367 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail14_MSB   0xE

Definition at line 368 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail14_RMASK   0x1

Definition at line 369 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail15_LSB   0xF

Definition at line 364 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail15_MSB   0xF

Definition at line 365 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail15_RMASK   0x1

Definition at line 366 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail16_LSB   0x10

Definition at line 361 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail16_MSB   0x10

Definition at line 362 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail16_RMASK   0x1

Definition at line 363 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail17_LSB   0x11

Definition at line 358 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail17_MSB   0x11

Definition at line 359 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail17_RMASK   0x1

Definition at line 360 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail1_LSB   0x1

Definition at line 406 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail1_MSB   0x1

Definition at line 407 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail1_RMASK   0x1

Definition at line 408 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail2_LSB   0x2

Definition at line 403 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail2_MSB   0x2

Definition at line 404 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail2_RMASK   0x1

Definition at line 405 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail3_LSB   0x3

Definition at line 400 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail3_MSB   0x3

Definition at line 401 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail3_RMASK   0x1

Definition at line 402 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail4_LSB   0x4

Definition at line 397 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail4_MSB   0x4

Definition at line 398 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail4_RMASK   0x1

Definition at line 399 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail5_LSB   0x5

Definition at line 394 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail5_MSB   0x5

Definition at line 395 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail5_RMASK   0x1

Definition at line 396 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail6_LSB   0x6

Definition at line 391 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail6_MSB   0x6

Definition at line 392 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail6_RMASK   0x1

Definition at line 393 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail7_LSB   0x7

Definition at line 388 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail7_MSB   0x7

Definition at line 389 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail7_RMASK   0x1

Definition at line 390 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail8_LSB   0x8

Definition at line 385 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail8_MSB   0x8

Definition at line 386 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail8_RMASK   0x1

Definition at line 387 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail9_LSB   0x9

Definition at line 382 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail9_MSB   0x9

Definition at line 383 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvAvail9_RMASK   0x1

Definition at line 384 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg0_LSB   0x20

Definition at line 334 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg0_MSB   0x20

Definition at line 335 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg0_RMASK   0x1

Definition at line 336 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg10_LSB   0x2A

Definition at line 304 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg10_MSB   0x2A

Definition at line 305 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg10_RMASK   0x1

Definition at line 306 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg11_LSB   0x2B

Definition at line 301 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg11_MSB   0x2B

Definition at line 302 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg11_RMASK   0x1

Definition at line 303 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg12_LSB   0x2C

Definition at line 298 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg12_MSB   0x2C

Definition at line 299 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg12_RMASK   0x1

Definition at line 300 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg13_LSB   0x2D

Definition at line 295 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg13_MSB   0x2D

Definition at line 296 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg13_RMASK   0x1

Definition at line 297 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg14_LSB   0x2E

Definition at line 292 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg14_MSB   0x2E

Definition at line 293 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg14_RMASK   0x1

Definition at line 294 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg15_LSB   0x2F

Definition at line 289 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg15_MSB   0x2F

Definition at line 290 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg15_RMASK   0x1

Definition at line 291 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg16_LSB   0x30

Definition at line 286 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg16_MSB   0x30

Definition at line 287 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg16_RMASK   0x1

Definition at line 288 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg17_LSB   0x31

Definition at line 283 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg17_MSB   0x31

Definition at line 284 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg17_RMASK   0x1

Definition at line 285 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg1_LSB   0x21

Definition at line 331 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg1_MSB   0x21

Definition at line 332 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg1_RMASK   0x1

Definition at line 333 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg2_LSB   0x22

Definition at line 328 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg2_MSB   0x22

Definition at line 329 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg2_RMASK   0x1

Definition at line 330 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg3_LSB   0x23

Definition at line 325 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg3_MSB   0x23

Definition at line 326 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg3_RMASK   0x1

Definition at line 327 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg4_LSB   0x24

Definition at line 322 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg4_MSB   0x24

Definition at line 323 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg4_RMASK   0x1

Definition at line 324 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg5_LSB   0x25

Definition at line 319 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg5_MSB   0x25

Definition at line 320 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg5_RMASK   0x1

Definition at line 321 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg6_LSB   0x26

Definition at line 316 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg6_MSB   0x26

Definition at line 317 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg6_RMASK   0x1

Definition at line 318 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg7_LSB   0x27

Definition at line 313 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg7_MSB   0x27

Definition at line 314 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg7_RMASK   0x1

Definition at line 315 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg8_LSB   0x28

Definition at line 310 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg8_MSB   0x28

Definition at line 311 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg8_RMASK   0x1

Definition at line 312 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg9_LSB   0x29

Definition at line 307 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg9_MSB   0x29

Definition at line 308 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_RcvUrg9_RMASK   0x1

Definition at line 309 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaCleanupDone_0_LSB   0x38

Definition at line 280 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaCleanupDone_0_MSB   0x38

Definition at line 281 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaCleanupDone_0_RMASK   0x1

Definition at line 282 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaCleanupDone_1_LSB   0x39

Definition at line 277 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaCleanupDone_1_MSB   0x39

Definition at line 278 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaCleanupDone_1_RMASK   0x1

Definition at line 279 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaIdleInt_0_LSB   0x3A

Definition at line 274 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaIdleInt_0_MSB   0x3A

Definition at line 275 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaIdleInt_0_RMASK   0x1

Definition at line 276 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaIdleInt_1_LSB   0x3B

Definition at line 271 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaIdleInt_1_MSB   0x3B

Definition at line 272 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaIdleInt_1_RMASK   0x1

Definition at line 273 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaInt_0_LSB   0x3E

Definition at line 262 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaInt_0_MSB   0x3E

Definition at line 263 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaInt_0_RMASK   0x1

Definition at line 264 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaInt_1_LSB   0x3F

Definition at line 259 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaInt_1_MSB   0x3F

Definition at line 260 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaInt_1_RMASK   0x1

Definition at line 261 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaProgressInt_0_LSB   0x3C

Definition at line 268 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaProgressInt_0_MSB   0x3C

Definition at line 269 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaProgressInt_0_RMASK   0x1

Definition at line 270 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaProgressInt_1_LSB   0x3D

Definition at line 265 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaProgressInt_1_MSB   0x3D

Definition at line 266 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SDmaProgressInt_1_RMASK   0x1

Definition at line 267 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SendBufAvail_LSB   0x17

Definition at line 355 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SendBufAvail_MSB   0x17

Definition at line 356 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SendBufAvail_RMASK   0x1

Definition at line 357 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SendDone_0_LSB   0x18

Definition at line 352 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SendDone_0_MSB   0x18

Definition at line 353 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SendDone_0_RMASK   0x1

Definition at line 354 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SendDone_1_LSB   0x19

Definition at line 349 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SendDone_1_MSB   0x19

Definition at line 350 of file qib_7322_regs.h.

#define QIB_7322_IntStatus_SendDone_1_RMASK   0x1

Definition at line 351 of file qib_7322_regs.h.

#define QIB_7322_LAMemory_DEF   0x0000000000000000

Definition at line 2806 of file qib_7322_regs.h.

#define QIB_7322_LAMemory_OFFS   0xA000

Definition at line 2805 of file qib_7322_regs.h.

#define QIB_7322_LBFlowStallCnt_DEF   0x0000000000000000

Definition at line 2812 of file qib_7322_regs.h.

#define QIB_7322_LBFlowStallCnt_OFFS   0x11008

Definition at line 2811 of file qib_7322_regs.h.

#define QIB_7322_LBIntCnt_0_DEF   0x0000000000000000

Definition at line 2830 of file qib_7322_regs.h.

#define QIB_7322_LBIntCnt_0_OFFS   0x12000

Definition at line 2829 of file qib_7322_regs.h.

#define QIB_7322_LBIntCnt_1_DEF   0x0000000000000000

Definition at line 2965 of file qib_7322_regs.h.

#define QIB_7322_LBIntCnt_1_OFFS   0x13000

Definition at line 2964 of file qib_7322_regs.h.

#define QIB_7322_LBIntCnt_DEF   0x0000000000000000

Definition at line 2809 of file qib_7322_regs.h.

#define QIB_7322_LBIntCnt_OFFS   0x11000

Definition at line 2808 of file qib_7322_regs.h.

#define QIB_7322_LocalLinkIntegrityErrCnt_0_DEF   0x0000000000000000

Definition at line 2929 of file qib_7322_regs.h.

#define QIB_7322_LocalLinkIntegrityErrCnt_0_OFFS   0x121B0

Definition at line 2928 of file qib_7322_regs.h.

#define QIB_7322_LocalLinkIntegrityErrCnt_1_DEF   0x0000000000000000

Definition at line 3064 of file qib_7322_regs.h.

#define QIB_7322_LocalLinkIntegrityErrCnt_1_OFFS   0x131B0

Definition at line 3063 of file qib_7322_regs.h.

#define QIB_7322_LowPriority0_0_DEF   0x0000000000000000

Definition at line 2769 of file qib_7322_regs.h.

#define QIB_7322_LowPriority0_0_OFFS   0x1C00

Definition at line 2768 of file qib_7322_regs.h.

#define QIB_7322_LowPriority0_0_VirtualLane_LSB   0x10

Definition at line 2770 of file qib_7322_regs.h.

#define QIB_7322_LowPriority0_0_VirtualLane_MSB   0x12

Definition at line 2771 of file qib_7322_regs.h.

#define QIB_7322_LowPriority0_0_VirtualLane_RMASK   0x7

Definition at line 2772 of file qib_7322_regs.h.

#define QIB_7322_LowPriority0_0_Weight_LSB   0x0

Definition at line 2773 of file qib_7322_regs.h.

#define QIB_7322_LowPriority0_0_Weight_MSB   0x7

Definition at line 2774 of file qib_7322_regs.h.

#define QIB_7322_LowPriority0_0_Weight_RMASK   0xFF

Definition at line 2775 of file qib_7322_regs.h.

#define QIB_7322_MsixPba_DEF   0x0000000000000000

Definition at line 2803 of file qib_7322_regs.h.

#define QIB_7322_MsixPba_OFFS   0x9000

Definition at line 2802 of file qib_7322_regs.h.

#define QIB_7322_MsixTable_DEF   0x0000000000000000

Definition at line 2800 of file qib_7322_regs.h.

#define QIB_7322_MsixTable_OFFS   0x8000

Definition at line 2799 of file qib_7322_regs.h.

#define QIB_7322_PageAlign_DEF   0x0000000000001000

Definition at line 84 of file qib_7322_regs.h.

#define QIB_7322_PageAlign_OFFS   0x10

Definition at line 83 of file qib_7322_regs.h.

#define QIB_7322_PcieRetryBufDiagQwordCnt_DEF   0x0000000000000000

Definition at line 2824 of file qib_7322_regs.h.

#define QIB_7322_PcieRetryBufDiagQwordCnt_OFFS   0x111A0

Definition at line 2823 of file qib_7322_regs.h.

#define QIB_7322_PSInterval_0_DEF   0x0000000000000000

Definition at line 1914 of file qib_7322_regs.h.

#define QIB_7322_PSInterval_0_OFFS   0x1150

Definition at line 1913 of file qib_7322_regs.h.

#define QIB_7322_PSRcvDataCount_0_DEF   0x0000000000000000

Definition at line 2950 of file qib_7322_regs.h.

#define QIB_7322_PSRcvDataCount_0_OFFS   0x12218

Definition at line 2949 of file qib_7322_regs.h.

#define QIB_7322_PSRcvDataCount_1_DEF   0x0000000000000000

Definition at line 3085 of file qib_7322_regs.h.

#define QIB_7322_PSRcvDataCount_1_OFFS   0x13218

Definition at line 3084 of file qib_7322_regs.h.

#define QIB_7322_PSRcvPktsCount_0_DEF   0x0000000000000000

Definition at line 2953 of file qib_7322_regs.h.

#define QIB_7322_PSRcvPktsCount_0_OFFS   0x12220

Definition at line 2952 of file qib_7322_regs.h.

#define QIB_7322_PSRcvPktsCount_1_DEF   0x0000000000000000

Definition at line 3088 of file qib_7322_regs.h.

#define QIB_7322_PSRcvPktsCount_1_OFFS   0x13220

Definition at line 3087 of file qib_7322_regs.h.

#define QIB_7322_PSStart_0_DEF   0x0000000000000000

Definition at line 1911 of file qib_7322_regs.h.

#define QIB_7322_PSStart_0_OFFS   0x1148

Definition at line 1910 of file qib_7322_regs.h.

#define QIB_7322_PSStat_0_DEF   0x0000000000000000

Definition at line 1908 of file qib_7322_regs.h.

#define QIB_7322_PSStat_0_OFFS   0x1140

Definition at line 1907 of file qib_7322_regs.h.

#define QIB_7322_PSXmitDataCount_0_DEF   0x0000000000000000

Definition at line 2956 of file qib_7322_regs.h.

#define QIB_7322_PSXmitDataCount_0_OFFS   0x12228

Definition at line 2955 of file qib_7322_regs.h.

#define QIB_7322_PSXmitDataCount_1_DEF   0x0000000000000000

Definition at line 3091 of file qib_7322_regs.h.

#define QIB_7322_PSXmitDataCount_1_OFFS   0x13228

Definition at line 3090 of file qib_7322_regs.h.

#define QIB_7322_PSXmitPktsCount_0_DEF   0x0000000000000000

Definition at line 2959 of file qib_7322_regs.h.

#define QIB_7322_PSXmitPktsCount_0_OFFS   0x12230

Definition at line 2958 of file qib_7322_regs.h.

#define QIB_7322_PSXmitPktsCount_1_DEF   0x0000000000000000

Definition at line 3094 of file qib_7322_regs.h.

#define QIB_7322_PSXmitPktsCount_1_OFFS   0x13230

Definition at line 3093 of file qib_7322_regs.h.

#define QIB_7322_PSXmitWaitCount_0_DEF   0x0000000000000000

Definition at line 2962 of file qib_7322_regs.h.

#define QIB_7322_PSXmitWaitCount_0_OFFS   0x12238

Definition at line 2961 of file qib_7322_regs.h.

#define QIB_7322_PSXmitWaitCount_1_DEF   0x0000000000000000

Definition at line 3097 of file qib_7322_regs.h.

#define QIB_7322_PSXmitWaitCount_1_OFFS   0x13238

Definition at line 3096 of file qib_7322_regs.h.

#define QIB_7322_RcvAvailTimeOut0_DEF   0x0000000000000000

Definition at line 1359 of file qib_7322_regs.h.

#define QIB_7322_RcvAvailTimeOut0_OFFS   0xC00

Definition at line 1358 of file qib_7322_regs.h.

#define QIB_7322_RcvAvailTimeOut0_RcvAvailTOCount_LSB   0x10

Definition at line 1360 of file qib_7322_regs.h.

#define QIB_7322_RcvAvailTimeOut0_RcvAvailTOCount_MSB   0x1F

Definition at line 1361 of file qib_7322_regs.h.

#define QIB_7322_RcvAvailTimeOut0_RcvAvailTOCount_RMASK   0xFFFF

Definition at line 1362 of file qib_7322_regs.h.

#define QIB_7322_RcvAvailTimeOut0_RcvAvailTOReload_LSB   0x0

Definition at line 1363 of file qib_7322_regs.h.

#define QIB_7322_RcvAvailTimeOut0_RcvAvailTOReload_MSB   0xF

Definition at line 1364 of file qib_7322_regs.h.

#define QIB_7322_RcvAvailTimeOut0_RcvAvailTOReload_RMASK   0xFFFF

Definition at line 1365 of file qib_7322_regs.h.

#define QIB_7322_RcvBTHQP_0_DEF   0x0000000000000000

Definition at line 1788 of file qib_7322_regs.h.

#define QIB_7322_RcvBTHQP_0_OFFS   0x1108

Definition at line 1787 of file qib_7322_regs.h.

#define QIB_7322_RcvBTHQP_0_RcvBTHQP_LSB   0x0

Definition at line 1789 of file qib_7322_regs.h.

#define QIB_7322_RcvBTHQP_0_RcvBTHQP_MSB   0x17

Definition at line 1790 of file qib_7322_regs.h.

#define QIB_7322_RcvBTHQP_0_RcvBTHQP_RMASK   0xFFFFFF

Definition at line 1791 of file qib_7322_regs.h.

#define QIB_7322_RcvBufBase_DEF   0x0000000000080000

Definition at line 984 of file qib_7322_regs.h.

#define QIB_7322_RcvBufBase_OFFS   0x148

Definition at line 983 of file qib_7322_regs.h.

#define QIB_7322_RcvBufSize_DEF   0x0000000000005000

Definition at line 987 of file qib_7322_regs.h.

#define QIB_7322_RcvBufSize_OFFS   0x150

Definition at line 986 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_ContextEnableKernel_LSB   0x0

Definition at line 1783 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_ContextEnableKernel_MSB   0x0

Definition at line 1784 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_ContextEnableKernel_RMASK   0x1

Definition at line 1785 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_ContextEnableUser_LSB   0x2

Definition at line 1780 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_ContextEnableUser_MSB   0x11

Definition at line 1781 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_ContextEnableUser_RMASK   0xFFFF

Definition at line 1782 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_DEF   0x0000000000000000

Definition at line 1767 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_OFFS   0x1100

Definition at line 1766 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_RcvIBPortEnable_LSB   0x27

Definition at line 1777 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_RcvIBPortEnable_MSB   0x27

Definition at line 1778 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_RcvIBPortEnable_RMASK   0x1

Definition at line 1779 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_RcvPartitionKeyDisable_LSB   0x29

Definition at line 1771 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_RcvPartitionKeyDisable_MSB   0x29

Definition at line 1772 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_RcvPartitionKeyDisable_RMASK   0x1

Definition at line 1773 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_RcvQPMapEnable_LSB   0x28

Definition at line 1774 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_RcvQPMapEnable_MSB   0x28

Definition at line 1775 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_RcvQPMapEnable_RMASK   0x1

Definition at line 1776 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_RcvResetCredit_LSB   0x2A

Definition at line 1768 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_RcvResetCredit_MSB   0x2A

Definition at line 1769 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_0_RcvResetCredit_RMASK   0x1

Definition at line 1770 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_ContextCfg_LSB   0x29

Definition at line 952 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_ContextCfg_MSB   0x2A

Definition at line 953 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_ContextCfg_RMASK   0x3

Definition at line 954 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_DEF   0x0000000000000000

Definition at line 939 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_dontDropRHQFull_LSB   0x0

Definition at line 958 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_dontDropRHQFull_MSB   0x11

Definition at line 959 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_dontDropRHQFull_RMASK   0x3FFFF

Definition at line 960 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_IntrAvail_LSB   0x14

Definition at line 955 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_IntrAvail_MSB   0x25

Definition at line 956 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_IntrAvail_RMASK   0x3FFFF

Definition at line 957 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_OFFS   0x100

Definition at line 938 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_TailUpd_LSB   0x2F

Definition at line 943 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_TailUpd_MSB   0x2F

Definition at line 944 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_TailUpd_RMASK   0x1

Definition at line 945 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_TidFlowEnable_LSB   0x2B

Definition at line 949 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_TidFlowEnable_MSB   0x2B

Definition at line 950 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_TidFlowEnable_RMASK   0x1

Definition at line 951 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_TidReDirect_LSB   0x30

Definition at line 940 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_TidReDirect_MSB   0x3F

Definition at line 941 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_TidReDirect_RMASK   0xFFFF

Definition at line 942 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_XrcTypeCode_LSB   0x2C

Definition at line 946 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_XrcTypeCode_MSB   0x2E

Definition at line 947 of file qib_7322_regs.h.

#define QIB_7322_RcvCtrl_XrcTypeCode_RMASK   0x7

Definition at line 948 of file qib_7322_regs.h.

#define QIB_7322_RcvEgrArray_DEF   0x0000000000000000

Definition at line 3100 of file qib_7322_regs.h.

#define QIB_7322_RcvEgrArray_OFFS   0x14000

Definition at line 3099 of file qib_7322_regs.h.

#define QIB_7322_RcvEgrArray_RT_Addr_LSB   0x0

Definition at line 3104 of file qib_7322_regs.h.

#define QIB_7322_RcvEgrArray_RT_Addr_MSB   0x24

Definition at line 3105 of file qib_7322_regs.h.

#define QIB_7322_RcvEgrArray_RT_Addr_RMASK   0x1FFFFFFFFF

Definition at line 3106 of file qib_7322_regs.h.

#define QIB_7322_RcvEgrArray_RT_BufSize_LSB   0x25

Definition at line 3101 of file qib_7322_regs.h.

#define QIB_7322_RcvEgrArray_RT_BufSize_MSB   0x27

Definition at line 3102 of file qib_7322_regs.h.

#define QIB_7322_RcvEgrArray_RT_BufSize_RMASK   0x7

Definition at line 3103 of file qib_7322_regs.h.

#define QIB_7322_RcvEgrBase_DEF   0x0000000000014000

Definition at line 978 of file qib_7322_regs.h.

#define QIB_7322_RcvEgrBase_OFFS   0x138

Definition at line 977 of file qib_7322_regs.h.

#define QIB_7322_RcvEgrCnt_DEF   0x0000000000001000

Definition at line 981 of file qib_7322_regs.h.

#define QIB_7322_RcvEgrCnt_OFFS   0x140

Definition at line 980 of file qib_7322_regs.h.

#define QIB_7322_RcvEgrIndexHead0_DEF   0x0000000000000000

Definition at line 3136 of file qib_7322_regs.h.

#define QIB_7322_RcvEgrIndexHead0_OFFS   0x200018

Definition at line 3135 of file qib_7322_regs.h.

#define QIB_7322_RcvEgrIndexTail0_DEF   0x0000000000000000

Definition at line 3133 of file qib_7322_regs.h.

#define QIB_7322_RcvEgrIndexTail0_OFFS   0x200010

Definition at line 3132 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrAddr0_DEF   0x0000000000000000

Definition at line 1089 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrAddr0_OFFS   0x280

Definition at line 1088 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrAddr0_RcvHdrAddr_LSB   0x2

Definition at line 1090 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrAddr0_RcvHdrAddr_MSB   0x27

Definition at line 1091 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrAddr0_RcvHdrAddr_RMASK   0x3FFFFFFFFF

Definition at line 1092 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrCnt_DEF   0x0000000000000000

Definition at line 966 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrCnt_OFFS   0x118

Definition at line 965 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrEntSize_DEF   0x0000000000000000

Definition at line 969 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrEntSize_OFFS   0x120

Definition at line 968 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrHead0_counter_LSB   0x20

Definition at line 3125 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrHead0_counter_MSB   0x2F

Definition at line 3126 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrHead0_counter_RMASK   0xFFFF

Definition at line 3127 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrHead0_DEF   0x0000000000000000

Definition at line 3124 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrHead0_OFFS   0x200008

Definition at line 3123 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrHead0_RcvHeadPointer_LSB   0x0

Definition at line 3128 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrHead0_RcvHeadPointer_MSB   0x1F

Definition at line 3129 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrHead0_RcvHeadPointer_RMASK   0xFFFFFFFF

Definition at line 3130 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrSize_DEF   0x0000000000000000

Definition at line 963 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrSize_OFFS   0x110

Definition at line 962 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrTail0_DEF   0x0000000000000000

Definition at line 3121 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrTail0_OFFS   0x200000

Definition at line 3120 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrTailAddr0_DEF   0x0000000000000000

Definition at line 1095 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrTailAddr0_OFFS   0x340

Definition at line 1094 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrTailAddr0_RcvHdrTailAddr_LSB   0x2

Definition at line 1096 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrTailAddr0_RcvHdrTailAddr_MSB   0x27

Definition at line 1097 of file qib_7322_regs.h.

#define QIB_7322_RcvHdrTailAddr0_RcvHdrTailAddr_RMASK   0x3FFFFFFFFF

Definition at line 1098 of file qib_7322_regs.h.

#define QIB_7322_RcvPartitionKey_0_DEF   0x0000000000000000

Definition at line 1926 of file qib_7322_regs.h.

#define QIB_7322_RcvPartitionKey_0_OFFS   0x1168

Definition at line 1925 of file qib_7322_regs.h.

#define QIB_7322_RcvPktLEDCnt_0_DEF   0x0000000000000000

Definition at line 1935 of file qib_7322_regs.h.

#define QIB_7322_RcvPktLEDCnt_0_OFFperiod_LSB   0x0

Definition at line 1939 of file qib_7322_regs.h.

#define QIB_7322_RcvPktLEDCnt_0_OFFperiod_MSB   0x1F

Definition at line 1940 of file qib_7322_regs.h.

#define QIB_7322_RcvPktLEDCnt_0_OFFperiod_RMASK   0xFFFFFFFF

Definition at line 1941 of file qib_7322_regs.h.

#define QIB_7322_RcvPktLEDCnt_0_OFFS   0x1178

Definition at line 1934 of file qib_7322_regs.h.

#define QIB_7322_RcvPktLEDCnt_0_ONperiod_LSB   0x20

Definition at line 1936 of file qib_7322_regs.h.

#define QIB_7322_RcvPktLEDCnt_0_ONperiod_MSB   0x3F

Definition at line 1937 of file qib_7322_regs.h.

#define QIB_7322_RcvPktLEDCnt_0_ONperiod_RMASK   0xFFFFFFFF

Definition at line 1938 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_DEF   0x0000000000000000

Definition at line 1794 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_OFFS   0x1110

Definition at line 1793 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext0_LSB   0x0

Definition at line 1810 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext0_MSB   0x4

Definition at line 1811 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext0_RMASK   0x1F

Definition at line 1812 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext1_LSB   0x5

Definition at line 1807 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext1_MSB   0x9

Definition at line 1808 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext1_RMASK   0x1F

Definition at line 1809 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext2_LSB   0xA

Definition at line 1804 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext2_MSB   0xE

Definition at line 1805 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext2_RMASK   0x1F

Definition at line 1806 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext3_LSB   0xF

Definition at line 1801 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext3_MSB   0x13

Definition at line 1802 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext3_RMASK   0x1F

Definition at line 1803 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext4_LSB   0x14

Definition at line 1798 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext4_MSB   0x18

Definition at line 1799 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext4_RMASK   0x1F

Definition at line 1800 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext5_LSB   0x19

Definition at line 1795 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext5_MSB   0x1D

Definition at line 1796 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableA_0_RcvQPMapContext5_RMASK   0x1F

Definition at line 1797 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_DEF   0x0000000000000000

Definition at line 1815 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_OFFS   0x1118

Definition at line 1814 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext10_LSB   0x14

Definition at line 1819 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext10_MSB   0x18

Definition at line 1820 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext10_RMASK   0x1F

Definition at line 1821 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext11_LSB   0x19

Definition at line 1816 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext11_MSB   0x1D

Definition at line 1817 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext11_RMASK   0x1F

Definition at line 1818 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext6_LSB   0x0

Definition at line 1831 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext6_MSB   0x4

Definition at line 1832 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext6_RMASK   0x1F

Definition at line 1833 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext7_LSB   0x5

Definition at line 1828 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext7_MSB   0x9

Definition at line 1829 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext7_RMASK   0x1F

Definition at line 1830 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext8_LSB   0xA

Definition at line 1825 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext8_MSB   0xE

Definition at line 1826 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext8_RMASK   0x1F

Definition at line 1827 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext9_LSB   0xF

Definition at line 1822 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext9_MSB   0x13

Definition at line 1823 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableB_0_RcvQPMapContext9_RMASK   0x1F

Definition at line 1824 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_DEF   0x0000000000000000

Definition at line 1836 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_OFFS   0x1120

Definition at line 1835 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext12_LSB   0x0

Definition at line 1852 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext12_MSB   0x4

Definition at line 1853 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext12_RMASK   0x1F

Definition at line 1854 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext13_LSB   0x5

Definition at line 1849 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext13_MSB   0x9

Definition at line 1850 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext13_RMASK   0x1F

Definition at line 1851 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext14_LSB   0xA

Definition at line 1846 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext14_MSB   0xE

Definition at line 1847 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext14_RMASK   0x1F

Definition at line 1848 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext15_LSB   0xF

Definition at line 1843 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext15_MSB   0x13

Definition at line 1844 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext15_RMASK   0x1F

Definition at line 1845 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext16_LSB   0x14

Definition at line 1840 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext16_MSB   0x18

Definition at line 1841 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext16_RMASK   0x1F

Definition at line 1842 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext17_LSB   0x19

Definition at line 1837 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext17_MSB   0x1D

Definition at line 1838 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableC_0_RcvQPMapContext17_RMASK   0x1F

Definition at line 1839 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_DEF   0x0000000000000000

Definition at line 1857 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_OFFS   0x1128

Definition at line 1856 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext18_LSB   0x0

Definition at line 1873 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext18_MSB   0x4

Definition at line 1874 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext18_RMASK   0x1F

Definition at line 1875 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext19_LSB   0x5

Definition at line 1870 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext19_MSB   0x9

Definition at line 1871 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext19_RMASK   0x1F

Definition at line 1872 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext20_LSB   0xA

Definition at line 1867 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext20_MSB   0xE

Definition at line 1868 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext20_RMASK   0x1F

Definition at line 1869 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext21_LSB   0xF

Definition at line 1864 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext21_MSB   0x13

Definition at line 1865 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext21_RMASK   0x1F

Definition at line 1866 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext22_LSB   0x14

Definition at line 1861 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext22_MSB   0x18

Definition at line 1862 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext22_RMASK   0x1F

Definition at line 1863 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext23_LSB   0x19

Definition at line 1858 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext23_MSB   0x1D

Definition at line 1859 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableD_0_RcvQPMapContext23_RMASK   0x1F

Definition at line 1860 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_DEF   0x0000000000000000

Definition at line 1878 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_OFFS   0x1130

Definition at line 1877 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext24_LSB   0x0

Definition at line 1894 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext24_MSB   0x4

Definition at line 1895 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext24_RMASK   0x1F

Definition at line 1896 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext25_LSB   0x5

Definition at line 1891 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext25_MSB   0x9

Definition at line 1892 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext25_RMASK   0x1F

Definition at line 1893 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext26_LSB   0xA

Definition at line 1888 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext26_MSB   0xE

Definition at line 1889 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext26_RMASK   0x1F

Definition at line 1890 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext27_LSB   0xF

Definition at line 1885 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext27_MSB   0x13

Definition at line 1886 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext27_RMASK   0x1F

Definition at line 1887 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext28_LSB   0x14

Definition at line 1882 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext28_MSB   0x18

Definition at line 1883 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext28_RMASK   0x1F

Definition at line 1884 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext29_LSB   0x19

Definition at line 1879 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext29_MSB   0x1D

Definition at line 1880 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableE_0_RcvQPMapContext29_RMASK   0x1F

Definition at line 1881 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableF_0_DEF   0x0000000000000000

Definition at line 1899 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableF_0_OFFS   0x1138

Definition at line 1898 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableF_0_RcvQPMapContext30_LSB   0x0

Definition at line 1903 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableF_0_RcvQPMapContext30_MSB   0x4

Definition at line 1904 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableF_0_RcvQPMapContext30_RMASK   0x1F

Definition at line 1905 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableF_0_RcvQPMapContext31_LSB   0x5

Definition at line 1900 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableF_0_RcvQPMapContext31_MSB   0x9

Definition at line 1901 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMapTableF_0_RcvQPMapContext31_RMASK   0x1F

Definition at line 1902 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMulticastContext_0_DEF   0x0000000000000000

Definition at line 1929 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMulticastContext_0_OFFS   0x1170

Definition at line 1928 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMulticastContext_0_RcvQpMcContext_LSB   0x0

Definition at line 1930 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMulticastContext_0_RcvQpMcContext_MSB   0x4

Definition at line 1931 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMulticastContext_0_RcvQpMcContext_RMASK   0x1F

Definition at line 1932 of file qib_7322_regs.h.

#define QIB_7322_RcvQPMulticastContext_1_OFFS   0x2170

Definition at line 2789 of file qib_7322_regs.h.

#define QIB_7322_RcvStatus_0_DEF   0x0000000000000000

Definition at line 1917 of file qib_7322_regs.h.

#define QIB_7322_RcvStatus_0_DmaeqBlockingContext_LSB   0x1

Definition at line 1918 of file qib_7322_regs.h.

#define QIB_7322_RcvStatus_0_DmaeqBlockingContext_MSB   0x5

Definition at line 1919 of file qib_7322_regs.h.

#define QIB_7322_RcvStatus_0_DmaeqBlockingContext_RMASK   0x1F

Definition at line 1920 of file qib_7322_regs.h.

#define QIB_7322_RcvStatus_0_OFFS   0x1160

Definition at line 1916 of file qib_7322_regs.h.

#define QIB_7322_RcvStatus_0_RxPktInProgress_LSB   0x0

Definition at line 1921 of file qib_7322_regs.h.

#define QIB_7322_RcvStatus_0_RxPktInProgress_MSB   0x0

Definition at line 1922 of file qib_7322_regs.h.

#define QIB_7322_RcvStatus_0_RxPktInProgress_RMASK   0x1

Definition at line 1923 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDArray0_DEF   0x0000000000000000

Definition at line 3109 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDArray0_OFFS   0x50000

Definition at line 3108 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDArray0_RT_Addr_LSB   0x0

Definition at line 3113 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDArray0_RT_Addr_MSB   0x24

Definition at line 3114 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDArray0_RT_Addr_RMASK   0x1FFFFFFFFF

Definition at line 3115 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDArray0_RT_BufSize_LSB   0x25

Definition at line 3110 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDArray0_RT_BufSize_MSB   0x27

Definition at line 3111 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDArray0_RT_BufSize_RMASK   0x7

Definition at line 3112 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDBase_DEF   0x0000000000050000

Definition at line 972 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDBase_OFFS   0x128

Definition at line 971 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDCnt_DEF   0x0000000000000200

Definition at line 975 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDCnt_OFFS   0x130

Definition at line 974 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_DEF   0x0000000000000000

Definition at line 3139 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_FlowValid_LSB   0x13

Definition at line 3155 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_FlowValid_MSB   0x13

Definition at line 3156 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_FlowValid_RMASK   0x1

Definition at line 3157 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_GenMismatch_LSB   0x1C

Definition at line 3140 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_GenMismatch_MSB   0x1C

Definition at line 3141 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_GenMismatch_RMASK   0x1

Definition at line 3142 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_GenVal_LSB   0xB

Definition at line 3158 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_GenVal_MSB   0x12

Definition at line 3159 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_GenVal_RMASK   0xFF

Definition at line 3160 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_HdrSuppEnabled_LSB   0x14

Definition at line 3152 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_HdrSuppEnabled_MSB   0x14

Definition at line 3153 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_HdrSuppEnabled_RMASK   0x1

Definition at line 3154 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_KeepAfterSeqErr_LSB   0x15

Definition at line 3149 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_KeepAfterSeqErr_MSB   0x15

Definition at line 3150 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_KeepAfterSeqErr_RMASK   0x1

Definition at line 3151 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_KeepOnGenErr_LSB   0x16

Definition at line 3146 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_KeepOnGenErr_MSB   0x16

Definition at line 3147 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_KeepOnGenErr_RMASK   0x1

Definition at line 3148 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_OFFS   0x201000

Definition at line 3138 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_SeqMismatch_LSB   0x1B

Definition at line 3143 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_SeqMismatch_MSB   0x1B

Definition at line 3144 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_SeqMismatch_RMASK   0x1

Definition at line 3145 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_SeqNum_LSB   0x0

Definition at line 3161 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_SeqNum_MSB   0xA

Definition at line 3162 of file qib_7322_regs.h.

#define QIB_7322_RcvTIDFlowTable0_SeqNum_RMASK   0x7FF

Definition at line 3163 of file qib_7322_regs.h.

#define QIB_7322_Revision_BoardID_LSB   0x20

Definition at line 46 of file qib_7322_regs.h.

#define QIB_7322_Revision_BoardID_MSB   0x27

Definition at line 47 of file qib_7322_regs.h.

#define QIB_7322_Revision_BoardID_RMASK   0xFF

Definition at line 48 of file qib_7322_regs.h.

#define QIB_7322_Revision_DEF   0x0000000002010601

Definition at line 36 of file qib_7322_regs.h.

#define QIB_7322_Revision_OFFS   0x0

Definition at line 35 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_Arch_LSB   0x10

Definition at line 52 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_Arch_MSB   0x17

Definition at line 53 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_Arch_RMASK   0xFF

Definition at line 54 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_ChipRevMajor_LSB   0x8

Definition at line 55 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_ChipRevMajor_MSB   0xF

Definition at line 56 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_ChipRevMajor_RMASK   0xFF

Definition at line 57 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_ChipRevMinor_LSB   0x0

Definition at line 58 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_ChipRevMinor_MSB   0x7

Definition at line 59 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_ChipRevMinor_RMASK   0xFF

Definition at line 60 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_Emulation_LSB   0x3E

Definition at line 40 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_Emulation_MSB   0x3E

Definition at line 41 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_Emulation_Revcode_LSB   0x28

Definition at line 43 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_Emulation_Revcode_MSB   0x3D

Definition at line 44 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_Emulation_Revcode_RMASK   0x3FFFFF

Definition at line 45 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_Emulation_RMASK   0x1

Definition at line 42 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_Simulator_LSB   0x3F

Definition at line 37 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_Simulator_MSB   0x3F

Definition at line 38 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_Simulator_RMASK   0x1

Definition at line 39 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_SW_LSB   0x18

Definition at line 49 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_SW_MSB   0x1F

Definition at line 50 of file qib_7322_regs.h.

#define QIB_7322_Revision_R_SW_RMASK   0xFF

Definition at line 51 of file qib_7322_regs.h.

#define QIB_7322_RxBufOvflCnt_0_DEF   0x0000000000000000

Definition at line 2905 of file qib_7322_regs.h.

#define QIB_7322_RxBufOvflCnt_0_OFFS   0x120C8

Definition at line 2904 of file qib_7322_regs.h.

#define QIB_7322_RxBufOvflCnt_1_DEF   0x0000000000000000

Definition at line 3040 of file qib_7322_regs.h.

#define QIB_7322_RxBufOvflCnt_1_OFFS   0x130C8

Definition at line 3039 of file qib_7322_regs.h.

#define QIB_7322_RxCreditVL0_0_DEF   0x0000000000000000

Definition at line 2124 of file qib_7322_regs.h.

#define QIB_7322_RxCreditVL0_0_OFFS   0x1280

Definition at line 2123 of file qib_7322_regs.h.

#define QIB_7322_RxCreditVL0_0_RxBufrConsumedVL_LSB   0x10

Definition at line 2125 of file qib_7322_regs.h.

#define QIB_7322_RxCreditVL0_0_RxBufrConsumedVL_MSB   0x1B

Definition at line 2126 of file qib_7322_regs.h.

#define QIB_7322_RxCreditVL0_0_RxBufrConsumedVL_RMASK   0xFFF

Definition at line 2127 of file qib_7322_regs.h.

#define QIB_7322_RxCreditVL0_0_RxMaxCreditVL_LSB   0x0

Definition at line 2128 of file qib_7322_regs.h.

#define QIB_7322_RxCreditVL0_0_RxMaxCreditVL_MSB   0xB

Definition at line 2129 of file qib_7322_regs.h.

#define QIB_7322_RxCreditVL0_0_RxMaxCreditVL_RMASK   0xFFF

Definition at line 2130 of file qib_7322_regs.h.

#define QIB_7322_RxDataPktCnt_0_DEF   0x0000000000000000

Definition at line 2869 of file qib_7322_regs.h.

#define QIB_7322_RxDataPktCnt_0_OFFS   0x12068

Definition at line 2868 of file qib_7322_regs.h.

#define QIB_7322_RxDataPktCnt_1_DEF   0x0000000000000000

Definition at line 3004 of file qib_7322_regs.h.

#define QIB_7322_RxDataPktCnt_1_OFFS   0x13068

Definition at line 3003 of file qib_7322_regs.h.

#define QIB_7322_RxDlidFltrCnt_0_DEF   0x0000000000000000

Definition at line 2935 of file qib_7322_regs.h.

#define QIB_7322_RxDlidFltrCnt_0_OFFS   0x121C0

Definition at line 2934 of file qib_7322_regs.h.

#define QIB_7322_RxDlidFltrCnt_1_DEF   0x0000000000000000

Definition at line 3070 of file qib_7322_regs.h.

#define QIB_7322_RxDlidFltrCnt_1_OFFS   0x131C0

Definition at line 3069 of file qib_7322_regs.h.

#define QIB_7322_RxDroppedPktCnt_0_DEF   0x0000000000000000

Definition at line 2866 of file qib_7322_regs.h.

#define QIB_7322_RxDroppedPktCnt_0_OFFS   0x12060

Definition at line 2865 of file qib_7322_regs.h.

#define QIB_7322_RxDroppedPktCnt_1_DEF   0x0000000000000000

Definition at line 3001 of file qib_7322_regs.h.

#define QIB_7322_RxDroppedPktCnt_1_OFFS   0x13060

Definition at line 3000 of file qib_7322_regs.h.

#define QIB_7322_RxDwordCnt_0_DEF   0x0000000000000000

Definition at line 2875 of file qib_7322_regs.h.

#define QIB_7322_RxDwordCnt_0_OFFS   0x12078

Definition at line 2874 of file qib_7322_regs.h.

#define QIB_7322_RxDwordCnt_1_DEF   0x0000000000000000

Definition at line 3010 of file qib_7322_regs.h.

#define QIB_7322_RxDwordCnt_1_OFFS   0x13078

Definition at line 3009 of file qib_7322_regs.h.

#define QIB_7322_RxEBPCnt_0_DEF   0x0000000000000000

Definition at line 2899 of file qib_7322_regs.h.

#define QIB_7322_RxEBPCnt_0_OFFS   0x120B8

Definition at line 2898 of file qib_7322_regs.h.

#define QIB_7322_RxEBPCnt_1_DEF   0x0000000000000000

Definition at line 3034 of file qib_7322_regs.h.

#define QIB_7322_RxEBPCnt_1_OFFS   0x130B8

Definition at line 3033 of file qib_7322_regs.h.

#define QIB_7322_RxFlowCtrlViolCnt_0_DEF   0x0000000000000000

Definition at line 2890 of file qib_7322_regs.h.

#define QIB_7322_RxFlowCtrlViolCnt_0_OFFS   0x120A0

Definition at line 2889 of file qib_7322_regs.h.

#define QIB_7322_RxFlowCtrlViolCnt_1_DEF   0x0000000000000000

Definition at line 3025 of file qib_7322_regs.h.

#define QIB_7322_RxFlowCtrlViolCnt_1_OFFS   0x130A0

Definition at line 3024 of file qib_7322_regs.h.

#define QIB_7322_RxFlowPktCnt_0_DEF   0x0000000000000000

Definition at line 2872 of file qib_7322_regs.h.

#define QIB_7322_RxFlowPktCnt_0_OFFS   0x12070

Definition at line 2871 of file qib_7322_regs.h.

#define QIB_7322_RxFlowPktCnt_1_DEF   0x0000000000000000

Definition at line 3007 of file qib_7322_regs.h.

#define QIB_7322_RxFlowPktCnt_1_OFFS   0x13070

Definition at line 3006 of file qib_7322_regs.h.

#define QIB_7322_RxICRCErrCnt_0_DEF   0x0000000000000000

Definition at line 2884 of file qib_7322_regs.h.

#define QIB_7322_RxICRCErrCnt_0_OFFS   0x12090

Definition at line 2883 of file qib_7322_regs.h.

#define QIB_7322_RxICRCErrCnt_1_DEF   0x0000000000000000

Definition at line 3019 of file qib_7322_regs.h.

#define QIB_7322_RxICRCErrCnt_1_OFFS   0x13090

Definition at line 3018 of file qib_7322_regs.h.

#define QIB_7322_RxIntMemBase_DEF   0x0000000000077000

Definition at line 990 of file qib_7322_regs.h.

#define QIB_7322_RxIntMemBase_OFFS   0x158

Definition at line 989 of file qib_7322_regs.h.

#define QIB_7322_RxIntMemSize_DEF   0x0000000000007000

Definition at line 993 of file qib_7322_regs.h.

#define QIB_7322_RxIntMemSize_OFFS   0x160

Definition at line 992 of file qib_7322_regs.h.

#define QIB_7322_RxLenErrCnt_0_DEF   0x0000000000000000

Definition at line 2878 of file qib_7322_regs.h.

#define QIB_7322_RxLenErrCnt_0_OFFS   0x12080

Definition at line 2877 of file qib_7322_regs.h.

#define QIB_7322_RxLenErrCnt_1_DEF   0x0000000000000000

Definition at line 3013 of file qib_7322_regs.h.

#define QIB_7322_RxLenErrCnt_1_OFFS   0x13080

Definition at line 3012 of file qib_7322_regs.h.

#define QIB_7322_RxLenTruncateCnt_0_DEF   0x0000000000000000

Definition at line 2908 of file qib_7322_regs.h.

#define QIB_7322_RxLenTruncateCnt_0_OFFS   0x120D0

Definition at line 2907 of file qib_7322_regs.h.

#define QIB_7322_RxLenTruncateCnt_1_DEF   0x0000000000000000

Definition at line 3043 of file qib_7322_regs.h.

#define QIB_7322_RxLenTruncateCnt_1_OFFS   0x130D0

Definition at line 3042 of file qib_7322_regs.h.

#define QIB_7322_RxLinkMalformCnt_0_DEF   0x0000000000000000

Definition at line 2896 of file qib_7322_regs.h.

#define QIB_7322_RxLinkMalformCnt_0_OFFS   0x120B0

Definition at line 2895 of file qib_7322_regs.h.

#define QIB_7322_RxLinkMalformCnt_1_DEF   0x0000000000000000

Definition at line 3031 of file qib_7322_regs.h.

#define QIB_7322_RxLinkMalformCnt_1_OFFS   0x130B0

Definition at line 3030 of file qib_7322_regs.h.

#define QIB_7322_RxLPCRCErrCnt_0_DEF   0x0000000000000000

Definition at line 2902 of file qib_7322_regs.h.

#define QIB_7322_RxLPCRCErrCnt_0_OFFS   0x120C0

Definition at line 2901 of file qib_7322_regs.h.

#define QIB_7322_RxLPCRCErrCnt_1_DEF   0x0000000000000000

Definition at line 3037 of file qib_7322_regs.h.

#define QIB_7322_RxLPCRCErrCnt_1_OFFS   0x130C0

Definition at line 3036 of file qib_7322_regs.h.

#define QIB_7322_RxMaxMinLenErrCnt_0_DEF   0x0000000000000000

Definition at line 2881 of file qib_7322_regs.h.

#define QIB_7322_RxMaxMinLenErrCnt_0_OFFS   0x12088

Definition at line 2880 of file qib_7322_regs.h.

#define QIB_7322_RxMaxMinLenErrCnt_1_DEF   0x0000000000000000

Definition at line 3016 of file qib_7322_regs.h.

#define QIB_7322_RxMaxMinLenErrCnt_1_OFFS   0x13088

Definition at line 3015 of file qib_7322_regs.h.

#define QIB_7322_RxOtherLocalPhyErrCnt_0_DEF   0x0000000000000000

Definition at line 2941 of file qib_7322_regs.h.

#define QIB_7322_RxOtherLocalPhyErrCnt_0_OFFS   0x121D0

Definition at line 2940 of file qib_7322_regs.h.

#define QIB_7322_RxOtherLocalPhyErrCnt_1_DEF   0x0000000000000000

Definition at line 3076 of file qib_7322_regs.h.

#define QIB_7322_RxOtherLocalPhyErrCnt_1_OFFS   0x131D0

Definition at line 3075 of file qib_7322_regs.h.

#define QIB_7322_RxP0HdrEgrOvflCnt_DEF   0x0000000000000000

Definition at line 2821 of file qib_7322_regs.h.

#define QIB_7322_RxP0HdrEgrOvflCnt_OFFS   0x110E8

Definition at line 2820 of file qib_7322_regs.h.

#define QIB_7322_RxPKeyMismatchCnt_0_DEF   0x0000000000000000

Definition at line 2911 of file qib_7322_regs.h.

#define QIB_7322_RxPKeyMismatchCnt_0_OFFS   0x120E0

Definition at line 2910 of file qib_7322_regs.h.

#define QIB_7322_RxPKeyMismatchCnt_1_DEF   0x0000000000000000

Definition at line 3046 of file qib_7322_regs.h.

#define QIB_7322_RxPKeyMismatchCnt_1_OFFS   0x130E0

Definition at line 3045 of file qib_7322_regs.h.

#define QIB_7322_RxQPInvalidContextCnt_0_DEF   0x0000000000000000

Definition at line 2944 of file qib_7322_regs.h.

#define QIB_7322_RxQPInvalidContextCnt_0_OFFS   0x121D8

Definition at line 2943 of file qib_7322_regs.h.

#define QIB_7322_RxQPInvalidContextCnt_1_DEF   0x0000000000000000

Definition at line 3079 of file qib_7322_regs.h.

#define QIB_7322_RxQPInvalidContextCnt_1_OFFS   0x131D8

Definition at line 3078 of file qib_7322_regs.h.

#define QIB_7322_RxTidFlowDropCnt_DEF   0x0000000000000000

Definition at line 2827 of file qib_7322_regs.h.

#define QIB_7322_RxTidFlowDropCnt_OFFS   0x111E0

Definition at line 2826 of file qib_7322_regs.h.

#define QIB_7322_RxTIDFullErrCnt_DEF   0x0000000000000000

Definition at line 2815 of file qib_7322_regs.h.

#define QIB_7322_RxTIDFullErrCnt_OFFS   0x110D0

Definition at line 2814 of file qib_7322_regs.h.

#define QIB_7322_RxTIDValidErrCnt_DEF   0x0000000000000000

Definition at line 2818 of file qib_7322_regs.h.

#define QIB_7322_RxTIDValidErrCnt_OFFS   0x110D8

Definition at line 2817 of file qib_7322_regs.h.

#define QIB_7322_RxVCRCErrCnt_0_DEF   0x0000000000000000

Definition at line 2887 of file qib_7322_regs.h.

#define QIB_7322_RxVCRCErrCnt_0_OFFS   0x12098

Definition at line 2886 of file qib_7322_regs.h.

#define QIB_7322_RxVCRCErrCnt_1_DEF   0x0000000000000000

Definition at line 3022 of file qib_7322_regs.h.

#define QIB_7322_RxVCRCErrCnt_1_OFFS   0x13098

Definition at line 3021 of file qib_7322_regs.h.

#define QIB_7322_RxVersionErrCnt_0_DEF   0x0000000000000000

Definition at line 2893 of file qib_7322_regs.h.

#define QIB_7322_RxVersionErrCnt_0_OFFS   0x120A8

Definition at line 2892 of file qib_7322_regs.h.

#define QIB_7322_RxVersionErrCnt_1_DEF   0x0000000000000000

Definition at line 3028 of file qib_7322_regs.h.

#define QIB_7322_RxVersionErrCnt_1_OFFS   0x130A8

Definition at line 3027 of file qib_7322_regs.h.

#define QIB_7322_RxVL15DroppedPktCnt_0_DEF   0x0000000000000000

Definition at line 2938 of file qib_7322_regs.h.

#define QIB_7322_RxVL15DroppedPktCnt_0_OFFS   0x121C8

Definition at line 2937 of file qib_7322_regs.h.

#define QIB_7322_RxVL15DroppedPktCnt_1_DEF   0x0000000000000000

Definition at line 3073 of file qib_7322_regs.h.

#define QIB_7322_RxVL15DroppedPktCnt_1_OFFS   0x131C8

Definition at line 3072 of file qib_7322_regs.h.

#define QIB_7322_RxVlErrCnt_0_DEF   0x0000000000000000

Definition at line 2932 of file qib_7322_regs.h.

#define QIB_7322_RxVlErrCnt_0_OFFS   0x121B8

Definition at line 2931 of file qib_7322_regs.h.

#define QIB_7322_RxVlErrCnt_1_DEF   0x0000000000000000

Definition at line 3067 of file qib_7322_regs.h.

#define QIB_7322_RxVlErrCnt_1_OFFS   0x131B8

Definition at line 3066 of file qib_7322_regs.h.

#define QIB_7322_Scratch_DEF   0x0000000000000000

Definition at line 90 of file qib_7322_regs.h.

#define QIB_7322_Scratch_OFFS   0x20

Definition at line 89 of file qib_7322_regs.h.

#define QIB_7322_SendBufAvail0_DEF   0x0000000000000000

Definition at line 2794 of file qib_7322_regs.h.

#define QIB_7322_SendBufAvail0_OFFS   0x3000

Definition at line 2793 of file qib_7322_regs.h.

#define QIB_7322_SendBufAvail0_SendBuf_31_0_LSB   0x0

Definition at line 2795 of file qib_7322_regs.h.

#define QIB_7322_SendBufAvail0_SendBuf_31_0_MSB   0x3F

Definition at line 2796 of file qib_7322_regs.h.

#define QIB_7322_SendBufAvail0_SendBuf_31_0_RMASK   0x0

Definition at line 2797 of file qib_7322_regs.h.

#define QIB_7322_SendBufAvailAddr_DEF   0x0000000000000000

Definition at line 1071 of file qib_7322_regs.h.

#define QIB_7322_SendBufAvailAddr_OFFS   0x1E0

Definition at line 1070 of file qib_7322_regs.h.

#define QIB_7322_SendBufAvailAddr_SendBufAvailAddr_LSB   0x6

Definition at line 1072 of file qib_7322_regs.h.

#define QIB_7322_SendBufAvailAddr_SendBufAvailAddr_MSB   0x27

Definition at line 1073 of file qib_7322_regs.h.

#define QIB_7322_SendBufAvailAddr_SendBufAvailAddr_RMASK   0x3FFFFFFFF

Definition at line 1074 of file qib_7322_regs.h.

#define QIB_7322_SendBufBase_BaseAddr_LargePIO_LSB   0x20

Definition at line 1045 of file qib_7322_regs.h.

#define QIB_7322_SendBufBase_BaseAddr_LargePIO_MSB   0x34

Definition at line 1046 of file qib_7322_regs.h.

#define QIB_7322_SendBufBase_BaseAddr_LargePIO_RMASK   0x1FFFFF

Definition at line 1047 of file qib_7322_regs.h.

#define QIB_7322_SendBufBase_BaseAddr_SmallPIO_LSB   0x0

Definition at line 1048 of file qib_7322_regs.h.

#define QIB_7322_SendBufBase_BaseAddr_SmallPIO_MSB   0x14

Definition at line 1049 of file qib_7322_regs.h.

#define QIB_7322_SendBufBase_BaseAddr_SmallPIO_RMASK   0x1FFFFF

Definition at line 1050 of file qib_7322_regs.h.

#define QIB_7322_SendBufBase_DEF   0x0018000000100000

Definition at line 1044 of file qib_7322_regs.h.

#define QIB_7322_SendBufBase_OFFS   0x1C8

Definition at line 1043 of file qib_7322_regs.h.

#define QIB_7322_SendBufCnt_DEF   0x0000002000000080

Definition at line 1062 of file qib_7322_regs.h.

#define QIB_7322_SendBufCnt_Num_LargeBuffers_LSB   0x20

Definition at line 1063 of file qib_7322_regs.h.

#define QIB_7322_SendBufCnt_Num_LargeBuffers_MSB   0x25

Definition at line 1064 of file qib_7322_regs.h.

#define QIB_7322_SendBufCnt_Num_LargeBuffers_RMASK   0x3F

Definition at line 1065 of file qib_7322_regs.h.

#define QIB_7322_SendBufCnt_Num_SmallBuffers_LSB   0x0

Definition at line 1066 of file qib_7322_regs.h.

#define QIB_7322_SendBufCnt_Num_SmallBuffers_MSB   0x8

Definition at line 1067 of file qib_7322_regs.h.

#define QIB_7322_SendBufCnt_Num_SmallBuffers_RMASK   0x1FF

Definition at line 1068 of file qib_7322_regs.h.

#define QIB_7322_SendBufCnt_OFFS   0x1D8

Definition at line 1061 of file qib_7322_regs.h.

#define QIB_7322_SendBufErr0_DEF   0x0000000000000000

Definition at line 1077 of file qib_7322_regs.h.

#define QIB_7322_SendBufErr0_OFFS   0x240

Definition at line 1076 of file qib_7322_regs.h.

#define QIB_7322_SendBufErr0_SendBufErr_63_0_LSB   0x0

Definition at line 1078 of file qib_7322_regs.h.

#define QIB_7322_SendBufErr0_SendBufErr_63_0_MSB   0x3F

Definition at line 1079 of file qib_7322_regs.h.

#define QIB_7322_SendBufErr0_SendBufErr_63_0_RMASK   0x0

Definition at line 1080 of file qib_7322_regs.h.

#define QIB_7322_SendBufSize_DEF   0x0000108000000880

Definition at line 1053 of file qib_7322_regs.h.

#define QIB_7322_SendBufSize_OFFS   0x1D0

Definition at line 1052 of file qib_7322_regs.h.

#define QIB_7322_SendBufSize_Size_LargePIO_LSB   0x20

Definition at line 1054 of file qib_7322_regs.h.

#define QIB_7322_SendBufSize_Size_LargePIO_MSB   0x2C

Definition at line 1055 of file qib_7322_regs.h.

#define QIB_7322_SendBufSize_Size_LargePIO_RMASK   0x1FFF

Definition at line 1056 of file qib_7322_regs.h.

#define QIB_7322_SendBufSize_Size_SmallPIO_LSB   0x0

Definition at line 1057 of file qib_7322_regs.h.

#define QIB_7322_SendBufSize_Size_SmallPIO_MSB   0xB

Definition at line 1058 of file qib_7322_regs.h.

#define QIB_7322_SendBufSize_Size_SmallPIO_RMASK   0xFFF

Definition at line 1059 of file qib_7322_regs.h.

#define QIB_7322_SendCheckControl_0_BTHQP_En_LSB   0x3

Definition at line 2143 of file qib_7322_regs.h.

#define QIB_7322_SendCheckControl_0_BTHQP_En_MSB   0x3

Definition at line 2144 of file qib_7322_regs.h.

#define QIB_7322_SendCheckControl_0_BTHQP_En_RMASK   0x1

Definition at line 2145 of file qib_7322_regs.h.

#define QIB_7322_SendCheckControl_0_DEF   0x0000000000000000

Definition at line 2139 of file qib_7322_regs.h.

#define QIB_7322_SendCheckControl_0_OFFS   0x14A8

Definition at line 2138 of file qib_7322_regs.h.

#define QIB_7322_SendCheckControl_0_PacketTooSmall_En_LSB   0x0

Definition at line 2152 of file qib_7322_regs.h.

#define QIB_7322_SendCheckControl_0_PacketTooSmall_En_MSB   0x0

Definition at line 2153 of file qib_7322_regs.h.

#define QIB_7322_SendCheckControl_0_PacketTooSmall_En_RMASK   0x1

Definition at line 2154 of file qib_7322_regs.h.

#define QIB_7322_SendCheckControl_0_PKey_En_LSB   0x4

Definition at line 2140 of file qib_7322_regs.h.

#define QIB_7322_SendCheckControl_0_PKey_En_MSB   0x4

Definition at line 2141 of file qib_7322_regs.h.

#define QIB_7322_SendCheckControl_0_PKey_En_RMASK   0x1

Definition at line 2142 of file qib_7322_regs.h.

#define QIB_7322_SendCheckControl_0_RawIPV6_En_LSB   0x1

Definition at line 2149 of file qib_7322_regs.h.

#define QIB_7322_SendCheckControl_0_RawIPV6_En_MSB   0x1

Definition at line 2150 of file qib_7322_regs.h.

#define QIB_7322_SendCheckControl_0_RawIPV6_En_RMASK   0x1

Definition at line 2151 of file qib_7322_regs.h.

#define QIB_7322_SendCheckControl_0_SLID_En_LSB   0x2

Definition at line 2146 of file qib_7322_regs.h.

#define QIB_7322_SendCheckControl_0_SLID_En_MSB   0x2

Definition at line 2147 of file qib_7322_regs.h.

#define QIB_7322_SendCheckControl_0_SLID_En_RMASK   0x1

Definition at line 2148 of file qib_7322_regs.h.

#define QIB_7322_SendCheckMask0_DEF   0x0000000000000000

Definition at line 1149 of file qib_7322_regs.h.

#define QIB_7322_SendCheckMask0_OFFS   0x4C0

Definition at line 1148 of file qib_7322_regs.h.

#define QIB_7322_SendCheckMask0_SendCheckMask_63_32_LSB   0x0

Definition at line 1150 of file qib_7322_regs.h.

#define QIB_7322_SendCheckMask0_SendCheckMask_63_32_MSB   0x3F

Definition at line 1151 of file qib_7322_regs.h.

#define QIB_7322_SendCheckMask0_SendCheckMask_63_32_RMASK   0x0

Definition at line 1152 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_DEF   0x0000000000000000

Definition at line 1962 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_ForceCreditUpToDate_LSB   0x7

Definition at line 1987 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_ForceCreditUpToDate_MSB   0x7

Definition at line 1988 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_ForceCreditUpToDate_RMASK   0x1

Definition at line 1989 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_IBVLArbiterEn_LSB   0xF

Definition at line 1963 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_IBVLArbiterEn_MSB   0xF

Definition at line 1964 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_IBVLArbiterEn_RMASK   0x1

Definition at line 1965 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_OFFS   0x11C0

Definition at line 1961 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_SDmaCleanup_LSB   0x8

Definition at line 1984 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_SDmaCleanup_MSB   0x8

Definition at line 1985 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_SDmaCleanup_RMASK   0x1

Definition at line 1986 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_SDmaEnable_LSB   0xB

Definition at line 1975 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_SDmaEnable_MSB   0xB

Definition at line 1976 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_SDmaEnable_RMASK   0x1

Definition at line 1977 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_SDmaHalt_LSB   0xC

Definition at line 1972 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_SDmaHalt_MSB   0xC

Definition at line 1973 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_SDmaHalt_RMASK   0x1

Definition at line 1974 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_SDmaIntEnable_LSB   0x9

Definition at line 1981 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_SDmaIntEnable_MSB   0x9

Definition at line 1982 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_SDmaIntEnable_RMASK   0x1

Definition at line 1983 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_SDmaSingleDescriptor_LSB   0xA

Definition at line 1978 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_SDmaSingleDescriptor_MSB   0xA

Definition at line 1979 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_SDmaSingleDescriptor_RMASK   0x1

Definition at line 1980 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_SendEnable_LSB   0x3

Definition at line 1990 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_SendEnable_MSB   0x3

Definition at line 1991 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_SendEnable_RMASK   0x1

Definition at line 1992 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_TxeAbortIbc_LSB   0x0

Definition at line 1996 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_TxeAbortIbc_MSB   0x0

Definition at line 1997 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_TxeAbortIbc_RMASK   0x1

Definition at line 1998 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_TxeBypassIbc_LSB   0x1

Definition at line 1993 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_TxeBypassIbc_MSB   0x1

Definition at line 1994 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_TxeBypassIbc_RMASK   0x1

Definition at line 1995 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_TxeDrainLaFifo_LSB   0xD

Definition at line 1969 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_TxeDrainLaFifo_MSB   0xD

Definition at line 1970 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_TxeDrainLaFifo_RMASK   0x1

Definition at line 1971 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_TxeDrainRmFifo_LSB   0xE

Definition at line 1966 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_TxeDrainRmFifo_MSB   0xE

Definition at line 1967 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_0_TxeDrainRmFifo_RMASK   0x1

Definition at line 1968 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_1_OFFS   0x21C0

Definition at line 2791 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_AvailUpdThld_LSB   0x18

Definition at line 1027 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_AvailUpdThld_MSB   0x1C

Definition at line 1028 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_AvailUpdThld_RMASK   0x1F

Definition at line 1029 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_DEF   0x0000000000000000

Definition at line 1020 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_Disarm_LSB   0x1F

Definition at line 1021 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_Disarm_MSB   0x1F

Definition at line 1022 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_Disarm_RMASK   0x1

Definition at line 1023 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_DisarmSendBuf_LSB   0x10

Definition at line 1030 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_DisarmSendBuf_MSB   0x17

Definition at line 1031 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_DisarmSendBuf_RMASK   0xFF

Definition at line 1032 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_OFFS   0x1C0

Definition at line 1019 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_SendBufAvailPad64Byte_LSB   0x1D

Definition at line 1024 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_SendBufAvailPad64Byte_MSB   0x1D

Definition at line 1025 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_SendBufAvailPad64Byte_RMASK   0x1

Definition at line 1026 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_SendBufAvailUpd_LSB   0x2

Definition at line 1036 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_SendBufAvailUpd_MSB   0x2

Definition at line 1037 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_SendBufAvailUpd_RMASK   0x1

Definition at line 1038 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_SendIntBufAvail_LSB   0x1

Definition at line 1039 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_SendIntBufAvail_MSB   0x1

Definition at line 1040 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_SendIntBufAvail_RMASK   0x1

Definition at line 1041 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_SpecialTriggerEn_LSB   0x4

Definition at line 1033 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_SpecialTriggerEn_MSB   0x4

Definition at line 1034 of file qib_7322_regs.h.

#define QIB_7322_SendCtrl_SpecialTriggerEn_RMASK   0x1

Definition at line 1035 of file qib_7322_regs.h.

#define QIB_7322_SendDmaBase_0_DEF   0x0000000000000000

Definition at line 2001 of file qib_7322_regs.h.

#define QIB_7322_SendDmaBase_0_OFFS   0x11F8

Definition at line 2000 of file qib_7322_regs.h.

#define QIB_7322_SendDmaBase_0_SendDmaBase_LSB   0x0

Definition at line 2002 of file qib_7322_regs.h.

#define QIB_7322_SendDmaBase_0_SendDmaBase_MSB   0x2F

Definition at line 2003 of file qib_7322_regs.h.

#define QIB_7322_SendDmaBase_0_SendDmaBase_RMASK   0xFFFFFFFFFFFF

Definition at line 2004 of file qib_7322_regs.h.

#define QIB_7322_SendDmaBufMask0_0_BufMask_63_0_LSB   0x0

Definition at line 2038 of file qib_7322_regs.h.

#define QIB_7322_SendDmaBufMask0_0_BufMask_63_0_MSB   0x3F

Definition at line 2039 of file qib_7322_regs.h.

#define QIB_7322_SendDmaBufMask0_0_BufMask_63_0_RMASK   0x0

Definition at line 2040 of file qib_7322_regs.h.

#define QIB_7322_SendDmaBufMask0_0_DEF   0x0000000000000000

Definition at line 2037 of file qib_7322_regs.h.

#define QIB_7322_SendDmaBufMask0_0_OFFS   0x1220

Definition at line 2036 of file qib_7322_regs.h.

#define QIB_7322_SendDmaBufUsed0_0_BufUsed_63_0_LSB   0x0

Definition at line 2134 of file qib_7322_regs.h.

#define QIB_7322_SendDmaBufUsed0_0_BufUsed_63_0_MSB   0x3F

Definition at line 2135 of file qib_7322_regs.h.

#define QIB_7322_SendDmaBufUsed0_0_BufUsed_63_0_RMASK   0x0

Definition at line 2136 of file qib_7322_regs.h.

#define QIB_7322_SendDmaBufUsed0_0_DEF   0x0000000000000000

Definition at line 2133 of file qib_7322_regs.h.

#define QIB_7322_SendDmaBufUsed0_0_OFFS   0x1480

Definition at line 2132 of file qib_7322_regs.h.

#define QIB_7322_SendDmaDescCnt_0_DEF   0x0000000000000000

Definition at line 1956 of file qib_7322_regs.h.

#define QIB_7322_SendDmaDescCnt_0_OFFS   0x1190

Definition at line 1955 of file qib_7322_regs.h.

#define QIB_7322_SendDmaDescCnt_0_SendDmaDescCnt_LSB   0x0

Definition at line 1957 of file qib_7322_regs.h.

#define QIB_7322_SendDmaDescCnt_0_SendDmaDescCnt_MSB   0xF

Definition at line 1958 of file qib_7322_regs.h.

#define QIB_7322_SendDmaDescCnt_0_SendDmaDescCnt_RMASK   0xFFFF

Definition at line 1959 of file qib_7322_regs.h.

#define QIB_7322_SendDmaHead_0_DEF   0x0000000000000000

Definition at line 2022 of file qib_7322_regs.h.

#define QIB_7322_SendDmaHead_0_InternalSendDmaHead_LSB   0x20

Definition at line 2023 of file qib_7322_regs.h.

#define QIB_7322_SendDmaHead_0_InternalSendDmaHead_MSB   0x2F

Definition at line 2024 of file qib_7322_regs.h.

#define QIB_7322_SendDmaHead_0_InternalSendDmaHead_RMASK   0xFFFF

Definition at line 2025 of file qib_7322_regs.h.

#define QIB_7322_SendDmaHead_0_OFFS   0x1210

Definition at line 2021 of file qib_7322_regs.h.

#define QIB_7322_SendDmaHead_0_SendDmaHead_LSB   0x0

Definition at line 2026 of file qib_7322_regs.h.

#define QIB_7322_SendDmaHead_0_SendDmaHead_MSB   0xF

Definition at line 2027 of file qib_7322_regs.h.

#define QIB_7322_SendDmaHead_0_SendDmaHead_RMASK   0xFFFF

Definition at line 2028 of file qib_7322_regs.h.

#define QIB_7322_SendDmaHeadAddr_0_DEF   0x0000000000000000

Definition at line 2031 of file qib_7322_regs.h.

#define QIB_7322_SendDmaHeadAddr_0_OFFS   0x1218

Definition at line 2030 of file qib_7322_regs.h.

#define QIB_7322_SendDmaHeadAddr_0_SendDmaHeadAddr_LSB   0x0

Definition at line 2032 of file qib_7322_regs.h.

#define QIB_7322_SendDmaHeadAddr_0_SendDmaHeadAddr_MSB   0x2F

Definition at line 2033 of file qib_7322_regs.h.

#define QIB_7322_SendDmaHeadAddr_0_SendDmaHeadAddr_RMASK   0xFFFFFFFFFFFF

Definition at line 2034 of file qib_7322_regs.h.

#define QIB_7322_SendDmaIdleCnt_0_DEF   0x0000000000000000

Definition at line 1944 of file qib_7322_regs.h.

#define QIB_7322_SendDmaIdleCnt_0_OFFS   0x1180

Definition at line 1943 of file qib_7322_regs.h.

#define QIB_7322_SendDmaIdleCnt_0_SendDmaIdleCnt_LSB   0x0

Definition at line 1945 of file qib_7322_regs.h.

#define QIB_7322_SendDmaIdleCnt_0_SendDmaIdleCnt_MSB   0xF

Definition at line 1946 of file qib_7322_regs.h.

#define QIB_7322_SendDmaIdleCnt_0_SendDmaIdleCnt_RMASK   0xFFFF

Definition at line 1947 of file qib_7322_regs.h.

#define QIB_7322_SendDmaLenGen_0_DEF   0x0000000000000000

Definition at line 2007 of file qib_7322_regs.h.

#define QIB_7322_SendDmaLenGen_0_Generation_LSB   0x10

Definition at line 2008 of file qib_7322_regs.h.

#define QIB_7322_SendDmaLenGen_0_Generation_MSB   0x12

Definition at line 2009 of file qib_7322_regs.h.

#define QIB_7322_SendDmaLenGen_0_Generation_RMASK   0x7

Definition at line 2010 of file qib_7322_regs.h.

#define QIB_7322_SendDmaLenGen_0_Length_LSB   0x0

Definition at line 2011 of file qib_7322_regs.h.

#define QIB_7322_SendDmaLenGen_0_Length_MSB   0xF

Definition at line 2012 of file qib_7322_regs.h.

#define QIB_7322_SendDmaLenGen_0_Length_RMASK   0xFFFF

Definition at line 2013 of file qib_7322_regs.h.

#define QIB_7322_SendDmaLenGen_0_OFFS   0x1200

Definition at line 2006 of file qib_7322_regs.h.

#define QIB_7322_SendDmaPriorityThld_0_DEF   0x0000000000000000

Definition at line 2094 of file qib_7322_regs.h.

#define QIB_7322_SendDmaPriorityThld_0_OFFS   0x1258

Definition at line 2093 of file qib_7322_regs.h.

#define QIB_7322_SendDmaPriorityThld_0_PriorityThreshold_LSB   0x0

Definition at line 2095 of file qib_7322_regs.h.

#define QIB_7322_SendDmaPriorityThld_0_PriorityThreshold_MSB   0x3

Definition at line 2096 of file qib_7322_regs.h.

#define QIB_7322_SendDmaPriorityThld_0_PriorityThreshold_RMASK   0xF

Definition at line 2097 of file qib_7322_regs.h.

#define QIB_7322_SendDmaReloadCnt_0_DEF   0x0000000000000000

Definition at line 1950 of file qib_7322_regs.h.

#define QIB_7322_SendDmaReloadCnt_0_OFFS   0x1188

Definition at line 1949 of file qib_7322_regs.h.

#define QIB_7322_SendDmaReloadCnt_0_SendDmaReloadCnt_LSB   0x0

Definition at line 1951 of file qib_7322_regs.h.

#define QIB_7322_SendDmaReloadCnt_0_SendDmaReloadCnt_MSB   0xF

Definition at line 1952 of file qib_7322_regs.h.

#define QIB_7322_SendDmaReloadCnt_0_SendDmaReloadCnt_RMASK   0xFFFF

Definition at line 1953 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_DEF   0x0000000042000000

Definition at line 2043 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_HaltInProg_LSB   0x3E

Definition at line 2047 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_HaltInProg_MSB   0x3E

Definition at line 2048 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_HaltInProg_RMASK   0x1

Definition at line 2049 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_InternalSDmaHalt_LSB   0x3D

Definition at line 2050 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_InternalSDmaHalt_MSB   0x3D

Definition at line 2051 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_InternalSDmaHalt_RMASK   0x1

Definition at line 2052 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_OFFS   0x1238

Definition at line 2042 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_RpyLowAddr_6_0_LSB   0x28

Definition at line 2056 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_RpyLowAddr_6_0_MSB   0x2E

Definition at line 2057 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_RpyLowAddr_6_0_RMASK   0x7F

Definition at line 2058 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_RpyTag_7_0_LSB   0x20

Definition at line 2059 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_RpyTag_7_0_MSB   0x27

Definition at line 2060 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_RpyTag_7_0_RMASK   0xFF

Definition at line 2061 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_ScbDescIndex_13_0_LSB   0x2F

Definition at line 2053 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_ScbDescIndex_13_0_MSB   0x3C

Definition at line 2054 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_ScbDescIndex_13_0_RMASK   0x3FFF

Definition at line 2055 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_ScbEmpty_LSB   0x1E

Definition at line 2065 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_ScbEmpty_MSB   0x1E

Definition at line 2066 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_ScbEmpty_RMASK   0x1

Definition at line 2067 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_ScbEntryValid_LSB   0x1D

Definition at line 2068 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_ScbEntryValid_MSB   0x1D

Definition at line 2069 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_ScbEntryValid_RMASK   0x1

Definition at line 2070 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_ScbFetchDescFlag_LSB   0x1C

Definition at line 2071 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_ScbFetchDescFlag_MSB   0x1C

Definition at line 2072 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_ScbFetchDescFlag_RMASK   0x1

Definition at line 2073 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_ScbFull_LSB   0x1F

Definition at line 2062 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_ScbFull_MSB   0x1F

Definition at line 2063 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_ScbFull_RMASK   0x1

Definition at line 2064 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_ScoreBoardDrainInProg_LSB   0x3F

Definition at line 2044 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_ScoreBoardDrainInProg_MSB   0x3F

Definition at line 2045 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_ScoreBoardDrainInProg_RMASK   0x1

Definition at line 2046 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_SplFifoBufNum_LSB   0x10

Definition at line 2086 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_SplFifoBufNum_MSB   0x17

Definition at line 2087 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_SplFifoBufNum_RMASK   0xFF

Definition at line 2088 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_SplFifoDescIndex_LSB   0x0

Definition at line 2089 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_SplFifoDescIndex_MSB   0xF

Definition at line 2090 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_SplFifoDescIndex_RMASK   0xFFFF

Definition at line 2091 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_SplFifoDisarmed_LSB   0x1A

Definition at line 2077 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_SplFifoDisarmed_MSB   0x1A

Definition at line 2078 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_SplFifoDisarmed_RMASK   0x1

Definition at line 2079 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_SplFifoEmpty_LSB   0x19

Definition at line 2080 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_SplFifoEmpty_MSB   0x19

Definition at line 2081 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_SplFifoEmpty_RMASK   0x1

Definition at line 2082 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_SplFifoFull_LSB   0x18

Definition at line 2083 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_SplFifoFull_MSB   0x18

Definition at line 2084 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_SplFifoFull_RMASK   0x1

Definition at line 2085 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_SplFifoReadyToGo_LSB   0x1B

Definition at line 2074 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_SplFifoReadyToGo_MSB   0x1B

Definition at line 2075 of file qib_7322_regs.h.

#define QIB_7322_SendDmaStatus_0_SplFifoReadyToGo_RMASK   0x1

Definition at line 2076 of file qib_7322_regs.h.

#define QIB_7322_SendDmaTail_0_DEF   0x0000000000000000

Definition at line 2016 of file qib_7322_regs.h.

#define QIB_7322_SendDmaTail_0_OFFS   0x1208

Definition at line 2015 of file qib_7322_regs.h.

#define QIB_7322_SendDmaTail_0_SendDmaTail_LSB   0x0

Definition at line 2017 of file qib_7322_regs.h.

#define QIB_7322_SendDmaTail_0_SendDmaTail_MSB   0xF

Definition at line 2018 of file qib_7322_regs.h.

#define QIB_7322_SendDmaTail_0_SendDmaTail_RMASK   0xFFFF

Definition at line 2019 of file qib_7322_regs.h.

#define QIB_7322_SendGRHCheckMask0_DEF   0x0000000000000000

Definition at line 1155 of file qib_7322_regs.h.

#define QIB_7322_SendGRHCheckMask0_OFFS   0x4E0

Definition at line 1154 of file qib_7322_regs.h.

#define QIB_7322_SendGRHCheckMask0_SendGRHCheckMask_63_32_LSB   0x0

Definition at line 1156 of file qib_7322_regs.h.

#define QIB_7322_SendGRHCheckMask0_SendGRHCheckMask_63_32_MSB   0x3F

Definition at line 1157 of file qib_7322_regs.h.

#define QIB_7322_SendGRHCheckMask0_SendGRHCheckMask_63_32_RMASK   0x0

Definition at line 1158 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_DEF   0x0000000000000000

Definition at line 2100 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_GRHFail_LSB   0x5

Definition at line 2104 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_GRHFail_MSB   0x5

Definition at line 2105 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_GRHFail_RMASK   0x1

Definition at line 2106 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_NonKeyPacket_LSB   0x6

Definition at line 2101 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_NonKeyPacket_MSB   0x6

Definition at line 2102 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_NonKeyPacket_RMASK   0x1

Definition at line 2103 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_OFFS   0x1260

Definition at line 2099 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_PacketTooSmall_LSB   0x0

Definition at line 2119 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_PacketTooSmall_MSB   0x0

Definition at line 2120 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_PacketTooSmall_RMASK   0x1

Definition at line 2121 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_PkeyFail_LSB   0x4

Definition at line 2107 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_PkeyFail_MSB   0x4

Definition at line 2108 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_PkeyFail_RMASK   0x1

Definition at line 2109 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_QPFail_LSB   0x3

Definition at line 2110 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_QPFail_MSB   0x3

Definition at line 2111 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_QPFail_RMASK   0x1

Definition at line 2112 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_RawIPV6_LSB   0x1

Definition at line 2116 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_RawIPV6_MSB   0x1

Definition at line 2117 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_RawIPV6_RMASK   0x1

Definition at line 2118 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_SLIDFail_LSB   0x2

Definition at line 2113 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_SLIDFail_MSB   0x2

Definition at line 2114 of file qib_7322_regs.h.

#define QIB_7322_SendHdrErrSymptom_0_SLIDFail_RMASK   0x1

Definition at line 2115 of file qib_7322_regs.h.

#define QIB_7322_SendIBPacketMask0_DEF   0x0000000000000000

Definition at line 1161 of file qib_7322_regs.h.

#define QIB_7322_SendIBPacketMask0_OFFS   0x500

Definition at line 1160 of file qib_7322_regs.h.

#define QIB_7322_SendIBPacketMask0_SendIBPacketMask_63_32_LSB   0x0

Definition at line 1162 of file qib_7322_regs.h.

#define QIB_7322_SendIBPacketMask0_SendIBPacketMask_63_32_MSB   0x3F

Definition at line 1163 of file qib_7322_regs.h.

#define QIB_7322_SendIBPacketMask0_SendIBPacketMask_63_32_RMASK   0x0

Definition at line 1164 of file qib_7322_regs.h.

#define QIB_7322_SendIBSLIDAssign_0_DEF   0x0000000000000000

Definition at line 2163 of file qib_7322_regs.h.

#define QIB_7322_SendIBSLIDAssign_0_OFFS   0x14B8

Definition at line 2162 of file qib_7322_regs.h.

#define QIB_7322_SendIBSLIDAssign_0_SendIBSLIDAssign_15_0_LSB   0x0

Definition at line 2164 of file qib_7322_regs.h.

#define QIB_7322_SendIBSLIDAssign_0_SendIBSLIDAssign_15_0_MSB   0xF

Definition at line 2165 of file qib_7322_regs.h.

#define QIB_7322_SendIBSLIDAssign_0_SendIBSLIDAssign_15_0_RMASK   0xFFFF

Definition at line 2166 of file qib_7322_regs.h.

#define QIB_7322_SendIBSLIDMask_0_DEF   0x0000000000000000

Definition at line 2157 of file qib_7322_regs.h.

#define QIB_7322_SendIBSLIDMask_0_OFFS   0x14B0

Definition at line 2156 of file qib_7322_regs.h.

#define QIB_7322_SendIBSLIDMask_0_SendIBSLIDMask_15_0_LSB   0x0

Definition at line 2158 of file qib_7322_regs.h.

#define QIB_7322_SendIBSLIDMask_0_SendIBSLIDMask_15_0_MSB   0xF

Definition at line 2159 of file qib_7322_regs.h.

#define QIB_7322_SendIBSLIDMask_0_SendIBSLIDMask_15_0_RMASK   0xFFFF

Definition at line 2160 of file qib_7322_regs.h.

#define QIB_7322_SendRegBase_DEF   0x0000000000003000

Definition at line 96 of file qib_7322_regs.h.

#define QIB_7322_SendRegBase_OFFS   0x30

Definition at line 95 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_bist_en_LSB   0x5

Definition at line 1132 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_bist_en_MSB   0x9

Definition at line 1133 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_bist_en_RMASK   0x1F

Definition at line 1134 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_DEF   0x0000000000000001

Definition at line 1128 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_OFFS   0x470

Definition at line 1127 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_opcode_LSB   0x3

Definition at line 1135 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_opcode_MSB   0x4

Definition at line 1136 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_opcode_RMASK   0x3

Definition at line 1137 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_rdy_LSB   0x0

Definition at line 1144 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_rdy_MSB   0x0

Definition at line 1145 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_rdy_RMASK   0x1

Definition at line 1146 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_SPC_JTAG_ACCESS_EN_LSB   0xA

Definition at line 1129 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_SPC_JTAG_ACCESS_EN_MSB   0xA

Definition at line 1130 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_SPC_JTAG_ACCESS_EN_RMASK   0x1

Definition at line 1131 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_tdi_LSB   0x2

Definition at line 1138 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_tdi_MSB   0x2

Definition at line 1139 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_tdi_RMASK   0x1

Definition at line 1140 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_tdo_LSB   0x1

Definition at line 1141 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_tdo_MSB   0x1

Definition at line 1142 of file qib_7322_regs.h.

#define QIB_7322_SPC_JTAG_ACCESS_REG_tdo_RMASK   0x1

Definition at line 1143 of file qib_7322_regs.h.

#define QIB_7322_TxCreditUpToDateTimeOut_0_DEF   0x0000000000000000

Definition at line 2833 of file qib_7322_regs.h.

#define QIB_7322_TxCreditUpToDateTimeOut_0_OFFS   0x12008

Definition at line 2832 of file qib_7322_regs.h.

#define QIB_7322_TxCreditUpToDateTimeOut_1_DEF   0x0000000000000000

Definition at line 2968 of file qib_7322_regs.h.

#define QIB_7322_TxCreditUpToDateTimeOut_1_OFFS   0x13008

Definition at line 2967 of file qib_7322_regs.h.

#define QIB_7322_TxDataPktCnt_0_DEF   0x0000000000000000

Definition at line 2842 of file qib_7322_regs.h.

#define QIB_7322_TxDataPktCnt_0_OFFS   0x12020

Definition at line 2841 of file qib_7322_regs.h.

#define QIB_7322_TxDataPktCnt_1_DEF   0x0000000000000000

Definition at line 2977 of file qib_7322_regs.h.

#define QIB_7322_TxDataPktCnt_1_OFFS   0x13020

Definition at line 2976 of file qib_7322_regs.h.

#define QIB_7322_TxDroppedPktCnt_0_DEF   0x0000000000000000

Definition at line 2863 of file qib_7322_regs.h.

#define QIB_7322_TxDroppedPktCnt_0_OFFS   0x12058

Definition at line 2862 of file qib_7322_regs.h.

#define QIB_7322_TxDroppedPktCnt_1_DEF   0x0000000000000000

Definition at line 2998 of file qib_7322_regs.h.

#define QIB_7322_TxDroppedPktCnt_1_OFFS   0x13058

Definition at line 2997 of file qib_7322_regs.h.

#define QIB_7322_TxDwordCnt_0_DEF   0x0000000000000000

Definition at line 2848 of file qib_7322_regs.h.

#define QIB_7322_TxDwordCnt_0_OFFS   0x12030

Definition at line 2847 of file qib_7322_regs.h.

#define QIB_7322_TxDwordCnt_1_DEF   0x0000000000000000

Definition at line 2983 of file qib_7322_regs.h.

#define QIB_7322_TxDwordCnt_1_OFFS   0x13030

Definition at line 2982 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_DEF   0x0000000XC00080FF

Definition at line 1731 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL0_LSB   0x0

Definition at line 1762 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL0_MSB   0x0

Definition at line 1763 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL0_RMASK   0x1

Definition at line 1764 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL15_LSB   0xF

Definition at line 1738 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL15_MSB   0xF

Definition at line 1739 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL15_RMASK   0x1

Definition at line 1740 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL1_LSB   0x1

Definition at line 1759 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL1_MSB   0x1

Definition at line 1760 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL1_RMASK   0x1

Definition at line 1761 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL2_LSB   0x2

Definition at line 1756 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL2_MSB   0x2

Definition at line 1757 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL2_RMASK   0x1

Definition at line 1758 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL3_LSB   0x3

Definition at line 1753 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL3_MSB   0x3

Definition at line 1754 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL3_RMASK   0x1

Definition at line 1755 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL4_LSB   0x4

Definition at line 1750 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL4_MSB   0x4

Definition at line 1751 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL4_RMASK   0x1

Definition at line 1752 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL5_LSB   0x5

Definition at line 1747 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL5_MSB   0x5

Definition at line 1748 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL5_RMASK   0x1

Definition at line 1749 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL6_LSB   0x6

Definition at line 1744 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL6_MSB   0x6

Definition at line 1745 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL6_RMASK   0x1

Definition at line 1746 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL7_LSB   0x7

Definition at line 1741 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL7_MSB   0x7

Definition at line 1742 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_LaFifoEmpty_VL7_RMASK   0x1

Definition at line 1743 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_OFFS   0x10B8

Definition at line 1730 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_RmFifoEmpty_LSB   0x1E

Definition at line 1735 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_RmFifoEmpty_MSB   0x1E

Definition at line 1736 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_RmFifoEmpty_RMASK   0x1

Definition at line 1737 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_TXE_IBC_Idle_LSB   0x1F

Definition at line 1732 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_TXE_IBC_Idle_MSB   0x1F

Definition at line 1733 of file qib_7322_regs.h.

#define QIB_7322_TXEStatus_0_TXE_IBC_Idle_RMASK   0x1

Definition at line 1734 of file qib_7322_regs.h.

#define QIB_7322_TxFlowPktCnt_0_DEF   0x0000000000000000

Definition at line 2845 of file qib_7322_regs.h.

#define QIB_7322_TxFlowPktCnt_0_OFFS   0x12028

Definition at line 2844 of file qib_7322_regs.h.

#define QIB_7322_TxFlowPktCnt_1_DEF   0x0000000000000000

Definition at line 2980 of file qib_7322_regs.h.

#define QIB_7322_TxFlowPktCnt_1_OFFS   0x13028

Definition at line 2979 of file qib_7322_regs.h.

#define QIB_7322_TxFlowStallCnt_0_DEF   0x0000000000000000

Definition at line 2860 of file qib_7322_regs.h.

#define QIB_7322_TxFlowStallCnt_0_OFFS   0x12050

Definition at line 2859 of file qib_7322_regs.h.

#define QIB_7322_TxFlowStallCnt_1_DEF   0x0000000000000000

Definition at line 2995 of file qib_7322_regs.h.

#define QIB_7322_TxFlowStallCnt_1_OFFS   0x13050

Definition at line 2994 of file qib_7322_regs.h.

#define QIB_7322_TxHeadersErrCnt_0_DEF   0x0000000000000000

Definition at line 2947 of file qib_7322_regs.h.

#define QIB_7322_TxHeadersErrCnt_0_OFFS   0x121F8

Definition at line 2946 of file qib_7322_regs.h.

#define QIB_7322_TxHeadersErrCnt_1_DEF   0x0000000000000000

Definition at line 3082 of file qib_7322_regs.h.

#define QIB_7322_TxHeadersErrCnt_1_OFFS   0x131F8

Definition at line 3081 of file qib_7322_regs.h.

#define QIB_7322_TxLenErrCnt_0_DEF   0x0000000000000000

Definition at line 2851 of file qib_7322_regs.h.

#define QIB_7322_TxLenErrCnt_0_OFFS   0x12038

Definition at line 2850 of file qib_7322_regs.h.

#define QIB_7322_TxLenErrCnt_1_DEF   0x0000000000000000

Definition at line 2986 of file qib_7322_regs.h.

#define QIB_7322_TxLenErrCnt_1_OFFS   0x13038

Definition at line 2985 of file qib_7322_regs.h.

#define QIB_7322_TxMaxMinLenErrCnt_0_DEF   0x0000000000000000

Definition at line 2854 of file qib_7322_regs.h.

#define QIB_7322_TxMaxMinLenErrCnt_0_OFFS   0x12040

Definition at line 2853 of file qib_7322_regs.h.

#define QIB_7322_TxMaxMinLenErrCnt_1_DEF   0x0000000000000000

Definition at line 2989 of file qib_7322_regs.h.

#define QIB_7322_TxMaxMinLenErrCnt_1_OFFS   0x13040

Definition at line 2988 of file qib_7322_regs.h.

#define QIB_7322_TxSDmaDescCnt_0_DEF   0x0000000000000000

Definition at line 2836 of file qib_7322_regs.h.

#define QIB_7322_TxSDmaDescCnt_0_OFFS   0x12010

Definition at line 2835 of file qib_7322_regs.h.

#define QIB_7322_TxSDmaDescCnt_1_DEF   0x0000000000000000

Definition at line 2971 of file qib_7322_regs.h.

#define QIB_7322_TxSDmaDescCnt_1_OFFS   0x13010

Definition at line 2970 of file qib_7322_regs.h.

#define QIB_7322_TxUnderrunCnt_0_DEF   0x0000000000000000

Definition at line 2857 of file qib_7322_regs.h.

#define QIB_7322_TxUnderrunCnt_0_OFFS   0x12048

Definition at line 2856 of file qib_7322_regs.h.

#define QIB_7322_TxUnderrunCnt_1_DEF   0x0000000000000000

Definition at line 2992 of file qib_7322_regs.h.

#define QIB_7322_TxUnderrunCnt_1_OFFS   0x13048

Definition at line 2991 of file qib_7322_regs.h.

#define QIB_7322_TxUnsupVLErrCnt_0_DEF   0x0000000000000000

Definition at line 2839 of file qib_7322_regs.h.

#define QIB_7322_TxUnsupVLErrCnt_0_OFFS   0x12018

Definition at line 2838 of file qib_7322_regs.h.

#define QIB_7322_TxUnsupVLErrCnt_1_DEF   0x0000000000000000

Definition at line 2974 of file qib_7322_regs.h.

#define QIB_7322_TxUnsupVLErrCnt_1_OFFS   0x13018

Definition at line 2973 of file qib_7322_regs.h.

#define QIB_7322_UserRegBase_DEF   0x0000000000200000

Definition at line 99 of file qib_7322_regs.h.

#define QIB_7322_UserRegBase_OFFS   0x38

Definition at line 98 of file qib_7322_regs.h.

#define QIB_7322_vec_clr_without_int_DEF   0x0000000000000000

Definition at line 1209 of file qib_7322_regs.h.

#define QIB_7322_vec_clr_without_int_OFFS   0x578

Definition at line 1208 of file qib_7322_regs.h.

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