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qib_mad.h
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1 /*
2  * Copyright (c) 2012 Intel Corporation. All rights reserved.
3  * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
4  * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
5  *
6  * This software is available to you under a choice of one of two
7  * licenses. You may choose to be licensed under the terms of the GNU
8  * General Public License (GPL) Version 2, available from the file
9  * COPYING in the main directory of this source tree, or the
10  * OpenIB.org BSD license below:
11  *
12  * Redistribution and use in source and binary forms, with or
13  * without modification, are permitted provided that the following
14  * conditions are met:
15  *
16  * - Redistributions of source code must retain the above
17  * copyright notice, this list of conditions and the following
18  * disclaimer.
19  *
20  * - Redistributions in binary form must reproduce the above
21  * copyright notice, this list of conditions and the following
22  * disclaimer in the documentation and/or other materials
23  * provided with the distribution.
24  *
25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32  * SOFTWARE.
33  */
34 #ifndef _QIB_MAD_H
35 #define _QIB_MAD_H
36 
37 #include <rdma/ib_pma.h>
38 
39 #define IB_SMP_UNSUP_VERSION cpu_to_be16(0x0004)
40 #define IB_SMP_UNSUP_METHOD cpu_to_be16(0x0008)
41 #define IB_SMP_UNSUP_METH_ATTR cpu_to_be16(0x000C)
42 #define IB_SMP_INVALID_FIELD cpu_to_be16(0x001C)
43 
44 struct ib_node_info {
57 } __attribute__ ((packed));
58 
66 
67  union {
68  struct {
69  u8 details[54];
70  } raw_data;
71 
72  struct {
74  __be16 lid; /* where violation happened */
75  u8 port_num; /* where violation happened */
76  } __attribute__ ((packed)) ntc_129_131;
77 
80  __be16 lid; /* LID where change occurred */
82  u8 local_changes; /* low bit - local changes */
83  __be32 new_cap_mask; /* new capability mask */
85  u8 change_flags; /* low 3 bits only */
86  } __attribute__ ((packed)) ntc_144;
87 
88  struct {
90  __be16 lid; /* lid where sys guid changed */
93  } __attribute__ ((packed)) ntc_145;
94 
95  struct {
100  u8 reserved2;
104  u8 reserved3;
107  } __attribute__ ((packed)) ntc_256;
108 
109  struct {
114  __be32 sl_qp1; /* SL: high 4 bits */
115  __be32 qp2; /* high 8 bits reserved */
116  union ib_gid gid1;
117  union ib_gid gid2;
118  } __attribute__ ((packed)) ntc_257_258;
119 
121 };
123 /*
124  * Generic trap/notice types
125  */
126 #define IB_NOTICE_TYPE_FATAL 0x80
127 #define IB_NOTICE_TYPE_URGENT 0x81
128 #define IB_NOTICE_TYPE_SECURITY 0x82
129 #define IB_NOTICE_TYPE_SM 0x83
130 #define IB_NOTICE_TYPE_INFO 0x84
131 
132 /*
133  * Generic trap/notice producers
134  */
135 #define IB_NOTICE_PROD_CA cpu_to_be16(1)
136 #define IB_NOTICE_PROD_SWITCH cpu_to_be16(2)
137 #define IB_NOTICE_PROD_ROUTER cpu_to_be16(3)
138 #define IB_NOTICE_PROD_CLASS_MGR cpu_to_be16(4)
139 
140 /*
141  * Generic trap/notice numbers
142  */
143 #define IB_NOTICE_TRAP_LLI_THRESH cpu_to_be16(129)
144 #define IB_NOTICE_TRAP_EBO_THRESH cpu_to_be16(130)
145 #define IB_NOTICE_TRAP_FLOW_UPDATE cpu_to_be16(131)
146 #define IB_NOTICE_TRAP_CAP_MASK_CHG cpu_to_be16(144)
147 #define IB_NOTICE_TRAP_SYS_GUID_CHG cpu_to_be16(145)
148 #define IB_NOTICE_TRAP_BAD_MKEY cpu_to_be16(256)
149 #define IB_NOTICE_TRAP_BAD_PKEY cpu_to_be16(257)
150 #define IB_NOTICE_TRAP_BAD_QKEY cpu_to_be16(258)
151 
152 /*
153  * Repress trap/notice flags
154  */
155 #define IB_NOTICE_REPRESS_LLI_THRESH (1 << 0)
156 #define IB_NOTICE_REPRESS_EBO_THRESH (1 << 1)
157 #define IB_NOTICE_REPRESS_FLOW_UPDATE (1 << 2)
158 #define IB_NOTICE_REPRESS_CAP_MASK_CHG (1 << 3)
159 #define IB_NOTICE_REPRESS_SYS_GUID_CHG (1 << 4)
160 #define IB_NOTICE_REPRESS_BAD_MKEY (1 << 5)
161 #define IB_NOTICE_REPRESS_BAD_PKEY (1 << 6)
162 #define IB_NOTICE_REPRESS_BAD_QKEY (1 << 7)
163 
164 /*
165  * Generic trap/notice other local changes flags (trap 144).
166  */
167 #define IB_NOTICE_TRAP_LSE_CHG 0x04 /* Link Speed Enable changed */
168 #define IB_NOTICE_TRAP_LWE_CHG 0x02 /* Link Width Enable changed */
169 #define IB_NOTICE_TRAP_NODE_DESC_CHG 0x01
170 
171 /*
172  * Generic trap/notice M_Key volation flags in dr_trunc_hop (trap 256).
173  */
174 #define IB_NOTICE_TRAP_DR_NOTICE 0x80
175 #define IB_NOTICE_TRAP_DR_TRUNC 0x40
176 
178  u8 vl; /* Only low 4 bits, upper 4 bits reserved */
180 };
181 
182 #define IB_VLARB_LOWPRI_0_31 1
183 #define IB_VLARB_LOWPRI_32_63 2
184 #define IB_VLARB_HIGHPRI_0_31 3
185 #define IB_VLARB_HIGHPRI_32_63 4
186 
187 #define IB_PMA_PORT_COUNTERS_CONG cpu_to_be16(0xFF00)
188 
203  u8 link_overrun_errors; /* LocalLink: 7:4, BufferOverrun: 3:0 */
212 } __attribute__ ((packed));
213 
214 #define IB_PMA_CONG_HW_CONTROL_TIMER 0x00
215 #define IB_PMA_CONG_HW_CONTROL_SAMPLE 0x01
217 #define QIB_XMIT_RATE_UNSUPPORTED 0x0
218 #define QIB_XMIT_RATE_PICO 0x7
219 /* number of 4nsec cycles equaling 2secs */
220 #define QIB_CONG_TIMER_PSINTERVAL 0x1DCD64EC
222 #define IB_PMA_SEL_CONG_ALL 0x01
223 #define IB_PMA_SEL_CONG_PORT_DATA 0x02
224 #define IB_PMA_SEL_CONG_XMIT 0x04
225 #define IB_PMA_SEL_CONG_ROUTING 0x08
227 /*
228  * Congestion control class attributes
229  */
230 #define IB_CC_ATTR_CLASSPORTINFO cpu_to_be16(0x0001)
231 #define IB_CC_ATTR_NOTICE cpu_to_be16(0x0002)
232 #define IB_CC_ATTR_CONGESTION_INFO cpu_to_be16(0x0011)
233 #define IB_CC_ATTR_CONGESTION_KEY_INFO cpu_to_be16(0x0012)
234 #define IB_CC_ATTR_CONGESTION_LOG cpu_to_be16(0x0013)
235 #define IB_CC_ATTR_SWITCH_CONGESTION_SETTING cpu_to_be16(0x0014)
236 #define IB_CC_ATTR_SWITCH_PORT_CONGESTION_SETTING cpu_to_be16(0x0015)
237 #define IB_CC_ATTR_CA_CONGESTION_SETTING cpu_to_be16(0x0016)
238 #define IB_CC_ATTR_CONGESTION_CONTROL_TABLE cpu_to_be16(0x0017)
239 #define IB_CC_ATTR_TIME_STAMP cpu_to_be16(0x0018)
240 
241 /* generalizations for threshold values */
242 #define IB_CC_THRESHOLD_NONE 0x0
243 #define IB_CC_THRESHOLD_MIN 0x1
244 #define IB_CC_THRESHOLD_MAX 0xf
245 
246 /* CCA MAD header constants */
247 #define IB_CC_MAD_LOGDATA_LEN 32
248 #define IB_CC_MAD_MGMTDATA_LEN 192
249 
250 struct ib_cc_mad {
262 
263  /* For CongestionLog attribute only */
265 
267 } __packed;
268 
269 /*
270  * Congestion Control class portinfo capability mask bits
271  */
272 #define IB_CC_CPI_CM_TRAP_GEN cpu_to_be16(1 << 0)
273 #define IB_CC_CPI_CM_GET_SET_NOTICE cpu_to_be16(1 << 1)
274 #define IB_CC_CPI_CM_CAP2 cpu_to_be16(1 << 2)
275 #define IB_CC_CPI_CM_ENHANCEDPORT0_CC cpu_to_be16(1 << 8)
276 
282  u8 resp_time_value; /* only lower 5 bits */
283  union ib_gid redirect_gid;
284  __be32 redirect_tc_sl_fl; /* 8, 4, 20 bits respectively */
287  __be32 redirect_qp; /* only lower 24 bits */
289  union ib_gid trap_gid;
290  __be32 trap_tc_sl_fl; /* 8, 4, 20 bits respectively */
293  __be32 trap_hl_qp; /* 8, 24 bits respectively */
295 } __packed;
296 
297 /* Congestion control traps */
298 #define IB_CC_TRAP_KEY_VIOLATION 0x0000
299 
308  u8 sgid[16];
309  u8 padding[24];
310 } __packed;
311 
312 /* Congestion info flags */
313 #define IB_CC_CI_FLAGS_CREDIT_STARVATION 0x1
314 #define IB_CC_TABLE_CAP_DEFAULT 31
315 
318  u8 control_table_cap; /* Multiple of 64 entry unit CCTs */
319 } __packed;
320 
326 } __packed;
327 
328 #define IB_CC_CL_CA_LOGEVENTS_LEN 208
329 
337 } __packed;
338 
339 #define IB_CC_CLEC_SERVICETYPE_RC 0x0
340 #define IB_CC_CLEC_SERVICETYPE_UC 0x1
341 #define IB_CC_CLEC_SERVICETYPE_RD 0x2
342 #define IB_CC_CLEC_SERVICETYPE_UD 0x3
343 
346  u8 remote_qp_number_cn_entry[3];
347  u8 sl_cn_entry:4;
348  u8 service_type_cn_entry:4;
351 } __packed;
352 
353 /* Sixteen congestion entries */
354 #define IB_CC_CCS_ENTRIES 16
355 
356 /* Port control flags */
357 #define IB_CC_CCS_PC_SL_BASED 0x01
358 
363  u8 ccti_min; /* min CCTI for cc table */
364 } __packed;
365 
370  u8 ccti_min; /* min CCTI for cc table */
371 } __packed;
372 
377 } __packed;
378 
383 } __packed;
384 
385 #define IB_CC_TABLE_ENTRY_INCREASE_DEFAULT 1
386 #define IB_CC_TABLE_ENTRY_TIMER_DEFAULT 1
387 
388 /* 64 Congestion Control table entries in a single MAD */
389 #define IB_CCT_ENTRIES 64
390 #define IB_CCT_MIN_ENTRIES (IB_CCT_ENTRIES * 2)
391 
393  __be16 entry; /* shift:2, multiplier:14 */
394 };
395 
397  u16 entry; /* shift:2, multiplier:14 */
398 };
399 
401  __be16 ccti_limit; /* max CCTI for cc table */
402  struct ib_cc_table_entry ccti_entries[IB_CCT_ENTRIES];
403 } __packed;
404 
406  u16 ccti_limit; /* max CCTI for cc table */
408 } __packed;
409 
410 #define CC_TABLE_SHADOW_MAX \
411  (IB_CC_TABLE_CAP_DEFAULT * IB_CCT_ENTRIES)
412 
416 } __packed;
417 
418 #endif /* _QIB_MAD_H */
419 /*
420  * The PortSamplesControl.CounterMasks field is an array of 3 bit fields
421  * which specify the N'th counter's capabilities. See ch. 16.1.3.2.
422  * We support 5 counters which only count the mandatory quantities.
423  */
424 #define COUNTER_MASK(q, n) (q << ((9 - n) * 3))
425 #define COUNTER_MASK0_9 \
426  cpu_to_be32(COUNTER_MASK(1, 0) | \
427  COUNTER_MASK(1, 1) | \
428  COUNTER_MASK(1, 2) | \
429  COUNTER_MASK(1, 3) | \
430  COUNTER_MASK(1, 4))